mips: $t3 is now our tmpreg

2 files changed, 11 insertions, 11 deletions

diff --git a/orc/orcprogram-mips.c b/orc/orcprogram-mips.c
index 7924548..b374241 100644
--- a/orc/orcprogram-mips.c
+++ b/orc/orcprogram-mips.c
@@ -73,10 +73,10 @@ orc_compiler_orc_mips_init (OrcCompiler *compiler)
   compiler->valid_regs[ORC_MIPS_T0] = 0; /* $t0, $t1 and $t2 are used as loop */
   compiler->valid_regs[ORC_MIPS_T1] = 0; /* counters */
   compiler->valid_regs[ORC_MIPS_T2] = 0;
-  compiler->valid_regs[ORC_MIPS_T3] = 0; /* used for unaligned load/store of 16
-                                            bit values */
-  compiler->valid_regs[ORC_MIPS_T4] = 0; /* These two used to calculate which region 1 loop to use */
-  compiler->valid_regs[ORC_MIPS_T5] = 0;
+  compiler->valid_regs[ORC_MIPS_T3] = 0; /* used as temporary register */
+  compiler->valid_regs[ORC_MIPS_T4] = 0; /* These two used to calculate which */
+  compiler->valid_regs[ORC_MIPS_T5] = 0; /* region 1 loop to use, and other
+                                            temporary stuff */
   compiler->valid_regs[ORC_MIPS_K0] = 0; /* for kernel/interupts */
   compiler->valid_regs[ORC_MIPS_K1] = 0; /* for kernel/interupts */
   compiler->valid_regs[ORC_MIPS_GP] = 0; /* global pointer */
@@ -95,7 +95,7 @@ orc_compiler_orc_mips_init (OrcCompiler *compiler)
   for (i=ORC_MIPS_S0; i<= ORC_MIPS_S7; i++)
     compiler->save_regs[i] = 1;
 
-  /* what's compiler->gp_tmpreg? and ->tmpreg? */
+  compiler->tmpreg = ORC_MIPS_T3;
 
   switch (compiler->max_var_size) {
   case 1:
@@ -501,7 +501,7 @@ usual_case:
 
 
   /* We need a register that contains 1 so that we easily get 2^i */
-  orc_mips_emit_ori (compiler, ORC_MIPS_T3, ORC_MIPS_ZERO, 1);
+  orc_mips_emit_ori (compiler, compiler->tmpreg, ORC_MIPS_ZERO, 1);
   /* That's where we will store the bitfield of aligned vars (apart from
    * align_var) */
   orc_mips_emit_ori (compiler, ORC_MIPS_T5, ORC_MIPS_ZERO, 0);
@@ -513,7 +513,7 @@ usual_case:
     orc_mips_emit_conditional_branch_with_offset (compiler, ORC_MIPS_BNE,
                                                   ORC_MIPS_T0, ORC_MIPS_ZERO,
                                                   8 /* skipping the next two instructions */);
-    orc_mips_emit_sll (compiler, ORC_MIPS_T4, ORC_MIPS_T3, i);
+    orc_mips_emit_sll (compiler, ORC_MIPS_T4, compiler->tmpreg, i);
     orc_mips_emit_or (compiler, ORC_MIPS_T5, ORC_MIPS_T5, ORC_MIPS_T4);
   }
 
diff --git a/orc/orcrules-mips.c b/orc/orcrules-mips.c
index b4ec2c7..4adf945 100644
--- a/orc/orcrules-mips.c
+++ b/orc/orcrules-mips.c
@@ -26,9 +26,9 @@ mips_rule_load (OrcCompiler *compiler, void *user, OrcInstruction *insn)
     if (is_aligned) {
       orc_mips_emit_lh (compiler, dest, src, 0);
     } else {
-      orc_mips_emit_lb (compiler, ORC_MIPS_T3, src, 0);
+      orc_mips_emit_lb (compiler, compiler->tmpreg, src, 0);
       orc_mips_emit_lb (compiler, dest, src, 1);
-      orc_mips_emit_append (compiler, dest, ORC_MIPS_T3, 8);
+      orc_mips_emit_append (compiler, dest, compiler->tmpreg, 8);
     }
     break;
   case 2:
@@ -67,8 +67,8 @@ mips_rule_store (OrcCompiler *compiler, void *user, OrcInstruction *insn)
     } else {
       /* Note: the code below is little endian specific */
       orc_mips_emit_sb (compiler, src, dest, 0);
-      orc_mips_emit_srl (compiler, ORC_MIPS_T3, src, 8);
-      orc_mips_emit_sb (compiler, ORC_MIPS_T3, dest, 1);
+      orc_mips_emit_srl (compiler, compiler->tmpreg, src, 8);
+      orc_mips_emit_sb (compiler, compiler->tmpreg, dest, 1);
     }
     break;
   case 2: