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| author | zhuchen <zhuchen@loongson.cn> | 2022-09-29 19:50:52 +0800 |
|---|---|---|
| committer | Pauli <pauli@openssl.org> | 2022-10-12 18:02:12 +1100 |
| commit | 7f2d6188c7b16ef7a4deeeedb56f42014156b9f8 (patch) | |
| tree | ae1c24c61748f8b9c70dda5f65467a86e22cffba /crypto/build.info | |
| parent | e1e93f7a07dfc7a8dddd4ddbb79d1d9bc9760d32 (diff) | |
| download | openssl-new-7f2d6188c7b16ef7a4deeeedb56f42014156b9f8.tar.gz | |
Add LoongArch64 cpuid and OPENSSL_loongarchcap_P
Loongarch64 architecture defines 128 bit vector extension lsx and 256 bit
vector extension lasx. The cpucfg instruction can be used to obtain whether
the CPU has a corresponding extension. This part of code is added to prepare
for the subsequent addition of corresponding vector instruction optimization.
Signed-off-by: zhuchen <zhuchen@loongson.cn>
Reviewed-by: Tomas Mraz <tomas@openssl.org>
Reviewed-by: Paul Dale <pauli@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/19364)
Diffstat (limited to 'crypto/build.info')
| -rw-r--r-- | crypto/build.info | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/crypto/build.info b/crypto/build.info index 24985f443c..f5b29cca1c 100644 --- a/crypto/build.info +++ b/crypto/build.info @@ -54,6 +54,7 @@ IF[{- !$disabled{asm} && $config{processor} ne '386' -}] $CPUIDASM_riscv64=riscvcap.c riscv64cpuid.s $CPUIDASM_riscv32=riscvcap.c riscv32cpuid.s + $CPUIDASM_loongarch64=loongarchcap.c loongarch64cpuid.s # Now that we have defined all the arch specific variables, use the # appropriate one, and define the appropriate macros IF[$CPUIDASM_{- $target{asm_arch} -}] @@ -139,6 +140,7 @@ INCLUDE[s390xcpuid.o]=. GENERATE[riscv64cpuid.s]=riscv64cpuid.pl GENERATE[riscv32cpuid.s]=riscv32cpuid.pl +GENERATE[loongarch64cpuid.s]=loongarch64cpuid.pl IF[{- $config{target} =~ /^(?:Cygwin|mingw|VC-|BC-)/ -}] SHARED_SOURCE[../libcrypto]=dllmain.c ENDIF |