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| author | Fangming.Fang <fangming.fang@arm.com> | 2020-04-28 02:33:50 +0000 |
|---|---|---|
| committer | Tomas Mraz <tmraz@fedoraproject.org> | 2020-12-09 16:17:17 +0100 |
| commit | 5ea64b456b1a27ae046f23d632a968a7583bb9eb (patch) | |
| tree | 3c9bfe67790eef189c3189c6964d2817a42d0052 /crypto/armcap.c | |
| parent | 6582661f7b369c3ce7edab5fea2529de5f2fb408 (diff) | |
| download | openssl-new-5ea64b456b1a27ae046f23d632a968a7583bb9eb.tar.gz | |
Read MIDR_EL1 system register on aarch64
MIDR_EL1 system register exposes microarchitecture information so that
people can make micro-arch related optimization such as exposing as
much instruction level parallelism as possible.
MIDR_EL1 register can be read only if HWCAP_CPUID feature is supported.
Change-Id: Iabb8a36c5d31b184dba6399f378598058d394d4e
Reviewed-by: Paul Dale <paul.dale@oracle.com>
Reviewed-by: Tomas Mraz <tmraz@fedoraproject.org>
(Merged from https://github.com/openssl/openssl/pull/11744)
Diffstat (limited to 'crypto/armcap.c')
| -rw-r--r-- | crypto/armcap.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/crypto/armcap.c b/crypto/armcap.c index 70d2719ba7..7bd82f8ebc 100644 --- a/crypto/armcap.c +++ b/crypto/armcap.c @@ -18,6 +18,7 @@ #include "arm_arch.h" unsigned int OPENSSL_armcap_P = 0; +unsigned int OPENSSL_arm_midr = 0; #if __ARM_MAX_ARCH__<7 void OPENSSL_cpuid_setup(void) @@ -48,6 +49,7 @@ void _armv8_sha256_probe(void); void _armv8_pmull_probe(void); # ifdef __aarch64__ void _armv8_sha512_probe(void); +unsigned int _armv8_cpuid_probe(void); # endif uint32_t _armv7_tick(void); @@ -95,6 +97,7 @@ void OPENSSL_cpuid_setup(void) __attribute__ ((constructor)); # define HWCAP_CE_PMULL (1 << 4) # define HWCAP_CE_SHA1 (1 << 5) # define HWCAP_CE_SHA256 (1 << 6) +# define HWCAP_CPUID (1 << 11) # define HWCAP_CE_SHA512 (1 << 21) # endif @@ -155,6 +158,9 @@ void OPENSSL_cpuid_setup(void) # ifdef __aarch64__ if (hwcap & HWCAP_CE_SHA512) OPENSSL_armcap_P |= ARMV8_SHA512; + + if (hwcap & HWCAP_CPUID) + OPENSSL_armcap_P |= ARMV8_CPUID; # endif } # endif @@ -210,5 +216,10 @@ void OPENSSL_cpuid_setup(void) sigaction(SIGILL, &ill_oact, NULL); sigprocmask(SIG_SETMASK, &oset, NULL); + +# ifdef __aarch64__ + if (OPENSSL_armcap_P & ARMV8_CPUID) + OPENSSL_arm_midr = _armv8_cpuid_probe(); +# endif } #endif |