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| author | Andy Polyakov <appro@openssl.org> | 2016-03-14 13:42:48 +0100 |
|---|---|---|
| committer | Richard Levitte <levitte@openssl.org> | 2016-03-14 14:41:35 +0100 |
| commit | 74acf1c41e9110fdc82324deb75f20d6efab7bd4 (patch) | |
| tree | 6ec8d9a40f1daa9e30c96787f70507bba184b279 /config | |
| parent | 8d51db86f7bbade81c6d6eb3357bc12ddeb12de1 (diff) | |
| download | openssl-new-74acf1c41e9110fdc82324deb75f20d6efab7bd4.tar.gz | |
config: fix HP-UX PA-RISC detection.
Reviewed-by: Richard Levitte <levitte@openssl.org>
Diffstat (limited to 'config')
| -rwxr-xr-x | config | 7 |
1 files changed, 6 insertions, 1 deletions
@@ -767,8 +767,13 @@ case "$GUESSOS" in (trap "stty `stty -g`; exit 0" 2 0; stty -icanon min 0 time 50; read waste) <&1 fi fi + # PA-RISC 2.0 is no longer supported as separate 32-bit + # target. This is compensated for by run-time detection + # in most critical assembly modules and taking advantage + # of 2.0 architectire in PA-RISC 1.1 build. + OUT="hpux-parisc1_1-${CC}" elif [ $CPU_VERSION -ge 528 ]; then # PA-RISC 1.1+ CPU - OUT="hpux-parisc-${CC}" + OUT="hpux-parisc1_1-${CC}" elif [ $CPU_VERSION -ge 523 ]; then # PA-RISC 1.0 CPU OUT="hpux-parisc-${CC}" else # Motorola(?) CPU |