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| author | Michaël Zasso <targos@protonmail.com> | 2021-07-10 13:10:39 +0200 |
|---|---|---|
| committer | Michaël Zasso <targos@protonmail.com> | 2021-07-20 15:29:06 +0200 |
| commit | 611ef29a498a1916d36c5234b84ae1fff343c660 (patch) | |
| tree | f29ad312507bb9fd1af2c0580456c877e2407c84 /deps/v8/src | |
| parent | 40d3e56a422c91ca1b4b8cbeccd0d6b6b7400ab2 (diff) | |
| download | node-new-611ef29a498a1916d36c5234b84ae1fff343c660.tar.gz | |
deps: V8: cherry-pick 3805a698f7b6
Original commit message:
PPC/s390: [wasm][liftoff] Always zero-extend 32 bit offsets
Port 2b77ca200c56667c68895e49c96c10ff77834f09
Original Commit Message:
The upper 32 bits of the 64 bit offset register are not guaranteed to be
cleared, so a zero-extension is needed. We already do the zero-extension
in the case of explicit bounds checking, but this should also be done if
the trap handler is enabled.
R=thibaudm@chromium.org, joransiu@ca.ibm.com, junyan@redhat.com, midawson@redhat.com
BUG=
LOG=N
Change-Id: Ife3ae4f93b85fe1b2c76fe4b98fa408b5b51ed71
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2929661
Reviewed-by: Junliang Yan <junyan@redhat.com>
Commit-Queue: Milad Fa <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/master@{#74886}
Refs: https://github.com/v8/v8/commit/3805a698f7b6803dd6ee002cfdda71296c71b30b
PR-URL: https://github.com/nodejs/node/pull/39337
Reviewed-By: Matteo Collina <matteo.collina@gmail.com>
Reviewed-By: James M Snell <jasnell@gmail.com>
Diffstat (limited to 'deps/v8/src')
| -rw-r--r-- | deps/v8/src/wasm/baseline/ppc/liftoff-assembler-ppc.h | 3 | ||||
| -rw-r--r-- | deps/v8/src/wasm/baseline/s390/liftoff-assembler-s390.h | 8 |
2 files changed, 9 insertions, 2 deletions
diff --git a/deps/v8/src/wasm/baseline/ppc/liftoff-assembler-ppc.h b/deps/v8/src/wasm/baseline/ppc/liftoff-assembler-ppc.h index 10d574301e..80268fc66a 100644 --- a/deps/v8/src/wasm/baseline/ppc/liftoff-assembler-ppc.h +++ b/deps/v8/src/wasm/baseline/ppc/liftoff-assembler-ppc.h @@ -203,7 +203,8 @@ void LiftoffAssembler::StoreTaggedPointer(Register dst_addr, void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr, Register offset_reg, uintptr_t offset_imm, LoadType type, LiftoffRegList pinned, - uint32_t* protected_load_pc, bool is_load_mem) { + uint32_t* protected_load_pc, bool is_load_mem, + bool i64_offset) { bailout(kUnsupportedArchitecture, "Load"); } diff --git a/deps/v8/src/wasm/baseline/s390/liftoff-assembler-s390.h b/deps/v8/src/wasm/baseline/s390/liftoff-assembler-s390.h index 4c230ed305..4b0b5a04f6 100644 --- a/deps/v8/src/wasm/baseline/s390/liftoff-assembler-s390.h +++ b/deps/v8/src/wasm/baseline/s390/liftoff-assembler-s390.h @@ -279,11 +279,17 @@ void LiftoffAssembler::StoreTaggedPointer(Register dst_addr, void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr, Register offset_reg, uintptr_t offset_imm, LoadType type, LiftoffRegList pinned, - uint32_t* protected_load_pc, bool is_load_mem) { + uint32_t* protected_load_pc, bool is_load_mem, + bool i64_offset) { UseScratchRegisterScope temps(this); if (!is_int20(offset_imm)) { mov(ip, Operand(offset_imm)); if (offset_reg != no_reg) { + if (!i64_offset) { + // Clear the upper 32 bits of the 64 bit offset register. + llgfr(r0, offset_reg); + offset_reg = r0; + } AddS64(ip, offset_reg); } offset_reg = ip; |