diff options
author | Michaël Zasso <targos@protonmail.com> | 2022-01-18 11:07:27 +0100 |
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committer | Michaël Zasso <targos@protonmail.com> | 2022-01-20 10:38:37 +0100 |
commit | 270253c4e268c2bef2e5995a95cbd92b75ed698d (patch) | |
tree | 218d63bbbf805a689fb2f29921f6a8a7d6bedbb5 /deps/v8/src/wasm/baseline/mips | |
parent | 5a407d606abec9f111247fd568f9028e0da52995 (diff) | |
download | node-new-270253c4e268c2bef2e5995a95cbd92b75ed698d.tar.gz |
deps: update V8 to 9.7.106.18
PR-URL: https://github.com/nodejs/node/pull/40907
Reviewed-By: Jiawen Geng <technicalcute@gmail.com>
Reviewed-By: Colin Ihrig <cjihrig@gmail.com>
Reviewed-By: Rich Trott <rtrott@gmail.com>
Diffstat (limited to 'deps/v8/src/wasm/baseline/mips')
-rw-r--r-- | deps/v8/src/wasm/baseline/mips/liftoff-assembler-mips.h | 34 |
1 files changed, 25 insertions, 9 deletions
diff --git a/deps/v8/src/wasm/baseline/mips/liftoff-assembler-mips.h b/deps/v8/src/wasm/baseline/mips/liftoff-assembler-mips.h index 35eabecbf0..f2f81464cf 100644 --- a/deps/v8/src/wasm/baseline/mips/liftoff-assembler-mips.h +++ b/deps/v8/src/wasm/baseline/mips/liftoff-assembler-mips.h @@ -55,11 +55,13 @@ inline constexpr Condition ToCondition(LiftoffCondition liftoff_cond) { // -----+--------------------+ <-- frame ptr (fp) // -1 | 0xa: WASM | // -2 | instance | +// -3 | feedback vector | +// -4 | tiering budget | // -----+--------------------+--------------------------- -// -3 | slot 0 (high) | ^ -// -4 | slot 0 (low) | | -// -5 | slot 1 (high) | Frame slots -// -6 | slot 1 (low) | | +// -5 | slot 0 (high) | ^ +// -6 | slot 0 (low) | | +// -7 | slot 1 (high) | Frame slots +// -8 | slot 1 (low) | | // | | v // -----+--------------------+ <-- stack ptr (sp) // @@ -71,8 +73,9 @@ constexpr int32_t kLowWordOffset = 0; constexpr int32_t kHighWordOffset = 4; #endif -// fp-4 holds the stack marker, fp-8 is the instance parameter. -constexpr int kInstanceOffset = 8; +constexpr int kInstanceOffset = 2 * kSystemPointerSize; +constexpr int kFeedbackVectorOffset = 3 * kSystemPointerSize; +constexpr int kTierupBudgetOffset = 4 * kSystemPointerSize; inline MemOperand GetStackSlot(int offset) { return MemOperand(fp, -offset); } @@ -421,7 +424,7 @@ void LiftoffAssembler::AbortCompilation() {} // static constexpr int LiftoffAssembler::StaticStackFrameSize() { - return liftoff::kInstanceOffset; + return liftoff::kTierupBudgetOffset; } int LiftoffAssembler::SlotSizeForType(ValueKind kind) { @@ -616,8 +619,14 @@ void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr, (offset_reg != no_reg) ? MemOperand(src, offset_imm + liftoff::kHighWordOffset) : MemOperand(src_addr, offset_imm + liftoff::kHighWordOffset); - TurboAssembler::Ulw(dst.low_gp(), src_op); - TurboAssembler::Ulw(dst.high_gp(), src_op_upper); + { + UseScratchRegisterScope temps(this); + Register temp = dst.low_gp(); + if (dst.low_gp() == src_op_upper.rm()) temp = temps.Acquire(); + TurboAssembler::Ulw(temp, src_op); + TurboAssembler::Ulw(dst.high_gp(), src_op_upper); + if (dst.low_gp() == src_op_upper.rm()) mov(dst.low_gp(), temp); + } break; } case LoadType::kF32Load: @@ -1599,6 +1608,13 @@ void LiftoffAssembler::emit_i32_cond_jumpi(LiftoffCondition liftoff_cond, TurboAssembler::Branch(label, cond, lhs, Operand(imm)); } +void LiftoffAssembler::emit_i32_subi_jump_negative(Register value, + int subtrahend, + Label* result_negative) { + TurboAssembler::Subu(value, value, Operand(subtrahend)); + TurboAssembler::Branch(result_negative, less, value, Operand(zero_reg)); +} + void LiftoffAssembler::emit_i32_eqz(Register dst, Register src) { sltiu(dst, src, 1); } |