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* insns.dat: MOV is not lockable; CMPXCHG16B does not support HLEH. Peter Anvin2012-02-251-5/+5
* HLE: Change NOHLE to be an instruction flagH. Peter Anvin2012-02-251-4/+4
* Assume the undocumented CMPXCHG486 opcode was lockableH. Peter Anvin2012-02-251-3/+3
* insns.dat: Add IF_LOCK flag on appropriate instructionsCyrill Gorcunov2012-02-261-154/+154
* Clean up JMP/CALL patterns, especially for 64 bitsH. Peter Anvin2012-02-251-8/+11
* insns.dat: Add nohle for MOV in case of moffset destinationCyrill Gorcunov2012-02-261-4/+4
* insns.dat: Add hlexr flag for MOV instructionCyrill Gorcunov2012-02-251-12/+12
* insns.dat: Add hlenl flag for XCHG instructionCyrill Gorcunov2012-02-251-8/+8
* insns.dat: Add hle flag for XADD instructionCyrill Gorcunov2012-02-251-4/+4
* insns.dat: Add hle flag for XOR instructionCyrill Gorcunov2012-02-251-14/+14
* insns.dat: Add hle flag for SUB instructionCyrill Gorcunov2012-02-251-14/+14
* insns.dat: Add hle flag for SBB instructionCyrill Gorcunov2012-02-251-14/+14
* insns.dat: Add hle flag for OR instructionCyrill Gorcunov2012-02-251-14/+14
* insns.dat: Add hle flag for NOT instructionCyrill Gorcunov2012-02-251-4/+4
* insns.dat: Add hle flag for NEG instructionCyrill Gorcunov2012-02-251-4/+4
* insns.dat: Add hle flag for INC instructionCyrill Gorcunov2012-02-251-4/+4
* insns.dat: Add hle flag for DEC instructionCyrill Gorcunov2012-02-251-4/+4
* insns.dat: Add hle flag for CMPXCHG16B instructionCyrill Gorcunov2012-02-251-1/+1
* insns.dat: Add hle flag for CMPXCHG8B instructionCyrill Gorcunov2012-02-251-1/+1
* insns.dat: Add hle flag for CMPXCHG instructionCyrill Gorcunov2012-02-251-4/+4
* insns.dat: Add hle flag for BTS instructionCyrill Gorcunov2012-02-251-6/+6
* insns.dat: Add hle flag for BTR instructionCyrill Gorcunov2012-02-251-6/+6
* insns.dat: Add hle flag for BTC instructionCyrill Gorcunov2012-02-251-6/+6
* insns.dat: Add hle flag for AND instructionCyrill Gorcunov2012-02-251-14/+14
* insns.dat: Add hle flag for ADC instructionCyrill Gorcunov2012-02-251-14/+14
* insns.dat: Add hle flag for ADD instructionCyrill Gorcunov2012-02-251-14/+14
* Remove all remaining explicit bytecodes from insns.datH. Peter Anvin2012-02-251-41/+41
* insns: create a symbolic "wait" token for the \341 byte codeH. Peter Anvin2012-02-101-10/+10
* insns: fix IMUL patterns to get rid of open-coded \100 bytecodesH. Peter Anvin2012-02-101-12/+12
* insns: correct the TSX opcodesH. Peter Anvin2012-02-091-6/+9
* insns: Add AVX2 transactional synchronization extensionsCyrill Gorcunov2012-02-091-0/+8
* insns: replace open-coded \322 opcode with odf (operand default)H. Peter Anvin2012-02-091-22/+22
* BR 3463230: Add VMFUNC instructionH. Peter Anvin2011-12-211-0/+1
* insns: Fix up sizes for MOVSD and VMOVSS instructionsCyrill Gorcunov2011-12-171-4/+4
* BR3392199: Revert "insns: Add MOVD as aliases to MOVQ for compatibility with ...Cyrill Gorcunov2011-11-201-11/+0
* insns.dat: Fix VPCMPEQQ templateCyrill Gorcunov2011-11-151-1/+1
* BR3392195: insns: Drop MMX flag from MOVDCyrill Gorcunov2011-11-121-2/+2
* insns: Fix typos for vcmpeq aliasesCyrill Gorcunov2011-11-111-6/+6
* insns: Add MOVD as aliases to MOVQ for compatibility with AMDCyrill Gorcunov2011-10-021-0/+11
* insns.dat: Fixup VGATHERx instructionsCyrill Gorcunov2011-08-311-8/+8
* insns, avx2: A couple of upper-case to lower-case conversionCyrill Gorcunov2011-08-231-3/+3
* insns, avx2: A typo in VPERMPDCyrill Gorcunov2011-08-231-1/+1
* BR3385573: Some AVX2 instructions fixupsCyrill Gorcunov2011-08-221-9/+9
* insns: Change VPERMPQ to VPERMQCyrill Gorcunov2011-08-031-1/+1
* Implement insns.dat in human readable formAnonymous2011-07-201-1998/+1998
* insns: A final pile of AVX2 instructionsCyrill Gorcunov2011-07-201-5/+45
* insns: A few additional AVX2 templatesCyrill Gorcunov2011-07-191-3/+34
* insns: One more small snippet of AVX2Cyrill Gorcunov2011-07-181-0/+12
* insns: One more slab of AVX2 instructionsCyrill Gorcunov2011-07-181-1/+22
* insns: Add a slab of AVX2 instructionsCyrill Gorcunov2011-07-171-2/+76