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* BR3064376: ndisasm crashCyrill Gorcunov2010-09-151-1/+1
* ndisasm: handle VEX.LIGH. Peter Anvin2010-08-191-1/+1
* ndisasm: unify VEX handlingH. Peter Anvin2010-08-191-34/+6
* ndisasm: fix handing of byte codes 250-253, 324H. Peter Anvin2010-08-161-2/+12
* assemble: handle vex.ligH. Peter Anvin2010-08-161-5/+7
* continue using is_class helperCyrill Gorcunov2009-10-181-2/+2
* opflags: more int32_t -> opflags_t conversionsH. Peter Anvin2009-10-131-1/+1
* disasm.c: eatbyte -- use snprintf to prevent potential buffer overflowCyrill Gorcunov2009-08-091-1/+1
* NASM: relicense under the 2-clause BSD licenseH. Peter Anvin2009-07-061-12/+0
* Add copyright headers to the *.c/*.h files in the main directoryH. Peter Anvin2009-06-281-6/+45
* ndisasm: fix disassembly of JRCXZH. Peter Anvin2009-06-261-1/+1
* Add support for instructions which always use low 8-bit registersH. Peter Anvin2009-06-241-2/+6
* Add symbolic constants for REX_V "classes" (VEX, XOP, ...)H. Peter Anvin2009-05-081-4/+4
* Use lower case for VEX and XOP in instructions tableH. Peter Anvin2009-05-031-2/+2
* Infrastructure support for AMD's new XOP prefixH. Peter Anvin2009-05-031-1/+24
* disasm: fix reversed REP vs REPNE in eatbyte()H. Peter Anvin2009-03-191-2/+2
* disasm: when no instruction is found, consider a naked prefixH. Peter Anvin2009-03-181-2/+80
* BR 2592476: Treat WAIT as a prefix even though it's really an instructionH. Peter Anvin2009-02-211-35/+20
* disasm: introduce opyH. Peter Anvin2008-10-251-3/+4
* disasm: extension byte support in the disassemblerH. Peter Anvin2008-10-231-12/+20
* Add extension bytecodes to support operands 4+H. Peter Anvin2008-10-231-0/+1
* disasm: collapse all the segment register push/pop bytecodesH. Peter Anvin2008-10-091-59/+2
* Reshuffle and move the bytecodes for segment register push/popH. Peter Anvin2008-10-081-61/+61
* New opcode for 32->64 bit sign-extended immediate with warningH. Peter Anvin2008-10-071-0/+1
* New opcodes to deal with 8-bit immediate sign extended to opsizeH. Peter Anvin2008-10-061-0/+1
* BR 2029829: Accept VIA XCRYPT instructions with or without REPH. Peter Anvin2008-08-281-0/+4
* BR 2062342: ndisasm: r12 *can* be an index registerH. Peter Anvin2008-08-201-2/+2
* BR 2028910: fix decoding of VEX prefixes in 16- and 32-bit modeH. Peter Anvin2008-07-301-16/+17
* ndisasm: the high bit of is4 bytes is ignored in 32-bit modeH. Peter Anvin2008-05-261-3/+4
* Add tokens vex.ww and vex.wx; vex.wx is the defaultH. Peter Anvin2008-05-221-2/+6
* insnsn.c: cleaner to *not* separate out conditional instructionsH. Peter Anvin2008-05-211-5/+4
* Disassembler: select table based on VEX prefixesH. Peter Anvin2008-05-211-1/+14
* Fix display for fixed xmm0/ymm0, SSE redundant prefixesH. Peter Anvin2008-05-211-0/+7
* VEX prefixes apply to VEX instructions only...H. Peter Anvin2008-05-201-0/+6
* Handle is4 bytes without meaningful information in the bottom bitsH. Peter Anvin2008-05-201-0/+10
* ndisasm: simple compare for conditional opcodes, no loopH. Peter Anvin2008-05-201-12/+9
* Avoid #including .c files; instead compile as separate unitsH. Peter Anvin2008-05-201-46/+40
* Add DY, YWORD, and the SY instruction flagH. Peter Anvin2008-05-201-0/+3
* Same some space by introducing shorthand byte codes for SSE prefixesH. Peter Anvin2008-05-201-0/+20
* Remove special hacks to avoid zero bytecodesH. Peter Anvin2008-05-121-5/+0
* Add support for register-number immediates with fixed 4-bit valuesH. Peter Anvin2008-05-061-0/+13
* Initial NDISASM support for AVX instructions/VEX prefixesH. Peter Anvin2008-05-051-9/+121
* First cut at AVX machinery.H. Peter Anvin2008-05-041-0/+10
* disasm: relative operands are signed, not unsignedH. Peter Anvin2008-01-021-4/+7
* regularized spelling of license to match name of LICENSE fileBeroset2007-12-291-1/+1
* disasm: 32-bit index registers were displayed as 64 bitsH. Peter Anvin2007-12-261-1/+1
* BR 1834292: Fix multiple disassembler bugsH. Peter Anvin2007-11-181-4/+23
* Address data is int64_t; simplify writing an address objectH. Peter Anvin2007-11-131-1/+1
* ndisasm: factor out the common operand-extraction codeH. Peter Anvin2007-11-121-38/+41
* Un-special-case "xchg rax,rax"; disassemble o64H. Peter Anvin2007-11-121-5/+30
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