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* NASM 2.10rc9nasm-2.10rc9H. Peter Anvin2012-02-251-1/+1
* doc: Document AVX2, BMI1, BMI2 and TSX support.H. Peter Anvin2012-02-251-0/+5
* Assume the undocumented CMPXCHG486 opcode was lockableH. Peter Anvin2012-02-251-3/+3
* insns.dat: Add IF_LOCK flag on appropriate instructionsCyrill Gorcunov2012-02-261-154/+154
* Clean up JMP/CALL patterns, especially for 64 bitsH. Peter Anvin2012-02-252-8/+15
* insns.dat: Add nohle for MOV in case of moffset destinationCyrill Gorcunov2012-02-261-4/+4
* insns.dat: Add hlexr flag for MOV instructionCyrill Gorcunov2012-02-251-12/+12
* insns.dat: Add hlenl flag for XCHG instructionCyrill Gorcunov2012-02-251-8/+8
* insns.dat: Add hle flag for XADD instructionCyrill Gorcunov2012-02-251-4/+4
* insns.dat: Add hle flag for XOR instructionCyrill Gorcunov2012-02-251-14/+14
* insns.dat: Add hle flag for SUB instructionCyrill Gorcunov2012-02-251-14/+14
* insns.dat: Add hle flag for SBB instructionCyrill Gorcunov2012-02-251-14/+14
* insns.dat: Add hle flag for OR instructionCyrill Gorcunov2012-02-251-14/+14
* insns.dat: Add hle flag for NOT instructionCyrill Gorcunov2012-02-251-4/+4
* insns.dat: Add hle flag for NEG instructionCyrill Gorcunov2012-02-251-4/+4
* insns.dat: Add hle flag for INC instructionCyrill Gorcunov2012-02-251-4/+4
* insns.dat: Add hle flag for DEC instructionCyrill Gorcunov2012-02-251-4/+4
* insns.dat: Add hle flag for CMPXCHG16B instructionCyrill Gorcunov2012-02-251-1/+1
* insns.dat: Add hle flag for CMPXCHG8B instructionCyrill Gorcunov2012-02-251-1/+1
* insns.dat: Add hle flag for CMPXCHG instructionCyrill Gorcunov2012-02-251-4/+4
* insns.dat: Add hle flag for BTS instructionCyrill Gorcunov2012-02-251-6/+6
* insns.dat: Add hle flag for BTR instructionCyrill Gorcunov2012-02-251-6/+6
* insns.dat: Add hle flag for BTC instructionCyrill Gorcunov2012-02-251-6/+6
* insns.dat: Add hle flag for AND instructionCyrill Gorcunov2012-02-251-14/+14
* insns.dat: Add hle flag for ADC instructionCyrill Gorcunov2012-02-251-14/+14
* insns.dat: Add hle flag for ADD instructionCyrill Gorcunov2012-02-251-14/+14
* disasm: ignore opcodes 370 and 371H. Peter Anvin2012-02-251-1/+5
* Remove all remaining explicit bytecodes from insns.datH. Peter Anvin2012-02-253-59/+77
* Add support for warning on invalid LOCK prefixesH. Peter Anvin2012-02-252-13/+27
* Move HLE byte codes to \264..\267H. Peter Anvin2012-02-253-47/+47
* Add a "nohle" byte code to skip an instruction patternH. Peter Anvin2012-02-253-33/+47
* insns.pl: Bundle all "plain bytecodes" into a hashH. Peter Anvin2012-02-241-40/+33
* HLE: Implement the basic mechanism for XACQUIRE/XRELEASEH. Peter Anvin2012-02-247-6/+87
* nasm.c: Fix is_suppressed_warning()H. Peter Anvin2012-02-241-8/+5
* HLE: Split the LOCK and REP prefix slotsH. Peter Anvin2012-02-244-13/+15
* insns: create a symbolic "wait" token for the \341 byte codeH. Peter Anvin2012-02-102-10/+12
* insns: fix IMUL patterns to get rid of open-coded \100 bytecodesH. Peter Anvin2012-02-101-12/+12
* insns: correct the TSX opcodesH. Peter Anvin2012-02-091-6/+9
* insns: Add AVX2 transactional synchronization extensionsCyrill Gorcunov2012-02-092-0/+10
* insns: replace open-coded \322 opcode with odf (operand default)H. Peter Anvin2012-02-092-22/+24
* backend: add support for x32 ELFH.J. Lu2012-02-038-2/+2233
* BR 3463230: Add VMFUNC instructionH. Peter Anvin2011-12-211-0/+1
* insns: Fix up sizes for MOVSD and VMOVSS instructionsCyrill Gorcunov2011-12-171-4/+4
* Don't forget to setup warning levels on preprocessor phaseCyrill Gorcunov2011-12-051-1/+2
* Drop tab/space mess from parse_cmdlineCyrill Gorcunov2011-12-051-23/+27
* Use proper bracing on setting warnings in comman line parsingCyrill Gorcunov2011-12-051-14/+16
* Add WARN_IDX helper and ERR_WARN_TERM named constantCyrill Gorcunov2011-12-052-4/+6
* Simplify is_suppressed_warning helperCyrill Gorcunov2011-12-041-9/+18
* BR3392199: Revert "insns: Add MOVD as aliases to MOVQ for compatibility with ...Cyrill Gorcunov2011-11-201-11/+0
* preproc: Proper bracing with list_for_eachCyrill Gorcunov2011-11-201-3/+6