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| author | H. Peter Anvin <hpa@zytor.com> | 2017-05-01 19:51:09 -0700 |
|---|---|---|
| committer | H. Peter Anvin <hpa@zytor.com> | 2017-05-01 19:51:09 -0700 |
| commit | 5810c594c9eeed4d809b29c9e073af76dfcd3249 (patch) | |
| tree | bd23195a95c1fb06029b64636bb6af3b2f543e33 | |
| parent | 5f93c9597dcf59055c66caba1c75e5d6f02b65d2 (diff) | |
| download | nasm-5810c594c9eeed4d809b29c9e073af76dfcd3249.tar.gz | |
listing: fix base address for TIMES
A simpler, and actually correct fix for the listing address for
TIMES. The listing interface is quite frankly insane, but it probably
is better to fix it in 2.14+ and not in the maintenance branch.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| -rw-r--r-- | asm/assemble.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/asm/assemble.c b/asm/assemble.c index d88d889c..a7a5f468 100644 --- a/asm/assemble.c +++ b/asm/assemble.c @@ -563,6 +563,7 @@ int64_t assemble(int32_t segment, int64_t start, int bits, insn *instruction) if (wsize) { extop *e; int32_t t = instruction->times; + if (t < 0) nasm_panic(0, "instruction->times < 0 (%"PRId32") in assemble()", t); @@ -597,7 +598,7 @@ int64_t assemble(int32_t segment, int64_t start, int bits, insn *instruction) } } if (t > 0 && t == instruction->times - 1) { - lfmt->set_offset(data.offset); + lfmt->set_offset(start); lfmt->uplevel(LIST_TIMES); } } @@ -700,7 +701,7 @@ int64_t assemble(int32_t segment, int64_t start, int bits, insn *instruction) end_incbin: lfmt->downlevel(LIST_INCBIN); if (instruction->times > 1) { - lfmt->set_offset(data.offset); + lfmt->set_offset(start); lfmt->uplevel(LIST_TIMES); lfmt->downlevel(LIST_TIMES); } @@ -744,7 +745,7 @@ int64_t assemble(int32_t segment, int64_t start, int bits, insn *instruction) nasm_assert(data.insoffs == insn_size); if (itimes > 0 && itimes == instruction->times - 1) { - lfmt->set_offset(data.offset); + lfmt->set_offset(start); lfmt->uplevel(LIST_TIMES); } } |