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* intel: Add few Ice Lake brand stringsAnuj Phogat2019-09-101-8/+8
| | | | | Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
* intel: update product names for WHLLionel Landwerlin2019-09-101-5/+5
| | | | | | | | | Documentation list all of those as "UHD". Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111629 BSpec: 33266 Acked-by: Tapani Pälli <tapani.palli@intel.com>
* headers: Add GL_MESA_EGL_sync token to GLHeinrich Fink2019-09-082-0/+8
| | | | | Reviewed-by: Daniel Stone <daniels@collabora.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* include: sync GL headers with registryHeinrich Fink2019-09-053-14/+113
| | | | | | | | | | | | | | | | | | | | | | | | | | | Integrating headers from upstream registry [0] master branch. Effective GL registry commit integrated: 9d534f9312e56c72df763207e449c6719576fd54 Keeping the following quirks local to Mesa: - glext.h: BUILDING_MESA guard (see !1492) - glxext.h: glXQueryGLXPbufferSGIX: 'int' return type (Mesa) vs while 'void' (GL registry) - glxext.h: GLX_RENDERER_ID_MESA is still expected by some mesa tests, even though its token has been removed from the spec (see docs/specs/MESA_query_renderer.spec) - glxext.h: glXGetTransparentIndexSUN / PFNGLXGETTRANSPARENTINDEXSUNPROC argument pTransparentIndex has type 'unsigned long *' (Mesa) vs. 'long *' (GL registry) [0] https://github.com/KhronosGroup/OpenGL-Registry Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Matt Turner <mattst88@gmail.com>
* pci_id_driver_map: Support preferring iris over i965Jordan Justen2019-08-281-1/+17
| | | | | | | | | | | | This adds the ability for intel devices that: * Only load on i965 * Only load on iris * First attempt i965, and try iris next * First attempt iris, and try i965 next Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* radeonsi/gfx10: finish up Navi14, add PCI IDMarek Olšák2019-08-271-0/+2
| | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
* glx: Sync <GL/glxext.h> with KhronosAdam Jackson2019-08-221-8/+15
| | | | | | | | Minor fixups required to keep the prototypes matching and to remove mention of retired enums. Acked-by: Eric Engestrom <eric.engestrom@intel.com> Reviewed-by: Eric Anholt <eric@anholt.net>
* gbm: Add buffer handling and visuals for fp16 formatsKevin Strasser2019-08-211-0/+1
| | | | | | | | | | Define and set a new loader cap DRI_LOADER_CAP_FP16, indicating that gbm can handle fp16 formats. Signed-off-by: Kevin Strasser <kevin.strasser@intel.com> Reviewed-by: Adam Jackson <ajax@redhat.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
* dri: Add fp16 formatsKevin Strasser2019-08-211-0/+4
| | | | | | | | | | | Add dri formats for RGBA ordered 64 bpp IEEE 754 half precision floating point. Leverage existing offscreen render support for MESA_FORMAT_RGBA_FLOAT16 and MESA_FORMAT_RGBX_FLOAT16. Signed-off-by: Kevin Strasser <kevin.strasser@intel.com> Reviewed-by: Adam Jackson <ajax@redhat.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
* dri: Add config attributes for color channel shiftKevin Strasser2019-08-211-1/+5
| | | | | | | | | | | | | | | The existing mask attributes can only support up to 32 bpp. Introduce per-channel SHIFT attributes that indicate how many bits, from lsb towards msb, the bit field is offset. A shift of -1 will indicate that there is no bit field set for the channel. As old loaders will still be looking for masks, we set the masks to 0 for any formats wider than 32 bpp. Signed-off-by: Kevin Strasser <kevin.strasser@intel.com> Reviewed-by: Adam Jackson <ajax@redhat.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
* drm-uapi: Update headers for fp16 formatsKevin Strasser2019-08-211-0/+11
| | | | | | | | | From drm-next commit 88ab9c76d191ad8645b483f31e2b394b0f3e280e Signed-off-by: Kevin Strasser <kevin.strasser@intel.com> Reviewed-by: Adam Jackson <ajax@redhat.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
* panfrost: Sync UAPI header from kernelRob Herring2019-08-191-0/+61
| | | | | | | | | Sync the panfrost_drm.h UAPI header with the latest from the kernel. This adds madvise ioctl and GPU feature params. Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: Rob Herring <robh@kernel.org>
* radeonsi: add support for RenoirMarek Olšák2019-08-141-0/+2
| | | | Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
* EGL: sync headers with KhronosEric Engestrom2019-08-144-19/+124
| | | | Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
* dri_interface: add DRI2_BufferDamage interfaceDaniel Stone2019-08-131-0/+43
| | | | | | | | | | | | | | | | | | Add a new DRI2_BufferDamage interface to support the EGL_KHR_partial_update extension, informing the driver of an overriding scissor region for a particular drawable. Based on a commit originally authored by: Harish Krupo <harish.krupo.kps@intel.com> renamed extension, retargeted at DRI drawable instead of context, rewritten description Signed-off-by: Daniel Stone <daniels@collabora.com> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Qiang Yu <yuq825@gmail.com> Tested-by: Qiang Yu <yuq825@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
* vulkan: Update the XML and headers to 1.1.119Jason Ekstrand2019-08-121-2/+146
| | | | | Reviewed-by: Eric Engestrom <eric.engestrom@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
* panfrost: Mark BOs as NOEXECTomeu Vizoso2019-08-081-0/+27
| | | | | | | | | Unless a BO has the EXECUTABLE flag, mark it as NOEXEC. v2: - Rework version detection (Alyssa). Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
* introduce c11_compat.h to provide C11 things in C99Eric Engestrom2019-08-041-0/+27
| | | | | | | | Right now, all it does is provide the new standard `static_assert()` name. Fixes: fbf7c38da35afe7f1de0 ("egl/wayland: use bitset.h for `formats` bit set") Signed-off-by: Eric Engestrom <eric.engestrom@intel.com> Tested-by: Bhushan Shah <bshah@kde.org>
* amd: add support for ArcturusMarek Olšák2019-07-291-0/+4
| | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
* vulkan: Bump headers to 1.1.117Lionel Landwerlin2019-07-291-3/+105
| | | | | Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
* include/vulkan: bump vk_android_native_bufferLionel Landwerlin2019-07-291-15/+54
| | | | | | | Taken off https://android.googlesource.com/platform/frameworks/native/+/refs/tags/android-9.0.0_r45/vulkan/include/vulkan/vk_android_native_buffer.h Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
* vulkan: Update the XML and headers to 1.1.116Jason Ekstrand2019-07-241-29/+70
| | | | Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
* vulkan: bump headers & registry to 1.1.114Lionel Landwerlin2019-07-091-1/+47
| | | | | Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
* scons: s/HAVE_NO_AUTOCONF/HAVE_SCONS/Eric Engestrom2019-07-041-4/+3
| | | | | | | | | | Back when autotools and scons were the two build systems, it kinda made sense to call scons "not autoconf", but autoconf's been gone for a while now and other build systems have been added (android.mk and meson), so the name really doesn't make any sense anymore. Signed-off-by: Eric Engestrom <eric.engestrom@intel.com> Reviewed-by: Eric Anholt <eric@anholt.net>
* vulkan: Update headers to 1.1.113Andres Gomez2019-07-042-3/+15
| | | | | | | | | Some headers were not dragged in the last update(s). Fixes: 465ec0b145c ("vulkan: Update the XML and headers to 1.1.113") Signed-off-by: Andres Gomez <agomez@igalia.com> Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Acked-by: Jason Ekstrand <jason@jlekstrand.net>
* amd: add NAVI10 PCI IDsNicolai Hähnle2019-07-031-0/+8
| | | | Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
* vulkan: Update the XML and headers to 1.1.113Jason Ekstrand2019-07-021-4/+39
| | | | Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
* include: update GL headers from the registryMarek Olšák2019-06-219-146/+691
| | | | Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
* intel/icl: Add new ICL PCI-IDsAnuj Phogat2019-06-211-0/+2
| | | | | Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
* panfrost: Adapt to constant name change in UABITomeu Vizoso2019-06-181-2/+4
| | | | | | | We hadn't updated the kernel header after the driver got into mainline. Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
* etnaviv: drm: Move uapi headerGuido Günther2019-06-051-0/+289
| | | | | Signed-off-by: Guido Günther <guido.gunther@puri.sm> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
* vulkan: Update the XML and headers to 1.1.110Jason Ekstrand2019-06-041-2/+207
| | | | Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
* ac: treat Mullins as Kabini, remove the enumMarek Olšák2019-05-271-16/+16
| | | | it's the same design
* freedreno: Restore msm_drm.h to a pristine "make headers_install" copy.Eric Anholt2019-05-141-1/+1
| | | | | | | | This diverged back in f1374805a86d ("drm-uapi: use local files, not system libdrm") to point at drm-uapi's copy, which we don't need now that we're actually in drm-uapi. Reviewed-by: Rob Clark <robdclark@gmail.com>
* freedreno: Move msm_drm.h to the same spot as other DRM uapi.Eric Anholt2019-05-141-0/+335
| | | | | | | The new location matches other drivers, and has a README about the rules for updating it. Reviewed-by: Rob Clark <robdclark@gmail.com>
* vulkan: Update the XML and headers to 1.1.108Jason Ekstrand2019-05-131-17/+94
| | | | | Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
* drm-uapi: Update i915_drm.h for I915_CONTEXT_PARAM_RECOVERABLEChris Wilson2019-05-081-0/+20
| | | | | | | | | | | | Pull i915_drm.h to include kernel commit ba4fda620a5f7db521aa9e0262cf49854c1b1d9c Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Mon Feb 18 10:58:21 2019 +0000 drm/i915: Optionally disable automatic recovery after a GPU reset for improved resilience in handling GPU hangs.
* st/nine: skip position checks in SetCursorPosition()Andre Heider2019-04-201-2/+5
| | | | | | | | | | | For HW cursors, "cursor.pos" doesn't hold the current position of the pointer, just the position of the last call to SetCursorPosition(). Skip the check against stale values and bump the d3dadapter9 drm version to expose this change of behaviour. Signed-off-by: Andre Heider <a.heider@gmail.com> Reviewed-by: Axel Davy <davyaxel0@gmail.com>
* vulkan: Update the XML and headers to 1.1.106Jason Ekstrand2019-04-154-20/+103
| | | | | Acked-by: Dave Airlie <airlied@redhat.com> Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
* drm-uapi: add lima_drm.hQiang Yu2019-04-111-0/+169
| | | | | Acked-by: Eric Anholt <eric@anholt.net> Signed-of-by: Qiang Yu <yuq825@gmail.com>
* intel: Fix the description of Coffeelake pci-id 0x3E98Jian-Hong Pan2019-04-101-1/+1
| | | | | | | | | | | | | | | | | According to Intel website [1], the description of chipset 8086:3E98 is Intel(R) UHD Graphics 630. Besides, xserver also mentions it as "Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)" in commit d3a26bbf (DRI2: Add another Coffeelake PCI ID) [2]. This patch modifies the description to sync with xserver. [1]: https://ark.intel.com/content/www/us/en/ark/products/134896/intel-core-i5-9600k-processor-9m-cache-up-to-4-60-ghz.html [2]: https://gitlab.freedesktop.org/xorg/xserver/commit/d3a26bbf618507e1ca05b2bc99a880075b77db77 Fixes: commit 44f1dcf9b3fd "i965: Add a new CFL PCI ID." Signed-off-by: Jian-Hong Pan <jian-hong@endlessm.com> Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com> Reviewed-by: Anuj Phogat anuj.phogat@gmail.com
* intel: Add support for Comet LakeAnuj Phogat2019-04-011-0/+18
| | | | | Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
* intel: Add Elkhart Lake PCI-IDsAnuj Phogat2019-03-271-0/+4
| | | | | Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
* vulkan: Update the XML and headers to 1.1.104Bas Nieuwenhuizen2019-03-1812-288/+242
| | | | | | Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Acked-by: Eric Engestrom <eric@engestrom.ch> Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
* panfrost: Adapt to uapi changesTomeu Vizoso2019-03-141-2/+2
| | | | | | | Two ioctls had wrong DRM_IO* flags. Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Reviewed-by: Rob Herring <robh@kernel.org>
* panfrost: Set bo->size[0] in the DRM backendTomeu Vizoso2019-03-131-1/+0
| | | | | | | So we can unmap it later. Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
* st/dri: allow direct UYVY importChristian Gmeiner2019-03-111-0/+1
| | | | | | | Push this format to the pipe driver unchanged. Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
* panfrost: Add backend targeting the DRM driverTomeu Vizoso2019-03-101-0/+141
| | | | | | | | | | | | | | | | | | | This backend interacts with the new DRM driver for Midgard GPUs which is currently in development. When using this backend, Panfrost has roughly on-par functionality as when using the non-DRM driver from Arm. Alyssa Rosenzweig: To do so, we implement additional routines for runtime GPU version detection and fencing. We cleanup some duplicate code interfering with the new driver. We fix a long-standing memory leak which is aggravated on the new driver. Finally, we implement BO import/export in a way compatible with the new driver. These changes are squashed to preserve bisectability given the hard-to-track ABI shifts in the nondrm module Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
* st/nine: Change a few advertised capsAxel Davy2019-03-091-0/+3
| | | | | | | | | | | | | | | | | | | Most hw on the native platform advertise these caps this way. D3DCAPS_READ_SCANLINE: We don't really have hardware support for that, but many games don't even check the flag, and expect GetRasterStatus to work, which is why we emulated it with a timer (like wine). So we may as well advertise the cap. D3DCURSORCAPS_LOWRES: I don't know what is the status of this on X11, but I don't know of any dx9 game running at height < 400 either. D3DPTEXTURECAPS_TEXREPEATNOTSCALEDBYSIZE: The cap should correspond to what the current generation of hw is doing. Signed-off-by: Axel Davy <davyaxel0@gmail.com> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
* glx/meson: use full include path for dri_interface.hEric Engestrom2019-03-081-1/+0
| | | | | | | | | | | | Everything else uses `#include "GL/internal/dri_interface.h"` instead, and this full path was even already used in other parts of GLX. While at it, nothing uses `inc_gl_internal` anymore so let's remove it as well. Signed-off-by: Eric Engestrom <eric.engestrom@intel.com> Reviewed-by: Dylan Baker <dylan@pnwbakers.com> Tested-by: Clayton Craft <clayton.a.craft@intel.com>
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