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* docs: add release notes for 19.1.3mesa-19.1.3Juan A. Suarez Romero2019-07-231-0/+191
| | | | Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
* Update version to 19.1.3Juan A. Suarez Romero2019-07-231-1/+1
| | | | Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
* radv: fix crash in shader tracing.Dave Airlie2019-07-193-3/+8
| | | | | | | | | | | | Enabling tracing, and then having a vmfault, can leads to a segfault before we print out the traces, as if a meta shader is executing and we don't have the NIR for it. Just pass the stage and give back a default. Fixes: 9b9ccee4d64 ("radv: take LDS into account for compute shader occupancy stats") Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> (cherry picked from commit 2ac2b987801c60e5e141354ee1759b63ca85bf4c)
* radv: fix VGT_GS_MODE if VS uses the primitive IDSamuel Pitoiset2019-07-191-2/+5
| | | | | | | | | | | | | | Found by inspection. Cc: <mesa-stable@lists.freedesktop.org> Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> (cherry picked from commit 63d670e350e5249ed91b4bebc59bd7920629eb6c) [Juan A. Suarez: resolve trivial conflicts] Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com> Conflicts: src/amd/vulkan/radv_pipeline.c
* anv: fix alphaToCoverage when there is no color attachmentSamuel Iglesias Gonsálvez2019-07-181-10/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are tests in CTS for alpha to coverage without a color attachment that are failing. This happens because we remove the shader color outputs when we don't have a valid color attachment for them, but when alpha to coverage is enabled we still want to preserve the the output at location 0 since we need the alpha component. In that case we will also need to create a null render target for RT 0. v2: - We already create a null rt when we don't have any, so reuse that for this case (Jason) - Simplify the code a bit (Iago) v3: - Take alpha to coverage from the key and don't tie this to depth-only rendering only, we want the same behavior if we have multiple render targets but the one at location 0 is not used. (Jason). - Rewrite commit message (Iago) v4: - Make sure we take into account the array length of the shader outputs, which we were no handling correctly either and make sure we also create null render targets for any invalid array entries too. v5: - Simplify removal of unused outputs by using rt_used[] so we don't have to special case alpha to coverage there too. Fixes the following CTS tests: dEQP-VK.pipeline.multisample.alpha_to_coverage_no_color_attachment.* Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com> Signed-off-by: Iago Toral Quiroga <itoral@igalia.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit bc66cebc0df0a7858264c7a6da96f60cdc5c8292)
* anv: fix format mapping for depth/stencil formatsLionel Landwerlin2019-07-181-0/+3
| | | | | | | | | | | | | anv_format is supposed to have a pointer back to the associated VkFormat, we were missed this for depth/stencil formats. This doesn't fix anything afaict, but will be needed for future changes. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: 465de47bad70 ("anv: associate vulkan formats with aspects") Acked-by: Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit 3adc32df922753363d964b637196157587d57565)
* virgl: Set meta data for textures from handle.Lepton Wu2019-07-181-0/+1
| | | | | | | | | | | The set of meta data was removed by commit 8083464. It broke lots of dEQP tests when running with pbuffer surface type. Fixes: 80834640137 ("virgl: remove dead code") Signed-off-by: Lepton Wu <lepton@chromium.org> Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Reviewed-by: Chia-I Wu <olvaffe@gmail.com> (cherry picked from commit 6109df58e4abe18a0db589c3cebf21cbf0211197)
* radv: Only save the descriptor set if we have one.Bas Nieuwenhuizen2019-07-181-1/+1
| | | | | | | | | After reset, if valid does not contain the relevant bit the descriptor can be != NULL but still not be valid. CC: <mesa-stable@lists.freedesktop.org> Reviewed-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit f1a89673448227dc22651b0b2d9fc05cbf5d928e)
* anv: report timestampComputeAndGraphics trueLionel Landwerlin2019-07-181-1/+1
| | | | | | | | | | | | | | | | | | | Spec says : "timestampComputeAndGraphics specifies support for timestamps on all graphics and compute queues. If this limit is set to VK_TRUE, all queues that advertise the VK_QUEUE_GRAPHICS_BIT or VK_QUEUE_COMPUTE_BIT in the VkQueueFamilyProperties::queueFlags support VkQueueFamilyProperties::timestampValidBits of at least 36." On gen7+ this should be true (we only have 32bits of timestamp on gen6 and below). Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: 802f00219addb3 ("anv/device: Update features and limits") Reported-by: Timothy Strelchun <timothy.strelchun@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit ce4c5474af6b82b03070577e753cc16ba84deef9)
* vulkan/wsi: update swapchain status on vkQueuePresentLionel Landwerlin2019-07-181-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | With the following chain of events : vkQueuePresent() <- Surface resize vkQueuePresent() We should be able to report SUBOPTIMAL or OUT_OF_DATE on the second vkQueuePresent() call. Currently we only look at X11 events in the vkAcquireNextImage() path so we're not able to report this. This change checks the queue of events and process any available ones to update the swapchain status. v2: Be consistent about reporting the current error state of the swapchain (Jason) Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111097 Cc: <mesa-stable@lists.freedesktop.org> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit 6f880f128f9862a047a5ba543c2843e14517b1e6)
* nir/loop_analyze: Properly handle swizzles in loop conditionsJason Ekstrand2019-07-181-140/+149
| | | | | | | | | | | | | | | | | | | | | | | | | | | This commit re-plumbs all of nir_loop_analyze to use nir_ssa_scalar for all intermediate values so that we can properly handle swizzles. Even though if conditions are required to be scalars, they may still consume swizzles so you could have ((a.yzw < b.zzx).xz && c.xx).y == 0 as your loop termination condition. The old code would just bail the moment it saw its first non-zero swizzle but we can now properly chase the scalar from the if condition to all the way to a, b, and c. Shader-db results on Kaby Lake: total loops in shared programs: 4388 -> 4364 (-0.55%) loops in affected programs: 29 -> 5 (-82.76%) helped: 29 HURT: 5 Shader-db results on Haswell: total loops in shared programs: 4370 -> 4373 (0.07%) loops in affected programs: 2 -> 5 (150.00%) helped: 2 HURT: 5 Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com> (cherry picked from commit ff972c7a3a7e80a426b72f285902d35f6ca3b820)
* nir: Add some helpers for chasing SSA values properlyJason Ekstrand2019-07-181-0/+79
| | | | | | | | | | | | | | | | There are various cases in which we want to chase SSA values through ALU ops ranging from hand-written optimizations to back-end translation code. In all these cases, it can be very tricky to do properly because of swizzles. This set of helpers lets you easily work with a single component of an SSA def and chase through ALU ops safely. Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com> (cherry picked from commit 8f7405ed9d473c1729d48c5add4f0d9fe147c75a) [Juan A. Suarez: resolve trivial conflicts] Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com> Conflicts: src/compiler/nir/nir.h
* nir/loop_analyze: Refactor detection of limit varsJason Ekstrand2019-07-181-54/+51
| | | | | | | | | | This commit reworks both get_induction_and_limit_vars() and try_find_trip_count_vars_in_iand to return true on success and not modify their output parameters on failure. This makes their callers significantly simpler. Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com> (cherry picked from commit 0333649e638a38258957fd8b7e0367d73bbc7a80)
* softpipe: Remove unused static functionGert Wollny2019-07-171-9/+0
| | | | | | | | | | | | Thanks to Eric Engestrom for pointing out that there was something wrong with that function. Fixes: 724a73509e1bc1ce3abf9500e457bb2911b642db softpipe: Prepare handling explicit gradients Signed-off-by: Gert Wollny <gert.wollny@collabora.com> Reviewed-by: Eric Anholt <eric@anholt.net> (cherry picked from commit 9c611fb38119d308c73dc777a1d7d1336b22fab5)
* nir/regs_to_ssa: Handle regs in phi sources properlyJason Ekstrand2019-07-171-2/+32
| | | | | | | | | | | | | | Sources of phi instructions act as if they occur at the very end of the predecessor block not the block in which the phi lives. In order to handle them correctly, we have to skip phi sources on the normal instruction walk and handle them as a separate walk over the successor phis. While registers in phi instructions is a bit of an oddity it can happen when we temporarily go out-of-SSA for control-flow manipulations. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111075 Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> (cherry picked from commit 6fb685fe4b762c8030f86895707516e2481e9ece)
* meta: leaking of BO with DrawPixelsYevhenii Kolesnikov2019-07-171-0/+2
| | | | | | | | | | | ctx->Unpack.BufferObj wasn't unreferenced. Fixes: d492e7b0171 (meta: Fix invalid PBO access from DrawPixels when trying to just alloc.) CC: Eric Anholt <eric@anholt.net> Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com> Reviewed-by: Eric Anholt <eric@anholt.net> (cherry picked from commit 3853871ef80d3dcd357b72056f2ce709706ac11c)
* anv: Account for dynamic stencil write disables in the PMA fixJason Ekstrand2019-07-171-0/+2
| | | | | | | | | | | | In 6ce8592836b8 we started looking at the dynamic stencil state and disabling stencil writes when the stencil mask is zero. Unfortunately, we never updated the PMA fix code accordingly so 3DSTATE_WM_DEPTH_STENCIL and the PMA fix were getting out-of-sync causing hangs. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109203 Fixes: 6ce8592836 "anv: Disable stencil writes when both write..." Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (cherry picked from commit 6a441151c245d7b59b84502257a0ff1a300b8633)
* meta: memory leak of CopyPixels usageSergii Romantsov2019-07-171-0/+14
| | | | | | | | | | Meta of CopyPixel generates a buffer object but does not free it on cleanup. Fixes: 37d11b13ce1d (meta: Don't pollute the buffer object namespace in _mesa_meta_setup_vertex_objects) Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> (cherry picked from commit 7417b432113cd5b542f5bb4efd6c2b6120157576)
* spirv: Fix stride calculation when lowering Workgroup to offsetsCaio Marcelo de Oliveira Filho2019-07-161-1/+1
| | | | | | | | | | | | | Use alignment to calculate the stride associated with the pointer types. That stride is used when the pointers are casted to arrays. Note that size alone is not sufficient, e.g. struct { vec2 a; vec1 b; } will have element an element size of 12 bytes, but the stride needs to be 16 bytes to respect the 8 byte alignment. Fixes: 050eb6389a8 "spirv: Ignore ArrayStride in OpPtrAccessChain for Workgroup" Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit 026cfa10995ff3316476fa19507fa27adc531de5)
* nir,intel: Add support for lowering 64-bit nir_opt_extract_*Jason Ekstrand2019-07-163-1/+41
| | | | | | | | | | We need this when doing full software 64-bit emulation. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110309 Fixes: cbad201c2b3 "nir/algebraic: Add missing 64-bit extract_[iu]8..." Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> (cherry picked from commit 0ba508d7a3b6a006b5b8db1e865d33efc8d0abd5)
* nir/opt_if: Clean up single-src phis in opt_if_loop_terminatorJason Ekstrand2019-07-163-0/+16
| | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111071 Fixes: 2a74296f24ba "nir: add opt_if_loop_terminator()" Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com> (cherry picked from commit 7a19e05e8c84152af3a15868f5ef781142ac8e23)
* anv: Add android dependencies on android.Bas Nieuwenhuizen2019-07-161-0/+1
| | | | | | | | | | | | | Specifically needed for nativewindow for some VK_EXT_external_memory_android_hardware_buffers functions, where we call into some AHardwareBuffer functions. The legacy Android ext did not have us call into any Android function at all and hence it was not noticed. Fixes: 755c633b8d9 "anv: Fix vulkan build in meson." Reviewed-by: Eric Engestrom <eric.engestrom@intel.com> Reviewed-by: Chad Versace <chadversary@chromium.org> (cherry picked from commit d4f0f1a6e21953a9bedc91f1de4366afdc51bb58)
* anv: fix crash in vkCmdClearAttachments with unused attachmentLionel Landwerlin2019-07-161-3/+3
| | | | | | | | | | | | | | anv_render_pass_compile() turns an unused attachment into a NULL depth_stencil_attachment pointer so check that pointer before accessing it. Found with updates to existing CTS tests. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: 208be8eafa30be ("anv: Make subpass::depth_stencil_attachment a pointer") Reviewed-by: Eric Engestrom <eric@engestrom.ch> Reviewed-by: Juan A. Suarez <jasuarez@igalia.com> (cherry picked from commit c9c8c2f7d7d83443928717a00c3be8f1f690e6c3)
* meson: Add dep_thread dependency.Vinson Lee2019-07-151-0/+1
| | | | | | | | | | | | | Fix this build error on Ubuntu 18.04. /usr/bin/ld: src/util/libmesa_util.a(u_cpu_detect.c.o): undefined reference to symbol 'pthread_once@@GLIBC_2.2.5' Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110663 Suggested-by: Eric Engestrom <eric@@engestrom.ch> Signed-off-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Eric Anholt <eric@anholt.net> Acked-by: Eric Engestrom <eric@engestrom.ch> (cherry picked from commit 730ceeddb557cec08a502e82b7faeb689bc91d2a)
* freedreno: Fix assertion failures in context setup in shader-db mode.Eric Anholt2019-07-154-0/+4
| | | | | | | | | | | Cherry-picks a0d4d7febff56ec7f4a4396f7b893319958f97d3 upstream The TTN path needs access to the screen to make the right decisions about lowering, but we didn't have pctx->screen set up at fdN_prog_init time. Reviewed-by: Rob Clark <robdclark@gmail.com> Tested-by: Eduardo Lima Mitev <elima@igalia.com> Signed-off-by: John Stultz <john.stultz@linaro.org>
* anv: Fix pool allocator when first alloc needs to growCaio Marcelo de Oliveira Filho2019-07-153-3/+71
| | | | | | | | | | | | | | | | | | | When using softpin, the first allocation was not calculating the padding and offset correctly for the case the first allocation needed to grow. We were missing initialize the state.end right after expanding the pool for the first time. This is not a problem for non-softpin since there we don't use leftover padding so the ends would re-arrange incrementally. This fixes running dEQP-VK.ssbo.phys.layout.random.16bit.scalar.13 in SKL -- the test uses a shader larger than the initial size for the instruction pool. Fixes: dfc9ab2ccd9 "anv/allocator: Add padding information." Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit 09c4037ddada76ad07cca2fd6b46f5451fa55f1b)
* mesa: save/restore SSO flag when using ARB_get_program_binaryTimothy Arceri2019-07-151-0/+4
| | | | | | | | | | | Without this the restored program will fail the pipeline validation checks when we attempt to use an SSO program. Fixes: c20fd744fef1 ("mesa: Add Mesa ARB_get_program_binary helper functions") Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111010 (cherry picked from commit 3043908ccb9c7030add1f34f9a947a787949a399)
* anv: Set Stateless Data Port Access MOCSJason Ekstrand2019-07-151-0/+2
| | | | | | | | | | | This is the MOCS setting used for the A64 stateless messages which we sometimes use for SSBO operations. Fixes: 48ed2a7bb009 "anv: Implement VK_EXT_buffer_device_address" Fixes: 79fb0d27f3ab "anv: Implement SSBOs bindings with GPU addr..." Reviewed-by: Chad Versace <chadversary@chromium.org> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (cherry picked from commit 6a2ff217b8a7f126771ce73783be4e2fa4eac5c2)
* nir/loop_analyze: Bail if we encounter swizzlesJason Ekstrand2019-07-151-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | None of the current code knows what to do with swizzles. Take the safe option for now and bail if we see one. This does have a small shader-db impact but it is at least safe. Shader-db results on Kaby Lake: total loops in shared programs: 4364 -> 4388 (0.55%) loops in affected programs: 5 -> 29 (480.00%) helped: 5 HURT: 29 Shader-db results on Haswell: total loops in shared programs: 4373 -> 4370 (-0.07%) loops in affected programs: 5 -> 2 (-60.00%) helped: 5 HURT: 2 Fixes: 6772a17acc8ee "nir: Add a loop analysis pass" Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com> (cherry picked from commit 9a3cb6f5fec040dea4a229b93f789995b36f9c09)
* nir/loop_analyze: Handle bit sizes correctly in calculate_iterationsJason Ekstrand2019-07-151-27/+48
| | | | | | | | | | | The current code assumes everything is 32-bit which is very likely true but not guaranteed by any means. Instead, use nir_eval_const_opcode to do the calculations in a bit-size-agnostic way. We also use the new constant constructors to build the correct size constants. Fixes: 6772a17acc8ee "nir: Add a loop analysis pass" Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com> (cherry picked from commit 268ad47c1115be8a8444d8e0e40af71623f9d281)
* nir: Add more helpers for working with const valuesJason Ekstrand2019-07-152-0/+135
| | | | | Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com> (cherry picked from commit ce5581e23e54be91e4c1ad6a6c5990eca6677ceb)
* nir/loop_analyze: Fix phi-of-identical-alu detectionJason Ekstrand2019-07-151-26/+29
| | | | | | | | | | | | | | One issue was that the original version didn't check that swizzles matched when comparing ALU instructions so it could end up matching very different instructions. Using the nir_instrs_equal function from nir_instr_set.c which we use for CSE should be much more reliable. Another was that the loop assumes it will only run two iterations which may not be true. If there's something which guarantees that this case only happens for phis after ifs, it wasn't documented. Fixes: 9e6b39e1d521 "nir: detect more induction variables" Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com> (cherry picked from commit 9f7ffe41dd185487479ea8846df1f5cdbf1b83a6)
* nir/instr_set: Expose nir_instrs_equal()Jason Ekstrand2019-07-152-59/+62
| | | | | Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com> (cherry picked from commit 6e984bcb92cf5e8b7da7387bc73cf6519ea2f43d)
* nir: Add a helper to determine if an intrinsic can be reorderedConnor Abbott2019-07-153-11/+13
| | | | | | | | This is simple now, but we're going to be adding a few more conditions to this later. Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com> (cherry picked from commit a1c737927c0d96f26ce487930aa9a2ed323814c9)
* radeonsi: don't set READ_ONLY for const_uploader to fix bindless texture hangsMarek Olšák2019-07-101-3/+1
| | | | | | | | | Bindless textures can update descriptors with WRITE_DATA. Cc: 19.1 <mesa-stable@lists.freedesktop.org> Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Acked-by: Dave Airlie airlied@redhat.com (cherry picked from commit 5058d62b05d4f619ccb4f6ea9f6d5c5c33e3b968)
* vulkan/overlay: fix crash on freeing NULL command bufferLionel Landwerlin2019-07-091-0/+4
| | | | | | | | | | | | It is legal to call vkFreeCommandBuffers() on NULL command buffers. This fix requires eb41ce1b012f24 ("util/hash_table: Properly handle the NULL key in hash_table_u64"). Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: 4438188f492e1f ("vulkan/overlay: record stats in command buffers and accumulate on exec/submit") Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> (cherry picked from commit a72351cc763c75d57aee8a85a64859657c3ec7d8)
* mesa: Set minimum possible GLSL versionIan Romanick2019-07-091-0/+11
| | | | | | | | | | | | | | | | | | | Set the absolute minimum possible GLSL version. API_OPENGL_CORE can mean an OpenGL 3.0 forward-compatible context, so that implies a minimum possible version of 1.30. Otherwise, the minimum possible version 1.20. Since Mesa unconditionally advertises GL_ARB_shading_language_100 and GL_ARB_shader_objects, every driver has GLSL 1.20... even if they don't advertise any extensions to enable any shader stages (e.g., GL_ARB_vertex_shader). Converts about 2,500 piglit tests from crash to skip on NV18. Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Emil Velikov <emil.velikov@collabora.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109524 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110955 Cc: mesa-stable@lists.freedesktop.org (cherry picked from commit 0349bc3ce2b399082593ddcf1d28782a4566bc08)
* nir: Use nir_src_bit_size instead of alu1->dest.dest.ssa.bit_sizeIan Romanick2019-07-092-1/+218
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is important because, for example nir_op_fne has dest.dest.ssa.bit_size == 1, but the source operands can be 16-, 32-, or 64-bits. Fixing this helps partial redundancy elimination for compares in a few more shaders. v2: Add unit tests for nir_opt_comparison_pre that are fixed by this commit. All Intel platforms had similar results. total instructions in shared programs: 17179408 -> 17179081 (<.01%) instructions in affected programs: 43958 -> 43631 (-0.74%) helped: 118 HURT: 2 helped stats (abs) min: 1 max: 5 x̄: 2.87 x̃: 2 helped stats (rel) min: 0.06% max: 4.12% x̄: 1.19% x̃: 0.81% HURT stats (abs) min: 6 max: 6 x̄: 6.00 x̃: 6 HURT stats (rel) min: 5.83% max: 6.06% x̄: 5.94% x̃: 5.94% 95% mean confidence interval for instructions value: -3.08 -2.37 95% mean confidence interval for instructions %-change: -1.30% -0.85% Instructions are helped. total cycles in shared programs: 360959066 -> 360942386 (<.01%) cycles in affected programs: 774274 -> 757594 (-2.15%) helped: 111 HURT: 4 helped stats (abs) min: 1 max: 1591 x̄: 169.49 x̃: 36 helped stats (rel) min: <.01% max: 24.43% x̄: 8.86% x̃: 2.24% HURT stats (abs) min: 1 max: 2068 x̄: 533.25 x̃: 32 HURT stats (rel) min: 0.02% max: 5.10% x̄: 3.06% x̃: 3.56% 95% mean confidence interval for cycles value: -200.61 -89.47 95% mean confidence interval for cycles %-change: -10.32% -6.58% Cycles are helped. Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> [v1] Suggested-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Matt Turner <mattst88@gmail.com> Fixes: be1cc3552bc ("nir: Add nir_const_value_negative_equal") (cherry picked from commit 0ac5ff9ecb26ebc07a48e4f15539f975cef9b82a)
* nir: Add unit tests for nir_opt_comparison_preIan Romanick2019-07-094-1/+334
| | | | | | | | | | Each tests has a comment with the expected before and after NIR. The tests don't actually check this. The tests only check whether or not the optimization pass reported progress. I couldn't think of a robust, future-proof way to check the before and after code. Reviewed-by: Matt Turner <mattst88@gmail.com> (cherry picked from commit b08d7040518cdf76792952ceef72cadaa54d0179)
* intel/vec4: Reswizzle VF immediates tooIan Romanick2019-07-091-1/+23
| | | | | | | | | | | | | | | | | | Previously, an instruction like mul(8) vgrf29.xy:F, vgrf25.yxxx:F, [-1F, 1F, 0F, 0F] would get rewritten as mul(8) vgrf0.yz:F, vgrf25.yyxx:F, [-1F, 1F, 0F, 0F] The latter does not produce the correct result. The VF immediate in the second should be either [-1F, -1F, 1F, 1F] or [0F, -1F, 1F, 0F]. This commit produces the former. Fixes: 1ee1d8ab468 ("i965/vec4: Reswizzle sources when necessary.") Reviewed-by: Matt Turner <mattst88@gmail.com> (cherry picked from commit 47c2aa5b481389bfc68d688f02aa1fd4f095713a)
* anv: fix VkExternalBufferProperties for host allocationChia-I Wu2019-07-091-0/+10
| | | | | | | | | | It was reported as unsupported previously. It should be importable and is compatible with itself. Signed-off-by: Chia-I Wu <olvaffe@gmail.com> Fixes: 69cc6272fbc199 ("anv: Implement VK_EXT_external_memory_host") Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (cherry picked from commit 5824130389f2333ec44b48814b3e5e84ac297006)
* anv: fix VkExternalBufferProperties for unsupported handlesChia-I Wu2019-07-091-1/+7
| | | | | | | | | compatibleHandleTypes must include the queried handle type. Signed-off-by: Chia-I Wu <olvaffe@gmail.com> Cc: <mesa-stable@lists.freedesktop.org> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (cherry picked from commit f3c7a02a62fdb8941c2201939efcd1caf13456cb)
* radv: Handle cmask being disallowed by addrlib.Bas Nieuwenhuizen2019-07-091-0/+5
| | | | | | | | alignment=0 does weird things with align64. CC: <mesa-stable@lists.freedesktop.org> Reviewed-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit e46b41b3aec3e3e1671b9a088291909f74953a88)
* vulkan/overlay: fix command buffer statsLionel Landwerlin2019-07-091-0/+2
| | | | | | | | | | | Begin/Reset of command buffer both reset the content of the command buffer. Don't forget to wipe them on Begin. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: 4438188f492e1f ("vulkan/overlay: record stats in command buffers and accumulate on exec/submit") Acked-by: Eric Engestrom <eric.engestrom@intel.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> (cherry picked from commit 8f0f727fe4274e222b5a8118c5cb3c7f8cad3d7c)
* docs: add sha256 checksums for 19.1.2Juan A. Suarez Romero2019-07-091-1/+1
| | | | Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
* docs: add release notes for 19.1.2mesa-19.1.2Juan A. Suarez Romero2019-07-091-0/+194
| | | | Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
* Update version to 19.1.2Juan A. Suarez Romero2019-07-091-1/+1
| | | | Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
* iris: Use a uint16_t for key sizesJason Ekstrand2019-07-051-1/+1
| | | | | | | | sizeof(struct brw_vs_prog_key) == 324. Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit 4633298fd62121a466884998cb64d7a5b5976fcd)
* radv: Fix interactions between variable descriptor count and inline uniform ↵Bas Nieuwenhuizen2019-07-041-1/+5
| | | | | | | | blocks. Fixes: d7e6541cc72 "radv: Only allocate supplied number of descriptors when variable." Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> (cherry picked from commit 8a053254b81497cb6b0708fe86986e461ee43771)
* intel: fix wrong format usageJuan A. Suarez Romero2019-07-041-1/+1
| | | | | | | | | | | | Do not use the view format when filling the surface state. Fixes dEQP-VK.image.texel_view_compatible.compute.extended.texture.* Fixes: fb1350c76f1 ("intel: Add and use helpers for level0 extent") Reviewed-by: Nanley Chery <nanley.g.chery@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (cherry picked from commit e06bc0b16671b78032e06d9ddd547bb091501129)
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