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* docs: add release notes for 17.3.1mesa-17.3.1Emil Velikov2017-12-211-0/+190
| | | | Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
* Update version to 17.3.1Emil Velikov2017-12-211-1/+1
| | | | Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
* travis: disable Meson buildJuan A. Suarez Romero2017-12-181-32/+0
| | | | | | | | Meson is not supported in Mesa 17.3. Cc: "17.3" <mesa-stable@lists.freedesktop.org> Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com> Acked-by: Emil Velikov <emil.velikov@collabora.com>
* radv: port merge tess info from anvDave Airlie2017-12-181-0/+40
| | | | | | | | | | | | | | | anv merges the tess info correctly, but radv wasn't doing this. This fixes hangs in dEQP-VK.tessellation.winding.default_domain.hlsl_triangles_ccw Fixes: 60fc0544e0 (radv/pipeline: handle tessellation shader compilation) Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit 1bdeac545f4ea9f7ca6947f5da7fcf4f5b3010dc) Conflicts: src/amd/vulkan/radv_pipeline.c
* cherry-ignore: util: add mesa-sha1 test to mesonEmil Velikov2017-12-181-0/+3
| | | | | | Meson is explicitly disabled in branch. Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
* cherry-ignore: meson: fix strtof locale support checkEmil Velikov2017-12-181-0/+2
| | | | | | Meson is explicitly disabled in branch. Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
* radv: Fix multi-layer blits.Bas Nieuwenhuizen2017-12-181-25/+24
| | | | | | | | | | We did not set the layer correctly for the dst, as we would keep using the base layer. Same for the source image. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102710 CC: <mesa-stable@lists.freedesktop.org> Reviewed-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit b42e106d4dfa61a6351b076741c5458b5677f332)
* radeonsi: don't call force_dcc_off for buffersMarek Olšák2017-12-181-1/+1
| | | | | | | | | This was undefined yet harmless behavior in LLVM. Not anymore - it causes a hang now. Cc: 17.3 <mesa-stable@lists.freedesktop.org> Tested-by: Michel Dänzer <michel.daenzer@amd.com> (cherry picked from commit 35c3cbad3c30ad3d40a6811dd6ca2286e013bfc5)
* util: scons: wire up the sha1 testEmil Velikov2017-12-151-0/+7
| | | | | | Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Reviewed-by: Andres Gomez <agomez@igalia.com> (cherry picked from commit 5d03a68640dcf216484e37c316d2d91db9994a66)
* util: Add a SHA1 unit test programMatt Turner2017-12-152-1/+67
| | | | | Reviewed-by: Emil Velikov <emil.velikov@collabora.com> (cherry picked from commit 513d7ffa23d42e96f831148fa13bf470087424c3)
* util: Assume little endian in the absence of platform-specific handlingMatt Turner2017-12-151-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (cherry picked from commit 6a353479a7577dcff7c7a31809f27b59270648fb) Squashed with: util: Use preprocessor correctly Fixes: 6a353479a757 ("util: Assume little endian in the absence of platform-specific handling") (cherry picked from commit b8cbad624b8198949d63c0211fe4925fc3bb9a7a) Squashed with: util: Just give up and define PIPE_ARCH_LITTLE_ENDIAN on MSVC MSVC doesn't support #warning?! Getting really tired of this. (cherry picked from commit 676761252b731a6bf408e4dca694c31d74a995fc) Squashed with: util: Also include endian.h on cygwin If u_endian.h can't determine the endianess, the default behaviour in sha1.c is to build for big-endian Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk> Reviewed-by: Matt Turner <mattst88@gmail.com> (cherry picked from commit 2c62ccb10a7f3a2962f51688a3ae957254c5ce9b)
* broadcom/vc4: Fix handling of GFXH-515 workaround with a start vertex count.Eric Anholt2017-12-141-16/+27
| | | | | | | | | | | | | | | We failed to take the start into account for how many vertices to draw in this round, so we would end up decrementing count below 0, which as an unsigned number meant we would loop until the CLs soon ran out of space. When I wrote the code I was thinking about how to use the previously emitted shader state (no index bias baked into the elements) by emitting up to 65535 and then only re-emitting with bias for the second wround, but that doesn't work if the start is over 65535. Instead, just delay emitting shader state until we get into the drawarrays GFXH-515 loop and always bake the bias in when we're doing the workaround. (cherry picked from commit 84ab48c15c9373dfa4709f4f9e887c329286e5a1)
* glsl: Fix gl_NormalScale.Fabian Bieler2017-12-143-2/+6
| | | | | | | | | | | | | | | | | GLSL shaders can access the normal scale factor with the built-in gl_NormalScale. Mesa's modelspace lighting optimization uses a different normal scale factor than defined in the spec. We have to take care not to use this factor for gl_NormalScale. Mesa already defines two seperate states: state.normalScale and state.internal.normalScale. The first is used by the glsl compiler while the later is used by the fixed function T&L pipeline. Previously the only difference was some component swizzling. With this commit state.normalScale always uses the normal scale factor for eyespace lighting. Reviewed-by: Brian Paul <brianp@vmware.com> (cherry picked from commit c3ee464d7aa170225b5ec23b53a7f8d07663d428)
* glsl: Match order of gl_LightSourceParameters elements.Fabian Bieler2017-12-141-2/+2
| | | | | | | | | | spotExponent and spotCosCutoff were swapped in the gl_builtin_uniform_element struct. Now the order matches across gl_builtin_uniform_element, glsl_struct_field and the spec. Reviewed-by: Brian Paul <brianp@vmware.com> (cherry picked from commit 9bdb5457f4ecabd59e05d0b6cea1ff88bcb49d7f)
* i965: Switch over to fully external-or-not MOCS schemeJason Ekstrand2017-12-143-29/+11
| | | | | Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit 4b1e70cc57d7ff5f465544644b2180dee1490cee)
* radv: Don't advertise VK_EXT_debug_report.Bas Nieuwenhuizen2017-12-141-1/+0
| | | | | | | | | | | | | We never supported it. Missed during copy and pasting. Fixes: 17201a2eb0b "radv: port to using updated anv entrypoint/extension generator." Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> (cherry picked from commit 4eb0dca46bf481258443bb76fb542613c3a260d1) [Emil Velikov: trivial conflicts] Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Conflicts: src/amd/vulkan/radv_extensions.py
* gallium/aux: include nr_samples in util_resource_size() computationBrian Paul2017-12-141-1/+2
| | | | | | | | | | | | | | This function is only used in two places: 1. VMware driver, but only for HUD reporting 2. st/nine state tracker, used for texture memory accounting Fixes: a69efa9482d ("util: add new util_resource_size() function in u_resource.[ch]") Reviewed-by: Roland Scheidegger <sroland@vmware.com> Reviewed-by: Charmaine Lee <charmainel@vmware.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> (cherry picked from commit dde8309cdea5c739983693650105b2f993c5a71c)
* util/disk_cache: Remove unneeded free() on always null stringVadym Shovkoplias2017-12-141-1/+0
| | | | | | | | | | At this point dc_job->cache_item_metadata.keys always equals NULL, so call to free() is useless Fixes: b86ecea3446 ("util/disk_cache: write cache item metadata to disk") Signed-off-by: Vadym Shovkoplias <vadym.shovkoplias@globallogic.com> Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com> (cherry picked from commit b2490a326c28652b85400da0e1bbff108167d140)
* glsl: get correct member type when processing xfb ifc arraysTimothy Arceri2017-12-141-2/+4
| | | | | | | | | | This fixes a crash in: KHR-GL45.enhanced_layouts.xfb_block_stride Fixes: 0822517936d4 "glsl: add helper to process xfb qualifiers during linking" Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit 9d53ccccb251d21f9291abaa3a28a41d06ce8c91)
* radeonsi: fix the R600_RESOURCE_FLAG_UNMAPPABLE checkNicolai Hähnle2017-12-141-1/+1
| | | | | | | | | | | | The flag is on the pipe_resource, not the r600_resource. I don't see an obvious bug related to this, but it could potentially lead to suboptimal placement of some resources. Fixes: a41587433c4d ("gallium/radeon: add R600_RESOURCE_FLAG_UNMAPPABLE") Reviewed-by: Marek Olšák <marek.olsak@amd.com> Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> (cherry picked from commit 5e2962c9492e6a948516f6360f973e2e92034b01)
* nvc0/ir: Properly lower 64-bit shifts when the shift value is >32Pierre Moreau2017-12-141-1/+1
| | | | | | | | | | | | | | | | | | | | | Fixes: 61d7676df77 "nvc0/ir: add support for 64-bit shift lowering on SM20/SM30" Fixes fs-shift-scalar-by-scalar.shader_test from piglit for the current set-up: uniform int64_t ival -0x7dfcfefbdf6536ff # bit pattern: 0x82030104209ac901 uniform uint64_t uval 0x1400000085010203 uniform int shl 36 uniform int shr 36 uniform int64_t iexpected_shl 0x09ac901000000000 uniform int64_t iexpected_shr -0x7dfcff0 # bit pattern: 0xfffffffff8203010 uniform uint64_t uexpected_shl 0x5010203000000000 uniform uint64_t uexpected_shr 0x0000000001400000 draw rect ortho 12 0 4 4 Signed-off-by: Pierre Moreau <pierre.morrow@free.fr> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> (cherry picked from commit 9bee12160bed72dae5cdb006ea38c40f89e174da)
* glx/dri3: Remove unused deviceName variableVadym Shovkoplias2017-12-141-4/+1
| | | | | | | | | | deviceName string is declared, assigned and freed but actually never used in dri3_create_screen() function. Fixes: 2d94601582e ("Add DRI3+Present loader") Signed-off-by: Vadym Shovkoplias <vadym.shovkoplias@globallogic.com> Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com> (cherry picked from commit d5559292394f0e9b1c682baca05f81366fb389af)
* compiler: use NDEBUG to guard assertsEric Engestrom2017-12-143-5/+5
| | | | | | | | | | | | | | | nir_validate.c's #endif already had the correct NDEBUG comment Fixes: dcb1acdea00a8f2c29777 "nir/validate: Only build in debug mode" Fixes: 9ff71b649b4b3808a9e17 "i965/nir: Validate that NIR passes call nir_metadata_preserve()" Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com> Reviewed-by: Matt Turner <mattst88@gmail.com> (cherry picked from commit 7b85b9b8773b119360a31b66b321ae560a77cb6d) [Emil Velikov: trivial conflicts] Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Conflicts: src/compiler/nir/nir.h
* swr: Fix KNOB_MAX_WORKER_THREADS thread creation override.Bruce Cherniak2017-12-141-2/+1
| | | | | | | | | | | | | | Environment variable KNOB_MAX_WORKER_THREADS allows the user to override default thread creation and thread binding. Previous commit to adjust linux cpu topology caused setting this KNOB to bind all threads to a single core. This patch restores correct functionality of override. Cc: <mesa-stable@lists.freedesktop.org> Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com> (cherry picked from commit 709f5bdc4a2bf31f422f5cf60797224c0463c10a)
* xlib: call _mesa_warning() instead of fprintf()Brian Paul2017-12-141-1/+2
| | | | | | | | | We use _mesa_warning() everywhere else in this code. Change requested by Rick Irons of Mathworks. CC: <mesa-stable@lists.freedesktop.org> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> (cherry picked from commit 7a46063803c51e74e635a7d6e056b6442b8f2c5a)
* winsys/amdgpu: disable local BOs again due to worse performanceMarek Olšák2017-12-141-2/+3
| | | | | | Cc: 17.3 <mesa-stable@lists.freedesktop.org> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit bf0904e31fb7d9cd8932d582076c8d7beb02ba89)
* spirv: Fix loading an entire block at once.Bas Nieuwenhuizen2017-12-141-28/+30
| | | | | | | | | | | | | | | There is no chain, so checking the length ends with a SEGFAULT. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103579 Cc: <mesa-stable@lists.freedesktop.org> Reviewed-by: Emil Velikov <emil.velikov@collabora.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit b926da241a4221376afe195c476f6a05621e5c75) [Emil Velikov: trivial conflicts] Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Conflicts: src/compiler/spirv/vtn_variables.c
* radeon/vce: move destroy command before feedback commandLeo Liu2017-12-141-1/+1
| | | | | | | | | | | | | | | VCE processing IBs starts from session and task info at first level, other commands processed subsequently. The task info for destroy is embedded to destroy command, resulting that feedback command is not properly procoessed. This is causing kernel spin VM fault messages on Polaris and Vega10 card when running ends at encode application. The fix is also verified on VCE physical mode card. Signed-off-by: Leo Liu <leo.liu@amd.com> Cc: mesa-stable@lists.freedesktop.org Acked-by: Christian König <christian.koenig@amd.com> (cherry picked from commit 6d74cb2570eb919c72e519e590d2464757465902)
* docs/llvmpipe: document ppc64le as alternative architecture to x86.Ben Crocker2017-12-141-3/+9
| | | | | | | | | | | | | Power8, Power8NV, and Power9 are supported on an equal footing with X86. Cc: "17.2" "17.3" <mesa-stable@lists.freedesktop.org> Signed-off-by: Ben Crocker <bcrocker@redhat.com> Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com> [Eric: changed formatting, reworded a bit (with Ben's ack)] Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com> (cherry picked from commit 060eb314eb4e551cf870ad6a6e7e1363d4228efe)
* nir/opcodes: Fix constant-folding of bitfield_insertJames Legg2017-12-141-2/+2
| | | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104119 CC: <mesa-stable@lists.freedesktop.org> CC: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Matt Turner <mattst88@gmail.com> (cherry picked from commit 947470d10ba5ab11a75f0e19e124b189ff3fd8b2)
* radv: Add LLVM version to the device name stringAlex Smith2017-12-142-26/+37
| | | | | | | | | | | Allows apps to determine the LLVM version so that they can decide whether or not to enable workarounds for LLVM issues. Signed-off-by: Alex Smith <asmith@feralinteractive.com> Cc: "17.2 17.3" <mesa-stable@lists.freedesktop.org> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> (cherry picked from commit 8fda98c4f1dba2488b9e3ef3e820585f48a8a2f9)
* meta: Fix ClearTexture with GL_DEPTH_COMPONENT.Kenneth Graunke2017-12-141-9/+14
| | | | | | | | | | | | | | We only handled unpacking for GL_DEPTH_STENCIL formats. Cemu was hitting _mesa_problem() for an unsupported format in _mesa_unpack_float_32_uint_24_8_depth_stencil_row(), because the format was depth-only, rather than depth-stencil. Cc: "13.0 12.0" <mesa-stable@lists.freedesktop.org> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94739 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103966 Reviewed-by: Tapani Pälli <tapani.palli@intel.com> (cherry picked from commit 8705ed13e3114ad994dbd46387576749f54fc7eb)
* meta: Initialize depth/clear values on declaration.Kenneth Graunke2017-12-141-5/+2
| | | | | | | | This helps avoid compiler warningss in the next commit - everything was initialized, but it wasn't obvious to static analysis. Suggested-by: Tapani Pälli <tapani.palli@intel.com> (cherry picked from commit d6d16c02180929278dc49d3c9bdceece0aab189e)
* r600/sb: do not convert if-blocks that contain indirect array accessGert Wollny2017-12-143-2/+5
| | | | | | | | | | | | | | | | | | | | | If an array is accessed within an if block, then currently it is not known whether the value in the address register is involved in the evaluation of the if condition, and converting the if condition may actually result in out-of-bounds array access. Consequently, if blocks that contain indirect array access should not be converted. Fixes piglits on r600/BARTS: spec/glsl-1.10/execution/variable-indexing/ vs-output-array-float-index-wr vs-output-array-vec3-index-wr vs-output-array-vec4-index-wr Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104143 Signed-off-by: Gert Wollny <gw.fossdev@gmail.com> Cc: <mesa-stable@lists.freedesktop.org> Signed-off-by: Dave Airlie <airlied@redhat.com> (cherry picked from commit 6c268ea79af80a65a89a23854bdbe8bc1e99ab23)
* radeonsi: allow DMABUF exports for local buffersMarek Olšák2017-12-141-1/+4
| | | | | | | | | | | | Cc: 17.3 <mesa-stable@lists.freedesktop.org> Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit 010214b403de1b5e25a549372ba6192b89e05d06) [Emil Velikov: s/sscreen/rscreen/] Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Conflicts: src/gallium/drivers/radeon/r600_texture.c
* radeonsi: flush the context after resource_copy_region for buffer exportsMarek Olšák2017-12-141-2/+12
| | | | | | Cc: 17.2 17.3 <mesa-stable@lists.freedesktop.org> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit 5e805cc74bc52f97de8f6308fc06bc96623e7e09)
* docs: add sha256 checksums for 17.3.0Emil Velikov2017-12-081-1/+2
| | | | Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
* docs: Update 17.3.0 release notesmesa-17.3.0Emil Velikov2017-12-081-5/+178
| | | | Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
* Update version to 17.3.0(final)Emil Velikov2017-12-081-1/+1
| | | | Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
* Update version to 17.3.0-rc6mesa-17.3.0-rc6Emil Velikov2017-12-041-1/+1
| | | | Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
* i965: Disable regular fast-clears (CCS_D) on gen9+Jason Ekstrand2017-12-012-25/+43
| | | | | | | | | | | | | | This partially reverts commit 3e57e9494c2279580ad6a83ab8c065d01e7e634e which caused a bunch of GPU hangs on several Source titles. To date, we have no clue why these hangs are actually happening. This undoes the final effect of 3e57e9494c227 and gets us back to not hanging. Tested with Team Fortress 2. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102435 Fixes: 3e57e9494c2279580ad6a83ab8c065d01e7e634e Cc: mesa-stable@lists.freedesktop.org (cherry picked from commit ee57b15ec764736e2d5360beaef9fb2045ed0f68)
* anv: Check if memfd_create is already defined.Vinson Lee2017-12-013-0/+5
| | | | | | | | | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103909 Signed-off-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com> (cherry picked from commit 8c1e4b1afc8d396ccf99c725c59b29a9aa305557) [Emil Velikov: drop NA hunks] Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Conflicts: configure.ac meson.build src/intel/vulkan/anv_allocator.c
* intel/blorp: Fix possible NULL pointer dereferencingVadym Shovkoplias2017-12-011-2/+2
| | | | | | | | | | | | | | Fix incomplete check of input params in blorp_surf_convert_to_uncompressed() which can lead to NULL pointer dereferencing. Fixes: 5ae8043fed2 ("intel/blorp: Add an entrypoint for doing bit-for-bit copies") Fixes: f395d0abc83 ("intel/blorp: Internally expose surf_convert_to_uncompressed") Reviewed-by: Emil Velikov <emli.velikov@collabora.com> Reviewed-by: Andres Gomez <agomez@igalia.com> (cherry picked from commit cdb3eb7174f84f3200408c4b43c819fb093da9c6)
* i965: Reorganize batch/state BO fields into a 'brw_growing_bo' struct.Kenneth Graunke2017-12-018-96/+102
| | | | | | | | | | | | | | | | | | | We're about to add more of them, and need to pass the whole lot of them around together when growing them. Putting them in a struct makes this much easier. brw->batch.batch.bo is a bit of a mouthful, but it's nice to have things labeled 'batch' and 'state' now that we have multiple buffers. Fixes: 2dfc119f22f257082ab0 "i965: Grow the batch/state buffers if we need space and can't flush." Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103101 Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> (cherry picked from commit 74e38739ca266b8178eaa70e30578aa929b067ab) [Emil Velikov: remove NA blorp_get_surface_base_address hunk] Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Conflicts: src/mesa/drivers/dri/i965/genX_blorp_exec.c
* i965: Don't grow batch/state buffer on every emit after an overflow.Kenneth Graunke2017-12-011-23/+19
| | | | | | | | | | | | | | | | | | | | | Once we reach the intended size of the buffer (BATCH_SZ or STATE_SZ), we try and flush. If we're not allowed to flush, we resort to growing the buffer so that there's space for the data we need to emit. We accidentally got the threshold wrong. The first non-wrappable call beyond (e.g.) STATE_SZ would grow the buffer to floor(1.5 * STATE_SZ), The next call would see we were beyond STATE_SZ and think we needed to grow a second time - when the buffer was already large enough. We still want to flush when we hit STATE_SZ, but for growing, we should use the actual size of the buffer as the threshold. This way, we only grow when actually necessary. v2: Simplify the control flow (suggested by Jordan) Fixes: 2dfc119f22f257082ab0 "i965: Grow the batch/state buffers if we need space and can't flush." Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> (cherry picked from commit ca4361658635f2b401e9793c0b982721998ecb70)
* i965: Preserve EXEC_OBJECT_CAPTURE when growing the BO.Kenneth Graunke2017-12-011-0/+3
| | | | | | | | | | The original state buffer was marked with EXEC_OBJECT_CAPTURE. When growing it, we want to preserve that flag so we continue to capture it in GPU hang reports. Fixes: 2dfc119f22f257082ab0 "i965: Grow the batch/state buffers if we need space and can't flush." Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> (cherry picked from commit 52d32917e1f3f70abcbcff5508f7423e94626b41)
* i965: Use old_bo->align when growing batch/state buffer instead of 4096.Kenneth Graunke2017-12-011-1/+2
| | | | | | | | | | | | | | | The intention here is make the new BO use the same alignment as the old BO. This isn't strictly necessary, but we would have to update the 'alignment' field in the validation list when swapping it out, and we don't bother today. The batch and state buffers use an alignment of 4096, so this should be equivalent - it's just clearer than cut and pasting a magic constant. Fixes: 2dfc119f22f257082ab0 "i965: Grow the batch/state buffers if we need space and can't flush." Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> (cherry picked from commit 2af70854609509adf5dc92af2fcf1c30938e2a5d)
* i965: Program the dynamic state heap size to MAX_STATE_SIZE.Kenneth Graunke2017-12-013-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | STATE_BASE_ADDRESS specifies a maximum size of the dynamic state section, beyond which data supposedly reads back as 0. On Gen8+, we were programming it to the size of the buffer. This worked fine until we started growing the state buffer in commit 2dfc119f22f25708. When the state buffer grows, the value in STATE_BASE_ADDRESS becomes too small, and our state beyond STATE_SZ bytes would read back as 0. To avoid having to update the value, we program it to MAX_STATE_SIZE. We used to program the upper bound to the maximum on older hardware anyway, so programming it too large isn't a big deal. Bogus SURFACE_STATE can easily lead to GPU hangs and misrendering. DiRT Rally was hitting the statebuffer growth path, and suffered from bad texture corruption and GPU hangs (usually around the same time). This patch fixes both issues. Fixes: 2dfc119f22f257082ab0 "i965: Grow the batch/state buffers if we need space and can't flush." Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103101 Tested-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit cfc5af588cf8e0cfb41ea907a7da3cca676be1c2)
* radeonsi/gfx9: fix importing shared textures with DCCMarek Olšák2017-12-011-1/+1
| | | | | | | | | | | | | VI has 11 dwords at least. GFX9 has 10 dwords. Cc: 17.2 17.3 <mesa-stable@lists.freedesktop.org> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit ed4780383cae61e051b3d3d120649222da49feae) [Emil Velikov: s|radeon/r600_texture.c|radeonsi/si_state.c|] Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Conflicts: src/gallium/drivers/radeon/r600_texture.c
* gallium/wgl: fix default pixel format issueFrank Richter2017-11-291-2/+21
| | | | | | | | | | | | | When creating a context without SetPixelFormat() don't blindly take the pixel format reported by GDI. Instead, look for our own closest pixel format. Minor clean-ups added by Brian Paul. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103412 Reviewed-by: Brian Paul <brianp@vmware.com> Tested-by: Brian Paul <brianp@vmware.com> (cherry picked from commit bf41b2b2627aa3790d380092c28c5d3395cc9cde)
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