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* i965: increase BRW_MAX_UBO to 1621.3Yiwei Zhang2022-07-191-1/+1
| | | | | | | | | | The new limit is legit and it's for virgl to not regress guest desktop GL version advertised. Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17608>
* docs Add sha256 sums for 21.3.9staging/21.3Dylan Baker2022-06-081-1/+1
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* VERSION: bump for 21.3.9 releasemesa-21.3.9Dylan Baker2022-06-081-1/+1
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* docs: add release notes for 21.3.9Dylan Baker2022-06-081-0/+119
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* intel/perf: Destination array calculation into functionMatt Turner2022-05-091-4/+5
| | | | | | | | | | | | | | | | | | | | | Cuts 119 KiB from iris_dri.so and libvulkan_intel.so. text data bss dec hex filename 917511 0 0 917511 e0007 meson-generated_.._intel_perf_metrics.c.o (before) 796986 0 0 796986 c293a meson-generated_.._intel_perf_metrics.c.o (after) text data bss dec hex filename 14130948 365708 210004 14706660 e067e4 iris_dri.so (before) 14009332 365708 210004 14585044 de8cd4 iris_dri.so (after) text data bss dec hex filename 8124225 214264 22820 8361309 7f955d libvulkan_intel.so (before) 8002609 214264 22820 8239693 7dba4d libvulkan_intel.so (after) Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (cherry picked from commit 8860ff33105bc756b077a3fefaced892cd867dc8) Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16405>
* intel/perf: Fix mistake in description stringMatt Turner2022-05-091-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | Along with fixing the grammar, this allows it to be deduplicated since the properly worded description exists in later generations' XMLs. Cuts 96 B from iris_dri.so and libvulkan_intel.so. text data bss dec hex filename 917613 0 0 917613 e006d meson-generated_.._intel_perf_metrics.c.o (before) 917511 0 0 917511 e0007 meson-generated_.._intel_perf_metrics.c.o (after) text data bss dec hex filename 14131044 365708 210004 14706756 e06844 iris_dri.so (before) 14130948 365708 210004 14706660 e067e4 iris_dri.so (after) text data bss dec hex filename 8124321 214264 22820 8361405 7f95bd libvulkan_intel.so (before) 8124225 214264 22820 8361309 7f955d libvulkan_intel.so (after) Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (cherry picked from commit d80d3c6760a8d029c7af8c8ad5ec5e623f6d413a) Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16405>
* intel/perf: Mark intel_perf_counter_* enums as PACKEDMatt Turner2022-05-091-3/+3
| | | | | | | | | | | | | | | | | | | | | | Reduces their sizes from 4 bytes to 1. Cuts 6 KiB from iris_dri.so and libvulkan_intel.so. text data bss dec hex filename 924401 0 0 924401 e1af1 meson-generated_.._intel_perf_metrics.c.o (before) 917613 0 0 917613 e006d meson-generated_.._intel_perf_metrics.c.o (after) text data bss dec hex filename 14137732 365708 210004 14713444 e08264 iris_dri.so (before) 14131044 365708 210004 14706756 e06844 iris_dri.so (after) text data bss dec hex filename 8131009 214264 22820 8368093 7fafdd libvulkan_intel.so (before) 8124321 214264 22820 8361405 7f95bd libvulkan_intel.so (after) Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (cherry picked from commit 7024b8e0eb15100bc73b9d5f931ba678b8cc1e5a) Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16405>
* intel/perf: Store indices to strings rather than pointersMatt Turner2022-05-092-14/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The compiler does a good job of deduplicating strings already, but we can eliminate the pointers to each string by combining the strings into a single char array and storing only an index into that array. The longest of the char arrays is the descriptions array, which is a little over 45 KiB, so still under MSVC's 64 KiB string literal limit [0]. Because the string length is under 64 KiB we can use uint16_t as the index type, which roughly doubles our savings as compared to an int. This cuts 77 KiB from iris_dri.so (0.5%) and libvulkan_intel.so (0.9%). text data bss dec hex filename 926811 25920 0 952731 e899b meson-generated_.._intel_perf_metrics.c.o (before) 924401 0 0 924401 e1af1 meson-generated_.._intel_perf_metrics.c.o (after) text data bss dec hex filename 14190852 391628 210004 14792484 e1b724 iris_dri.so (before) 14137732 365708 210004 14713444 e08264 iris_dri.so (after) text data bss dec hex filename 8184097 240184 22820 8447101 80e47d libvulkan_intel.so (before) 8131009 214264 22820 8368093 7fafdd libvulkan_intel.so (after) relinfo: iris_dri.so (before): 17765 relocations, 17545 relative (98%), 452 PLT entries, 1 for local syms (0%), 0 users iris_dri.so (after) : 15605 relocations, 15385 relative (98%), 452 PLT entries, 1 for local syms (0%), 0 users libvulkan_intel.so (before): 10720 relocations, 6989 relative (65%), 355 PLT entries, 1 for local syms (0%), 0 users libvulkan_intel.so (after) : 8560 relocations, 4829 relative (56%), 355 PLT entries, 1 for local syms (0%), 0 users [0] https://docs.microsoft.com/en-us/cpp/cpp/string-and-character-literals-cpp?view=msvc-170&viewFallbackFrom=vs-2019 Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (cherry picked from commit 6c0246dcf4f2d4e2ccdaa97d52833cf9f11ffa4b) Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16405>
* intel/perf: Use slimmer intel_perf_query_counter_data structMatt Turner2022-05-092-2/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | intel_perf_query_counter contains fields for things we can't or don't want to store in our static data (like runtime-determined max values) or oa_read_counter function pointers which are dependent on the GPU gen and would make deduplication very ineffective. Cuts 16 KiB from iris_dri.so and libvulkan_intel.so. text data bss dec hex filename 926811 43200 0 970011 ecd1b meson-generated_.._intel_perf_metrics.c.o (before) 926811 25920 0 952731 e899b meson-generated_.._intel_perf_metrics.c.o (after) text data bss dec hex filename 14190852 408908 210004 14809764 e1faa4 iris_dri.so (before) 14190852 391628 210004 14792484 e1b724 iris_dri.so (after) text data bss dec hex filename 8184097 257464 22820 8464381 8127fd libvulkan_intel.so (before) 8184097 240184 22820 8447101 80e47d libvulkan_intel.so (after) Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (cherry picked from commit df5e743c80ce96f510cc6d4d6b7b52fb8ae0eb3e) Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16405>
* intel/perf: Use a function to initialize perf countersMatt Turner2022-05-091-13/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | And specifically mark it with ATTRIBUTE_NOINLINE. Otherwise it will be inlined and actually slightly increase code size. Cuts 505 KiB from iris_dri.so and libvulkan_intel.so. text data bss dec hex filename 1538720 0 0 1538720 177aa0 meson-generated_.._intel_perf_metrics.c.o (before) 926811 43200 0 970011 ecd1b meson-generated_.._intel_perf_metrics.c.o (after) text data bss dec hex filename 14751700 365708 210004 15327412 e9e0b4 iris_dri.so (before) 14190852 408908 210004 14809764 e1faa4 iris_dri.so (after) text data bss dec hex filename 8744913 214264 22820 8981997 890ded libvulkan_intel.so (before) 8184097 257464 22820 8464381 8127fd libvulkan_intel.so (after) Relocations increase because the counter initializations are moved from code (in .text) to pointers (in .text) to .rodata, which require relocations. relinfo: iris_dri.so (before): 15605 relocations, 15385 relative (98%), 452 PLT entries, 1 for local syms (0%), 0 users iris_dri.so (after) : 17765 relocations, 17545 relative (98%), 452 PLT entries, 1 for local syms (0%), 0 users libvulkan_intel.so (before): 8560 relocations, 4829 relative (56%), 355 PLT entries, 1 for local syms (0%), 0 users libvulkan_intel.so (after) : 10720 relocations, 6989 relative (65%), 355 PLT entries, 1 for local syms (0%), 0 users Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (cherry picked from commit bbbbb0325b6da31298a493ab3e9c3cb1648481d8) Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16405>
* intel/perf: Deduplicate perf countersMatt Turner2022-05-091-9/+72
| | | | | | | | | | | | | | | No changes in resulting code (yes, seriously!). GCC constant propagates the static const arrays into the code, yielding bit for bit identical results. This will however enable further cleanups. Before this patch, we emit 11916 different initializations of intel_perf_query_counter. With this patch we emit an array of 539 and initialize the intel_perf_query_counters in terms of those. Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (cherry picked from commit 5e6c7a572ea881db42440dd2dca8a34b2971faed) Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16405>
* intel/perf: Don't print leading space from desc_units()Matt Turner2022-05-091-2/+2
| | | | | | | | | | Just an annoyance I noticed when I needed to generate the description string in two different places. Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (cherry picked from commit 3172b5bbb89ff80f50252752175d402d283429bf) Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16405>
* intel/perf: Move some static blocks of C code out of the python script.Emma Anholt2022-05-092-47/+76
| | | | | | | | | | Now my editor can help me format code as I type. Reviewed-by: Matt Turner <mattst88@gmail.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (cherry picked from commit 12e065ddecd50885158c724a2ccfa453c445ce74) Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16405>
* intel/perf: use a function to do common allocationsDave Airlie2022-05-091-33/+46
| | | | | | | | | | | | | This cuts the compile time down for this file on my ryzen from real 1m4.077s to real 0m30.827s Reviewed-by: Emma Anholt <emma@anholt.net> Reviewed-by: Matt Turner <mattst88@gmail.com> (cherry picked from commit acc2d08cf908a5d25cf5491f7602901d2c310262) Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16405>
* radv: Don't hash ycbcr sampler base object.Georg Lehmann2022-03-195-23/+28
| | | | | | | | | | | Stops gamescope from recompiling pipelines on every start. Cc: mesa-stable Signed-off-by: Georg Lehmann <dadschoorse@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15454> (cherry picked from commit 4f6c7a6025628fe14e06ac864986ab95bdd25457)
* zink: only update usage on buffer rebind if rebinds occurredMike Blumenkrantz2022-03-182-2/+3
| | | | | | | | | | this is a harmless case, but it's still wrong cc: mesa-stable Reviewed-by: Dave Airlie <airlied@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15429> (cherry picked from commit 8294d454245d4318befac7c8915e55db3d47cefd)
* zink: force-add usage when adding last-ref trackingMike Blumenkrantz2022-03-182-3/+13
| | | | | | | | | | | | | | | | | this fixes desync+crash when: 1. usage is added for bs A 2. tracking is added for bs B 3. tracking is removed for bs B 4. context is destroyed 5. usage A is now dangling and will crash if accessed as seen in glmark2 cc: mesa-stable Reviewed-by: Dave Airlie <airlied@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15429> (cherry picked from commit 7da211e24fe14d8b107461bdfcb3b8d67212f88a)
* anv: flush tile cache with query copy commandLionel Landwerlin2022-03-182-1/+2
| | | | | | | | | | | | | | | | | This fixes the test_resolve_non_issued_query_data vkd3d-proton test. This change is required on TGL+ (maybe ICL?) because on all platforms 3D pipeline writes are not coherent with CS. On previous platform we fixed this by flushing the render cache to make sure data is visble to CS before it writes to memory. But on more recently platforms, flushing the render cache leaves the data in the tile cache which is still not coherent with CS, so we need to flush that one too. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Cc: mesa-stable Reviewed-by: Tapani Pälli <tapani.palli@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14552> (cherry picked from commit 8b71118aa066ab125b7440912ed1e14da79c9451)
* anv: emit timestamp & availability using the same part of CSLionel Landwerlin2022-03-182-3/+20
| | | | | | | | | | | | We've run into issues before where PIPE_CONTROL races MI_STORE_* commands. So make sure we emit the availability using the same type of CS so that memory writes are properly ordered. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Cc: mesa-stable Reviewed-by: Tapani Pälli <tapani.palli@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14552> (cherry picked from commit 4e30da7874e6586c7ac94cd34560c782d0f9678d)
* zink: flag sample locations for re-set on batch flushMike Blumenkrantz2022-03-182-1/+2
| | | | | | | | | | | this needs to be re-set any time the cmdbuf changes cc: mesa-stable Tested-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15397> (cherry picked from commit efa724133f6e454b209837713ad4218ade6eb7d0)
* intel/fs: Force destination types on DP4A instructionsIan Romanick2022-03-182-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most of the time, this doesn't matter. On the versions with _sat, if the destination type is incorrect, the clamping will not happen correctly. Fixes the following CTS tests: dEQP-VK.spirv_assembly.instruction.compute.opudotaccsatkhr.all_packed_ss_v4i8_out32 dEQP-VK.spirv_assembly.instruction.compute.opudotaccsatkhr.all_packed_su_v4i8_out32 dEQP-VK.spirv_assembly.instruction.compute.opudotaccsatkhr.all_packed_us_v4i8_out32 dEQP-VK.spirv_assembly.instruction.compute.opudotaccsatkhr.all_packed_uu_v4i8_out32 dEQP-VK.spirv_assembly.instruction.compute.opudotaccsatkhr.all_ss_v4i8_out32 dEQP-VK.spirv_assembly.instruction.compute.opudotaccsatkhr.all_su_v4i8_out32 dEQP-VK.spirv_assembly.instruction.compute.opudotaccsatkhr.all_us_v4i8_out32 dEQP-VK.spirv_assembly.instruction.compute.opudotaccsatkhr.all_uu_v4i8_out32 dEQP-VK.spirv_assembly.instruction.compute.opudotaccsatkhr.limits_packed_ss_v4i8_out32 dEQP-VK.spirv_assembly.instruction.compute.opudotaccsatkhr.limits_packed_su_v4i8_out32 dEQP-VK.spirv_assembly.instruction.compute.opudotaccsatkhr.limits_packed_us_v4i8_out32 dEQP-VK.spirv_assembly.instruction.compute.opudotaccsatkhr.limits_packed_uu_v4i8_out32 dEQP-VK.spirv_assembly.instruction.compute.opudotaccsatkhr.limits_ss_v4i8_out32 dEQP-VK.spirv_assembly.instruction.compute.opudotaccsatkhr.limits_su_v4i8_out32 dEQP-VK.spirv_assembly.instruction.compute.opudotaccsatkhr.limits_us_v4i8_out32 dEQP-VK.spirv_assembly.instruction.compute.opudotaccsatkhr.limits_uu_v4i8_out32 dEQP-VK.spirv_assembly.instruction.compute.opudotaccsatkhr.small_packed_ss_v4i8_out32 dEQP-VK.spirv_assembly.instruction.compute.opudotaccsatkhr.small_packed_su_v4i8_out32 dEQP-VK.spirv_assembly.instruction.compute.opudotaccsatkhr.small_packed_us_v4i8_out32 dEQP-VK.spirv_assembly.instruction.compute.opudotaccsatkhr.small_packed_uu_v4i8_out32 dEQP-VK.spirv_assembly.instruction.compute.opudotaccsatkhr.small_ss_v4i8_out32 dEQP-VK.spirv_assembly.instruction.compute.opudotaccsatkhr.small_su_v4i8_out32 dEQP-VK.spirv_assembly.instruction.compute.opudotaccsatkhr.small_us_v4i8_out32 dEQP-VK.spirv_assembly.instruction.compute.opudotaccsatkhr.small_uu_v4i8_out32 v2: Update anv-tgl-fails.txt. Reviewed-by: Ivan Briano <ivan.briano@intel.com> Fixes: 0f809dbf404 ("intel/compiler: Basic support for DP4A instruction") Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15417> (cherry picked from commit 19330eeb1d65c631ce11a0be1cb13437c6c28491)
* anv: zero-out anv_batch_boLionel Landwerlin2022-03-182-2/+2
| | | | | | | | | | | | anv_batch_bo has a length field that we use to flush cachelines. Not having that field initialized properly leads us to access out of bound memory. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Cc: mesa-stable Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15425> (cherry picked from commit d68b9f0e6b1e45533c9f53eca6111cabb34d6fdb)
* anv: fix variable shadowingLionel Landwerlin2022-03-182-3/+3
| | | | | | | | Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: 83fee30e8596 ("anv: allow multiple command buffers in anv_queue_submit") Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15425> (cherry picked from commit 78acae386553d6bf07756cfb8b12ced110454c1e)
* vulkan: Make sure we've loaded our connectors when querying plane props.Emma Anholt2022-03-183-17/+46
| | | | | | | | | | | | | | If you hadn't already called wsi_GetPhysicalDeviceDisplayProperties2KHR or wsi_GetDrmDisplayEXT before calling GetPhysicalDeviceDisplayPlaneProperties2KHR, then the connectors list wouldn't be populated and you'd get no plane properties. Fixes failure of dEQP-VK.wsi.display.get_display_plane_capabilities when run on its own. Fixes: #4575 Cc: mesa-stable Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15353> (cherry picked from commit da834a12cf2b334baf5c366c34cbbffb61803650)
* gallivm: fix oob image detection for cube/1dArray/2dArray/cubeArrayMike Blumenkrantz2022-03-182-2/+2
| | | | | | | | | | these all need to check for z coord oob to avoid crashing cc: mesa-stable Reviewed-by: Dave Airlie <airlied@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15388> (cherry picked from commit 6345575f8a9e97f5856e53a1c3aee4474c4433c2)
* lavapipe: always clone shader nir for shader statesMike Blumenkrantz2022-03-182-4/+7
| | | | | | | | | | | these become owned and freed by llvmpipe, so ensure that freeing them there won't cause crashes cc: mesa-stable Reviewed-by: Dave Airlie <airlied@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15281> (cherry picked from commit 2f9976debc549450d37595bdbe34c9115c3605fb)
* Revert "glx: Fix build errors with --enable-mangling (v2)"Eric Engestrom2022-03-182-9/+3
| | | | | | | | | | | This reverts commit a27f2d991b1723c3349623401ce3c8f26dcdb28b. As of a0829cf23b307ca44ab8 ("GL: drop symbols mangling support"), this extra complexity isn't needed anymore. Signed-off-by: Eric Engestrom <eric.engestrom@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2298> (cherry picked from commit 5dbbc0f0a824e4addffeb115631a9c5bcb426c29)
* Revert "ci: downgrade sphinx to v3.x"Erik Faye-Lund2022-03-182-2/+2
| | | | | | | | | | | The readthedocs theme now supports Sphinx 4.x, so there's no longer any reason to stick with 3.x. This reverts commit a545b6eda040ee40b5c36533d7ae378fc24fcf09. Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15212> (cherry picked from commit dd9b8881e0ad84ab1e74d972a8233f5c03e7b37a)
* panfrost: Optimise recalculation of max sampler viewIcecream952022-03-182-6/+18
| | | | | | | | | Previously we always searched through 128 sampler views for set sampler views, now we never look above the maximum updated view. Fixes: 304851422a4 ("panfrost: Fix set_sampler_views for big GL") Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15366> (cherry picked from commit d5870c45ae82c091e72f1258920aa54974e19a36)
* panfrost: Don't initialise the trampolines arrayIcecream952022-03-182-3/+5
| | | | | | | | | | PIPE_MAX_SHADER_SAMPLER_VIEWS is 128, so we just end up initialising a kilobyte of memory for no reason, when usually only a couple of sampler views are used. Fixes: 53ef20f08d4 ("panfrost: Handle NULL sampler views") Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15366> (cherry picked from commit 3e405afeb9c1cb1182f83e2a1fd6f0beb199df64)
* pan/bi: Handle non-2D arraysAlyssa Rosenzweig2022-03-183-181/+10
| | | | | | | | | | | | | | | | | | | | | | | Handle arrays generically by using the last component of the coordinate source as the array index. That works for both 2D arrays and cube arrays, fixing cube arrays. Cube arrays were already handled correctly in core Panfrost code. This code path is not tested in dEQP-GLES31 without exposing OES_cube_map_array, which depends on OES_geometry_shader, which we don't have. Yet we do expose PIPE_CAP_CUBE_ARRAY, so ARB_cube_map_array is exposed. Disabling PIPE_CAP_CUBE_ARRAY would be an easy band-aid fix, but it's easy enough to handle correctly. dEQP-GLES31 passes with a hack enabling OES_cube_map_array [without geometry shaders]. Also fixes 1D arrays on Bifrost for the same reasons. Fixes: 70d6c5675d6 ("pan/bi: Emit TEXC with builder") Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15254> (cherry picked from commit 53f1e57ee7a7a6f7906c34cf7b78a39873fd00c2)
* panfrost: Emulate GL_CLAMP on BifrostAlyssa Rosenzweig2022-03-184-262/+15
| | | | | | | | | | | | | Hardware support was removed with Midgard. Use mesa/st to emulate GL_CLAMP with nir_lower_tex automatically (the Zink lowering), and disable GL_MIRROR_CLAMP which isn't lowered correctly. Fixes *texwrap* Piglit tests on G52. Fixes: f9ceab7b237 ("panfrost: Fix CLAMP wrap mode") Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15253> (cherry picked from commit 1f97819fbe56a388878a23f49c0cf47016e4dde0)
* .pick_status.json: Update to fc381fa1e341bc9cf71f53a915dc47926a3f621fEric Engestrom2022-03-181-0/+2430
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* util: fix msvc buildJonathan Gray2022-03-182-2/+3
| | | | | | | | | | | Fix msvc build regression after 0536b691338f2759b850f9ec94634033a5d1f9e1 reported by Prodea Alexandru-Liviu. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6137 Fixes: 0536b691338 ("util: fix build with clang 10 on mips64") Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15355> (cherry picked from commit e50eb1ce7ab3bbbb71a4cb9016a2e41d0a30e08f)
* anv: Allow MSAA resolve with different numbers of planesJason Ekstrand2022-03-183-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Vulkan spec for VK_KHR_depth_stencil_resolve allows a format mismatch between the primary attachment and the resolve attachment within certain limits. In particular, VUID-VkSubpassDescriptionDepthStencilResolve-pDepthStencilResolveAttachment-03181 If pDepthStencilResolveAttachment is not NULL and does not have the value VK_ATTACHMENT_UNUSED and VkFormat of pDepthStencilResolveAttachment has a depth component, then the VkFormat of pDepthStencilAttachment must have a depth component with the same number of bits and numerical type VUID-VkSubpassDescriptionDepthStencilResolve-pDepthStencilResolveAttachment-03182 If pDepthStencilResolveAttachment is not NULL and does not have the value VK_ATTACHMENT_UNUSED, and VkFormat of pDepthStencilResolveAttachment has a stencil component, then the VkFormat of pDepthStencilAttachment must have a stencil component with the same number of bits and numerical type So you can resolve from a depth/stencil format to a depth-only or stencil-only format so long as the number of bits matches. Unfortunately, this has never been tested because the CTS tests which purport to test this are broken and actually test with a destination combined depth/stencil format. Fixes: 5e4f9ea363a6 ("anv: Implement VK_KHR_depth_stencil_resolve") Reviewed-by: Ivan Briano <ivan.briano@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15333> (cherry picked from commit d65dbe8018923e3a405b362c92a21caa30e66e83)
* radeonsi: don't clear framebuffer.state before dcc decompPierre-Eric Pelloux-Prayer2022-03-182-12/+1
| | | | | | | | | | | | | | This causes inconsistencies between sctx->framebuffer.state and other sctx->framebuffer properties (like compressed_cb_mask). The point of this code was to fix an issue with vi_separate_dcc_stop_query, which was removed by 804e2924406 we can safely drop it. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6099 Cc: mesa-stable Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15261> (cherry picked from commit 968d68125c234bc347fde8fad543f0fc7d80d8b0)
* anv: fix some dynamic rasterization discard cases in pipeline constructionMike Blumenkrantz2022-03-182-5/+3
| | | | | | | | | cc: mesa-stable Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15280> (cherry picked from commit 5ab0e3f0bb09bde3d06b0ea448a6e183a813e286)
* anv: fix CmdSetColorWriteEnableEXT for maximum rtsMike Blumenkrantz2022-03-182-2/+2
| | | | | | | | | Fixes: b15bfe92f7f ("anv: implement VK_EXT_color_write_enable") Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15280> (cherry picked from commit 1e3e7b3a4da6c7cd04879e0e4aab5f0d6f7b8d5f)
* anv: fix xfb usage with rasterizer discardMike Blumenkrantz2022-03-182-3/+5
| | | | | | | | | | | | | | | | | | | | | in the initial implementation, a stream like: * CmdBeginTransformFeedbackEXT * CmdSetRasterizerDiscardEnableEXT * CmdDraw * CmdEndTransformFeedbackEXT * CmdBeginTransformFeedbackEXT * CmdDraw * CmdEndTransformFeedbackEXT would never enable transform feedback, as it only checked for the change in rasterizer_discard state Fixes: 4d531c67dfd ("anv: support rasterizer discard dynamic state") Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15269> (cherry picked from commit 52f6978484fb738a06b45dd09c5dc6a1bd594fb7)
* crocus: don't map scanout buffers as write-backDave Airlie2022-03-184-1/+17
| | | | | | | | | | | | | | | | This essentially ports 64405230774210488dedbc54d73ba394ec6ae802 Author: Keith Packard <keithp@keithp.com> Date: Fri Aug 6 16:11:18 2021 -0700 iris: Map scanout buffers WC instead of WB [v2] to crocus. Fixes: f3630548f1da ("crocus: initial gallium driver for Intel gfx 4-7") Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15313> (cherry picked from commit e8c3be0eb84bbefe1486f2543125c35b278ac1cf)
* llvmpipe: fix occlusion queries with early depth testMike Blumenkrantz2022-03-182-5/+25
| | | | | | | | | | | | | | | | | for genuine early depth tests, the samplecount must be updated after depth test but before samplemask is applied for inferred-early or regular depth tests, the samplemask can be applied before the depth test Fixes: d9276ae965a ("llvmpipe: handle gl_SampleMask writing.") fixes: dEQP-VK.fragment_operations.early_fragment.sample_count_early_fragment_tests_depth_samples_4 Reviewed-by: Dave Airlie <airlied@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15319> (cherry picked from commit 42e78ba12573323be35cf4a6e10e5d434b2a56c5)
* .pick_status.json: Update to 05d687723530ed3c5c9f7d0addb3b047138613a3Eric Engestrom2022-03-181-0/+405
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* VERSION: bump for 21.3.8mesa-21.3.8Eric Engestrom2022-03-181-1/+1
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* docs: add release notes for 21.3.8Eric Engestrom2022-03-181-0/+183
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* lavapipe: run nir_opt_copy_prop_vars during optimization loopMike Blumenkrantz2022-03-102-1/+3
| | | | | | | | | | | | | | | this enables better elimination of operations fixes: dEQP-VK.graphicsfuzz.spv-stable-mergesort-flatten-selection-dead-continues fixes #5458 cc: mesa-stable Reviewed-by: Dave Airlie <airlied@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15322> (cherry picked from commit cf5c32a4b2d839305ef2104ab0acf973e63b940a)
* lavapipe: skip format checks for EXTENDED_USAGEMike Blumenkrantz2022-03-102-1/+5
| | | | | | | | | | | | | | | | | | | we can effectively skip any kind of checks here and just assume that one of two scenarios is in effect: * the user is about to attempt some incredibly illegal behavior that VVL will catch * the user is about to attempt a pro gamer move and we'll be fine in either case, it's EXTENDED_USAGE, so hopefully we're about to make a texture view from a compatible and supported format cc: mesa-stable fixes: dEQP-VK.image.extended_usage_bit_compatibility.image_format_properties* Reviewed-by: Dave Airlie <airlied@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15320> (cherry picked from commit 6a4c7ef7286f50b5396ffc68bcf6ad33eb67de07)
* lavapipe: remove broken workaround for zink depth texturing.Dave Airlie2022-03-102-3/+1
| | | | | | | Cc: mesa-stable Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15297> (cherry picked from commit 938488f43986e21a22be5c8b8c7be4fcc60af989)
* zink: workaround depth texture mode alpha.Dave Airlie2022-03-102-5/+19
| | | | | | | | | | | Since spir-v only has single channel depth sampling, it breaks with the old school GL_ALPHA depth mode swizzle, so just detect that case and smash all the channels. Cc: mesa-stable Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15297> (cherry picked from commit 30cb63bead12ad0d7ff66a6a267400c3a07c4f86)
* util/bitset: Fix off-by-one in __bitset_set_rangeConnor Abbott2022-03-102-2/+2
| | | | | | Fixes: b3b03e33c9f ("util/bitset: add BITSET_SET_RANGE(..)") Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14107> (cherry picked from commit 410e746198b498efdb9c37a63a0b8aad67469a4c)
* ir3/ra: Sanitize parallel copy flags betterConnor Abbott2022-03-102-7/+9
| | | | | | | | | | | For pcopies we only care about the register's type, i.e. whether its a half-register and whether it's an array (plus its size). Copying over other flags like IR3_REG_RELATIV just leads to sadness and validator assertions. Fixes: 0ffcb19b9d9 ("ir3: Rewrite register allocation") Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14107> (cherry picked from commit ab0ed4ff3f2eed6610597a0f0b42b8ca829790f9)
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