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authorRafael Antognolli <rafael.antognolli@intel.com>2019-11-26 09:42:06 -0800
committerRafael Antognolli <rafael.antognolli@intel.com>2019-12-04 20:48:25 +0000
commitd3e339364f13f09401fdf32df05f88a821879d68 (patch)
tree645458c1b0ffff0ecf4ec287684eb1a7f2e97c4b /src/intel/perf
parent7d5da53d276e12a1b75038405514cba7f0909cd9 (diff)
downloadmesa-d3e339364f13f09401fdf32df05f88a821879d68.tar.gz
anv: Use 3DSTATE_CONSTANT_ALL when possible.
Use this new instruction introduced in Gen12. The instruction itself is smaller, and it also allows us to emit a single instruction to all stages that have the same push constant buffers (e.g. when they don't have constant buffers). There's one restriction to use this instruction, though: the length field is only 5 bits long, so we need to check whether we can use it, and fallback to the old 3DSTATE_CONSTANT_XS if that field is >= 32. v2: - Rebased on top of the lasted changes from Jason. - Added review suggestions by Caio. - Removed struct push_bos and merged some code into anv_nir_compute_push_layout(). v3: - Remove code churn due to gen8+ workaround in anv_nir_compute_push_layout(). This code has been removed in an earlier commit, and implemented in cmd_buffer_emit_push_constant(). Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Diffstat (limited to 'src/intel/perf')
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