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author | Marek Olšák <marek.olsak@amd.com> | 2019-07-30 17:28:50 -0400 |
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committer | Marek Olšák <marek.olsak@amd.com> | 2019-08-06 17:08:50 -0400 |
commit | 8b68511ebc1f6444b80e94516826ec87ad495cb1 (patch) | |
tree | 50347beb612089bc112ca70777b07148b4ae8341 /src/gallium/drivers/radeonsi/si_state.c | |
parent | e69c1c8b8f4015e3b194628bf42b17b92885d390 (diff) | |
download | mesa-8b68511ebc1f6444b80e94516826ec87ad495cb1.tar.gz |
radeonsi: DCC MSAA blending bug - include logic op, limit to Navi14 and older
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_state.c')
-rw-r--r-- | src/gallium/drivers/radeonsi/si_state.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 6ec65f1b417..dbc667e714a 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -115,12 +115,12 @@ static void si_emit_cb_render_state(struct si_context *sctx) SI_TRACKED_CB_TARGET_MASK, cb_target_mask); if (sctx->chip_class >= GFX8) { - /* DCC MSAA workaround for blending. + /* DCC MSAA workaround. * Alternatively, we can set CB_COLORi_DCC_CONTROL.OVERWRITE_- * COMBINER_DISABLE, but that would be more complicated. */ bool oc_disable = blend && - blend->blend_enable_4bit & cb_target_mask && + blend->dcc_msaa_corruption_4bit & cb_target_mask && sctx->framebuffer.nr_samples >= 2; unsigned watermark = sctx->framebuffer.dcc_overwrite_combiner_watermark; @@ -621,6 +621,9 @@ static void *si_create_blend_state_mode(struct pipe_context *ctx, blend->blend_enable_4bit |= 0xfu << (i * 4); + if (sctx->family <= CHIP_NAVI14) + blend->dcc_msaa_corruption_4bit |= 0xfu << (i * 4); + /* This is only important for formats without alpha. */ if (srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA || dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || @@ -631,6 +634,9 @@ static void *si_create_blend_state_mode(struct pipe_context *ctx, blend->need_src_alpha_4bit |= 0xfu << (i * 4); } + if (sctx->family <= CHIP_NAVI14 && logicop_enable) + blend->dcc_msaa_corruption_4bit |= blend->cb_target_enabled_4bit; + if (blend->cb_target_mask) { color_control |= S_028808_MODE(mode); } else { |