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| author | Samuel Pitoiset <samuel.pitoiset@gmail.com> | 2019-06-14 14:52:28 +0200 |
|---|---|---|
| committer | Samuel Pitoiset <samuel.pitoiset@gmail.com> | 2019-06-17 22:20:53 +0200 |
| commit | 58506fec6355fb21de272218c18debcb8e067db2 (patch) | |
| tree | e1dd3c24f07b44cf5869e1dfa0b510ecf4f53e74 /src/amd/vulkan/radv_image.c | |
| parent | 4b0bc664a5db6d104fe54a2c0427c6b6967cbf5f (diff) | |
| download | mesa-58506fec6355fb21de272218c18debcb8e067db2.tar.gz | |
radv: allocate DCC metadata for each mip
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Diffstat (limited to 'src/amd/vulkan/radv_image.c')
| -rw-r--r-- | src/amd/vulkan/radv_image.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index a74884f411b..98df24d3546 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -924,11 +924,11 @@ radv_image_alloc_dcc(struct radv_image *image) assert(image->plane_count == 1); image->dcc_offset = align64(image->size, image->planes[0].surface.dcc_alignment); - /* + 16 for storing the clear values + dcc pred */ + /* + 24 for storing the clear values + fce pred + dcc pred for each mip */ image->clear_value_offset = image->dcc_offset + image->planes[0].surface.dcc_size; - image->fce_pred_offset = image->clear_value_offset + 8; - image->dcc_pred_offset = image->clear_value_offset + 16; - image->size = image->dcc_offset + image->planes[0].surface.dcc_size + 24; + image->fce_pred_offset = image->clear_value_offset + 8 * image->info.levels; + image->dcc_pred_offset = image->clear_value_offset + 16 * image->info.levels; + image->size = image->dcc_offset + image->planes[0].surface.dcc_size + 24 * image->info.levels; image->alignment = MAX2(image->alignment, image->planes[0].surface.dcc_alignment); } |