radv: use radv_optimize_nir() less in radv_link_shaders()

fossil-db (Navi):
Totals from 11 (0.01% of 137413) affected shaders:
CodeSize: 99372 -> 99480 (+0.11%)
Instrs: 19119 -> 19110 (-0.05%)
Cycles: 222144 -> 222000 (-0.06%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6891>

2 files changed, 46 insertions, 10 deletions

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 7bba42e842e..2c3c8cd726f 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -2226,20 +2226,47 @@ radv_link_shaders(struct radv_pipeline *pipeline, nir_shader **shaders,
 			if (ordered_shaders[i]->info.stage != last)
 				mask = mask | nir_var_shader_out;
 
-			nir_lower_io_to_scalar_early(ordered_shaders[i], mask);
+			if (nir_lower_io_to_scalar_early(ordered_shaders[i], mask)) {
+				/* Optimize the new vector code and then remove dead vars */
+				nir_copy_prop(ordered_shaders[i]);
+				nir_opt_shrink_vectors(ordered_shaders[i]);
+
+		                if (ordered_shaders[i]->info.stage != last) {
+					/* Optimize swizzled movs of load_const for
+					 * nir_link_opt_varyings's constant propagation
+					 */
+				        nir_opt_constant_folding(ordered_shaders[i]);
+				        /* For nir_link_opt_varyings's duplicate input opt */
+				        nir_opt_cse(ordered_shaders[i]);
+				}
+
+				/* Run copy-propagation to help remove dead
+				 * output variables (some shaders have useless
+				 * copies to/from an output), so compaction
+				 * later will be more effective.
+				 *
+				 * This will have been done earlier but it might
+				 * not have worked because the outputs were vector.
+				 */
+				if (ordered_shaders[i]->info.stage == MESA_SHADER_TESS_CTRL)
+					nir_opt_copy_prop_vars(ordered_shaders[i]);
+
+				nir_opt_dce(ordered_shaders[i]);
+				nir_remove_dead_variables(ordered_shaders[i],
+							  nir_var_function_temp | nir_var_shader_in | nir_var_shader_out, NULL);
+			}
 		}
 	}
 
-	for (int i = 0; i < shader_count; ++i)
-		radv_optimize_nir(ordered_shaders[i], optimize_conservatively, false);
-
 	for (int i = 1; !optimize_conservatively && (i < shader_count); ++i)  {
 		nir_lower_io_arrays_to_elements(ordered_shaders[i],
 						ordered_shaders[i - 1]);
 
-		if (nir_link_opt_varyings(ordered_shaders[i],
-					  ordered_shaders[i - 1]))
-			radv_optimize_nir(ordered_shaders[i - 1], false, false);
+		if (nir_link_opt_varyings(ordered_shaders[i], ordered_shaders[i - 1])) {
+			nir_opt_constant_folding(ordered_shaders[i - 1]);
+			nir_opt_algebraic(ordered_shaders[i - 1]);
+			nir_opt_dce(ordered_shaders[i - 1]);
+		}
 
 		nir_remove_dead_variables(ordered_shaders[i],
 					  nir_var_shader_out, NULL);
@@ -2256,16 +2283,20 @@ radv_link_shaders(struct radv_pipeline *pipeline, nir_shader **shaders,
 			if (nir_lower_global_vars_to_local(ordered_shaders[i])) {
 				ac_lower_indirect_derefs(ordered_shaders[i],
 				                         pipeline->device->physical_device->rad_info.chip_class);
+				/* remove dead writes, which can remove input loads */
+				nir_lower_vars_to_ssa(ordered_shaders[i]);
+				nir_opt_dce(ordered_shaders[i]);
 			}
-			radv_optimize_nir(ordered_shaders[i], false, false);
 
 			if (nir_lower_global_vars_to_local(ordered_shaders[i - 1])) {
 				ac_lower_indirect_derefs(ordered_shaders[i - 1],
 				                         pipeline->device->physical_device->rad_info.chip_class);
 			}
-			radv_optimize_nir(ordered_shaders[i - 1], false, false);
 		}
 	}
+
+	for (int i = 0; i < shader_count; ++i)
+		radv_optimize_nir(ordered_shaders[i], optimize_conservatively, false);
 }
 
 static void
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index bc52b953c61..a80b3a9e291 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -649,7 +649,12 @@ radv_shader_compile_to_nir(struct radv_device *device,
 	 * bloat the instruction count of the loop and cause it to be
 	 * considered too large for unrolling.
 	 */
-	ac_lower_indirect_derefs(nir, device->physical_device->rad_info.chip_class);
+	if (ac_lower_indirect_derefs(nir, device->physical_device->rad_info.chip_class) &&
+	    !(flags & VK_PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT) &&
+	    nir->info.stage != MESA_SHADER_COMPUTE) {
+		/* Optimize the lowered code before the linking optimizations. */
+		radv_optimize_nir(nir, false, false);
+	}
 
 	return nir;
 }