diff options
| author | Jason Ekstrand <jason@jlekstrand.net> | 2020-01-30 11:34:51 -0600 |
|---|---|---|
| committer | Dylan Baker <dylan@pnwbakers.com> | 2020-02-03 08:33:07 -0800 |
| commit | 6257f10d038a31e11c4c72780272e0b6dbc0b5e8 (patch) | |
| tree | 2f75241e5c0f802afc22e5729e74fb8eac00ad71 | |
| parent | 1e23188e7b53d69e0deb315f83ef64aada152c80 (diff) | |
| download | mesa-6257f10d038a31e11c4c72780272e0b6dbc0b5e8.tar.gz | |
intel/fs: Write the address register with NoMask for MOV_INDIRECT
This fixes a hang in the following Vulkan CTS test on TGL-LP:
dEQP-VK.descriptor_indexing.storage_buffer_dynamic_in_loop
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3642>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3642>
(cherry picked from commit f93dfb509cbf9474befae9919dd8c135bbd67093)
| -rw-r--r-- | .pick_status.json | 2 | ||||
| -rw-r--r-- | src/intel/compiler/brw_fs_generator.cpp | 9 |
2 files changed, 10 insertions, 1 deletions
diff --git a/.pick_status.json b/.pick_status.json index 37c0d9729c2..1140a73f145 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -382,7 +382,7 @@ "description": "intel/fs: Write the address register with NoMask for MOV_INDIRECT", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "master_sha": null, "because_sha": null }, diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp index 036aa58cc7c..61ac0893b9a 100644 --- a/src/intel/compiler/brw_fs_generator.cpp +++ b/src/intel/compiler/brw_fs_generator.cpp @@ -452,8 +452,17 @@ fs_generator::generate_mov_indirect(fs_inst *inst, * In the end, while base_offset is nice to look at in the generated * code, using it saves us 0 instructions and would require quite a bit * of case-by-case work. It's just not worth it. + * + * There's some sort of HW bug on Gen12 which causes issues if we write + * to the address register in control-flow. Since we only ever touch + * the address register from the generator, we can easily enough work + * around it by setting NoMask on the add. */ + brw_push_insn_state(p); + if (devinfo->gen == 12) + brw_set_default_mask_control(p, BRW_MASK_DISABLE); brw_ADD(p, addr, indirect_byte_offset, brw_imm_uw(imm_byte_offset)); + brw_pop_insn_state(p); brw_set_default_swsb(p, tgl_swsb_regdist(1)); if (type_sz(reg.type) > 4 && |