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| author | Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> | 2019-08-08 09:16:05 -0700 |
|---|---|---|
| committer | Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> | 2019-08-09 11:50:45 -0700 |
| commit | c82672c9c146f215314a40afb696164bad080746 (patch) | |
| tree | ac9cfba6ca4ec1142bb5c0c36302e4ae19f3824f | |
| parent | 5ad83015cd3c6df7434e69a954bf4e2a950357ba (diff) | |
| download | mesa-c82672c9c146f215314a40afb696164bad080746.tar.gz | |
pan/midgard: Account for swizzle/mask in st_vary
Register allocation for varying stores is a bit different, since the
instructions ignore the writemask (varyings are normalized
packed/vectorized..)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
| -rw-r--r-- | src/panfrost/midgard/midgard_ra.c | 16 |
1 files changed, 14 insertions, 2 deletions
diff --git a/src/panfrost/midgard/midgard_ra.c b/src/panfrost/midgard/midgard_ra.c index cf8c7b617e4..6d8f32e4480 100644 --- a/src/panfrost/midgard/midgard_ra.c +++ b/src/panfrost/midgard/midgard_ra.c @@ -771,8 +771,20 @@ install_registers_instr( ins->load_store.reg = src.reg - 26; - /* TODO: swizzle/mask */ - } else { + unsigned shift = __builtin_ctz(src.mask); + unsigned adjusted_mask = src.mask >> shift; + assert(((adjusted_mask + 1) & adjusted_mask) == 0); + + unsigned new_swizzle = 0; + for (unsigned q = 0; q < 4; ++q) { + unsigned c = (ins->load_store.swizzle >> (2*q)) & 3; + new_swizzle |= (c + shift) << (2*q); + } + + ins->load_store.swizzle = compose_swizzle( + new_swizzle, src.mask, + default_phys_reg(0), src); + } else { unsigned r = encodes_src ? args.src[0] : args.dest; |