intel/nir/rt: fixup primitive id

There is a delta index value in the hit structure, we forgot to add it
to the base value.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 046571479028 ("intel/nir/rt: add more helpers for ray queries")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7565
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19346>
(cherry picked from commit 610639682533783796fe32bdcb2b4d3375fae56f)

3 files changed, 37 insertions, 14 deletions

diff --git a/.pick_status.json b/.pick_status.json
index f7c68571f61..1a22f249196 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -1201,7 +1201,7 @@
         "description": "intel/nir/rt: fixup primitive id",
         "nominated": true,
         "nomination_type": 1,
-        "resolution": 0,
+        "resolution": 1,
         "main_sha": null,
         "because_sha": "046571479028aeb5577344a91f0c4d565415f4bc"
     },
diff --git a/src/intel/compiler/brw_nir_lower_rt_intrinsics.c b/src/intel/compiler/brw_nir_lower_rt_intrinsics.c
index fa46168aaea..207d072d2d8 100644
--- a/src/intel/compiler/brw_nir_lower_rt_intrinsics.c
+++ b/src/intel/compiler/brw_nir_lower_rt_intrinsics.c
@@ -48,6 +48,8 @@ static void
 lower_rt_intrinsics_impl(nir_function_impl *impl,
                          const struct intel_device_info *devinfo)
 {
+   bool progress = false;
+
    nir_builder build;
    nir_builder_init(&build, impl);
    nir_builder *b = &build;
@@ -327,6 +329,8 @@ lower_rt_intrinsics_impl(nir_function_impl *impl,
             continue;
          }
 
+         progress = true;
+
          if (sysval) {
             nir_ssa_def_rewrite_uses(&intrin->dest.ssa,
                                      sysval);
@@ -335,8 +339,11 @@ lower_rt_intrinsics_impl(nir_function_impl *impl,
       }
    }
 
-   nir_metadata_preserve(impl, nir_metadata_block_index |
-                               nir_metadata_dominance);
+   nir_metadata_preserve(impl,
+                         progress ?
+                         nir_metadata_none :
+                         (nir_metadata_block_index |
+                          nir_metadata_dominance));
 }
 
 /** Lower ray-tracing system values and intrinsics
diff --git a/src/intel/compiler/brw_nir_rt_builder.h b/src/intel/compiler/brw_nir_rt_builder.h
index c4736f801bd..43c3db45b21 100644
--- a/src/intel/compiler/brw_nir_rt_builder.h
+++ b/src/intel/compiler/brw_nir_rt_builder.h
@@ -396,6 +396,7 @@ struct brw_nir_rt_mem_hit_defs {
    nir_ssa_def *aabb_hit_kind; /**< Only valid for AABB geometry */
    nir_ssa_def *valid;
    nir_ssa_def *leaf_type;
+   nir_ssa_def *prim_index_delta;
    nir_ssa_def *prim_leaf_index;
    nir_ssa_def *bvh_level;
    nir_ssa_def *front_face;
@@ -418,6 +419,8 @@ brw_nir_rt_load_mem_hit_from_addr(nir_builder *b,
    defs->aabb_hit_kind = nir_channel(b, data, 1);
    defs->tri_bary = nir_channels(b, data, 0x6);
    nir_ssa_def *bitfield = nir_channel(b, data, 3);
+   defs->prim_index_delta =
+      nir_ubitfield_extract(b, bitfield, nir_imm_int(b, 0), nir_imm_int(b, 16));
    defs->valid = nir_i2b(b, nir_iand_imm(b, bitfield, 1u << 16));
    defs->leaf_type =
       nir_ubitfield_extract(b, bitfield, nir_imm_int(b, 17), nir_imm_int(b, 3));
@@ -912,17 +915,30 @@ brw_nir_rt_load_primitive_id_from_hit(nir_builder *b,
                     nir_imm_int(b, BRW_RT_BVH_NODE_TYPE_PROCEDURAL));
    }
 
-   /* The IDs are located in the leaf. Take the index of the hit.
-    *
-    * The index in dw[3] for procedural and dw[2] for quad.
-    */
-   nir_ssa_def *offset =
-      nir_bcsel(b, is_procedural,
-                   nir_iadd_imm(b, nir_ishl_imm(b, defs->prim_leaf_index, 2), 12),
-                   nir_imm_int(b, 8));
-   return nir_load_global(b, nir_iadd(b, defs->prim_leaf_ptr,
-                                         nir_u2u64(b, offset)),
-                             4, /* align */ 1, 32);
+   nir_ssa_def *prim_id_proc, *prim_id_quad;
+   nir_push_if(b, is_procedural);
+   {
+      /* For procedural leafs, the index is in dw[3]. */
+      nir_ssa_def *offset =
+         nir_iadd_imm(b, nir_ishl_imm(b, defs->prim_leaf_index, 2), 12);
+      prim_id_proc = nir_load_global(b, nir_iadd(b, defs->prim_leaf_ptr,
+                                                 nir_u2u64(b, offset)),
+                                     4, /* align */ 1, 32);
+   }
+   nir_push_else(b, NULL);
+   {
+      /* For quad leafs, the index is dw[2] and there is a 16bit additional
+       * offset in dw[3].
+       */
+      prim_id_quad = nir_load_global(b, nir_iadd_imm(b, defs->prim_leaf_ptr, 8),
+                                     4, /* align */ 1, 32);
+      prim_id_quad = nir_iadd(b,
+                              prim_id_quad,
+                              defs->prim_index_delta);
+   }
+   nir_pop_if(b, NULL);
+
+   return nir_if_phi(b, prim_id_proc, prim_id_quad);
 }
 
 static inline nir_ssa_def *