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authorKenneth Graunke <kenneth@whitecape.org>2017-11-10 15:36:22 -0800
committerAndres Gomez <agomez@igalia.com>2017-11-21 18:16:46 +0200
commit0465cfe0b0c8c846fc5428123c93bfe5a04b0888 (patch)
tree0eee741b5c13a793d774517b4aeb83206e207edc
parent9229774b86f7c62c576b2308b971f0cd92e194c7 (diff)
downloadmesa-0465cfe0b0c8c846fc5428123c93bfe5a04b0888.tar.gz
intel/tools: Fix detection of enabled shader stages.
We renamed "Function Enable" to "Enable", which broke our detection of whether shaders are enabled or not. So, we'd see a bunch of HS/DS packets with program offsets of 0, and think that was a valid TCS/TES. Fixes: c032cae9ff77e (genxml: Rename "Function Enable" to "Enable".) Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (cherry picked from commit 9a0465b3a3a1a6e8beda7a59506c2e1a1aae776f)
-rw-r--r--src/intel/tools/aubinator_error_decode.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/intel/tools/aubinator_error_decode.c b/src/intel/tools/aubinator_error_decode.c
index 636f56a3365..07d5301c728 100644
--- a/src/intel/tools/aubinator_error_decode.c
+++ b/src/intel/tools/aubinator_error_decode.c
@@ -358,7 +358,7 @@ static void decode(struct gen_spec *spec,
is_simd8 = strcmp(iter.value, "true") == 0;
} else if (strcmp(iter.name, "Dispatch Enable") == 0) {
is_simd8 = strcmp(iter.value, "SIMD8") == 0;
- } else if (strcmp(iter.name, "Function Enable") == 0) {
+ } else if (strcmp(iter.name, "Enable") == 0) {
is_enabled = strcmp(iter.value, "true") == 0;
}
}