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| author | Ilia Mirkin <imirkin@alum.mit.edu> | 2017-02-13 11:14:51 -0500 |
|---|---|---|
| committer | Emil Velikov <emil.l.velikov@gmail.com> | 2017-02-17 18:29:05 +0000 |
| commit | 1d561d8147a0c3142a2c0bc1dc19d091aaa74152 (patch) | |
| tree | 68b0d96e7551bd42aaf7684bcfe6dabc2ad261d2 | |
| parent | 9f669540479768c28557ace2f5aef2025ba70b0a (diff) | |
| download | mesa-1d561d8147a0c3142a2c0bc1dc19d091aaa74152.tar.gz | |
nvc0: disable linked tsc mode in compute launch descriptor
Empirically, this makes things work. Presumably this was originally
copied from the blob, which does make use of linked tsc mode.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99532
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 956556b3c30ce3d38d0af795f9383df3bc2cf8a2)
| -rw-r--r-- | src/gallium/drivers/nouveau/nvc0/nve4_compute.c | 1 | ||||
| -rw-r--r-- | src/gallium/drivers/nouveau/nvc0/nve4_compute.h | 7 |
2 files changed, 6 insertions, 2 deletions
diff --git a/src/gallium/drivers/nouveau/nvc0/nve4_compute.c b/src/gallium/drivers/nouveau/nvc0/nve4_compute.c index d661c000b32..15b4750d3ad 100644 --- a/src/gallium/drivers/nouveau/nvc0/nve4_compute.c +++ b/src/gallium/drivers/nouveau/nvc0/nve4_compute.c @@ -816,6 +816,7 @@ nve4_compute_dump_launch_desc(const struct nve4_cp_launch_desc *desc) debug_printf("barrier count: %u\n", desc->bar_alloc); debug_printf("$r count: %u\n", desc->gpr_alloc); debug_printf("cache split: %s\n", nve4_cache_split_name(desc->cache_split)); + debug_printf("linked tsc: %d\n", desc->linked_tsc); for (i = 0; i < 8; ++i) { uint64_t address; diff --git a/src/gallium/drivers/nouveau/nvc0/nve4_compute.h b/src/gallium/drivers/nouveau/nvc0/nve4_compute.h index b98c65d4a09..5fe58b96718 100644 --- a/src/gallium/drivers/nouveau/nvc0/nve4_compute.h +++ b/src/gallium/drivers/nouveau/nvc0/nve4_compute.h @@ -8,7 +8,10 @@ struct nve4_cp_launch_desc { u32 unk0[8]; u32 entry; - u32 unk9[3]; + u32 unk9[2]; + u32 unk11_0 : 30; + u32 linked_tsc : 1; + u32 unk11_31 : 1; u32 griddim_x : 31; u32 unk12 : 1; u16 griddim_y; @@ -48,7 +51,7 @@ nve4_cp_launch_desc_init_default(struct nve4_cp_launch_desc *desc) memset(desc, 0, sizeof(*desc)); desc->unk0[7] = 0xbc000000; - desc->unk9[2] = 0x44014000; + desc->unk11_0 = 0x04014000; desc->unk47_20 = 0x300; } |