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* Merge 10.7 into 10.8Marko Mäkelä2023-01-101-1/+1
|\ | | | | | | | | | | The MDEV-25004 test innodb_fts.versioning is omitted because ever since commit 685d958e38b825ad9829be311f26729cccf37c46 InnoDB would not allow writes to a database where the redo log file ib_logfile0 is missing.
| * Merge 10.5 into 10.6Marko Mäkelä2023-01-031-1/+1
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| | * header typosmusvaage2022-12-201-1/+1
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* | | mysys: my_rdtsc note about ARM counterDaniel Black2022-01-061-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | As reported in https://github.com/MariaDB/mariadb-docker/issues/338 and later https://github.com/hardkernel/linux/issues/423. While modern kernels support this, it seems older hardware may be stuck at kernel versions without this initialization.
* | | MDEV-27429: Support RISC-V cycle timeralexfanqi2022-01-061-0/+24
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | Adapted from https://github.com/google/benchmark/pull/833 authored by Sam Elliot at lowRISC. This requires the RISCV kernel to set the CY bit of the mcountern register which is done on Linux, but documenting here in case another OS hits a SIGILL here. When CY bit of the mcounteren register is unset, reading the cycle register will cause illegal instruction exception in the next privilege level ( user mode or supervisor mode ). See the privileged isa manual section 3.1.11 in https://github.com/riscv/riscv-isa-manual/releases/latest
* | MDEV-25870 Windows - fix ARM64 cross-compilationVladislav Vaintroub2021-06-071-1/+3
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* MDEV-23249: Support aarch64 architecture timerTzachi Zidenberg2020-07-231-2/+12
| | | | | | | | | | | | | aarch64 timer is available to userspace via arch register. clang's __builtin_readcyclecounter is wrong for aarch64 (reads the PMU cycle counter instead of the archi-timer register), so we don't use it. my_rdtsc unit-test on AWS m6g shows: frequency: 121830845 resolution: 1 overhead: 1 This counter is not strictly increasing, but it is non-decreasing.
* MDEV-19845: Define my_timer_cycles() inlineMarko Mäkelä2019-06-281-15/+110
| | | | | | | | | | | | | | | | | | | | | On clang, use __builtin_readcyclecounter() when available. Hinted by Sergey Vojtovich. (This may lead to runtime failure on ARM systems. The hardware should be available on ARMv8 (AArch64), but access to it may require special privileges.) We remove support for the proprietary Sun Microsystems compiler, and rely on clang or the __GNUC__ assembler syntax instead. For now, we retain support for IA-64 (Itanium) and 32-bit SPARC, even though those platforms are likely no longer widely used. We remove support for clock_gettime(CLOCK_SGI_CYCLE), because Silicon Graphics ceased supporting IRIX in December 2013. This was the only cycle timer interface available for MIPS. On PowerPC, we rely on the GCC 4.8 __builtin_ppc_get_timebase() (or clang __builtin_readcyclecounter()), which should be equivalent to the old assembler code on both 64-bit and 32-bit targets.
* Merge branch '5.5' into 10.1Vicențiu Ciorbaru2019-05-111-1/+1
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| * Update FSF AddressVicențiu Ciorbaru2019-05-111-1/+1
| | | | | | | | * Update wrong zip-code
* | MDEV-9172 - Analyze patches for IBM System zSergey Vojtovich2015-12-091-0/+1
|/ | | | | Extended my_timer_cycles() to support s390. Some compiler tunings for RHEL/SLES RPM packages on s390.
* Updated/added copyright headersKent Boortz2011-06-301-2/+3
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* WL#2373 Use cycle counter for timingMarc Alff2009-11-241-0/+129