1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
|
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -passes=instcombine -S < %s | FileCheck %s
define i1 @ugt_vscale64_x_32() vscale_range(1,16) {
; CHECK-LABEL: @ugt_vscale64_x_32(
; CHECK-NEXT: entry:
; CHECK-NEXT: ret i1 false
;
entry:
%vscale = call i64 @llvm.vscale.i64()
%num_els = shl i64 %vscale, 5
%res = icmp ugt i64 %num_els, 1024
ret i1 %res
}
define i1 @ugt_vscale64_x_31() vscale_range(1,16) {
; CHECK-LABEL: @ugt_vscale64_x_31(
; CHECK-NEXT: entry:
; CHECK-NEXT: ret i1 false
;
entry:
%vscale = call i64 @llvm.vscale.i64()
%num_els = mul i64 %vscale, 31
%res = icmp ugt i64 %num_els, 1024
ret i1 %res
}
define i1 @ugt_vscale16_x_32() vscale_range(1,16) {
; CHECK-LABEL: @ugt_vscale16_x_32(
; CHECK-NEXT: entry:
; CHECK-NEXT: ret i1 false
;
entry:
%vscale = call i16 @llvm.vscale.i16()
%num_els = shl i16 %vscale, 5
%res = icmp ugt i16 %num_els, 1024
ret i1 %res
}
define i1 @ult_vscale16() vscale_range(1,16) {
; CHECK-LABEL: @ult_vscale16(
; CHECK-NEXT: entry:
; CHECK-NEXT: ret i1 false
;
entry:
%vscale = call i16 @llvm.vscale.i16()
%res = icmp ult i16 1024, %vscale
ret i1 %res
}
define i1 @ule_vscale64() vscale_range(1,16) {
; CHECK-LABEL: @ule_vscale64(
; CHECK-NEXT: entry:
; CHECK-NEXT: ret i1 false
;
entry:
%vscale = call i64 @llvm.vscale.i64()
%res = icmp ule i64 1024, %vscale
ret i1 %res
}
define i1 @ueq_vscale64_range4_4() vscale_range(4,4) {
; CHECK-LABEL: @ueq_vscale64_range4_4(
; CHECK-NEXT: entry:
; CHECK-NEXT: ret i1 true
;
entry:
%vscale = call i64 @llvm.vscale.i64()
%res = icmp eq i64 %vscale, 4
ret i1 %res
}
define i1 @ne_vscale64_x_32() vscale_range(1,16) {
; CHECK-LABEL: @ne_vscale64_x_32(
; CHECK-NEXT: entry:
; CHECK-NEXT: ret i1 true
;
entry:
%vscale = call i64 @llvm.vscale.i64()
%num_els = mul i64 %vscale, 32
%res = icmp ne i64 %num_els, 39488
ret i1 %res
}
define i1 @vscale_ule_max() vscale_range(5,10) {
; CHECK-LABEL: @vscale_ule_max(
; CHECK-NEXT: ret i1 true
;
%vscale = call i16 @llvm.vscale.i16()
%res = icmp ule i16 %vscale, 10
ret i1 %res
}
define i1 @vscale_ult_max() vscale_range(5,10) {
; CHECK-LABEL: @vscale_ult_max(
; CHECK-NEXT: [[VSCALE:%.*]] = call i16 @llvm.vscale.i16()
; CHECK-NEXT: [[RES:%.*]] = icmp ult i16 [[VSCALE]], 10
; CHECK-NEXT: ret i1 [[RES]]
;
%vscale = call i16 @llvm.vscale.i16()
%res = icmp ult i16 %vscale, 10
ret i1 %res
}
define i1 @vscale_uge_min() vscale_range(5,10) {
; CHECK-LABEL: @vscale_uge_min(
; CHECK-NEXT: ret i1 true
;
%vscale = call i16 @llvm.vscale.i16()
%res = icmp uge i16 %vscale, 5
ret i1 %res
}
define i1 @vscale_ugt_min() vscale_range(5,10) {
; CHECK-LABEL: @vscale_ugt_min(
; CHECK-NEXT: [[VSCALE:%.*]] = call i16 @llvm.vscale.i16()
; CHECK-NEXT: [[RES:%.*]] = icmp ugt i16 [[VSCALE]], 5
; CHECK-NEXT: ret i1 [[RES]]
;
%vscale = call i16 @llvm.vscale.i16()
%res = icmp ugt i16 %vscale, 5
ret i1 %res
}
define i1 @vscale_uge_no_max() vscale_range(5) {
; CHECK-LABEL: @vscale_uge_no_max(
; CHECK-NEXT: ret i1 true
;
%vscale = call i8 @llvm.vscale.i8()
%res = icmp uge i8 %vscale, 5
ret i1 %res
}
define i1 @vscale_ugt_no_max() vscale_range(5) {
; CHECK-LABEL: @vscale_ugt_no_max(
; CHECK-NEXT: ret i1 false
;
%vscale = call i8 @llvm.vscale.i8()
%res = icmp ugt i8 %vscale, 5
ret i1 %res
}
define i1 @vscale_uge_max_overflow() vscale_range(5,256) {
; CHECK-LABEL: @vscale_uge_max_overflow(
; CHECK-NEXT: ret i1 true
;
%vscale = call i8 @llvm.vscale.i8()
%res = icmp uge i8 %vscale, 5
ret i1 %res
}
define i1 @vscale_ugt_max_overflow() vscale_range(5,256) {
; CHECK-LABEL: @vscale_ugt_max_overflow(
; CHECK-NEXT: [[VSCALE:%.*]] = call i8 @llvm.vscale.i8()
; CHECK-NEXT: [[RES:%.*]] = icmp ugt i8 [[VSCALE]], 5
; CHECK-NEXT: ret i1 [[RES]]
;
%vscale = call i8 @llvm.vscale.i8()
%res = icmp ugt i8 %vscale, 5
ret i1 %res
}
define i1 @vscale_eq_min_overflow() vscale_range(256,300) {
; CHECK-LABEL: @vscale_eq_min_overflow(
; CHECK-NEXT: ret i1 true
;
%vscale = call i8 @llvm.vscale.i8()
%res = icmp eq i8 %vscale, 42
ret i1 %res
}
define i1 @vscale_ult_min_overflow() vscale_range(256,300) {
; CHECK-LABEL: @vscale_ult_min_overflow(
; CHECK-NEXT: ret i1 true
;
%vscale = call i8 @llvm.vscale.i8()
%res = icmp ult i8 %vscale, 42
ret i1 %res
}
define i1 @vscale_ugt_min_overflow() vscale_range(256,300) {
; CHECK-LABEL: @vscale_ugt_min_overflow(
; CHECK-NEXT: ret i1 true
;
%vscale = call i8 @llvm.vscale.i8()
%res = icmp ugt i8 %vscale, 42
ret i1 %res
}
declare i8 @llvm.vscale.i8()
declare i16 @llvm.vscale.i16()
declare i32 @llvm.vscale.i32()
declare i64 @llvm.vscale.i64()
|
