diff options
Diffstat (limited to 'utils')
-rw-r--r-- | utils/FileCheck/FileCheck.cpp | 7 | ||||
-rw-r--r-- | utils/TableGen/CMakeLists.txt | 1 | ||||
-rw-r--r-- | utils/TableGen/CodeGenDAGPatterns.cpp | 5 | ||||
-rw-r--r-- | utils/TableGen/DAGISelMatcherEmitter.cpp | 2 | ||||
-rw-r--r-- | utils/TableGen/GlobalISelEmitter.cpp | 3 | ||||
-rw-r--r-- | utils/TableGen/X86EVEX2VEXTablesEmitter.cpp | 8 | ||||
-rwxr-xr-x | utils/update_llc_test_checks.py | 18 | ||||
-rwxr-xr-x | utils/update_mir_test_checks.py | 3 |
8 files changed, 45 insertions, 2 deletions
diff --git a/utils/FileCheck/FileCheck.cpp b/utils/FileCheck/FileCheck.cpp index 9d808cc875c0..7db97301637d 100644 --- a/utils/FileCheck/FileCheck.cpp +++ b/utils/FileCheck/FileCheck.cpp @@ -62,6 +62,10 @@ static cl::list<std::string> ImplicitCheckNot( "this pattern occur which are not matched by a positive pattern"), cl::value_desc("pattern")); +static cl::list<std::string> GlobalDefines("D", cl::Prefix, + cl::desc("Define a variable to be used in capture patterns."), + cl::value_desc("VAR=VALUE")); + static cl::opt<bool> AllowEmptyInput( "allow-empty", cl::init(false), cl::desc("Allow the input file to be empty. This is useful when making\n" @@ -1295,6 +1299,9 @@ bool CheckInput(SourceMgr &SM, StringRef Buffer, /// VariableTable - This holds all the current filecheck variables. StringMap<StringRef> VariableTable; + for (const auto& Def : GlobalDefines) + VariableTable.insert(StringRef(Def).split('=')); + unsigned i = 0, j = 0, e = CheckStrings.size(); while (true) { StringRef CheckRegion; diff --git a/utils/TableGen/CMakeLists.txt b/utils/TableGen/CMakeLists.txt index 86ff203654d3..e9e6dff086ad 100644 --- a/utils/TableGen/CMakeLists.txt +++ b/utils/TableGen/CMakeLists.txt @@ -43,3 +43,4 @@ add_tablegen(llvm-tblgen LLVM X86RecognizableInstr.cpp CTagsEmitter.cpp ) +set_target_properties(llvm-tblgen PROPERTIES FOLDER "Tablegenning") diff --git a/utils/TableGen/CodeGenDAGPatterns.cpp b/utils/TableGen/CodeGenDAGPatterns.cpp index f6be8da02c32..3b400c1262ec 100644 --- a/utils/TableGen/CodeGenDAGPatterns.cpp +++ b/utils/TableGen/CodeGenDAGPatterns.cpp @@ -603,6 +603,11 @@ bool TypeInfer::EnforceVectorSubVectorTypeIs(TypeSetByHwMode &Vec, auto IsSubVec = [](MVT B, MVT P) -> bool { if (!B.isVector() || !P.isVector()) return false; + // Logically a <4 x i32> is a valid subvector of <n x 4 x i32> + // but until there are obvious use-cases for this, keep the + // types separate. + if (B.isScalableVector() != P.isScalableVector()) + return false; if (B.getVectorElementType() != P.getVectorElementType()) return false; return B.getVectorNumElements() < P.getVectorNumElements(); diff --git a/utils/TableGen/DAGISelMatcherEmitter.cpp b/utils/TableGen/DAGISelMatcherEmitter.cpp index 76370cdad678..672f9f8620fc 100644 --- a/utils/TableGen/DAGISelMatcherEmitter.cpp +++ b/utils/TableGen/DAGISelMatcherEmitter.cpp @@ -974,7 +974,7 @@ void llvm::EmitMatcherTable(const Matcher *TheMatcher, OS << " #undef TARGET_VAL\n"; OS << " SelectCodeCommon(N, MatcherTable,sizeof(MatcherTable));\n"; - OS << "}\n"; + OS << "}\n\n"; // Next up, emit the function for node and pattern predicates: MatcherEmitter.EmitPredicateFunctions(OS); diff --git a/utils/TableGen/GlobalISelEmitter.cpp b/utils/TableGen/GlobalISelEmitter.cpp index fed8ae5a80b0..08649d7f9b5a 100644 --- a/utils/TableGen/GlobalISelEmitter.cpp +++ b/utils/TableGen/GlobalISelEmitter.cpp @@ -2629,6 +2629,9 @@ Error GlobalISelEmitter::importChildMatcher(RuleMatcher &Rule, return Error::success(); } + if (SrcChild->hasAnyPredicate()) + return failedImport("Src pattern child has unsupported predicate"); + // Check for constant immediates. if (auto *ChildInt = dyn_cast<IntInit>(SrcChild->getLeafValue())) { OM.addPredicate<ConstantIntOperandMatcher>(ChildInt->getValue()); diff --git a/utils/TableGen/X86EVEX2VEXTablesEmitter.cpp b/utils/TableGen/X86EVEX2VEXTablesEmitter.cpp index 848e59c07903..05f30facd547 100644 --- a/utils/TableGen/X86EVEX2VEXTablesEmitter.cpp +++ b/utils/TableGen/X86EVEX2VEXTablesEmitter.cpp @@ -155,6 +155,14 @@ void X86EVEX2VEXTablesEmitter::printTable(const std::vector<Entry> &Table, {"VALIGNQZ128rri", "VPALIGNRrri", true}, {"VALIGNDZ128rmi", "VPALIGNRrmi", true}, {"VALIGNQZ128rmi", "VPALIGNRrmi", true}, + {"VSHUFF32X4Z256rmi", "VPERM2F128rm", false}, + {"VSHUFF32X4Z256rri", "VPERM2F128rr", false}, + {"VSHUFF64X2Z256rmi", "VPERM2F128rm", false}, + {"VSHUFF64X2Z256rri", "VPERM2F128rr", false}, + {"VSHUFI32X4Z256rmi", "VPERM2I128rm", false}, + {"VSHUFI32X4Z256rri", "VPERM2I128rr", false}, + {"VSHUFI64X2Z256rmi", "VPERM2I128rm", false}, + {"VSHUFI64X2Z256rri", "VPERM2I128rr", false}, }; // Print the manually added entries diff --git a/utils/update_llc_test_checks.py b/utils/update_llc_test_checks.py index e4e7e2ce41e7..c3320f204a0f 100755 --- a/utils/update_llc_test_checks.py +++ b/utils/update_llc_test_checks.py @@ -58,6 +58,12 @@ ASM_FUNCTION_PPC_RE = re.compile( r'.Lfunc_end[0-9]+:\n', flags=(re.M | re.S)) +ASM_FUNCTION_RISCV_RE = re.compile( + r'^_?(?P<func>[^:]+):[ \t]*#+[ \t]*@(?P=func)\n[^:]*?' + r'(?P<body>^##?[ \t]+[^:]+:.*?)\s*' + r'.Lfunc_end[0-9]+:\n', + flags=(re.M | re.S)) + ASM_FUNCTION_SYSTEMZ_RE = re.compile( r'^_?(?P<func>[^:]+):[ \t]*#+[ \t]*@(?P=func)\n' r'[ \t]+.cfi_startproc\n' @@ -135,6 +141,16 @@ def scrub_asm_powerpc64(asm, args): asm = SCRUB_TRAILING_WHITESPACE_RE.sub(r'', asm) return asm +def scrub_asm_riscv(asm): + # Scrub runs of whitespace out of the assembly, but leave the leading + # whitespace in place. + asm = SCRUB_WHITESPACE_RE.sub(r' ', asm) + # Expand the tabs used for indentation. + asm = string.expandtabs(asm, 2) + # Strip trailing whitespace. + asm = SCRUB_TRAILING_WHITESPACE_RE.sub(r'', asm) + return asm + def scrub_asm_systemz(asm, args): # Scrub runs of whitespace out of the assembly, but leave the leading # whitespace in place. @@ -161,6 +177,8 @@ def build_function_body_dictionary(raw_tool_output, triple, prefixes, func_dict, 'armeb-eabi': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_RE), 'powerpc64': (scrub_asm_powerpc64, ASM_FUNCTION_PPC_RE), 'powerpc64le': (scrub_asm_powerpc64, ASM_FUNCTION_PPC_RE), + 'riscv32': (scrub_asm_riscv, ASM_FUNCTION_RISCV_RE), + 'riscv64': (scrub_asm_riscv, ASM_FUNCTION_RISCV_RE), 's390x': (scrub_asm_systemz, ASM_FUNCTION_SYSTEMZ_RE), } handlers = None diff --git a/utils/update_mir_test_checks.py b/utils/update_mir_test_checks.py index 015c4279bad7..2934f09f6b37 100755 --- a/utils/update_mir_test_checks.py +++ b/utils/update_mir_test_checks.py @@ -254,7 +254,8 @@ def add_check_lines(test, output_lines, prefix, func_name, single_bb, func_line = func_line.replace( vreg.group(1), '[[{}:%[0-9]+]]'.format(name), 1) for number, name in vreg_map.items(): - func_line = func_line.replace(number, '[[{}]]'.format(name)) + func_line = re.sub(r'{}\b'.format(number), '[[{}]]'.format(name), + func_line) check_line = '{}: {}'.format(check, func_line[indent:]).rstrip() output_lines.append(check_line) |