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path: root/drivers/pinctrl/aspeed
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* pinctrl: aspeed: g4: Fix mux configuration for GPIOs AA[4-7], AB[0-7]Andrew Jeffery2017-01-261-16/+16
* pinctrl: aspeed: Fix kerneldoc return descriptionsAndrew Jeffery2016-12-281-6/+6
* pinctrl: aspeed-g5: Add mux configuration for all pinsAndrew Jeffery2016-12-282-4/+1475
* pinctrl: aspeed-g4: Add mux configuration for all pinsAndrew Jeffery2016-12-271-13/+1084
* pinctrl: aspeed: Read and write bits in LPC and GFX controllersAndrew Jeffery2016-12-274-88/+171
* pinctrl-aspeed-g5: Never set SCU90[6]Andrew Jeffery2016-11-071-1/+1
* pinctrl: aspeed-g5: Fix pin association of SPI1 functionAndrew Jeffery2016-10-181-8/+78
* pinctrl: aspeed-g5: Fix GPIOE1 typoAndrew Jeffery2016-10-181-1/+1
* pinctrl: aspeed-g5: Fix names of GPID2 pinsAndrew Jeffery2016-10-181-6/+6
* pinctrl: aspeed: "Not enabled" is a significant mux stateAndrew Jeffery2016-10-181-5/+7
* pinctrl: aspeed: fix regmap error handlingArnd Bergmann2016-09-131-3/+3
* pinctrl: Add pinctrl-aspeed-g5 driverAndrew Jeffery2016-09-073-0/+817
* pinctrl: Add pinctrl-aspeed-g4 driverAndrew Jeffery2016-09-073-0/+1240
* pinctrl: Add core support for Aspeed SoCsAndrew Jeffery2016-09-074-0/+1079
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