summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/intel_pm.c
Commit message (Expand)AuthorAgeFilesLines
* drm/i915: Workaround broken BIOS DBUF configuration on TGL/RKLVille Syrjälä2022-02-071-0/+68
* drm/i915: Populate pipe dbuf slices more accurately during readoutVille Syrjälä2022-02-071-5/+8
* drm/i915: Allow !join_mbus cases for adlp+ dbuf configurationVille Syrjälä2022-02-071-20/+46
* drm/i915: Move GT registers to their own header fileMatt Roper2022-02-021-0/+1
* Merge drm/drm-next into drm-intel-nextRodrigo Vivi2022-01-311-4/+33
|\
| * Merge tag 'drm-intel-next-2021-12-14' of ssh://git.freedesktop.org/git/drm/dr...Dave Airlie2021-12-171-16/+25
| |\
| * \ Merge tag 'drm-intel-gt-next-2021-12-09' of git://anongit.freedesktop.org/drm...Dave Airlie2021-12-101-5/+34
| |\ \
| | * | drm/i915: Use per device iommu checkTvrtko Ursulin2021-12-011-1/+1
| | * | Merge drm/drm-next into drm-intel-gt-nextTvrtko Ursulin2021-11-221-0/+12
| | |\ \
| | * | | drm/i915/dg2: Add initial gt/ctx/engine workaroundsMatt Roper2021-11-111-1/+20
| | * | | drm/i915/xehpsdv: Add initial workaroundsStuart Summers2021-11-111-1/+11
| | * | | drm/i915: Rename GT_STEP to GRAPHICS_STEPJosé Roberto de Souza2021-11-021-3/+3
* | | | | drm/i915: Use single_enabled_crtc() in i9xx_update_wm()Ville Syrjälä2022-01-261-15/+11
* | | | | drm/i915: Use the correct plane source width in watermark calculationsVille Syrjälä2022-01-261-11/+10
* | | | | drm/i915: Fix up pixel_rate vs. clock confusion in wm calculationsVille Syrjälä2022-01-261-30/+22
* | | | | drm/i915: Don't allocate extra ddb during async flip for DG2Stanislav Lisovskiy2022-01-261-0/+19
* | | | | drm/i915: Use wm0 only during async flips for DG2Stanislav Lisovskiy2022-01-261-1/+13
* | | | | drm/i915: Pass plane to watermark calculation functionsStanislav Lisovskiy2022-01-261-16/+21
* | | | | drm/i915: Clean up pre-skl primary plane registersVille Syrjälä2022-01-241-1/+1
* | | | | drm/i915: Remove zombie async flip vt-d w/aVille Syrjälä2022-01-191-12/+0
* | | | | drm/i915: Use REG_BIT() & co. for universal plane bitsVille Syrjälä2022-01-181-6/+6
* | | | | drm/i915/pcode: rename sandybridge_pcode_* to snb_pcode_*Jani Nikula2022-01-131-11/+9
* | | | | drm/i915/gt: Move engine registers to their own headerMatt Roper2022-01-111-0/+1
* | | | | drm/i915: Use RING_PSMI_CTL rather than per-engine macrosMatt Roper2022-01-111-2/+2
* | | | | drm/i915: Parameterize ECOSKPDMatt Roper2022-01-111-2/+4
* | | | | drm/i915: Fix possible NULL pointer dereferences in i9xx_update_wm()Harish Chegondi2022-01-071-1/+1
* | | | | drm/i915/fbc: Parametrize FBC register offsetsVille Syrjälä2021-12-151-13/+18
| |_|_|/ |/| | |
* | | | drm/i915: Relocate intel_crtc_for_plane()Ville Syrjälä2021-12-091-0/+14
* | | | drm/i915/trace: split out display trace to a separate fileJani Nikula2021-12-091-1/+1
* | | | drm/i915/fbc: Eliminate racy intel_fbc_is_active() usageVille Syrjälä2021-12-031-7/+2
* | | | drm/i915/dg2: extend Wa_1409120013 to DG2Matt Atwood2021-12-021-2/+2
* | | | drm/i915/crtc: rename intel_get_crtc_for_plane() to intel_crtc_for_plane()Jani Nikula2021-12-021-2/+2
* | | | drm/i915/crtc: rename intel_get_crtc_for_pipe() to intel_crtc_for_pipe()Jani Nikula2021-12-021-4/+4
|/ / /
* | | Revert "drm/i915/dg2: Tile 4 plane format support"Stanislav Lisovskiy2021-11-241-1/+0
* | | drm/i915/dg2: Tile 4 plane format supportStanislav Lisovskiy2021-11-231-0/+1
* | | drm/i915/dg2: Implement WM0 cursor WA for DG2Stanislav Lisovskiy2021-11-191-5/+13
* | | drm/i915/fbc: Start passing around intel_fbcVille Syrjälä2021-11-111-1/+1
* | | drm/i915/fbc: Clean up all register definesVille Syrjälä2021-11-111-7/+7
* | | Merge drm/drm-next into drm-intel-nextJani Nikula2021-10-291-0/+12
|\ \ \ | | |/ | |/|
| * | BackMerge tag 'v5.15-rc7' into drm-nextDave Airlie2021-10-281-0/+12
| |\ \ | | |/ | |/|
| | * drm/i915: Extend the async flip VT-d w/a to skl/bxtVille Syrjälä2021-10-051-0/+12
* | | drm/i915: Move intel_format_info_is_yuv_semiplanar() to intel_fb.cImre Deak2021-10-211-0/+1
* | | drm/i915: Avoid bitwise vs logical OR warning in snb_wm_latency_quirk()Nathan Chancellor2021-10-181-3/+3
|/ /
* | drm/i915: split out intel_pcode.[ch] to separate fileJani Nikula2021-10-141-1/+1
* | drm/i915: split out vlv sideband to a separate fileJani Nikula2021-10-141-0/+1
* | drm/i195: Make the async flip VT-d workaround dynamicVille Syrjälä2021-10-041-26/+0
* | drm/i915: Extend the async flip VT-d w/a to skl/bxtVille Syrjälä2021-10-041-0/+12
* | drm/i915: constify display wm vtableDave Airlie2021-09-291-23/+57
* | drm/i915: constify clock gating init vtable.Dave Airlie2021-09-291-24/+54
* | drm/i915: split watermark vfuncs from display vtable.Dave Airlie2021-09-291-20/+20
View Lorry Controller Status