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-rw-r--r--drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c8
-rw-r--r--drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c54
-rw-r--r--drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h2
-rw-r--r--drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c18
-rw-r--r--drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c57
5 files changed, 77 insertions, 62 deletions
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index 56eb22554197..9607a7644d4b 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
@@ -71,7 +71,6 @@ static void _dpu_crtc_setup_blend_cfg(struct dpu_crtc_mixer *mixer,
{
struct dpu_hw_mixer *lm = mixer->hw_lm;
uint32_t blend_op;
- struct drm_format_name_buf format_name;
/* default to opaque blending */
blend_op = DPU_BLEND_FG_ALPHA_FG_CONST |
@@ -87,9 +86,8 @@ static void _dpu_crtc_setup_blend_cfg(struct dpu_crtc_mixer *mixer,
lm->ops.setup_blend_config(lm, pstate->stage,
0xFF, 0, blend_op);
- DPU_DEBUG("format:%s, alpha_en:%u blend_op:0x%x\n",
- drm_get_format_name(format->base.pixel_format, &format_name),
- format->alpha_enable, blend_op);
+ DPU_DEBUG("format:%p4cc, alpha_en:%u blend_op:0x%x\n",
+ &format->base.pixel_format, format->alpha_enable, blend_op);
}
static void _dpu_crtc_program_lm_output_roi(struct drm_crtc *crtc)
@@ -576,7 +574,7 @@ static void dpu_crtc_atomic_flush(struct drm_crtc *crtc,
* of those planes explicitly here prior to plane flush.
*/
drm_atomic_crtc_for_each_plane(plane, crtc)
- dpu_plane_restore(plane);
+ dpu_plane_restore(plane, state);
/* update performance setting before crtc kickoff */
dpu_core_perf_crtc_update(crtc, 1, false);
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
index f898a8f67b7f..df7f3d3afd8b 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
@@ -10,10 +10,11 @@
#include <linux/debugfs.h>
#include <linux/dma-buf.h>
+#include <drm/drm_atomic.h>
#include <drm/drm_atomic_uapi.h>
#include <drm/drm_damage_helper.h>
#include <drm/drm_file.h>
-#include <drm/drm_gem_framebuffer_helper.h>
+#include <drm/drm_gem_atomic_helper.h>
#include "msm_drv.h"
#include "dpu_kms.h"
@@ -892,7 +893,7 @@ static int dpu_plane_prepare_fb(struct drm_plane *plane,
* we can use msm_atomic_prepare_fb() instead of doing the
* implicit fence and fb prepare by hand here.
*/
- drm_gem_fb_prepare_fb(plane, new_state);
+ drm_gem_plane_helper_prepare_fb(plane, new_state);
if (pstate->aspace) {
ret = msm_framebuffer_prepare(new_state->fb,
@@ -950,44 +951,47 @@ static bool dpu_plane_validate_src(struct drm_rect *src,
}
static int dpu_plane_atomic_check(struct drm_plane *plane,
- struct drm_plane_state *state)
+ struct drm_atomic_state *state)
{
+ struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
+ plane);
int ret = 0, min_scale;
struct dpu_plane *pdpu = to_dpu_plane(plane);
- struct dpu_plane_state *pstate = to_dpu_plane_state(state);
+ struct dpu_plane_state *pstate = to_dpu_plane_state(new_plane_state);
const struct drm_crtc_state *crtc_state = NULL;
const struct dpu_format *fmt;
struct drm_rect src, dst, fb_rect = { 0 };
uint32_t min_src_size, max_linewidth;
- if (state->crtc)
- crtc_state = drm_atomic_get_new_crtc_state(state->state,
- state->crtc);
+ if (new_plane_state->crtc)
+ crtc_state = drm_atomic_get_new_crtc_state(state,
+ new_plane_state->crtc);
min_scale = FRAC_16_16(1, pdpu->pipe_sblk->maxupscale);
- ret = drm_atomic_helper_check_plane_state(state, crtc_state, min_scale,
- pdpu->pipe_sblk->maxdwnscale << 16,
- true, true);
+ ret = drm_atomic_helper_check_plane_state(new_plane_state, crtc_state,
+ min_scale,
+ pdpu->pipe_sblk->maxdwnscale << 16,
+ true, true);
if (ret) {
DPU_DEBUG_PLANE(pdpu, "Check plane state failed (%d)\n", ret);
return ret;
}
- if (!state->visible)
+ if (!new_plane_state->visible)
return 0;
- src.x1 = state->src_x >> 16;
- src.y1 = state->src_y >> 16;
- src.x2 = src.x1 + (state->src_w >> 16);
- src.y2 = src.y1 + (state->src_h >> 16);
+ src.x1 = new_plane_state->src_x >> 16;
+ src.y1 = new_plane_state->src_y >> 16;
+ src.x2 = src.x1 + (new_plane_state->src_w >> 16);
+ src.y2 = src.y1 + (new_plane_state->src_h >> 16);
- dst = drm_plane_state_dest(state);
+ dst = drm_plane_state_dest(new_plane_state);
- fb_rect.x2 = state->fb->width;
- fb_rect.y2 = state->fb->height;
+ fb_rect.x2 = new_plane_state->fb->width;
+ fb_rect.y2 = new_plane_state->fb->height;
max_linewidth = pdpu->catalog->caps->max_linewidth;
- fmt = to_dpu_format(msm_framebuffer_format(state->fb));
+ fmt = to_dpu_format(msm_framebuffer_format(new_plane_state->fb));
min_src_size = DPU_FORMAT_IS_YUV(fmt) ? 2 : 1;
@@ -1237,23 +1241,24 @@ static void _dpu_plane_atomic_disable(struct drm_plane *plane)
}
static void dpu_plane_atomic_update(struct drm_plane *plane,
- struct drm_plane_state *old_state)
+ struct drm_atomic_state *state)
{
struct dpu_plane *pdpu = to_dpu_plane(plane);
- struct drm_plane_state *state = plane->state;
+ struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
+ plane);
pdpu->is_error = false;
DPU_DEBUG_PLANE(pdpu, "\n");
- if (!state->visible) {
+ if (!new_state->visible) {
_dpu_plane_atomic_disable(plane);
} else {
dpu_plane_sspp_atomic_update(plane);
}
}
-void dpu_plane_restore(struct drm_plane *plane)
+void dpu_plane_restore(struct drm_plane *plane, struct drm_atomic_state *state)
{
struct dpu_plane *pdpu;
@@ -1266,8 +1271,7 @@ void dpu_plane_restore(struct drm_plane *plane)
DPU_DEBUG_PLANE(pdpu, "\n");
- /* last plane state is same as current state */
- dpu_plane_atomic_update(plane, plane->state);
+ dpu_plane_atomic_update(plane, state);
}
static void dpu_plane_destroy(struct drm_plane *plane)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h
index 13a983fa8213..03b6365a750c 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h
@@ -88,7 +88,7 @@ void dpu_plane_get_ctl_flush(struct drm_plane *plane, struct dpu_hw_ctl *ctl,
* dpu_plane_restore - restore hw state if previously power collapsed
* @plane: Pointer to drm plane structure
*/
-void dpu_plane_restore(struct drm_plane *plane);
+void dpu_plane_restore(struct drm_plane *plane, struct drm_atomic_state *state);
/**
* dpu_plane_flush - final plane operations before commit flush
diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c b/drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c
index da3cc1d8c331..9aecca919f24 100644
--- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c
+++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c
@@ -4,6 +4,7 @@
* Author: Rob Clark <robdclark@gmail.com>
*/
+#include <drm/drm_atomic.h>
#include <drm/drm_damage_helper.h>
#include <drm/drm_fourcc.h>
@@ -106,23 +107,24 @@ static void mdp4_plane_cleanup_fb(struct drm_plane *plane,
static int mdp4_plane_atomic_check(struct drm_plane *plane,
- struct drm_plane_state *state)
+ struct drm_atomic_state *state)
{
return 0;
}
static void mdp4_plane_atomic_update(struct drm_plane *plane,
- struct drm_plane_state *old_state)
+ struct drm_atomic_state *state)
{
- struct drm_plane_state *state = plane->state;
+ struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
+ plane);
int ret;
ret = mdp4_plane_mode_set(plane,
- state->crtc, state->fb,
- state->crtc_x, state->crtc_y,
- state->crtc_w, state->crtc_h,
- state->src_x, state->src_y,
- state->src_w, state->src_h);
+ new_state->crtc, new_state->fb,
+ new_state->crtc_x, new_state->crtc_y,
+ new_state->crtc_w, new_state->crtc_h,
+ new_state->src_x, new_state->src_y,
+ new_state->src_w, new_state->src_h);
/* atomic_check should have ensured that this doesn't fail */
WARN_ON(ret < 0);
}
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c
index 83423092de2f..8c9f2f492178 100644
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c
+++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c
@@ -5,6 +5,7 @@
* Author: Rob Clark <robdclark@gmail.com>
*/
+#include <drm/drm_atomic.h>
#include <drm/drm_damage_helper.h>
#include <drm/drm_fourcc.h>
#include <drm/drm_print.h>
@@ -403,76 +404,84 @@ static int mdp5_plane_atomic_check_with_state(struct drm_crtc_state *crtc_state,
}
static int mdp5_plane_atomic_check(struct drm_plane *plane,
- struct drm_plane_state *state)
+ struct drm_atomic_state *state)
{
+ struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state,
+ plane);
+ struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
+ plane);
struct drm_crtc *crtc;
struct drm_crtc_state *crtc_state;
- crtc = state->crtc ? state->crtc : plane->state->crtc;
+ crtc = new_plane_state->crtc ? new_plane_state->crtc : old_plane_state->crtc;
if (!crtc)
return 0;
- crtc_state = drm_atomic_get_existing_crtc_state(state->state, crtc);
+ crtc_state = drm_atomic_get_existing_crtc_state(state,
+ crtc);
if (WARN_ON(!crtc_state))
return -EINVAL;
- return mdp5_plane_atomic_check_with_state(crtc_state, state);
+ return mdp5_plane_atomic_check_with_state(crtc_state, new_plane_state);
}
static void mdp5_plane_atomic_update(struct drm_plane *plane,
- struct drm_plane_state *old_state)
+ struct drm_atomic_state *state)
{
- struct drm_plane_state *state = plane->state;
+ struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
+ plane);
DBG("%s: update", plane->name);
- if (plane_enabled(state)) {
+ if (plane_enabled(new_state)) {
int ret;
ret = mdp5_plane_mode_set(plane,
- state->crtc, state->fb,
- &state->src, &state->dst);
+ new_state->crtc, new_state->fb,
+ &new_state->src, &new_state->dst);
/* atomic_check should have ensured that this doesn't fail */
WARN_ON(ret < 0);
}
}
static int mdp5_plane_atomic_async_check(struct drm_plane *plane,
- struct drm_plane_state *state)
+ struct drm_atomic_state *state)
{
- struct mdp5_plane_state *mdp5_state = to_mdp5_plane_state(state);
+ struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
+ plane);
+ struct mdp5_plane_state *mdp5_state = to_mdp5_plane_state(new_plane_state);
struct drm_crtc_state *crtc_state;
int min_scale, max_scale;
int ret;
- crtc_state = drm_atomic_get_existing_crtc_state(state->state,
- state->crtc);
+ crtc_state = drm_atomic_get_existing_crtc_state(state,
+ new_plane_state->crtc);
if (WARN_ON(!crtc_state))
return -EINVAL;
if (!crtc_state->active)
return -EINVAL;
- mdp5_state = to_mdp5_plane_state(state);
+ mdp5_state = to_mdp5_plane_state(new_plane_state);
/* don't use fast path if we don't have a hwpipe allocated yet */
if (!mdp5_state->hwpipe)
return -EINVAL;
/* only allow changing of position(crtc x/y or src x/y) in fast path */
- if (plane->state->crtc != state->crtc ||
- plane->state->src_w != state->src_w ||
- plane->state->src_h != state->src_h ||
- plane->state->crtc_w != state->crtc_w ||
- plane->state->crtc_h != state->crtc_h ||
+ if (plane->state->crtc != new_plane_state->crtc ||
+ plane->state->src_w != new_plane_state->src_w ||
+ plane->state->src_h != new_plane_state->src_h ||
+ plane->state->crtc_w != new_plane_state->crtc_w ||
+ plane->state->crtc_h != new_plane_state->crtc_h ||
!plane->state->fb ||
- plane->state->fb != state->fb)
+ plane->state->fb != new_plane_state->fb)
return -EINVAL;
min_scale = FRAC_16_16(1, 8);
max_scale = FRAC_16_16(8, 1);
- ret = drm_atomic_helper_check_plane_state(state, crtc_state,
+ ret = drm_atomic_helper_check_plane_state(new_plane_state, crtc_state,
min_scale, max_scale,
true, true);
if (ret)
@@ -485,15 +494,17 @@ static int mdp5_plane_atomic_async_check(struct drm_plane *plane,
* also assign/unassign the hwpipe(s) tied to the plane. We avoid
* taking the fast path for both these reasons.
*/
- if (state->visible != plane->state->visible)
+ if (new_plane_state->visible != plane->state->visible)
return -EINVAL;
return 0;
}
static void mdp5_plane_atomic_async_update(struct drm_plane *plane,
- struct drm_plane_state *new_state)
+ struct drm_atomic_state *state)
{
+ struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
+ plane);
struct drm_framebuffer *old_fb = plane->state->fb;
plane->state->src_x = new_state->src_x;