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authorPeter Wang <peter.wang@mediatek.com>2022-08-03 07:54:35 +0800
committerMartin K. Petersen <martin.petersen@oracle.com>2022-08-22 22:58:29 -0400
commit364893575d139546c5dc6255c12c72cdc929bf93 (patch)
tree4cfbea3984bc1e572a6178184728c56ff4cc6787 /drivers/ufs
parent4d869fe67acccfc436c6030ceaba4779174019a4 (diff)
downloadlinux-364893575d139546c5dc6255c12c72cdc929bf93.tar.gz
scsi: ufs: ufs-mediatek: Dump more registers
Dump more proprietary UFSHCI status registers for easier issue breakdown. Link: https://lore.kernel.org/r/20220802235437.4547-4-stanley.chu@mediatek.com Reviewed-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Peter Wang <peter.wang@mediatek.com> Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Diffstat (limited to 'drivers/ufs')
-rw-r--r--drivers/ufs/host/ufs-mediatek.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 62bc3b791b38..2b85d2406714 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -1284,13 +1284,16 @@ fail:
static void ufs_mtk_dbg_register_dump(struct ufs_hba *hba)
{
- ufshcd_dump_regs(hba, REG_UFS_REFCLK_CTRL, 0x4, "Ref-Clk Ctrl ");
+ /* Dump ufshci register 0x140 ~ 0x14C */
+ ufshcd_dump_regs(hba, REG_UFS_XOUFS_CTRL, 0x10,
+ "XOUFS Ctrl (0x140): ");
ufshcd_dump_regs(hba, REG_UFS_EXTREG, 0x4, "Ext Reg ");
+ /* Dump ufshci register 0x2200 ~ 0x22AC */
ufshcd_dump_regs(hba, REG_UFS_MPHYCTRL,
REG_UFS_REJECT_MON - REG_UFS_MPHYCTRL + 4,
- "MPHY Ctrl ");
+ "MPHY Ctrl (0x2200): ");
/* Direct debugging information to REG_MTK_PROBE */
ufs_mtk_dbg_sel(hba);