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authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>2016-05-08 00:08:05 +0300
committerDavid S. Miller <davem@davemloft.net>2016-05-09 00:15:23 -0400
commit7927092253da598331542bdedb8fd5612f161f80 (patch)
tree81da7a0bf972b3c6a6bf8f577ac89dbaaf0c2194 /drivers/net/ethernet/renesas
parent59efcbaf434964f324928619fcd0a6f506134753 (diff)
downloadlinux-7927092253da598331542bdedb8fd5612f161f80.tar.gz
sh_eth: call sh_eth_tsu_write() from sh_eth_chip_reset_giga()
sh_eth_chip_reset_giga() doesn't really need to use direct iowrite32() when writing to the ARSTR register, it can use sh_eth_tsu_write() as all other chip_reset() methods. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/renesas')
-rw-r--r--drivers/net/ethernet/renesas/sh_eth.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
index 07e29638299f..23678e7cce6b 100644
--- a/drivers/net/ethernet/renesas/sh_eth.c
+++ b/drivers/net/ethernet/renesas/sh_eth.c
@@ -725,8 +725,9 @@ static struct sh_eth_cpu_data sh7757_data = {
#define GIGA_MAHR(port) (SH_GIGA_ETH_BASE + 0x800 * (port) + 0x05c0)
static void sh_eth_chip_reset_giga(struct net_device *ndev)
{
- int i;
+ struct sh_eth_private *mdp = netdev_priv(ndev);
u32 mahr[2], malr[2];
+ int i;
/* save MAHR and MALR */
for (i = 0; i < 2; i++) {
@@ -735,7 +736,7 @@ static void sh_eth_chip_reset_giga(struct net_device *ndev)
}
/* reset device */
- iowrite32(ARSTR_ARST, (void *)(SH_GIGA_ETH_BASE + 0x1800));
+ sh_eth_tsu_write(mdp, ARSTR_ARST, ARSTR);
mdelay(1);
/* restore MAHR and MALR */