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| author | Marc Zyngier <maz@kernel.org> | 2022-11-28 11:50:41 +0000 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2022-11-28 11:50:41 +0000 |
| commit | 63ab33c08c41130ad82155515803e90d0e71e8ef (patch) | |
| tree | 7b0ba18ce11bd8233659f711484c9445318a519c /drivers/irqchip/irq-loongarch-cpu.c | |
| parent | 247f34f7b80357943234f93f247a1ae6b6c3a740 (diff) | |
| parent | 3d12938dbc048ecb193fec69898d95f6b4813a4b (diff) | |
| download | linux-63ab33c08c41130ad82155515803e90d0e71e8ef.tar.gz | |
Merge branch irq/loongarch-acpi into irq/irqchip-next
* irq/loongarch-acpi:
: .
: More APCI fixes and improvements for the LoongArch architecture:
:
: - Work around trigger type for INTx interrupts described
: via ACPI (Jianmin Lv).
:
: - ACPI support got the HTVEC controller (Huacai Chen)
:
: - Suspend/resume across the board (Huacai Chen)
:
: - Fixes and random cleanups
: .
irqchip/loongarch: Adjust acpi_cascade_irqdomain_init() and sub-routines
irqchip/loongson-pch-lpc: Add suspend/resume support
irqchip/loongson-pch-pic: Add suspend/resume support
irqchip/loongson-eiointc: Add suspend/resume support
irqchip/loongson-htvec: Add suspend/resume support
irqchip/loongson-htvec: Add ACPI init support
irqchip/loongson-liointc: Support to set IRQ type for ACPI path
irqchip/loongson-pch-pic: Support to set IRQ type for ACPI path
irqchip/loongson-pch-pic: Fix translate callback for DT path
ACPI / PCI: fix LPIC IRQ model default PCI IRQ polarity
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'drivers/irqchip/irq-loongarch-cpu.c')
| -rw-r--r-- | drivers/irqchip/irq-loongarch-cpu.c | 30 |
1 files changed, 18 insertions, 12 deletions
diff --git a/drivers/irqchip/irq-loongarch-cpu.c b/drivers/irqchip/irq-loongarch-cpu.c index 741612ba6a52..fdec3e9cfacf 100644 --- a/drivers/irqchip/irq-loongarch-cpu.c +++ b/drivers/irqchip/irq-loongarch-cpu.c @@ -92,18 +92,16 @@ static const struct irq_domain_ops loongarch_cpu_intc_irq_domain_ops = { .xlate = irq_domain_xlate_onecell, }; -static int __init -liointc_parse_madt(union acpi_subtable_headers *header, - const unsigned long end) +static int __init liointc_parse_madt(union acpi_subtable_headers *header, + const unsigned long end) { struct acpi_madt_lio_pic *liointc_entry = (struct acpi_madt_lio_pic *)header; return liointc_acpi_init(irq_domain, liointc_entry); } -static int __init -eiointc_parse_madt(union acpi_subtable_headers *header, - const unsigned long end) +static int __init eiointc_parse_madt(union acpi_subtable_headers *header, + const unsigned long end) { struct acpi_madt_eio_pic *eiointc_entry = (struct acpi_madt_eio_pic *)header; @@ -112,16 +110,24 @@ eiointc_parse_madt(union acpi_subtable_headers *header, static int __init acpi_cascade_irqdomain_init(void) { - acpi_table_parse_madt(ACPI_MADT_TYPE_LIO_PIC, - liointc_parse_madt, 0); - acpi_table_parse_madt(ACPI_MADT_TYPE_EIO_PIC, - eiointc_parse_madt, 0); + int r; + + r = acpi_table_parse_madt(ACPI_MADT_TYPE_LIO_PIC, liointc_parse_madt, 0); + if (r < 0) + return r; + + r = acpi_table_parse_madt(ACPI_MADT_TYPE_EIO_PIC, eiointc_parse_madt, 0); + if (r < 0) + return r; + return 0; } static int __init cpuintc_acpi_init(union acpi_subtable_headers *header, const unsigned long end) { + int ret; + if (irq_domain) return 0; @@ -139,9 +145,9 @@ static int __init cpuintc_acpi_init(union acpi_subtable_headers *header, set_handle_irq(&handle_cpu_irq); acpi_set_irq_model(ACPI_IRQ_MODEL_LPIC, lpic_get_gsi_domain_id); acpi_set_gsi_to_irq_fallback(lpic_gsi_to_irq); - acpi_cascade_irqdomain_init(); + ret = acpi_cascade_irqdomain_init(); - return 0; + return ret; } IRQCHIP_ACPI_DECLARE(cpuintc_v1, ACPI_MADT_TYPE_CORE_PIC, |