diff options
| author | Thierry Reding <treding@nvidia.com> | 2017-11-13 11:20:48 +0100 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2017-12-13 13:42:09 +0100 |
| commit | 7116e9a8022cd468a6a952e1d0d662da73f75ce5 (patch) | |
| tree | 43cdeb873e4172c58e5c30c19ee8469317a99f42 /drivers/gpu/drm/tegra/dc.c | |
| parent | 9b49f674eb205f9a01638ffc4b6add49741955ad (diff) | |
| download | linux-7116e9a8022cd468a6a952e1d0d662da73f75ce5.tar.gz | |
drm/tegra: dc: Support background color
Starting with Tegra124, the interface to set the background color (the
value generated for pixels that are not sourced from any window) is via
a different register. Earlier generations called this the border color.
Reverse the feature flag and assume that IP revisions that don't have
support for background color will support border color instead.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra/dc.c')
| -rw-r--r-- | drivers/gpu/drm/tegra/dc.c | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c index 29777604df39..6cee248601a9 100644 --- a/drivers/gpu/drm/tegra/dc.c +++ b/drivers/gpu/drm/tegra/dc.c @@ -1572,7 +1572,9 @@ static void tegra_crtc_atomic_enable(struct drm_crtc *crtc, WIN_A_OF_INT | WIN_B_OF_INT | WIN_C_OF_INT; tegra_dc_writel(dc, value, DC_CMD_INT_MASK); - if (dc->soc->supports_border_color) + if (dc->soc->supports_background_color) + tegra_dc_writel(dc, 0, DC_DISP_BLEND_BACKGROUND_COLOR); + else tegra_dc_writel(dc, 0, DC_DISP_BORDER_COLOR); /* apply PLL and pixel clock changes */ @@ -1835,7 +1837,7 @@ static const struct host1x_client_ops dc_client_ops = { }; static const struct tegra_dc_soc_info tegra20_dc_soc_info = { - .supports_border_color = true, + .supports_background_color = false, .supports_interlacing = false, .supports_cursor = false, .supports_block_linear = false, @@ -1845,7 +1847,7 @@ static const struct tegra_dc_soc_info tegra20_dc_soc_info = { }; static const struct tegra_dc_soc_info tegra30_dc_soc_info = { - .supports_border_color = true, + .supports_background_color = false, .supports_interlacing = false, .supports_cursor = false, .supports_block_linear = false, @@ -1855,7 +1857,7 @@ static const struct tegra_dc_soc_info tegra30_dc_soc_info = { }; static const struct tegra_dc_soc_info tegra114_dc_soc_info = { - .supports_border_color = true, + .supports_background_color = false, .supports_interlacing = false, .supports_cursor = false, .supports_block_linear = false, @@ -1865,7 +1867,7 @@ static const struct tegra_dc_soc_info tegra114_dc_soc_info = { }; static const struct tegra_dc_soc_info tegra124_dc_soc_info = { - .supports_border_color = false, + .supports_background_color = true, .supports_interlacing = true, .supports_cursor = true, .supports_block_linear = true, @@ -1875,7 +1877,7 @@ static const struct tegra_dc_soc_info tegra124_dc_soc_info = { }; static const struct tegra_dc_soc_info tegra210_dc_soc_info = { - .supports_border_color = false, + .supports_background_color = true, .supports_interlacing = true, .supports_cursor = true, .supports_block_linear = true, |