diff options
| author | Vinay Belgaumkar <vinay.belgaumkar@intel.com> | 2021-11-01 18:26:07 -0700 |
|---|---|---|
| committer | John Harrison <John.C.Harrison@Intel.com> | 2021-11-03 17:44:13 -0700 |
| commit | 493043feed006f75f43a1990ae2ae1178f277628 (patch) | |
| tree | c172029d6ccd591887dbf7e5fc74627a919a36a5 /drivers/gpu/drm/i915/gt/intel_rps.h | |
| parent | 292e4fb05f14d54c90cb165335c6d4dfaf1cfb32 (diff) | |
| download | linux-493043feed006f75f43a1990ae2ae1178f277628.tar.gz | |
drm/i915/guc/slpc: Add waitboost functionality for SLPC
Add helper in RPS code for handling SLPC and non-SLPC paths.
When boost is requested in the SLPC path, we can ask GuC to ramp
up the frequency req by setting the minimum frequency to boost freq.
Reset freq back to the min softlimit when there are no more waiters.
v2: Schedule a worker thread which can boost freq from within
an interrupt context as well.
v3: No need to check against requested freq before scheduling boost
work (Ashutosh)
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211102012608.8609-3-vinay.belgaumkar@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_rps.h')
| -rw-r--r-- | drivers/gpu/drm/i915/gt/intel_rps.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.h b/drivers/gpu/drm/i915/gt/intel_rps.h index 11960d64ca82..407e878d5006 100644 --- a/drivers/gpu/drm/i915/gt/intel_rps.h +++ b/drivers/gpu/drm/i915/gt/intel_rps.h @@ -23,6 +23,7 @@ void intel_rps_disable(struct intel_rps *rps); void intel_rps_park(struct intel_rps *rps); void intel_rps_unpark(struct intel_rps *rps); void intel_rps_boost(struct i915_request *rq); +void intel_rps_dec_waiters(struct intel_rps *rps); int intel_rps_set(struct intel_rps *rps, u8 val); void intel_rps_mark_interactive(struct intel_rps *rps, bool interactive); |