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authorAlvin Lee <Alvin.Lee2@amd.com>2022-04-29 20:41:10 -0400
committerAlex Deucher <alexander.deucher@amd.com>2022-06-03 16:45:01 -0400
commit405bb9eea36a02798631e8409f1182705699d092 (patch)
treede14d26b7129605ff07c3faac504ec7f198e4e23 /drivers/gpu/drm/amd/display/dc/dcn31
parentb6a93844145395068574cbbfaf3aea91d1f24f1a (diff)
downloadlinux-405bb9eea36a02798631e8409f1182705699d092.tar.gz
drm/amd/display: Implement DTBCLK ref switching on dcn32
[WHY & HOW] Implements DTB ref clock switching with reg key default to OFF. Refactors dccg DTBCLK logic to not store redundant state information dccg. Also removes duplicated functions that should be inherited from other dcn versions. Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn31')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.c
index 13dbf99af220..8eeb3b69b5b9 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.c
@@ -590,6 +590,7 @@ void dccg31_set_audio_dtbclk_dto(
phase = div_u64((((unsigned long long)modulo * params->req_audio_dtbclk_khz) + params->ref_dtbclk_khz - 1),
params->ref_dtbclk_khz);
+
REG_WRITE(DCCG_AUDIO_DTBCLK_DTO_MODULO, modulo);
REG_WRITE(DCCG_AUDIO_DTBCLK_DTO_PHASE, phase);