summaryrefslogtreecommitdiff
path: root/arch/sh/include/cpu-sh4/cpu/cache.h
diff options
context:
space:
mode:
authorDave Airlie <airlied@redhat.com>2014-03-18 19:12:31 +1000
committerDave Airlie <airlied@redhat.com>2014-03-18 19:12:31 +1000
commitbcc298bc924e0a990f853ba3e19f8b5a833cba7e (patch)
tree1c87c8f73dc41fd11ee3dacb1b91a7cc8b4798bb /arch/sh/include/cpu-sh4/cpu/cache.h
parent978c6050165bba52eab7ef3581d447eb215def77 (diff)
parentdcb99fd9b08cfe1afe426af4d8d3cbc429190f15 (diff)
downloadlinux-bcc298bc924e0a990f853ba3e19f8b5a833cba7e.tar.gz
Merge tag 'v3.14-rc7' into drm-next
Linux 3.14-rc7 Backmerge to help out Intel guys.
Diffstat (limited to 'arch/sh/include/cpu-sh4/cpu/cache.h')
-rw-r--r--arch/sh/include/cpu-sh4/cpu/cache.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/sh/include/cpu-sh4/cpu/cache.h b/arch/sh/include/cpu-sh4/cpu/cache.h
index 7bfb9e8b069c..92c4cd119b66 100644
--- a/arch/sh/include/cpu-sh4/cpu/cache.h
+++ b/arch/sh/include/cpu-sh4/cpu/cache.h
@@ -17,7 +17,7 @@
#define SH_CACHE_COMBINED 4
#define SH_CACHE_ASSOC 8
-#define CCR 0xff00001c /* Address of Cache Control Register */
+#define SH_CCR 0xff00001c /* Address of Cache Control Register */
#define CCR_CACHE_OCE 0x0001 /* Operand Cache Enable */
#define CCR_CACHE_WT 0x0002 /* Write-Through (for P0,U0,P3) (else writeback)*/
#define CCR_CACHE_CB 0x0004 /* Copy-Back (for P1) (else writethrough) */