Merge tag 'soc-dt-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC devicetree updates from Arnd Bergmann:
 "The devicetree changes overall are again dominated by the Qualcomm
  Snapdragon platform that weighs in at over 300 changesets, but there
  are many updates across other platforms as well, notably Mediatek,
  NXP, Rockchips, Renesas, TI, Samsung and ST Microelectronics. These
  all add new features for existing machines, as well as new machines
  and SoCs.

  The newly added SoCs are:

   - Allwinner T113-s, an Cortex-A7 based variant of the RISC-V based D1
     chip.

   - StarFive JH7110, a RISC-V SoC based on the Sifive U74 core like its
     JH7100 predecessor, but with additional CPU cores and a GPU.

   - Apple M2 as used in current Macbook Air/Pro and Mac Mini gets
     added, with comparable support as its M1 predecessor.

   - Unisoc UMS512 (Tiger T610) is a midrange smartphone SoC

   - Qualcomm IPQ5332 and IPQ9574 are Wi-Fi 7 networking SoCs, based on
     the Cortex-A53 and Cortex-A73 cores, respectively.

   - Qualcomm sa8775p is an automotive SoC derived from the Snapdragon
     family.

  Including the initial board support for the added SoC platforms, there
  are 52 new machines. The largest group are 19 boards industrial
  embedded boards based on the NXP i.MX6 (32-bit) and i.MX8 (64-bit)
  families.

  Others include:

   - Two boards based on the Allwinner f1c200s ultra-low-cost chip

   - Three 'Banana Pi' variants based on the Amlogic g12b (A311D, S922X)
     SoC.

   - The Gl.Inet mv1000 router based on Marvell Armada 3720

   - A Wifi/LTE Dongle based on Qualcomm msm8916

   - Two robotics boards based on Qualcomm QRB chips

   - Three Snapdragon based phones made by Xiaomi

   - Five developments boards based on various Rockchip SoCs, including
     the rk3588s-khadas-edge2 and a few NanoPi models

   - The AM625 Beagleplay industrial SBC

  Another 14 machines get removed: both boards for the obsolete 'oxnas'
  platform, three boards for the Renesas r8a77950 SoC that were only for
  pre-production chips, and various chromebook models based on the
  Qualcomm Sc7180 'trogdor' design that were never part of products"

* tag 'soc-dt-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (836 commits)
  arm64: dts: rockchip: Add support for volume keys to rk3399-pinephone-pro
  arm64: dts: rockchip: Add vdd_cpu_big regulators to rk3588-rock-5b
  arm64: dts: rockchip: Use generic name for es8316 on Pinebook Pro and Rock 5B
  arm64: dts: rockchip: Drop RTC clock-frequency on rk3588-rock-5b
  arm64: dts: apple: t8112: Add PWM controller
  arm64: dts: apple: t600x: Add PWM controller
  arm64: dts: apple: t8103: Add PWM controller
  arm64: dts: rockchip: Add pinctrl gpio-ranges for rk356x
  ARM: dts: nomadik: Replace deprecated spi-gpio properties
  ARM: dts: aspeed-g6: Add UDMA node
  ARM: dts: aspeed: greatlakes: add mctp device
  ARM: dts: aspeed: greatlakes: Add gpio names
  ARM: dts: aspeed: p10bmc: Change power supply info
  arm64: dts: mediatek: mt6795-xperia-m5: Add Bosch BMM050 Magnetometer
  arm64: dts: mediatek: mt6795-xperia-m5: Add Bosch BMA255 Accelerometer
  arm64: dts: mediatek: mt6795: Add tertiary PWM node
  arm64: dts: rockchip: add panel to Anbernic RG353 series
  dt-bindings: arm: Add Data Modul i.MX8M Plus eDM SBC
  dt-bindings: arm: fsl: Add chargebyte Tarragon
  dt-bindings: vendor-prefixes: add chargebyte
  ...

1 files changed, 215 insertions, 0 deletions

diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
new file mode 100644
index 000000000000..2a6d81609284
--- /dev/null
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -0,0 +1,215 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright (C) 2022 StarFive Technology Co., Ltd.
+ * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
+ */
+
+/dts-v1/;
+#include "jh7110.dtsi"
+#include "jh7110-pinfunc.h"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	aliases {
+		i2c0 = &i2c0;
+		i2c2 = &i2c2;
+		i2c5 = &i2c5;
+		i2c6 = &i2c6;
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	cpus {
+		timebase-frequency = <4000000>;
+	};
+
+	memory@40000000 {
+		device_type = "memory";
+		reg = <0x0 0x40000000 0x1 0x0>;
+	};
+
+	gpio-restart {
+		compatible = "gpio-restart";
+		gpios = <&sysgpio 35 GPIO_ACTIVE_HIGH>;
+		priority = <224>;
+	};
+};
+
+&gmac0_rgmii_rxin {
+	clock-frequency = <125000000>;
+};
+
+&gmac0_rmii_refin {
+	clock-frequency = <50000000>;
+};
+
+&gmac1_rgmii_rxin {
+	clock-frequency = <125000000>;
+};
+
+&gmac1_rmii_refin {
+	clock-frequency = <50000000>;
+};
+
+&i2srx_bclk_ext {
+	clock-frequency = <12288000>;
+};
+
+&i2srx_lrck_ext {
+	clock-frequency = <192000>;
+};
+
+&i2stx_bclk_ext {
+	clock-frequency = <12288000>;
+};
+
+&i2stx_lrck_ext {
+	clock-frequency = <192000>;
+};
+
+&mclk_ext {
+	clock-frequency = <12288000>;
+};
+
+&osc {
+	clock-frequency = <24000000>;
+};
+
+&rtc_osc {
+	clock-frequency = <32768>;
+};
+
+&tdm_ext {
+	clock-frequency = <49152000>;
+};
+
+&i2c0 {
+	clock-frequency = <100000>;
+	i2c-sda-hold-time-ns = <300>;
+	i2c-sda-falling-time-ns = <510>;
+	i2c-scl-falling-time-ns = <510>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c0_pins>;
+	status = "okay";
+};
+
+&i2c2 {
+	clock-frequency = <100000>;
+	i2c-sda-hold-time-ns = <300>;
+	i2c-sda-falling-time-ns = <510>;
+	i2c-scl-falling-time-ns = <510>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c2_pins>;
+	status = "okay";
+};
+
+&i2c5 {
+	clock-frequency = <100000>;
+	i2c-sda-hold-time-ns = <300>;
+	i2c-sda-falling-time-ns = <510>;
+	i2c-scl-falling-time-ns = <510>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c5_pins>;
+	status = "okay";
+};
+
+&i2c6 {
+	clock-frequency = <100000>;
+	i2c-sda-hold-time-ns = <300>;
+	i2c-sda-falling-time-ns = <510>;
+	i2c-scl-falling-time-ns = <510>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c6_pins>;
+	status = "okay";
+};
+
+&sysgpio {
+	i2c0_pins: i2c0-0 {
+		i2c-pins {
+			pinmux = <GPIOMUX(57, GPOUT_LOW,
+					      GPOEN_SYS_I2C0_CLK,
+					      GPI_SYS_I2C0_CLK)>,
+				 <GPIOMUX(58, GPOUT_LOW,
+					      GPOEN_SYS_I2C0_DATA,
+					      GPI_SYS_I2C0_DATA)>;
+			bias-disable; /* external pull-up */
+			input-enable;
+			input-schmitt-enable;
+		};
+	};
+
+	i2c2_pins: i2c2-0 {
+		i2c-pins {
+			pinmux = <GPIOMUX(3, GPOUT_LOW,
+					     GPOEN_SYS_I2C2_CLK,
+					     GPI_SYS_I2C2_CLK)>,
+				 <GPIOMUX(2, GPOUT_LOW,
+					     GPOEN_SYS_I2C2_DATA,
+					     GPI_SYS_I2C2_DATA)>;
+			bias-disable; /* external pull-up */
+			input-enable;
+			input-schmitt-enable;
+		};
+	};
+
+	i2c5_pins: i2c5-0 {
+		i2c-pins {
+			pinmux = <GPIOMUX(19, GPOUT_LOW,
+					      GPOEN_SYS_I2C5_CLK,
+					      GPI_SYS_I2C5_CLK)>,
+				 <GPIOMUX(20, GPOUT_LOW,
+					      GPOEN_SYS_I2C5_DATA,
+					      GPI_SYS_I2C5_DATA)>;
+			bias-disable; /* external pull-up */
+			input-enable;
+			input-schmitt-enable;
+		};
+	};
+
+	i2c6_pins: i2c6-0 {
+		i2c-pins {
+			pinmux = <GPIOMUX(16, GPOUT_LOW,
+					      GPOEN_SYS_I2C6_CLK,
+					      GPI_SYS_I2C6_CLK)>,
+				 <GPIOMUX(17, GPOUT_LOW,
+					      GPOEN_SYS_I2C6_DATA,
+					      GPI_SYS_I2C6_DATA)>;
+			bias-disable; /* external pull-up */
+			input-enable;
+			input-schmitt-enable;
+		};
+	};
+
+	uart0_pins: uart0-0 {
+		tx-pins {
+			pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX,
+					     GPOEN_ENABLE,
+					     GPI_NONE)>;
+			bias-disable;
+			drive-strength = <12>;
+			input-disable;
+			input-schmitt-disable;
+			slew-rate = <0>;
+		};
+
+		rx-pins {
+			pinmux = <GPIOMUX(6, GPOUT_LOW,
+					     GPOEN_DISABLE,
+					     GPI_SYS_UART0_RX)>;
+			bias-disable; /* external pull-up */
+			drive-strength = <2>;
+			input-enable;
+			input-schmitt-enable;
+			slew-rate = <0>;
+		};
+	};
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_pins>;
+	status = "okay";
+};