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author | Catalin Marinas <catalin.marinas@arm.com> | 2022-05-20 18:51:54 +0100 |
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committer | Catalin Marinas <catalin.marinas@arm.com> | 2022-05-20 18:51:54 +0100 |
commit | 0616ea3f1b93a99264d84f3d002ae117f6526b62 (patch) | |
tree | f805067a257b1e467ffe38bb43b7f8c148a19101 /arch/arm64/kernel/entry-common.c | |
parent | d6fc5db0f82828c74742319cb6c988c4a8aac535 (diff) | |
parent | 18f3976fdb5da2ba9572845e6f7dfb58652871ea (diff) | |
download | linux-0616ea3f1b93a99264d84f3d002ae117f6526b62.tar.gz |
Merge branch 'for-next/esr-elx-64-bit' into for-next/core
* for-next/esr-elx-64-bit:
: Treat ESR_ELx as a 64-bit register.
KVM: arm64: uapi: Add kvm_debug_exit_arch.hsr_high
KVM: arm64: Treat ESR_EL2 as a 64-bit register
arm64: Treat ESR_ELx as a 64-bit register
arm64: compat: Do not treat syscall number as ESR_ELx for a bad syscall
arm64: Make ESR_ELx_xVC_IMM_MASK compatible with assembly
Diffstat (limited to 'arch/arm64/kernel/entry-common.c')
-rw-r--r-- | arch/arm64/kernel/entry-common.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-common.c index 29139e9a1517..05cedd42103c 100644 --- a/arch/arm64/kernel/entry-common.c +++ b/arch/arm64/kernel/entry-common.c @@ -282,13 +282,13 @@ extern void (*handle_arch_irq)(struct pt_regs *); extern void (*handle_arch_fiq)(struct pt_regs *); static void noinstr __panic_unhandled(struct pt_regs *regs, const char *vector, - unsigned int esr) + unsigned long esr) { arm64_enter_nmi(regs); console_verbose(); - pr_crit("Unhandled %s exception on CPU%d, ESR 0x%08x -- %s\n", + pr_crit("Unhandled %s exception on CPU%d, ESR 0x%016lx -- %s\n", vector, smp_processor_id(), esr, esr_get_class_string(esr)); @@ -829,7 +829,7 @@ UNHANDLED(el0t, 32, error) #ifdef CONFIG_VMAP_STACK asmlinkage void noinstr handle_bad_stack(struct pt_regs *regs) { - unsigned int esr = read_sysreg(esr_el1); + unsigned long esr = read_sysreg(esr_el1); unsigned long far = read_sysreg(far_el1); arm64_enter_nmi(regs); |