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authorThierry Reding <treding@nvidia.com>2014-08-08 16:55:34 +0200
committerThierry Reding <treding@nvidia.com>2014-08-08 16:55:34 +0200
commit185b6bcb5ec0fed339ab7a79c3116144374f6b05 (patch)
tree12012b153a22bc04e0f970ed9d1795f473eefedc
parentf031950af0c408e54278321f93e4245b31a8f3bf (diff)
parenteb98314fe057876cb0818d9cf4912e5de442c0a8 (diff)
downloadlinux-185b6bcb5ec0fed339ab7a79c3116144374f6b05.tar.gz
Merge branch 'staging/host1x' into staging/master
-rw-r--r--drivers/gpu/host1x/debug.c2
-rw-r--r--drivers/gpu/host1x/debug.h18
-rw-r--r--drivers/gpu/host1x/hw/debug_hw.c34
-rw-r--r--drivers/gpu/host1x/job.c14
-rw-r--r--include/linux/host1x.h1
5 files changed, 48 insertions, 21 deletions
diff --git a/drivers/gpu/host1x/debug.c b/drivers/gpu/host1x/debug.c
index ee3d12b51c50..1696bd23e020 100644
--- a/drivers/gpu/host1x/debug.c
+++ b/drivers/gpu/host1x/debug.c
@@ -39,7 +39,7 @@ void host1x_debug_output(struct output *o, const char *fmt, ...)
va_start(args, fmt);
len = vsnprintf(o->buf, sizeof(o->buf), fmt, args);
va_end(args);
- o->fn(o->ctx, o->buf, len);
+ o->fn(o, o->buf, len);
}
static int show_channels(struct host1x_channel *ch, void *data, bool show_fifo)
diff --git a/drivers/gpu/host1x/debug.h b/drivers/gpu/host1x/debug.h
index 4595b2e0799f..3a7b57ff1696 100644
--- a/drivers/gpu/host1x/debug.h
+++ b/drivers/gpu/host1x/debug.h
@@ -23,20 +23,28 @@
struct host1x;
+#define HOST1X_OUTPUT_CONT (1 << 0)
+
struct output {
- void (*fn)(void *ctx, const char *str, size_t len);
+ void (*fn)(struct output *output, const char *str, size_t len);
+ unsigned long flags;
void *ctx;
char buf[256];
};
-static inline void write_to_seqfile(void *ctx, const char *str, size_t len)
+static inline void write_to_seqfile(struct output *output, const char *str, size_t len)
{
- seq_write((struct seq_file *)ctx, str, len);
+ struct seq_file *s = output->ctx;
+
+ seq_write(s, str, len);
}
-static inline void write_to_printk(void *ctx, const char *str, size_t len)
+static inline void write_to_printk(struct output *output, const char *str, size_t len)
{
- pr_info("%s", str);
+ if (output->flags & HOST1X_OUTPUT_CONT)
+ pr_cont("%s", str);
+ else
+ pr_info("%s", str);
}
void __printf(2, 3) host1x_debug_output(struct output *o, const char *fmt, ...);
diff --git a/drivers/gpu/host1x/hw/debug_hw.c b/drivers/gpu/host1x/hw/debug_hw.c
index f72c873eff81..f5993cba6754 100644
--- a/drivers/gpu/host1x/hw/debug_hw.c
+++ b/drivers/gpu/host1x/hw/debug_hw.c
@@ -40,9 +40,12 @@ enum {
static unsigned int show_channel_command(struct output *o, u32 val)
{
+ unsigned int ret = 0;
unsigned mask;
unsigned subop;
+ o->flags |= HOST1X_OUTPUT_CONT;
+
switch (val >> 28) {
case HOST1X_OPCODE_SETCLASS:
mask = val & 0x3f;
@@ -50,43 +53,47 @@ static unsigned int show_channel_command(struct output *o, u32 val)
host1x_debug_output(o, "SETCL(class=%03x, offset=%03x, mask=%02x, [",
val >> 6 & 0x3ff,
val >> 16 & 0xfff, mask);
- return hweight8(mask);
+ ret = hweight8(mask);
} else {
host1x_debug_output(o, "SETCL(class=%03x)\n",
val >> 6 & 0x3ff);
- return 0;
}
+ break;
case HOST1X_OPCODE_INCR:
host1x_debug_output(o, "INCR(offset=%03x, [",
val >> 16 & 0xfff);
- return val & 0xffff;
+ ret = val & 0xffff;
+ break;
case HOST1X_OPCODE_NONINCR:
host1x_debug_output(o, "NONINCR(offset=%03x, [",
val >> 16 & 0xfff);
- return val & 0xffff;
+ ret = val & 0xffff;
+ break;
case HOST1X_OPCODE_MASK:
mask = val & 0xffff;
host1x_debug_output(o, "MASK(offset=%03x, mask=%03x, [",
val >> 16 & 0xfff, mask);
- return hweight16(mask);
+ ret = hweight16(mask);
+ break;
case HOST1X_OPCODE_IMM:
host1x_debug_output(o, "IMM(offset=%03x, data=%03x)\n",
val >> 16 & 0xfff, val & 0xffff);
- return 0;
+ break;
case HOST1X_OPCODE_RESTART:
host1x_debug_output(o, "RESTART(offset=%08x)\n", val << 4);
- return 0;
+ break;
case HOST1X_OPCODE_GATHER:
host1x_debug_output(o, "GATHER(offset=%03x, insert=%d, type=%d, count=%04x, addr=[",
val >> 16 & 0xfff, val >> 15 & 0x1,
val >> 14 & 0x1, val & 0x3fff);
- return 1;
+ ret = 1;
+ break;
case HOST1X_OPCODE_EXTEND:
subop = val >> 24 & 0xf;
@@ -98,11 +105,16 @@ static unsigned int show_channel_command(struct output *o, u32 val)
val & 0xff);
else
host1x_debug_output(o, "EXTEND_UNKNOWN(%08x)\n", val);
- return 0;
+
+ break;
default:
- return 0;
+ break;
}
+
+ o->flags &= ~HOST1X_OUTPUT_CONT;
+
+ return ret;
}
static void show_gather(struct output *o, phys_addr_t phys_addr,
@@ -128,7 +140,7 @@ static void show_gather(struct output *o, phys_addr_t phys_addr,
u32 val = *(map_addr + offset / 4 + i);
if (!data_count) {
- host1x_debug_output(o, "%08x: %08x:", addr, val);
+ host1x_debug_output(o, "%08x: %08x - ", addr, val);
data_count = show_channel_command(o, val);
} else {
host1x_debug_output(o, "%08x%s", val,
diff --git a/drivers/gpu/host1x/job.c b/drivers/gpu/host1x/job.c
index 63bd63f3c7df..e115bf22e5d8 100644
--- a/drivers/gpu/host1x/job.c
+++ b/drivers/gpu/host1x/job.c
@@ -507,12 +507,16 @@ static inline int copy_gathers(struct host1x_job *job, struct device *dev)
int host1x_job_pin(struct host1x_job *job, struct device *dev)
{
- int err;
- unsigned int i, j;
struct host1x *host = dev_get_drvdata(dev->parent);
- DECLARE_BITMAP(waitchk_mask, host1x_syncpt_nb_pts(host));
+ unsigned int num = host1x_syncpt_nb_pts(host);
+ unsigned long *waitchk_mask;
+ unsigned int i, j;
+ int err;
+
+ waitchk_mask = kcalloc(sizeof(*waitchk_mask), num, GFP_KERNEL);
+ if (!waitchk_mask)
+ return -ENOMEM;
- bitmap_zero(waitchk_mask, host1x_syncpt_nb_pts(host));
for (i = 0; i < job->num_waitchk; i++) {
u32 syncpt_id = job->waitchk[i].syncpt_id;
if (syncpt_id < host1x_syncpt_nb_pts(host))
@@ -523,6 +527,8 @@ int host1x_job_pin(struct host1x_job *job, struct device *dev)
for_each_set_bit(i, waitchk_mask, host1x_syncpt_nb_pts(host))
host1x_syncpt_load(host->syncpt + i);
+ kfree(waitchk_mask);
+
/* pin memory */
err = pin_job(job);
if (!err)
diff --git a/include/linux/host1x.h b/include/linux/host1x.h
index bb9840fd1e18..f4f65e23cfcc 100644
--- a/include/linux/host1x.h
+++ b/include/linux/host1x.h
@@ -27,6 +27,7 @@ enum host1x_class {
HOST1X_CLASS_GR2D = 0x51,
HOST1X_CLASS_GR2D_SB = 0x52,
HOST1X_CLASS_GR3D = 0x60,
+ HOST1X_CLASS_GPU = 0x61,
};
struct host1x_client;