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path: root/arch/riscv/include/asm/atomic.h
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* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 36Thomas Gleixner2019-05-241-5/+1
* riscv, atomic: Add #define's for the atomic_{cmp,}xchg_*() variantsAndrea Parri2018-12-211-0/+9
* locking/atomics: Rework ordering barriersMark Rutland2018-07-251-12/+5
* atomics/treewide: Make unconditional inc/dec ops optionalMark Rutland2018-06-211-76/+0
* atomics/treewide: Make test ops optionalMark Rutland2018-06-211-46/+0
* atomics/riscv: Define atomic64_fetch_add_unless()Mark Rutland2018-06-211-6/+2
* atomics/treewide: Make atomic_fetch_add_unless() optionalMark Rutland2018-06-211-0/+1
* atomics/treewide: Make atomic64_inc_not_zero() optionalMark Rutland2018-06-211-7/+0
* atomics/treewide: Remove redundant atomic_inc_not_zero() definitionsMark Rutland2018-06-211-9/+0
* atomics/treewide: Rename __atomic_add_unless() => atomic_fetch_add_unless()Mark Rutland2018-06-211-2/+2
* riscv/atomic: Strengthen implementations with fencesAndrea Parri2018-04-021-149/+268
* RISC-V: Comment on why {,cmp}xchg is ordered how it isPalmer Dabbelt2017-11-281-2/+7
* RISC-V: Remove unused arguments from ATOMIC_OPPalmer Dabbelt2017-11-281-47/+47
* RISC-V: Atomic and Locking CodePalmer Dabbelt2017-09-261-0/+375
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