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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2019-08-12 18:48:03 +0100 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2019-08-12 19:29:16 +0100 |
| commit | 3d6792cf0a93d34e939acda7e35a649d83440274 (patch) | |
| tree | b74a297f3e3c4c83674e5ececc8e59224f0225c7 /drivers/gpu/drm/i915/i915_vma.h | |
| parent | cf1c97dcb96cb2622a0b0524b6931bd7bd7d2344 (diff) | |
| download | linux-stable-3d6792cf0a93d34e939acda7e35a649d83440274.tar.gz | |
drm/i915: Forgo last_fence active request tracking
We were using the last_fence to track the last request that used this
vma that might be interpreted by a fence register and forced ourselves
to wait for this request before modifying any fence register that
overlapped our vma. Due to requirement that we need to track any XY_BLT
command, linear or tiled, this in effect meant that we have to track the
vma for its active lifespan anyway, so we can forgo the explicit
last_fence tracking and just use the whole vma->active.
Another solution would be to pipeline the register updates, and would
help resolve some long running stalls for gen3 (but only gen 2 and 3!)
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190812174804.26180-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/i915_vma.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_vma.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_vma.h b/drivers/gpu/drm/i915/i915_vma.h index 5c4224749bde..b3d2121be947 100644 --- a/drivers/gpu/drm/i915/i915_vma.h +++ b/drivers/gpu/drm/i915/i915_vma.h @@ -111,7 +111,6 @@ struct i915_vma { #define I915_VMA_GGTT_WRITE BIT(14) struct i915_active active; - struct i915_active_request last_fence; /** * Support different GGTT views into the same object. |