diff options
Diffstat (limited to 'src')
462 files changed, 81978 insertions, 0 deletions
diff --git a/src/Makefile.am b/src/Makefile.am new file mode 100644 index 00000000..405489b4 --- /dev/null +++ b/src/Makefile.am @@ -0,0 +1,99 @@ +# Copyright (c) 2007 Intel Corporation. All Rights Reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the +# "Software"), to deal in the Software without restriction, including +# without limitation the rights to use, copy, modify, merge, publish, +# distribute, sub license, and/or sell copies of the Software, and to +# permit persons to whom the Software is furnished to do so, subject to +# the following conditions: +# +# The above copyright notice and this permission notice (including the +# next paragraph) shall be included in all copies or substantial portions +# of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +# OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. +# IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR +# ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, +# TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE +# SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + +SUBDIRS = shaders + +INCLUDES = \ + -I$(top_srcdir) \ + -I$(top_srcdir)/va \ + -I$(top_srcdir)/va/x11 \ + -DPTHREADS \ + $(DRM_CFLAGS) \ + $(NULL) + +driver_cflags = \ + -Wall \ + -fvisibility=hidden \ + $(NULL) + +driver_ldflags = \ + -module -avoid-version \ + -no-undefined \ + -Wl,--no-undefined \ + $(DRM_LIBS) -ldrm_intel \ + $(NULL) + +source_c = \ + gen6_mfc.c \ + gen6_mfd.c \ + gen6_vme.c \ + gen7_mfd.c \ + i965_avc_bsd.c \ + i965_avc_hw_scoreboard.c\ + i965_avc_ildb.c \ + i965_drv_video.c \ + i965_encoder.c \ + i965_media.c \ + i965_media_h264.c \ + i965_media_mpeg2.c \ + i965_post_processing.c \ + i965_render.c \ + intel_batchbuffer.c \ + intel_batchbuffer_dump.c\ + intel_driver.c \ + intel_memman.c \ + object_heap.c \ + $(NULL) + +source_h = \ + gen6_mfc.h \ + gen6_mfd.h \ + gen6_vme.h \ + gen7_mfd.h \ + i965_avc_bsd.h \ + i965_avc_hw_scoreboard.h\ + i965_avc_ildb.h \ + i965_defines.h \ + i965_drv_video.h \ + i965_encoder.h \ + i965_media.h \ + i965_media_h264.h \ + i965_media_mpeg2.h \ + i965_mutext.h \ + i965_post_processing.h \ + i965_render.h \ + i965_structs.h \ + intel_batchbuffer.h \ + intel_batchbuffer_dump.h\ + intel_compiler.h \ + intel_driver.h \ + intel_memman.h \ + object_heap.h \ + $(NULL) + +i965_drv_video_la_LTLIBRARIES = i965_drv_video.la +i965_drv_video_ladir = $(LIBVA_DRIVERS_PATH) +i965_drv_video_la_CFLAGS = $(driver_cflags) +i965_drv_video_la_LDFLAGS = $(driver_ldflags) +i965_drv_video_la_LIBADD = $(top_builddir)/va/libva-x11.la -lpthread +i965_drv_video_la_SOURCES = $(source_c) +noinst_HEADERS = $(source_h) diff --git a/src/gen6_mfc.c b/src/gen6_mfc.c new file mode 100644 index 00000000..34de745f --- /dev/null +++ b/src/gen6_mfc.c @@ -0,0 +1,991 @@ +/* + * Copyright © 2010-2011 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Zhou Chang <chang.zhou@intel.com> + * + */ + +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <assert.h> + +#include "assert.h" +#include "intel_batchbuffer.h" +#include "i965_defines.h" +#include "i965_structs.h" +#include "i965_drv_video.h" +#include "i965_encoder.h" + +static void +gen6_mfc_pipe_mode_select(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) +{ + struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, 4); + + OUT_BCS_BATCH(batch, MFX_PIPE_MODE_SELECT | (4 - 2)); + OUT_BCS_BATCH(batch, + (0 << 10) | /* disable Stream-Out */ + (1 << 9) | /* Post Deblocking Output */ + (0 << 8) | /* Pre Deblocking Output */ + (0 << 7) | /* disable TLB prefectch */ + (0 << 5) | /* not in stitch mode */ + (1 << 4) | /* encoding mode */ + (2 << 0)); /* Standard Select: AVC */ + OUT_BCS_BATCH(batch, + (0 << 20) | /* round flag in PB slice */ + (0 << 19) | /* round flag in Intra8x8 */ + (0 << 7) | /* expand NOA bus flag */ + (1 << 6) | /* must be 1 */ + (0 << 5) | /* disable clock gating for NOA */ + (0 << 4) | /* terminate if AVC motion and POC table error occurs */ + (0 << 3) | /* terminate if AVC mbdata error occurs */ + (0 << 2) | /* terminate if AVC CABAC/CAVLC decode error occurs */ + (0 << 1) | /* AVC long field motion vector */ + (0 << 0)); /* always calculate AVC ILDB boundary strength */ + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_mfc_pipe_mode_select(VADriverContextP ctx, + int standard_select, + struct gen6_encoder_context *gen6_encoder_context) +{ + struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + + assert(standard_select == MFX_FORMAT_MPEG2 || + standard_select == MFX_FORMAT_AVC); + + BEGIN_BCS_BATCH(batch, 5); + OUT_BCS_BATCH(batch, MFX_PIPE_MODE_SELECT | (5 - 2)); + OUT_BCS_BATCH(batch, + (MFX_LONG_MODE << 17) | /* Must be long format for encoder */ + (MFD_MODE_VLD << 15) | /* VLD mode */ + (0 << 10) | /* disable Stream-Out */ + (1 << 9) | /* Post Deblocking Output */ + (0 << 8) | /* Pre Deblocking Output */ + (0 << 5) | /* not in stitch mode */ + (1 << 4) | /* encoding mode */ + (standard_select << 0)); /* standard select: avc or mpeg2 */ + OUT_BCS_BATCH(batch, + (0 << 7) | /* expand NOA bus flag */ + (0 << 6) | /* disable slice-level clock gating */ + (0 << 5) | /* disable clock gating for NOA */ + (0 << 4) | /* terminate if AVC motion and POC table error occurs */ + (0 << 3) | /* terminate if AVC mbdata error occurs */ + (0 << 2) | /* terminate if AVC CABAC/CAVLC decode error occurs */ + (0 << 1) | + (0 << 0)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen6_mfc_surface_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) +{ + struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = &gen6_encoder_context->mfc_context; + + BEGIN_BCS_BATCH(batch, 6); + + OUT_BCS_BATCH(batch, MFX_SURFACE_STATE | (6 - 2)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, + ((mfc_context->surface_state.height - 1) << 19) | + ((mfc_context->surface_state.width - 1) << 6)); + OUT_BCS_BATCH(batch, + (MFX_SURFACE_PLANAR_420_8 << 28) | /* 420 planar YUV surface */ + (1 << 27) | /* must be 1 for interleave U/V, hardware requirement */ + (0 << 22) | /* surface object control state, FIXME??? */ + ((mfc_context->surface_state.w_pitch - 1) << 3) | /* pitch */ + (0 << 2) | /* must be 0 for interleave U/V */ + (1 << 1) | /* must be y-tiled */ + (I965_TILEWALK_YMAJOR << 0)); /* tile walk, TILEWALK_YMAJOR */ + OUT_BCS_BATCH(batch, + (0 << 16) | /* must be 0 for interleave U/V */ + (mfc_context->surface_state.h_pitch)); /* y offset for U(cb) */ + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_mfc_surface_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) +{ + struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = &gen6_encoder_context->mfc_context; + + BEGIN_BCS_BATCH(batch, 6); + + OUT_BCS_BATCH(batch, MFX_SURFACE_STATE | (6 - 2)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, + ((mfc_context->surface_state.height - 1) << 18) | + ((mfc_context->surface_state.width - 1) << 4)); + OUT_BCS_BATCH(batch, + (MFX_SURFACE_PLANAR_420_8 << 28) | /* 420 planar YUV surface */ + (1 << 27) | /* must be 1 for interleave U/V, hardware requirement */ + (0 << 22) | /* surface object control state, FIXME??? */ + ((mfc_context->surface_state.w_pitch - 1) << 3) | /* pitch */ + (0 << 2) | /* must be 0 for interleave U/V */ + (1 << 1) | /* must be tiled */ + (I965_TILEWALK_YMAJOR << 0)); /* tile walk, TILEWALK_YMAJOR */ + OUT_BCS_BATCH(batch, + (0 << 16) | /* must be 0 for interleave U/V */ + (mfc_context->surface_state.h_pitch)); /* y offset for U(cb) */ + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen6_mfc_pipe_buf_addr_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) +{ + struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = &gen6_encoder_context->mfc_context; + int i; + + BEGIN_BCS_BATCH(batch, 24); + + OUT_BCS_BATCH(batch, MFX_PIPE_BUF_ADDR_STATE | (24 - 2)); + + OUT_BCS_BATCH(batch, 0); /* pre output addr */ + + OUT_BCS_RELOC(batch, mfc_context->post_deblocking_output.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); /* post output addr */ + + OUT_BCS_RELOC(batch, mfc_context->uncompressed_picture_source.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); /* uncompressed data */ + + OUT_BCS_BATCH(batch, 0); /* StreamOut data*/ + OUT_BCS_RELOC(batch, mfc_context->intra_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_RELOC(batch, mfc_context->deblocking_filter_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + /* 7..22 Reference pictures*/ + for (i = 0; i < ARRAY_ELEMS(mfc_context->reference_surfaces); i++) { + if ( mfc_context->reference_surfaces[i].bo != NULL) { + OUT_BCS_RELOC(batch, mfc_context->reference_surfaces[i].bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + } else { + OUT_BCS_BATCH(batch, 0); + } + } + OUT_BCS_BATCH(batch, 0); /* no block status */ + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen6_mfc_ind_obj_base_addr_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) +{ + struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; + + BEGIN_BCS_BATCH(batch, 11); + + OUT_BCS_BATCH(batch, MFX_IND_OBJ_BASE_ADDR_STATE | (11 - 2)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + /* MFX Indirect MV Object Base Address */ + OUT_BCS_RELOC(batch, vme_context->vme_output.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + /*MFC Indirect PAK-BSE Object Base Address for Encoder*/ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_mfc_ind_obj_base_addr_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) +{ + struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; + + BEGIN_BCS_BATCH(batch, 11); + + OUT_BCS_BATCH(batch, MFX_IND_OBJ_BASE_ADDR_STATE | (11 - 2)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + /* MFX Indirect MV Object Base Address */ + OUT_BCS_RELOC(batch, vme_context->vme_output.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + OUT_BCS_BATCH(batch, 0x80000000); /* must set, up to 2G */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + /*MFC Indirect PAK-BSE Object Base Address for Encoder*/ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0x80000000); /* must set, up to 2G */ + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen6_mfc_bsp_buf_base_addr_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) +{ + struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = &gen6_encoder_context->mfc_context; + + BEGIN_BCS_BATCH(batch, 4); + + OUT_BCS_BATCH(batch, MFX_BSP_BUF_BASE_ADDR_STATE | (4 - 2)); + OUT_BCS_RELOC(batch, mfc_context->bsd_mpc_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen6_mfc_avc_img_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) +{ + struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = &gen6_encoder_context->mfc_context; + + int width_in_mbs = (mfc_context->surface_state.width + 15) / 16; + int height_in_mbs = (mfc_context->surface_state.height + 15) / 16; + + BEGIN_BCS_BATCH(batch, 13); + OUT_BCS_BATCH(batch, MFX_AVC_IMG_STATE | (13 - 2)); + OUT_BCS_BATCH(batch, + ((width_in_mbs * height_in_mbs) & 0xFFFF)); + OUT_BCS_BATCH(batch, + (height_in_mbs << 16) | + (width_in_mbs << 0)); + OUT_BCS_BATCH(batch, + (0 << 24) | /*Second Chroma QP Offset*/ + (0 << 16) | /*Chroma QP Offset*/ + (0 << 14) | /*Max-bit conformance Intra flag*/ + (0 << 13) | /*Max Macroblock size conformance Inter flag*/ + (1 << 12) | /*Should always be written as "1" */ + (0 << 10) | /*QM Preset FLag */ + (0 << 8) | /*Image Structure*/ + (0 << 0) ); /*Current Decoed Image Frame Store ID, reserved in Encode mode*/ + OUT_BCS_BATCH(batch, + (0 << 16) | /*Mininum Frame size*/ + (0 << 15) | /*Disable reading of Macroblock Status Buffer*/ + (0 << 14) | /*Load BitStream Pointer only once, 1 slic 1 frame*/ + (0 << 13) | /*CABAC 0 word insertion test enable*/ + (1 << 12) | /*MVUnpackedEnable,compliant to DXVA*/ + (1 << 10) | /*Chroma Format IDC, 4:2:0*/ + (1 << 7) | /*0:CAVLC encoding mode,1:CABAC*/ + (0 << 6) | /*Only valid for VLD decoding mode*/ + (0 << 5) | /*Constrained Intra Predition Flag, from PPS*/ + (0 << 4) | /*Direct 8x8 inference flag*/ + (0 << 3) | /*Only 8x8 IDCT Transform Mode Flag*/ + (1 << 2) | /*Frame MB only flag*/ + (0 << 1) | /*MBAFF mode is in active*/ + (0 << 0) ); /*Field picture flag*/ + OUT_BCS_BATCH(batch, 0); /*Mainly about MB rate control and debug, just ignoring*/ + OUT_BCS_BATCH(batch, /*Inter and Intra Conformance Max size limit*/ + (0xBB8 << 16) | /*InterMbMaxSz*/ + (0xEE8) ); /*IntraMbMaxSz*/ + OUT_BCS_BATCH(batch, 0); /*Reserved*/ + OUT_BCS_BATCH(batch, 0); /*Slice QP Delta for bitrate control*/ + OUT_BCS_BATCH(batch, 0); /*Slice QP Delta for bitrate control*/ + OUT_BCS_BATCH(batch, 0x8C000000); + OUT_BCS_BATCH(batch, 0x00010000); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_mfc_avc_img_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) +{ + struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = &gen6_encoder_context->mfc_context; + + int width_in_mbs = (mfc_context->surface_state.width + 15) / 16; + int height_in_mbs = (mfc_context->surface_state.height + 15) / 16; + + BEGIN_BCS_BATCH(batch, 16); + OUT_BCS_BATCH(batch, MFX_AVC_IMG_STATE | (16 - 2)); + OUT_BCS_BATCH(batch, + ((width_in_mbs * height_in_mbs) & 0xFFFF)); + OUT_BCS_BATCH(batch, + ((height_in_mbs - 1) << 16) | + ((width_in_mbs - 1) << 0)); + OUT_BCS_BATCH(batch, + (0 << 24) | /* Second Chroma QP Offset */ + (0 << 16) | /* Chroma QP Offset */ + (0 << 14) | /* Max-bit conformance Intra flag */ + (0 << 13) | /* Max Macroblock size conformance Inter flag */ + (0 << 12) | /* FIXME: Weighted_Pred_Flag */ + (0 << 10) | /* FIXME: Weighted_BiPred_Idc */ + (0 << 8) | /* FIXME: Image Structure */ + (0 << 0) ); /* Current Decoed Image Frame Store ID, reserved in Encode mode */ + OUT_BCS_BATCH(batch, + (0 << 16) | /* Mininum Frame size */ + (0 << 15) | /* Disable reading of Macroblock Status Buffer */ + (0 << 14) | /* Load BitStream Pointer only once, 1 slic 1 frame */ + (0 << 13) | /* CABAC 0 word insertion test enable */ + (1 << 12) | /* MVUnpackedEnable,compliant to DXVA */ + (1 << 10) | /* Chroma Format IDC, 4:2:0 */ + (0 << 9) | /* FIXME: MbMvFormatFlag */ + (1 << 7) | /* 0:CAVLC encoding mode,1:CABAC */ + (0 << 6) | /* Only valid for VLD decoding mode */ + (0 << 5) | /* Constrained Intra Predition Flag, from PPS */ + (0 << 4) | /* Direct 8x8 inference flag */ + (0 << 3) | /* Only 8x8 IDCT Transform Mode Flag */ + (1 << 2) | /* Frame MB only flag */ + (0 << 1) | /* MBAFF mode is in active */ + (0 << 0)); /* Field picture flag */ + OUT_BCS_BATCH(batch, 0); /* Mainly about MB rate control and debug, just ignoring */ + OUT_BCS_BATCH(batch, /* Inter and Intra Conformance Max size limit */ + (0xBB8 << 16) | /* InterMbMaxSz */ + (0xEE8) ); /* IntraMbMaxSz */ + OUT_BCS_BATCH(batch, 0); /* Reserved */ + OUT_BCS_BATCH(batch, 0); /* Slice QP Delta for bitrate control */ + OUT_BCS_BATCH(batch, 0); /* Slice QP Delta for bitrate control */ + OUT_BCS_BATCH(batch, 0x8C000000); + OUT_BCS_BATCH(batch, 0x00010000); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void gen6_mfc_avc_directmode_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) +{ + struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + int i; + + BEGIN_BCS_BATCH(batch, 69); + + OUT_BCS_BATCH(batch, MFX_AVC_DIRECTMODE_STATE | (69 - 2)); + //TODO: reference DMV + for(i = 0; i < 16; i++){ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + + //TODO: current DMV just for test +#if 0 + OUT_BCS_RELOC(batch, mfc_context->direct_mv_buffers[0].bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); +#else + //drm_intel_bo_pin(mfc_context->direct_mv_buffers[0].bo, 0x1000); + //OUT_BCS_BATCH(batch, mfc_context->direct_mv_buffers[0].bo->offset); + OUT_BCS_BATCH(batch, 0); +#endif + + + OUT_BCS_BATCH(batch, 0); + + //TODO: POL list + for(i = 0; i < 34; i++) { + OUT_BCS_BATCH(batch, 0); + } + + ADVANCE_BCS_BATCH(batch); +} + +static void gen6_mfc_avc_slice_state(VADriverContextP ctx, + int intra_slice, + struct gen6_encoder_context *gen6_encoder_context) +{ + struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = &gen6_encoder_context->mfc_context; + + BEGIN_BCS_BATCH(batch, 11);; + + OUT_BCS_BATCH(batch, MFX_AVC_SLICE_STATE | (11 - 2) ); + + if ( intra_slice ) + OUT_BCS_BATCH(batch, 2); /*Slice Type: I Slice*/ + else + OUT_BCS_BATCH(batch, 0); /*Slice Type: P Slice*/ + + if ( intra_slice ) + OUT_BCS_BATCH(batch, 0); /*no reference frames and pred_weight_table*/ + else + OUT_BCS_BATCH(batch, 0x00010000); /*1 reference frame*/ + + OUT_BCS_BATCH(batch, (0<<24) | /*Enable deblocking operation*/ + (26<<16) | /*Slice Quantization Parameter*/ + 0x0202 ); + OUT_BCS_BATCH(batch, 0); /*First MB X&Y , the postion of current slice*/ + OUT_BCS_BATCH(batch, ( ((mfc_context->surface_state.height+15)/16) << 16) ); + + OUT_BCS_BATCH(batch, + (0<<31) | /*RateControlCounterEnable = disable*/ + (1<<30) | /*ResetRateControlCounter*/ + (2<<28) | /*RC Triggle Mode = Loose Rate Control*/ + (1<<19) | /*IsLastSlice*/ + (0<<18) | /*BitstreamOutputFlag Compressed BitStream Output Disable Flag 0:enable 1:disable*/ + (0<<17) | /*HeaderPresentFlag*/ + (1<<16) | /*SliceData PresentFlag*/ + (0<<15) | /*TailPresentFlag*/ + (1<<13) | /*RBSP NAL TYPE*/ + (0<<12) ); /*CabacZeroWordInsertionEnable*/ + + OUT_BCS_RELOC(batch, mfc_context->mfc_indirect_pak_bse_object.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + mfc_context->mfc_indirect_pak_bse_object.offset); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} +static void gen6_mfc_avc_qm_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) +{ + struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + int i; + + BEGIN_BCS_BATCH(batch, 58); + + OUT_BCS_BATCH(batch, MFX_AVC_QM_STATE | 56); + OUT_BCS_BATCH(batch, 0xFF ) ; + for( i = 0; i < 56; i++) { + OUT_BCS_BATCH(batch, 0x10101010); + } + + ADVANCE_BCS_BATCH(batch); +} + +static void gen6_mfc_avc_fqm_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) +{ + struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + int i; + + BEGIN_BCS_BATCH(batch, 113); + OUT_BCS_BATCH(batch, MFC_AVC_FQM_STATE | (113 - 2)); + + for(i = 0; i < 112;i++) { + OUT_BCS_BATCH(batch, 0x10001000); + } + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_mfc_qm_state(VADriverContextP ctx, + int qm_type, + unsigned int *qm, + int qm_length, + struct gen6_encoder_context *gen6_encoder_context) +{ + struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + unsigned int qm_buffer[16]; + + assert(qm_length <= 16); + assert(sizeof(*qm) == 4); + memcpy(qm_buffer, qm, qm_length * 4); + + BEGIN_BCS_BATCH(batch, 18); + OUT_BCS_BATCH(batch, MFX_QM_STATE | (18 - 2)); + OUT_BCS_BATCH(batch, qm_type << 0); + intel_batchbuffer_data(batch, qm_buffer, 16 * 4); + ADVANCE_BCS_BATCH(batch); +} + +static void gen7_mfc_avc_qm_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) +{ + unsigned int qm[16] = { + 0x10101010, 0x10101010, 0x10101010, 0x10101010, + 0x10101010, 0x10101010, 0x10101010, 0x10101010, + 0x10101010, 0x10101010, 0x10101010, 0x10101010, + 0x10101010, 0x10101010, 0x10101010, 0x10101010 + }; + + gen7_mfc_qm_state(ctx, MFX_QM_AVC_4X4_INTRA_MATRIX, qm, 12, gen6_encoder_context); + gen7_mfc_qm_state(ctx, MFX_QM_AVC_4X4_INTER_MATRIX, qm, 12, gen6_encoder_context); + gen7_mfc_qm_state(ctx, MFX_QM_AVC_8x8_INTRA_MATRIX, qm, 16, gen6_encoder_context); + gen7_mfc_qm_state(ctx, MFX_QM_AVC_8x8_INTER_MATRIX, qm, 16, gen6_encoder_context); +} + +static void +gen7_mfc_fqm_state(VADriverContextP ctx, + int fqm_type, + unsigned int *fqm, + int fqm_length, + struct gen6_encoder_context *gen6_encoder_context) +{ + struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + unsigned int fqm_buffer[32]; + + assert(fqm_length <= 32); + assert(sizeof(*fqm) == 4); + memcpy(fqm_buffer, fqm, fqm_length * 4); + + BEGIN_BCS_BATCH(batch, 34); + OUT_BCS_BATCH(batch, MFX_FQM_STATE | (34 - 2)); + OUT_BCS_BATCH(batch, fqm_type << 0); + intel_batchbuffer_data(batch, fqm_buffer, 32 * 4); + ADVANCE_BCS_BATCH(batch); +} + +static void gen7_mfc_avc_fqm_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) +{ + unsigned int qm[32] = { + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000 + }; + + gen7_mfc_fqm_state(ctx, MFX_QM_AVC_4X4_INTRA_MATRIX, qm, 24, gen6_encoder_context); + gen7_mfc_fqm_state(ctx, MFX_QM_AVC_4X4_INTER_MATRIX, qm, 24, gen6_encoder_context); + gen7_mfc_fqm_state(ctx, MFX_QM_AVC_8x8_INTRA_MATRIX, qm, 32, gen6_encoder_context); + gen7_mfc_fqm_state(ctx, MFX_QM_AVC_8x8_INTER_MATRIX, qm, 32, gen6_encoder_context); +} + +static void gen6_mfc_avc_ref_idx_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) +{ + struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + int i; + + BEGIN_BCS_BATCH(batch, 10); + + OUT_BCS_BATCH(batch, MFX_AVC_REF_IDX_STATE | 8); + OUT_BCS_BATCH(batch, 0); //Select L0 + + OUT_BCS_BATCH(batch, 0x80808000); //Only 1 reference + for(i = 0; i < 7; i++) { + OUT_BCS_BATCH(batch, 0x80808080); + } + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen6_mfc_avc_insert_object(VADriverContextP ctx, int flush_data, struct gen6_encoder_context *gen6_encoder_context) +{ + struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, 4); + + OUT_BCS_BATCH(batch, MFC_AVC_INSERT_OBJECT | (4 -2 ) ); + OUT_BCS_BATCH(batch, (32<<8) | + (1 << 3) | + (1 << 2) | + (flush_data << 1) | + (1<<0) ); + OUT_BCS_BATCH(batch, 0x00000003); + OUT_BCS_BATCH(batch, 0xABCD1234); + + ADVANCE_BCS_BATCH(batch); +} + +static int +gen6_mfc_avc_pak_object_intra(VADriverContextP ctx, int x, int y, int end_mb, int qp,unsigned int *msg, + struct gen6_encoder_context *gen6_encoder_context) +{ + struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + int len_in_dwords = 11; + + BEGIN_BCS_BATCH(batch, len_in_dwords); + + OUT_BCS_BATCH(batch, MFC_AVC_PAK_OBJECT | (len_in_dwords - 2)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, + (0 << 24) | /* PackedMvNum, Debug*/ + (0 << 20) | /* No motion vector */ + (1 << 19) | /* CbpDcY */ + (1 << 18) | /* CbpDcU */ + (1 << 17) | /* CbpDcV */ + (msg[0] & 0xFFFF) ); + + OUT_BCS_BATCH(batch, (0xFFFF<<16) | (y << 8) | x); /* Code Block Pattern for Y*/ + OUT_BCS_BATCH(batch, 0x000F000F); /* Code Block Pattern */ + OUT_BCS_BATCH(batch, (0 << 27) | (end_mb << 26) | qp); /* Last MB */ + + /*Stuff for Intra MB*/ + OUT_BCS_BATCH(batch, msg[1]); /* We using Intra16x16 no 4x4 predmode*/ + OUT_BCS_BATCH(batch, msg[2]); + OUT_BCS_BATCH(batch, msg[3]&0xFC); + + OUT_BCS_BATCH(batch, 0x8040000); /*MaxSizeInWord and TargetSzieInWord*/ + + ADVANCE_BCS_BATCH(batch); + + return len_in_dwords; +} + +static int gen6_mfc_avc_pak_object_inter(VADriverContextP ctx, int x, int y, int end_mb, int qp, unsigned int offset, + struct gen6_encoder_context *gen6_encoder_context) +{ + struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + int len_in_dwords = 11; + + BEGIN_BCS_BATCH(batch, len_in_dwords); + + OUT_BCS_BATCH(batch, MFC_AVC_PAK_OBJECT | (len_in_dwords - 2)); + + OUT_BCS_BATCH(batch, 32); /* 32 MV*/ + OUT_BCS_BATCH(batch, offset); + + OUT_BCS_BATCH(batch, + (1 << 24) | /* PackedMvNum, Debug*/ + (4 << 20) | /* 8 MV, SNB don't use it*/ + (1 << 19) | /* CbpDcY */ + (1 << 18) | /* CbpDcU */ + (1 << 17) | /* CbpDcV */ + (0 << 15) | /* Transform8x8Flag = 0*/ + (0 << 14) | /* Frame based*/ + (0 << 13) | /* Inter MB */ + (1 << 8) | /* MbType = P_L0_16x16 */ + (0 << 7) | /* MBZ for frame */ + (0 << 6) | /* MBZ */ + (2 << 4) | /* MBZ for inter*/ + (0 << 3) | /* MBZ */ + (0 << 2) | /* SkipMbFlag */ + (0 << 0)); /* InterMbMode */ + + OUT_BCS_BATCH(batch, (0xFFFF<<16) | (y << 8) | x); /* Code Block Pattern for Y*/ + OUT_BCS_BATCH(batch, 0x000F000F); /* Code Block Pattern */ + OUT_BCS_BATCH(batch, (0 << 27) | (end_mb << 26) | qp); /* Last MB */ + + /*Stuff for Inter MB*/ + OUT_BCS_BATCH(batch, 0x0); + OUT_BCS_BATCH(batch, 0x0); + OUT_BCS_BATCH(batch, 0x0); + + OUT_BCS_BATCH(batch, 0xF0020000); /*MaxSizeInWord and TargetSzieInWord*/ + + ADVANCE_BCS_BATCH(batch); + + return len_in_dwords; +} + +static void gen6_mfc_init(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_mfc_context *mfc_context = &gen6_encoder_context->mfc_context; + dri_bo *bo; + int i; + + /*Encode common setup for MFC*/ + dri_bo_unreference(mfc_context->post_deblocking_output.bo); + mfc_context->post_deblocking_output.bo = NULL; + + dri_bo_unreference(mfc_context->pre_deblocking_output.bo); + mfc_context->pre_deblocking_output.bo = NULL; + + dri_bo_unreference(mfc_context->uncompressed_picture_source.bo); + mfc_context->uncompressed_picture_source.bo = NULL; + + dri_bo_unreference(mfc_context->mfc_indirect_pak_bse_object.bo); + mfc_context->mfc_indirect_pak_bse_object.bo = NULL; + + for (i = 0; i < NUM_MFC_DMV_BUFFERS; i++){ + dri_bo_unreference(mfc_context->direct_mv_buffers[i].bo); + mfc_context->direct_mv_buffers[i].bo = NULL; + } + + for (i = 0; i < MAX_MFC_REFERENCE_SURFACES; i++){ + if (mfc_context->reference_surfaces[i].bo != NULL) + dri_bo_unreference(mfc_context->reference_surfaces[i].bo); + mfc_context->reference_surfaces[i].bo = NULL; + } + + dri_bo_unreference(mfc_context->intra_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + 128 * 64, + 64); + assert(bo); + mfc_context->intra_row_store_scratch_buffer.bo = bo; + + dri_bo_unreference(mfc_context->deblocking_filter_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + 49152, /* 6 * 128 * 64 */ + 64); + assert(bo); + mfc_context->deblocking_filter_row_store_scratch_buffer.bo = bo; + + dri_bo_unreference(mfc_context->bsd_mpc_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + 12288, /* 1.5 * 128 * 64 */ + 0x1000); + assert(bo); + mfc_context->bsd_mpc_row_store_scratch_buffer.bo = bo; +} + +void gen6_mfc_avc_pipeline_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct gen6_encoder_context *gen6_encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = &gen6_encoder_context->mfc_context; + struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param->buffer; + VAEncSliceParameterBuffer *pSliceParameter = (VAEncSliceParameterBuffer *)encode_state->slice_params[0]->buffer; /* FIXME: multi slices */ + unsigned int *msg = NULL, offset = 0; + int emit_new_state = 1, object_len_in_bytes; + int is_intra = pSliceParameter->slice_flags.bits.is_intra; + int width_in_mbs = (mfc_context->surface_state.width + 15) / 16; + int height_in_mbs = (mfc_context->surface_state.height + 15) / 16; + int x,y; + + intel_batchbuffer_start_atomic_bcs(batch, 0x1000); + + if (is_intra) { + dri_bo_map(vme_context->vme_output.bo , 1); + msg = (unsigned int *)vme_context->vme_output.bo->virtual; + } + + for (y = 0; y < height_in_mbs; y++) { + for (x = 0; x < width_in_mbs; x++) { + int last_mb = (y == (height_in_mbs-1)) && ( x == (width_in_mbs-1) ); + int qp = pSequenceParameter->initial_qp; + + if (emit_new_state) { + intel_batchbuffer_emit_mi_flush(batch); + + if (IS_GEN7(i965->intel.device_id)) { + gen7_mfc_pipe_mode_select(ctx, MFX_FORMAT_AVC, gen6_encoder_context); + gen7_mfc_surface_state(ctx, gen6_encoder_context); + gen7_mfc_ind_obj_base_addr_state(ctx, gen6_encoder_context); + } else { + gen6_mfc_pipe_mode_select(ctx, gen6_encoder_context); + gen6_mfc_surface_state(ctx, gen6_encoder_context); + gen6_mfc_ind_obj_base_addr_state(ctx, gen6_encoder_context); + } + + gen6_mfc_pipe_buf_addr_state(ctx, gen6_encoder_context); + gen6_mfc_bsp_buf_base_addr_state(ctx, gen6_encoder_context); + + if (IS_GEN7(i965->intel.device_id)) { + gen7_mfc_avc_img_state(ctx, gen6_encoder_context); + gen7_mfc_avc_qm_state(ctx, gen6_encoder_context); + gen7_mfc_avc_fqm_state(ctx, gen6_encoder_context); + } else { + gen6_mfc_avc_img_state(ctx, gen6_encoder_context); + gen6_mfc_avc_qm_state(ctx, gen6_encoder_context); + gen6_mfc_avc_fqm_state(ctx, gen6_encoder_context); + } + + gen6_mfc_avc_ref_idx_state(ctx, gen6_encoder_context); + gen6_mfc_avc_slice_state(ctx, is_intra, gen6_encoder_context); + emit_new_state = 0; + } + + if (is_intra) { + assert(msg); + object_len_in_bytes = gen6_mfc_avc_pak_object_intra(ctx, x, y, last_mb, qp, msg, gen6_encoder_context); + msg += 4; + } else { + object_len_in_bytes = gen6_mfc_avc_pak_object_inter(ctx, x, y, last_mb, qp, offset, gen6_encoder_context); + offset += 64; + } + + if (intel_batchbuffer_check_free_space(batch, object_len_in_bytes) == 0) { + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); + emit_new_state = 1; + intel_batchbuffer_start_atomic_bcs(batch, 0x1000); + } + } + } + + if (is_intra) + dri_bo_unmap(vme_context->vme_output.bo); + + intel_batchbuffer_end_atomic(batch); +} + +static VAStatus gen6_mfc_avc_prepare(VADriverContextP ctx, + struct encode_state *encode_state, + struct gen6_encoder_context *gen6_encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_mfc_context *mfc_context = &gen6_encoder_context->mfc_context; + struct object_surface *obj_surface; + struct object_buffer *obj_buffer; + dri_bo *bo; + VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param->buffer; + VAStatus vaStatus = VA_STATUS_SUCCESS; + + /*Setup all the input&output object*/ + obj_surface = SURFACE(pPicParameter->reconstructed_picture); + assert(obj_surface); + i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N','V','1','2')); + + mfc_context->post_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(mfc_context->post_deblocking_output.bo); + + mfc_context->surface_state.width = obj_surface->orig_width; + mfc_context->surface_state.height = obj_surface->orig_height; + mfc_context->surface_state.w_pitch = obj_surface->width; + mfc_context->surface_state.h_pitch = obj_surface->height; + + obj_surface = SURFACE(pPicParameter->reference_picture); + assert(obj_surface); + if (obj_surface->bo != NULL) { + mfc_context->reference_surfaces[0].bo = obj_surface->bo; + dri_bo_reference(obj_surface->bo); + } + + obj_surface = SURFACE(encode_state->current_render_target); + assert(obj_surface && obj_surface->bo); + mfc_context->uncompressed_picture_source.bo = obj_surface->bo; + dri_bo_reference(mfc_context->uncompressed_picture_source.bo); + + obj_buffer = BUFFER (pPicParameter->coded_buf); /* FIXME: fix this later */ + bo = obj_buffer->buffer_store->bo; + assert(bo); + mfc_context->mfc_indirect_pak_bse_object.bo = bo; + mfc_context->mfc_indirect_pak_bse_object.offset = ALIGN(sizeof(VACodedBufferSegment), 64); + dri_bo_reference(mfc_context->mfc_indirect_pak_bse_object.bo); + + /*Programing bcs pipeline*/ + gen6_mfc_avc_pipeline_programing(ctx, encode_state, gen6_encoder_context); //filling the pipeline + + return vaStatus; +} + +static VAStatus gen6_mfc_run(VADriverContextP ctx, + struct encode_state *encode_state, + struct gen6_encoder_context *gen6_encoder_context) +{ + struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + + intel_batchbuffer_flush(batch); //run the pipeline + + return VA_STATUS_SUCCESS; +} + +static VAStatus gen6_mfc_stop(VADriverContextP ctx, + struct encode_state *encode_state, + struct gen6_encoder_context *gen6_encoder_context) +{ +#if 0 + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_mfc_context *mfc_context = &gen6_encoder_context->mfc_context; + + VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param->buffer; + + struct object_surface *obj_surface = SURFACE(pPicParameter->reconstructed_picture); + //struct object_surface *obj_surface = SURFACE(pPicParameter->reference_picture[0]); + //struct object_surface *obj_surface = SURFACE(encode_state->current_render_target); + my_debug(obj_surface); + +#endif + + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen6_mfc_avc_encode_picture(VADriverContextP ctx, + struct encode_state *encode_state, + struct gen6_encoder_context *gen6_encoder_context) +{ + gen6_mfc_init(ctx, gen6_encoder_context); + gen6_mfc_avc_prepare(ctx, encode_state, gen6_encoder_context); + gen6_mfc_run(ctx, encode_state, gen6_encoder_context); + gen6_mfc_stop(ctx, encode_state, gen6_encoder_context); + + return VA_STATUS_SUCCESS; +} + +VAStatus +gen6_mfc_pipeline(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct gen6_encoder_context *gen6_encoder_context) +{ + VAStatus vaStatus; + + switch (profile) { + case VAProfileH264Baseline: + vaStatus = gen6_mfc_avc_encode_picture(ctx, encode_state, gen6_encoder_context); + break; + + /* FIXME: add for other profile */ + default: + vaStatus = VA_STATUS_ERROR_UNSUPPORTED_PROFILE; + break; + } + + return vaStatus; +} + +Bool gen6_mfc_context_init(VADriverContextP ctx, struct gen6_mfc_context *mfc_context) +{ + return True; +} + +Bool gen6_mfc_context_destroy(struct gen6_mfc_context *mfc_context) +{ + int i; + + dri_bo_unreference(mfc_context->post_deblocking_output.bo); + mfc_context->post_deblocking_output.bo = NULL; + + dri_bo_unreference(mfc_context->pre_deblocking_output.bo); + mfc_context->pre_deblocking_output.bo = NULL; + + dri_bo_unreference(mfc_context->uncompressed_picture_source.bo); + mfc_context->uncompressed_picture_source.bo = NULL; + + dri_bo_unreference(mfc_context->mfc_indirect_pak_bse_object.bo); + mfc_context->mfc_indirect_pak_bse_object.bo = NULL; + + for (i = 0; i < NUM_MFC_DMV_BUFFERS; i++){ + dri_bo_unreference(mfc_context->direct_mv_buffers[i].bo); + mfc_context->direct_mv_buffers[i].bo = NULL; + } + + dri_bo_unreference(mfc_context->intra_row_store_scratch_buffer.bo); + mfc_context->intra_row_store_scratch_buffer.bo = NULL; + + dri_bo_unreference(mfc_context->deblocking_filter_row_store_scratch_buffer.bo); + mfc_context->deblocking_filter_row_store_scratch_buffer.bo = NULL; + + dri_bo_unreference(mfc_context->bsd_mpc_row_store_scratch_buffer.bo); + mfc_context->bsd_mpc_row_store_scratch_buffer.bo = NULL; + + return True; +} diff --git a/src/gen6_mfc.h b/src/gen6_mfc.h new file mode 100644 index 00000000..75bcf63f --- /dev/null +++ b/src/gen6_mfc.h @@ -0,0 +1,106 @@ +/* + * Copyright © 2010 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Zhou Chang <chang.zhou@intel.com> + * + */ + +#ifndef _GEN6_MFC_H_ +#define _GEN6_MFC_H_ + +#include <xf86drm.h> +#include <drm.h> +#include <i915_drm.h> +#include <intel_bufmgr.h> + +struct encode_state; + +#define MAX_MFC_REFERENCE_SURFACES 16 +#define NUM_MFC_DMV_BUFFERS 34 + +struct gen6_mfc_context +{ + struct { + unsigned int width; + unsigned int height; + unsigned int w_pitch; + unsigned int h_pitch; + } surface_state; + + + //MFX_PIPE_BUF_ADDR_STATE + struct { + dri_bo *bo; + } post_deblocking_output; //OUTPUT: reconstructed picture + + struct { + dri_bo *bo; + } pre_deblocking_output; //OUTPUT: reconstructed picture with deblocked + + struct { + dri_bo *bo; + } uncompressed_picture_source; //INPUT: original compressed image + + struct { + dri_bo *bo; + } intra_row_store_scratch_buffer; //INTERNAL: + + struct { + dri_bo *bo; + } deblocking_filter_row_store_scratch_buffer; //INTERNAL: + + struct { + dri_bo *bo; + } reference_surfaces[MAX_MFC_REFERENCE_SURFACES]; //INTERNAL: refrence surfaces + + //MFX_IND_OBJ_BASE_ADDR_STATE + struct{ + dri_bo *bo; + } mfc_indirect_mv_object; //INPUT: the blocks' mv info + + struct { + dri_bo *bo; + int offset; + } mfc_indirect_pak_bse_object; //OUTPUT: the compressed bitstream + + //MFX_BSP_BUF_BASE_ADDR_STATE + struct { + dri_bo *bo; + }bsd_mpc_row_store_scratch_buffer; //INTERNAL: + + //MFX_AVC_DIRECTMODE_STATE + struct { + dri_bo *bo; + }direct_mv_buffers[NUM_MFC_DMV_BUFFERS]; //INTERNAL: 0-31 as input,32 and 33 as output +}; + +VAStatus +gen6_mfc_pipeline(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct gen6_encoder_context *gen6_encoder_context); +Bool gen6_mfc_context_init(VADriverContextP ctx, struct gen6_mfc_context *mfc_context); +Bool gen6_mfc_context_destroy(struct gen6_mfc_context *mfc_context); + +#endif /* _GEN6_MFC_BCS_H_ */ diff --git a/src/gen6_mfd.c b/src/gen6_mfd.c new file mode 100644 index 00000000..19368f1b --- /dev/null +++ b/src/gen6_mfd.c @@ -0,0 +1,2115 @@ +/* + * Copyright © 2010 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao <haihao.xiang@intel.com> + * + */ + +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <assert.h> + +#include <va/va_backend.h> + +#include "intel_batchbuffer.h" +#include "intel_driver.h" + +#include "i965_defines.h" +#include "i965_drv_video.h" + +#include "gen6_mfd.h" + +#define DMV_SIZE 0x88000 /* 557056 bytes for a frame */ + +static const uint32_t zigzag_direct[64] = { + 0, 1, 8, 16, 9, 2, 3, 10, + 17, 24, 32, 25, 18, 11, 4, 5, + 12, 19, 26, 33, 40, 48, 41, 34, + 27, 20, 13, 6, 7, 14, 21, 28, + 35, 42, 49, 56, 57, 50, 43, 36, + 29, 22, 15, 23, 30, 37, 44, 51, + 58, 59, 52, 45, 38, 31, 39, 46, + 53, 60, 61, 54, 47, 55, 62, 63 +}; + +static void +gen6_mfd_avc_frame_store_index(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + struct gen6_mfd_context *gen6_mfd_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + int i, j; + + assert(ARRAY_ELEMS(gen6_mfd_context->reference_surface) == ARRAY_ELEMS(pic_param->ReferenceFrames)); + + for (i = 0; i < ARRAY_ELEMS(gen6_mfd_context->reference_surface); i++) { + int found = 0; + + if (gen6_mfd_context->reference_surface[i].surface_id == VA_INVALID_ID) + continue; + + for (j = 0; j < ARRAY_ELEMS(pic_param->ReferenceFrames); j++) { + VAPictureH264 *ref_pic = &pic_param->ReferenceFrames[j]; + if (ref_pic->flags & VA_PICTURE_H264_INVALID) + continue; + + if (gen6_mfd_context->reference_surface[i].surface_id == ref_pic->picture_id) { + found = 1; + break; + } + } + + if (!found) { + struct object_surface *obj_surface = SURFACE(gen6_mfd_context->reference_surface[i].surface_id); + obj_surface->flags &= ~SURFACE_REFERENCED; + + if ((obj_surface->flags & SURFACE_ALL_MASK) == SURFACE_DISPLAYED) { + dri_bo_unreference(obj_surface->bo); + obj_surface->bo = NULL; + obj_surface->flags &= ~SURFACE_REF_DIS_MASK; + } + + if (obj_surface->free_private_data) + obj_surface->free_private_data(&obj_surface->private_data); + + gen6_mfd_context->reference_surface[i].surface_id = VA_INVALID_ID; + gen6_mfd_context->reference_surface[i].frame_store_id = -1; + } + } + + for (i = 0; i < ARRAY_ELEMS(pic_param->ReferenceFrames); i++) { + VAPictureH264 *ref_pic = &pic_param->ReferenceFrames[i]; + int found = 0; + + if (ref_pic->flags & VA_PICTURE_H264_INVALID) + continue; + + for (j = 0; j < ARRAY_ELEMS(gen6_mfd_context->reference_surface); j++) { + if (gen6_mfd_context->reference_surface[j].surface_id == VA_INVALID_ID) + continue; + + if (gen6_mfd_context->reference_surface[j].surface_id == ref_pic->picture_id) { + found = 1; + break; + } + } + + if (!found) { + int frame_idx; + struct object_surface *obj_surface = SURFACE(ref_pic->picture_id); + + assert(obj_surface); + i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N', 'V', '1', '2')); + + for (frame_idx = 0; frame_idx < ARRAY_ELEMS(gen6_mfd_context->reference_surface); frame_idx++) { + for (j = 0; j < ARRAY_ELEMS(gen6_mfd_context->reference_surface); j++) { + if (gen6_mfd_context->reference_surface[j].surface_id == VA_INVALID_ID) + continue; + + if (gen6_mfd_context->reference_surface[j].frame_store_id == frame_idx) + break; + } + + if (j == ARRAY_ELEMS(gen6_mfd_context->reference_surface)) + break; + } + + assert(frame_idx < ARRAY_ELEMS(gen6_mfd_context->reference_surface)); + + for (j = 0; j < ARRAY_ELEMS(gen6_mfd_context->reference_surface); j++) { + if (gen6_mfd_context->reference_surface[j].surface_id == VA_INVALID_ID) { + gen6_mfd_context->reference_surface[j].surface_id = ref_pic->picture_id; + gen6_mfd_context->reference_surface[j].frame_store_id = frame_idx; + break; + } + } + } + } + + /* sort */ + for (i = 0; i < ARRAY_ELEMS(gen6_mfd_context->reference_surface) - 1; i++) { + if (gen6_mfd_context->reference_surface[i].surface_id != VA_INVALID_ID && + gen6_mfd_context->reference_surface[i].frame_store_id == i) + continue; + + for (j = i + 1; j < ARRAY_ELEMS(gen6_mfd_context->reference_surface); j++) { + if (gen6_mfd_context->reference_surface[j].surface_id != VA_INVALID_ID && + gen6_mfd_context->reference_surface[j].frame_store_id == i) { + VASurfaceID id = gen6_mfd_context->reference_surface[i].surface_id; + int frame_idx = gen6_mfd_context->reference_surface[i].frame_store_id; + + gen6_mfd_context->reference_surface[i].surface_id = gen6_mfd_context->reference_surface[j].surface_id; + gen6_mfd_context->reference_surface[i].frame_store_id = gen6_mfd_context->reference_surface[j].frame_store_id; + gen6_mfd_context->reference_surface[j].surface_id = id; + gen6_mfd_context->reference_surface[j].frame_store_id = frame_idx; + break; + } + } + } +} + +static void +gen6_mfd_free_avc_surface(void **data) +{ + struct gen6_avc_surface *gen6_avc_surface = *data; + + if (!gen6_avc_surface) + return; + + dri_bo_unreference(gen6_avc_surface->dmv_top); + gen6_avc_surface->dmv_top = NULL; + dri_bo_unreference(gen6_avc_surface->dmv_bottom); + gen6_avc_surface->dmv_bottom = NULL; + + free(gen6_avc_surface); + *data = NULL; +} + +static void +gen6_mfd_init_avc_surface(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + struct object_surface *obj_surface) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_avc_surface *gen6_avc_surface = obj_surface->private_data; + + obj_surface->free_private_data = gen6_mfd_free_avc_surface; + + if (!gen6_avc_surface) { + gen6_avc_surface = calloc(sizeof(struct gen6_avc_surface), 1); + assert((obj_surface->size & 0x3f) == 0); + obj_surface->private_data = gen6_avc_surface; + } + + gen6_avc_surface->dmv_bottom_flag = (pic_param->pic_fields.bits.field_pic_flag && + !pic_param->seq_fields.bits.direct_8x8_inference_flag); + + if (gen6_avc_surface->dmv_top == NULL) { + gen6_avc_surface->dmv_top = dri_bo_alloc(i965->intel.bufmgr, + "direct mv w/r buffer", + DMV_SIZE, + 0x1000); + } + + if (gen6_avc_surface->dmv_bottom_flag && + gen6_avc_surface->dmv_bottom == NULL) { + gen6_avc_surface->dmv_bottom = dri_bo_alloc(i965->intel.bufmgr, + "direct mv w/r buffer", + DMV_SIZE, + 0x1000); + } +} + +static void +gen6_mfd_pipe_mode_select(VADriverContextP ctx, + struct decode_state *decode_state, + int standard_select, + struct gen6_mfd_context *gen6_mfd_context) +{ + struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; + + assert(standard_select == MFX_FORMAT_MPEG2 || + standard_select == MFX_FORMAT_AVC || + standard_select == MFX_FORMAT_VC1); + + BEGIN_BCS_BATCH(batch, 4); + OUT_BCS_BATCH(batch, MFX_PIPE_MODE_SELECT | (4 - 2)); + OUT_BCS_BATCH(batch, + (MFD_MODE_VLD << 16) | /* VLD mode */ + (0 << 10) | /* disable Stream-Out */ + (gen6_mfd_context->post_deblocking_output.valid << 9) | /* Post Deblocking Output */ + (gen6_mfd_context->pre_deblocking_output.valid << 8) | /* Pre Deblocking Output */ + (0 << 7) | /* disable TLB prefectch */ + (0 << 5) | /* not in stitch mode */ + (MFX_CODEC_DECODE << 4) | /* decoding mode */ + (standard_select << 0)); + OUT_BCS_BATCH(batch, + (0 << 20) | /* round flag in PB slice */ + (0 << 19) | /* round flag in Intra8x8 */ + (0 << 7) | /* expand NOA bus flag */ + (1 << 6) | /* must be 1 */ + (0 << 5) | /* disable clock gating for NOA */ + (0 << 4) | /* terminate if AVC motion and POC table error occurs */ + (0 << 3) | /* terminate if AVC mbdata error occurs */ + (0 << 2) | /* terminate if AVC CABAC/CAVLC decode error occurs */ + (0 << 1) | /* AVC long field motion vector */ + (1 << 0)); /* always calculate AVC ILDB boundary strength */ + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen6_mfd_surface_state(VADriverContextP ctx, + struct decode_state *decode_state, + int standard_select, + struct gen6_mfd_context *gen6_mfd_context) +{ + struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface = SURFACE(decode_state->current_render_target); + assert(obj_surface); + + BEGIN_BCS_BATCH(batch, 6); + OUT_BCS_BATCH(batch, MFX_SURFACE_STATE | (6 - 2)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, + ((obj_surface->orig_height - 1) << 19) | + ((obj_surface->orig_width - 1) << 6)); + OUT_BCS_BATCH(batch, + (MFX_SURFACE_PLANAR_420_8 << 28) | /* 420 planar YUV surface */ + (1 << 27) | /* must be 1 for interleave U/V, hardware requirement */ + (0 << 22) | /* surface object control state, FIXME??? */ + ((obj_surface->width - 1) << 3) | /* pitch */ + (0 << 2) | /* must be 0 for interleave U/V */ + (1 << 1) | /* must be y-tiled */ + (I965_TILEWALK_YMAJOR << 0)); /* tile walk, FIXME: must be 1 ??? */ + OUT_BCS_BATCH(batch, + (0 << 16) | /* must be 0 for interleave U/V */ + (obj_surface->height)); /* y offset for U(cb) */ + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen6_mfd_pipe_buf_addr_state(VADriverContextP ctx, + struct decode_state *decode_state, + int standard_select, + struct gen6_mfd_context *gen6_mfd_context) +{ + struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; + struct i965_driver_data *i965 = i965_driver_data(ctx); + int i; + + BEGIN_BCS_BATCH(batch, 24); + OUT_BCS_BATCH(batch, MFX_PIPE_BUF_ADDR_STATE | (24 - 2)); + if (gen6_mfd_context->pre_deblocking_output.valid) + OUT_BCS_RELOC(batch, gen6_mfd_context->pre_deblocking_output.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + if (gen6_mfd_context->post_deblocking_output.valid) + OUT_BCS_RELOC(batch, gen6_mfd_context->post_deblocking_output.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + OUT_BCS_BATCH(batch, 0); /* ignore for decoding */ + OUT_BCS_BATCH(batch, 0); /* ignore for decoding */ + + if (gen6_mfd_context->intra_row_store_scratch_buffer.valid) + OUT_BCS_RELOC(batch, gen6_mfd_context->intra_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + if (gen6_mfd_context->deblocking_filter_row_store_scratch_buffer.valid) + OUT_BCS_RELOC(batch, gen6_mfd_context->deblocking_filter_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + /* DW 7..22 */ + for (i = 0; i < ARRAY_ELEMS(gen6_mfd_context->reference_surface); i++) { + struct object_surface *obj_surface; + + if (gen6_mfd_context->reference_surface[i].surface_id != VA_INVALID_ID) { + obj_surface = SURFACE(gen6_mfd_context->reference_surface[i].surface_id); + assert(obj_surface && obj_surface->bo); + + OUT_BCS_RELOC(batch, obj_surface->bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + } else { + OUT_BCS_BATCH(batch, 0); + } + } + + OUT_BCS_BATCH(batch, 0); /* ignore DW23 for decoding */ + ADVANCE_BCS_BATCH(batch); +} + +static void +gen6_mfd_ind_obj_base_addr_state(VADriverContextP ctx, + dri_bo *slice_data_bo, + int standard_select, + struct gen6_mfd_context *gen6_mfd_context) +{ + struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; + + BEGIN_BCS_BATCH(batch, 11); + OUT_BCS_BATCH(batch, MFX_IND_OBJ_BASE_ADDR_STATE | (11 - 2)); + OUT_BCS_RELOC(batch, slice_data_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); /* MFX Indirect Bitstream Object Base Address */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); /* ignore for VLD mode */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); /* ignore for VLD mode */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); /* ignore for VLD mode */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); /* ignore for VLD mode */ + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen6_mfd_bsp_buf_base_addr_state(VADriverContextP ctx, + struct decode_state *decode_state, + int standard_select, + struct gen6_mfd_context *gen6_mfd_context) +{ + struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; + + BEGIN_BCS_BATCH(batch, 4); + OUT_BCS_BATCH(batch, MFX_BSP_BUF_BASE_ADDR_STATE | (4 - 2)); + + if (gen6_mfd_context->bsd_mpc_row_store_scratch_buffer.valid) + OUT_BCS_RELOC(batch, gen6_mfd_context->bsd_mpc_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + if (gen6_mfd_context->mpr_row_store_scratch_buffer.valid) + OUT_BCS_RELOC(batch, gen6_mfd_context->mpr_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + if (gen6_mfd_context->bitplane_read_buffer.valid) + OUT_BCS_RELOC(batch, gen6_mfd_context->bitplane_read_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + else + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen6_mfd_aes_state(VADriverContextP ctx, + struct decode_state *decode_state, + int standard_select) +{ + /* FIXME */ +} + +static void +gen6_mfd_wait(VADriverContextP ctx, + struct decode_state *decode_state, + int standard_select, + struct gen6_mfd_context *gen6_mfd_context) +{ + struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; + + BEGIN_BCS_BATCH(batch, 1); + OUT_BCS_BATCH(batch, MFX_WAIT | (1 << 8)); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen6_mfd_avc_img_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen6_mfd_context *gen6_mfd_context) +{ + struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; + int qm_present_flag; + int img_struct; + int mbaff_frame_flag; + unsigned int width_in_mbs, height_in_mbs; + VAPictureParameterBufferH264 *pic_param; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; + assert(!(pic_param->CurrPic.flags & VA_PICTURE_H264_INVALID)); + + if (decode_state->iq_matrix && decode_state->iq_matrix->buffer) + qm_present_flag = 1; + else + qm_present_flag = 0; /* built-in QM matrices */ + + if (pic_param->CurrPic.flags & VA_PICTURE_H264_TOP_FIELD) + img_struct = 1; + else if (pic_param->CurrPic.flags & VA_PICTURE_H264_BOTTOM_FIELD) + img_struct = 3; + else + img_struct = 0; + + if ((img_struct & 0x1) == 0x1) { + assert(pic_param->pic_fields.bits.field_pic_flag == 0x1); + } else { + assert(pic_param->pic_fields.bits.field_pic_flag == 0x0); + } + + if (pic_param->seq_fields.bits.frame_mbs_only_flag) { /* a frame containing only frame macroblocks */ + assert(pic_param->seq_fields.bits.mb_adaptive_frame_field_flag == 0); + assert(pic_param->pic_fields.bits.field_pic_flag == 0); + } else { + assert(pic_param->seq_fields.bits.direct_8x8_inference_flag == 1); /* see H.264 spec */ + } + + mbaff_frame_flag = (pic_param->seq_fields.bits.mb_adaptive_frame_field_flag && + !pic_param->pic_fields.bits.field_pic_flag); + + width_in_mbs = ((pic_param->picture_width_in_mbs_minus1 + 1) & 0xff); + height_in_mbs = ((pic_param->picture_height_in_mbs_minus1 + 1) & 0xff); /* frame height */ + assert(!((width_in_mbs * height_in_mbs) & 0x8000)); /* hardware requirement */ + + /* MFX unit doesn't support 4:2:2 and 4:4:4 picture */ + assert(pic_param->seq_fields.bits.chroma_format_idc == 0 || /* monochrome picture */ + pic_param->seq_fields.bits.chroma_format_idc == 1); /* 4:2:0 */ + assert(pic_param->seq_fields.bits.residual_colour_transform_flag == 0); /* only available for 4:4:4 */ + + BEGIN_BCS_BATCH(batch, 13); + OUT_BCS_BATCH(batch, MFX_AVC_IMG_STATE | (13 - 2)); + OUT_BCS_BATCH(batch, + ((width_in_mbs * height_in_mbs) & 0x7fff)); + OUT_BCS_BATCH(batch, + (height_in_mbs << 16) | + (width_in_mbs << 0)); + OUT_BCS_BATCH(batch, + ((pic_param->second_chroma_qp_index_offset & 0x1f) << 24) | + ((pic_param->chroma_qp_index_offset & 0x1f) << 16) | + (0 << 14) | /* Max-bit conformance Intra flag ??? FIXME */ + (0 << 13) | /* Max Macroblock size conformance Inter flag ??? FIXME */ + (1 << 12) | /* always 1, hardware requirement */ + (qm_present_flag << 10) | + (img_struct << 8) | + (16 << 0)); + OUT_BCS_BATCH(batch, + (pic_param->seq_fields.bits.chroma_format_idc << 10) | + (pic_param->pic_fields.bits.entropy_coding_mode_flag << 7) | + ((!pic_param->pic_fields.bits.reference_pic_flag) << 6) | + (pic_param->pic_fields.bits.constrained_intra_pred_flag << 5) | + (pic_param->seq_fields.bits.direct_8x8_inference_flag << 4) | + (pic_param->pic_fields.bits.transform_8x8_mode_flag << 3) | + (pic_param->seq_fields.bits.frame_mbs_only_flag << 2) | + (mbaff_frame_flag << 1) | + (pic_param->pic_fields.bits.field_pic_flag << 0)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen6_mfd_avc_qm_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen6_mfd_context *gen6_mfd_context) +{ + struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; + int cmd_len; + VAIQMatrixBufferH264 *iq_matrix; + VAPictureParameterBufferH264 *pic_param; + + if (!decode_state->iq_matrix || !decode_state->iq_matrix->buffer) + return; + + iq_matrix = (VAIQMatrixBufferH264 *)decode_state->iq_matrix->buffer; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; + + cmd_len = 2 + 6 * 4; /* always load six 4x4 scaling matrices */ + + if (pic_param->pic_fields.bits.transform_8x8_mode_flag) + cmd_len += 2 * 16; /* load two 8x8 scaling matrices */ + + BEGIN_BCS_BATCH(batch, cmd_len); + OUT_BCS_BATCH(batch, MFX_AVC_QM_STATE | (cmd_len - 2)); + + if (pic_param->pic_fields.bits.transform_8x8_mode_flag) + OUT_BCS_BATCH(batch, + (0x0 << 8) | /* don't use default built-in matrices */ + (0xff << 0)); /* six 4x4 and two 8x8 scaling matrices */ + else + OUT_BCS_BATCH(batch, + (0x0 << 8) | /* don't use default built-in matrices */ + (0x3f << 0)); /* six 4x4 scaling matrices */ + + intel_batchbuffer_data(batch, &iq_matrix->ScalingList4x4[0][0], 6 * 4 * 4); + + if (pic_param->pic_fields.bits.transform_8x8_mode_flag) + intel_batchbuffer_data(batch, &iq_matrix->ScalingList8x8[0][0], 2 * 16 * 4); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen6_mfd_avc_directmode_state(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *slice_param, + struct gen6_mfd_context *gen6_mfd_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; + struct object_surface *obj_surface; + struct gen6_avc_surface *gen6_avc_surface; + VAPictureH264 *va_pic; + int i, j; + + BEGIN_BCS_BATCH(batch, 69); + OUT_BCS_BATCH(batch, MFX_AVC_DIRECTMODE_STATE | (69 - 2)); + + /* reference surfaces 0..15 */ + for (i = 0; i < ARRAY_ELEMS(gen6_mfd_context->reference_surface); i++) { + if (gen6_mfd_context->reference_surface[i].surface_id != VA_INVALID_ID) { + obj_surface = SURFACE(gen6_mfd_context->reference_surface[i].surface_id); + assert(obj_surface); + gen6_avc_surface = obj_surface->private_data; + + if (gen6_avc_surface == NULL) { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } else { + OUT_BCS_RELOC(batch, gen6_avc_surface->dmv_top, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + + if (gen6_avc_surface->dmv_bottom_flag == 1) + OUT_BCS_RELOC(batch, gen6_avc_surface->dmv_bottom, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + else + OUT_BCS_RELOC(batch, gen6_avc_surface->dmv_top, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + } + } else { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + } + + /* the current decoding frame/field */ + va_pic = &pic_param->CurrPic; + assert(!(va_pic->flags & VA_PICTURE_H264_INVALID)); + obj_surface = SURFACE(va_pic->picture_id); + assert(obj_surface && obj_surface->bo && obj_surface->private_data); + gen6_avc_surface = obj_surface->private_data; + + OUT_BCS_RELOC(batch, gen6_avc_surface->dmv_top, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + + if (gen6_avc_surface->dmv_bottom_flag == 1) + OUT_BCS_RELOC(batch, gen6_avc_surface->dmv_bottom, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_RELOC(batch, gen6_avc_surface->dmv_top, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + + /* POC List */ + for (i = 0; i < ARRAY_ELEMS(gen6_mfd_context->reference_surface); i++) { + if (gen6_mfd_context->reference_surface[i].surface_id != VA_INVALID_ID) { + int found = 0; + for (j = 0; j < ARRAY_ELEMS(pic_param->ReferenceFrames); j++) { + va_pic = &pic_param->ReferenceFrames[j]; + + if (va_pic->flags & VA_PICTURE_H264_INVALID) + continue; + + if (va_pic->picture_id == gen6_mfd_context->reference_surface[i].surface_id) { + found = 1; + break; + } + } + + assert(found == 1); + assert(!(va_pic->flags & VA_PICTURE_H264_INVALID)); + + OUT_BCS_BATCH(batch, va_pic->TopFieldOrderCnt); + OUT_BCS_BATCH(batch, va_pic->BottomFieldOrderCnt); + } else { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + } + + va_pic = &pic_param->CurrPic; + OUT_BCS_BATCH(batch, va_pic->TopFieldOrderCnt); + OUT_BCS_BATCH(batch, va_pic->BottomFieldOrderCnt); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen6_mfd_avc_slice_state(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *slice_param, + VASliceParameterBufferH264 *next_slice_param, + struct gen6_mfd_context *gen6_mfd_context) +{ + struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; + int width_in_mbs = pic_param->picture_width_in_mbs_minus1 + 1; + int height_in_mbs = pic_param->picture_height_in_mbs_minus1 + 1; + int slice_hor_pos, slice_ver_pos, next_slice_hor_pos, next_slice_ver_pos; + int num_ref_idx_l0, num_ref_idx_l1; + int mbaff_picture = (!pic_param->pic_fields.bits.field_pic_flag && + pic_param->seq_fields.bits.mb_adaptive_frame_field_flag); + int weighted_pred_idc = 0; + int first_mb_in_slice = 0, first_mb_in_next_slice = 0; + int slice_type; + + if (slice_param->slice_type == SLICE_TYPE_I || + slice_param->slice_type == SLICE_TYPE_SI) { + slice_type = SLICE_TYPE_I; + } else if (slice_param->slice_type == SLICE_TYPE_P || + slice_param->slice_type == SLICE_TYPE_SP) { + slice_type = SLICE_TYPE_P; + } else { + assert(slice_param->slice_type == SLICE_TYPE_B); + slice_type = SLICE_TYPE_B; + } + + if (slice_type == SLICE_TYPE_I) { + assert(slice_param->num_ref_idx_l0_active_minus1 == 0); + assert(slice_param->num_ref_idx_l1_active_minus1 == 0); + num_ref_idx_l0 = 0; + num_ref_idx_l1 = 0; + } else if (slice_type == SLICE_TYPE_P) { + assert(slice_param->num_ref_idx_l1_active_minus1 == 0); + num_ref_idx_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1; + num_ref_idx_l1 = 0; + weighted_pred_idc = (pic_param->pic_fields.bits.weighted_pred_flag == 1); + } else { + num_ref_idx_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1; + num_ref_idx_l1 = slice_param->num_ref_idx_l1_active_minus1 + 1; + weighted_pred_idc = (pic_param->pic_fields.bits.weighted_bipred_idc == 1); + } + + first_mb_in_slice = slice_param->first_mb_in_slice << mbaff_picture; + slice_hor_pos = first_mb_in_slice % width_in_mbs; + slice_ver_pos = first_mb_in_slice / width_in_mbs; + + if (next_slice_param) { + first_mb_in_next_slice = next_slice_param->first_mb_in_slice << mbaff_picture; + next_slice_hor_pos = first_mb_in_next_slice % width_in_mbs; + next_slice_ver_pos = first_mb_in_next_slice / width_in_mbs; + } else { + next_slice_hor_pos = 0; + next_slice_ver_pos = height_in_mbs; + } + + BEGIN_BCS_BATCH(batch, 11); /* FIXME: is it 10??? */ + OUT_BCS_BATCH(batch, MFX_AVC_SLICE_STATE | (11 - 2)); + OUT_BCS_BATCH(batch, slice_type); + OUT_BCS_BATCH(batch, + (num_ref_idx_l1 << 24) | + (num_ref_idx_l0 << 16) | + (slice_param->chroma_log2_weight_denom << 8) | + (slice_param->luma_log2_weight_denom << 0)); + OUT_BCS_BATCH(batch, + (weighted_pred_idc << 30) | + (slice_param->direct_spatial_mv_pred_flag << 29) | + (slice_param->disable_deblocking_filter_idc << 27) | + (slice_param->cabac_init_idc << 24) | + ((pic_param->pic_init_qp_minus26 + 26 + slice_param->slice_qp_delta) << 16) | + ((slice_param->slice_beta_offset_div2 & 0xf) << 8) | + ((slice_param->slice_alpha_c0_offset_div2 & 0xf) << 0)); + OUT_BCS_BATCH(batch, + (slice_ver_pos << 24) | + (slice_hor_pos << 16) | + (first_mb_in_slice << 0)); + OUT_BCS_BATCH(batch, + (next_slice_ver_pos << 16) | + (next_slice_hor_pos << 0)); + OUT_BCS_BATCH(batch, + (next_slice_param == NULL) << 19); /* last slice flag */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen6_mfd_avc_phantom_slice_state(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + struct gen6_mfd_context *gen6_mfd_context) +{ + struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; + int width_in_mbs = pic_param->picture_width_in_mbs_minus1 + 1; + int height_in_mbs = pic_param->picture_height_in_mbs_minus1 + 1; /* frame height */ + + BEGIN_BCS_BATCH(batch, 11); /* FIXME: is it 10??? */ + OUT_BCS_BATCH(batch, MFX_AVC_SLICE_STATE | (11 - 2)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, + height_in_mbs << 24 | + width_in_mbs * height_in_mbs / (1 + !!pic_param->pic_fields.bits.field_pic_flag)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen6_mfd_avc_ref_idx_state(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *slice_param, + struct gen6_mfd_context *gen6_mfd_context) +{ + struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; + int i, j, num_ref_list; + struct { + unsigned char bottom_idc:1; + unsigned char frame_store_index:4; + unsigned char field_picture:1; + unsigned char long_term:1; + unsigned char non_exist:1; + } refs[32]; + + if (slice_param->slice_type == SLICE_TYPE_I || + slice_param->slice_type == SLICE_TYPE_SI) + return; + + if (slice_param->slice_type == SLICE_TYPE_P || + slice_param->slice_type == SLICE_TYPE_SP) { + num_ref_list = 1; + } else { + num_ref_list = 2; + } + + for (i = 0; i < num_ref_list; i++) { + VAPictureH264 *va_pic; + + if (i == 0) { + va_pic = slice_param->RefPicList0; + } else { + va_pic = slice_param->RefPicList1; + } + + BEGIN_BCS_BATCH(batch, 10); + OUT_BCS_BATCH(batch, MFX_AVC_REF_IDX_STATE | (10 - 2)); + OUT_BCS_BATCH(batch, i); + + for (j = 0; j < 32; j++) { + if (va_pic->flags & VA_PICTURE_H264_INVALID) { + refs[j].non_exist = 1; + refs[j].long_term = 1; + refs[j].field_picture = 1; + refs[j].frame_store_index = 0xf; + refs[j].bottom_idc = 1; + } else { + int frame_idx; + + for (frame_idx = 0; frame_idx < ARRAY_ELEMS(gen6_mfd_context->reference_surface); frame_idx++) { + if (gen6_mfd_context->reference_surface[frame_idx].surface_id != VA_INVALID_ID && + va_pic->picture_id == gen6_mfd_context->reference_surface[frame_idx].surface_id) { + assert(frame_idx == gen6_mfd_context->reference_surface[frame_idx].frame_store_id); + break; + } + } + + assert(frame_idx < ARRAY_ELEMS(gen6_mfd_context->reference_surface)); + + refs[j].non_exist = 0; + refs[j].long_term = !!(va_pic->flags & VA_PICTURE_H264_LONG_TERM_REFERENCE); + refs[j].field_picture = !!(va_pic->flags & + (VA_PICTURE_H264_TOP_FIELD | + VA_PICTURE_H264_BOTTOM_FIELD)); + refs[j].frame_store_index = frame_idx; + refs[j].bottom_idc = !!(va_pic->flags & VA_PICTURE_H264_BOTTOM_FIELD); + } + + va_pic++; + } + + intel_batchbuffer_data(batch, refs, sizeof(refs)); + ADVANCE_BCS_BATCH(batch); + } +} + +static void +gen6_mfd_avc_weightoffset_state(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *slice_param, + struct gen6_mfd_context *gen6_mfd_context) +{ + struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; + int i, j, num_weight_offset_table = 0; + short weightoffsets[32 * 6]; + + if ((slice_param->slice_type == SLICE_TYPE_P || + slice_param->slice_type == SLICE_TYPE_SP) && + (pic_param->pic_fields.bits.weighted_pred_flag == 1)) { + num_weight_offset_table = 1; + } + + if ((slice_param->slice_type == SLICE_TYPE_B) && + (pic_param->pic_fields.bits.weighted_bipred_idc == 1)) { + num_weight_offset_table = 2; + } + + for (i = 0; i < num_weight_offset_table; i++) { + BEGIN_BCS_BATCH(batch, 98); + OUT_BCS_BATCH(batch, MFX_AVC_WEIGHTOFFSET_STATE | (98 - 2)); + OUT_BCS_BATCH(batch, i); + + if (i == 0) { + for (j = 0; j < 32; j++) { + weightoffsets[j * 6 + 0] = slice_param->luma_weight_l0[j]; + weightoffsets[j * 6 + 1] = slice_param->luma_offset_l0[j]; + weightoffsets[j * 6 + 2] = slice_param->chroma_weight_l0[j][0]; + weightoffsets[j * 6 + 3] = slice_param->chroma_offset_l0[j][0]; + weightoffsets[j * 6 + 4] = slice_param->chroma_weight_l0[j][1]; + weightoffsets[j * 6 + 5] = slice_param->chroma_offset_l0[j][1]; + } + } else { + for (j = 0; j < 32; j++) { + weightoffsets[j * 6 + 0] = slice_param->luma_weight_l1[j]; + weightoffsets[j * 6 + 1] = slice_param->luma_offset_l1[j]; + weightoffsets[j * 6 + 2] = slice_param->chroma_weight_l1[j][0]; + weightoffsets[j * 6 + 3] = slice_param->chroma_offset_l1[j][0]; + weightoffsets[j * 6 + 4] = slice_param->chroma_weight_l1[j][1]; + weightoffsets[j * 6 + 5] = slice_param->chroma_offset_l1[j][1]; + } + } + + intel_batchbuffer_data(batch, weightoffsets, sizeof(weightoffsets)); + ADVANCE_BCS_BATCH(batch); + } +} + +static int +gen6_mfd_avc_get_slice_bit_offset(uint8_t *buf, int mode_flag, int in_slice_data_bit_offset) +{ + int out_slice_data_bit_offset; + int slice_header_size = in_slice_data_bit_offset / 8; + int i, j; + + for (i = 0, j = 0; i < slice_header_size; i++, j++) { + if (!buf[j] && !buf[j + 1] && buf[j + 2] == 3) { + i++, j += 2; + } + } + + out_slice_data_bit_offset = 8 * j + in_slice_data_bit_offset % 8; + + if (mode_flag == ENTROPY_CABAC) + out_slice_data_bit_offset = ALIGN(out_slice_data_bit_offset, 0x8); + + return out_slice_data_bit_offset; +} + +static void +gen6_mfd_avc_bsd_object(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *slice_param, + dri_bo *slice_data_bo, + struct gen6_mfd_context *gen6_mfd_context) +{ + struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; + int slice_data_bit_offset; + uint8_t *slice_data = NULL; + + dri_bo_map(slice_data_bo, 0); + slice_data = (uint8_t *)(slice_data_bo->virtual + slice_param->slice_data_offset); + slice_data_bit_offset = gen6_mfd_avc_get_slice_bit_offset(slice_data, + pic_param->pic_fields.bits.entropy_coding_mode_flag, + slice_param->slice_data_bit_offset); + dri_bo_unmap(slice_data_bo); + + BEGIN_BCS_BATCH(batch, 6); + OUT_BCS_BATCH(batch, MFD_AVC_BSD_OBJECT | (6 - 2)); + OUT_BCS_BATCH(batch, + ((slice_param->slice_data_size - (slice_data_bit_offset >> 3)) << 0)); + OUT_BCS_BATCH(batch, slice_param->slice_data_offset + (slice_data_bit_offset >> 3)); + OUT_BCS_BATCH(batch, + (0 << 31) | + (0 << 14) | + (0 << 12) | + (0 << 10) | + (0 << 8)); + OUT_BCS_BATCH(batch, + (0 << 16) | + (0 << 6) | + ((0x7 - (slice_data_bit_offset & 0x7)) << 0)); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen6_mfd_avc_phantom_slice_bsd_object(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + struct gen6_mfd_context *gen6_mfd_context) +{ + struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; + + BEGIN_BCS_BATCH(batch, 6); + OUT_BCS_BATCH(batch, MFD_AVC_BSD_OBJECT | (6 - 2)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen6_mfd_avc_phantom_slice(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + struct gen6_mfd_context *gen6_mfd_context) +{ + gen6_mfd_avc_phantom_slice_state(ctx, pic_param, gen6_mfd_context); + gen6_mfd_avc_phantom_slice_bsd_object(ctx, pic_param, gen6_mfd_context); +} + +static void +gen6_mfd_avc_decode_init(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen6_mfd_context *gen6_mfd_context) +{ + VAPictureParameterBufferH264 *pic_param; + VASliceParameterBufferH264 *slice_param; + VAPictureH264 *va_pic; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface; + dri_bo *bo; + int i, j, enable_avc_ildb = 0; + + for (j = 0; j < decode_state->num_slice_params && enable_avc_ildb == 0; j++) { + assert(decode_state->slice_params && decode_state->slice_params[j]->buffer); + slice_param = (VASliceParameterBufferH264 *)decode_state->slice_params[j]->buffer; + + for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { + assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL); + assert((slice_param->slice_type == SLICE_TYPE_I) || + (slice_param->slice_type == SLICE_TYPE_SI) || + (slice_param->slice_type == SLICE_TYPE_P) || + (slice_param->slice_type == SLICE_TYPE_SP) || + (slice_param->slice_type == SLICE_TYPE_B)); + + if (slice_param->disable_deblocking_filter_idc != 1) { + enable_avc_ildb = 1; + break; + } + + slice_param++; + } + } + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; + gen6_mfd_avc_frame_store_index(ctx, pic_param, gen6_mfd_context); + + /* Current decoded picture */ + va_pic = &pic_param->CurrPic; + assert(!(va_pic->flags & VA_PICTURE_H264_INVALID)); + obj_surface = SURFACE(va_pic->picture_id); + assert(obj_surface); + obj_surface->flags &= ~SURFACE_REF_DIS_MASK; + obj_surface->flags |= (pic_param->pic_fields.bits.reference_pic_flag ? SURFACE_REFERENCED : 0); + gen6_mfd_init_avc_surface(ctx, pic_param, obj_surface); + i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N','V','1','2')); + + dri_bo_unreference(gen6_mfd_context->post_deblocking_output.bo); + gen6_mfd_context->post_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(gen6_mfd_context->post_deblocking_output.bo); + gen6_mfd_context->post_deblocking_output.valid = enable_avc_ildb; + + dri_bo_unreference(gen6_mfd_context->pre_deblocking_output.bo); + gen6_mfd_context->pre_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(gen6_mfd_context->pre_deblocking_output.bo); + gen6_mfd_context->pre_deblocking_output.valid = !enable_avc_ildb; + + dri_bo_unreference(gen6_mfd_context->intra_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "intra row store", + 128 * 64, + 0x1000); + assert(bo); + gen6_mfd_context->intra_row_store_scratch_buffer.bo = bo; + gen6_mfd_context->intra_row_store_scratch_buffer.valid = 1; + + dri_bo_unreference(gen6_mfd_context->deblocking_filter_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "deblocking filter row store", + 30720, /* 4 * 120 * 64 */ + 0x1000); + assert(bo); + gen6_mfd_context->deblocking_filter_row_store_scratch_buffer.bo = bo; + gen6_mfd_context->deblocking_filter_row_store_scratch_buffer.valid = 1; + + dri_bo_unreference(gen6_mfd_context->bsd_mpc_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "bsd mpc row store", + 11520, /* 1.5 * 120 * 64 */ + 0x1000); + assert(bo); + gen6_mfd_context->bsd_mpc_row_store_scratch_buffer.bo = bo; + gen6_mfd_context->bsd_mpc_row_store_scratch_buffer.valid = 1; + + dri_bo_unreference(gen6_mfd_context->mpr_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "mpr row store", + 7680, /* 1. 0 * 120 * 64 */ + 0x1000); + assert(bo); + gen6_mfd_context->mpr_row_store_scratch_buffer.bo = bo; + gen6_mfd_context->mpr_row_store_scratch_buffer.valid = 1; + + gen6_mfd_context->bitplane_read_buffer.valid = 0; +} + +static void +gen6_mfd_avc_decode_picture(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen6_mfd_context *gen6_mfd_context) +{ + struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; + VAPictureParameterBufferH264 *pic_param; + VASliceParameterBufferH264 *slice_param, *next_slice_param, *next_slice_group_param; + dri_bo *slice_data_bo; + int i, j; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; + gen6_mfd_avc_decode_init(ctx, decode_state, gen6_mfd_context); + + intel_batchbuffer_start_atomic_bcs(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); + gen6_mfd_pipe_mode_select(ctx, decode_state, MFX_FORMAT_AVC, gen6_mfd_context); + gen6_mfd_surface_state(ctx, decode_state, MFX_FORMAT_AVC, gen6_mfd_context); + gen6_mfd_pipe_buf_addr_state(ctx, decode_state, MFX_FORMAT_AVC, gen6_mfd_context); + gen6_mfd_bsp_buf_base_addr_state(ctx, decode_state, MFX_FORMAT_AVC, gen6_mfd_context); + gen6_mfd_avc_img_state(ctx, decode_state, gen6_mfd_context); + gen6_mfd_avc_qm_state(ctx, decode_state, gen6_mfd_context); + + for (j = 0; j < decode_state->num_slice_params; j++) { + assert(decode_state->slice_params && decode_state->slice_params[j]->buffer); + slice_param = (VASliceParameterBufferH264 *)decode_state->slice_params[j]->buffer; + slice_data_bo = decode_state->slice_datas[j]->bo; + gen6_mfd_ind_obj_base_addr_state(ctx, slice_data_bo, MFX_FORMAT_AVC, gen6_mfd_context); + + if (j == decode_state->num_slice_params - 1) + next_slice_group_param = NULL; + else + next_slice_group_param = (VASliceParameterBufferH264 *)decode_state->slice_params[j + 1]->buffer; + + for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { + assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL); + assert((slice_param->slice_type == SLICE_TYPE_I) || + (slice_param->slice_type == SLICE_TYPE_SI) || + (slice_param->slice_type == SLICE_TYPE_P) || + (slice_param->slice_type == SLICE_TYPE_SP) || + (slice_param->slice_type == SLICE_TYPE_B)); + + if (i < decode_state->slice_params[j]->num_elements - 1) + next_slice_param = slice_param + 1; + else + next_slice_param = next_slice_group_param; + + gen6_mfd_avc_directmode_state(ctx, pic_param, slice_param, gen6_mfd_context); + gen6_mfd_avc_slice_state(ctx, pic_param, slice_param, next_slice_param, gen6_mfd_context); + gen6_mfd_avc_ref_idx_state(ctx, pic_param, slice_param, gen6_mfd_context); + gen6_mfd_avc_weightoffset_state(ctx, pic_param, slice_param, gen6_mfd_context); + gen6_mfd_avc_bsd_object(ctx, pic_param, slice_param, slice_data_bo, gen6_mfd_context); + slice_param++; + } + } + + gen6_mfd_avc_phantom_slice(ctx, pic_param, gen6_mfd_context); + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); +} + +static void +gen6_mfd_mpeg2_decode_init(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen6_mfd_context *gen6_mfd_context) +{ + VAPictureParameterBufferMPEG2 *pic_param; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface; + int i; + dri_bo *bo; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferMPEG2 *)decode_state->pic_param->buffer; + + /* reference picture */ + obj_surface = SURFACE(pic_param->forward_reference_picture); + + if (obj_surface && obj_surface->bo) + gen6_mfd_context->reference_surface[0].surface_id = pic_param->forward_reference_picture; + else + gen6_mfd_context->reference_surface[0].surface_id = VA_INVALID_ID; + + obj_surface = SURFACE(pic_param->backward_reference_picture); + + if (obj_surface && obj_surface->bo) + gen6_mfd_context->reference_surface[1].surface_id = pic_param->backward_reference_picture; + else + gen6_mfd_context->reference_surface[1].surface_id = gen6_mfd_context->reference_surface[0].surface_id; + + /* must do so !!! */ + for (i = 2; i < ARRAY_ELEMS(gen6_mfd_context->reference_surface); i++) + gen6_mfd_context->reference_surface[i].surface_id = gen6_mfd_context->reference_surface[i % 2].surface_id; + + /* Current decoded picture */ + obj_surface = SURFACE(decode_state->current_render_target); + assert(obj_surface); + i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N','V','1','2')); + + dri_bo_unreference(gen6_mfd_context->pre_deblocking_output.bo); + gen6_mfd_context->pre_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(gen6_mfd_context->pre_deblocking_output.bo); + gen6_mfd_context->pre_deblocking_output.valid = 1; + + dri_bo_unreference(gen6_mfd_context->bsd_mpc_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "bsd mpc row store", + 11520, /* 1.5 * 120 * 64 */ + 0x1000); + assert(bo); + gen6_mfd_context->bsd_mpc_row_store_scratch_buffer.bo = bo; + gen6_mfd_context->bsd_mpc_row_store_scratch_buffer.valid = 1; + + gen6_mfd_context->post_deblocking_output.valid = 0; + gen6_mfd_context->intra_row_store_scratch_buffer.valid = 0; + gen6_mfd_context->deblocking_filter_row_store_scratch_buffer.valid = 0; + gen6_mfd_context->mpr_row_store_scratch_buffer.valid = 0; + gen6_mfd_context->bitplane_read_buffer.valid = 0; +} + +static void +gen6_mfd_mpeg2_pic_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen6_mfd_context *gen6_mfd_context) +{ + struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; + VAPictureParameterBufferMPEG2 *pic_param; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferMPEG2 *)decode_state->pic_param->buffer; + + BEGIN_BCS_BATCH(batch, 4); + OUT_BCS_BATCH(batch, MFX_MPEG2_PIC_STATE | (4 - 2)); + OUT_BCS_BATCH(batch, + (pic_param->f_code & 0xf) << 28 | /* f_code[1][1] */ + ((pic_param->f_code >> 4) & 0xf) << 24 | /* f_code[1][0] */ + ((pic_param->f_code >> 8) & 0xf) << 20 | /* f_code[0][1] */ + ((pic_param->f_code >> 12) & 0xf) << 16 | /* f_code[0][0] */ + pic_param->picture_coding_extension.bits.intra_dc_precision << 14 | + pic_param->picture_coding_extension.bits.picture_structure << 12 | + pic_param->picture_coding_extension.bits.top_field_first << 11 | + pic_param->picture_coding_extension.bits.frame_pred_frame_dct << 10 | + pic_param->picture_coding_extension.bits.concealment_motion_vectors << 9 | + pic_param->picture_coding_extension.bits.q_scale_type << 8 | + pic_param->picture_coding_extension.bits.intra_vlc_format << 7 | + pic_param->picture_coding_extension.bits.alternate_scan << 6); + OUT_BCS_BATCH(batch, + pic_param->picture_coding_type << 9); + OUT_BCS_BATCH(batch, + (ALIGN(pic_param->vertical_size, 16) / 16) << 16 | + (ALIGN(pic_param->horizontal_size, 16) / 16)); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen6_mfd_mpeg2_qm_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen6_mfd_context *gen6_mfd_context) +{ + struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; + VAIQMatrixBufferMPEG2 *iq_matrix; + int i; + + if (!decode_state->iq_matrix || !decode_state->iq_matrix->buffer) + return; + + iq_matrix = (VAIQMatrixBufferMPEG2 *)decode_state->iq_matrix->buffer; + + for (i = 0; i < 2; i++) { + int k, m; + unsigned char *qm = NULL; + unsigned char qmx[64]; + + if (i == 0) { + if (iq_matrix->load_intra_quantiser_matrix) + qm = iq_matrix->intra_quantiser_matrix; + } else { + if (iq_matrix->load_non_intra_quantiser_matrix) + qm = iq_matrix->non_intra_quantiser_matrix; + } + + if (!qm) + continue; + + /* Upload quantisation matrix in raster order. The mplayer vaapi + * patch passes quantisation matrix in zig-zag order to va library. + */ + for (k = 0; k < 64; k++) { + m = zigzag_direct[k]; + qmx[m] = qm[k]; + } + + BEGIN_BCS_BATCH(batch, 18); + OUT_BCS_BATCH(batch, MFX_MPEG2_QM_STATE | (18 - 2)); + OUT_BCS_BATCH(batch, i); + intel_batchbuffer_data(batch, qmx, 64); + ADVANCE_BCS_BATCH(batch); + } +} + +static void +gen6_mfd_mpeg2_bsd_object(VADriverContextP ctx, + VAPictureParameterBufferMPEG2 *pic_param, + VASliceParameterBufferMPEG2 *slice_param, + VASliceParameterBufferMPEG2 *next_slice_param, + struct gen6_mfd_context *gen6_mfd_context) +{ + struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; + unsigned int width_in_mbs = ALIGN(pic_param->horizontal_size, 16) / 16; + int mb_count, vpos0, hpos0, vpos1, hpos1, is_field_pic = 0; + + if (pic_param->picture_coding_extension.bits.picture_structure == MPEG_TOP_FIELD || + pic_param->picture_coding_extension.bits.picture_structure == MPEG_BOTTOM_FIELD) + is_field_pic = 1; + + vpos0 = slice_param->slice_vertical_position / (1 + is_field_pic); + hpos0 = slice_param->slice_horizontal_position; + + if (next_slice_param == NULL) { + vpos1 = ALIGN(pic_param->vertical_size, 16) / 16 / (1 + is_field_pic); + hpos1 = 0; + } else { + vpos1 = next_slice_param->slice_vertical_position / (1 + is_field_pic); + hpos1 = next_slice_param->slice_horizontal_position; + } + + mb_count = (vpos1 * width_in_mbs + hpos1) - (vpos0 * width_in_mbs + hpos0); + + BEGIN_BCS_BATCH(batch, 5); + OUT_BCS_BATCH(batch, MFD_MPEG2_BSD_OBJECT | (5 - 2)); + OUT_BCS_BATCH(batch, + slice_param->slice_data_size - (slice_param->macroblock_offset >> 3)); + OUT_BCS_BATCH(batch, + slice_param->slice_data_offset + (slice_param->macroblock_offset >> 3)); + OUT_BCS_BATCH(batch, + hpos0 << 24 | + vpos0 << 16 | + mb_count << 8 | + (next_slice_param == NULL) << 5 | + (next_slice_param == NULL) << 3 | + (slice_param->macroblock_offset & 0x7)); + OUT_BCS_BATCH(batch, + slice_param->quantiser_scale_code << 24); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen6_mfd_mpeg2_decode_picture(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen6_mfd_context *gen6_mfd_context) +{ + struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; + VAPictureParameterBufferMPEG2 *pic_param; + VASliceParameterBufferMPEG2 *slice_param, *next_slice_param, *next_slice_group_param; + dri_bo *slice_data_bo; + int i, j; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferMPEG2 *)decode_state->pic_param->buffer; + + gen6_mfd_mpeg2_decode_init(ctx, decode_state, gen6_mfd_context); + intel_batchbuffer_start_atomic_bcs(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); + gen6_mfd_pipe_mode_select(ctx, decode_state, MFX_FORMAT_MPEG2, gen6_mfd_context); + gen6_mfd_surface_state(ctx, decode_state, MFX_FORMAT_MPEG2, gen6_mfd_context); + gen6_mfd_pipe_buf_addr_state(ctx, decode_state, MFX_FORMAT_MPEG2, gen6_mfd_context); + gen6_mfd_bsp_buf_base_addr_state(ctx, decode_state, MFX_FORMAT_MPEG2, gen6_mfd_context); + gen6_mfd_mpeg2_pic_state(ctx, decode_state, gen6_mfd_context); + gen6_mfd_mpeg2_qm_state(ctx, decode_state, gen6_mfd_context); + + for (j = 0; j < decode_state->num_slice_params; j++) { + assert(decode_state->slice_params && decode_state->slice_params[j]->buffer); + slice_param = (VASliceParameterBufferMPEG2 *)decode_state->slice_params[j]->buffer; + slice_data_bo = decode_state->slice_datas[j]->bo; + gen6_mfd_ind_obj_base_addr_state(ctx, slice_data_bo, MFX_FORMAT_MPEG2, gen6_mfd_context); + + if (j == decode_state->num_slice_params - 1) + next_slice_group_param = NULL; + else + next_slice_group_param = (VASliceParameterBufferMPEG2 *)decode_state->slice_params[j + 1]->buffer; + + for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { + assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL); + + if (i < decode_state->slice_params[j]->num_elements - 1) + next_slice_param = slice_param + 1; + else + next_slice_param = next_slice_group_param; + + gen6_mfd_mpeg2_bsd_object(ctx, pic_param, slice_param, next_slice_param, gen6_mfd_context); + slice_param++; + } + } + + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); +} + +static const int va_to_gen6_vc1_pic_type[5] = { + GEN6_VC1_I_PICTURE, + GEN6_VC1_P_PICTURE, + GEN6_VC1_B_PICTURE, + GEN6_VC1_BI_PICTURE, + GEN6_VC1_P_PICTURE, +}; + +static const int va_to_gen6_vc1_mv[4] = { + 1, /* 1-MV */ + 2, /* 1-MV half-pel */ + 3, /* 1-MV half-pef bilinear */ + 0, /* Mixed MV */ +}; + +static const int b_picture_scale_factor[21] = { + 128, 85, 170, 64, 192, + 51, 102, 153, 204, 43, + 215, 37, 74, 111, 148, + 185, 222, 32, 96, 160, + 224, +}; + +static const int va_to_gen6_vc1_condover[3] = { + 0, + 2, + 3 +}; + +static const int va_to_gen6_vc1_profile[4] = { + GEN6_VC1_SIMPLE_PROFILE, + GEN6_VC1_MAIN_PROFILE, + GEN6_VC1_RESERVED_PROFILE, + GEN6_VC1_ADVANCED_PROFILE +}; + +static const int va_to_gen6_vc1_ttfrm[8] = { + 0, /* 8x8 */ + 1, /* 8x4 bottom */ + 1, /* 8x4 top */ + 1, /* 8x4 */ + 2, /* 4x8 bottom */ + 2, /* 4x8 top */ + 2, /* 4x8 */ + 3, /* 4x4 */ +}; + +static void +gen6_mfd_free_vc1_surface(void **data) +{ + struct gen6_vc1_surface *gen6_vc1_surface = *data; + + if (!gen6_vc1_surface) + return; + + dri_bo_unreference(gen6_vc1_surface->dmv); + free(gen6_vc1_surface); + *data = NULL; +} + +static void +gen6_mfd_init_vc1_surface(VADriverContextP ctx, + VAPictureParameterBufferVC1 *pic_param, + struct object_surface *obj_surface) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_vc1_surface *gen6_vc1_surface = obj_surface->private_data; + + obj_surface->free_private_data = gen6_mfd_free_vc1_surface; + + if (!gen6_vc1_surface) { + gen6_vc1_surface = calloc(sizeof(struct gen6_vc1_surface), 1); + assert((obj_surface->size & 0x3f) == 0); + obj_surface->private_data = gen6_vc1_surface; + } + + gen6_vc1_surface->picture_type = pic_param->picture_fields.bits.picture_type; + + if (gen6_vc1_surface->dmv == NULL) { + gen6_vc1_surface->dmv = dri_bo_alloc(i965->intel.bufmgr, + "direct mv w/r buffer", + 557056, /* 64 * 128 * 64 */ + 0x1000); + } +} + +static void +gen6_mfd_vc1_decode_init(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen6_mfd_context *gen6_mfd_context) +{ + VAPictureParameterBufferVC1 *pic_param; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface; + int i; + dri_bo *bo; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer; + + /* reference picture */ + obj_surface = SURFACE(pic_param->forward_reference_picture); + + if (obj_surface && obj_surface->bo) + gen6_mfd_context->reference_surface[0].surface_id = pic_param->forward_reference_picture; + else + gen6_mfd_context->reference_surface[0].surface_id = VA_INVALID_ID; + + obj_surface = SURFACE(pic_param->backward_reference_picture); + + if (obj_surface && obj_surface->bo) + gen6_mfd_context->reference_surface[1].surface_id = pic_param->backward_reference_picture; + else + gen6_mfd_context->reference_surface[1].surface_id = pic_param->forward_reference_picture; + + /* must do so !!! */ + for (i = 2; i < ARRAY_ELEMS(gen6_mfd_context->reference_surface); i++) + gen6_mfd_context->reference_surface[i].surface_id = gen6_mfd_context->reference_surface[i % 2].surface_id; + + /* Current decoded picture */ + obj_surface = SURFACE(decode_state->current_render_target); + assert(obj_surface); + gen6_mfd_init_vc1_surface(ctx, pic_param, obj_surface); + i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N','V','1','2')); + + dri_bo_unreference(gen6_mfd_context->post_deblocking_output.bo); + gen6_mfd_context->post_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(gen6_mfd_context->post_deblocking_output.bo); + gen6_mfd_context->post_deblocking_output.valid = pic_param->entrypoint_fields.bits.loopfilter; + + dri_bo_unreference(gen6_mfd_context->pre_deblocking_output.bo); + gen6_mfd_context->pre_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(gen6_mfd_context->pre_deblocking_output.bo); + gen6_mfd_context->pre_deblocking_output.valid = !pic_param->entrypoint_fields.bits.loopfilter; + + dri_bo_unreference(gen6_mfd_context->intra_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "intra row store", + 128 * 64, + 0x1000); + assert(bo); + gen6_mfd_context->intra_row_store_scratch_buffer.bo = bo; + gen6_mfd_context->intra_row_store_scratch_buffer.valid = 1; + + dri_bo_unreference(gen6_mfd_context->deblocking_filter_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "deblocking filter row store", + 46080, /* 6 * 120 * 64 */ + 0x1000); + assert(bo); + gen6_mfd_context->deblocking_filter_row_store_scratch_buffer.bo = bo; + gen6_mfd_context->deblocking_filter_row_store_scratch_buffer.valid = 1; + + dri_bo_unreference(gen6_mfd_context->bsd_mpc_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "bsd mpc row store", + 11520, /* 1.5 * 120 * 64 */ + 0x1000); + assert(bo); + gen6_mfd_context->bsd_mpc_row_store_scratch_buffer.bo = bo; + gen6_mfd_context->bsd_mpc_row_store_scratch_buffer.valid = 1; + + gen6_mfd_context->mpr_row_store_scratch_buffer.valid = 0; + + gen6_mfd_context->bitplane_read_buffer.valid = !!pic_param->bitplane_present.value; + dri_bo_unreference(gen6_mfd_context->bitplane_read_buffer.bo); + + if (gen6_mfd_context->bitplane_read_buffer.valid) { + int width_in_mbs = ALIGN(pic_param->coded_width, 16) / 16; + int height_in_mbs = ALIGN(pic_param->coded_height, 16) / 16; + int bitplane_width = ALIGN(width_in_mbs, 2) / 2; + int src_w, src_h; + uint8_t *src = NULL, *dst = NULL; + + assert(decode_state->bit_plane->buffer); + src = decode_state->bit_plane->buffer; + + bo = dri_bo_alloc(i965->intel.bufmgr, + "VC-1 Bitplane", + bitplane_width * bitplane_width, + 0x1000); + assert(bo); + gen6_mfd_context->bitplane_read_buffer.bo = bo; + + dri_bo_map(bo, True); + assert(bo->virtual); + dst = bo->virtual; + + for (src_h = 0; src_h < height_in_mbs; src_h++) { + for(src_w = 0; src_w < width_in_mbs; src_w++) { + int src_index, dst_index; + int src_shift; + uint8_t src_value; + + src_index = (src_h * width_in_mbs + src_w) / 2; + src_shift = !((src_h * width_in_mbs + src_w) & 1) * 4; + src_value = ((src[src_index] >> src_shift) & 0xf); + + dst_index = src_w / 2; + dst[dst_index] = ((dst[dst_index] >> 4) | (src_value << 4)); + } + + if (src_w & 1) + dst[src_w / 2] >>= 4; + + dst += bitplane_width; + } + + dri_bo_unmap(bo); + } else + gen6_mfd_context->bitplane_read_buffer.bo = NULL; +} + +static void +gen6_mfd_vc1_pic_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen6_mfd_context *gen6_mfd_context) +{ + struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; + VAPictureParameterBufferVC1 *pic_param; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface; + int alt_pquant_config = 0, alt_pquant_edge_mask = 0, alt_pq; + int dquant, dquantfrm, dqprofile, dqdbedge, dqsbedge, dqbilevel; + int unified_mv_mode; + int ref_field_pic_polarity = 0; + int scale_factor = 0; + int trans_ac_y = 0; + int dmv_surface_valid = 0; + int brfd = 0; + int fcm = 0; + int picture_type; + int profile; + int overlap; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer; + + profile = va_to_gen6_vc1_profile[pic_param->sequence_fields.bits.profile]; + dquant = pic_param->pic_quantizer_fields.bits.dquant; + dquantfrm = pic_param->pic_quantizer_fields.bits.dq_frame; + dqprofile = pic_param->pic_quantizer_fields.bits.dq_profile; + dqdbedge = pic_param->pic_quantizer_fields.bits.dq_db_edge; + dqsbedge = pic_param->pic_quantizer_fields.bits.dq_sb_edge; + dqbilevel = pic_param->pic_quantizer_fields.bits.dq_binary_level; + alt_pq = pic_param->pic_quantizer_fields.bits.alt_pic_quantizer; + + if (dquant == 0) { + alt_pquant_config = 0; + alt_pquant_edge_mask = 0; + } else if (dquant == 2) { + alt_pquant_config = 1; + alt_pquant_edge_mask = 0xf; + } else { + assert(dquant == 1); + if (dquantfrm == 0) { + alt_pquant_config = 0; + alt_pquant_edge_mask = 0; + alt_pq = 0; + } else { + assert(dquantfrm == 1); + alt_pquant_config = 1; + + switch (dqprofile) { + case 3: + if (dqbilevel == 0) { + alt_pquant_config = 2; + alt_pquant_edge_mask = 0; + } else { + assert(dqbilevel == 1); + alt_pquant_config = 3; + alt_pquant_edge_mask = 0; + } + break; + + case 0: + alt_pquant_edge_mask = 0xf; + break; + + case 1: + if (dqdbedge == 3) + alt_pquant_edge_mask = 0x9; + else + alt_pquant_edge_mask = (0x3 << dqdbedge); + + break; + + case 2: + alt_pquant_edge_mask = (0x1 << dqsbedge); + break; + + default: + assert(0); + } + } + } + + if (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation) { + assert(pic_param->mv_fields.bits.mv_mode2 < 4); + unified_mv_mode = va_to_gen6_vc1_mv[pic_param->mv_fields.bits.mv_mode2]; + } else { + assert(pic_param->mv_fields.bits.mv_mode < 4); + unified_mv_mode = va_to_gen6_vc1_mv[pic_param->mv_fields.bits.mv_mode]; + } + + if (pic_param->sequence_fields.bits.interlace == 1 && + pic_param->picture_fields.bits.frame_coding_mode != 0) { /* frame-interlace or field-interlace */ + /* FIXME: calculate reference field picture polarity */ + assert(0); + ref_field_pic_polarity = 0; + } + + if (pic_param->b_picture_fraction < 21) + scale_factor = b_picture_scale_factor[pic_param->b_picture_fraction]; + + picture_type = va_to_gen6_vc1_pic_type[pic_param->picture_fields.bits.picture_type]; + + if (profile == GEN6_VC1_ADVANCED_PROFILE && + picture_type == GEN6_VC1_I_PICTURE) + picture_type = GEN6_VC1_BI_PICTURE; + + if (picture_type == GEN6_VC1_I_PICTURE || picture_type == GEN6_VC1_BI_PICTURE) /* I picture */ + trans_ac_y = pic_param->transform_fields.bits.transform_ac_codingset_idx2; + else + trans_ac_y = pic_param->transform_fields.bits.transform_ac_codingset_idx1; + + + if (picture_type == GEN6_VC1_B_PICTURE) { + struct gen6_vc1_surface *gen6_vc1_surface = NULL; + + obj_surface = SURFACE(pic_param->backward_reference_picture); + assert(obj_surface); + gen6_vc1_surface = obj_surface->private_data; + + if (!gen6_vc1_surface || + (va_to_gen6_vc1_pic_type[gen6_vc1_surface->picture_type] == GEN6_VC1_I_PICTURE || + va_to_gen6_vc1_pic_type[gen6_vc1_surface->picture_type] == GEN6_VC1_BI_PICTURE)) + dmv_surface_valid = 0; + else + dmv_surface_valid = 1; + } + + assert(pic_param->picture_fields.bits.frame_coding_mode < 3); + + if (pic_param->picture_fields.bits.frame_coding_mode < 2) + fcm = pic_param->picture_fields.bits.frame_coding_mode; + else { + if (pic_param->picture_fields.bits.top_field_first) + fcm = 2; + else + fcm = 3; + } + + if (pic_param->picture_fields.bits.picture_type == GEN6_VC1_B_PICTURE) { /* B picture */ + brfd = pic_param->reference_fields.bits.reference_distance; + brfd = (scale_factor * brfd) >> 8; + brfd = pic_param->reference_fields.bits.reference_distance - brfd - 1; + + if (brfd < 0) + brfd = 0; + } + + overlap = pic_param->sequence_fields.bits.overlap; + if (profile != GEN6_VC1_ADVANCED_PROFILE && pic_param->pic_quantizer_fields.bits.pic_quantizer_scale < 9) + overlap = 0; + + assert(pic_param->conditional_overlap_flag < 3); + assert(pic_param->mv_fields.bits.mv_table < 4); /* FIXME: interlace mode */ + + BEGIN_BCS_BATCH(batch, 6); + OUT_BCS_BATCH(batch, MFX_VC1_PIC_STATE | (6 - 2)); + OUT_BCS_BATCH(batch, + (ALIGN(pic_param->coded_height, 16) / 16) << 16 | + (ALIGN(pic_param->coded_width, 16) / 16)); + OUT_BCS_BATCH(batch, + pic_param->sequence_fields.bits.syncmarker << 31 | + 1 << 29 | /* concealment */ + alt_pq << 24 | + pic_param->entrypoint_fields.bits.loopfilter << 23 | + overlap << 22 | + (pic_param->pic_quantizer_fields.bits.quantizer == 0) << 21 | /* implicit quantizer */ + pic_param->pic_quantizer_fields.bits.pic_quantizer_scale << 16 | + alt_pquant_edge_mask << 12 | + alt_pquant_config << 10 | + pic_param->pic_quantizer_fields.bits.half_qp << 9 | + pic_param->pic_quantizer_fields.bits.pic_quantizer_type << 8 | + va_to_gen6_vc1_condover[pic_param->conditional_overlap_flag] << 6 | + !pic_param->picture_fields.bits.is_first_field << 5 | + picture_type << 2 | + fcm << 0); + OUT_BCS_BATCH(batch, + !!pic_param->bitplane_present.value << 23 | + !pic_param->bitplane_present.flags.bp_forward_mb << 22 | + !pic_param->bitplane_present.flags.bp_mv_type_mb << 21 | + !pic_param->bitplane_present.flags.bp_skip_mb << 20 | + !pic_param->bitplane_present.flags.bp_direct_mb << 19 | + !pic_param->bitplane_present.flags.bp_overflags << 18 | + !pic_param->bitplane_present.flags.bp_ac_pred << 17 | + !pic_param->bitplane_present.flags.bp_field_tx << 16 | + pic_param->mv_fields.bits.extended_dmv_range << 14 | + pic_param->mv_fields.bits.extended_mv_range << 12 | + pic_param->mv_fields.bits.four_mv_switch << 11 | + pic_param->fast_uvmc_flag << 10 | + unified_mv_mode << 8 | + ref_field_pic_polarity << 6 | + pic_param->reference_fields.bits.num_reference_pictures << 5 | + pic_param->reference_fields.bits.reference_distance << 0); + OUT_BCS_BATCH(batch, + scale_factor << 24 | + pic_param->mv_fields.bits.mv_table << 20 | + pic_param->mv_fields.bits.four_mv_block_pattern_table << 18 | + pic_param->mv_fields.bits.two_mv_block_pattern_table << 16 | + va_to_gen6_vc1_ttfrm[pic_param->transform_fields.bits.frame_level_transform_type] << 12 | + pic_param->transform_fields.bits.mb_level_transform_type_flag << 11 | + pic_param->mb_mode_table << 8 | + trans_ac_y << 6 | + pic_param->transform_fields.bits.transform_ac_codingset_idx1 << 4 | + pic_param->transform_fields.bits.intra_transform_dc_table << 3 | + pic_param->cbp_table << 0); + OUT_BCS_BATCH(batch, + dmv_surface_valid << 13 | + brfd << 8 | + ((ALIGN(pic_param->coded_width, 16) / 16 + 1) / 2 - 1)); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen6_mfd_vc1_pred_pipe_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen6_mfd_context *gen6_mfd_context) +{ + struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; + VAPictureParameterBufferVC1 *pic_param; + int interpolation_mode = 0; + int intensitycomp_single; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer; + + if (pic_param->mv_fields.bits.mv_mode == VAMvMode1MvHalfPelBilinear || + (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation && + pic_param->mv_fields.bits.mv_mode2 == VAMvMode1MvHalfPelBilinear)) + interpolation_mode = 2; /* Half-pel bilinear */ + else if (pic_param->mv_fields.bits.mv_mode == VAMvMode1MvHalfPel || + (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation && + pic_param->mv_fields.bits.mv_mode2 == VAMvMode1MvHalfPel)) + interpolation_mode = 0; /* Half-pel bicubic */ + else + interpolation_mode = 1; /* Quarter-pel bicubic */ + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer; + intensitycomp_single = (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation); + + BEGIN_BCS_BATCH(batch, 7); + OUT_BCS_BATCH(batch, MFX_VC1_PRED_PIPE_STATE | (7 - 2)); + OUT_BCS_BATCH(batch, + 0 << 8 | /* FIXME: interlace mode */ + pic_param->rounding_control << 4 | + va_to_gen6_vc1_profile[pic_param->sequence_fields.bits.profile] << 2); + OUT_BCS_BATCH(batch, + pic_param->luma_shift << 16 | + pic_param->luma_scale << 0); /* FIXME: Luma Scaling */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, + interpolation_mode << 19 | + pic_param->fast_uvmc_flag << 18 | + 0 << 17 | /* FIXME: scale up or down ??? */ + pic_param->range_reduction_frame << 16 | + 0 << 6 | /* FIXME: double ??? */ + 0 << 4 | + intensitycomp_single << 2 | + intensitycomp_single << 0); + ADVANCE_BCS_BATCH(batch); +} + + +static void +gen6_mfd_vc1_directmode_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen6_mfd_context *gen6_mfd_context) +{ + struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; + VAPictureParameterBufferVC1 *pic_param; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface; + dri_bo *dmv_read_buffer = NULL, *dmv_write_buffer = NULL; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer; + + obj_surface = SURFACE(decode_state->current_render_target); + + if (obj_surface && obj_surface->private_data) { + dmv_write_buffer = ((struct gen6_vc1_surface *)(obj_surface->private_data))->dmv; + } + + obj_surface = SURFACE(pic_param->backward_reference_picture); + + if (obj_surface && obj_surface->private_data) { + dmv_read_buffer = ((struct gen6_vc1_surface *)(obj_surface->private_data))->dmv; + } + + BEGIN_BCS_BATCH(batch, 3); + OUT_BCS_BATCH(batch, MFX_VC1_DIRECTMODE_STATE | (3 - 2)); + + if (dmv_write_buffer) + OUT_BCS_RELOC(batch, dmv_write_buffer, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + if (dmv_read_buffer) + OUT_BCS_RELOC(batch, dmv_read_buffer, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + else + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static int +gen6_mfd_vc1_get_macroblock_bit_offset(uint8_t *buf, int in_slice_data_bit_offset, int profile) +{ + int out_slice_data_bit_offset; + int slice_header_size = in_slice_data_bit_offset / 8; + int i, j; + + if (profile != 3) + out_slice_data_bit_offset = in_slice_data_bit_offset; + else { + for (i = 0, j = 0; i < slice_header_size; i++, j++) { + if (!buf[j] && !buf[j + 1] && buf[j + 2] == 3 && buf[j + 3] < 4) { + i++, j += 2; + } + } + + out_slice_data_bit_offset = 8 * j + in_slice_data_bit_offset % 8; + } + + return out_slice_data_bit_offset; +} + +static void +gen6_mfd_vc1_bsd_object(VADriverContextP ctx, + VAPictureParameterBufferVC1 *pic_param, + VASliceParameterBufferVC1 *slice_param, + VASliceParameterBufferVC1 *next_slice_param, + dri_bo *slice_data_bo, + struct gen6_mfd_context *gen6_mfd_context) +{ + struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; + int next_slice_start_vert_pos; + int macroblock_offset; + uint8_t *slice_data = NULL; + + dri_bo_map(slice_data_bo, 0); + slice_data = (uint8_t *)(slice_data_bo->virtual + slice_param->slice_data_offset); + macroblock_offset = gen6_mfd_vc1_get_macroblock_bit_offset(slice_data, + slice_param->macroblock_offset, + pic_param->sequence_fields.bits.profile); + dri_bo_unmap(slice_data_bo); + + if (next_slice_param) + next_slice_start_vert_pos = next_slice_param->slice_vertical_position; + else + next_slice_start_vert_pos = ALIGN(pic_param->coded_height, 16) / 16; + + BEGIN_BCS_BATCH(batch, 4); + OUT_BCS_BATCH(batch, MFD_VC1_BSD_OBJECT | (4 - 2)); + OUT_BCS_BATCH(batch, + slice_param->slice_data_size - (macroblock_offset >> 3)); + OUT_BCS_BATCH(batch, + slice_param->slice_data_offset + (macroblock_offset >> 3)); + OUT_BCS_BATCH(batch, + slice_param->slice_vertical_position << 24 | + next_slice_start_vert_pos << 16 | + (macroblock_offset & 0x7)); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen6_mfd_vc1_decode_picture(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen6_mfd_context *gen6_mfd_context) +{ + struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; + VAPictureParameterBufferVC1 *pic_param; + VASliceParameterBufferVC1 *slice_param, *next_slice_param, *next_slice_group_param; + dri_bo *slice_data_bo; + int i, j; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer; + + gen6_mfd_vc1_decode_init(ctx, decode_state, gen6_mfd_context); + intel_batchbuffer_start_atomic_bcs(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); + gen6_mfd_pipe_mode_select(ctx, decode_state, MFX_FORMAT_VC1, gen6_mfd_context); + gen6_mfd_surface_state(ctx, decode_state, MFX_FORMAT_VC1, gen6_mfd_context); + gen6_mfd_pipe_buf_addr_state(ctx, decode_state, MFX_FORMAT_VC1, gen6_mfd_context); + gen6_mfd_bsp_buf_base_addr_state(ctx, decode_state, MFX_FORMAT_VC1, gen6_mfd_context); + gen6_mfd_vc1_pic_state(ctx, decode_state, gen6_mfd_context); + gen6_mfd_vc1_pred_pipe_state(ctx, decode_state, gen6_mfd_context); + gen6_mfd_vc1_directmode_state(ctx, decode_state, gen6_mfd_context); + + for (j = 0; j < decode_state->num_slice_params; j++) { + assert(decode_state->slice_params && decode_state->slice_params[j]->buffer); + slice_param = (VASliceParameterBufferVC1 *)decode_state->slice_params[j]->buffer; + slice_data_bo = decode_state->slice_datas[j]->bo; + gen6_mfd_ind_obj_base_addr_state(ctx, slice_data_bo, MFX_FORMAT_VC1, gen6_mfd_context); + + if (j == decode_state->num_slice_params - 1) + next_slice_group_param = NULL; + else + next_slice_group_param = (VASliceParameterBufferVC1 *)decode_state->slice_params[j + 1]->buffer; + + for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { + assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL); + + if (i < decode_state->slice_params[j]->num_elements - 1) + next_slice_param = slice_param + 1; + else + next_slice_param = next_slice_group_param; + + gen6_mfd_vc1_bsd_object(ctx, pic_param, slice_param, next_slice_param, slice_data_bo, gen6_mfd_context); + slice_param++; + } + } + + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); +} + +static void +gen6_mfd_decode_picture(VADriverContextP ctx, + VAProfile profile, + union codec_state *codec_state, + struct hw_context *hw_context) + +{ + struct gen6_mfd_context *gen6_mfd_context = (struct gen6_mfd_context *)hw_context; + struct decode_state *decode_state = &codec_state->dec; + + assert(gen6_mfd_context); + + switch (profile) { + case VAProfileMPEG2Simple: + case VAProfileMPEG2Main: + gen6_mfd_mpeg2_decode_picture(ctx, decode_state, gen6_mfd_context); + break; + + case VAProfileH264Baseline: + case VAProfileH264Main: + case VAProfileH264High: + gen6_mfd_avc_decode_picture(ctx, decode_state, gen6_mfd_context); + break; + + case VAProfileVC1Simple: + case VAProfileVC1Main: + case VAProfileVC1Advanced: + gen6_mfd_vc1_decode_picture(ctx, decode_state, gen6_mfd_context); + break; + + default: + assert(0); + break; + } +} + +static void +gen6_mfd_context_destroy(void *hw_context) +{ + struct gen6_mfd_context *gen6_mfd_context = (struct gen6_mfd_context *)hw_context; + + dri_bo_unreference(gen6_mfd_context->post_deblocking_output.bo); + gen6_mfd_context->post_deblocking_output.bo = NULL; + + dri_bo_unreference(gen6_mfd_context->pre_deblocking_output.bo); + gen6_mfd_context->pre_deblocking_output.bo = NULL; + + dri_bo_unreference(gen6_mfd_context->intra_row_store_scratch_buffer.bo); + gen6_mfd_context->intra_row_store_scratch_buffer.bo = NULL; + + dri_bo_unreference(gen6_mfd_context->deblocking_filter_row_store_scratch_buffer.bo); + gen6_mfd_context->deblocking_filter_row_store_scratch_buffer.bo = NULL; + + dri_bo_unreference(gen6_mfd_context->bsd_mpc_row_store_scratch_buffer.bo); + gen6_mfd_context->bsd_mpc_row_store_scratch_buffer.bo = NULL; + + dri_bo_unreference(gen6_mfd_context->mpr_row_store_scratch_buffer.bo); + gen6_mfd_context->mpr_row_store_scratch_buffer.bo = NULL; + + dri_bo_unreference(gen6_mfd_context->bitplane_read_buffer.bo); + gen6_mfd_context->bitplane_read_buffer.bo = NULL; + + intel_batchbuffer_free(gen6_mfd_context->base.batch); + free(gen6_mfd_context); +} + +struct hw_context * +gen6_dec_hw_context_init(VADriverContextP ctx, VAProfile profile) +{ + struct intel_driver_data *intel = intel_driver_data(ctx); + struct gen6_mfd_context *gen6_mfd_context = calloc(1, sizeof(struct gen6_mfd_context)); + int i; + + gen6_mfd_context->base.destroy = gen6_mfd_context_destroy; + gen6_mfd_context->base.run = gen6_mfd_decode_picture; + gen6_mfd_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER); + + for (i = 0; i < ARRAY_ELEMS(gen6_mfd_context->reference_surface); i++) { + gen6_mfd_context->reference_surface[i].surface_id = VA_INVALID_ID; + gen6_mfd_context->reference_surface[i].frame_store_id = -1; + } + + return (struct hw_context *)gen6_mfd_context; +} diff --git a/src/gen6_mfd.h b/src/gen6_mfd.h new file mode 100644 index 00000000..31f79578 --- /dev/null +++ b/src/gen6_mfd.h @@ -0,0 +1,109 @@ +/* + * Copyright © 2010 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao <haihao.xiang@intel.com> + * + */ + +#ifndef _GEN6_MFD_H_ +#define _GEN6_MFD_H_ + +#include <xf86drm.h> +#include <drm.h> +#include <i915_drm.h> +#include <intel_bufmgr.h> + +struct gen6_avc_surface +{ + dri_bo *dmv_top; + dri_bo *dmv_bottom; + int dmv_bottom_flag; +}; + +#define GEN6_VC1_I_PICTURE 0 +#define GEN6_VC1_P_PICTURE 1 +#define GEN6_VC1_B_PICTURE 2 +#define GEN6_VC1_BI_PICTURE 3 +#define GEN6_VC1_SKIPPED_PICTURE 4 + +#define GEN6_VC1_SIMPLE_PROFILE 0 +#define GEN6_VC1_MAIN_PROFILE 1 +#define GEN6_VC1_ADVANCED_PROFILE 2 +#define GEN6_VC1_RESERVED_PROFILE 3 + +struct gen6_vc1_surface +{ + dri_bo *dmv; + int picture_type; +}; + +#define MAX_MFX_REFERENCE_SURFACES 16 +struct hw_context; + +struct gen6_mfd_context +{ + struct hw_context base; + + struct { + VASurfaceID surface_id; + int frame_store_id; + } reference_surface[MAX_MFX_REFERENCE_SURFACES]; + + struct { + dri_bo *bo; + int valid; + } post_deblocking_output; + + struct { + dri_bo *bo; + int valid; + } pre_deblocking_output; + + struct { + dri_bo *bo; + int valid; + } intra_row_store_scratch_buffer; + + struct { + dri_bo *bo; + int valid; + } deblocking_filter_row_store_scratch_buffer; + + struct { + dri_bo *bo; + int valid; + } bsd_mpc_row_store_scratch_buffer; + + struct { + dri_bo *bo; + int valid; + } mpr_row_store_scratch_buffer; + + struct { + dri_bo *bo; + int valid; + } bitplane_read_buffer; +}; + +#endif /* _GEN6_MFD_H_ */ diff --git a/src/gen6_vme.c b/src/gen6_vme.c new file mode 100644 index 00000000..09a042f2 --- /dev/null +++ b/src/gen6_vme.c @@ -0,0 +1,1004 @@ +/* + * Copyright © 2010-2011 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Zhou Chang <chang.zhou@intel.com> + * + */ + +#include <stdio.h> +#include <string.h> +#include <assert.h> + +#include <va/va_backend.h> + +#include "intel_batchbuffer.h" +#include "intel_driver.h" + +#include "i965_defines.h" +#include "i965_drv_video.h" +#include "gen6_vme.h" +#include "i965_encoder.h" + +#define SURFACE_STATE_PADDED_SIZE_0_GEN7 ALIGN(sizeof(struct gen7_surface_state), 32) +#define SURFACE_STATE_PADDED_SIZE_1_GEN7 ALIGN(sizeof(struct gen7_surface_state2), 32) +#define SURFACE_STATE_PADDED_SIZE_GEN7 MAX(SURFACE_STATE_PADDED_SIZE_0_GEN7, SURFACE_STATE_PADDED_SIZE_1_GEN7) + +#define SURFACE_STATE_PADDED_SIZE_0_GEN6 ALIGN(sizeof(struct i965_surface_state), 32) +#define SURFACE_STATE_PADDED_SIZE_1_GEN6 ALIGN(sizeof(struct i965_surface_state2), 32) +#define SURFACE_STATE_PADDED_SIZE_GEN6 MAX(SURFACE_STATE_PADDED_SIZE_0_GEN6, SURFACE_STATE_PADDED_SIZE_1_GEN7) + +#define SURFACE_STATE_PADDED_SIZE MAX(SURFACE_STATE_PADDED_SIZE_GEN6, SURFACE_STATE_PADDED_SIZE_GEN7) +#define SURFACE_STATE_OFFSET(index) (SURFACE_STATE_PADDED_SIZE * index) +#define BINDING_TABLE_OFFSET SURFACE_STATE_OFFSET(MAX_MEDIA_SURFACES_GEN6) + +#define VME_INTRA_SHADER 0 +#define VME_INTER_SHADER 1 + +#define CURBE_ALLOCATION_SIZE 37 /* in 256-bit */ +#define CURBE_TOTAL_DATA_LENGTH (4 * 32) /* in byte, it should be less than or equal to CURBE_ALLOCATION_SIZE * 32 */ +#define CURBE_URB_ENTRY_LENGTH 4 /* in 256-bit, it should be less than or equal to CURBE_TOTAL_DATA_LENGTH / 32 */ + +static const uint32_t gen6_vme_intra_frame[][4] = { +#include "shaders/vme/intra_frame.g6b" +}; + +static const uint32_t gen6_vme_inter_frame[][4] = { +#include "shaders/vme/inter_frame.g6b" +}; + +static struct i965_kernel gen6_vme_kernels[] = { + { + "VME Intra Frame", + VME_INTRA_SHADER, /*index*/ + gen6_vme_intra_frame, + sizeof(gen6_vme_intra_frame), + NULL + }, + { + "VME inter Frame", + VME_INTER_SHADER, + gen6_vme_inter_frame, + sizeof(gen6_vme_inter_frame), + NULL + } +}; + +static const uint32_t gen7_vme_intra_frame[][4] = { +#include "shaders/vme/intra_frame.g7b" +}; + +static const uint32_t gen7_vme_inter_frame[][4] = { +#include "shaders/vme/inter_frame.g7b" +}; + +static struct i965_kernel gen7_vme_kernels[] = { + { + "VME Intra Frame", + VME_INTRA_SHADER, /*index*/ + gen7_vme_intra_frame, + sizeof(gen7_vme_intra_frame), + NULL + }, + { + "VME inter Frame", + VME_INTER_SHADER, + gen7_vme_inter_frame, + sizeof(gen7_vme_inter_frame), + NULL + } +}; + +static void +gen6_vme_set_common_surface_tiling(struct i965_surface_state *ss, unsigned int tiling) +{ + switch (tiling) { + case I915_TILING_NONE: + ss->ss3.tiled_surface = 0; + ss->ss3.tile_walk = 0; + break; + case I915_TILING_X: + ss->ss3.tiled_surface = 1; + ss->ss3.tile_walk = I965_TILEWALK_XMAJOR; + break; + case I915_TILING_Y: + ss->ss3.tiled_surface = 1; + ss->ss3.tile_walk = I965_TILEWALK_YMAJOR; + break; + } +} + +static void +gen6_vme_set_source_surface_tiling(struct i965_surface_state2 *ss, unsigned int tiling) +{ + switch (tiling) { + case I915_TILING_NONE: + ss->ss2.tiled_surface = 0; + ss->ss2.tile_walk = 0; + break; + case I915_TILING_X: + ss->ss2.tiled_surface = 1; + ss->ss2.tile_walk = I965_TILEWALK_XMAJOR; + break; + case I915_TILING_Y: + ss->ss2.tiled_surface = 1; + ss->ss2.tile_walk = I965_TILEWALK_YMAJOR; + break; + } +} + +/* only used for VME source surface state */ +static void gen6_vme_source_surface_state(VADriverContextP ctx, + int index, + struct object_surface *obj_surface, + struct gen6_encoder_context *gen6_encoder_context) +{ + struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; + struct i965_surface_state2 *ss; + dri_bo *bo; + int w, h, w_pitch, h_pitch; + unsigned int tiling, swizzle; + + assert(obj_surface->bo); + dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + + w = obj_surface->orig_width; + h = obj_surface->orig_height; + w_pitch = obj_surface->width; + h_pitch = obj_surface->height; + + bo = vme_context->surface_state_binding_table.bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + + ss = (struct i965_surface_state2 *)((char *)bo->virtual + SURFACE_STATE_OFFSET(index)); + memset(ss, 0, sizeof(*ss)); + + ss->ss0.surface_base_address = obj_surface->bo->offset; + + ss->ss1.cbcr_pixel_offset_v_direction = 2; + ss->ss1.width = w - 1; + ss->ss1.height = h - 1; + + ss->ss2.surface_format = MFX_SURFACE_PLANAR_420_8; + ss->ss2.interleave_chroma = 1; + ss->ss2.pitch = w_pitch - 1; + ss->ss2.half_pitch_for_chroma = 0; + + gen6_vme_set_source_surface_tiling(ss, tiling); + + /* UV offset for interleave mode */ + ss->ss3.x_offset_for_cb = 0; + ss->ss3.y_offset_for_cb = h_pitch; + + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, 0, + 0, + SURFACE_STATE_OFFSET(index) + offsetof(struct i965_surface_state2, ss0), + obj_surface->bo); + + ((unsigned int *)((char *)bo->virtual + BINDING_TABLE_OFFSET))[index] = SURFACE_STATE_OFFSET(index); + dri_bo_unmap(bo); +} + +static void +gen6_vme_media_source_surface_state(VADriverContextP ctx, + int index, + struct object_surface *obj_surface, + struct gen6_encoder_context *gen6_encoder_context) +{ + struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; + struct i965_surface_state *ss; + dri_bo *bo; + int w, h, w_pitch; + unsigned int tiling, swizzle; + + w = obj_surface->orig_width; + h = obj_surface->orig_height; + w_pitch = obj_surface->width; + + /* Y plane */ + dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + + bo = vme_context->surface_state_binding_table.bo; + dri_bo_map(bo, True); + assert(bo->virtual); + + ss = (struct i965_surface_state *)((char *)bo->virtual + SURFACE_STATE_OFFSET(index)); + memset(ss, 0, sizeof(*ss)); + ss->ss0.surface_type = I965_SURFACE_2D; + ss->ss0.surface_format = I965_SURFACEFORMAT_R8_UNORM; + ss->ss1.base_addr = obj_surface->bo->offset; + ss->ss2.width = w / 4 - 1; + ss->ss2.height = h - 1; + ss->ss3.pitch = w_pitch - 1; + gen6_vme_set_common_surface_tiling(ss, tiling); + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, + 0, + 0, + SURFACE_STATE_OFFSET(index) + offsetof(struct i965_surface_state, ss1), + obj_surface->bo); + + ((unsigned int *)((char *)bo->virtual + BINDING_TABLE_OFFSET))[index] = SURFACE_STATE_OFFSET(index); + dri_bo_unmap(bo); +} + +static VAStatus +gen6_vme_output_buffer_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int index, + struct gen6_encoder_context *gen6_encoder_context) + +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; + struct i965_surface_state *ss; + dri_bo *bo; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param->buffer; + VAEncSliceParameterBuffer *pSliceParameter = (VAEncSliceParameterBuffer *)encode_state->slice_params[0]->buffer; + int is_intra = pSliceParameter->slice_flags.bits.is_intra; + int width_in_mbs = pSequenceParameter->picture_width_in_mbs; + int height_in_mbs = pSequenceParameter->picture_height_in_mbs; + int num_entries; + + if ( is_intra ) { + vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs; + } else { + vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs * 4; + } + vme_context->vme_output.size_block = 16; /* an OWORD */ + vme_context->vme_output.pitch = ALIGN(vme_context->vme_output.size_block, 16); + bo = dri_bo_alloc(i965->intel.bufmgr, + "VME output buffer", + vme_context->vme_output.num_blocks * vme_context->vme_output.pitch, + 0x1000); + assert(bo); + vme_context->vme_output.bo = bo; + + bo = vme_context->surface_state_binding_table.bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + + ss = (struct i965_surface_state *)((char *)bo->virtual + SURFACE_STATE_OFFSET(index)); + memset(ss, 0, sizeof(*ss)); + + /* always use 16 bytes as pitch on Sandy Bridge */ + num_entries = vme_context->vme_output.num_blocks * vme_context->vme_output.pitch / 16; + ss->ss0.render_cache_read_mode = 1; + ss->ss0.surface_type = I965_SURFACE_BUFFER; + ss->ss1.base_addr = vme_context->vme_output.bo->offset; + ss->ss2.width = ((num_entries - 1) & 0x7f); + ss->ss2.height = (((num_entries - 1) >> 7) & 0x1fff); + ss->ss3.depth = (((num_entries - 1) >> 20) & 0x7f); + ss->ss3.pitch = vme_context->vme_output.pitch - 1; + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, + 0, + SURFACE_STATE_OFFSET(index) + offsetof(struct i965_surface_state, ss1), + vme_context->vme_output.bo); + + + ((unsigned int *)((char *)bo->virtual + BINDING_TABLE_OFFSET))[index] = SURFACE_STATE_OFFSET(index); + dri_bo_unmap(bo); + return VA_STATUS_SUCCESS; +} + +static VAStatus gen6_vme_surface_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int is_intra, + struct gen6_encoder_context *gen6_encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface; + VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param->buffer; + + /*Setup surfaces state*/ + /* current picture for encoding */ + obj_surface = SURFACE(encode_state->current_render_target); + assert(obj_surface); + gen6_vme_source_surface_state(ctx, 0, obj_surface, gen6_encoder_context); + gen6_vme_media_source_surface_state(ctx, 4, obj_surface, gen6_encoder_context); + + if ( ! is_intra ) { + /* reference 0 */ + obj_surface = SURFACE(pPicParameter->reference_picture); + assert(obj_surface); + gen6_vme_source_surface_state(ctx, 1, obj_surface, gen6_encoder_context); + /* reference 1, FIXME: */ + // obj_surface = SURFACE(pPicParameter->reference_picture); + // assert(obj_surface); + //gen6_vme_source_surface_state(ctx, 2, obj_surface); + } + + /* VME output */ + gen6_vme_output_buffer_setup(ctx, encode_state, 3, gen6_encoder_context); + + return VA_STATUS_SUCCESS; +} + +/* + * Surface state for IvyBridge + */ +static void +gen7_vme_set_common_surface_tiling(struct gen7_surface_state *ss, unsigned int tiling) +{ + switch (tiling) { + case I915_TILING_NONE: + ss->ss0.tiled_surface = 0; + ss->ss0.tile_walk = 0; + break; + case I915_TILING_X: + ss->ss0.tiled_surface = 1; + ss->ss0.tile_walk = I965_TILEWALK_XMAJOR; + break; + case I915_TILING_Y: + ss->ss0.tiled_surface = 1; + ss->ss0.tile_walk = I965_TILEWALK_YMAJOR; + break; + } +} + +static void +gen7_vme_set_source_surface_tiling(struct gen7_surface_state2 *ss, unsigned int tiling) +{ + switch (tiling) { + case I915_TILING_NONE: + ss->ss2.tiled_surface = 0; + ss->ss2.tile_walk = 0; + break; + case I915_TILING_X: + ss->ss2.tiled_surface = 1; + ss->ss2.tile_walk = I965_TILEWALK_XMAJOR; + break; + case I915_TILING_Y: + ss->ss2.tiled_surface = 1; + ss->ss2.tile_walk = I965_TILEWALK_YMAJOR; + break; + } +} + +/* only used for VME source surface state */ +static void gen7_vme_source_surface_state(VADriverContextP ctx, + int index, + struct object_surface *obj_surface, + struct gen6_encoder_context *gen6_encoder_context) +{ + struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; + struct gen7_surface_state2 *ss; + dri_bo *bo; + int w, h, w_pitch, h_pitch; + unsigned int tiling, swizzle; + + assert(obj_surface->bo); + + w = obj_surface->orig_width; + h = obj_surface->orig_height; + w_pitch = obj_surface->width; + h_pitch = obj_surface->height; + + bo = vme_context->surface_state_binding_table.bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + + ss = (struct gen7_surface_state2 *)((char *)bo->virtual + SURFACE_STATE_OFFSET(index)); + memset(ss, 0, sizeof(*ss)); + + ss->ss0.surface_base_address = obj_surface->bo->offset; + + ss->ss1.cbcr_pixel_offset_v_direction = 2; + ss->ss1.width = w - 1; + ss->ss1.height = h - 1; + + ss->ss2.surface_format = MFX_SURFACE_PLANAR_420_8; + ss->ss2.interleave_chroma = 1; + ss->ss2.pitch = w_pitch - 1; + ss->ss2.half_pitch_for_chroma = 0; + + dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + gen7_vme_set_source_surface_tiling(ss, tiling); + + /* UV offset for interleave mode */ + ss->ss3.x_offset_for_cb = 0; + ss->ss3.y_offset_for_cb = h_pitch; + + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, 0, + 0, + SURFACE_STATE_OFFSET(index) + offsetof(struct gen7_surface_state2, ss0), + obj_surface->bo); + + ((unsigned int *)((char *)bo->virtual + BINDING_TABLE_OFFSET))[index] = SURFACE_STATE_OFFSET(index); + dri_bo_unmap(bo); +} + +static void +gen7_vme_media_source_surface_state(VADriverContextP ctx, + int index, + struct object_surface *obj_surface, + struct gen6_encoder_context *gen6_encoder_context) +{ + struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; + struct gen7_surface_state *ss; + dri_bo *bo; + int w, h, w_pitch; + unsigned int tiling, swizzle; + + /* Y plane */ + w = obj_surface->orig_width; + h = obj_surface->orig_height; + w_pitch = obj_surface->width; + + bo = vme_context->surface_state_binding_table.bo; + dri_bo_map(bo, True); + assert(bo->virtual); + + ss = (struct gen7_surface_state *)((char *)bo->virtual + SURFACE_STATE_OFFSET(index)); + memset(ss, 0, sizeof(*ss)); + + ss->ss0.surface_type = I965_SURFACE_2D; + ss->ss0.surface_format = I965_SURFACEFORMAT_R8_UNORM; + + ss->ss1.base_addr = obj_surface->bo->offset; + + ss->ss2.width = w / 4 - 1; + ss->ss2.height = h - 1; + + ss->ss3.pitch = w_pitch - 1; + + dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + gen7_vme_set_common_surface_tiling(ss, tiling); + + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, 0, + 0, + SURFACE_STATE_OFFSET(index) + offsetof(struct gen7_surface_state, ss1), + obj_surface->bo); + + ((unsigned int *)((char *)bo->virtual + BINDING_TABLE_OFFSET))[index] = SURFACE_STATE_OFFSET(index); + dri_bo_unmap(bo); +} + +static VAStatus +gen7_vme_output_buffer_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int index, + struct gen6_encoder_context *gen6_encoder_context) + +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; + struct gen7_surface_state *ss; + dri_bo *bo; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param->buffer; + VAEncSliceParameterBuffer *pSliceParameter = (VAEncSliceParameterBuffer *)encode_state->slice_params[0]->buffer; + int is_intra = pSliceParameter->slice_flags.bits.is_intra; + int width_in_mbs = pSequenceParameter->picture_width_in_mbs; + int height_in_mbs = pSequenceParameter->picture_height_in_mbs; + int num_entries; + + if ( is_intra ) { + vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs; + } else { + vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs * 4; + } + vme_context->vme_output.size_block = 16; /* an OWORD */ + vme_context->vme_output.pitch = ALIGN(vme_context->vme_output.size_block, 16); + bo = dri_bo_alloc(i965->intel.bufmgr, + "VME output buffer", + vme_context->vme_output.num_blocks * vme_context->vme_output.pitch, + 0x1000); + assert(bo); + vme_context->vme_output.bo = bo; + + bo = vme_context->surface_state_binding_table.bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + + ss = (struct gen7_surface_state *)((char *)bo->virtual + SURFACE_STATE_OFFSET(index)); + ss = bo->virtual; + memset(ss, 0, sizeof(*ss)); + + /* always use 16 bytes as pitch on Sandy Bridge */ + num_entries = vme_context->vme_output.num_blocks * vme_context->vme_output.pitch / 16; + + ss->ss0.surface_type = I965_SURFACE_BUFFER; + + ss->ss1.base_addr = vme_context->vme_output.bo->offset; + + ss->ss2.width = ((num_entries - 1) & 0x7f); + ss->ss2.height = (((num_entries - 1) >> 7) & 0x3fff); + ss->ss3.depth = (((num_entries - 1) >> 21) & 0x3f); + + ss->ss3.pitch = vme_context->vme_output.pitch - 1; + + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, + 0, + SURFACE_STATE_OFFSET(index) + offsetof(struct gen7_surface_state, ss1), + vme_context->vme_output.bo); + + ((unsigned int *)((char *)bo->virtual + BINDING_TABLE_OFFSET))[index] = SURFACE_STATE_OFFSET(index); + dri_bo_unmap(bo); + + return VA_STATUS_SUCCESS; +} + +static VAStatus gen7_vme_surface_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int is_intra, + struct gen6_encoder_context *gen6_encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface; + VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param->buffer; + + /*Setup surfaces state*/ + /* current picture for encoding */ + obj_surface = SURFACE(encode_state->current_render_target); + assert(obj_surface); + gen7_vme_source_surface_state(ctx, 1, obj_surface, gen6_encoder_context); + gen7_vme_media_source_surface_state(ctx, 4, obj_surface, gen6_encoder_context); + + if ( ! is_intra ) { + /* reference 0 */ + obj_surface = SURFACE(pPicParameter->reference_picture); + assert(obj_surface); + gen7_vme_source_surface_state(ctx, 2, obj_surface, gen6_encoder_context); + /* reference 1, FIXME: */ + // obj_surface = SURFACE(pPicParameter->reference_picture); + // assert(obj_surface); + //gen7_vme_source_surface_state(ctx, 3, obj_surface); + } + + /* VME output */ + gen7_vme_output_buffer_setup(ctx, encode_state, 0, gen6_encoder_context); + + return VA_STATUS_SUCCESS; +} + +static VAStatus gen6_vme_interface_setup(VADriverContextP ctx, + struct encode_state *encode_state, + struct gen6_encoder_context *gen6_encoder_context) +{ + struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; + struct gen6_interface_descriptor_data *desc; + int i; + dri_bo *bo; + + bo = vme_context->idrt.bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + desc = bo->virtual; + + for (i = 0; i < GEN6_VME_KERNEL_NUMBER; i++) { + struct i965_kernel *kernel; + kernel = &vme_context->vme_kernels[i]; + assert(sizeof(*desc) == 32); + /*Setup the descritor table*/ + memset(desc, 0, sizeof(*desc)); + desc->desc0.kernel_start_pointer = (kernel->bo->offset >> 6); + desc->desc2.sampler_count = 1; /* FIXME: */ + desc->desc2.sampler_state_pointer = (vme_context->vme_state.bo->offset >> 5); + desc->desc3.binding_table_entry_count = 1; /* FIXME: */ + desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET >> 5); + desc->desc4.constant_urb_entry_read_offset = 0; + desc->desc4.constant_urb_entry_read_length = CURBE_URB_ENTRY_LENGTH; + + /*kernel start*/ + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0, + i * sizeof(*desc) + offsetof(struct gen6_interface_descriptor_data, desc0), + kernel->bo); + /*Sampler State(VME state pointer)*/ + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + (1 << 2), // + i * sizeof(*desc) + offsetof(struct gen6_interface_descriptor_data, desc2), + vme_context->vme_state.bo); + desc++; + } + dri_bo_unmap(bo); + + return VA_STATUS_SUCCESS; +} + +static VAStatus gen6_vme_constant_setup(VADriverContextP ctx, + struct encode_state *encode_state, + struct gen6_encoder_context *gen6_encoder_context) +{ + struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; + unsigned char *constant_buffer; + + dri_bo_map(vme_context->curbe.bo, 1); + assert(vme_context->curbe.bo->virtual); + constant_buffer = vme_context->curbe.bo->virtual; + + /*TODO copy buffer into CURB*/ + + dri_bo_unmap( vme_context->curbe.bo); + + return VA_STATUS_SUCCESS; +} + +static VAStatus gen6_vme_vme_state_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int is_intra, + struct gen6_encoder_context *gen6_encoder_context) +{ + struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; + unsigned int *vme_state_message; + int i; + + //building VME state message + dri_bo_map(vme_context->vme_state.bo, 1); + assert(vme_context->vme_state.bo->virtual); + vme_state_message = (unsigned int *)vme_context->vme_state.bo->virtual; + + vme_state_message[0] = 0x10010101; + vme_state_message[1] = 0x100F0F0F; + vme_state_message[2] = 0x10010101; + vme_state_message[3] = 0x000F0F0F; + for(i = 4; i < 14; i++) { + vme_state_message[i] = 0x00000000; + } + + for(i = 14; i < 32; i++) { + vme_state_message[i] = 0x00000000; + } + + //vme_state_message[16] = 0x42424242; //cost function LUT set 0 for Intra + + dri_bo_unmap( vme_context->vme_state.bo); + return VA_STATUS_SUCCESS; +} + +static void gen6_vme_pipeline_select(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) +{ + struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + + BEGIN_BATCH(batch, 1); + OUT_BATCH(batch, CMD_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA); + ADVANCE_BATCH(batch); +} + +static void gen6_vme_state_base_address(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) +{ + struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; + struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + + BEGIN_BATCH(batch, 10); + + OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | 8); + + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); //General State Base Address + OUT_RELOC(batch, vme_context->surface_state_binding_table.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* Surface state base address */ + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); //Dynamic State Base Address + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); //Indirect Object Base Address + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); //Instruction Base Address + + OUT_BATCH(batch, 0xFFFFF000 | BASE_ADDRESS_MODIFY); //General State Access Upper Bound + OUT_BATCH(batch, 0xFFFFF000 | BASE_ADDRESS_MODIFY); //Dynamic State Access Upper Bound + OUT_BATCH(batch, 0xFFFFF000 | BASE_ADDRESS_MODIFY); //Indirect Object Access Upper Bound + OUT_BATCH(batch, 0xFFFFF000 | BASE_ADDRESS_MODIFY); //Instruction Access Upper Bound + + /* + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); //LLC Coherent Base Address + OUT_BATCH(batch, 0xFFFFF000 | BASE_ADDRESS_MODIFY ); //LLC Coherent Upper Bound + */ + + ADVANCE_BATCH(batch); +} + +static void gen6_vme_vfe_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) +{ + struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; + + BEGIN_BATCH(batch, 8); + + OUT_BATCH(batch, CMD_MEDIA_VFE_STATE | 6); /*Gen6 CMD_MEDIA_STATE_POINTERS = CMD_MEDIA_STATE */ + OUT_BATCH(batch, 0); /*Scratch Space Base Pointer and Space*/ + OUT_BATCH(batch, (vme_context->vfe_state.max_num_threads << 16) + | (vme_context->vfe_state.num_urb_entries << 8) + | (vme_context->vfe_state.gpgpu_mode << 2) ); /*Maximum Number of Threads , Number of URB Entries, MEDIA Mode*/ + OUT_BATCH(batch, 0); /*Debug: Object ID*/ + OUT_BATCH(batch, (vme_context->vfe_state.urb_entry_size << 16) + | vme_context->vfe_state.curbe_allocation_size); /*URB Entry Allocation Size , CURBE Allocation Size*/ + OUT_BATCH(batch, 0); /*Disable Scoreboard*/ + OUT_BATCH(batch, 0); /*Disable Scoreboard*/ + OUT_BATCH(batch, 0); /*Disable Scoreboard*/ + + ADVANCE_BATCH(batch); + +} + +static void gen6_vme_curbe_load(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) +{ + struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; + + BEGIN_BATCH(batch, 4); + + OUT_BATCH(batch, CMD_MEDIA_CURBE_LOAD | 2); + OUT_BATCH(batch, 0); + + OUT_BATCH(batch, CURBE_TOTAL_DATA_LENGTH); + OUT_RELOC(batch, vme_context->curbe.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + + ADVANCE_BATCH(batch); +} + +static void gen6_vme_idrt(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) +{ + struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; + + BEGIN_BATCH(batch, 4); + + OUT_BATCH(batch, CMD_MEDIA_INTERFACE_LOAD | 2); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, GEN6_VME_KERNEL_NUMBER * sizeof(struct gen6_interface_descriptor_data)); + OUT_RELOC(batch, vme_context->idrt.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + + ADVANCE_BATCH(batch); +} + +static int gen6_vme_media_object(VADriverContextP ctx, + struct encode_state *encode_state, + int mb_x, int mb_y, + int kernel, + struct gen6_encoder_context *gen6_encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + struct object_surface *obj_surface = SURFACE(encode_state->current_render_target); + int mb_width = ALIGN(obj_surface->orig_width, 16) / 16; + int len_in_dowrds = 6 + 1; + + BEGIN_BATCH(batch, len_in_dowrds); + + OUT_BATCH(batch, CMD_MEDIA_OBJECT | (len_in_dowrds - 2)); + OUT_BATCH(batch, kernel); /*Interface Descriptor Offset*/ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + + /*inline data */ + OUT_BATCH(batch, mb_width << 16 | mb_y << 8 | mb_x); /*M0.0 Refrence0 X,Y, not used in Intra*/ + ADVANCE_BATCH(batch); + + return len_in_dowrds * 4; +} + +static void gen6_vme_media_init(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; + dri_bo *bo; + + /* constant buffer */ + dri_bo_unreference(vme_context->curbe.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + CURBE_TOTAL_DATA_LENGTH, 64); + assert(bo); + vme_context->curbe.bo = bo; + + dri_bo_unreference(vme_context->surface_state_binding_table.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "surface state & binding table", + (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_MEDIA_SURFACES_GEN6, + 4096); + assert(bo); + vme_context->surface_state_binding_table.bo = bo; + + /* interface descriptor remapping table */ + dri_bo_unreference(vme_context->idrt.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + MAX_INTERFACE_DESC_GEN6 * sizeof(struct gen6_interface_descriptor_data), 16); + assert(bo); + vme_context->idrt.bo = bo; + + /* VME output buffer */ + dri_bo_unreference(vme_context->vme_output.bo); + vme_context->vme_output.bo = NULL; + + /* VME state */ + dri_bo_unreference(vme_context->vme_state.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + 1024*16, 64); + assert(bo); + vme_context->vme_state.bo = bo; + + vme_context->vfe_state.max_num_threads = 60 - 1; + vme_context->vfe_state.num_urb_entries = 16; + vme_context->vfe_state.gpgpu_mode = 0; + vme_context->vfe_state.urb_entry_size = 59 - 1; + vme_context->vfe_state.curbe_allocation_size = CURBE_ALLOCATION_SIZE - 1; +} + +static void gen6_vme_pipeline_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct gen6_encoder_context *gen6_encoder_context) +{ + struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + VAEncSliceParameterBuffer *pSliceParameter = (VAEncSliceParameterBuffer *)encode_state->slice_params[0]->buffer; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param->buffer; + int is_intra = pSliceParameter->slice_flags.bits.is_intra; + int width_in_mbs = pSequenceParameter->picture_width_in_mbs; + int height_in_mbs = pSequenceParameter->picture_height_in_mbs; + int emit_new_state = 1, object_len_in_bytes; + int x, y; + + intel_batchbuffer_start_atomic(batch, 0x1000); + + for(y = 0; y < height_in_mbs; y++){ + for(x = 0; x < width_in_mbs; x++){ + + if (emit_new_state) { + /*Step1: MI_FLUSH/PIPE_CONTROL*/ + intel_batchbuffer_emit_mi_flush(batch); + + /*Step2: State command PIPELINE_SELECT*/ + gen6_vme_pipeline_select(ctx, gen6_encoder_context); + + /*Step3: State commands configuring pipeline states*/ + gen6_vme_state_base_address(ctx, gen6_encoder_context); + gen6_vme_vfe_state(ctx, gen6_encoder_context); + gen6_vme_curbe_load(ctx, gen6_encoder_context); + gen6_vme_idrt(ctx, gen6_encoder_context); + + emit_new_state = 0; + } + + /*Step4: Primitive commands*/ + object_len_in_bytes = gen6_vme_media_object(ctx, encode_state, x, y, is_intra ? VME_INTRA_SHADER : VME_INTER_SHADER, gen6_encoder_context); + + if (intel_batchbuffer_check_free_space(batch, object_len_in_bytes) == 0) { + assert(0); + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); + emit_new_state = 1; + intel_batchbuffer_start_atomic(batch, 0x1000); + } + } + } + + intel_batchbuffer_end_atomic(batch); +} + +static VAStatus gen6_vme_prepare(VADriverContextP ctx, + struct encode_state *encode_state, + struct gen6_encoder_context *gen6_encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + VAStatus vaStatus = VA_STATUS_SUCCESS; + VAEncSliceParameterBuffer *pSliceParameter = (VAEncSliceParameterBuffer *)encode_state->slice_params[0]->buffer; + int is_intra = pSliceParameter->slice_flags.bits.is_intra; + + /*Setup all the memory object*/ + if (IS_GEN7(i965->intel.device_id)) + gen7_vme_surface_setup(ctx, encode_state, is_intra, gen6_encoder_context); + else + gen6_vme_surface_setup(ctx, encode_state, is_intra, gen6_encoder_context); + + gen6_vme_interface_setup(ctx, encode_state, gen6_encoder_context); + gen6_vme_constant_setup(ctx, encode_state, gen6_encoder_context); + gen6_vme_vme_state_setup(ctx, encode_state, is_intra, gen6_encoder_context); + + /*Programing media pipeline*/ + gen6_vme_pipeline_programing(ctx, encode_state, gen6_encoder_context); + + return vaStatus; +} + +static VAStatus gen6_vme_run(VADriverContextP ctx, + struct encode_state *encode_state, + struct gen6_encoder_context *gen6_encoder_context) +{ + struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + + intel_batchbuffer_flush(batch); + + return VA_STATUS_SUCCESS; +} + +static VAStatus gen6_vme_stop(VADriverContextP ctx, + struct encode_state *encode_state, + struct gen6_encoder_context *gen6_encoder_context) +{ + return VA_STATUS_SUCCESS; +} + +VAStatus gen6_vme_pipeline(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct gen6_encoder_context *gen6_encoder_context) +{ + gen6_vme_media_init(ctx, gen6_encoder_context); + gen6_vme_prepare(ctx, encode_state, gen6_encoder_context); + gen6_vme_run(ctx, encode_state, gen6_encoder_context); + gen6_vme_stop(ctx, encode_state, gen6_encoder_context); + + return VA_STATUS_SUCCESS; +} + +Bool gen6_vme_context_init(VADriverContextP ctx, struct gen6_vme_context *vme_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + int i; + + if (IS_GEN7(i965->intel.device_id)) + memcpy(vme_context->vme_kernels, gen7_vme_kernels, sizeof(vme_context->vme_kernels)); + else + memcpy(vme_context->vme_kernels, gen6_vme_kernels, sizeof(vme_context->vme_kernels)); + + for (i = 0; i < GEN6_VME_KERNEL_NUMBER; i++) { + /*Load kernel into GPU memory*/ + struct i965_kernel *kernel = &vme_context->vme_kernels[i]; + + kernel->bo = dri_bo_alloc(i965->intel.bufmgr, + kernel->name, + kernel->size, + 0x1000); + assert(kernel->bo); + dri_bo_subdata(kernel->bo, 0, kernel->size, kernel->bin); + } + + return True; +} + +Bool gen6_vme_context_destroy(struct gen6_vme_context *vme_context) +{ + int i; + + dri_bo_unreference(vme_context->idrt.bo); + vme_context->idrt.bo = NULL; + + dri_bo_unreference(vme_context->surface_state_binding_table.bo); + vme_context->surface_state_binding_table.bo = NULL; + + dri_bo_unreference(vme_context->curbe.bo); + vme_context->curbe.bo = NULL; + + dri_bo_unreference(vme_context->vme_output.bo); + vme_context->vme_output.bo = NULL; + + dri_bo_unreference(vme_context->vme_state.bo); + vme_context->vme_state.bo = NULL; + + for (i = 0; i < GEN6_VME_KERNEL_NUMBER; i++) { + /*Load kernel into GPU memory*/ + struct i965_kernel *kernel = &vme_context->vme_kernels[i]; + + dri_bo_unreference(kernel->bo); + kernel->bo = NULL; + } + + return True; +} diff --git a/src/gen6_vme.h b/src/gen6_vme.h new file mode 100644 index 00000000..800898c5 --- /dev/null +++ b/src/gen6_vme.h @@ -0,0 +1,89 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWAR + * + * Authors: + * Zhou Chang <chang.zhou@intel.com> + * + */ + +#ifndef _GEN6_VME_H_ +#define _GEN6_VME_H_ + +#include <xf86drm.h> +#include <drm.h> +#include <i915_drm.h> +#include <intel_bufmgr.h> + + +#define MAX_INTERFACE_DESC_GEN6 32 +#define MAX_MEDIA_SURFACES_GEN6 34 + +#define GEN6_VME_KERNEL_NUMBER 2 + +struct encode_state; +struct gen6_encoder_context; + +struct gen6_vme_context +{ + struct { + dri_bo *bo; + } surface_state_binding_table; + + struct { + dri_bo *bo; + } idrt; /* interface descriptor remap table */ + + struct { + dri_bo *bo; + } curbe; + + struct { + unsigned int gpgpu_mode:1; + unsigned int max_num_threads:16; + unsigned int num_urb_entries:8; + unsigned int urb_entry_size:16; + unsigned int curbe_allocation_size:16; + } vfe_state; + + struct { + dri_bo *bo; + } vme_state; + + struct { + dri_bo *bo; + unsigned int num_blocks; + unsigned int size_block; /* in bytes */ + unsigned int pitch; + } vme_output; + + struct i965_kernel vme_kernels[GEN6_VME_KERNEL_NUMBER]; +}; + +VAStatus gen6_vme_pipeline(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct gen6_encoder_context *gen6_encoder_context); +Bool gen6_vme_context_init(VADriverContextP ctx, struct gen6_vme_context *vme_context); +Bool gen6_vme_context_destroy(struct gen6_vme_context *vme_context); + +#endif /* _GEN6_VME_H_ */ diff --git a/src/gen7_mfd.c b/src/gen7_mfd.c new file mode 100644 index 00000000..1188b841 --- /dev/null +++ b/src/gen7_mfd.c @@ -0,0 +1,2069 @@ +/* + * Copyright © 2011 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao <haihao.xiang@intel.com> + * + */ + +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <assert.h> + +#include <va/va_backend.h> + +#include "intel_batchbuffer.h" +#include "intel_driver.h" + +#include "i965_defines.h" +#include "i965_drv_video.h" + +#include "gen7_mfd.h" + +#define DMV_SIZE 0x88000 /* 557056 bytes for a frame */ + +static const uint32_t zigzag_direct[64] = { + 0, 1, 8, 16, 9, 2, 3, 10, + 17, 24, 32, 25, 18, 11, 4, 5, + 12, 19, 26, 33, 40, 48, 41, 34, + 27, 20, 13, 6, 7, 14, 21, 28, + 35, 42, 49, 56, 57, 50, 43, 36, + 29, 22, 15, 23, 30, 37, 44, 51, + 58, 59, 52, 45, 38, 31, 39, 46, + 53, 60, 61, 54, 47, 55, 62, 63 +}; + +static void +gen7_mfd_avc_frame_store_index(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + int i, j; + + assert(ARRAY_ELEMS(gen7_mfd_context->reference_surface) == ARRAY_ELEMS(pic_param->ReferenceFrames)); + + for (i = 0; i < ARRAY_ELEMS(gen7_mfd_context->reference_surface); i++) { + int found = 0; + + if (gen7_mfd_context->reference_surface[i].surface_id == VA_INVALID_ID) + continue; + + for (j = 0; j < ARRAY_ELEMS(pic_param->ReferenceFrames); j++) { + VAPictureH264 *ref_pic = &pic_param->ReferenceFrames[j]; + if (ref_pic->flags & VA_PICTURE_H264_INVALID) + continue; + + if (gen7_mfd_context->reference_surface[i].surface_id == ref_pic->picture_id) { + found = 1; + break; + } + } + + if (!found) { + struct object_surface *obj_surface = SURFACE(gen7_mfd_context->reference_surface[i].surface_id); + obj_surface->flags &= ~SURFACE_REFERENCED; + + if ((obj_surface->flags & SURFACE_ALL_MASK) == SURFACE_DISPLAYED) { + dri_bo_unreference(obj_surface->bo); + obj_surface->bo = NULL; + obj_surface->flags &= ~SURFACE_REF_DIS_MASK; + } + + if (obj_surface->free_private_data) + obj_surface->free_private_data(&obj_surface->private_data); + + gen7_mfd_context->reference_surface[i].surface_id = VA_INVALID_ID; + gen7_mfd_context->reference_surface[i].frame_store_id = -1; + } + } + + for (i = 0; i < ARRAY_ELEMS(pic_param->ReferenceFrames); i++) { + VAPictureH264 *ref_pic = &pic_param->ReferenceFrames[i]; + int found = 0; + + if (ref_pic->flags & VA_PICTURE_H264_INVALID) + continue; + + for (j = 0; j < ARRAY_ELEMS(gen7_mfd_context->reference_surface); j++) { + if (gen7_mfd_context->reference_surface[j].surface_id == VA_INVALID_ID) + continue; + + if (gen7_mfd_context->reference_surface[j].surface_id == ref_pic->picture_id) { + found = 1; + break; + } + } + + if (!found) { + int frame_idx; + struct object_surface *obj_surface = SURFACE(ref_pic->picture_id); + + assert(obj_surface); + i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N','V','1','2')); + + for (frame_idx = 0; frame_idx < ARRAY_ELEMS(gen7_mfd_context->reference_surface); frame_idx++) { + for (j = 0; j < ARRAY_ELEMS(gen7_mfd_context->reference_surface); j++) { + if (gen7_mfd_context->reference_surface[j].surface_id == VA_INVALID_ID) + continue; + + if (gen7_mfd_context->reference_surface[j].frame_store_id == frame_idx) + break; + } + + if (j == ARRAY_ELEMS(gen7_mfd_context->reference_surface)) + break; + } + + assert(frame_idx < ARRAY_ELEMS(gen7_mfd_context->reference_surface)); + + for (j = 0; j < ARRAY_ELEMS(gen7_mfd_context->reference_surface); j++) { + if (gen7_mfd_context->reference_surface[j].surface_id == VA_INVALID_ID) { + gen7_mfd_context->reference_surface[j].surface_id = ref_pic->picture_id; + gen7_mfd_context->reference_surface[j].frame_store_id = frame_idx; + break; + } + } + } + } + + /* sort */ + for (i = 0; i < ARRAY_ELEMS(gen7_mfd_context->reference_surface) - 1; i++) { + if (gen7_mfd_context->reference_surface[i].surface_id != VA_INVALID_ID && + gen7_mfd_context->reference_surface[i].frame_store_id == i) + continue; + + for (j = i + 1; j < ARRAY_ELEMS(gen7_mfd_context->reference_surface); j++) { + if (gen7_mfd_context->reference_surface[j].surface_id != VA_INVALID_ID && + gen7_mfd_context->reference_surface[j].frame_store_id == i) { + VASurfaceID id = gen7_mfd_context->reference_surface[i].surface_id; + int frame_idx = gen7_mfd_context->reference_surface[i].frame_store_id; + + gen7_mfd_context->reference_surface[i].surface_id = gen7_mfd_context->reference_surface[j].surface_id; + gen7_mfd_context->reference_surface[i].frame_store_id = gen7_mfd_context->reference_surface[j].frame_store_id; + gen7_mfd_context->reference_surface[j].surface_id = id; + gen7_mfd_context->reference_surface[j].frame_store_id = frame_idx; + break; + } + } + } +} + +static void +gen7_mfd_free_avc_surface(void **data) +{ + struct gen7_avc_surface *gen7_avc_surface = *data; + + if (!gen7_avc_surface) + return; + + dri_bo_unreference(gen7_avc_surface->dmv_top); + gen7_avc_surface->dmv_top = NULL; + dri_bo_unreference(gen7_avc_surface->dmv_bottom); + gen7_avc_surface->dmv_bottom = NULL; + + free(gen7_avc_surface); + *data = NULL; +} + +static void +gen7_mfd_init_avc_surface(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + struct object_surface *obj_surface) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen7_avc_surface *gen7_avc_surface = obj_surface->private_data; + + obj_surface->free_private_data = gen7_mfd_free_avc_surface; + + if (!gen7_avc_surface) { + gen7_avc_surface = calloc(sizeof(struct gen7_avc_surface), 1); + assert((obj_surface->size & 0x3f) == 0); + obj_surface->private_data = gen7_avc_surface; + } + + gen7_avc_surface->dmv_bottom_flag = (pic_param->pic_fields.bits.field_pic_flag && + !pic_param->seq_fields.bits.direct_8x8_inference_flag); + + if (gen7_avc_surface->dmv_top == NULL) { + gen7_avc_surface->dmv_top = dri_bo_alloc(i965->intel.bufmgr, + "direct mv w/r buffer", + DMV_SIZE, + 0x1000); + } + + if (gen7_avc_surface->dmv_bottom_flag && + gen7_avc_surface->dmv_bottom == NULL) { + gen7_avc_surface->dmv_bottom = dri_bo_alloc(i965->intel.bufmgr, + "direct mv w/r buffer", + DMV_SIZE, + 0x1000); + } +} + +static void +gen7_mfd_pipe_mode_select(VADriverContextP ctx, + struct decode_state *decode_state, + int standard_select, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + + assert(standard_select == MFX_FORMAT_MPEG2 || + standard_select == MFX_FORMAT_AVC || + standard_select == MFX_FORMAT_VC1 || + standard_select == MFX_FORMAT_JPEG); + + BEGIN_BCS_BATCH(batch, 5); /* FIXME: 5 ??? */ + OUT_BCS_BATCH(batch, MFX_PIPE_MODE_SELECT | (5 - 2)); + OUT_BCS_BATCH(batch, + (MFX_LONG_MODE << 17) | /* Currently only support long format */ + (MFD_MODE_VLD << 15) | /* VLD mode */ + (0 << 10) | /* disable Stream-Out */ + (gen7_mfd_context->post_deblocking_output.valid << 9) | /* Post Deblocking Output */ + (gen7_mfd_context->pre_deblocking_output.valid << 8) | /* Pre Deblocking Output */ + (0 << 5) | /* not in stitch mode */ + (MFX_CODEC_DECODE << 4) | /* decoding mode */ + (standard_select << 0)); + OUT_BCS_BATCH(batch, + (0 << 4) | /* terminate if AVC motion and POC table error occurs */ + (0 << 3) | /* terminate if AVC mbdata error occurs */ + (0 << 2) | /* terminate if AVC CABAC/CAVLC decode error occurs */ + (0 << 1) | + (0 << 0)); + OUT_BCS_BATCH(batch, 0); /* pic status/error report id */ + OUT_BCS_BATCH(batch, 0); /* reserved */ + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_mfd_surface_state(VADriverContextP ctx, + struct decode_state *decode_state, + int standard_select, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface = SURFACE(decode_state->current_render_target); + assert(obj_surface); + + BEGIN_BCS_BATCH(batch, 6); + OUT_BCS_BATCH(batch, MFX_SURFACE_STATE | (6 - 2)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, + ((obj_surface->orig_height - 1) << 18) | + ((obj_surface->orig_width - 1) << 4)); + OUT_BCS_BATCH(batch, + (MFX_SURFACE_PLANAR_420_8 << 28) | /* 420 planar YUV surface */ + (1 << 27) | /* FIXME: set to 0 for JPEG */ + (0 << 22) | /* surface object control state, FIXME??? */ + ((obj_surface->width - 1) << 3) | /* pitch */ + (0 << 2) | /* must be 0 for interleave U/V */ + (1 << 1) | /* must be tiled */ + (I965_TILEWALK_YMAJOR << 0)); /* tile walk, must be 1 */ + OUT_BCS_BATCH(batch, + (0 << 16) | /* FIXME: fix it for JPEG */ + (obj_surface->height)); /* FIXME: fix it for JPEG */ + OUT_BCS_BATCH(batch, 0); /* FIXME: fix it for JPEG */ + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_mfd_pipe_buf_addr_state(VADriverContextP ctx, + struct decode_state *decode_state, + int standard_select, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + struct i965_driver_data *i965 = i965_driver_data(ctx); + int i; + + BEGIN_BCS_BATCH(batch, 24); + OUT_BCS_BATCH(batch, MFX_PIPE_BUF_ADDR_STATE | (24 - 2)); + if (gen7_mfd_context->pre_deblocking_output.valid) + OUT_BCS_RELOC(batch, gen7_mfd_context->pre_deblocking_output.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + if (gen7_mfd_context->post_deblocking_output.valid) + OUT_BCS_RELOC(batch, gen7_mfd_context->post_deblocking_output.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + OUT_BCS_BATCH(batch, 0); /* ignore for decoding */ + OUT_BCS_BATCH(batch, 0); /* ignore for decoding */ + + if (gen7_mfd_context->intra_row_store_scratch_buffer.valid) + OUT_BCS_RELOC(batch, gen7_mfd_context->intra_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + if (gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.valid) + OUT_BCS_RELOC(batch, gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + /* DW 7..22 */ + for (i = 0; i < ARRAY_ELEMS(gen7_mfd_context->reference_surface); i++) { + struct object_surface *obj_surface; + + if (gen7_mfd_context->reference_surface[i].surface_id != VA_INVALID_ID) { + obj_surface = SURFACE(gen7_mfd_context->reference_surface[i].surface_id); + assert(obj_surface && obj_surface->bo); + + OUT_BCS_RELOC(batch, obj_surface->bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + } else { + OUT_BCS_BATCH(batch, 0); + } + } + + OUT_BCS_BATCH(batch, 0); /* ignore DW23 for decoding */ + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_mfd_ind_obj_base_addr_state(VADriverContextP ctx, + dri_bo *slice_data_bo, + int standard_select, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + + BEGIN_BCS_BATCH(batch, 11); + OUT_BCS_BATCH(batch, MFX_IND_OBJ_BASE_ADDR_STATE | (11 - 2)); + OUT_BCS_RELOC(batch, slice_data_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); /* MFX Indirect Bitstream Object Base Address */ + OUT_BCS_BATCH(batch, 0x80000000); /* must set, up to 2G */ + OUT_BCS_BATCH(batch, 0); /* ignore for VLD mode */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); /* ignore for VLD mode */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); /* ignore for VLD mode */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); /* ignore for VLD mode */ + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_mfd_bsp_buf_base_addr_state(VADriverContextP ctx, + struct decode_state *decode_state, + int standard_select, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + + BEGIN_BCS_BATCH(batch, 4); + OUT_BCS_BATCH(batch, MFX_BSP_BUF_BASE_ADDR_STATE | (4 - 2)); + + if (gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.valid) + OUT_BCS_RELOC(batch, gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + if (gen7_mfd_context->mpr_row_store_scratch_buffer.valid) + OUT_BCS_RELOC(batch, gen7_mfd_context->mpr_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + if (gen7_mfd_context->bitplane_read_buffer.valid) + OUT_BCS_RELOC(batch, gen7_mfd_context->bitplane_read_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + else + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_mfd_aes_state(VADriverContextP ctx, + struct decode_state *decode_state, + int standard_select) +{ + /* FIXME */ +} + +static void +gen7_mfd_qm_state(VADriverContextP ctx, + int qm_type, + unsigned char *qm, + int qm_length, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + unsigned int qm_buffer[16]; + + assert(qm_length <= 16 * 4); + memcpy(qm_buffer, qm, qm_length); + + BEGIN_BCS_BATCH(batch, 18); + OUT_BCS_BATCH(batch, MFX_QM_STATE | (18 - 2)); + OUT_BCS_BATCH(batch, qm_type << 0); + intel_batchbuffer_data(batch, qm_buffer, 16 * 4); + ADVANCE_BCS_BATCH(batch); +} +static void +gen7_mfd_wait(VADriverContextP ctx, + struct decode_state *decode_state, + int standard_select, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + + BEGIN_BCS_BATCH(batch, 1); + OUT_BCS_BATCH(batch, MFX_WAIT | (1 << 8)); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_mfd_avc_img_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int qm_present_flag; + int img_struct; + int mbaff_frame_flag; + unsigned int width_in_mbs, height_in_mbs; + VAPictureParameterBufferH264 *pic_param; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; + assert(!(pic_param->CurrPic.flags & VA_PICTURE_H264_INVALID)); + + if (decode_state->iq_matrix && decode_state->iq_matrix->buffer) + qm_present_flag = 1; + else + qm_present_flag = 0; /* built-in QM matrices */ + + if (pic_param->CurrPic.flags & VA_PICTURE_H264_TOP_FIELD) + img_struct = 1; + else if (pic_param->CurrPic.flags & VA_PICTURE_H264_BOTTOM_FIELD) + img_struct = 3; + else + img_struct = 0; + + if ((img_struct & 0x1) == 0x1) { + assert(pic_param->pic_fields.bits.field_pic_flag == 0x1); + } else { + assert(pic_param->pic_fields.bits.field_pic_flag == 0x0); + } + + if (pic_param->seq_fields.bits.frame_mbs_only_flag) { /* a frame containing only frame macroblocks */ + assert(pic_param->seq_fields.bits.mb_adaptive_frame_field_flag == 0); + assert(pic_param->pic_fields.bits.field_pic_flag == 0); + } else { + assert(pic_param->seq_fields.bits.direct_8x8_inference_flag == 1); /* see H.264 spec */ + } + + mbaff_frame_flag = (pic_param->seq_fields.bits.mb_adaptive_frame_field_flag && + !pic_param->pic_fields.bits.field_pic_flag); + + width_in_mbs = ((pic_param->picture_width_in_mbs_minus1 + 1) & 0xff); + height_in_mbs = ((pic_param->picture_height_in_mbs_minus1 + 1) & 0xff); /* frame height */ + + /* MFX unit doesn't support 4:2:2 and 4:4:4 picture */ + assert(pic_param->seq_fields.bits.chroma_format_idc == 0 || /* monochrome picture */ + pic_param->seq_fields.bits.chroma_format_idc == 1); /* 4:2:0 */ + assert(pic_param->seq_fields.bits.residual_colour_transform_flag == 0); /* only available for 4:4:4 */ + + BEGIN_BCS_BATCH(batch, 16); + OUT_BCS_BATCH(batch, MFX_AVC_IMG_STATE | (16 - 2)); + OUT_BCS_BATCH(batch, + width_in_mbs * height_in_mbs); + OUT_BCS_BATCH(batch, + ((height_in_mbs - 1) << 16) | + ((width_in_mbs - 1) << 0)); + OUT_BCS_BATCH(batch, + ((pic_param->second_chroma_qp_index_offset & 0x1f) << 24) | + ((pic_param->chroma_qp_index_offset & 0x1f) << 16) | + (0 << 14) | /* Max-bit conformance Intra flag ??? FIXME */ + (0 << 13) | /* Max Macroblock size conformance Inter flag ??? FIXME */ + (pic_param->pic_fields.bits.weighted_pred_flag << 12) | /* differ from GEN6 */ + (pic_param->pic_fields.bits.weighted_bipred_idc << 10) | + (img_struct << 8)); + OUT_BCS_BATCH(batch, + (pic_param->seq_fields.bits.chroma_format_idc << 10) | + (pic_param->pic_fields.bits.entropy_coding_mode_flag << 7) | + ((!pic_param->pic_fields.bits.reference_pic_flag) << 6) | + (pic_param->pic_fields.bits.constrained_intra_pred_flag << 5) | + (pic_param->seq_fields.bits.direct_8x8_inference_flag << 4) | + (pic_param->pic_fields.bits.transform_8x8_mode_flag << 3) | + (pic_param->seq_fields.bits.frame_mbs_only_flag << 2) | + (mbaff_frame_flag << 1) | + (pic_param->pic_fields.bits.field_pic_flag << 0)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_mfd_avc_qm_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + VAIQMatrixBufferH264 *iq_matrix; + VAPictureParameterBufferH264 *pic_param; + + if (!decode_state->iq_matrix || !decode_state->iq_matrix->buffer) + return; + + iq_matrix = (VAIQMatrixBufferH264 *)decode_state->iq_matrix->buffer; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; + + gen7_mfd_qm_state(ctx, MFX_QM_AVC_4X4_INTRA_MATRIX, &iq_matrix->ScalingList4x4[0][0], 3 * 16, gen7_mfd_context); + gen7_mfd_qm_state(ctx, MFX_QM_AVC_4X4_INTER_MATRIX, &iq_matrix->ScalingList4x4[3][0], 3 * 16, gen7_mfd_context); + + if (pic_param->pic_fields.bits.transform_8x8_mode_flag) { + gen7_mfd_qm_state(ctx, MFX_QM_AVC_8x8_INTRA_MATRIX, &iq_matrix->ScalingList8x8[0][0], 64, gen7_mfd_context); + gen7_mfd_qm_state(ctx, MFX_QM_AVC_8x8_INTER_MATRIX, &iq_matrix->ScalingList8x8[1][0], 64, gen7_mfd_context); + } +} + +static void +gen7_mfd_avc_directmode_state(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *slice_param, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + struct object_surface *obj_surface; + struct gen7_avc_surface *gen7_avc_surface; + VAPictureH264 *va_pic; + int i, j; + + BEGIN_BCS_BATCH(batch, 69); + OUT_BCS_BATCH(batch, MFX_AVC_DIRECTMODE_STATE | (69 - 2)); + + /* reference surfaces 0..15 */ + for (i = 0; i < ARRAY_ELEMS(gen7_mfd_context->reference_surface); i++) { + if (gen7_mfd_context->reference_surface[i].surface_id != VA_INVALID_ID) { + obj_surface = SURFACE(gen7_mfd_context->reference_surface[i].surface_id); + assert(obj_surface); + gen7_avc_surface = obj_surface->private_data; + + if (gen7_avc_surface == NULL) { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } else { + OUT_BCS_RELOC(batch, gen7_avc_surface->dmv_top, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + + if (gen7_avc_surface->dmv_bottom_flag == 1) + OUT_BCS_RELOC(batch, gen7_avc_surface->dmv_bottom, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + else + OUT_BCS_RELOC(batch, gen7_avc_surface->dmv_top, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + } + } else { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + } + + /* the current decoding frame/field */ + va_pic = &pic_param->CurrPic; + assert(!(va_pic->flags & VA_PICTURE_H264_INVALID)); + obj_surface = SURFACE(va_pic->picture_id); + assert(obj_surface && obj_surface->bo && obj_surface->private_data); + gen7_avc_surface = obj_surface->private_data; + + OUT_BCS_RELOC(batch, gen7_avc_surface->dmv_top, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + + if (gen7_avc_surface->dmv_bottom_flag == 1) + OUT_BCS_RELOC(batch, gen7_avc_surface->dmv_bottom, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_RELOC(batch, gen7_avc_surface->dmv_top, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + + /* POC List */ + for (i = 0; i < ARRAY_ELEMS(gen7_mfd_context->reference_surface); i++) { + if (gen7_mfd_context->reference_surface[i].surface_id != VA_INVALID_ID) { + int found = 0; + for (j = 0; j < ARRAY_ELEMS(pic_param->ReferenceFrames); j++) { + va_pic = &pic_param->ReferenceFrames[j]; + + if (va_pic->flags & VA_PICTURE_H264_INVALID) + continue; + + if (va_pic->picture_id == gen7_mfd_context->reference_surface[i].surface_id) { + found = 1; + break; + } + } + + assert(found == 1); + assert(!(va_pic->flags & VA_PICTURE_H264_INVALID)); + + OUT_BCS_BATCH(batch, va_pic->TopFieldOrderCnt); + OUT_BCS_BATCH(batch, va_pic->BottomFieldOrderCnt); + } else { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + } + + va_pic = &pic_param->CurrPic; + OUT_BCS_BATCH(batch, va_pic->TopFieldOrderCnt); + OUT_BCS_BATCH(batch, va_pic->BottomFieldOrderCnt); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_mfd_avc_slice_state(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *slice_param, + VASliceParameterBufferH264 *next_slice_param, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int width_in_mbs = pic_param->picture_width_in_mbs_minus1 + 1; + int height_in_mbs = pic_param->picture_height_in_mbs_minus1 + 1; + int slice_hor_pos, slice_ver_pos, next_slice_hor_pos, next_slice_ver_pos; + int num_ref_idx_l0, num_ref_idx_l1; + int mbaff_picture = (!pic_param->pic_fields.bits.field_pic_flag && + pic_param->seq_fields.bits.mb_adaptive_frame_field_flag); + int first_mb_in_slice = 0, first_mb_in_next_slice = 0; + int slice_type; + + if (slice_param->slice_type == SLICE_TYPE_I || + slice_param->slice_type == SLICE_TYPE_SI) { + slice_type = SLICE_TYPE_I; + } else if (slice_param->slice_type == SLICE_TYPE_P || + slice_param->slice_type == SLICE_TYPE_SP) { + slice_type = SLICE_TYPE_P; + } else { + assert(slice_param->slice_type == SLICE_TYPE_B); + slice_type = SLICE_TYPE_B; + } + + if (slice_type == SLICE_TYPE_I) { + assert(slice_param->num_ref_idx_l0_active_minus1 == 0); + assert(slice_param->num_ref_idx_l1_active_minus1 == 0); + num_ref_idx_l0 = 0; + num_ref_idx_l1 = 0; + } else if (slice_type == SLICE_TYPE_P) { + assert(slice_param->num_ref_idx_l1_active_minus1 == 0); + num_ref_idx_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1; + num_ref_idx_l1 = 0; + } else { + num_ref_idx_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1; + num_ref_idx_l1 = slice_param->num_ref_idx_l1_active_minus1 + 1; + } + + first_mb_in_slice = slice_param->first_mb_in_slice << mbaff_picture; + slice_hor_pos = first_mb_in_slice % width_in_mbs; + slice_ver_pos = first_mb_in_slice / width_in_mbs; + + if (next_slice_param) { + first_mb_in_next_slice = next_slice_param->first_mb_in_slice << mbaff_picture; + next_slice_hor_pos = first_mb_in_next_slice % width_in_mbs; + next_slice_ver_pos = first_mb_in_next_slice / width_in_mbs; + } else { + next_slice_hor_pos = 0; + next_slice_ver_pos = height_in_mbs / (1 + !!pic_param->pic_fields.bits.field_pic_flag); + } + + BEGIN_BCS_BATCH(batch, 11); /* FIXME: is it 10??? */ + OUT_BCS_BATCH(batch, MFX_AVC_SLICE_STATE | (11 - 2)); + OUT_BCS_BATCH(batch, slice_type); + OUT_BCS_BATCH(batch, + (num_ref_idx_l1 << 24) | + (num_ref_idx_l0 << 16) | + (slice_param->chroma_log2_weight_denom << 8) | + (slice_param->luma_log2_weight_denom << 0)); + OUT_BCS_BATCH(batch, + (slice_param->direct_spatial_mv_pred_flag << 29) | + (slice_param->disable_deblocking_filter_idc << 27) | + (slice_param->cabac_init_idc << 24) | + ((pic_param->pic_init_qp_minus26 + 26 + slice_param->slice_qp_delta) << 16) | + ((slice_param->slice_beta_offset_div2 & 0xf) << 8) | + ((slice_param->slice_alpha_c0_offset_div2 & 0xf) << 0)); + OUT_BCS_BATCH(batch, + (slice_ver_pos << 24) | + (slice_hor_pos << 16) | + (first_mb_in_slice << 0)); + OUT_BCS_BATCH(batch, + (next_slice_ver_pos << 16) | + (next_slice_hor_pos << 0)); + OUT_BCS_BATCH(batch, + (next_slice_param == NULL) << 19); /* last slice flag */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_mfd_avc_ref_idx_state(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *slice_param, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int i, j, num_ref_list; + struct { + unsigned char bottom_idc:1; + unsigned char frame_store_index:4; + unsigned char field_picture:1; + unsigned char long_term:1; + unsigned char non_exist:1; + } refs[32]; + + if (slice_param->slice_type == SLICE_TYPE_I || + slice_param->slice_type == SLICE_TYPE_SI) + return; + + if (slice_param->slice_type == SLICE_TYPE_P || + slice_param->slice_type == SLICE_TYPE_SP) { + num_ref_list = 1; + } else { + num_ref_list = 2; + } + + for (i = 0; i < num_ref_list; i++) { + VAPictureH264 *va_pic; + + if (i == 0) { + va_pic = slice_param->RefPicList0; + } else { + va_pic = slice_param->RefPicList1; + } + + BEGIN_BCS_BATCH(batch, 10); + OUT_BCS_BATCH(batch, MFX_AVC_REF_IDX_STATE | (10 - 2)); + OUT_BCS_BATCH(batch, i); + + for (j = 0; j < 32; j++) { + if (va_pic->flags & VA_PICTURE_H264_INVALID) { + refs[j].non_exist = 1; + refs[j].long_term = 1; + refs[j].field_picture = 1; + refs[j].frame_store_index = 0xf; + refs[j].bottom_idc = 1; + } else { + int frame_idx; + + for (frame_idx = 0; frame_idx < ARRAY_ELEMS(gen7_mfd_context->reference_surface); frame_idx++) { + if (gen7_mfd_context->reference_surface[frame_idx].surface_id != VA_INVALID_ID && + va_pic->picture_id == gen7_mfd_context->reference_surface[frame_idx].surface_id) { + assert(frame_idx == gen7_mfd_context->reference_surface[frame_idx].frame_store_id); + break; + } + } + + assert(frame_idx < ARRAY_ELEMS(gen7_mfd_context->reference_surface)); + + refs[j].non_exist = 0; + refs[j].long_term = !!(va_pic->flags & VA_PICTURE_H264_LONG_TERM_REFERENCE); + refs[j].field_picture = !!(va_pic->flags & + (VA_PICTURE_H264_TOP_FIELD | + VA_PICTURE_H264_BOTTOM_FIELD)); + refs[j].frame_store_index = frame_idx; + refs[j].bottom_idc = !!(va_pic->flags & VA_PICTURE_H264_BOTTOM_FIELD); + } + + va_pic++; + } + + intel_batchbuffer_data(batch, refs, sizeof(refs)); + ADVANCE_BCS_BATCH(batch); + } +} + +static void +gen7_mfd_avc_weightoffset_state(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *slice_param, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int i, j, num_weight_offset_table = 0; + short weightoffsets[32 * 6]; + + if ((slice_param->slice_type == SLICE_TYPE_P || + slice_param->slice_type == SLICE_TYPE_SP) && + (pic_param->pic_fields.bits.weighted_pred_flag == 1)) { + num_weight_offset_table = 1; + } + + if ((slice_param->slice_type == SLICE_TYPE_B) && + (pic_param->pic_fields.bits.weighted_bipred_idc == 1)) { + num_weight_offset_table = 2; + } + + for (i = 0; i < num_weight_offset_table; i++) { + BEGIN_BCS_BATCH(batch, 98); + OUT_BCS_BATCH(batch, MFX_AVC_WEIGHTOFFSET_STATE | (98 - 2)); + OUT_BCS_BATCH(batch, i); + + if (i == 0) { + for (j = 0; j < 32; j++) { + weightoffsets[j * 6 + 0] = slice_param->luma_weight_l0[j]; + weightoffsets[j * 6 + 1] = slice_param->luma_offset_l0[j]; + weightoffsets[j * 6 + 2] = slice_param->chroma_weight_l0[j][0]; + weightoffsets[j * 6 + 3] = slice_param->chroma_offset_l0[j][0]; + weightoffsets[j * 6 + 4] = slice_param->chroma_weight_l0[j][1]; + weightoffsets[j * 6 + 5] = slice_param->chroma_offset_l0[j][1]; + } + } else { + for (j = 0; j < 32; j++) { + weightoffsets[j * 6 + 0] = slice_param->luma_weight_l1[j]; + weightoffsets[j * 6 + 1] = slice_param->luma_offset_l1[j]; + weightoffsets[j * 6 + 2] = slice_param->chroma_weight_l1[j][0]; + weightoffsets[j * 6 + 3] = slice_param->chroma_offset_l1[j][0]; + weightoffsets[j * 6 + 4] = slice_param->chroma_weight_l1[j][1]; + weightoffsets[j * 6 + 5] = slice_param->chroma_offset_l1[j][1]; + } + } + + intel_batchbuffer_data(batch, weightoffsets, sizeof(weightoffsets)); + ADVANCE_BCS_BATCH(batch); + } +} + +static int +gen7_mfd_avc_get_slice_bit_offset(uint8_t *buf, int mode_flag, int in_slice_data_bit_offset) +{ + int out_slice_data_bit_offset; + int slice_header_size = in_slice_data_bit_offset / 8; + int i, j; + + for (i = 0, j = 0; i < slice_header_size; i++, j++) { + if (!buf[j] && !buf[j + 1] && buf[j + 2] == 3) { + i++, j += 2; + } + } + + out_slice_data_bit_offset = 8 * j + in_slice_data_bit_offset % 8; + + if (mode_flag == ENTROPY_CABAC) + out_slice_data_bit_offset = ALIGN(out_slice_data_bit_offset, 0x8); + + return out_slice_data_bit_offset; +} + +static void +gen7_mfd_avc_bsd_object(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *slice_param, + dri_bo *slice_data_bo, + VASliceParameterBufferH264 *next_slice_param, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int slice_data_bit_offset; + uint8_t *slice_data = NULL; + + dri_bo_map(slice_data_bo, 0); + slice_data = (uint8_t *)(slice_data_bo->virtual + slice_param->slice_data_offset); + slice_data_bit_offset = gen7_mfd_avc_get_slice_bit_offset(slice_data, + pic_param->pic_fields.bits.entropy_coding_mode_flag, + slice_param->slice_data_bit_offset); + dri_bo_unmap(slice_data_bo); + + /* the input bitsteam format on GEN7 differs from GEN6 */ + BEGIN_BCS_BATCH(batch, 6); + OUT_BCS_BATCH(batch, MFD_AVC_BSD_OBJECT | (6 - 2)); + OUT_BCS_BATCH(batch, + (slice_param->slice_data_size)); + OUT_BCS_BATCH(batch, slice_param->slice_data_offset); + OUT_BCS_BATCH(batch, + (0 << 31) | + (0 << 14) | + (0 << 12) | + (0 << 10) | + (0 << 8)); + OUT_BCS_BATCH(batch, + ((slice_data_bit_offset >> 3) << 16) | + (0 << 5) | + (0 << 4) | + ((next_slice_param == NULL) << 3) | /* LastSlice Flag */ + (slice_data_bit_offset & 0x7)); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_mfd_avc_decode_init(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + VAPictureParameterBufferH264 *pic_param; + VASliceParameterBufferH264 *slice_param; + VAPictureH264 *va_pic; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface; + dri_bo *bo; + int i, j, enable_avc_ildb = 0; + + for (j = 0; j < decode_state->num_slice_params && enable_avc_ildb == 0; j++) { + assert(decode_state->slice_params && decode_state->slice_params[j]->buffer); + slice_param = (VASliceParameterBufferH264 *)decode_state->slice_params[j]->buffer; + + for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { + assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL); + assert((slice_param->slice_type == SLICE_TYPE_I) || + (slice_param->slice_type == SLICE_TYPE_SI) || + (slice_param->slice_type == SLICE_TYPE_P) || + (slice_param->slice_type == SLICE_TYPE_SP) || + (slice_param->slice_type == SLICE_TYPE_B)); + + if (slice_param->disable_deblocking_filter_idc != 1) { + enable_avc_ildb = 1; + break; + } + + slice_param++; + } + } + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; + gen7_mfd_avc_frame_store_index(ctx, pic_param, gen7_mfd_context); + + /* Current decoded picture */ + va_pic = &pic_param->CurrPic; + assert(!(va_pic->flags & VA_PICTURE_H264_INVALID)); + obj_surface = SURFACE(va_pic->picture_id); + assert(obj_surface); + obj_surface->flags &= ~SURFACE_REF_DIS_MASK; + obj_surface->flags |= (pic_param->pic_fields.bits.reference_pic_flag ? SURFACE_REFERENCED : 0); + gen7_mfd_init_avc_surface(ctx, pic_param, obj_surface); + i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N','V','1','2')); + + dri_bo_unreference(gen7_mfd_context->post_deblocking_output.bo); + gen7_mfd_context->post_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(gen7_mfd_context->post_deblocking_output.bo); + gen7_mfd_context->post_deblocking_output.valid = enable_avc_ildb; + + dri_bo_unreference(gen7_mfd_context->pre_deblocking_output.bo); + gen7_mfd_context->pre_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(gen7_mfd_context->pre_deblocking_output.bo); + gen7_mfd_context->pre_deblocking_output.valid = !enable_avc_ildb; + + dri_bo_unreference(gen7_mfd_context->intra_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "intra row store", + 128 * 64, + 0x1000); + assert(bo); + gen7_mfd_context->intra_row_store_scratch_buffer.bo = bo; + gen7_mfd_context->intra_row_store_scratch_buffer.valid = 1; + + dri_bo_unreference(gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "deblocking filter row store", + 30720, /* 4 * 120 * 64 */ + 0x1000); + assert(bo); + gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo = bo; + gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.valid = 1; + + dri_bo_unreference(gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "bsd mpc row store", + 11520, /* 1.5 * 120 * 64 */ + 0x1000); + assert(bo); + gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo = bo; + gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.valid = 1; + + dri_bo_unreference(gen7_mfd_context->mpr_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "mpr row store", + 7680, /* 1. 0 * 120 * 64 */ + 0x1000); + assert(bo); + gen7_mfd_context->mpr_row_store_scratch_buffer.bo = bo; + gen7_mfd_context->mpr_row_store_scratch_buffer.valid = 1; + + gen7_mfd_context->bitplane_read_buffer.valid = 0; +} + +static void +gen7_mfd_avc_decode_picture(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + VAPictureParameterBufferH264 *pic_param; + VASliceParameterBufferH264 *slice_param, *next_slice_param, *next_slice_group_param; + dri_bo *slice_data_bo; + int i, j; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; + gen7_mfd_avc_decode_init(ctx, decode_state, gen7_mfd_context); + + intel_batchbuffer_start_atomic_bcs(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); + gen7_mfd_pipe_mode_select(ctx, decode_state, MFX_FORMAT_AVC, gen7_mfd_context); + gen7_mfd_surface_state(ctx, decode_state, MFX_FORMAT_AVC, gen7_mfd_context); + gen7_mfd_pipe_buf_addr_state(ctx, decode_state, MFX_FORMAT_AVC, gen7_mfd_context); + gen7_mfd_bsp_buf_base_addr_state(ctx, decode_state, MFX_FORMAT_AVC, gen7_mfd_context); + gen7_mfd_avc_qm_state(ctx, decode_state, gen7_mfd_context); + gen7_mfd_avc_img_state(ctx, decode_state, gen7_mfd_context); + + for (j = 0; j < decode_state->num_slice_params; j++) { + assert(decode_state->slice_params && decode_state->slice_params[j]->buffer); + slice_param = (VASliceParameterBufferH264 *)decode_state->slice_params[j]->buffer; + slice_data_bo = decode_state->slice_datas[j]->bo; + gen7_mfd_ind_obj_base_addr_state(ctx, slice_data_bo, MFX_FORMAT_AVC, gen7_mfd_context); + + if (j == decode_state->num_slice_params - 1) + next_slice_group_param = NULL; + else + next_slice_group_param = (VASliceParameterBufferH264 *)decode_state->slice_params[j + 1]->buffer; + + for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { + assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL); + assert((slice_param->slice_type == SLICE_TYPE_I) || + (slice_param->slice_type == SLICE_TYPE_SI) || + (slice_param->slice_type == SLICE_TYPE_P) || + (slice_param->slice_type == SLICE_TYPE_SP) || + (slice_param->slice_type == SLICE_TYPE_B)); + + if (i < decode_state->slice_params[j]->num_elements - 1) + next_slice_param = slice_param + 1; + else + next_slice_param = next_slice_group_param; + + gen7_mfd_avc_directmode_state(ctx, pic_param, slice_param, gen7_mfd_context); + gen7_mfd_avc_ref_idx_state(ctx, pic_param, slice_param, gen7_mfd_context); + gen7_mfd_avc_weightoffset_state(ctx, pic_param, slice_param, gen7_mfd_context); + gen7_mfd_avc_slice_state(ctx, pic_param, slice_param, next_slice_param, gen7_mfd_context); + gen7_mfd_avc_bsd_object(ctx, pic_param, slice_param, slice_data_bo, next_slice_param, gen7_mfd_context); + slice_param++; + } + } + + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); +} + +static void +gen7_mfd_mpeg2_decode_init(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + VAPictureParameterBufferMPEG2 *pic_param; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface; + int i; + dri_bo *bo; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferMPEG2 *)decode_state->pic_param->buffer; + + /* reference picture */ + obj_surface = SURFACE(pic_param->forward_reference_picture); + + if (obj_surface && obj_surface->bo) + gen7_mfd_context->reference_surface[0].surface_id = pic_param->forward_reference_picture; + else + gen7_mfd_context->reference_surface[0].surface_id = VA_INVALID_ID; + + obj_surface = SURFACE(pic_param->backward_reference_picture); + + if (obj_surface && obj_surface->bo) + gen7_mfd_context->reference_surface[1].surface_id = pic_param->backward_reference_picture; + else + gen7_mfd_context->reference_surface[1].surface_id = pic_param->forward_reference_picture; + + /* must do so !!! */ + for (i = 2; i < ARRAY_ELEMS(gen7_mfd_context->reference_surface); i++) + gen7_mfd_context->reference_surface[i].surface_id = gen7_mfd_context->reference_surface[i % 2].surface_id; + + /* Current decoded picture */ + obj_surface = SURFACE(decode_state->current_render_target); + assert(obj_surface); + i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N','V','1','2')); + + dri_bo_unreference(gen7_mfd_context->pre_deblocking_output.bo); + gen7_mfd_context->pre_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(gen7_mfd_context->pre_deblocking_output.bo); + gen7_mfd_context->pre_deblocking_output.valid = 1; + + dri_bo_unreference(gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "bsd mpc row store", + 11520, /* 1.5 * 120 * 64 */ + 0x1000); + assert(bo); + gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo = bo; + gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.valid = 1; + + gen7_mfd_context->post_deblocking_output.valid = 0; + gen7_mfd_context->intra_row_store_scratch_buffer.valid = 0; + gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.valid = 0; + gen7_mfd_context->mpr_row_store_scratch_buffer.valid = 0; + gen7_mfd_context->bitplane_read_buffer.valid = 0; +} + +static void +gen7_mfd_mpeg2_pic_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + VAPictureParameterBufferMPEG2 *pic_param; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferMPEG2 *)decode_state->pic_param->buffer; + + BEGIN_BCS_BATCH(batch, 13); + OUT_BCS_BATCH(batch, MFX_MPEG2_PIC_STATE | (13 - 2)); + OUT_BCS_BATCH(batch, + (pic_param->f_code & 0xf) << 28 | /* f_code[1][1] */ + ((pic_param->f_code >> 4) & 0xf) << 24 | /* f_code[1][0] */ + ((pic_param->f_code >> 8) & 0xf) << 20 | /* f_code[0][1] */ + ((pic_param->f_code >> 12) & 0xf) << 16 | /* f_code[0][0] */ + pic_param->picture_coding_extension.bits.intra_dc_precision << 14 | + pic_param->picture_coding_extension.bits.picture_structure << 12 | + pic_param->picture_coding_extension.bits.top_field_first << 11 | + pic_param->picture_coding_extension.bits.frame_pred_frame_dct << 10 | + pic_param->picture_coding_extension.bits.concealment_motion_vectors << 9 | + pic_param->picture_coding_extension.bits.q_scale_type << 8 | + pic_param->picture_coding_extension.bits.intra_vlc_format << 7 | + pic_param->picture_coding_extension.bits.alternate_scan << 6); + OUT_BCS_BATCH(batch, + pic_param->picture_coding_type << 9); + OUT_BCS_BATCH(batch, + ((ALIGN(pic_param->vertical_size, 16) / 16) - 1) << 16 | + ((ALIGN(pic_param->horizontal_size, 16) / 16) - 1)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_mfd_mpeg2_qm_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + VAIQMatrixBufferMPEG2 *iq_matrix; + int i; + + if (!decode_state->iq_matrix || !decode_state->iq_matrix->buffer) + return; + + iq_matrix = (VAIQMatrixBufferMPEG2 *)decode_state->iq_matrix->buffer; + + for (i = 0; i < 2; i++) { + int k, m; + unsigned char *qm = NULL; + unsigned char qmx[64]; + int qm_type; + + if (i == 0) { + if (iq_matrix->load_intra_quantiser_matrix) { + qm = iq_matrix->intra_quantiser_matrix; + qm_type = MFX_QM_MPEG_INTRA_QUANTIZER_MATRIX; + } + } else { + if (iq_matrix->load_non_intra_quantiser_matrix) { + qm = iq_matrix->non_intra_quantiser_matrix; + qm_type = MFX_QM_MPEG_NON_INTRA_QUANTIZER_MATRIX; + } + } + + if (!qm) + continue; + + /* Upload quantisation matrix in raster order. The mplayer vaapi + * patch passes quantisation matrix in zig-zag order to va library. + */ + for (k = 0; k < 64; k++) { + m = zigzag_direct[k]; + qmx[m] = qm[k]; + } + + gen7_mfd_qm_state(ctx, qm_type, qmx, 64, gen7_mfd_context); + } +} + +static void +gen7_mfd_mpeg2_bsd_object(VADriverContextP ctx, + VAPictureParameterBufferMPEG2 *pic_param, + VASliceParameterBufferMPEG2 *slice_param, + VASliceParameterBufferMPEG2 *next_slice_param, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + unsigned int width_in_mbs = ALIGN(pic_param->horizontal_size, 16) / 16; + int mb_count, vpos0, hpos0, vpos1, hpos1, is_field_pic = 0; + + if (pic_param->picture_coding_extension.bits.picture_structure == MPEG_TOP_FIELD || + pic_param->picture_coding_extension.bits.picture_structure == MPEG_BOTTOM_FIELD) + is_field_pic = 1; + + vpos0 = slice_param->slice_vertical_position / (1 + is_field_pic); + hpos0 = slice_param->slice_horizontal_position; + + if (next_slice_param == NULL) { + vpos1 = ALIGN(pic_param->vertical_size, 16) / 16 / (1 + is_field_pic); + hpos1 = 0; + } else { + vpos1 = next_slice_param->slice_vertical_position / (1 + is_field_pic); + hpos1 = next_slice_param->slice_horizontal_position; + } + + mb_count = (vpos1 * width_in_mbs + hpos1) - (vpos0 * width_in_mbs + hpos0); + + BEGIN_BCS_BATCH(batch, 5); + OUT_BCS_BATCH(batch, MFD_MPEG2_BSD_OBJECT | (5 - 2)); + OUT_BCS_BATCH(batch, + slice_param->slice_data_size - (slice_param->macroblock_offset >> 3)); + OUT_BCS_BATCH(batch, + slice_param->slice_data_offset + (slice_param->macroblock_offset >> 3)); + OUT_BCS_BATCH(batch, + hpos0 << 24 | + vpos0 << 16 | + mb_count << 8 | + (next_slice_param == NULL) << 5 | + (next_slice_param == NULL) << 3 | + (slice_param->macroblock_offset & 0x7)); + OUT_BCS_BATCH(batch, + slice_param->quantiser_scale_code << 24); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_mfd_mpeg2_decode_picture(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + VAPictureParameterBufferMPEG2 *pic_param; + VASliceParameterBufferMPEG2 *slice_param, *next_slice_param, *next_slice_group_param; + dri_bo *slice_data_bo; + int i, j; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferMPEG2 *)decode_state->pic_param->buffer; + + gen7_mfd_mpeg2_decode_init(ctx, decode_state, gen7_mfd_context); + intel_batchbuffer_start_atomic_bcs(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); + gen7_mfd_pipe_mode_select(ctx, decode_state, MFX_FORMAT_MPEG2, gen7_mfd_context); + gen7_mfd_surface_state(ctx, decode_state, MFX_FORMAT_MPEG2, gen7_mfd_context); + gen7_mfd_pipe_buf_addr_state(ctx, decode_state, MFX_FORMAT_MPEG2, gen7_mfd_context); + gen7_mfd_bsp_buf_base_addr_state(ctx, decode_state, MFX_FORMAT_MPEG2, gen7_mfd_context); + gen7_mfd_mpeg2_pic_state(ctx, decode_state, gen7_mfd_context); + gen7_mfd_mpeg2_qm_state(ctx, decode_state, gen7_mfd_context); + + for (j = 0; j < decode_state->num_slice_params; j++) { + assert(decode_state->slice_params && decode_state->slice_params[j]->buffer); + slice_param = (VASliceParameterBufferMPEG2 *)decode_state->slice_params[j]->buffer; + slice_data_bo = decode_state->slice_datas[j]->bo; + gen7_mfd_ind_obj_base_addr_state(ctx, slice_data_bo, MFX_FORMAT_MPEG2, gen7_mfd_context); + + if (j == decode_state->num_slice_params - 1) + next_slice_group_param = NULL; + else + next_slice_group_param = (VASliceParameterBufferMPEG2 *)decode_state->slice_params[j + 1]->buffer; + + for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { + assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL); + + if (i < decode_state->slice_params[j]->num_elements - 1) + next_slice_param = slice_param + 1; + else + next_slice_param = NULL; + + gen7_mfd_mpeg2_bsd_object(ctx, pic_param, slice_param, next_slice_param, gen7_mfd_context); + slice_param++; + } + } + + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); +} + +static const int va_to_gen7_vc1_pic_type[5] = { + GEN7_VC1_I_PICTURE, + GEN7_VC1_P_PICTURE, + GEN7_VC1_B_PICTURE, + GEN7_VC1_BI_PICTURE, + GEN7_VC1_P_PICTURE, +}; + +static const int va_to_gen7_vc1_mv[4] = { + 1, /* 1-MV */ + 2, /* 1-MV half-pel */ + 3, /* 1-MV half-pef bilinear */ + 0, /* Mixed MV */ +}; + +static const int b_picture_scale_factor[21] = { + 128, 85, 170, 64, 192, + 51, 102, 153, 204, 43, + 215, 37, 74, 111, 148, + 185, 222, 32, 96, 160, + 224, +}; + +static const int va_to_gen7_vc1_condover[3] = { + 0, + 2, + 3 +}; + +static const int va_to_gen7_vc1_profile[4] = { + GEN7_VC1_SIMPLE_PROFILE, + GEN7_VC1_MAIN_PROFILE, + GEN7_VC1_RESERVED_PROFILE, + GEN7_VC1_ADVANCED_PROFILE +}; + +static const int va_to_gen7_vc1_ttfrm[8] = { + 0, /* 8x8 */ + 1, /* 8x4 bottom */ + 1, /* 8x4 top */ + 1, /* 8x4 */ + 2, /* 4x8 bottom */ + 2, /* 4x8 top */ + 2, /* 4x8 */ + 3, /* 4x4 */ +}; + +static void +gen7_mfd_free_vc1_surface(void **data) +{ + struct gen7_vc1_surface *gen7_vc1_surface = *data; + + if (!gen7_vc1_surface) + return; + + dri_bo_unreference(gen7_vc1_surface->dmv); + free(gen7_vc1_surface); + *data = NULL; +} + +static void +gen7_mfd_init_vc1_surface(VADriverContextP ctx, + VAPictureParameterBufferVC1 *pic_param, + struct object_surface *obj_surface) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen7_vc1_surface *gen7_vc1_surface = obj_surface->private_data; + + obj_surface->free_private_data = gen7_mfd_free_vc1_surface; + + if (!gen7_vc1_surface) { + gen7_vc1_surface = calloc(sizeof(struct gen7_vc1_surface), 1); + assert((obj_surface->size & 0x3f) == 0); + obj_surface->private_data = gen7_vc1_surface; + } + + gen7_vc1_surface->picture_type = pic_param->picture_fields.bits.picture_type; + + if (gen7_vc1_surface->dmv == NULL) { + gen7_vc1_surface->dmv = dri_bo_alloc(i965->intel.bufmgr, + "direct mv w/r buffer", + 557056, /* 64 * 128 * 64 */ + 0x1000); + } +} + +static void +gen7_mfd_vc1_decode_init(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + VAPictureParameterBufferVC1 *pic_param; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface; + int i; + dri_bo *bo; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer; + + /* reference picture */ + obj_surface = SURFACE(pic_param->forward_reference_picture); + + if (obj_surface && obj_surface->bo) + gen7_mfd_context->reference_surface[0].surface_id = pic_param->forward_reference_picture; + else + gen7_mfd_context->reference_surface[0].surface_id = VA_INVALID_ID; + + obj_surface = SURFACE(pic_param->backward_reference_picture); + + if (obj_surface && obj_surface->bo) + gen7_mfd_context->reference_surface[1].surface_id = pic_param->backward_reference_picture; + else + gen7_mfd_context->reference_surface[1].surface_id = pic_param->forward_reference_picture; + + /* must do so !!! */ + for (i = 2; i < ARRAY_ELEMS(gen7_mfd_context->reference_surface); i++) + gen7_mfd_context->reference_surface[i].surface_id = gen7_mfd_context->reference_surface[i % 2].surface_id; + + /* Current decoded picture */ + obj_surface = SURFACE(decode_state->current_render_target); + assert(obj_surface); + gen7_mfd_init_vc1_surface(ctx, pic_param, obj_surface); + i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N','V','1','2')); + + dri_bo_unreference(gen7_mfd_context->post_deblocking_output.bo); + gen7_mfd_context->post_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(gen7_mfd_context->post_deblocking_output.bo); + gen7_mfd_context->post_deblocking_output.valid = pic_param->entrypoint_fields.bits.loopfilter; + + dri_bo_unreference(gen7_mfd_context->pre_deblocking_output.bo); + gen7_mfd_context->pre_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(gen7_mfd_context->pre_deblocking_output.bo); + gen7_mfd_context->pre_deblocking_output.valid = !pic_param->entrypoint_fields.bits.loopfilter; + + dri_bo_unreference(gen7_mfd_context->intra_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "intra row store", + 128 * 64, + 0x1000); + assert(bo); + gen7_mfd_context->intra_row_store_scratch_buffer.bo = bo; + gen7_mfd_context->intra_row_store_scratch_buffer.valid = 1; + + dri_bo_unreference(gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "deblocking filter row store", + 46080, /* 6 * 120 * 64 */ + 0x1000); + assert(bo); + gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo = bo; + gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.valid = 1; + + dri_bo_unreference(gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "bsd mpc row store", + 11520, /* 1.5 * 120 * 64 */ + 0x1000); + assert(bo); + gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo = bo; + gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.valid = 1; + + gen7_mfd_context->mpr_row_store_scratch_buffer.valid = 0; + + gen7_mfd_context->bitplane_read_buffer.valid = !!pic_param->bitplane_present.value; + dri_bo_unreference(gen7_mfd_context->bitplane_read_buffer.bo); + + if (gen7_mfd_context->bitplane_read_buffer.valid) { + int width_in_mbs = ALIGN(pic_param->coded_width, 16) / 16; + int height_in_mbs = ALIGN(pic_param->coded_height, 16) / 16; + int bitplane_width = ALIGN(width_in_mbs, 2) / 2; + int src_w, src_h; + uint8_t *src = NULL, *dst = NULL; + + assert(decode_state->bit_plane->buffer); + src = decode_state->bit_plane->buffer; + + bo = dri_bo_alloc(i965->intel.bufmgr, + "VC-1 Bitplane", + bitplane_width * bitplane_width, + 0x1000); + assert(bo); + gen7_mfd_context->bitplane_read_buffer.bo = bo; + + dri_bo_map(bo, True); + assert(bo->virtual); + dst = bo->virtual; + + for (src_h = 0; src_h < height_in_mbs; src_h++) { + for(src_w = 0; src_w < width_in_mbs; src_w++) { + int src_index, dst_index; + int src_shift; + uint8_t src_value; + + src_index = (src_h * width_in_mbs + src_w) / 2; + src_shift = !((src_h * width_in_mbs + src_w) & 1) * 4; + src_value = ((src[src_index] >> src_shift) & 0xf); + + dst_index = src_w / 2; + dst[dst_index] = ((dst[dst_index] >> 4) | (src_value << 4)); + } + + if (src_w & 1) + dst[src_w / 2] >>= 4; + + dst += bitplane_width; + } + + dri_bo_unmap(bo); + } else + gen7_mfd_context->bitplane_read_buffer.bo = NULL; +} + +static void +gen7_mfd_vc1_pic_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + VAPictureParameterBufferVC1 *pic_param; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface; + int alt_pquant_config = 0, alt_pquant_edge_mask = 0, alt_pq; + int dquant, dquantfrm, dqprofile, dqdbedge, dqsbedge, dqbilevel; + int unified_mv_mode; + int ref_field_pic_polarity = 0; + int scale_factor = 0; + int trans_ac_y = 0; + int dmv_surface_valid = 0; + int brfd = 0; + int fcm = 0; + int picture_type; + int profile; + int overlap; + int interpolation_mode = 0; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer; + + profile = va_to_gen7_vc1_profile[pic_param->sequence_fields.bits.profile]; + dquant = pic_param->pic_quantizer_fields.bits.dquant; + dquantfrm = pic_param->pic_quantizer_fields.bits.dq_frame; + dqprofile = pic_param->pic_quantizer_fields.bits.dq_profile; + dqdbedge = pic_param->pic_quantizer_fields.bits.dq_db_edge; + dqsbedge = pic_param->pic_quantizer_fields.bits.dq_sb_edge; + dqbilevel = pic_param->pic_quantizer_fields.bits.dq_binary_level; + alt_pq = pic_param->pic_quantizer_fields.bits.alt_pic_quantizer; + + if (dquant == 0) { + alt_pquant_config = 0; + alt_pquant_edge_mask = 0; + } else if (dquant == 2) { + alt_pquant_config = 1; + alt_pquant_edge_mask = 0xf; + } else { + assert(dquant == 1); + if (dquantfrm == 0) { + alt_pquant_config = 0; + alt_pquant_edge_mask = 0; + alt_pq = 0; + } else { + assert(dquantfrm == 1); + alt_pquant_config = 1; + + switch (dqprofile) { + case 3: + if (dqbilevel == 0) { + alt_pquant_config = 2; + alt_pquant_edge_mask = 0; + } else { + assert(dqbilevel == 1); + alt_pquant_config = 3; + alt_pquant_edge_mask = 0; + } + break; + + case 0: + alt_pquant_edge_mask = 0xf; + break; + + case 1: + if (dqdbedge == 3) + alt_pquant_edge_mask = 0x9; + else + alt_pquant_edge_mask = (0x3 << dqdbedge); + + break; + + case 2: + alt_pquant_edge_mask = (0x1 << dqsbedge); + break; + + default: + assert(0); + } + } + } + + if (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation) { + assert(pic_param->mv_fields.bits.mv_mode2 < 4); + unified_mv_mode = va_to_gen7_vc1_mv[pic_param->mv_fields.bits.mv_mode2]; + } else { + assert(pic_param->mv_fields.bits.mv_mode < 4); + unified_mv_mode = va_to_gen7_vc1_mv[pic_param->mv_fields.bits.mv_mode]; + } + + if (pic_param->sequence_fields.bits.interlace == 1 && + pic_param->picture_fields.bits.frame_coding_mode != 0) { /* frame-interlace or field-interlace */ + /* FIXME: calculate reference field picture polarity */ + assert(0); + ref_field_pic_polarity = 0; + } + + if (pic_param->b_picture_fraction < 21) + scale_factor = b_picture_scale_factor[pic_param->b_picture_fraction]; + + picture_type = va_to_gen7_vc1_pic_type[pic_param->picture_fields.bits.picture_type]; + + if (profile == GEN7_VC1_ADVANCED_PROFILE && + picture_type == GEN7_VC1_I_PICTURE) + picture_type = GEN7_VC1_BI_PICTURE; + + if (picture_type == GEN7_VC1_I_PICTURE || picture_type == GEN7_VC1_BI_PICTURE) /* I picture */ + trans_ac_y = pic_param->transform_fields.bits.transform_ac_codingset_idx2; + else + trans_ac_y = pic_param->transform_fields.bits.transform_ac_codingset_idx1; + + + if (picture_type == GEN7_VC1_B_PICTURE) { + struct gen7_vc1_surface *gen7_vc1_surface = NULL; + + obj_surface = SURFACE(pic_param->backward_reference_picture); + assert(obj_surface); + gen7_vc1_surface = obj_surface->private_data; + + if (!gen7_vc1_surface || + (va_to_gen7_vc1_pic_type[gen7_vc1_surface->picture_type] == GEN7_VC1_I_PICTURE || + va_to_gen7_vc1_pic_type[gen7_vc1_surface->picture_type] == GEN7_VC1_BI_PICTURE)) + dmv_surface_valid = 0; + else + dmv_surface_valid = 1; + } + + assert(pic_param->picture_fields.bits.frame_coding_mode < 3); + + if (pic_param->picture_fields.bits.frame_coding_mode < 2) + fcm = pic_param->picture_fields.bits.frame_coding_mode; + else { + if (pic_param->picture_fields.bits.top_field_first) + fcm = 2; + else + fcm = 3; + } + + if (pic_param->picture_fields.bits.picture_type == GEN7_VC1_B_PICTURE) { /* B picture */ + brfd = pic_param->reference_fields.bits.reference_distance; + brfd = (scale_factor * brfd) >> 8; + brfd = pic_param->reference_fields.bits.reference_distance - brfd - 1; + + if (brfd < 0) + brfd = 0; + } + + overlap = pic_param->sequence_fields.bits.overlap; + if (profile != GEN7_VC1_ADVANCED_PROFILE && pic_param->pic_quantizer_fields.bits.pic_quantizer_scale < 9) + overlap = 0; + + assert(pic_param->conditional_overlap_flag < 3); + assert(pic_param->mv_fields.bits.mv_table < 4); /* FIXME: interlace mode */ + + if (pic_param->mv_fields.bits.mv_mode == VAMvMode1MvHalfPelBilinear || + (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation && + pic_param->mv_fields.bits.mv_mode2 == VAMvMode1MvHalfPelBilinear)) + interpolation_mode = 8; /* Half-pel bilinear */ + else if (pic_param->mv_fields.bits.mv_mode == VAMvMode1MvHalfPel || + (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation && + pic_param->mv_fields.bits.mv_mode2 == VAMvMode1MvHalfPel)) + interpolation_mode = 0; /* Half-pel bicubic */ + else + interpolation_mode = 1; /* Quarter-pel bicubic */ + + BEGIN_BCS_BATCH(batch, 6); + OUT_BCS_BATCH(batch, MFD_VC1_LONG_PIC_STATE | (6 - 2)); + OUT_BCS_BATCH(batch, + (((ALIGN(pic_param->coded_height, 16) / 16) - 1) << 16) | + ((ALIGN(pic_param->coded_width, 16) / 16) - 1)); + OUT_BCS_BATCH(batch, + ((ALIGN(pic_param->coded_width, 16) / 16 + 1) / 2 - 1) << 24 | + dmv_surface_valid << 15 | + (pic_param->pic_quantizer_fields.bits.quantizer == 0) << 14 | /* implicit quantizer */ + pic_param->rounding_control << 13 | + pic_param->sequence_fields.bits.syncmarker << 12 | + interpolation_mode << 8 | + 0 << 7 | /* FIXME: scale up or down ??? */ + pic_param->range_reduction_frame << 6 | + pic_param->entrypoint_fields.bits.loopfilter << 5 | + overlap << 4 | + !pic_param->picture_fields.bits.is_first_field << 3 | + (pic_param->sequence_fields.bits.profile == 3) << 0); + OUT_BCS_BATCH(batch, + va_to_gen7_vc1_condover[pic_param->conditional_overlap_flag] << 29 | + picture_type << 26 | + fcm << 24 | + alt_pq << 16 | + pic_param->pic_quantizer_fields.bits.pic_quantizer_scale << 8 | + scale_factor << 0); + OUT_BCS_BATCH(batch, + unified_mv_mode << 28 | + pic_param->mv_fields.bits.four_mv_switch << 27 | + pic_param->fast_uvmc_flag << 26 | + ref_field_pic_polarity << 25 | + pic_param->reference_fields.bits.num_reference_pictures << 24 | + pic_param->reference_fields.bits.reference_distance << 20 | + pic_param->reference_fields.bits.reference_distance << 16 | /* FIXME: ??? */ + pic_param->mv_fields.bits.extended_dmv_range << 10 | + pic_param->mv_fields.bits.extended_mv_range << 8 | + alt_pquant_edge_mask << 4 | + alt_pquant_config << 2 | + pic_param->pic_quantizer_fields.bits.half_qp << 1 | + pic_param->pic_quantizer_fields.bits.pic_quantizer_type << 0); + OUT_BCS_BATCH(batch, + !!pic_param->bitplane_present.value << 31 | + !pic_param->bitplane_present.flags.bp_forward_mb << 30 | + !pic_param->bitplane_present.flags.bp_mv_type_mb << 29 | + !pic_param->bitplane_present.flags.bp_skip_mb << 28 | + !pic_param->bitplane_present.flags.bp_direct_mb << 27 | + !pic_param->bitplane_present.flags.bp_overflags << 26 | + !pic_param->bitplane_present.flags.bp_ac_pred << 25 | + !pic_param->bitplane_present.flags.bp_field_tx << 24 | + pic_param->mv_fields.bits.mv_table << 20 | + pic_param->mv_fields.bits.four_mv_block_pattern_table << 18 | + pic_param->mv_fields.bits.two_mv_block_pattern_table << 16 | + va_to_gen7_vc1_ttfrm[pic_param->transform_fields.bits.frame_level_transform_type] << 12 | + pic_param->transform_fields.bits.mb_level_transform_type_flag << 11 | + pic_param->mb_mode_table << 8 | + trans_ac_y << 6 | + pic_param->transform_fields.bits.transform_ac_codingset_idx1 << 4 | + pic_param->transform_fields.bits.intra_transform_dc_table << 3 | + pic_param->cbp_table << 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_mfd_vc1_pred_pipe_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + VAPictureParameterBufferVC1 *pic_param; + int intensitycomp_single; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer; + intensitycomp_single = (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation); + + BEGIN_BCS_BATCH(batch, 6); + OUT_BCS_BATCH(batch, MFX_VC1_PRED_PIPE_STATE | (6 - 2)); + OUT_BCS_BATCH(batch, + 0 << 14 | /* FIXME: double ??? */ + 0 << 12 | + intensitycomp_single << 10 | + intensitycomp_single << 8 | + 0 << 4 | /* FIXME: interlace mode */ + 0); + OUT_BCS_BATCH(batch, + pic_param->luma_shift << 16 | + pic_param->luma_scale << 0); /* FIXME: Luma Scaling */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + + +static void +gen7_mfd_vc1_directmode_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + VAPictureParameterBufferVC1 *pic_param; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface; + dri_bo *dmv_read_buffer = NULL, *dmv_write_buffer = NULL; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer; + + obj_surface = SURFACE(decode_state->current_render_target); + + if (obj_surface && obj_surface->private_data) { + dmv_write_buffer = ((struct gen7_vc1_surface *)(obj_surface->private_data))->dmv; + } + + obj_surface = SURFACE(pic_param->backward_reference_picture); + + if (obj_surface && obj_surface->private_data) { + dmv_read_buffer = ((struct gen7_vc1_surface *)(obj_surface->private_data))->dmv; + } + + BEGIN_BCS_BATCH(batch, 3); + OUT_BCS_BATCH(batch, MFX_VC1_DIRECTMODE_STATE | (3 - 2)); + + if (dmv_write_buffer) + OUT_BCS_RELOC(batch, dmv_write_buffer, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + if (dmv_read_buffer) + OUT_BCS_RELOC(batch, dmv_read_buffer, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + else + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static int +gen7_mfd_vc1_get_macroblock_bit_offset(uint8_t *buf, int in_slice_data_bit_offset, int profile) +{ + int out_slice_data_bit_offset; + int slice_header_size = in_slice_data_bit_offset / 8; + int i, j; + + if (profile != 3) + out_slice_data_bit_offset = in_slice_data_bit_offset; + else { + for (i = 0, j = 0; i < slice_header_size; i++, j++) { + if (!buf[j] && !buf[j + 1] && buf[j + 2] == 3 && buf[j + 3] < 4) { + i++, j += 2; + } + } + + out_slice_data_bit_offset = 8 * j + in_slice_data_bit_offset % 8; + } + + return out_slice_data_bit_offset; +} + +static void +gen7_mfd_vc1_bsd_object(VADriverContextP ctx, + VAPictureParameterBufferVC1 *pic_param, + VASliceParameterBufferVC1 *slice_param, + VASliceParameterBufferVC1 *next_slice_param, + dri_bo *slice_data_bo, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int next_slice_start_vert_pos; + int macroblock_offset; + uint8_t *slice_data = NULL; + + dri_bo_map(slice_data_bo, 0); + slice_data = (uint8_t *)(slice_data_bo->virtual + slice_param->slice_data_offset); + macroblock_offset = gen7_mfd_vc1_get_macroblock_bit_offset(slice_data, + slice_param->macroblock_offset, + pic_param->sequence_fields.bits.profile); + dri_bo_unmap(slice_data_bo); + + if (next_slice_param) + next_slice_start_vert_pos = next_slice_param->slice_vertical_position; + else + next_slice_start_vert_pos = ALIGN(pic_param->coded_height, 16) / 16; + + BEGIN_BCS_BATCH(batch, 5); + OUT_BCS_BATCH(batch, MFD_VC1_BSD_OBJECT | (5 - 2)); + OUT_BCS_BATCH(batch, + slice_param->slice_data_size - (macroblock_offset >> 3)); + OUT_BCS_BATCH(batch, + slice_param->slice_data_offset + (macroblock_offset >> 3)); + OUT_BCS_BATCH(batch, + slice_param->slice_vertical_position << 16 | + next_slice_start_vert_pos << 0); + OUT_BCS_BATCH(batch, + (macroblock_offset & 0x7)); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_mfd_vc1_decode_picture(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + VAPictureParameterBufferVC1 *pic_param; + VASliceParameterBufferVC1 *slice_param, *next_slice_param, *next_slice_group_param; + dri_bo *slice_data_bo; + int i, j; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer; + + gen7_mfd_vc1_decode_init(ctx, decode_state, gen7_mfd_context); + intel_batchbuffer_start_atomic_bcs(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); + gen7_mfd_pipe_mode_select(ctx, decode_state, MFX_FORMAT_VC1, gen7_mfd_context); + gen7_mfd_surface_state(ctx, decode_state, MFX_FORMAT_VC1, gen7_mfd_context); + gen7_mfd_pipe_buf_addr_state(ctx, decode_state, MFX_FORMAT_VC1, gen7_mfd_context); + gen7_mfd_bsp_buf_base_addr_state(ctx, decode_state, MFX_FORMAT_VC1, gen7_mfd_context); + gen7_mfd_vc1_pic_state(ctx, decode_state, gen7_mfd_context); + gen7_mfd_vc1_pred_pipe_state(ctx, decode_state, gen7_mfd_context); + gen7_mfd_vc1_directmode_state(ctx, decode_state, gen7_mfd_context); + + for (j = 0; j < decode_state->num_slice_params; j++) { + assert(decode_state->slice_params && decode_state->slice_params[j]->buffer); + slice_param = (VASliceParameterBufferVC1 *)decode_state->slice_params[j]->buffer; + slice_data_bo = decode_state->slice_datas[j]->bo; + gen7_mfd_ind_obj_base_addr_state(ctx, slice_data_bo, MFX_FORMAT_VC1, gen7_mfd_context); + + if (j == decode_state->num_slice_params - 1) + next_slice_group_param = NULL; + else + next_slice_group_param = (VASliceParameterBufferVC1 *)decode_state->slice_params[j + 1]->buffer; + + for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { + assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL); + + if (i < decode_state->slice_params[j]->num_elements - 1) + next_slice_param = slice_param + 1; + else + next_slice_param = next_slice_group_param; + + gen7_mfd_vc1_bsd_object(ctx, pic_param, slice_param, next_slice_param, slice_data_bo, gen7_mfd_context); + slice_param++; + } + } + + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); +} + +static void +gen7_mfd_decode_picture(VADriverContextP ctx, + VAProfile profile, + union codec_state *codec_state, + struct hw_context *hw_context) + +{ + struct gen7_mfd_context *gen7_mfd_context = (struct gen7_mfd_context *)hw_context; + struct decode_state *decode_state = &codec_state->dec; + + assert(gen7_mfd_context); + + switch (profile) { + case VAProfileMPEG2Simple: + case VAProfileMPEG2Main: + gen7_mfd_mpeg2_decode_picture(ctx, decode_state, gen7_mfd_context); + break; + + case VAProfileH264Baseline: + case VAProfileH264Main: + case VAProfileH264High: + gen7_mfd_avc_decode_picture(ctx, decode_state, gen7_mfd_context); + break; + + case VAProfileVC1Simple: + case VAProfileVC1Main: + case VAProfileVC1Advanced: + gen7_mfd_vc1_decode_picture(ctx, decode_state, gen7_mfd_context); + break; + + default: + assert(0); + break; + } +} + +static void +gen7_mfd_context_destroy(void *hw_context) +{ + struct gen7_mfd_context *gen7_mfd_context = (struct gen7_mfd_context *)hw_context; + + dri_bo_unreference(gen7_mfd_context->post_deblocking_output.bo); + gen7_mfd_context->post_deblocking_output.bo = NULL; + + dri_bo_unreference(gen7_mfd_context->pre_deblocking_output.bo); + gen7_mfd_context->pre_deblocking_output.bo = NULL; + + dri_bo_unreference(gen7_mfd_context->intra_row_store_scratch_buffer.bo); + gen7_mfd_context->intra_row_store_scratch_buffer.bo = NULL; + + dri_bo_unreference(gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo); + gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo = NULL; + + dri_bo_unreference(gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo); + gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo = NULL; + + dri_bo_unreference(gen7_mfd_context->mpr_row_store_scratch_buffer.bo); + gen7_mfd_context->mpr_row_store_scratch_buffer.bo = NULL; + + dri_bo_unreference(gen7_mfd_context->bitplane_read_buffer.bo); + gen7_mfd_context->bitplane_read_buffer.bo = NULL; + + intel_batchbuffer_free(gen7_mfd_context->base.batch); + free(gen7_mfd_context); +} + +struct hw_context * +gen7_dec_hw_context_init(VADriverContextP ctx, VAProfile profile) +{ + struct intel_driver_data *intel = intel_driver_data(ctx); + struct gen7_mfd_context *gen7_mfd_context = calloc(1, sizeof(struct gen7_mfd_context)); + int i; + + gen7_mfd_context->base.destroy = gen7_mfd_context_destroy; + gen7_mfd_context->base.run = gen7_mfd_decode_picture; + gen7_mfd_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER); + + for (i = 0; i < ARRAY_ELEMS(gen7_mfd_context->reference_surface); i++) { + gen7_mfd_context->reference_surface[i].surface_id = VA_INVALID_ID; + gen7_mfd_context->reference_surface[i].frame_store_id = -1; + } + + return (struct hw_context *)gen7_mfd_context; +} diff --git a/src/gen7_mfd.h b/src/gen7_mfd.h new file mode 100644 index 00000000..af9cc547 --- /dev/null +++ b/src/gen7_mfd.h @@ -0,0 +1,109 @@ +/* + * Copyright © 2011 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao <haihao.xiang@intel.com> + * + */ + +#ifndef _GEN7_MFD_H_ +#define _GEN7_MFD_H_ + +#include <xf86drm.h> +#include <drm.h> +#include <i915_drm.h> +#include <intel_bufmgr.h> + +struct gen7_avc_surface +{ + dri_bo *dmv_top; + dri_bo *dmv_bottom; + int dmv_bottom_flag; +}; + +#define GEN7_VC1_I_PICTURE 0 +#define GEN7_VC1_P_PICTURE 1 +#define GEN7_VC1_B_PICTURE 2 +#define GEN7_VC1_BI_PICTURE 3 +#define GEN7_VC1_SKIPPED_PICTURE 4 + +#define GEN7_VC1_SIMPLE_PROFILE 0 +#define GEN7_VC1_MAIN_PROFILE 1 +#define GEN7_VC1_ADVANCED_PROFILE 2 +#define GEN7_VC1_RESERVED_PROFILE 3 + +struct gen7_vc1_surface +{ + dri_bo *dmv; + int picture_type; +}; + +#define MAX_MFX_REFERENCE_SURFACES 16 +struct hw_context; + +struct gen7_mfd_context +{ + struct hw_context base; + + struct { + VASurfaceID surface_id; + int frame_store_id; + } reference_surface[MAX_MFX_REFERENCE_SURFACES]; + + struct { + dri_bo *bo; + int valid; + } post_deblocking_output; + + struct { + dri_bo *bo; + int valid; + } pre_deblocking_output; + + struct { + dri_bo *bo; + int valid; + } intra_row_store_scratch_buffer; + + struct { + dri_bo *bo; + int valid; + } deblocking_filter_row_store_scratch_buffer; + + struct { + dri_bo *bo; + int valid; + } bsd_mpc_row_store_scratch_buffer; + + struct { + dri_bo *bo; + int valid; + } mpr_row_store_scratch_buffer; + + struct { + dri_bo *bo; + int valid; + } bitplane_read_buffer; +}; + +#endif /* _GEN7_MFD_H_ */ diff --git a/src/i965_avc_bsd.c b/src/i965_avc_bsd.c new file mode 100644 index 00000000..2fa53fc1 --- /dev/null +++ b/src/i965_avc_bsd.c @@ -0,0 +1,1119 @@ +/* + * Copyright © 2010 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao <haihao.xiang@intel.com> + * + */ +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <assert.h> + +#include "va_backend.h" + +#include "intel_batchbuffer.h" +#include "intel_driver.h" + +#include "i965_defines.h" +#include "i965_drv_video.h" +#include "i965_avc_bsd.h" +#include "i965_media_h264.h" +#include "i965_media.h" + +static void +i965_avc_bsd_free_avc_bsd_surface(void **data) +{ + struct i965_avc_bsd_surface *avc_bsd_surface = *data; + + if (!avc_bsd_surface) + return; + + dri_bo_unreference(avc_bsd_surface->dmv_top); + avc_bsd_surface->dmv_top = NULL; + dri_bo_unreference(avc_bsd_surface->dmv_bottom); + avc_bsd_surface->dmv_bottom = NULL; + + free(avc_bsd_surface); + *data = NULL; +} + +static void +i965_avc_bsd_init_avc_bsd_surface(VADriverContextP ctx, + struct object_surface *obj_surface, + VAPictureParameterBufferH264 *pic_param, + struct i965_h264_context *i965_h264_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_avc_bsd_context *i965_avc_bsd_context = &i965_h264_context->i965_avc_bsd_context; + struct i965_avc_bsd_surface *avc_bsd_surface = obj_surface->private_data; + + obj_surface->free_private_data = i965_avc_bsd_free_avc_bsd_surface; + + if (!avc_bsd_surface) { + avc_bsd_surface = calloc(sizeof(struct i965_avc_bsd_surface), 1); + assert((obj_surface->size & 0x3f) == 0); + obj_surface->private_data = avc_bsd_surface; + } + + avc_bsd_surface->ctx = i965_avc_bsd_context; + avc_bsd_surface->dmv_bottom_flag = (pic_param->pic_fields.bits.field_pic_flag && + !pic_param->seq_fields.bits.direct_8x8_inference_flag); + + if (avc_bsd_surface->dmv_top == NULL) { + avc_bsd_surface->dmv_top = dri_bo_alloc(i965->intel.bufmgr, + "direct mv w/r buffer", + DMV_SIZE, + 0x1000); + } + + if (avc_bsd_surface->dmv_bottom_flag && + avc_bsd_surface->dmv_bottom == NULL) { + avc_bsd_surface->dmv_bottom = dri_bo_alloc(i965->intel.bufmgr, + "direct mv w/r buffer", + DMV_SIZE, + 0x1000); + } +} + +static void +i965_bsd_ind_obj_base_address(VADriverContextP ctx, + struct decode_state *decode_state, + int slice, + struct i965_h264_context *i965_h264_context) + +{ + struct intel_batchbuffer *batch = i965_h264_context->batch; + + dri_bo *ind_bo = decode_state->slice_datas[slice]->bo; + + BEGIN_BCS_BATCH(batch, 3); + OUT_BCS_BATCH(batch, CMD_BSD_IND_OBJ_BASE_ADDR | (3 - 2)); + OUT_BCS_RELOC(batch, ind_bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +i965_avc_bsd_img_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct i965_h264_context *i965_h264_context) +{ + struct intel_batchbuffer *batch = i965_h264_context->batch; + int qm_present_flag; + int img_struct; + int mbaff_frame_flag; + unsigned int avc_it_command_header; + unsigned int width_in_mbs, height_in_mbs; + VAPictureParameterBufferH264 *pic_param; + + if (decode_state->iq_matrix && decode_state->iq_matrix->buffer) + qm_present_flag = 1; + else + qm_present_flag = 0; /* built-in QM matrices */ + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; + + assert(!(pic_param->CurrPic.flags & VA_PICTURE_H264_INVALID)); + + if (pic_param->CurrPic.flags & VA_PICTURE_H264_TOP_FIELD) + img_struct = 1; + else if (pic_param->CurrPic.flags & VA_PICTURE_H264_BOTTOM_FIELD) + img_struct = 3; + else + img_struct = 0; + + if ((img_struct & 0x1) == 0x1) { + assert(pic_param->pic_fields.bits.field_pic_flag == 0x1); + } else { + assert(pic_param->pic_fields.bits.field_pic_flag == 0x0); + } + + if (pic_param->seq_fields.bits.frame_mbs_only_flag) { /* a frame containing only frame macroblocks */ + assert(pic_param->seq_fields.bits.mb_adaptive_frame_field_flag == 0); + assert(pic_param->pic_fields.bits.field_pic_flag == 0); + } else { + assert(pic_param->seq_fields.bits.direct_8x8_inference_flag == 1); /* see H.264 spec */ + } + + mbaff_frame_flag = (pic_param->seq_fields.bits.mb_adaptive_frame_field_flag && + !pic_param->pic_fields.bits.field_pic_flag); + + width_in_mbs = ((pic_param->picture_width_in_mbs_minus1 + 1) & 0xff); + height_in_mbs = ((pic_param->picture_height_in_mbs_minus1 + 1) & 0xff); /* frame height */ + + assert(!((width_in_mbs * height_in_mbs) & 0x8000)); /* hardware requirement */ + + /* BSD unit doesn't support 4:2:2 and 4:4:4 picture */ + assert(pic_param->seq_fields.bits.chroma_format_idc == 0 || /* monochrome picture */ + pic_param->seq_fields.bits.chroma_format_idc == 1); /* 4:2:0 */ + assert(pic_param->seq_fields.bits.residual_colour_transform_flag == 0); /* only available for 4:4:4 */ + + avc_it_command_header = (CMD_MEDIA_OBJECT_EX | (12 - 2)); + + BEGIN_BCS_BATCH(batch, 6); + OUT_BCS_BATCH(batch, CMD_AVC_BSD_IMG_STATE | (6 - 2)); + OUT_BCS_BATCH(batch, + ((width_in_mbs * height_in_mbs) & 0x7fff)); + OUT_BCS_BATCH(batch, + (height_in_mbs << 16) | + (width_in_mbs << 0)); + OUT_BCS_BATCH(batch, + ((pic_param->second_chroma_qp_index_offset & 0x1f) << 24) | + ((pic_param->chroma_qp_index_offset & 0x1f) << 16) | + (SCAN_RASTER_ORDER << 15) | /* AVC ILDB Data */ + (SCAN_SPECIAL_ORDER << 14) | /* AVC IT Command */ + (SCAN_RASTER_ORDER << 13) | /* AVC IT Data */ + (1 << 12) | /* always 1, hardware requirement */ + (qm_present_flag << 10) | + (img_struct << 8) | + (16 << 0)); /* FIXME: always support 16 reference frames ??? */ + OUT_BCS_BATCH(batch, + (RESIDUAL_DATA_OFFSET << 24) | /* residual data offset */ + (0 << 17) | /* don't overwrite SRT */ + (0 << 16) | /* Un-SRT (Unsynchronized Root Thread) */ + (0 << 12) | /* FIXME: no 16MV ??? */ + (pic_param->seq_fields.bits.chroma_format_idc << 10) | + (i965_h264_context->enable_avc_ildb << 8) | /* Enable ILDB writing output */ + (pic_param->pic_fields.bits.entropy_coding_mode_flag << 7) | + ((!pic_param->pic_fields.bits.reference_pic_flag) << 6) | + (pic_param->pic_fields.bits.constrained_intra_pred_flag << 5) | + (pic_param->seq_fields.bits.direct_8x8_inference_flag << 4) | + (pic_param->pic_fields.bits.transform_8x8_mode_flag << 3) | + (pic_param->seq_fields.bits.frame_mbs_only_flag << 2) | + (mbaff_frame_flag << 1) | + (pic_param->pic_fields.bits.field_pic_flag << 0)); + OUT_BCS_BATCH(batch, avc_it_command_header); + ADVANCE_BCS_BATCH(batch); +} + +static void +i965_avc_bsd_qm_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct i965_h264_context *i965_h264_context) +{ + struct intel_batchbuffer *batch = i965_h264_context->batch; + int cmd_len; + VAIQMatrixBufferH264 *iq_matrix; + VAPictureParameterBufferH264 *pic_param; + + if (!decode_state->iq_matrix || !decode_state->iq_matrix->buffer) + return; + + iq_matrix = (VAIQMatrixBufferH264 *)decode_state->iq_matrix->buffer; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; + + cmd_len = 2 + 6 * 4; /* always load six 4x4 scaling matrices */ + + if (pic_param->pic_fields.bits.transform_8x8_mode_flag) + cmd_len += 2 * 16; /* load two 8x8 scaling matrices */ + + BEGIN_BCS_BATCH(batch, cmd_len); + OUT_BCS_BATCH(batch, CMD_AVC_BSD_QM_STATE | (cmd_len - 2)); + + if (pic_param->pic_fields.bits.transform_8x8_mode_flag) + OUT_BCS_BATCH(batch, + (0x0 << 8) | /* don't use default built-in matrices */ + (0xff << 0)); /* six 4x4 and two 8x8 scaling matrices */ + else + OUT_BCS_BATCH(batch, + (0x0 << 8) | /* don't use default built-in matrices */ + (0x3f << 0)); /* six 4x4 scaling matrices */ + + intel_batchbuffer_data(batch, &iq_matrix->ScalingList4x4[0][0], 6 * 4 * 4); + + if (pic_param->pic_fields.bits.transform_8x8_mode_flag) + intel_batchbuffer_data(batch, &iq_matrix->ScalingList8x8[0][0], 2 * 16 * 4); + + ADVANCE_BCS_BATCH(batch); +} + +static void +i965_avc_bsd_slice_state(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *slice_param, + struct i965_h264_context *i965_h264_context) +{ + struct intel_batchbuffer *batch = i965_h264_context->batch; + int present_flag, cmd_len, list, j; + struct { + unsigned char bottom_idc:1; + unsigned char frame_store_index:4; + unsigned char field_picture:1; + unsigned char long_term:1; + unsigned char non_exist:1; + } refs[32]; + char weightoffsets[32 * 6]; + + /* don't issue SLICE_STATE for intra-prediction decoding */ + if (slice_param->slice_type == SLICE_TYPE_I || + slice_param->slice_type == SLICE_TYPE_SI) + return; + + cmd_len = 2; + + if (slice_param->slice_type == SLICE_TYPE_P || + slice_param->slice_type == SLICE_TYPE_SP) { + present_flag = PRESENT_REF_LIST0; + cmd_len += 8; + } else { + present_flag = PRESENT_REF_LIST0 | PRESENT_REF_LIST1; + cmd_len += 16; + } + + if ((slice_param->slice_type == SLICE_TYPE_P || + slice_param->slice_type == SLICE_TYPE_SP) && + (pic_param->pic_fields.bits.weighted_pred_flag == 1)) { + present_flag |= PRESENT_WEIGHT_OFFSET_L0; + cmd_len += 48; + } + + if ((slice_param->slice_type == SLICE_TYPE_B) && + (pic_param->pic_fields.bits.weighted_bipred_idc == 1)) { + present_flag |= PRESENT_WEIGHT_OFFSET_L0 | PRESENT_WEIGHT_OFFSET_L1; + cmd_len += 96; + } + + BEGIN_BCS_BATCH(batch, cmd_len); + OUT_BCS_BATCH(batch, CMD_AVC_BSD_SLICE_STATE | (cmd_len - 2)); + OUT_BCS_BATCH(batch, present_flag); + + for (list = 0; list < 2; list++) { + int flag; + VAPictureH264 *va_pic; + + if (list == 0) { + flag = PRESENT_REF_LIST0; + va_pic = slice_param->RefPicList0; + } else { + flag = PRESENT_REF_LIST1; + va_pic = slice_param->RefPicList1; + } + + if (!(present_flag & flag)) + continue; + + for (j = 0; j < 32; j++) { + if (va_pic->flags & VA_PICTURE_H264_INVALID) { + refs[j].non_exist = 1; + refs[j].long_term = 1; + refs[j].field_picture = 1; + refs[j].frame_store_index = 0xf; + refs[j].bottom_idc = 1; + } else { + int frame_idx; + + for (frame_idx = 0; frame_idx < ARRAY_ELEMS(i965_h264_context->fsid_list); frame_idx++) { + if (i965_h264_context->fsid_list[frame_idx].surface_id != VA_INVALID_ID && + va_pic->picture_id == i965_h264_context->fsid_list[frame_idx].surface_id) { + assert(frame_idx == i965_h264_context->fsid_list[frame_idx].frame_store_id); + break; + } + } + + assert(frame_idx < ARRAY_ELEMS(i965_h264_context->fsid_list)); + + refs[j].non_exist = 0; + refs[j].long_term = !!(va_pic->flags & VA_PICTURE_H264_LONG_TERM_REFERENCE); + refs[j].field_picture = !!(va_pic->flags & + (VA_PICTURE_H264_TOP_FIELD | + VA_PICTURE_H264_BOTTOM_FIELD)); + refs[j].frame_store_index = frame_idx; + refs[j].bottom_idc = !!(va_pic->flags & VA_PICTURE_H264_BOTTOM_FIELD); + } + + va_pic++; + } + + intel_batchbuffer_data(batch, refs, sizeof(refs)); + } + + i965_h264_context->weight128_luma_l0 = 0; + i965_h264_context->weight128_luma_l1 = 0; + i965_h264_context->weight128_chroma_l0 = 0; + i965_h264_context->weight128_chroma_l1 = 0; + + i965_h264_context->weight128_offset0_flag = 0; + i965_h264_context->weight128_offset0 = 0; + + if (present_flag & PRESENT_WEIGHT_OFFSET_L0) { + for (j = 0; j < 32; j++) { + weightoffsets[j * 6 + 0] = slice_param->luma_offset_l0[j]; + weightoffsets[j * 6 + 1] = slice_param->luma_weight_l0[j]; + weightoffsets[j * 6 + 2] = slice_param->chroma_offset_l0[j][0]; + weightoffsets[j * 6 + 3] = slice_param->chroma_weight_l0[j][0]; + weightoffsets[j * 6 + 4] = slice_param->chroma_offset_l0[j][1]; + weightoffsets[j * 6 + 5] = slice_param->chroma_weight_l0[j][1]; + + if (pic_param->pic_fields.bits.weighted_pred_flag == 1 || + pic_param->pic_fields.bits.weighted_bipred_idc == 1) { + if (i965_h264_context->use_hw_w128) { + if (slice_param->luma_weight_l0[j] == 128) + i965_h264_context->weight128_luma_l0 |= (1 << j); + + if (slice_param->chroma_weight_l0[j][0] == 128 || + slice_param->chroma_weight_l0[j][1] == 128) + i965_h264_context->weight128_chroma_l0 |= (1 << j); + } else { + /* FIXME: workaround for weight 128 */ + if (slice_param->luma_weight_l0[j] == 128 || + slice_param->chroma_weight_l0[j][0] == 128 || + slice_param->chroma_weight_l0[j][1] == 128) + i965_h264_context->weight128_offset0_flag = 1; + } + } + } + + intel_batchbuffer_data(batch, weightoffsets, sizeof(weightoffsets)); + } + + if (present_flag & PRESENT_WEIGHT_OFFSET_L1) { + for (j = 0; j < 32; j++) { + weightoffsets[j * 6 + 0] = slice_param->luma_offset_l1[j]; + weightoffsets[j * 6 + 1] = slice_param->luma_weight_l1[j]; + weightoffsets[j * 6 + 2] = slice_param->chroma_offset_l1[j][0]; + weightoffsets[j * 6 + 3] = slice_param->chroma_weight_l1[j][0]; + weightoffsets[j * 6 + 4] = slice_param->chroma_offset_l1[j][1]; + weightoffsets[j * 6 + 5] = slice_param->chroma_weight_l1[j][1]; + + if (pic_param->pic_fields.bits.weighted_bipred_idc == 1) { + if (i965_h264_context->use_hw_w128) { + if (slice_param->luma_weight_l1[j] == 128) + i965_h264_context->weight128_luma_l1 |= (1 << j); + + if (slice_param->chroma_weight_l1[j][0] == 128 || + slice_param->chroma_weight_l1[j][1] == 128) + i965_h264_context->weight128_chroma_l1 |= (1 << j); + } else { + if (slice_param->luma_weight_l0[j] == 128 || + slice_param->chroma_weight_l0[j][0] == 128 || + slice_param->chroma_weight_l0[j][1] == 128) + i965_h264_context->weight128_offset0_flag = 1; + } + } + } + + intel_batchbuffer_data(batch, weightoffsets, sizeof(weightoffsets)); + } + + ADVANCE_BCS_BATCH(batch); +} + +static void +i965_avc_bsd_buf_base_state(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *slice_param, + struct i965_h264_context *i965_h264_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965_h264_context->batch; + struct i965_avc_bsd_context *i965_avc_bsd_context; + int i, j; + VAPictureH264 *va_pic; + struct object_surface *obj_surface; + struct i965_avc_bsd_surface *avc_bsd_surface; + + i965_avc_bsd_context = &i965_h264_context->i965_avc_bsd_context; + + BEGIN_BCS_BATCH(batch, 74); + OUT_BCS_BATCH(batch, CMD_AVC_BSD_BUF_BASE_STATE | (74 - 2)); + OUT_BCS_RELOC(batch, i965_avc_bsd_context->bsd_raw_store.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_RELOC(batch, i965_avc_bsd_context->mpr_row_store.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_RELOC(batch, i965_h264_context->avc_it_command_mb_info.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + i965_h264_context->avc_it_command_mb_info.mbs * i965_h264_context->use_avc_hw_scoreboard * MB_CMD_IN_BYTES); + OUT_BCS_RELOC(batch, i965_h264_context->avc_it_data.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + (i965_h264_context->avc_it_data.write_offset << 6)); + + if (i965_h264_context->enable_avc_ildb) + OUT_BCS_RELOC(batch, i965_h264_context->avc_ildb_data.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + for (i = 0; i < ARRAY_ELEMS(i965_h264_context->fsid_list); i++) { + if (i965_h264_context->fsid_list[i].surface_id != VA_INVALID_ID) { + int found = 0; + for (j = 0; j < ARRAY_ELEMS(pic_param->ReferenceFrames); j++) { + va_pic = &pic_param->ReferenceFrames[j]; + + if (va_pic->flags & VA_PICTURE_H264_INVALID) + continue; + + if (va_pic->picture_id == i965_h264_context->fsid_list[i].surface_id) { + found = 1; + break; + } + } + + assert(found == 1); + + if (!(va_pic->flags & VA_PICTURE_H264_INVALID)) { + obj_surface = SURFACE(va_pic->picture_id); + assert(obj_surface); + avc_bsd_surface = obj_surface->private_data; + + if (avc_bsd_surface == NULL) { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } else { + OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_top, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + + if (avc_bsd_surface->dmv_bottom_flag == 1) + OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_bottom, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + else + OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_top, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + } + } + } else { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + } + + va_pic = &pic_param->CurrPic; + assert(!(va_pic->flags & VA_PICTURE_H264_INVALID)); + obj_surface = SURFACE(va_pic->picture_id); + assert(obj_surface); + obj_surface->flags &= ~SURFACE_REF_DIS_MASK; + obj_surface->flags |= (pic_param->pic_fields.bits.reference_pic_flag ? SURFACE_REFERENCED : 0); + i965_avc_bsd_init_avc_bsd_surface(ctx, obj_surface, pic_param, i965_h264_context); + avc_bsd_surface = obj_surface->private_data; + i965_check_alloc_surface_bo(ctx, obj_surface, 0, VA_FOURCC('N','V','1','2')); + + OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_top, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + + if (avc_bsd_surface->dmv_bottom_flag == 1) + OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_bottom, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_top, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + + /* POC List */ + for (i = 0; i < ARRAY_ELEMS(i965_h264_context->fsid_list); i++) { + if (i965_h264_context->fsid_list[i].surface_id != VA_INVALID_ID) { + int found = 0; + for (j = 0; j < ARRAY_ELEMS(pic_param->ReferenceFrames); j++) { + va_pic = &pic_param->ReferenceFrames[j]; + + if (va_pic->flags & VA_PICTURE_H264_INVALID) + continue; + + if (va_pic->picture_id == i965_h264_context->fsid_list[i].surface_id) { + found = 1; + break; + } + } + + assert(found == 1); + + if (!(va_pic->flags & VA_PICTURE_H264_INVALID)) { + OUT_BCS_BATCH(batch, va_pic->TopFieldOrderCnt); + OUT_BCS_BATCH(batch, va_pic->BottomFieldOrderCnt); + } + } else { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + } + + va_pic = &pic_param->CurrPic; + OUT_BCS_BATCH(batch, va_pic->TopFieldOrderCnt); + OUT_BCS_BATCH(batch, va_pic->BottomFieldOrderCnt); + + ADVANCE_BCS_BATCH(batch); +} + +/* + * Return the bit offset to the first bit of the slice data + * + * VASliceParameterBufferH264.slice_data_bit_offset will point into the part + * of slice header if there are some escaped bytes in the slice header. The offset + * to slice data is needed for BSD unit so that BSD unit can fetch right slice data + * for processing. This fixes conformance case BASQP1_Sony_C.jsv + */ +static int +i965_avc_bsd_get_slice_bit_offset(uint8_t *buf, int mode_flag, int in_slice_data_bit_offset) +{ + int out_slice_data_bit_offset; + int slice_header_size = in_slice_data_bit_offset / 8; + int i, j; + + for (i = 0, j = 0; i < slice_header_size; i++, j++) { + if (!buf[j] && !buf[j + 1] && buf[j + 2] == 3) { + i++, j += 2; + } + } + + out_slice_data_bit_offset = 8 * j + in_slice_data_bit_offset % 8; + + if (mode_flag == ENTROPY_CABAC) + out_slice_data_bit_offset = ALIGN(out_slice_data_bit_offset, 0x8); + + return out_slice_data_bit_offset; +} + +static void +g4x_avc_bsd_object(VADriverContextP ctx, + struct decode_state *decode_state, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *slice_param, + int slice_index, + struct i965_h264_context *i965_h264_context) +{ + struct intel_batchbuffer *batch = i965_h264_context->batch; + int width_in_mbs = pic_param->picture_width_in_mbs_minus1 + 1; + int height_in_mbs = pic_param->picture_height_in_mbs_minus1 + 1; /* frame height */ + + if (slice_param) { + int encrypted, counter_value, cmd_len; + int slice_hor_pos, slice_ver_pos; + int num_ref_idx_l0, num_ref_idx_l1; + int mbaff_picture = (!pic_param->pic_fields.bits.field_pic_flag && + pic_param->seq_fields.bits.mb_adaptive_frame_field_flag); + int slice_data_bit_offset; + int weighted_pred_idc = 0; + int first_mb_in_slice = 0; + int slice_type; + uint8_t *slice_data = NULL; + + encrypted = 0; /* FIXME: which flag in VAAPI is used for encryption? */ + + if (encrypted) { + cmd_len = 9; + counter_value = 0; /* FIXME: ??? */ + } else + cmd_len = 8; + + dri_bo_map(decode_state->slice_datas[slice_index]->bo, 0); + slice_data = (uint8_t *)(decode_state->slice_datas[slice_index]->bo->virtual + slice_param->slice_data_offset); + slice_data_bit_offset = i965_avc_bsd_get_slice_bit_offset(slice_data, + pic_param->pic_fields.bits.entropy_coding_mode_flag, + slice_param->slice_data_bit_offset); + dri_bo_unmap(decode_state->slice_datas[slice_index]->bo); + + if (slice_param->slice_type == SLICE_TYPE_I || + slice_param->slice_type == SLICE_TYPE_SI) + slice_type = SLICE_TYPE_I; + else if (slice_param->slice_type == SLICE_TYPE_P || + slice_param->slice_type == SLICE_TYPE_SP) + slice_type = SLICE_TYPE_P; + else { + assert(slice_param->slice_type == SLICE_TYPE_B); + slice_type = SLICE_TYPE_B; + } + + if (slice_type == SLICE_TYPE_I) { + assert(slice_param->num_ref_idx_l0_active_minus1 == 0); + assert(slice_param->num_ref_idx_l1_active_minus1 == 0); + num_ref_idx_l0 = 0; + num_ref_idx_l1 = 0; + } else if (slice_type == SLICE_TYPE_P) { + assert(slice_param->num_ref_idx_l1_active_minus1 == 0); + num_ref_idx_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1; + num_ref_idx_l1 = 0; + } else { + num_ref_idx_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1; + num_ref_idx_l1 = slice_param->num_ref_idx_l1_active_minus1 + 1; + } + + if (slice_type == SLICE_TYPE_P) + weighted_pred_idc = pic_param->pic_fields.bits.weighted_pred_flag; + else if (slice_type == SLICE_TYPE_B) + weighted_pred_idc = pic_param->pic_fields.bits.weighted_bipred_idc; + + first_mb_in_slice = slice_param->first_mb_in_slice << mbaff_picture; + slice_hor_pos = first_mb_in_slice % width_in_mbs; + slice_ver_pos = first_mb_in_slice / width_in_mbs; + + BEGIN_BCS_BATCH(batch, cmd_len); + OUT_BCS_BATCH(batch, CMD_AVC_BSD_OBJECT | (cmd_len - 2)); + OUT_BCS_BATCH(batch, + (encrypted << 31) | + ((slice_param->slice_data_size - (slice_data_bit_offset >> 3)) << 0)); + OUT_BCS_BATCH(batch, + (slice_param->slice_data_offset + + (slice_data_bit_offset >> 3))); + OUT_BCS_BATCH(batch, + (0 << 31) | /* concealment mode: 0->intra 16x16 prediction, 1->inter P Copy */ + (0 << 14) | /* ignore BSDPrematureComplete Error handling */ + (0 << 13) | /* FIXME: ??? */ + (0 << 12) | /* ignore MPR Error handling */ + (0 << 10) | /* ignore Entropy Error handling */ + (0 << 8) | /* ignore MB Header Error handling */ + (slice_type << 0)); + OUT_BCS_BATCH(batch, + (num_ref_idx_l1 << 24) | + (num_ref_idx_l0 << 16) | + (slice_param->chroma_log2_weight_denom << 8) | + (slice_param->luma_log2_weight_denom << 0)); + OUT_BCS_BATCH(batch, + (weighted_pred_idc << 30) | + (slice_param->direct_spatial_mv_pred_flag << 29) | + (slice_param->disable_deblocking_filter_idc << 27) | + (slice_param->cabac_init_idc << 24) | + ((pic_param->pic_init_qp_minus26 + 26 + slice_param->slice_qp_delta) << 16) | + ((slice_param->slice_beta_offset_div2 & 0xf) << 8) | + ((slice_param->slice_alpha_c0_offset_div2 & 0xf) << 0)); + OUT_BCS_BATCH(batch, + (slice_ver_pos << 24) | + (slice_hor_pos << 16) | + (first_mb_in_slice << 0)); + OUT_BCS_BATCH(batch, + (0 << 7) | /* FIXME: ??? */ + ((0x7 - (slice_data_bit_offset & 0x7)) << 0)); + + if (encrypted) { + OUT_BCS_BATCH(batch, counter_value); + } + + ADVANCE_BCS_BATCH(batch); + } else { + BEGIN_BCS_BATCH(batch, 8); + OUT_BCS_BATCH(batch, CMD_AVC_BSD_OBJECT | (8 - 2)); + OUT_BCS_BATCH(batch, 0); /* indirect data length for phantom slice is 0 */ + OUT_BCS_BATCH(batch, 0); /* indirect data start address for phantom slice is 0 */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, width_in_mbs * height_in_mbs / (1 + !!pic_param->pic_fields.bits.field_pic_flag)); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); + } +} + +static void +ironlake_avc_bsd_object(VADriverContextP ctx, + struct decode_state *decode_state, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *slice_param, + int slice_index, + struct i965_h264_context *i965_h264_context) +{ + struct intel_batchbuffer *batch = i965_h264_context->batch; + int width_in_mbs = pic_param->picture_width_in_mbs_minus1 + 1; + int height_in_mbs = pic_param->picture_height_in_mbs_minus1 + 1; /* frame height */ + + if (slice_param) { + int encrypted, counter_value; + int slice_hor_pos, slice_ver_pos; + int num_ref_idx_l0, num_ref_idx_l1; + int mbaff_picture = (!pic_param->pic_fields.bits.field_pic_flag && + pic_param->seq_fields.bits.mb_adaptive_frame_field_flag); + int slice_data_bit_offset; + int weighted_pred_idc = 0; + int first_mb_in_slice; + int slice_type; + uint8_t *slice_data = NULL; + + encrypted = 0; /* FIXME: which flag in VAAPI is used for encryption? */ + + if (encrypted) { + counter_value = 0; /* FIXME: ??? */ + } else + counter_value = 0; + + dri_bo_map(decode_state->slice_datas[slice_index]->bo, 0); + slice_data = (uint8_t *)(decode_state->slice_datas[slice_index]->bo->virtual + slice_param->slice_data_offset); + slice_data_bit_offset = i965_avc_bsd_get_slice_bit_offset(slice_data, + pic_param->pic_fields.bits.entropy_coding_mode_flag, + slice_param->slice_data_bit_offset); + dri_bo_unmap(decode_state->slice_datas[slice_index]->bo); + + if (slice_param->slice_type == SLICE_TYPE_I || + slice_param->slice_type == SLICE_TYPE_SI) + slice_type = SLICE_TYPE_I; + else if (slice_param->slice_type == SLICE_TYPE_P || + slice_param->slice_type == SLICE_TYPE_SP) + slice_type = SLICE_TYPE_P; + else { + assert(slice_param->slice_type == SLICE_TYPE_B); + slice_type = SLICE_TYPE_B; + } + + if (slice_type == SLICE_TYPE_I) { + assert(slice_param->num_ref_idx_l0_active_minus1 == 0); + assert(slice_param->num_ref_idx_l1_active_minus1 == 0); + num_ref_idx_l0 = 0; + num_ref_idx_l1 = 0; + } else if (slice_type == SLICE_TYPE_P) { + assert(slice_param->num_ref_idx_l1_active_minus1 == 0); + num_ref_idx_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1; + num_ref_idx_l1 = 0; + } else { + num_ref_idx_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1; + num_ref_idx_l1 = slice_param->num_ref_idx_l1_active_minus1 + 1; + } + + if (slice_type == SLICE_TYPE_P) + weighted_pred_idc = pic_param->pic_fields.bits.weighted_pred_flag; + else if (slice_type == SLICE_TYPE_B) + weighted_pred_idc = pic_param->pic_fields.bits.weighted_bipred_idc; + + first_mb_in_slice = slice_param->first_mb_in_slice << mbaff_picture; + slice_hor_pos = first_mb_in_slice % width_in_mbs; + slice_ver_pos = first_mb_in_slice / width_in_mbs; + + BEGIN_BCS_BATCH(batch, 16); + OUT_BCS_BATCH(batch, CMD_AVC_BSD_OBJECT | (16 - 2)); + OUT_BCS_BATCH(batch, + (encrypted << 31) | + (0 << 30) | /* FIXME: packet based bit stream */ + (0 << 29) | /* FIXME: packet format */ + ((slice_param->slice_data_size - (slice_data_bit_offset >> 3)) << 0)); + OUT_BCS_BATCH(batch, + (slice_param->slice_data_offset + + (slice_data_bit_offset >> 3))); + OUT_BCS_BATCH(batch, + (0 << 31) | /* concealment mode: 0->intra 16x16 prediction, 1->inter P Copy */ + (0 << 14) | /* ignore BSDPrematureComplete Error handling */ + (0 << 13) | /* FIXME: ??? */ + (0 << 12) | /* ignore MPR Error handling */ + (0 << 10) | /* ignore Entropy Error handling */ + (0 << 8) | /* ignore MB Header Error handling */ + (slice_type << 0)); + OUT_BCS_BATCH(batch, + (num_ref_idx_l1 << 24) | + (num_ref_idx_l0 << 16) | + (slice_param->chroma_log2_weight_denom << 8) | + (slice_param->luma_log2_weight_denom << 0)); + OUT_BCS_BATCH(batch, + (weighted_pred_idc << 30) | + (slice_param->direct_spatial_mv_pred_flag << 29) | + (slice_param->disable_deblocking_filter_idc << 27) | + (slice_param->cabac_init_idc << 24) | + ((pic_param->pic_init_qp_minus26 + 26 + slice_param->slice_qp_delta) << 16) | + ((slice_param->slice_beta_offset_div2 & 0xf) << 8) | + ((slice_param->slice_alpha_c0_offset_div2 & 0xf) << 0)); + OUT_BCS_BATCH(batch, + (slice_ver_pos << 24) | + (slice_hor_pos << 16) | + (first_mb_in_slice << 0)); + OUT_BCS_BATCH(batch, + (0 << 7) | /* FIXME: ??? */ + ((0x7 - (slice_data_bit_offset & 0x7)) << 0)); + OUT_BCS_BATCH(batch, counter_value); + + /* FIXME: dw9-dw11 */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, i965_h264_context->weight128_luma_l0); + OUT_BCS_BATCH(batch, i965_h264_context->weight128_luma_l1); + OUT_BCS_BATCH(batch, i965_h264_context->weight128_chroma_l0); + OUT_BCS_BATCH(batch, i965_h264_context->weight128_chroma_l1); + + ADVANCE_BCS_BATCH(batch); + } else { + BEGIN_BCS_BATCH(batch, 16); + OUT_BCS_BATCH(batch, CMD_AVC_BSD_OBJECT | (16 - 2)); + OUT_BCS_BATCH(batch, 0); /* indirect data length for phantom slice is 0 */ + OUT_BCS_BATCH(batch, 0); /* indirect data start address for phantom slice is 0 */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, width_in_mbs * height_in_mbs / (1 + !!pic_param->pic_fields.bits.field_pic_flag)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); + } +} + +static void +i965_avc_bsd_object(VADriverContextP ctx, + struct decode_state *decode_state, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *slice_param, + int slice_index, + struct i965_h264_context *i965_h264_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + + if (IS_IRONLAKE(i965->intel.device_id)) + ironlake_avc_bsd_object(ctx, decode_state, pic_param, slice_param, slice_index, i965_h264_context); + else + g4x_avc_bsd_object(ctx, decode_state, pic_param, slice_param, slice_index, i965_h264_context); +} + +static void +i965_avc_bsd_phantom_slice(VADriverContextP ctx, + struct decode_state *decode_state, + VAPictureParameterBufferH264 *pic_param, + struct i965_h264_context *i965_h264_context) +{ + i965_avc_bsd_object(ctx, decode_state, pic_param, NULL, 0, i965_h264_context); +} + +static void +i965_avc_bsd_frame_store_index(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + struct i965_h264_context *i965_h264_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + int i, j; + + assert(ARRAY_ELEMS(i965_h264_context->fsid_list) == ARRAY_ELEMS(pic_param->ReferenceFrames)); + + for (i = 0; i < ARRAY_ELEMS(i965_h264_context->fsid_list); i++) { + int found = 0; + + if (i965_h264_context->fsid_list[i].surface_id == VA_INVALID_ID) + continue; + + for (j = 0; j < ARRAY_ELEMS(pic_param->ReferenceFrames); j++) { + VAPictureH264 *ref_pic = &pic_param->ReferenceFrames[j]; + if (ref_pic->flags & VA_PICTURE_H264_INVALID) + continue; + + if (i965_h264_context->fsid_list[i].surface_id == ref_pic->picture_id) { + found = 1; + break; + } + } + + if (!found) { + struct object_surface *obj_surface = SURFACE(i965_h264_context->fsid_list[i].surface_id); + obj_surface->flags &= ~SURFACE_REFERENCED; + + if ((obj_surface->flags & SURFACE_ALL_MASK) == SURFACE_DISPLAYED) { + dri_bo_unreference(obj_surface->bo); + obj_surface->bo = NULL; + obj_surface->flags &= ~SURFACE_REF_DIS_MASK; + } + + if (obj_surface->free_private_data) + obj_surface->free_private_data(&obj_surface->private_data); + + i965_h264_context->fsid_list[i].surface_id = VA_INVALID_ID; + i965_h264_context->fsid_list[i].frame_store_id = -1; + } + } + + for (i = 0; i < ARRAY_ELEMS(pic_param->ReferenceFrames); i++) { + VAPictureH264 *ref_pic = &pic_param->ReferenceFrames[i]; + int found = 0; + + if (ref_pic->flags & VA_PICTURE_H264_INVALID) + continue; + + for (j = 0; j < ARRAY_ELEMS(i965_h264_context->fsid_list); j++) { + if (i965_h264_context->fsid_list[j].surface_id == VA_INVALID_ID) + continue; + + if (i965_h264_context->fsid_list[j].surface_id == ref_pic->picture_id) { + found = 1; + break; + } + } + + if (!found) { + int frame_idx; + struct object_surface *obj_surface = SURFACE(ref_pic->picture_id); + assert(obj_surface); + i965_check_alloc_surface_bo(ctx, obj_surface, 0, VA_FOURCC('N','V','1','2')); + + for (frame_idx = 0; frame_idx < ARRAY_ELEMS(i965_h264_context->fsid_list); frame_idx++) { + for (j = 0; j < ARRAY_ELEMS(i965_h264_context->fsid_list); j++) { + if (i965_h264_context->fsid_list[j].surface_id == VA_INVALID_ID) + continue; + + if (i965_h264_context->fsid_list[j].frame_store_id == frame_idx) + break; + } + + if (j == ARRAY_ELEMS(i965_h264_context->fsid_list)) + break; + } + + assert(frame_idx < ARRAY_ELEMS(i965_h264_context->fsid_list)); + + for (j = 0; j < ARRAY_ELEMS(i965_h264_context->fsid_list); j++) { + if (i965_h264_context->fsid_list[j].surface_id == VA_INVALID_ID) { + i965_h264_context->fsid_list[j].surface_id = ref_pic->picture_id; + i965_h264_context->fsid_list[j].frame_store_id = frame_idx; + break; + } + } + } + } + + for (i = 0; i < ARRAY_ELEMS(i965_h264_context->fsid_list) - 1; i++) { + if (i965_h264_context->fsid_list[i].surface_id != VA_INVALID_ID && + i965_h264_context->fsid_list[i].frame_store_id == i) + continue; + + for (j = i + 1; j < ARRAY_ELEMS(i965_h264_context->fsid_list); j++) { + if (i965_h264_context->fsid_list[j].surface_id != VA_INVALID_ID && + i965_h264_context->fsid_list[j].frame_store_id == i) { + VASurfaceID id = i965_h264_context->fsid_list[i].surface_id; + int frame_idx = i965_h264_context->fsid_list[i].frame_store_id; + + i965_h264_context->fsid_list[i].surface_id = i965_h264_context->fsid_list[j].surface_id; + i965_h264_context->fsid_list[i].frame_store_id = i965_h264_context->fsid_list[j].frame_store_id; + i965_h264_context->fsid_list[j].surface_id = id; + i965_h264_context->fsid_list[j].frame_store_id = frame_idx; + break; + } + } + } +} + +void +i965_avc_bsd_pipeline(VADriverContextP ctx, struct decode_state *decode_state, void *h264_context) +{ + struct i965_h264_context *i965_h264_context = (struct i965_h264_context *)h264_context; + struct intel_batchbuffer *batch = i965_h264_context->batch; + VAPictureParameterBufferH264 *pic_param; + VASliceParameterBufferH264 *slice_param; + int i, j; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; + i965_avc_bsd_frame_store_index(ctx, pic_param, i965_h264_context); + + i965_h264_context->enable_avc_ildb = 0; + i965_h264_context->picture.i_flag = 1; + + for (j = 0; j < decode_state->num_slice_params && i965_h264_context->enable_avc_ildb == 0; j++) { + assert(decode_state->slice_params && decode_state->slice_params[j]->buffer); + slice_param = (VASliceParameterBufferH264 *)decode_state->slice_params[j]->buffer; + + for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { + assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL); + assert((slice_param->slice_type == SLICE_TYPE_I) || + (slice_param->slice_type == SLICE_TYPE_SI) || + (slice_param->slice_type == SLICE_TYPE_P) || + (slice_param->slice_type == SLICE_TYPE_SP) || + (slice_param->slice_type == SLICE_TYPE_B)); + + if (slice_param->disable_deblocking_filter_idc != 1) { + i965_h264_context->enable_avc_ildb = 1; + break; + } + + slice_param++; + } + } + + intel_batchbuffer_start_atomic_bcs(batch, 0x1000); + + i965_avc_bsd_img_state(ctx, decode_state, i965_h264_context); + i965_avc_bsd_qm_state(ctx, decode_state, i965_h264_context); + + for (j = 0; j < decode_state->num_slice_params; j++) { + assert(decode_state->slice_params && decode_state->slice_params[j]->buffer); + slice_param = (VASliceParameterBufferH264 *)decode_state->slice_params[j]->buffer; + + i965_bsd_ind_obj_base_address(ctx, decode_state, j, i965_h264_context); + + for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { + assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL); + assert((slice_param->slice_type == SLICE_TYPE_I) || + (slice_param->slice_type == SLICE_TYPE_SI) || + (slice_param->slice_type == SLICE_TYPE_P) || + (slice_param->slice_type == SLICE_TYPE_SP) || + (slice_param->slice_type == SLICE_TYPE_B)); + + if (i965_h264_context->picture.i_flag && + (slice_param->slice_type != SLICE_TYPE_I || + slice_param->slice_type != SLICE_TYPE_SI)) + i965_h264_context->picture.i_flag = 0; + + i965_avc_bsd_slice_state(ctx, pic_param, slice_param, i965_h264_context); + i965_avc_bsd_buf_base_state(ctx, pic_param, slice_param, i965_h264_context); + i965_avc_bsd_object(ctx, decode_state, pic_param, slice_param, j, i965_h264_context); + slice_param++; + } + } + + i965_avc_bsd_phantom_slice(ctx, decode_state, pic_param, i965_h264_context); + intel_batchbuffer_emit_mi_flush(batch); + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); +} + +void +i965_avc_bsd_decode_init(VADriverContextP ctx, void *h264_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_h264_context *i965_h264_context = (struct i965_h264_context *)h264_context; + struct i965_avc_bsd_context *i965_avc_bsd_context; + dri_bo *bo; + + assert(i965_h264_context); + i965_avc_bsd_context = &i965_h264_context->i965_avc_bsd_context; + + dri_bo_unreference(i965_avc_bsd_context->bsd_raw_store.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "bsd raw store", + 0x3000, /* at least 11520 bytes to support 120 MBs per row */ + 64); + assert(bo); + i965_avc_bsd_context->bsd_raw_store.bo = bo; + + dri_bo_unreference(i965_avc_bsd_context->mpr_row_store.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "mpr row store", + 0x2000, /* at least 7680 bytes to support 120 MBs per row */ + 64); + assert(bo); + i965_avc_bsd_context->mpr_row_store.bo = bo; +} + +Bool +i965_avc_bsd_ternimate(struct i965_avc_bsd_context *i965_avc_bsd_context) +{ + dri_bo_unreference(i965_avc_bsd_context->bsd_raw_store.bo); + dri_bo_unreference(i965_avc_bsd_context->mpr_row_store.bo); + + return True; +} diff --git a/src/i965_avc_bsd.h b/src/i965_avc_bsd.h new file mode 100644 index 00000000..25606ba4 --- /dev/null +++ b/src/i965_avc_bsd.h @@ -0,0 +1,58 @@ +/* + * Copyright © 2010 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao <haihao.xiang@intel.com> + * + */ + +#ifndef __I965_AVC_BSD_H__ +#define __I965_AVC_BSD_H__ + +#define DMV_SIZE 0x88000 /* 557056 bytes for a frame */ + +struct i965_avc_bsd_context +{ + struct { + dri_bo *bo; + } bsd_raw_store; + + struct { + dri_bo *bo; + } mpr_row_store; +}; + +struct i965_avc_bsd_surface +{ + struct i965_avc_bsd_context *ctx; + dri_bo *dmv_top; + dri_bo *dmv_bottom; + int dmv_bottom_flag; +}; + +void i965_avc_bsd_pipeline(VADriverContextP, struct decode_state *, void *h264_context); +void i965_avc_bsd_decode_init(VADriverContextP, void *h264_context); +Bool i965_avc_bsd_ternimate(struct i965_avc_bsd_context *); + +#endif /* __I965_AVC_BSD_H__ */ + diff --git a/src/i965_avc_hw_scoreboard.c b/src/i965_avc_hw_scoreboard.c new file mode 100644 index 00000000..3fb7ae3a --- /dev/null +++ b/src/i965_avc_hw_scoreboard.c @@ -0,0 +1,463 @@ +/* + * Copyright © 2010 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao <haihao.xiang@intel.com> + * + */ + +#include <stdio.h> +#include <string.h> +#include <assert.h> + +#include "va_backend.h" + +#include "intel_batchbuffer.h" +#include "intel_driver.h" + +#include "i965_defines.h" +#include "i965_drv_video.h" +#include "i965_avc_hw_scoreboard.h" +#include "i965_media_h264.h" +#include "i965_media.h" + +/* On Ironlake */ +#include "shaders/h264/mc/export.inc.gen5" + +enum { + AVC_HW_SCOREBOARD = 0, + AVC_HW_SCOREBOARD_MBAFF +}; + +static unsigned long avc_hw_scoreboard_kernel_offset[] = { + SETHWSCOREBOARD_IP_GEN5 * INST_UNIT_GEN5, + SETHWSCOREBOARD_MBAFF_IP_GEN5 * INST_UNIT_GEN5 +}; + +static unsigned int avc_hw_scoreboard_constants[] = { + 0x08040201, + 0x00000010, + 0x08000210, + 0x00000000, + 0x08040201, + 0x08040210, + 0x01000010, + 0x08040200 +}; + +static void +i965_avc_hw_scoreboard_surface_state(struct i965_h264_context *i965_h264_context) +{ + struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context = &i965_h264_context->avc_hw_scoreboard_context; + struct i965_surface_state *ss; + dri_bo *bo; + + bo = avc_hw_scoreboard_context->surface.ss_bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + ss = bo->virtual; + memset(ss, 0, sizeof(*ss)); + ss->ss0.surface_type = I965_SURFACE_BUFFER; + ss->ss1.base_addr = avc_hw_scoreboard_context->surface.s_bo->offset; + ss->ss2.width = ((avc_hw_scoreboard_context->surface.total_mbs * MB_CMD_IN_OWS - 1) & 0x7f); + ss->ss2.height = (((avc_hw_scoreboard_context->surface.total_mbs * MB_CMD_IN_OWS - 1) >> 7) & 0x1fff); + ss->ss3.depth = (((avc_hw_scoreboard_context->surface.total_mbs * MB_CMD_IN_OWS - 1) >> 20) & 0x7f); + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, + 0, + offsetof(struct i965_surface_state, ss1), + avc_hw_scoreboard_context->surface.s_bo); + dri_bo_unmap(bo); +} + +static void +i965_avc_hw_scoreboard_interface_descriptor_table(struct i965_h264_context *i965_h264_context) +{ + struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context = &i965_h264_context->avc_hw_scoreboard_context; + struct i965_interface_descriptor *desc; + dri_bo *bo; + + bo = avc_hw_scoreboard_context->idrt.bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + desc = bo->virtual; + memset(desc, 0, sizeof(*desc)); + desc->desc0.grf_reg_blocks = 7; + desc->desc0.kernel_start_pointer = (avc_hw_scoreboard_context->hw_kernel.bo->offset + + avc_hw_scoreboard_context->hw_kernel.offset) >> 6; /* reloc */ + desc->desc1.const_urb_entry_read_offset = 0; + desc->desc1.const_urb_entry_read_len = 1; + desc->desc3.binding_table_entry_count = 0; + desc->desc3.binding_table_pointer = + avc_hw_scoreboard_context->binding_table.bo->offset >> 5; /*reloc */ + + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + desc->desc0.grf_reg_blocks + avc_hw_scoreboard_context->hw_kernel.offset, + offsetof(struct i965_interface_descriptor, desc0), + avc_hw_scoreboard_context->hw_kernel.bo); + + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + desc->desc3.binding_table_entry_count, + offsetof(struct i965_interface_descriptor, desc3), + avc_hw_scoreboard_context->binding_table.bo); + + dri_bo_unmap(bo); +} + +static void +i965_avc_hw_scoreboard_binding_table(struct i965_h264_context *i965_h264_context) +{ + struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context = &i965_h264_context->avc_hw_scoreboard_context; + unsigned int *binding_table; + dri_bo *bo = avc_hw_scoreboard_context->binding_table.bo; + + dri_bo_map(bo, 1); + assert(bo->virtual); + binding_table = bo->virtual; + memset(binding_table, 0, bo->size); + binding_table[0] = avc_hw_scoreboard_context->surface.ss_bo->offset; + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0, + 0, + avc_hw_scoreboard_context->surface.ss_bo); + dri_bo_unmap(bo); +} + +static void +i965_avc_hw_scoreboard_vfe_state(struct i965_h264_context *i965_h264_context) +{ + struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context = &i965_h264_context->avc_hw_scoreboard_context; + struct i965_vfe_state *vfe_state; + dri_bo *bo; + + bo = avc_hw_scoreboard_context->vfe_state.bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + vfe_state = bo->virtual; + memset(vfe_state, 0, sizeof(*vfe_state)); + vfe_state->vfe1.max_threads = avc_hw_scoreboard_context->urb.num_vfe_entries - 1; + vfe_state->vfe1.urb_entry_alloc_size = avc_hw_scoreboard_context->urb.size_vfe_entry - 1; + vfe_state->vfe1.num_urb_entries = avc_hw_scoreboard_context->urb.num_vfe_entries; + vfe_state->vfe1.vfe_mode = VFE_GENERIC_MODE; + vfe_state->vfe1.children_present = 0; + vfe_state->vfe2.interface_descriptor_base = + avc_hw_scoreboard_context->idrt.bo->offset >> 4; /* reloc */ + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0, + offsetof(struct i965_vfe_state, vfe2), + avc_hw_scoreboard_context->idrt.bo); + dri_bo_unmap(bo); +} + +static void +i965_avc_hw_scoreboard_upload_constants(struct i965_h264_context *i965_h264_context) +{ + struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context = &i965_h264_context->avc_hw_scoreboard_context; + unsigned char *constant_buffer; + + if (avc_hw_scoreboard_context->curbe.upload) + return; + + dri_bo_map(avc_hw_scoreboard_context->curbe.bo, 1); + assert(avc_hw_scoreboard_context->curbe.bo->virtual); + constant_buffer = avc_hw_scoreboard_context->curbe.bo->virtual; + memcpy(constant_buffer, avc_hw_scoreboard_constants, sizeof(avc_hw_scoreboard_constants)); + dri_bo_unmap(avc_hw_scoreboard_context->curbe.bo); + avc_hw_scoreboard_context->curbe.upload = 1; +} + +static void +i965_avc_hw_scoreboard_states_setup(struct i965_h264_context *i965_h264_context) +{ + i965_avc_hw_scoreboard_surface_state(i965_h264_context); + i965_avc_hw_scoreboard_binding_table(i965_h264_context); + i965_avc_hw_scoreboard_interface_descriptor_table(i965_h264_context); + i965_avc_hw_scoreboard_vfe_state(i965_h264_context); + i965_avc_hw_scoreboard_upload_constants(i965_h264_context); +} + +static void +i965_avc_hw_scoreboard_pipeline_select(VADriverContextP ctx, struct i965_h264_context *i965_h264_context) +{ + struct intel_batchbuffer *batch = i965_h264_context->batch; + + BEGIN_BATCH(batch, 1); + OUT_BATCH(batch, CMD_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA); + ADVANCE_BATCH(batch); +} + +static void +i965_avc_hw_scoreboard_urb_layout(VADriverContextP ctx, struct i965_h264_context *i965_h264_context) +{ + struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context = &i965_h264_context->avc_hw_scoreboard_context; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965_h264_context->batch; + unsigned int vfe_fence, cs_fence; + + vfe_fence = avc_hw_scoreboard_context->urb.cs_start; + cs_fence = URB_SIZE((&i965->intel)); + + BEGIN_BATCH(batch, 3); + OUT_BATCH(batch, CMD_URB_FENCE | UF0_VFE_REALLOC | UF0_CS_REALLOC | 1); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, + (vfe_fence << UF2_VFE_FENCE_SHIFT) | /* VFE_SIZE */ + (cs_fence << UF2_CS_FENCE_SHIFT)); /* CS_SIZE */ + ADVANCE_BATCH(batch); +} + +static void +i965_avc_hw_scoreboard_state_base_address(VADriverContextP ctx, struct i965_h264_context *i965_h264_context) +{ + struct intel_batchbuffer *batch = i965_h264_context->batch; + + BEGIN_BATCH(batch, 8); + OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | 6); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + ADVANCE_BATCH(batch); +} + +static void +i965_avc_hw_scoreboard_state_pointers(VADriverContextP ctx, struct i965_h264_context *i965_h264_context) +{ + struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context = &i965_h264_context->avc_hw_scoreboard_context; + struct intel_batchbuffer *batch = i965_h264_context->batch; + + BEGIN_BATCH(batch, 3); + OUT_BATCH(batch, CMD_MEDIA_STATE_POINTERS | 1); + OUT_BATCH(batch, 0); + OUT_RELOC(batch, avc_hw_scoreboard_context->vfe_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + ADVANCE_BATCH(batch); +} + +static void +i965_avc_hw_scoreboard_cs_urb_layout(VADriverContextP ctx, struct i965_h264_context *i965_h264_context) +{ + struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context = &i965_h264_context->avc_hw_scoreboard_context; + struct intel_batchbuffer *batch = i965_h264_context->batch; + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, CMD_CS_URB_STATE | 0); + OUT_BATCH(batch, + ((avc_hw_scoreboard_context->urb.size_cs_entry - 1) << 4) | /* URB Entry Allocation Size */ + (avc_hw_scoreboard_context->urb.num_cs_entries << 0)); /* Number of URB Entries */ + ADVANCE_BATCH(batch); +} + +static void +i965_avc_hw_scoreboard_constant_buffer(VADriverContextP ctx, struct i965_h264_context *i965_h264_context) +{ + struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context = &i965_h264_context->avc_hw_scoreboard_context; + struct intel_batchbuffer *batch = i965_h264_context->batch; + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, CMD_CONSTANT_BUFFER | (1 << 8) | (2 - 2)); + OUT_RELOC(batch, avc_hw_scoreboard_context->curbe.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + avc_hw_scoreboard_context->urb.size_cs_entry - 1); + ADVANCE_BATCH(batch); +} + +static void +i965_avc_hw_scoreboard_objects(VADriverContextP ctx, struct i965_h264_context *i965_h264_context) +{ + struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context = &i965_h264_context->avc_hw_scoreboard_context; + struct intel_batchbuffer *batch = i965_h264_context->batch; + int number_mb_cmds = 512; + int starting_mb_number = avc_hw_scoreboard_context->inline_data.starting_mb_number; + int i; + + for (i = 0; i < avc_hw_scoreboard_context->inline_data.num_mb_cmds / 512; i++) { + BEGIN_BATCH(batch, 6); + OUT_BATCH(batch, CMD_MEDIA_OBJECT | 4); + OUT_BATCH(batch, 0); /* interface descriptor offset: 0 */ + OUT_BATCH(batch, 0); /* no indirect data */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, ((number_mb_cmds << 16) | + (starting_mb_number << 0))); + OUT_BATCH(batch, avc_hw_scoreboard_context->inline_data.pic_width_in_mbs); + ADVANCE_BATCH(batch); + + starting_mb_number += 512; + } + + number_mb_cmds = avc_hw_scoreboard_context->inline_data.num_mb_cmds % 512; + + if (number_mb_cmds) { + BEGIN_BATCH(batch, 6); + OUT_BATCH(batch, CMD_MEDIA_OBJECT | 4); + OUT_BATCH(batch, 0); /* interface descriptor offset: 0 */ + OUT_BATCH(batch, 0); /* no indirect data */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, ((number_mb_cmds << 16) | + (starting_mb_number << 0))); + OUT_BATCH(batch, avc_hw_scoreboard_context->inline_data.pic_width_in_mbs); + ADVANCE_BATCH(batch); + } +} + +static void +i965_avc_hw_scoreboard_pipeline_setup(VADriverContextP ctx, struct i965_h264_context *i965_h264_context) +{ + struct intel_batchbuffer *batch = i965_h264_context->batch; + + intel_batchbuffer_start_atomic(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); + i965_avc_hw_scoreboard_pipeline_select(ctx, i965_h264_context); + i965_avc_hw_scoreboard_state_base_address(ctx, i965_h264_context); + i965_avc_hw_scoreboard_state_pointers(ctx, i965_h264_context); + i965_avc_hw_scoreboard_urb_layout(ctx, i965_h264_context); + i965_avc_hw_scoreboard_cs_urb_layout(ctx, i965_h264_context); + i965_avc_hw_scoreboard_constant_buffer(ctx, i965_h264_context); + i965_avc_hw_scoreboard_objects(ctx, i965_h264_context); + intel_batchbuffer_end_atomic(batch); +} + +void +i965_avc_hw_scoreboard(VADriverContextP ctx, struct decode_state *decode_state, void *h264_context) +{ + struct i965_h264_context *i965_h264_context = (struct i965_h264_context *)h264_context; + + if (i965_h264_context->use_avc_hw_scoreboard) { + struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context = &i965_h264_context->avc_hw_scoreboard_context; + + avc_hw_scoreboard_context->inline_data.num_mb_cmds = i965_h264_context->avc_it_command_mb_info.mbs; + avc_hw_scoreboard_context->inline_data.starting_mb_number = i965_h264_context->avc_it_command_mb_info.mbs; + avc_hw_scoreboard_context->inline_data.pic_width_in_mbs = i965_h264_context->picture.width_in_mbs; + avc_hw_scoreboard_context->surface.total_mbs = i965_h264_context->avc_it_command_mb_info.mbs * 2; + + dri_bo_unreference(avc_hw_scoreboard_context->hw_kernel.bo); + avc_hw_scoreboard_context->hw_kernel.bo = i965_h264_context->avc_kernels[H264_AVC_COMBINED].bo; + assert(avc_hw_scoreboard_context->hw_kernel.bo != NULL); + dri_bo_reference(avc_hw_scoreboard_context->hw_kernel.bo); + + if (i965_h264_context->picture.mbaff_frame_flag) + avc_hw_scoreboard_context->hw_kernel.offset = avc_hw_scoreboard_kernel_offset[AVC_HW_SCOREBOARD_MBAFF]; + else + avc_hw_scoreboard_context->hw_kernel.offset = avc_hw_scoreboard_kernel_offset[AVC_HW_SCOREBOARD]; + + i965_avc_hw_scoreboard_states_setup(i965_h264_context); + i965_avc_hw_scoreboard_pipeline_setup(ctx, i965_h264_context); + } +} + +void +i965_avc_hw_scoreboard_decode_init(VADriverContextP ctx, void *h264_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_h264_context *i965_h264_context = (struct i965_h264_context *)h264_context; + + if (i965_h264_context->use_avc_hw_scoreboard) { + struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context = &i965_h264_context->avc_hw_scoreboard_context; + dri_bo *bo; + + if (avc_hw_scoreboard_context->curbe.bo == NULL) { + bo = dri_bo_alloc(i965->intel.bufmgr, + "constant buffer", + 4096, 64); + assert(bo); + avc_hw_scoreboard_context->curbe.bo = bo; + avc_hw_scoreboard_context->curbe.upload = 0; + } + + dri_bo_unreference(avc_hw_scoreboard_context->surface.s_bo); + avc_hw_scoreboard_context->surface.s_bo = i965_h264_context->avc_it_command_mb_info.bo; + assert(avc_hw_scoreboard_context->surface.s_bo != NULL); + dri_bo_reference(avc_hw_scoreboard_context->surface.s_bo); + + dri_bo_unreference(avc_hw_scoreboard_context->surface.ss_bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "surface state", + sizeof(struct i965_surface_state), 32); + assert(bo); + avc_hw_scoreboard_context->surface.ss_bo = bo; + + dri_bo_unreference(avc_hw_scoreboard_context->binding_table.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "binding table", + MAX_MEDIA_SURFACES * sizeof(unsigned int), 32); + assert(bo); + avc_hw_scoreboard_context->binding_table.bo = bo; + + dri_bo_unreference(avc_hw_scoreboard_context->idrt.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "interface discriptor", + MAX_INTERFACE_DESC * sizeof(struct i965_interface_descriptor), 16); + assert(bo); + avc_hw_scoreboard_context->idrt.bo = bo; + + dri_bo_unreference(avc_hw_scoreboard_context->vfe_state.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "vfe state", + sizeof(struct i965_vfe_state), 32); + assert(bo); + avc_hw_scoreboard_context->vfe_state.bo = bo; + + avc_hw_scoreboard_context->urb.num_vfe_entries = 32; + avc_hw_scoreboard_context->urb.size_vfe_entry = 2; + avc_hw_scoreboard_context->urb.num_cs_entries = 1; + avc_hw_scoreboard_context->urb.size_cs_entry = 1; + avc_hw_scoreboard_context->urb.vfe_start = 0; + avc_hw_scoreboard_context->urb.cs_start = avc_hw_scoreboard_context->urb.vfe_start + + avc_hw_scoreboard_context->urb.num_vfe_entries * avc_hw_scoreboard_context->urb.size_vfe_entry; + assert(avc_hw_scoreboard_context->urb.cs_start + + avc_hw_scoreboard_context->urb.num_cs_entries * avc_hw_scoreboard_context->urb.size_cs_entry <= URB_SIZE((&i965->intel))); + } +} + +Bool +i965_avc_hw_scoreboard_ternimate(struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context) +{ + dri_bo_unreference(avc_hw_scoreboard_context->curbe.bo); + avc_hw_scoreboard_context->curbe.bo = NULL; + + dri_bo_unreference(avc_hw_scoreboard_context->surface.ss_bo); + avc_hw_scoreboard_context->surface.ss_bo = NULL; + + dri_bo_unreference(avc_hw_scoreboard_context->surface.s_bo); + avc_hw_scoreboard_context->surface.s_bo = NULL; + + dri_bo_unreference(avc_hw_scoreboard_context->binding_table.bo); + avc_hw_scoreboard_context->binding_table.bo = NULL; + + dri_bo_unreference(avc_hw_scoreboard_context->idrt.bo); + avc_hw_scoreboard_context->idrt.bo = NULL; + + dri_bo_unreference(avc_hw_scoreboard_context->vfe_state.bo); + avc_hw_scoreboard_context->vfe_state.bo = NULL; + + dri_bo_unreference(avc_hw_scoreboard_context->hw_kernel.bo); + avc_hw_scoreboard_context->hw_kernel.bo = NULL; + + return True; +} diff --git a/src/i965_avc_hw_scoreboard.h b/src/i965_avc_hw_scoreboard.h new file mode 100644 index 00000000..bca88313 --- /dev/null +++ b/src/i965_avc_hw_scoreboard.h @@ -0,0 +1,85 @@ +/* + * Copyright © 2010 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao <haihao.xiang@intel.com> + * + */ + +#ifndef __I965_AVC_HW_SCOREBOARD_H__ +#define __I965_AVC_HW_SCOREBOARD_H__ + +struct i965_avc_hw_scoreboard_context +{ + struct { + unsigned int num_mb_cmds; + unsigned int starting_mb_number; + unsigned int pic_width_in_mbs; + } inline_data; + + struct { + dri_bo *ss_bo; + dri_bo *s_bo; + unsigned int total_mbs; + } surface; + + struct { + dri_bo *bo; + } binding_table; + + struct { + dri_bo *bo; + } idrt; + + struct { + dri_bo *bo; + } vfe_state; + + struct { + dri_bo *bo; + int upload; + } curbe; + + struct { + dri_bo *bo; + unsigned long offset; + } hw_kernel; + + struct { + unsigned int vfe_start; + unsigned int cs_start; + + unsigned int num_vfe_entries; + unsigned int num_cs_entries; + + unsigned int size_vfe_entry; + unsigned int size_cs_entry; + } urb; +}; + +void i965_avc_hw_scoreboard(VADriverContextP, struct decode_state *, void *h264_context); +void i965_avc_hw_scoreboard_decode_init(VADriverContextP, void *h264_context); +Bool i965_avc_hw_scoreboard_ternimate(struct i965_avc_hw_scoreboard_context *); + +#endif /* __I965_AVC_HW_SCOREBOARD_H__ */ + diff --git a/src/i965_avc_ildb.c b/src/i965_avc_ildb.c new file mode 100644 index 00000000..0518a181 --- /dev/null +++ b/src/i965_avc_ildb.c @@ -0,0 +1,654 @@ +/* + * Copyright © 2010 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao <haihao.xiang@intel.com> + * + */ + +#include <stdio.h> +#include <string.h> +#include <assert.h> + +#include "va_backend.h" + +#include "intel_batchbuffer.h" +#include "intel_driver.h" + +#include "i965_defines.h" +#include "i965_drv_video.h" +#include "i965_avc_ildb.h" +#include "i965_media_h264.h" +#include "i965_media.h" + +/* On Cantiga */ +#include "shaders/h264/mc/export.inc" + +/* On Ironlake */ +#include "shaders/h264/mc/export.inc.gen5" + +#define PICTURE_FRAME 0 +#define PICTURE_FIELD 1 +#define PICTURE_MBAFF 2 + +enum { + AVC_ILDB_ROOT_Y_ILDB_FRAME, + AVC_ILDB_CHILD_Y_ILDB_FRAME, + AVC_ILDB_ROOT_UV_ILDB_FRAME, + AVC_ILDB_CHILD_UV_ILDB_FRAME, + AVC_ILDB_ROOT_Y_ILDB_FIELD, + AVC_ILDB_CHILD_Y_ILDB_FIELD, + AVC_ILDB_ROOT_UV_ILDB_FIELD, + AVC_ILDB_CHILD_UV_ILDB_FIELD, + AVC_ILDB_ROOT_Y_ILDB_MBAFF, + AVC_ILDB_CHILD_Y_ILDB_MBAFF, + AVC_ILDB_ROOT_UV_ILDB_MBAFF, + AVC_ILDB_CHILD_UV_ILDB_MBAFF +}; + +static unsigned long avc_ildb_kernel_offset_gen4[] = { + AVC_ILDB_ROOT_Y_ILDB_FRAME_IP * INST_UNIT_GEN4, + AVC_ILDB_CHILD_Y_ILDB_FRAME_IP * INST_UNIT_GEN4, + AVC_ILDB_ROOT_UV_ILDB_FRAME_IP * INST_UNIT_GEN4, + AVC_ILDB_CHILD_UV_ILDB_FRAME_IP * INST_UNIT_GEN4, + AVC_ILDB_ROOT_Y_ILDB_FIELD_IP * INST_UNIT_GEN4, + AVC_ILDB_CHILD_Y_ILDB_FIELD_IP * INST_UNIT_GEN4, + AVC_ILDB_ROOT_UV_ILDB_FIELD_IP * INST_UNIT_GEN4, + AVC_ILDB_CHILD_UV_ILDB_FIELD_IP * INST_UNIT_GEN4, + AVC_ILDB_ROOT_Y_ILDB_MBAFF_IP * INST_UNIT_GEN4, + AVC_ILDB_CHILD_Y_ILDB_MBAFF_IP * INST_UNIT_GEN4, + AVC_ILDB_ROOT_UV_ILDB_MBAFF_IP * INST_UNIT_GEN4, + AVC_ILDB_CHILD_UV_ILDB_MBAFF_IP * INST_UNIT_GEN4 +}; + +static unsigned long avc_ildb_kernel_offset_gen5[] = { + AVC_ILDB_ROOT_Y_ILDB_FRAME_IP_GEN5 * INST_UNIT_GEN5, + AVC_ILDB_CHILD_Y_ILDB_FRAME_IP_GEN5 * INST_UNIT_GEN5, + AVC_ILDB_ROOT_UV_ILDB_FRAME_IP_GEN5 * INST_UNIT_GEN5, + AVC_ILDB_CHILD_UV_ILDB_FRAME_IP_GEN5 * INST_UNIT_GEN5, + AVC_ILDB_ROOT_Y_ILDB_FIELD_IP_GEN5 * INST_UNIT_GEN5, + AVC_ILDB_CHILD_Y_ILDB_FIELD_IP_GEN5 * INST_UNIT_GEN5, + AVC_ILDB_ROOT_UV_ILDB_FIELD_IP_GEN5 * INST_UNIT_GEN5, + AVC_ILDB_CHILD_UV_ILDB_FIELD_IP_GEN5 * INST_UNIT_GEN5, + AVC_ILDB_ROOT_Y_ILDB_MBAFF_IP_GEN5 * INST_UNIT_GEN5, + AVC_ILDB_CHILD_Y_ILDB_MBAFF_IP_GEN5 * INST_UNIT_GEN5, + AVC_ILDB_ROOT_UV_ILDB_MBAFF_IP_GEN5 * INST_UNIT_GEN5, + AVC_ILDB_CHILD_UV_ILDB_MBAFF_IP_GEN5 * INST_UNIT_GEN5 +}; + +struct avc_ildb_root_input +{ + unsigned int blocks_per_row : 16; + unsigned int blocks_per_column : 16; + + unsigned int picture_type : 16; + unsigned int max_concurrent_threads : 16; + + unsigned int debug_field : 16; + unsigned int mbaff_frame_flag : 1; + unsigned int bottom_field_flag : 1; + unsigned int control_data_expansion_flag : 1; + unsigned int chroma_format : 1; + unsigned int pad0 : 12; + + unsigned int ramp_constant_0; + + unsigned int ramp_constant_1; + + int constant_0 : 8; + int constant_1 : 8; + int pad1 : 16; + + unsigned int pad2; + unsigned int pad3; +}; + +#define NUM_AVC_ILDB_INTERFACES ARRAY_ELEMS(avc_ildb_kernel_offset_gen4) +static unsigned long *avc_ildb_kernel_offset = NULL; + +static void +i965_avc_ildb_surface_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct i965_h264_context *i965_h264_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_avc_ildb_context *avc_ildb_context = &i965_h264_context->avc_ildb_context; + struct i965_surface_state *ss; + struct object_surface *obj_surface; + VAPictureParameterBufferH264 *pic_param; + VAPictureH264 *va_pic; + dri_bo *bo; + int i; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; + va_pic = &pic_param->CurrPic; + assert(!(va_pic->flags & VA_PICTURE_H264_INVALID)); + obj_surface = SURFACE(va_pic->picture_id); + assert(obj_surface); + + avc_ildb_context->surface[SURFACE_EDGE_CONTROL_DATA].s_bo = i965_h264_context->avc_ildb_data.bo; + dri_bo_reference(avc_ildb_context->surface[SURFACE_EDGE_CONTROL_DATA].s_bo); + avc_ildb_context->surface[SURFACE_EDGE_CONTROL_DATA].offset = 0; + avc_ildb_context->surface[SURFACE_EDGE_CONTROL_DATA].surface_type = I965_SURFACE_BUFFER; + avc_ildb_context->surface[SURFACE_EDGE_CONTROL_DATA].width = ((avc_ildb_context->mbs_per_picture * EDGE_CONTROL_DATA_IN_DWS - 1) & 0x7f); + avc_ildb_context->surface[SURFACE_EDGE_CONTROL_DATA].height = (((avc_ildb_context->mbs_per_picture * EDGE_CONTROL_DATA_IN_DWS - 1) >> 7) & 0x1fff); + avc_ildb_context->surface[SURFACE_EDGE_CONTROL_DATA].depth = (((avc_ildb_context->mbs_per_picture * EDGE_CONTROL_DATA_IN_DWS - 1) >> 20) & 0x7f); + avc_ildb_context->surface[SURFACE_EDGE_CONTROL_DATA].pitch = EDGE_CONTROL_DATA_IN_BTYES - 1; + avc_ildb_context->surface[SURFACE_EDGE_CONTROL_DATA].is_target = 0; + + avc_ildb_context->surface[SURFACE_SRC_Y].s_bo = obj_surface->bo; + dri_bo_reference(avc_ildb_context->surface[SURFACE_SRC_Y].s_bo); + avc_ildb_context->surface[SURFACE_SRC_Y].offset = 0; + avc_ildb_context->surface[SURFACE_SRC_Y].surface_type = I965_SURFACE_2D; + avc_ildb_context->surface[SURFACE_SRC_Y].format = I965_SURFACEFORMAT_R8_SINT; + avc_ildb_context->surface[SURFACE_SRC_Y].width = obj_surface->width / 4 - 1; + avc_ildb_context->surface[SURFACE_SRC_Y].height = obj_surface->height - 1; + avc_ildb_context->surface[SURFACE_SRC_Y].depth = 0; + avc_ildb_context->surface[SURFACE_SRC_Y].pitch = obj_surface->width - 1; + avc_ildb_context->surface[SURFACE_SRC_Y].vert_line_stride = !!(va_pic->flags & (VA_PICTURE_H264_TOP_FIELD | VA_PICTURE_H264_BOTTOM_FIELD)); + avc_ildb_context->surface[SURFACE_SRC_Y].vert_line_stride_ofs = !!(va_pic->flags & VA_PICTURE_H264_BOTTOM_FIELD); + avc_ildb_context->surface[SURFACE_SRC_Y].is_target = 0; + + avc_ildb_context->surface[SURFACE_SRC_UV].s_bo = obj_surface->bo; + dri_bo_reference(avc_ildb_context->surface[SURFACE_SRC_UV].s_bo); + avc_ildb_context->surface[SURFACE_SRC_UV].offset = obj_surface->width * obj_surface->height; + avc_ildb_context->surface[SURFACE_SRC_UV].surface_type = I965_SURFACE_2D; + avc_ildb_context->surface[SURFACE_SRC_UV].format = I965_SURFACEFORMAT_R8G8_SINT; + avc_ildb_context->surface[SURFACE_SRC_UV].width = obj_surface->width / 4 - 1; + avc_ildb_context->surface[SURFACE_SRC_UV].height = obj_surface->height / 2 - 1; + avc_ildb_context->surface[SURFACE_SRC_UV].depth = 0; + avc_ildb_context->surface[SURFACE_SRC_UV].pitch = obj_surface->width - 1; + avc_ildb_context->surface[SURFACE_SRC_UV].vert_line_stride = !!(va_pic->flags & (VA_PICTURE_H264_TOP_FIELD | VA_PICTURE_H264_BOTTOM_FIELD)); + avc_ildb_context->surface[SURFACE_SRC_UV].vert_line_stride_ofs = !!(va_pic->flags & VA_PICTURE_H264_BOTTOM_FIELD); + avc_ildb_context->surface[SURFACE_SRC_UV].is_target = 0; + + avc_ildb_context->surface[SURFACE_DEST_Y].s_bo = obj_surface->bo; + dri_bo_reference(avc_ildb_context->surface[SURFACE_DEST_Y].s_bo); + avc_ildb_context->surface[SURFACE_DEST_Y].offset = 0; + avc_ildb_context->surface[SURFACE_DEST_Y].surface_type = I965_SURFACE_2D; + avc_ildb_context->surface[SURFACE_DEST_Y].format = I965_SURFACEFORMAT_R8_SINT; + avc_ildb_context->surface[SURFACE_DEST_Y].width = obj_surface->width / 4 - 1; + avc_ildb_context->surface[SURFACE_DEST_Y].height = obj_surface->height - 1; + avc_ildb_context->surface[SURFACE_DEST_Y].depth = 0; + avc_ildb_context->surface[SURFACE_DEST_Y].pitch = obj_surface->width - 1; + avc_ildb_context->surface[SURFACE_DEST_Y].vert_line_stride = !!(va_pic->flags & (VA_PICTURE_H264_TOP_FIELD | VA_PICTURE_H264_BOTTOM_FIELD)); + avc_ildb_context->surface[SURFACE_DEST_Y].vert_line_stride_ofs = !!(va_pic->flags & VA_PICTURE_H264_BOTTOM_FIELD); + avc_ildb_context->surface[SURFACE_DEST_Y].is_target = 1; + + avc_ildb_context->surface[SURFACE_DEST_UV].s_bo = obj_surface->bo; + dri_bo_reference(avc_ildb_context->surface[SURFACE_DEST_UV].s_bo); + avc_ildb_context->surface[SURFACE_DEST_UV].offset = obj_surface->width * obj_surface->height; + avc_ildb_context->surface[SURFACE_DEST_UV].surface_type = I965_SURFACE_2D; + avc_ildb_context->surface[SURFACE_DEST_UV].format = I965_SURFACEFORMAT_R8G8_SINT; + avc_ildb_context->surface[SURFACE_DEST_UV].width = obj_surface->width / 4 - 1; + avc_ildb_context->surface[SURFACE_DEST_UV].height = obj_surface->height / 2 - 1; + avc_ildb_context->surface[SURFACE_DEST_UV].depth = 0; + avc_ildb_context->surface[SURFACE_DEST_UV].pitch = obj_surface->width - 1; + avc_ildb_context->surface[SURFACE_DEST_UV].vert_line_stride = !!(va_pic->flags & (VA_PICTURE_H264_TOP_FIELD | VA_PICTURE_H264_BOTTOM_FIELD)); + avc_ildb_context->surface[SURFACE_DEST_UV].vert_line_stride_ofs = !!(va_pic->flags & VA_PICTURE_H264_BOTTOM_FIELD); + avc_ildb_context->surface[SURFACE_DEST_UV].is_target = 1; + + for (i = 0; i < NUM_AVC_ILDB_SURFACES; i++) { + bo = avc_ildb_context->surface[i].ss_bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + ss = bo->virtual; + memset(ss, 0, sizeof(*ss)); + ss->ss0.surface_type = avc_ildb_context->surface[i].surface_type; + ss->ss0.surface_format = avc_ildb_context->surface[i].format; + ss->ss0.vert_line_stride = avc_ildb_context->surface[i].vert_line_stride; + ss->ss0.vert_line_stride_ofs = avc_ildb_context->surface[i].vert_line_stride_ofs; + ss->ss1.base_addr = avc_ildb_context->surface[i].s_bo->offset + avc_ildb_context->surface[i].offset; + ss->ss2.width = avc_ildb_context->surface[i].width; + ss->ss2.height = avc_ildb_context->surface[i].height; + ss->ss3.depth = avc_ildb_context->surface[i].depth; + ss->ss3.pitch = avc_ildb_context->surface[i].pitch; + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, + avc_ildb_context->surface[i].is_target ? I915_GEM_DOMAIN_RENDER : 0, + avc_ildb_context->surface[i].offset, + offsetof(struct i965_surface_state, ss1), + avc_ildb_context->surface[i].s_bo); + dri_bo_unmap(bo); + } +} + +static void +i965_avc_ildb_binding_table(VADriverContextP ctx, struct i965_h264_context *i965_h264_context) +{ + struct i965_avc_ildb_context *avc_ildb_context = &i965_h264_context->avc_ildb_context; + unsigned int *binding_table; + dri_bo *bo = avc_ildb_context->binding_table.bo; + int i; + + dri_bo_map(bo, 1); + assert(bo->virtual); + binding_table = bo->virtual; + memset(binding_table, 0, bo->size); + + for (i = 0; i < NUM_AVC_ILDB_SURFACES; i++) { + binding_table[i] = avc_ildb_context->surface[i].ss_bo->offset; + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0, + i * sizeof(*binding_table), + avc_ildb_context->surface[i].ss_bo); + } + + dri_bo_unmap(bo); +} + +static void +i965_avc_ildb_interface_descriptor_table(VADriverContextP ctx, struct i965_h264_context *i965_h264_context) +{ + struct i965_avc_ildb_context *avc_ildb_context = &i965_h264_context->avc_ildb_context; + struct i965_interface_descriptor *desc; + dri_bo *bo; + int i; + + bo = avc_ildb_context->idrt.bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + desc = bo->virtual; + + for (i = 0; i < NUM_AVC_ILDB_INTERFACES; i++) { + int kernel_offset = avc_ildb_kernel_offset[i]; + memset(desc, 0, sizeof(*desc)); + desc->desc0.grf_reg_blocks = 7; + desc->desc0.kernel_start_pointer = (i965_h264_context->avc_kernels[H264_AVC_COMBINED].bo->offset + kernel_offset) >> 6; /* reloc */ + desc->desc1.const_urb_entry_read_offset = 0; + desc->desc1.const_urb_entry_read_len = ((i == AVC_ILDB_ROOT_Y_ILDB_FRAME || + i == AVC_ILDB_ROOT_Y_ILDB_FIELD || + i == AVC_ILDB_ROOT_Y_ILDB_MBAFF) ? 1 : 0); + desc->desc3.binding_table_entry_count = 0; + desc->desc3.binding_table_pointer = + avc_ildb_context->binding_table.bo->offset >> 5; /*reloc */ + + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + desc->desc0.grf_reg_blocks + kernel_offset, + i * sizeof(*desc) + offsetof(struct i965_interface_descriptor, desc0), + i965_h264_context->avc_kernels[H264_AVC_COMBINED].bo); + + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + desc->desc3.binding_table_entry_count, + i * sizeof(*desc) + offsetof(struct i965_interface_descriptor, desc3), + avc_ildb_context->binding_table.bo); + desc++; + } + + dri_bo_unmap(bo); +} + +static void +i965_avc_ildb_vfe_state(VADriverContextP ctx, struct i965_h264_context *i965_h264_context) +{ + struct i965_avc_ildb_context *avc_ildb_context = &i965_h264_context->avc_ildb_context; + struct i965_vfe_state *vfe_state; + dri_bo *bo; + + bo = avc_ildb_context->vfe_state.bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + vfe_state = bo->virtual; + memset(vfe_state, 0, sizeof(*vfe_state)); + vfe_state->vfe1.max_threads = 0; + vfe_state->vfe1.urb_entry_alloc_size = avc_ildb_context->urb.size_vfe_entry - 1; + vfe_state->vfe1.num_urb_entries = avc_ildb_context->urb.num_vfe_entries; + vfe_state->vfe1.vfe_mode = VFE_GENERIC_MODE; + vfe_state->vfe1.children_present = 1; + vfe_state->vfe2.interface_descriptor_base = + avc_ildb_context->idrt.bo->offset >> 4; /* reloc */ + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0, + offsetof(struct i965_vfe_state, vfe2), + avc_ildb_context->idrt.bo); + dri_bo_unmap(bo); +} + +static void +i965_avc_ildb_upload_constants(VADriverContextP ctx, + struct decode_state *decode_state, + struct i965_h264_context *i965_h264_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_avc_ildb_context *avc_ildb_context = &i965_h264_context->avc_ildb_context; + VAPictureParameterBufferH264 *pic_param; + struct avc_ildb_root_input *root_input; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; + + dri_bo_map(avc_ildb_context->curbe.bo, 1); + assert(avc_ildb_context->curbe.bo->virtual); + root_input = avc_ildb_context->curbe.bo->virtual; + + if (IS_IRONLAKE(i965->intel.device_id)) { + root_input->max_concurrent_threads = 76; /* 72 - 2 + 8 - 2 */ + } else { + root_input->max_concurrent_threads = 54; /* 50 - 2 + 8 - 2 */ + } + + if (pic_param->pic_fields.bits.field_pic_flag) + root_input->picture_type = PICTURE_FIELD; + else { + if (pic_param->seq_fields.bits.mb_adaptive_frame_field_flag) + root_input->picture_type = PICTURE_MBAFF; + else + root_input->picture_type = PICTURE_FRAME; + } + + avc_ildb_context->picture_type = root_input->picture_type; + root_input->blocks_per_row = pic_param->picture_width_in_mbs_minus1 + 1; + root_input->blocks_per_column = (pic_param->picture_height_in_mbs_minus1 + 1) / + (1 + (root_input->picture_type != PICTURE_FRAME)); + avc_ildb_context->mbs_per_picture = (pic_param->picture_width_in_mbs_minus1 + 1) * + (pic_param->picture_height_in_mbs_minus1 + 1); + + root_input->mbaff_frame_flag = (root_input->picture_type == PICTURE_MBAFF); + root_input->bottom_field_flag = !!(pic_param->CurrPic.flags & VA_PICTURE_H264_BOTTOM_FIELD); + root_input->control_data_expansion_flag = 1; /* Always 1 on G4x+ */ + root_input->chroma_format = (pic_param->seq_fields.bits.chroma_format_idc != 1); /* 0=4:0:0, 1=4:2:0 */ + + root_input->ramp_constant_0 = 0x03020100; + + root_input->ramp_constant_1 = 0x07060504; + + root_input->constant_0 = -2; + root_input->constant_1 = 1; + + dri_bo_unmap(avc_ildb_context->curbe.bo); +} + +static void +i965_avc_ildb_states_setup(VADriverContextP ctx, + struct decode_state *decode_state, + struct i965_h264_context *i965_h264_context) +{ + i965_avc_ildb_surface_state(ctx, decode_state, i965_h264_context); + i965_avc_ildb_binding_table(ctx, i965_h264_context); + i965_avc_ildb_interface_descriptor_table(ctx, i965_h264_context); + i965_avc_ildb_vfe_state(ctx, i965_h264_context); + i965_avc_ildb_upload_constants(ctx, decode_state, i965_h264_context); +} + +static void +i965_avc_ildb_pipeline_select(VADriverContextP ctx, struct i965_h264_context *i965_h264_context) +{ + struct intel_batchbuffer *batch = i965_h264_context->batch; + + BEGIN_BATCH(batch, 1); + OUT_BATCH(batch, CMD_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA); + ADVANCE_BATCH(batch); +} + +static void +i965_avc_ildb_urb_layout(VADriverContextP ctx, struct i965_h264_context *i965_h264_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_avc_ildb_context *avc_ildb_context = &i965_h264_context->avc_ildb_context; + struct intel_batchbuffer *batch = i965_h264_context->batch; + unsigned int vfe_fence, cs_fence; + + vfe_fence = avc_ildb_context->urb.cs_start; + cs_fence = URB_SIZE((&i965->intel)); + + BEGIN_BATCH(batch, 3); + OUT_BATCH(batch, CMD_URB_FENCE | UF0_VFE_REALLOC | UF0_CS_REALLOC | 1); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, + (vfe_fence << UF2_VFE_FENCE_SHIFT) | /* VFE_SIZE */ + (cs_fence << UF2_CS_FENCE_SHIFT)); /* CS_SIZE */ + ADVANCE_BATCH(batch); +} + +static void +i965_avc_ildb_state_base_address(VADriverContextP ctx, struct i965_h264_context *i965_h264_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965_h264_context->batch; + + if (IS_IRONLAKE(i965->intel.device_id)) { + BEGIN_BATCH(batch, 8); + OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | 6); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + ADVANCE_BATCH(batch); + } else { + BEGIN_BATCH(batch, 6); + OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | 4); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + ADVANCE_BATCH(batch); + } +} + +static void +i965_avc_ildb_state_pointers(VADriverContextP ctx, struct i965_h264_context *i965_h264_context) +{ + struct i965_avc_ildb_context *avc_ildb_context = &i965_h264_context->avc_ildb_context; + struct intel_batchbuffer *batch = i965_h264_context->batch; + + BEGIN_BATCH(batch, 3); + OUT_BATCH(batch, CMD_MEDIA_STATE_POINTERS | 1); + OUT_BATCH(batch, 0); + OUT_RELOC(batch, avc_ildb_context->vfe_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + ADVANCE_BATCH(batch); +} + +static void +i965_avc_ildb_cs_urb_layout(VADriverContextP ctx, struct i965_h264_context *i965_h264_context) +{ + struct i965_avc_ildb_context *avc_ildb_context = &i965_h264_context->avc_ildb_context; + struct intel_batchbuffer *batch = i965_h264_context->batch; + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, CMD_CS_URB_STATE | 0); + OUT_BATCH(batch, + ((avc_ildb_context->urb.size_cs_entry - 1) << 4) | /* URB Entry Allocation Size */ + (avc_ildb_context->urb.num_cs_entries << 0)); /* Number of URB Entries */ + ADVANCE_BATCH(batch); +} + +static void +i965_avc_ildb_constant_buffer(VADriverContextP ctx, struct i965_h264_context *i965_h264_context) +{ + struct i965_avc_ildb_context *avc_ildb_context = &i965_h264_context->avc_ildb_context; + struct intel_batchbuffer *batch = i965_h264_context->batch; + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, CMD_CONSTANT_BUFFER | (1 << 8) | (2 - 2)); + OUT_RELOC(batch, avc_ildb_context->curbe.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + avc_ildb_context->urb.size_cs_entry - 1); + ADVANCE_BATCH(batch); +} + +static void +i965_avc_ildb_objects(VADriverContextP ctx, struct i965_h264_context *i965_h264_context) +{ + struct i965_avc_ildb_context *avc_ildb_context = &i965_h264_context->avc_ildb_context; + struct intel_batchbuffer *batch = i965_h264_context->batch; + + BEGIN_BATCH(batch, 6); + OUT_BATCH(batch, CMD_MEDIA_OBJECT | 4); + + switch (avc_ildb_context->picture_type) { + case PICTURE_FRAME: + OUT_BATCH(batch, AVC_ILDB_ROOT_Y_ILDB_FRAME); + break; + + case PICTURE_FIELD: + OUT_BATCH(batch, AVC_ILDB_ROOT_Y_ILDB_FIELD); + break; + + case PICTURE_MBAFF: + OUT_BATCH(batch, AVC_ILDB_ROOT_Y_ILDB_MBAFF); + break; + + default: + assert(0); + OUT_BATCH(batch, 0); + break; + } + + OUT_BATCH(batch, 0); /* no indirect data */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); +} + +static void +i965_avc_ildb_pipeline_setup(VADriverContextP ctx, struct i965_h264_context *i965_h264_context) +{ + struct intel_batchbuffer *batch = i965_h264_context->batch; + + intel_batchbuffer_emit_mi_flush(batch); + i965_avc_ildb_pipeline_select(ctx, i965_h264_context); + i965_avc_ildb_state_base_address(ctx, i965_h264_context); + i965_avc_ildb_state_pointers(ctx, i965_h264_context); + i965_avc_ildb_urb_layout(ctx, i965_h264_context); + i965_avc_ildb_cs_urb_layout(ctx, i965_h264_context); + i965_avc_ildb_constant_buffer(ctx, i965_h264_context); + i965_avc_ildb_objects(ctx, i965_h264_context); +} + +void +i965_avc_ildb(VADriverContextP ctx, struct decode_state *decode_state, void *h264_context) +{ + struct i965_h264_context *i965_h264_context = (struct i965_h264_context *)h264_context; + + if (i965_h264_context->enable_avc_ildb) { + i965_avc_ildb_states_setup(ctx, decode_state, i965_h264_context); + i965_avc_ildb_pipeline_setup(ctx, i965_h264_context); + } +} + +void +i965_avc_ildb_decode_init(VADriverContextP ctx, void *h264_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_h264_context *i965_h264_context = (struct i965_h264_context *)h264_context; + struct i965_avc_ildb_context *avc_ildb_context = &i965_h264_context->avc_ildb_context;; + dri_bo *bo; + int i; + + dri_bo_unreference(avc_ildb_context->curbe.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "constant buffer", + 4096, 64); + assert(bo); + avc_ildb_context->curbe.bo = bo; + + dri_bo_unreference(avc_ildb_context->binding_table.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "binding table", + NUM_AVC_ILDB_SURFACES * sizeof(unsigned int), 32); + assert(bo); + avc_ildb_context->binding_table.bo = bo; + + dri_bo_unreference(avc_ildb_context->idrt.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "interface discriptor", + NUM_AVC_ILDB_INTERFACES * sizeof(struct i965_interface_descriptor), 16); + assert(bo); + avc_ildb_context->idrt.bo = bo; + + dri_bo_unreference(avc_ildb_context->vfe_state.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "vfe state", + sizeof(struct i965_vfe_state), 32); + assert(bo); + avc_ildb_context->vfe_state.bo = bo; + + avc_ildb_context->urb.num_vfe_entries = 1; + avc_ildb_context->urb.size_vfe_entry = 640; + avc_ildb_context->urb.num_cs_entries = 1; + avc_ildb_context->urb.size_cs_entry = 1; + avc_ildb_context->urb.vfe_start = 0; + avc_ildb_context->urb.cs_start = avc_ildb_context->urb.vfe_start + + avc_ildb_context->urb.num_vfe_entries * avc_ildb_context->urb.size_vfe_entry; + assert(avc_ildb_context->urb.cs_start + + avc_ildb_context->urb.num_cs_entries * avc_ildb_context->urb.size_cs_entry <= URB_SIZE((&i965->intel))); + + for (i = 0; i < NUM_AVC_ILDB_SURFACES; i++) { + dri_bo_unreference(avc_ildb_context->surface[i].s_bo); + avc_ildb_context->surface[i].s_bo = NULL; + + dri_bo_unreference(avc_ildb_context->surface[i].ss_bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "surface state", + sizeof(struct i965_surface_state), 32); + assert(bo); + avc_ildb_context->surface[i].ss_bo = bo; + } + + /* kernel offset */ + assert(NUM_AVC_ILDB_INTERFACES == ARRAY_ELEMS(avc_ildb_kernel_offset_gen5)); + + if (IS_IRONLAKE(i965->intel.device_id)) { + avc_ildb_kernel_offset = avc_ildb_kernel_offset_gen5; + } else { + avc_ildb_kernel_offset = avc_ildb_kernel_offset_gen4; + } +} + +Bool +i965_avc_ildb_ternimate(struct i965_avc_ildb_context *avc_ildb_context) +{ + int i; + + dri_bo_unreference(avc_ildb_context->curbe.bo); + avc_ildb_context->curbe.bo = NULL; + + dri_bo_unreference(avc_ildb_context->binding_table.bo); + avc_ildb_context->binding_table.bo = NULL; + + dri_bo_unreference(avc_ildb_context->idrt.bo); + avc_ildb_context->idrt.bo = NULL; + + dri_bo_unreference(avc_ildb_context->vfe_state.bo); + avc_ildb_context->vfe_state.bo = NULL; + + for (i = 0; i < NUM_AVC_ILDB_SURFACES; i++) { + dri_bo_unreference(avc_ildb_context->surface[i].ss_bo); + avc_ildb_context->surface[i].ss_bo = NULL; + + dri_bo_unreference(avc_ildb_context->surface[i].s_bo); + avc_ildb_context->surface[i].s_bo = NULL; + } + + return True; +} diff --git a/src/i965_avc_ildb.h b/src/i965_avc_ildb.h new file mode 100644 index 00000000..ff16ac6f --- /dev/null +++ b/src/i965_avc_ildb.h @@ -0,0 +1,96 @@ +/* + * Copyright © 2010 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao <haihao.xiang@intel.com> + * + */ + +#ifndef __I965_AVC_ILDB_H__ +#define __I965_AVC_ILDB_H__ + +#define SURFACE_EDGE_CONTROL_DATA 0 +#define SURFACE_SRC_Y 1 +#define SURFACE_SRC_UV 2 +#define SURFACE_DEST_Y 3 +#define SURFACE_DEST_UV 4 + +#define NUM_AVC_ILDB_SURFACES 5 + +#define EDGE_CONTROL_DATA_IN_DWS 16 +#define EDGE_CONTROL_DATA_IN_BTYES 64 + +struct i965_avc_ildb_context +{ + struct { + dri_bo *bo; + } curbe; + + struct { + dri_bo *ss_bo; + dri_bo *s_bo; + unsigned long offset; + int surface_type; + int width; + int height; + int depth; + int pitch; + int format; + int vert_line_stride; + int vert_line_stride_ofs; + int is_target; + } surface[NUM_AVC_ILDB_SURFACES]; + + struct { + dri_bo *bo; + } binding_table; + + struct { + dri_bo *bo; + } idrt; + + struct { + dri_bo *bo; + } vfe_state; + + struct { + unsigned int vfe_start; + unsigned int cs_start; + + unsigned int num_vfe_entries; + unsigned int num_cs_entries; + + unsigned int size_vfe_entry; + unsigned int size_cs_entry; + } urb; + + int picture_type; + int mbs_per_picture; +}; + +void i965_avc_ildb(VADriverContextP, struct decode_state *, void *h264_context); +void i965_avc_ildb_decode_init(VADriverContextP, void *h264_context); +Bool i965_avc_ildb_ternimate(struct i965_avc_ildb_context *); + +#endif /* __I965_AVC_ILDB_H__ */ + diff --git a/src/i965_defines.h b/src/i965_defines.h new file mode 100644 index 00000000..509ae9e8 --- /dev/null +++ b/src/i965_defines.h @@ -0,0 +1,708 @@ +#ifndef _I965_DEFINES_H_ +#define _I965_DEFINES_H_ + +#define CMD(pipeline,op,sub_op) ((3 << 29) | \ + ((pipeline) << 27) | \ + ((op) << 24) | \ + ((sub_op) << 16)) + +#define CMD_URB_FENCE CMD(0, 0, 0) +#define CMD_CS_URB_STATE CMD(0, 0, 1) +#define CMD_CONSTANT_BUFFER CMD(0, 0, 2) +#define CMD_STATE_PREFETCH CMD(0, 0, 3) + +#define CMD_STATE_BASE_ADDRESS CMD(0, 1, 1) +#define CMD_STATE_SIP CMD(0, 1, 2) +#define CMD_PIPELINE_SELECT CMD(1, 1, 4) +#define CMD_SAMPLER_PALETTE_LOAD CMD(3, 1, 2) + +#define CMD_MEDIA_STATE_POINTERS CMD(2, 0, 0) +#define CMD_MEDIA_VFE_STATE CMD(2, 0, 0) +#define CMD_MEDIA_CURBE_LOAD CMD(2, 0, 1) +#define CMD_MEDIA_INTERFACE_LOAD CMD(2, 0, 2) +#define CMD_MEDIA_OBJECT CMD(2, 1, 0) +#define CMD_MEDIA_OBJECT_EX CMD(2, 1, 1) + +#define CMD_AVC_BSD_IMG_STATE CMD(2, 4, 0) +#define CMD_AVC_BSD_QM_STATE CMD(2, 4, 1) +#define CMD_AVC_BSD_SLICE_STATE CMD(2, 4, 2) +#define CMD_AVC_BSD_BUF_BASE_STATE CMD(2, 4, 3) +#define CMD_BSD_IND_OBJ_BASE_ADDR CMD(2, 4, 4) +#define CMD_AVC_BSD_OBJECT CMD(2, 4, 8) + +#define CMD_MEDIA_VFE_STATE CMD(2, 0, 0) +#define CMD_MEDIA_CURBE_LOAD CMD(2, 0, 1) +#define CMD_MEDIA_INTERFACE_DESCRIPTOR_LOAD CMD(2, 0, 2) +#define CMD_MEDIA_GATEWAY_STATE CMD(2, 0, 3) +#define CMD_MEDIA_STATE_FLUSH CMD(2, 0, 4) +#define CMD_MEDIA_OBJECT_WALKER CMD(2, 1, 3) + +#define CMD_PIPELINED_POINTERS CMD(3, 0, 0) +#define CMD_BINDING_TABLE_POINTERS CMD(3, 0, 1) +# define GEN6_BINDING_TABLE_MODIFY_PS (1 << 12)/* for GEN6 */ +# define GEN6_BINDING_TABLE_MODIFY_GS (1 << 9) /* for GEN6 */ +# define GEN6_BINDING_TABLE_MODIFY_VS (1 << 8) /* for GEN6 */ + +#define CMD_VERTEX_BUFFERS CMD(3, 0, 8) +#define CMD_VERTEX_ELEMENTS CMD(3, 0, 9) +#define CMD_DRAWING_RECTANGLE CMD(3, 1, 0) +#define CMD_CONSTANT_COLOR CMD(3, 1, 1) +#define CMD_3DPRIMITIVE CMD(3, 3, 0) + +#define CMD_DEPTH_BUFFER CMD(3, 1, 5) +# define CMD_DEPTH_BUFFER_TYPE_SHIFT 29 +# define CMD_DEPTH_BUFFER_FORMAT_SHIFT 18 + +#define CMD_CLEAR_PARAMS CMD(3, 1, 0x10) +/* DW1 */ +# define CMD_CLEAR_PARAMS_DEPTH_CLEAR_VALID (1 << 15) + +/* for GEN6+ */ +#define GEN6_3DSTATE_SAMPLER_STATE_POINTERS CMD(3, 0, 0x02) +# define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_PS (1 << 12) +# define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_GS (1 << 9) +# define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_VS (1 << 8) + +#define GEN6_3DSTATE_URB CMD(3, 0, 0x05) +/* DW1 */ +# define GEN6_3DSTATE_URB_VS_SIZE_SHIFT 16 +# define GEN6_3DSTATE_URB_VS_ENTRIES_SHIFT 0 +/* DW2 */ +# define GEN6_3DSTATE_URB_GS_ENTRIES_SHIFT 8 +# define GEN6_3DSTATE_URB_GS_SIZE_SHIFT 0 + +#define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS CMD(3, 0, 0x0d) +# define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CC (1 << 12) +# define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_SF (1 << 11) +# define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CLIP (1 << 10) + +#define GEN6_3DSTATE_CC_STATE_POINTERS CMD(3, 0, 0x0e) + +#define GEN6_3DSTATE_VS CMD(3, 0, 0x10) + +#define GEN6_3DSTATE_GS CMD(3, 0, 0x11) +/* DW4 */ +# define GEN6_3DSTATE_GS_DISPATCH_START_GRF_SHIFT 0 + +#define GEN6_3DSTATE_CLIP CMD(3, 0, 0x12) + +#define GEN6_3DSTATE_SF CMD(3, 0, 0x13) +/* DW1 on GEN6 */ +# define GEN6_3DSTATE_SF_NUM_OUTPUTS_SHIFT 22 +# define GEN6_3DSTATE_SF_URB_ENTRY_READ_LENGTH_SHIFT 11 +# define GEN6_3DSTATE_SF_URB_ENTRY_READ_OFFSET_SHIFT 4 +/* DW1 on GEN7 */ +# define GEN7_SF_DEPTH_BUFFER_SURFACE_FORMAT_SHIFT 12 + + +/* DW2 */ +/* DW3 */ +# define GEN6_3DSTATE_SF_CULL_BOTH (0 << 29) +# define GEN6_3DSTATE_SF_CULL_NONE (1 << 29) +# define GEN6_3DSTATE_SF_CULL_FRONT (2 << 29) +# define GEN6_3DSTATE_SF_CULL_BACK (3 << 29) +/* DW4 */ +# define GEN6_3DSTATE_SF_TRI_PROVOKE_SHIFT 29 +# define GEN6_3DSTATE_SF_LINE_PROVOKE_SHIFT 27 +# define GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT 25 + + +#define GEN6_3DSTATE_WM CMD(3, 0, 0x14) +/* DW2 */ +# define GEN6_3DSTATE_WM_SAMPLER_COUNT_SHITF 27 +# define GEN6_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT 18 +/* DW4 */ +# define GEN6_3DSTATE_WM_DISPATCH_START_GRF_0_SHIFT 16 +/* DW5 */ +# define GEN6_3DSTATE_WM_MAX_THREADS_SHIFT 25 +# define GEN6_3DSTATE_WM_DISPATCH_ENABLE (1 << 19) +# define GEN6_3DSTATE_WM_16_DISPATCH_ENABLE (1 << 1) +# define GEN6_3DSTATE_WM_8_DISPATCH_ENABLE (1 << 0) +/* DW6 */ +# define GEN6_3DSTATE_WM_NUM_SF_OUTPUTS_SHIFT 20 +# define GEN6_3DSTATE_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 15) +# define GEN6_3DSTATE_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC (1 << 14) +# define GEN6_3DSTATE_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC (1 << 13) +# define GEN6_3DSTATE_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 12) +# define GEN6_3DSTATE_WM_PERSPECTIVE_CENTROID_BARYCENTRIC (1 << 11) +# define GEN6_3DSTATE_WM_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 10) + +/* 3DSTATE_WM on GEN7 */ +/* DW1 */ +# define GEN7_WM_STATISTICS_ENABLE (1 << 31) +# define GEN7_WM_DEPTH_CLEAR (1 << 30) +# define GEN7_WM_DISPATCH_ENABLE (1 << 29) +# define GEN6_WM_DEPTH_RESOLVE (1 << 28) +# define GEN7_WM_HIERARCHICAL_DEPTH_RESOLVE (1 << 27) +# define GEN7_WM_KILL_ENABLE (1 << 25) +# define GEN7_WM_PSCDEPTH_OFF (0 << 23) +# define GEN7_WM_PSCDEPTH_ON (1 << 23) +# define GEN7_WM_PSCDEPTH_ON_GE (2 << 23) +# define GEN7_WM_PSCDEPTH_ON_LE (3 << 23) +# define GEN7_WM_USES_SOURCE_DEPTH (1 << 20) +# define GEN7_WM_USES_SOURCE_W (1 << 19) +# define GEN7_WM_POSITION_ZW_PIXEL (0 << 17) +# define GEN7_WM_POSITION_ZW_CENTROID (2 << 17) +# define GEN7_WM_POSITION_ZW_SAMPLE (3 << 17) +# define GEN7_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 16) +# define GEN7_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC (1 << 15) +# define GEN7_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC (1 << 14) +# define GEN7_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 13) +# define GEN7_WM_PERSPECTIVE_CENTROID_BARYCENTRIC (1 << 12) +# define GEN7_WM_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 11) +# define GEN7_WM_USES_INPUT_COVERAGE_MASK (1 << 10) +# define GEN7_WM_LINE_END_CAP_AA_WIDTH_0_5 (0 << 8) +# define GEN7_WM_LINE_END_CAP_AA_WIDTH_1_0 (1 << 8) +# define GEN7_WM_LINE_END_CAP_AA_WIDTH_2_0 (2 << 8) +# define GEN7_WM_LINE_END_CAP_AA_WIDTH_4_0 (3 << 8) +# define GEN7_WM_LINE_AA_WIDTH_0_5 (0 << 6) +# define GEN7_WM_LINE_AA_WIDTH_1_0 (1 << 6) +# define GEN7_WM_LINE_AA_WIDTH_2_0 (2 << 6) +# define GEN7_WM_LINE_AA_WIDTH_4_0 (3 << 6) +# define GEN7_WM_POLYGON_STIPPLE_ENABLE (1 << 4) +# define GEN7_WM_LINE_STIPPLE_ENABLE (1 << 3) +# define GEN7_WM_POINT_RASTRULE_UPPER_RIGHT (1 << 2) +# define GEN7_WM_MSRAST_OFF_PIXEL (0 << 0) +# define GEN7_WM_MSRAST_OFF_PATTERN (1 << 0) +# define GEN7_WM_MSRAST_ON_PIXEL (2 << 0) +# define GEN7_WM_MSRAST_ON_PATTERN (3 << 0) +/* DW2 */ +# define GEN7_WM_MSDISPMODE_PERPIXEL (1 << 31) + +#define GEN6_3DSTATE_CONSTANT_VS CMD(3, 0, 0x15) +#define GEN6_3DSTATE_CONSTANT_GS CMD(3, 0, 0x16) +#define GEN6_3DSTATE_CONSTANT_PS CMD(3, 0, 0x17) + +# define GEN6_3DSTATE_CONSTANT_BUFFER_3_ENABLE (1 << 15) +# define GEN6_3DSTATE_CONSTANT_BUFFER_2_ENABLE (1 << 14) +# define GEN6_3DSTATE_CONSTANT_BUFFER_1_ENABLE (1 << 13) +# define GEN6_3DSTATE_CONSTANT_BUFFER_0_ENABLE (1 << 12) + +#define GEN6_3DSTATE_SAMPLE_MASK CMD(3, 0, 0x18) + +#define GEN6_3DSTATE_MULTISAMPLE CMD(3, 1, 0x0d) +/* DW1 */ +# define GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER (0 << 4) +# define GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_UPPER_LEFT (1 << 4) +# define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_1 (0 << 1) +# define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_4 (2 << 1) +# define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_8 (3 << 1) + +/* GEN7 */ +#define GEN7_3DSTATE_CLEAR_PARAMS CMD(3, 0, 0x04) +#define GEN7_3DSTATE_DEPTH_BUFFER CMD(3, 0, 0x05) + +#define GEN7_3DSTATE_URB_VS CMD(3, 0, 0x30) +#define GEN7_3DSTATE_URB_HS CMD(3, 0, 0x31) +#define GEN7_3DSTATE_URB_DS CMD(3, 0, 0x32) +#define GEN7_3DSTATE_URB_GS CMD(3, 0, 0x33) +/* DW1 */ +# define GEN7_URB_ENTRY_NUMBER_SHIFT 0 +# define GEN7_URB_ENTRY_SIZE_SHIFT 16 +# define GEN7_URB_STARTING_ADDRESS_SHIFT 25 + +#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS CMD(3, 1, 0x12) +#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS CMD(3, 1, 0x16) +/* DW1 */ +# define GEN7_PUSH_CONSTANT_BUFFER_OFFSET_SHIFT 16 + +#define GEN7_3DSTATE_CONSTANT_HS CMD(3, 0, 0x19) +#define GEN7_3DSTATE_CONSTANT_DS CMD(3, 0, 0x1a) + +#define GEN7_3DSTATE_HS CMD(3, 0, 0x1b) +#define GEN7_3DSTATE_TE CMD(3, 0, 0x1c) +#define GEN7_3DSTATE_DS CMD(3, 0, 0x1d) +#define GEN7_3DSTATE_STREAMOUT CMD(3, 0, 0x1e) +#define GEN7_3DSTATE_SBE CMD(3, 0, 0x1f) + +/* DW1 */ +# define GEN7_SBE_SWIZZLE_CONTROL_MODE (1 << 28) +# define GEN7_SBE_NUM_OUTPUTS_SHIFT 22 +# define GEN7_SBE_SWIZZLE_ENABLE (1 << 21) +# define GEN7_SBE_POINT_SPRITE_LOWERLEFT (1 << 20) +# define GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT 11 +# define GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT 4 + +#define GEN7_3DSTATE_PS CMD(3, 0, 0x20) +/* DW1: kernel pointer */ +/* DW2 */ +# define GEN7_PS_SPF_MODE (1 << 31) +# define GEN7_PS_VECTOR_MASK_ENABLE (1 << 30) +# define GEN7_PS_SAMPLER_COUNT_SHIFT 27 +# define GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18 +# define GEN7_PS_FLOATING_POINT_MODE_IEEE_754 (0 << 16) +# define GEN7_PS_FLOATING_POINT_MODE_ALT (1 << 16) +/* DW3: scratch space */ +/* DW4 */ +# define GEN7_PS_MAX_THREADS_SHIFT 23 +# define GEN7_PS_PUSH_CONSTANT_ENABLE (1 << 11) +# define GEN7_PS_ATTRIBUTE_ENABLE (1 << 10) +# define GEN7_PS_OMASK_TO_RENDER_TARGET (1 << 9) +# define GEN7_PS_DUAL_SOURCE_BLEND_ENABLE (1 << 7) +# define GEN7_PS_POSOFFSET_NONE (0 << 3) +# define GEN7_PS_POSOFFSET_CENTROID (2 << 3) +# define GEN7_PS_POSOFFSET_SAMPLE (3 << 3) +# define GEN7_PS_32_DISPATCH_ENABLE (1 << 2) +# define GEN7_PS_16_DISPATCH_ENABLE (1 << 1) +# define GEN7_PS_8_DISPATCH_ENABLE (1 << 0) +/* DW5 */ +# define GEN7_PS_DISPATCH_START_GRF_SHIFT_0 16 +# define GEN7_PS_DISPATCH_START_GRF_SHIFT_1 8 +# define GEN7_PS_DISPATCH_START_GRF_SHIFT_2 0 +/* DW6: kernel 1 pointer */ +/* DW7: kernel 2 pointer */ + +#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL CMD(3, 0, 0x21) +#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC CMD(3, 0, 0x23) + +#define GEN7_3DSTATE_BLEND_STATE_POINTERS CMD(3, 0, 0x24) +#define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS CMD(3, 0, 0x25) + +#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS CMD(3, 0, 0x26) +#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS CMD(3, 0, 0x27) +#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS CMD(3, 0, 0x28) +#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS CMD(3, 0, 0x29) +#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS CMD(3, 0, 0x2a) + +#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS CMD(3, 0, 0x2b) +#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS CMD(3, 0, 0x2e) +#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS CMD(3, 0, 0x2f) + +#define MFX(pipeline, op, sub_opa, sub_opb) \ + (3 << 29 | \ + (pipeline) << 27 | \ + (op) << 24 | \ + (sub_opa) << 21 | \ + (sub_opb) << 16) + +#define MFX_PIPE_MODE_SELECT MFX(2, 0, 0, 0) +#define MFX_SURFACE_STATE MFX(2, 0, 0, 1) +#define MFX_PIPE_BUF_ADDR_STATE MFX(2, 0, 0, 2) +#define MFX_IND_OBJ_BASE_ADDR_STATE MFX(2, 0, 0, 3) +#define MFX_BSP_BUF_BASE_ADDR_STATE MFX(2, 0, 0, 4) +#define MFX_AES_STATE MFX(2, 0, 0, 5) +#define MFX_STATE_POINTER MFX(2, 0, 0, 6) +#define MFX_QM_STATE MFX(2, 0, 0, 7) +#define MFX_FQM_STATE MFX(2, 0, 0, 8) + +#define MFX_WAIT MFX(1, 0, 0, 0) + +#define MFX_AVC_IMG_STATE MFX(2, 1, 0, 0) +#define MFX_AVC_QM_STATE MFX(2, 1, 0, 1) +#define MFX_AVC_DIRECTMODE_STATE MFX(2, 1, 0, 2) +#define MFX_AVC_SLICE_STATE MFX(2, 1, 0, 3) +#define MFX_AVC_REF_IDX_STATE MFX(2, 1, 0, 4) +#define MFX_AVC_WEIGHTOFFSET_STATE MFX(2, 1, 0, 5) + +#define MFD_AVC_BSD_OBJECT MFX(2, 1, 1, 8) + +#define MFC_AVC_FQM_STATE MFX(2, 1, 2, 2) +#define MFC_AVC_INSERT_OBJECT MFX(2, 1, 2, 8) +#define MFC_AVC_PAK_OBJECT MFX(2, 1, 2, 9) + +#define MFX_MPEG2_PIC_STATE MFX(2, 3, 0, 0) +#define MFX_MPEG2_QM_STATE MFX(2, 3, 0, 1) + +#define MFD_MPEG2_BSD_OBJECT MFX(2, 3, 1, 8) + +#define MFX_VC1_PIC_STATE MFX(2, 2, 0, 0) +#define MFX_VC1_PRED_PIPE_STATE MFX(2, 2, 0, 1) +#define MFX_VC1_DIRECTMODE_STATE MFX(2, 2, 0, 2) + +#define MFD_VC1_SHORT_PIC_STATE MFX(2, 2, 1, 0) +#define MFD_VC1_LONG_PIC_STATE MFX(2, 2, 1, 1) + +#define MFD_VC1_BSD_OBJECT MFX(2, 2, 1, 8) + +#define I965_DEPTHFORMAT_D32_FLOAT 1 + +#define BASE_ADDRESS_MODIFY (1 << 0) + +#define PIPELINE_SELECT_3D 0 +#define PIPELINE_SELECT_MEDIA 1 + + +#define UF0_CS_REALLOC (1 << 13) +#define UF0_VFE_REALLOC (1 << 12) +#define UF0_SF_REALLOC (1 << 11) +#define UF0_CLIP_REALLOC (1 << 10) +#define UF0_GS_REALLOC (1 << 9) +#define UF0_VS_REALLOC (1 << 8) +#define UF1_CLIP_FENCE_SHIFT 20 +#define UF1_GS_FENCE_SHIFT 10 +#define UF1_VS_FENCE_SHIFT 0 +#define UF2_CS_FENCE_SHIFT 20 +#define UF2_VFE_FENCE_SHIFT 10 +#define UF2_SF_FENCE_SHIFT 0 + +#define VFE_GENERIC_MODE 0x0 +#define VFE_VLD_MODE 0x1 +#define VFE_IS_MODE 0x2 +#define VFE_AVC_MC_MODE 0x4 +#define VFE_AVC_IT_MODE 0x7 + +#define FLOATING_POINT_IEEE_754 0 +#define FLOATING_POINT_NON_IEEE_754 1 + + +#define I965_SURFACE_1D 0 +#define I965_SURFACE_2D 1 +#define I965_SURFACE_3D 2 +#define I965_SURFACE_CUBE 3 +#define I965_SURFACE_BUFFER 4 +#define I965_SURFACE_NULL 7 + +#define I965_SURFACEFORMAT_R32G32B32A32_FLOAT 0x000 +#define I965_SURFACEFORMAT_R32G32B32A32_SINT 0x001 +#define I965_SURFACEFORMAT_R32G32B32A32_UINT 0x002 +#define I965_SURFACEFORMAT_R32G32B32A32_UNORM 0x003 +#define I965_SURFACEFORMAT_R32G32B32A32_SNORM 0x004 +#define I965_SURFACEFORMAT_R64G64_FLOAT 0x005 +#define I965_SURFACEFORMAT_R32G32B32X32_FLOAT 0x006 +#define I965_SURFACEFORMAT_R32G32B32A32_SSCALED 0x007 +#define I965_SURFACEFORMAT_R32G32B32A32_USCALED 0x008 +#define I965_SURFACEFORMAT_R32G32B32_FLOAT 0x040 +#define I965_SURFACEFORMAT_R32G32B32_SINT 0x041 +#define I965_SURFACEFORMAT_R32G32B32_UINT 0x042 +#define I965_SURFACEFORMAT_R32G32B32_UNORM 0x043 +#define I965_SURFACEFORMAT_R32G32B32_SNORM 0x044 +#define I965_SURFACEFORMAT_R32G32B32_SSCALED 0x045 +#define I965_SURFACEFORMAT_R32G32B32_USCALED 0x046 +#define I965_SURFACEFORMAT_R16G16B16A16_UNORM 0x080 +#define I965_SURFACEFORMAT_R16G16B16A16_SNORM 0x081 +#define I965_SURFACEFORMAT_R16G16B16A16_SINT 0x082 +#define I965_SURFACEFORMAT_R16G16B16A16_UINT 0x083 +#define I965_SURFACEFORMAT_R16G16B16A16_FLOAT 0x084 +#define I965_SURFACEFORMAT_R32G32_FLOAT 0x085 +#define I965_SURFACEFORMAT_R32G32_SINT 0x086 +#define I965_SURFACEFORMAT_R32G32_UINT 0x087 +#define I965_SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS 0x088 +#define I965_SURFACEFORMAT_X32_TYPELESS_G8X24_UINT 0x089 +#define I965_SURFACEFORMAT_L32A32_FLOAT 0x08A +#define I965_SURFACEFORMAT_R32G32_UNORM 0x08B +#define I965_SURFACEFORMAT_R32G32_SNORM 0x08C +#define I965_SURFACEFORMAT_R64_FLOAT 0x08D +#define I965_SURFACEFORMAT_R16G16B16X16_UNORM 0x08E +#define I965_SURFACEFORMAT_R16G16B16X16_FLOAT 0x08F +#define I965_SURFACEFORMAT_A32X32_FLOAT 0x090 +#define I965_SURFACEFORMAT_L32X32_FLOAT 0x091 +#define I965_SURFACEFORMAT_I32X32_FLOAT 0x092 +#define I965_SURFACEFORMAT_R16G16B16A16_SSCALED 0x093 +#define I965_SURFACEFORMAT_R16G16B16A16_USCALED 0x094 +#define I965_SURFACEFORMAT_R32G32_SSCALED 0x095 +#define I965_SURFACEFORMAT_R32G32_USCALED 0x096 +#define I965_SURFACEFORMAT_B8G8R8A8_UNORM 0x0C0 +#define I965_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB 0x0C1 +#define I965_SURFACEFORMAT_R10G10B10A2_UNORM 0x0C2 +#define I965_SURFACEFORMAT_R10G10B10A2_UNORM_SRGB 0x0C3 +#define I965_SURFACEFORMAT_R10G10B10A2_UINT 0x0C4 +#define I965_SURFACEFORMAT_R10G10B10_SNORM_A2_UNORM 0x0C5 +#define I965_SURFACEFORMAT_R8G8B8A8_UNORM 0x0C7 +#define I965_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB 0x0C8 +#define I965_SURFACEFORMAT_R8G8B8A8_SNORM 0x0C9 +#define I965_SURFACEFORMAT_R8G8B8A8_SINT 0x0CA +#define I965_SURFACEFORMAT_R8G8B8A8_UINT 0x0CB +#define I965_SURFACEFORMAT_R16G16_UNORM 0x0CC +#define I965_SURFACEFORMAT_R16G16_SNORM 0x0CD +#define I965_SURFACEFORMAT_R16G16_SINT 0x0CE +#define I965_SURFACEFORMAT_R16G16_UINT 0x0CF +#define I965_SURFACEFORMAT_R16G16_FLOAT 0x0D0 +#define I965_SURFACEFORMAT_B10G10R10A2_UNORM 0x0D1 +#define I965_SURFACEFORMAT_B10G10R10A2_UNORM_SRGB 0x0D2 +#define I965_SURFACEFORMAT_R11G11B10_FLOAT 0x0D3 +#define I965_SURFACEFORMAT_R32_SINT 0x0D6 +#define I965_SURFACEFORMAT_R32_UINT 0x0D7 +#define I965_SURFACEFORMAT_R32_FLOAT 0x0D8 +#define I965_SURFACEFORMAT_R24_UNORM_X8_TYPELESS 0x0D9 +#define I965_SURFACEFORMAT_X24_TYPELESS_G8_UINT 0x0DA +#define I965_SURFACEFORMAT_L16A16_UNORM 0x0DF +#define I965_SURFACEFORMAT_I24X8_UNORM 0x0E0 +#define I965_SURFACEFORMAT_L24X8_UNORM 0x0E1 +#define I965_SURFACEFORMAT_A24X8_UNORM 0x0E2 +#define I965_SURFACEFORMAT_I32_FLOAT 0x0E3 +#define I965_SURFACEFORMAT_L32_FLOAT 0x0E4 +#define I965_SURFACEFORMAT_A32_FLOAT 0x0E5 +#define I965_SURFACEFORMAT_B8G8R8X8_UNORM 0x0E9 +#define I965_SURFACEFORMAT_B8G8R8X8_UNORM_SRGB 0x0EA +#define I965_SURFACEFORMAT_R8G8B8X8_UNORM 0x0EB +#define I965_SURFACEFORMAT_R8G8B8X8_UNORM_SRGB 0x0EC +#define I965_SURFACEFORMAT_R9G9B9E5_SHAREDEXP 0x0ED +#define I965_SURFACEFORMAT_B10G10R10X2_UNORM 0x0EE +#define I965_SURFACEFORMAT_L16A16_FLOAT 0x0F0 +#define I965_SURFACEFORMAT_R32_UNORM 0x0F1 +#define I965_SURFACEFORMAT_R32_SNORM 0x0F2 +#define I965_SURFACEFORMAT_R10G10B10X2_USCALED 0x0F3 +#define I965_SURFACEFORMAT_R8G8B8A8_SSCALED 0x0F4 +#define I965_SURFACEFORMAT_R8G8B8A8_USCALED 0x0F5 +#define I965_SURFACEFORMAT_R16G16_SSCALED 0x0F6 +#define I965_SURFACEFORMAT_R16G16_USCALED 0x0F7 +#define I965_SURFACEFORMAT_R32_SSCALED 0x0F8 +#define I965_SURFACEFORMAT_R32_USCALED 0x0F9 +#define I965_SURFACEFORMAT_B5G6R5_UNORM 0x100 +#define I965_SURFACEFORMAT_B5G6R5_UNORM_SRGB 0x101 +#define I965_SURFACEFORMAT_B5G5R5A1_UNORM 0x102 +#define I965_SURFACEFORMAT_B5G5R5A1_UNORM_SRGB 0x103 +#define I965_SURFACEFORMAT_B4G4R4A4_UNORM 0x104 +#define I965_SURFACEFORMAT_B4G4R4A4_UNORM_SRGB 0x105 +#define I965_SURFACEFORMAT_R8G8_UNORM 0x106 +#define I965_SURFACEFORMAT_R8G8_SNORM 0x107 +#define I965_SURFACEFORMAT_R8G8_SINT 0x108 +#define I965_SURFACEFORMAT_R8G8_UINT 0x109 +#define I965_SURFACEFORMAT_R16_UNORM 0x10A +#define I965_SURFACEFORMAT_R16_SNORM 0x10B +#define I965_SURFACEFORMAT_R16_SINT 0x10C +#define I965_SURFACEFORMAT_R16_UINT 0x10D +#define I965_SURFACEFORMAT_R16_FLOAT 0x10E +#define I965_SURFACEFORMAT_I16_UNORM 0x111 +#define I965_SURFACEFORMAT_L16_UNORM 0x112 +#define I965_SURFACEFORMAT_A16_UNORM 0x113 +#define I965_SURFACEFORMAT_L8A8_UNORM 0x114 +#define I965_SURFACEFORMAT_I16_FLOAT 0x115 +#define I965_SURFACEFORMAT_L16_FLOAT 0x116 +#define I965_SURFACEFORMAT_A16_FLOAT 0x117 +#define I965_SURFACEFORMAT_R5G5_SNORM_B6_UNORM 0x119 +#define I965_SURFACEFORMAT_B5G5R5X1_UNORM 0x11A +#define I965_SURFACEFORMAT_B5G5R5X1_UNORM_SRGB 0x11B +#define I965_SURFACEFORMAT_R8G8_SSCALED 0x11C +#define I965_SURFACEFORMAT_R8G8_USCALED 0x11D +#define I965_SURFACEFORMAT_R16_SSCALED 0x11E +#define I965_SURFACEFORMAT_R16_USCALED 0x11F +#define I965_SURFACEFORMAT_R8_UNORM 0x140 +#define I965_SURFACEFORMAT_R8_SNORM 0x141 +#define I965_SURFACEFORMAT_R8_SINT 0x142 +#define I965_SURFACEFORMAT_R8_UINT 0x143 +#define I965_SURFACEFORMAT_A8_UNORM 0x144 +#define I965_SURFACEFORMAT_I8_UNORM 0x145 +#define I965_SURFACEFORMAT_L8_UNORM 0x146 +#define I965_SURFACEFORMAT_P4A4_UNORM 0x147 +#define I965_SURFACEFORMAT_A4P4_UNORM 0x148 +#define I965_SURFACEFORMAT_R8_SSCALED 0x149 +#define I965_SURFACEFORMAT_R8_USCALED 0x14A +#define I965_SURFACEFORMAT_R1_UINT 0x181 +#define I965_SURFACEFORMAT_YCRCB_NORMAL 0x182 +#define I965_SURFACEFORMAT_YCRCB_SWAPUVY 0x183 +#define I965_SURFACEFORMAT_BC1_UNORM 0x186 +#define I965_SURFACEFORMAT_BC2_UNORM 0x187 +#define I965_SURFACEFORMAT_BC3_UNORM 0x188 +#define I965_SURFACEFORMAT_BC4_UNORM 0x189 +#define I965_SURFACEFORMAT_BC5_UNORM 0x18A +#define I965_SURFACEFORMAT_BC1_UNORM_SRGB 0x18B +#define I965_SURFACEFORMAT_BC2_UNORM_SRGB 0x18C +#define I965_SURFACEFORMAT_BC3_UNORM_SRGB 0x18D +#define I965_SURFACEFORMAT_MONO8 0x18E +#define I965_SURFACEFORMAT_YCRCB_SWAPUV 0x18F +#define I965_SURFACEFORMAT_YCRCB_SWAPY 0x190 +#define I965_SURFACEFORMAT_DXT1_RGB 0x191 +#define I965_SURFACEFORMAT_FXT1 0x192 +#define I965_SURFACEFORMAT_R8G8B8_UNORM 0x193 +#define I965_SURFACEFORMAT_R8G8B8_SNORM 0x194 +#define I965_SURFACEFORMAT_R8G8B8_SSCALED 0x195 +#define I965_SURFACEFORMAT_R8G8B8_USCALED 0x196 +#define I965_SURFACEFORMAT_R64G64B64A64_FLOAT 0x197 +#define I965_SURFACEFORMAT_R64G64B64_FLOAT 0x198 +#define I965_SURFACEFORMAT_BC4_SNORM 0x199 +#define I965_SURFACEFORMAT_BC5_SNORM 0x19A +#define I965_SURFACEFORMAT_R16G16B16_UNORM 0x19C +#define I965_SURFACEFORMAT_R16G16B16_SNORM 0x19D +#define I965_SURFACEFORMAT_R16G16B16_SSCALED 0x19E +#define I965_SURFACEFORMAT_R16G16B16_USCALED 0x19F + +#define I965_CULLMODE_BOTH 0 +#define I965_CULLMODE_NONE 1 +#define I965_CULLMODE_FRONT 2 +#define I965_CULLMODE_BACK 3 + +#define I965_MAPFILTER_NEAREST 0x0 +#define I965_MAPFILTER_LINEAR 0x1 +#define I965_MAPFILTER_ANISOTROPIC 0x2 + +#define I965_MIPFILTER_NONE 0 +#define I965_MIPFILTER_NEAREST 1 +#define I965_MIPFILTER_LINEAR 3 + +#define I965_TEXCOORDMODE_WRAP 0 +#define I965_TEXCOORDMODE_MIRROR 1 +#define I965_TEXCOORDMODE_CLAMP 2 +#define I965_TEXCOORDMODE_CUBE 3 +#define I965_TEXCOORDMODE_CLAMP_BORDER 4 +#define I965_TEXCOORDMODE_MIRROR_ONCE 5 + +#define I965_BLENDFACTOR_ONE 0x1 +#define I965_BLENDFACTOR_SRC_COLOR 0x2 +#define I965_BLENDFACTOR_SRC_ALPHA 0x3 +#define I965_BLENDFACTOR_DST_ALPHA 0x4 +#define I965_BLENDFACTOR_DST_COLOR 0x5 +#define I965_BLENDFACTOR_SRC_ALPHA_SATURATE 0x6 +#define I965_BLENDFACTOR_CONST_COLOR 0x7 +#define I965_BLENDFACTOR_CONST_ALPHA 0x8 +#define I965_BLENDFACTOR_SRC1_COLOR 0x9 +#define I965_BLENDFACTOR_SRC1_ALPHA 0x0A +#define I965_BLENDFACTOR_ZERO 0x11 +#define I965_BLENDFACTOR_INV_SRC_COLOR 0x12 +#define I965_BLENDFACTOR_INV_SRC_ALPHA 0x13 +#define I965_BLENDFACTOR_INV_DST_ALPHA 0x14 +#define I965_BLENDFACTOR_INV_DST_COLOR 0x15 +#define I965_BLENDFACTOR_INV_CONST_COLOR 0x17 +#define I965_BLENDFACTOR_INV_CONST_ALPHA 0x18 +#define I965_BLENDFACTOR_INV_SRC1_COLOR 0x19 +#define I965_BLENDFACTOR_INV_SRC1_ALPHA 0x1A + +#define I965_BLENDFUNCTION_ADD 0 +#define I965_BLENDFUNCTION_SUBTRACT 1 +#define I965_BLENDFUNCTION_REVERSE_SUBTRACT 2 +#define I965_BLENDFUNCTION_MIN 3 +#define I965_BLENDFUNCTION_MAX 4 + +#define I965_SURFACERETURNFORMAT_FLOAT32 0 +#define I965_SURFACERETURNFORMAT_S1 1 + +#define I965_VFCOMPONENT_NOSTORE 0 +#define I965_VFCOMPONENT_STORE_SRC 1 +#define I965_VFCOMPONENT_STORE_0 2 +#define I965_VFCOMPONENT_STORE_1_FLT 3 +#define I965_VFCOMPONENT_STORE_1_INT 4 +#define I965_VFCOMPONENT_STORE_VID 5 +#define I965_VFCOMPONENT_STORE_IID 6 +#define I965_VFCOMPONENT_STORE_PID 7 + +#define VE0_VERTEX_BUFFER_INDEX_SHIFT 27 +#define GEN6_VE0_VERTEX_BUFFER_INDEX_SHIFT 26 /* for GEN6 */ +#define VE0_VALID (1 << 26) +#define GEN6_VE0_VALID (1 << 25) /* for GEN6 */ +#define VE0_FORMAT_SHIFT 16 +#define VE0_OFFSET_SHIFT 0 +#define VE1_VFCOMPONENT_0_SHIFT 28 +#define VE1_VFCOMPONENT_1_SHIFT 24 +#define VE1_VFCOMPONENT_2_SHIFT 20 +#define VE1_VFCOMPONENT_3_SHIFT 16 +#define VE1_DESTINATION_ELEMENT_OFFSET_SHIFT 0 + +#define VB0_BUFFER_INDEX_SHIFT 27 +#define GEN6_VB0_BUFFER_INDEX_SHIFT 26 +#define VB0_VERTEXDATA (0 << 26) +#define VB0_INSTANCEDATA (1 << 26) +#define GEN6_VB0_VERTEXDATA (0 << 20) +#define GEN6_VB0_INSTANCEDATA (1 << 20) +#define GEN7_VB0_ADDRESS_MODIFYENABLE (1 << 14) +#define VB0_BUFFER_PITCH_SHIFT 0 + +#define _3DPRIMITIVE_VERTEX_SEQUENTIAL (0 << 15) +#define _3DPRIMITIVE_VERTEX_RANDOM (1 << 15) +#define _3DPRIMITIVE_TOPOLOGY_SHIFT 10 +/* DW1 on GEN7*/ +# define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL (0 << 8) +# define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM (1 << 8) + +#define _3DPRIM_POINTLIST 0x01 +#define _3DPRIM_LINELIST 0x02 +#define _3DPRIM_LINESTRIP 0x03 +#define _3DPRIM_TRILIST 0x04 +#define _3DPRIM_TRISTRIP 0x05 +#define _3DPRIM_TRIFAN 0x06 +#define _3DPRIM_QUADLIST 0x07 +#define _3DPRIM_QUADSTRIP 0x08 +#define _3DPRIM_LINELIST_ADJ 0x09 +#define _3DPRIM_LINESTRIP_ADJ 0x0A +#define _3DPRIM_TRILIST_ADJ 0x0B +#define _3DPRIM_TRISTRIP_ADJ 0x0C +#define _3DPRIM_TRISTRIP_REVERSE 0x0D +#define _3DPRIM_POLYGON 0x0E +#define _3DPRIM_RECTLIST 0x0F +#define _3DPRIM_LINELOOP 0x10 +#define _3DPRIM_POINTLIST_BF 0x11 +#define _3DPRIM_LINESTRIP_CONT 0x12 +#define _3DPRIM_LINESTRIP_BF 0x13 +#define _3DPRIM_LINESTRIP_CONT_BF 0x14 +#define _3DPRIM_TRIFAN_NOSTIPPLE 0x15 + +#define I965_TILEWALK_XMAJOR 0 +#define I965_TILEWALK_YMAJOR 1 + +#define SCAN_RASTER_ORDER 0 +#define SCAN_SPECIAL_ORDER 1 + +#define ENTROPY_CAVLD 0 +#define ENTROPY_CABAC 1 + +#define SLICE_TYPE_P 0 +#define SLICE_TYPE_B 1 +#define SLICE_TYPE_I 2 +#define SLICE_TYPE_SP 3 +#define SLICE_TYPE_SI 4 + +#define PRESENT_REF_LIST0 (1 << 0) +#define PRESENT_REF_LIST1 (1 << 1) +#define PRESENT_WEIGHT_OFFSET_L0 (1 << 2) +#define PRESENT_WEIGHT_OFFSET_L1 (1 << 3) + +#define RESIDUAL_DATA_OFFSET 48 + +#define PRESENT_NOMV 0 +#define PRESENT_NOWO 1 +#define PRESENT_MV_WO 3 + +#define SCOREBOARD_STALLING 0 +#define SCOREBOARD_NON_STALLING 1 + +#define SURFACE_FORMAT_YCRCB_NORMAL 0 +#define SURFACE_FORMAT_YCRCB_SWAPUVY 1 +#define SURFACE_FORMAT_YCRCB_SWAPUV 2 +#define SURFACE_FORMAT_YCRCB_SWAPY 3 +#define SURFACE_FORMAT_PLANAR_420_8 4 +#define SURFACE_FORMAT_PLANAR_411_8 5 +#define SURFACE_FORMAT_PLANAR_422_8 6 +#define SURFACE_FORMAT_STMM_DN_STATISTICS 7 +#define SURFACE_FORMAT_R10G10B10A2_UNORM 8 +#define SURFACE_FORMAT_R8G8B8A8_UNORM 9 +#define SURFACE_FORMAT_R8B8_UNORM 10 +#define SURFACE_FORMAT_R8_UNORM 11 +#define SURFACE_FORMAT_Y8_UNORM 12 + +#define AVS_FILTER_ADAPTIVE_8_TAP 0 +#define AVS_FILTER_NEAREST 1 + +#define IEF_FILTER_COMBO 0 +#define IEF_FILTER_DETAIL 1 + +#define IEF_FILTER_SIZE_3X3 0 +#define IEF_FILTER_SIZE_5X5 1 + +#define MFX_FORMAT_MPEG2 0 +#define MFX_FORMAT_VC1 1 +#define MFX_FORMAT_AVC 2 +#define MFX_FORMAT_JPEG 3 + +#define MFX_SHORT_MODE 0 +#define MFX_LONG_MODE 1 + +#define MFX_CODEC_DECODE 0 +#define MFX_CODEC_ENCODE 1 + +#define MFX_QM_AVC_4X4_INTRA_MATRIX 0 +#define MFX_QM_AVC_4X4_INTER_MATRIX 1 +#define MFX_QM_AVC_8x8_INTRA_MATRIX 2 +#define MFX_QM_AVC_8x8_INTER_MATRIX 3 + +#define MFX_QM_MPEG_INTRA_QUANTIZER_MATRIX 0 +#define MFX_QM_MPEG_NON_INTRA_QUANTIZER_MATRIX 1 + +#define MFX_QM_JPEG_LUMA_Y_QUANTIZER_MATRIX 0 +#define MFX_QM_JPEG_CHROMA_CB_QUANTIZER_MATRIX 1 +#define MFX_QM_JPEG_CHROMA_CR_QUANTIZER_MATRIX 2 + +#define MFD_MODE_VLD 0 +#define MFD_MODE_IT 1 + +#define MFX_SURFACE_PLANAR_420_8 4 +#define MFX_SURFACE_MONOCHROME 12 + +#define MPEG_TOP_FIELD 1 +#define MPEG_BOTTOM_FIELD 2 +#define MPEG_FRAME 3 + +#define URB_SIZE(intel) (IS_GEN7(intel->device_id) ? 4096 : \ + IS_GEN6(intel->device_id) ? 1024 : \ + IS_IRONLAKE(intel->device_id) ? 1024 : \ + IS_G4X(intel->device_id) ? 384 : 256) + +#endif /* _I965_DEFINES_H_ */ diff --git a/src/i965_drv_video.c b/src/i965_drv_video.c new file mode 100644 index 00000000..72f82b7b --- /dev/null +++ b/src/i965_drv_video.c @@ -0,0 +1,2626 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao <haihao.xiang@intel.com> + * Zou Nan hai <nanhai.zou@intel.com> + * + */ + +#include "config.h" +#include <stdlib.h> +#include <string.h> +#include <assert.h> + +#include "va/x11/va_dricommon.h" + +#include "intel_driver.h" +#include "intel_memman.h" +#include "intel_batchbuffer.h" +#include "i965_defines.h" +#include "i965_drv_video.h" + +#define CONFIG_ID_OFFSET 0x01000000 +#define CONTEXT_ID_OFFSET 0x02000000 +#define SURFACE_ID_OFFSET 0x04000000 +#define BUFFER_ID_OFFSET 0x08000000 +#define IMAGE_ID_OFFSET 0x0a000000 +#define SUBPIC_ID_OFFSET 0x10000000 + +#define HAS_MPEG2(ctx) (IS_G4X((ctx)->intel.device_id) || \ + IS_IRONLAKE((ctx)->intel.device_id) || \ + ((IS_GEN6((ctx)->intel.device_id) || \ + IS_GEN7((ctx)->intel.device_id)) && \ + (ctx)->intel.has_bsd)) + +#define HAS_H264(ctx) ((IS_GEN7((ctx)->intel.device_id) || \ + IS_GEN6((ctx)->intel.device_id) || \ + IS_IRONLAKE((ctx)->intel.device_id)) && \ + (ctx)->intel.has_bsd) + +#define HAS_VC1(ctx) ((IS_GEN7((ctx)->intel.device_id) || \ + IS_GEN6((ctx)->intel.device_id)) && \ + (ctx)->intel.has_bsd) + +#define HAS_TILED_SURFACE(ctx) ((IS_GEN7((ctx)->intel.device_id) || \ + IS_GEN6((ctx)->intel.device_id)) && \ + (ctx)->render_state.interleaved_uv) + +#define HAS_ENCODER(ctx) ((IS_GEN7((ctx)->intel.device_id) || \ + IS_GEN6((ctx)->intel.device_id)) && \ + (ctx)->intel.has_bsd) + +enum { + I965_SURFACETYPE_RGBA = 1, + I965_SURFACETYPE_YUV, + I965_SURFACETYPE_INDEXED +}; + +/* List of supported image formats */ +typedef struct { + unsigned int type; + VAImageFormat va_format; +} i965_image_format_map_t; + +static const i965_image_format_map_t +i965_image_formats_map[I965_MAX_IMAGE_FORMATS + 1] = { + { I965_SURFACETYPE_YUV, + { VA_FOURCC('Y','V','1','2'), VA_LSB_FIRST, 12, } }, + { I965_SURFACETYPE_YUV, + { VA_FOURCC('I','4','2','0'), VA_LSB_FIRST, 12, } }, + { I965_SURFACETYPE_YUV, + { VA_FOURCC('N','V','1','2'), VA_LSB_FIRST, 12, } }, +}; + +/* List of supported subpicture formats */ +typedef struct { + unsigned int type; + unsigned int format; + VAImageFormat va_format; + unsigned int va_flags; +} i965_subpic_format_map_t; + +static const i965_subpic_format_map_t +i965_subpic_formats_map[I965_MAX_SUBPIC_FORMATS + 1] = { + { I965_SURFACETYPE_INDEXED, I965_SURFACEFORMAT_P4A4_UNORM, + { VA_FOURCC('I','A','4','4'), VA_MSB_FIRST, 8, }, + VA_SUBPICTURE_DESTINATION_IS_SCREEN_COORD }, + { I965_SURFACETYPE_INDEXED, I965_SURFACEFORMAT_A4P4_UNORM, + { VA_FOURCC('A','I','4','4'), VA_MSB_FIRST, 8, }, + VA_SUBPICTURE_DESTINATION_IS_SCREEN_COORD }, + { I965_SURFACETYPE_RGBA, I965_SURFACEFORMAT_B8G8R8A8_UNORM, + { VA_FOURCC('B','G','R','A'), VA_LSB_FIRST, 32, + 32, 0x00ff0000, 0x0000ff00, 0x000000ff, 0xff000000 }, + VA_SUBPICTURE_DESTINATION_IS_SCREEN_COORD }, + { I965_SURFACETYPE_RGBA, I965_SURFACEFORMAT_R8G8B8A8_UNORM, + { VA_FOURCC('R','G','B','A'), VA_LSB_FIRST, 32, + 32, 0x000000ff, 0x0000ff00, 0x00ff0000, 0xff000000 }, + VA_SUBPICTURE_DESTINATION_IS_SCREEN_COORD }, +}; + +static const i965_subpic_format_map_t * +get_subpic_format(const VAImageFormat *va_format) +{ + unsigned int i; + for (i = 0; i965_subpic_formats_map[i].type != 0; i++) { + const i965_subpic_format_map_t * const m = &i965_subpic_formats_map[i]; + if (m->va_format.fourcc == va_format->fourcc && + (m->type == I965_SURFACETYPE_RGBA ? + (m->va_format.byte_order == va_format->byte_order && + m->va_format.red_mask == va_format->red_mask && + m->va_format.green_mask == va_format->green_mask && + m->va_format.blue_mask == va_format->blue_mask && + m->va_format.alpha_mask == va_format->alpha_mask) : 1)) + return m; + } + return NULL; +} + +extern struct hw_context *g4x_dec_hw_context_init(VADriverContextP, VAProfile); +static struct hw_codec_info g4x_hw_codec_info = { + .dec_hw_context_init = g4x_dec_hw_context_init, + .enc_hw_context_init = NULL, +}; + +extern struct hw_context *ironlake_dec_hw_context_init(VADriverContextP, VAProfile); +static struct hw_codec_info ironlake_hw_codec_info = { + .dec_hw_context_init = ironlake_dec_hw_context_init, + .enc_hw_context_init = NULL, +}; + +extern struct hw_context *gen6_dec_hw_context_init(VADriverContextP, VAProfile); +extern struct hw_context *gen6_enc_hw_context_init(VADriverContextP, VAProfile); +static struct hw_codec_info gen6_hw_codec_info = { + .dec_hw_context_init = gen6_dec_hw_context_init, + .enc_hw_context_init = gen6_enc_hw_context_init, +}; + +extern struct hw_context *gen7_dec_hw_context_init(VADriverContextP, VAProfile); +static struct hw_codec_info gen7_hw_codec_info = { + .dec_hw_context_init = gen7_dec_hw_context_init, + .enc_hw_context_init = gen6_enc_hw_context_init, +}; + +VAStatus +i965_QueryConfigProfiles(VADriverContextP ctx, + VAProfile *profile_list, /* out */ + int *num_profiles) /* out */ +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + int i = 0; + + if (HAS_MPEG2(i965)) { + profile_list[i++] = VAProfileMPEG2Simple; + profile_list[i++] = VAProfileMPEG2Main; + } + + if (HAS_H264(i965)) { + profile_list[i++] = VAProfileH264Baseline; + profile_list[i++] = VAProfileH264Main; + profile_list[i++] = VAProfileH264High; + } + + if (HAS_VC1(i965)) { + profile_list[i++] = VAProfileVC1Simple; + profile_list[i++] = VAProfileVC1Main; + profile_list[i++] = VAProfileVC1Advanced; + } + + /* If the assert fails then I965_MAX_PROFILES needs to be bigger */ + assert(i <= I965_MAX_PROFILES); + *num_profiles = i; + + return VA_STATUS_SUCCESS; +} + +VAStatus +i965_QueryConfigEntrypoints(VADriverContextP ctx, + VAProfile profile, + VAEntrypoint *entrypoint_list, /* out */ + int *num_entrypoints) /* out */ +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + int n = 0; + + switch (profile) { + case VAProfileMPEG2Simple: + case VAProfileMPEG2Main: + if (HAS_MPEG2(i965)) + entrypoint_list[n++] = VAEntrypointVLD; + break; + + case VAProfileH264Baseline: + case VAProfileH264Main: + case VAProfileH264High: + if (HAS_H264(i965)) + entrypoint_list[n++] = VAEntrypointVLD; + + if (HAS_ENCODER(i965)) + entrypoint_list[n++] = VAEntrypointEncSlice; + + break; + + case VAProfileVC1Simple: + case VAProfileVC1Main: + case VAProfileVC1Advanced: + if (HAS_VC1(i965)) + entrypoint_list[n++] = VAEntrypointVLD; + break; + + default: + break; + } + + /* If the assert fails then I965_MAX_ENTRYPOINTS needs to be bigger */ + assert(n <= I965_MAX_ENTRYPOINTS); + *num_entrypoints = n; + return n > 0 ? VA_STATUS_SUCCESS : VA_STATUS_ERROR_UNSUPPORTED_PROFILE; +} + +VAStatus +i965_GetConfigAttributes(VADriverContextP ctx, + VAProfile profile, + VAEntrypoint entrypoint, + VAConfigAttrib *attrib_list, /* in/out */ + int num_attribs) +{ + int i; + + /* Other attributes don't seem to be defined */ + /* What to do if we don't know the attribute? */ + for (i = 0; i < num_attribs; i++) { + switch (attrib_list[i].type) { + case VAConfigAttribRTFormat: + attrib_list[i].value = VA_RT_FORMAT_YUV420; + break; + + case VAConfigAttribRateControl: + attrib_list[i].value = VA_RC_VBR; + break; + + default: + /* Do nothing */ + attrib_list[i].value = VA_ATTRIB_NOT_SUPPORTED; + break; + } + } + + return VA_STATUS_SUCCESS; +} + +static void +i965_destroy_config(struct object_heap *heap, struct object_base *obj) +{ + object_heap_free(heap, obj); +} + +static VAStatus +i965_update_attribute(struct object_config *obj_config, VAConfigAttrib *attrib) +{ + int i; + + /* Check existing attrbiutes */ + for (i = 0; obj_config->num_attribs < i; i++) { + if (obj_config->attrib_list[i].type == attrib->type) { + /* Update existing attribute */ + obj_config->attrib_list[i].value = attrib->value; + return VA_STATUS_SUCCESS; + } + } + + if (obj_config->num_attribs < I965_MAX_CONFIG_ATTRIBUTES) { + i = obj_config->num_attribs; + obj_config->attrib_list[i].type = attrib->type; + obj_config->attrib_list[i].value = attrib->value; + obj_config->num_attribs++; + return VA_STATUS_SUCCESS; + } + + return VA_STATUS_ERROR_MAX_NUM_EXCEEDED; +} + +VAStatus +i965_CreateConfig(VADriverContextP ctx, + VAProfile profile, + VAEntrypoint entrypoint, + VAConfigAttrib *attrib_list, + int num_attribs, + VAConfigID *config_id) /* out */ +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + struct object_config *obj_config; + int configID; + int i; + VAStatus vaStatus; + + /* Validate profile & entrypoint */ + switch (profile) { + case VAProfileMPEG2Simple: + case VAProfileMPEG2Main: + if (HAS_MPEG2(i965) && VAEntrypointVLD == entrypoint) { + vaStatus = VA_STATUS_SUCCESS; + } else { + vaStatus = VA_STATUS_ERROR_UNSUPPORTED_ENTRYPOINT; + } + break; + + case VAProfileH264Baseline: + case VAProfileH264Main: + case VAProfileH264High: + if ((HAS_H264(i965) && VAEntrypointVLD == entrypoint) || + (HAS_ENCODER(i965) && VAEntrypointEncSlice == entrypoint)) { + vaStatus = VA_STATUS_SUCCESS; + } else { + vaStatus = VA_STATUS_ERROR_UNSUPPORTED_ENTRYPOINT; + } + + break; + + case VAProfileVC1Simple: + case VAProfileVC1Main: + case VAProfileVC1Advanced: + if (HAS_VC1(i965) && VAEntrypointVLD == entrypoint) { + vaStatus = VA_STATUS_SUCCESS; + } else { + vaStatus = VA_STATUS_ERROR_UNSUPPORTED_ENTRYPOINT; + } + + break; + + default: + vaStatus = VA_STATUS_ERROR_UNSUPPORTED_PROFILE; + break; + } + + if (VA_STATUS_SUCCESS != vaStatus) { + return vaStatus; + } + + configID = NEW_CONFIG_ID(); + obj_config = CONFIG(configID); + + if (NULL == obj_config) { + vaStatus = VA_STATUS_ERROR_ALLOCATION_FAILED; + return vaStatus; + } + + obj_config->profile = profile; + obj_config->entrypoint = entrypoint; + obj_config->attrib_list[0].type = VAConfigAttribRTFormat; + obj_config->attrib_list[0].value = VA_RT_FORMAT_YUV420; + obj_config->num_attribs = 1; + + for(i = 0; i < num_attribs; i++) { + vaStatus = i965_update_attribute(obj_config, &(attrib_list[i])); + + if (VA_STATUS_SUCCESS != vaStatus) { + break; + } + } + + /* Error recovery */ + if (VA_STATUS_SUCCESS != vaStatus) { + i965_destroy_config(&i965->config_heap, (struct object_base *)obj_config); + } else { + *config_id = configID; + } + + return vaStatus; +} + +VAStatus +i965_DestroyConfig(VADriverContextP ctx, VAConfigID config_id) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_config *obj_config = CONFIG(config_id); + VAStatus vaStatus; + + if (NULL == obj_config) { + vaStatus = VA_STATUS_ERROR_INVALID_CONFIG; + return vaStatus; + } + + i965_destroy_config(&i965->config_heap, (struct object_base *)obj_config); + return VA_STATUS_SUCCESS; +} + +VAStatus i965_QueryConfigAttributes(VADriverContextP ctx, + VAConfigID config_id, + VAProfile *profile, /* out */ + VAEntrypoint *entrypoint, /* out */ + VAConfigAttrib *attrib_list, /* out */ + int *num_attribs) /* out */ +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_config *obj_config = CONFIG(config_id); + VAStatus vaStatus = VA_STATUS_SUCCESS; + int i; + + assert(obj_config); + *profile = obj_config->profile; + *entrypoint = obj_config->entrypoint; + *num_attribs = obj_config->num_attribs; + + for(i = 0; i < obj_config->num_attribs; i++) { + attrib_list[i] = obj_config->attrib_list[i]; + } + + return vaStatus; +} + +static void +i965_destroy_surface(struct object_heap *heap, struct object_base *obj) +{ + struct object_surface *obj_surface = (struct object_surface *)obj; + + dri_bo_unreference(obj_surface->bo); + obj_surface->bo = NULL; + + if (obj_surface->free_private_data != NULL) { + obj_surface->free_private_data(&obj_surface->private_data); + obj_surface->private_data = NULL; + } + + object_heap_free(heap, obj); +} + +VAStatus +i965_CreateSurfaces(VADriverContextP ctx, + int width, + int height, + int format, + int num_surfaces, + VASurfaceID *surfaces) /* out */ +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + int i; + VAStatus vaStatus = VA_STATUS_SUCCESS; + + /* We only support one format */ + if (VA_RT_FORMAT_YUV420 != format) { + return VA_STATUS_ERROR_UNSUPPORTED_RT_FORMAT; + } + + for (i = 0; i < num_surfaces; i++) { + int surfaceID = NEW_SURFACE_ID(); + struct object_surface *obj_surface = SURFACE(surfaceID); + + if (NULL == obj_surface) { + vaStatus = VA_STATUS_ERROR_ALLOCATION_FAILED; + break; + } + + surfaces[i] = surfaceID; + obj_surface->status = VASurfaceReady; + obj_surface->subpic = VA_INVALID_ID; + obj_surface->orig_width = width; + obj_surface->orig_height = height; + + if (IS_GEN6(i965->intel.device_id) || + IS_GEN7(i965->intel.device_id)) { + obj_surface->width = ALIGN(obj_surface->orig_width, 128); + obj_surface->height = ALIGN(obj_surface->orig_height, 32); + } else { + obj_surface->width = ALIGN(obj_surface->orig_width, 16); + obj_surface->height = ALIGN(obj_surface->orig_height, 16); + } + + obj_surface->size = SIZE_YUV420(obj_surface->width, obj_surface->height); + obj_surface->flags = SURFACE_REFERENCED; + obj_surface->fourcc = 0; + obj_surface->bo = NULL; + obj_surface->locked_image_id = VA_INVALID_ID; + obj_surface->private_data = NULL; + obj_surface->free_private_data = NULL; + } + + /* Error recovery */ + if (VA_STATUS_SUCCESS != vaStatus) { + /* surfaces[i-1] was the last successful allocation */ + for (; i--; ) { + struct object_surface *obj_surface = SURFACE(surfaces[i]); + + surfaces[i] = VA_INVALID_SURFACE; + assert(obj_surface); + i965_destroy_surface(&i965->surface_heap, (struct object_base *)obj_surface); + } + } + + return vaStatus; +} + +VAStatus +i965_DestroySurfaces(VADriverContextP ctx, + VASurfaceID *surface_list, + int num_surfaces) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + int i; + + for (i = num_surfaces; i--; ) { + struct object_surface *obj_surface = SURFACE(surface_list[i]); + + assert(obj_surface); + i965_destroy_surface(&i965->surface_heap, (struct object_base *)obj_surface); + } + + return VA_STATUS_SUCCESS; +} + +VAStatus +i965_QueryImageFormats(VADriverContextP ctx, + VAImageFormat *format_list, /* out */ + int *num_formats) /* out */ +{ + int n; + + for (n = 0; i965_image_formats_map[n].va_format.fourcc != 0; n++) { + const i965_image_format_map_t * const m = &i965_image_formats_map[n]; + if (format_list) + format_list[n] = m->va_format; + } + + if (num_formats) + *num_formats = n; + + return VA_STATUS_SUCCESS; +} + +VAStatus +i965_PutImage(VADriverContextP ctx, + VASurfaceID surface, + VAImageID image, + int src_x, + int src_y, + unsigned int src_width, + unsigned int src_height, + int dest_x, + int dest_y, + unsigned int dest_width, + unsigned int dest_height) +{ + return VA_STATUS_SUCCESS; +} + +VAStatus +i965_QuerySubpictureFormats(VADriverContextP ctx, + VAImageFormat *format_list, /* out */ + unsigned int *flags, /* out */ + unsigned int *num_formats) /* out */ +{ + int n; + + for (n = 0; i965_subpic_formats_map[n].va_format.fourcc != 0; n++) { + const i965_subpic_format_map_t * const m = &i965_subpic_formats_map[n]; + if (format_list) + format_list[n] = m->va_format; + if (flags) + flags[n] = m->va_flags; + } + + if (num_formats) + *num_formats = n; + + return VA_STATUS_SUCCESS; +} + +static void +i965_destroy_subpic(struct object_heap *heap, struct object_base *obj) +{ + // struct object_subpic *obj_subpic = (struct object_subpic *)obj; + + object_heap_free(heap, obj); +} + +VAStatus +i965_CreateSubpicture(VADriverContextP ctx, + VAImageID image, + VASubpictureID *subpicture) /* out */ +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + VASubpictureID subpicID = NEW_SUBPIC_ID() + struct object_subpic *obj_subpic = SUBPIC(subpicID); + + if (!obj_subpic) + return VA_STATUS_ERROR_ALLOCATION_FAILED; + + struct object_image *obj_image = IMAGE(image); + if (!obj_image) + return VA_STATUS_ERROR_INVALID_IMAGE; + + const i965_subpic_format_map_t * const m = get_subpic_format(&obj_image->image.format); + if (!m) + return VA_STATUS_ERROR_UNKNOWN; /* XXX: VA_STATUS_ERROR_UNSUPPORTED_FORMAT? */ + + *subpicture = subpicID; + obj_subpic->image = image; + obj_subpic->format = m->format; + obj_subpic->width = obj_image->image.width; + obj_subpic->height = obj_image->image.height; + obj_subpic->pitch = obj_image->image.pitches[0]; + obj_subpic->bo = obj_image->bo; + return VA_STATUS_SUCCESS; +} + +VAStatus +i965_DestroySubpicture(VADriverContextP ctx, + VASubpictureID subpicture) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_subpic *obj_subpic = SUBPIC(subpicture); + i965_destroy_subpic(&i965->subpic_heap, (struct object_base *)obj_subpic); + return VA_STATUS_SUCCESS; +} + +VAStatus +i965_SetSubpictureImage(VADriverContextP ctx, + VASubpictureID subpicture, + VAImageID image) +{ + /* TODO */ + return VA_STATUS_ERROR_UNIMPLEMENTED; +} + +VAStatus +i965_SetSubpictureChromakey(VADriverContextP ctx, + VASubpictureID subpicture, + unsigned int chromakey_min, + unsigned int chromakey_max, + unsigned int chromakey_mask) +{ + /* TODO */ + return VA_STATUS_ERROR_UNIMPLEMENTED; +} + +VAStatus +i965_SetSubpictureGlobalAlpha(VADriverContextP ctx, + VASubpictureID subpicture, + float global_alpha) +{ + /* TODO */ + return VA_STATUS_ERROR_UNIMPLEMENTED; +} + +VAStatus +i965_AssociateSubpicture(VADriverContextP ctx, + VASubpictureID subpicture, + VASurfaceID *target_surfaces, + int num_surfaces, + short src_x, /* upper left offset in subpicture */ + short src_y, + unsigned short src_width, + unsigned short src_height, + short dest_x, /* upper left offset in surface */ + short dest_y, + unsigned short dest_width, + unsigned short dest_height, + /* + * whether to enable chroma-keying or global-alpha + * see VA_SUBPICTURE_XXX values + */ + unsigned int flags) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_subpic *obj_subpic = SUBPIC(subpicture); + int i; + + obj_subpic->src_rect.x = src_x; + obj_subpic->src_rect.y = src_y; + obj_subpic->src_rect.width = src_width; + obj_subpic->src_rect.height = src_height; + obj_subpic->dst_rect.x = dest_x; + obj_subpic->dst_rect.y = dest_y; + obj_subpic->dst_rect.width = dest_width; + obj_subpic->dst_rect.height = dest_height; + obj_subpic->flags = flags; + + for (i = 0; i < num_surfaces; i++) { + struct object_surface *obj_surface = SURFACE(target_surfaces[i]); + if (!obj_surface) + return VA_STATUS_ERROR_INVALID_SURFACE; + obj_surface->subpic = subpicture; + } + return VA_STATUS_SUCCESS; +} + + +VAStatus +i965_DeassociateSubpicture(VADriverContextP ctx, + VASubpictureID subpicture, + VASurfaceID *target_surfaces, + int num_surfaces) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + int i; + + for (i = 0; i < num_surfaces; i++) { + struct object_surface *obj_surface = SURFACE(target_surfaces[i]); + if (!obj_surface) + return VA_STATUS_ERROR_INVALID_SURFACE; + if (obj_surface->subpic == subpicture) + obj_surface->subpic = VA_INVALID_ID; + } + return VA_STATUS_SUCCESS; +} + +void +i965_reference_buffer_store(struct buffer_store **ptr, + struct buffer_store *buffer_store) +{ + assert(*ptr == NULL); + + if (buffer_store) { + buffer_store->ref_count++; + *ptr = buffer_store; + } +} + +void +i965_release_buffer_store(struct buffer_store **ptr) +{ + struct buffer_store *buffer_store = *ptr; + + if (buffer_store == NULL) + return; + + assert(buffer_store->bo || buffer_store->buffer); + assert(!(buffer_store->bo && buffer_store->buffer)); + buffer_store->ref_count--; + + if (buffer_store->ref_count == 0) { + dri_bo_unreference(buffer_store->bo); + free(buffer_store->buffer); + buffer_store->bo = NULL; + buffer_store->buffer = NULL; + free(buffer_store); + } + + *ptr = NULL; +} + +static void +i965_destroy_context(struct object_heap *heap, struct object_base *obj) +{ + struct object_context *obj_context = (struct object_context *)obj; + int i; + + if (obj_context->hw_context) { + obj_context->hw_context->destroy(obj_context->hw_context); + obj_context->hw_context = NULL; + } + + if (obj_context->codec_type == CODEC_ENC) { + assert(obj_context->codec_state.enc.num_slice_params <= obj_context->codec_state.enc.max_slice_params); + i965_release_buffer_store(&obj_context->codec_state.enc.pic_param); + i965_release_buffer_store(&obj_context->codec_state.enc.seq_param); + } else { + assert(obj_context->codec_state.dec.num_slice_params <= obj_context->codec_state.dec.max_slice_params); + assert(obj_context->codec_state.dec.num_slice_datas <= obj_context->codec_state.dec.max_slice_datas); + + i965_release_buffer_store(&obj_context->codec_state.dec.pic_param); + i965_release_buffer_store(&obj_context->codec_state.dec.iq_matrix); + i965_release_buffer_store(&obj_context->codec_state.dec.bit_plane); + + for (i = 0; i < obj_context->codec_state.dec.num_slice_params; i++) + i965_release_buffer_store(&obj_context->codec_state.dec.slice_params[i]); + + for (i = 0; i < obj_context->codec_state.dec.num_slice_datas; i++) + i965_release_buffer_store(&obj_context->codec_state.dec.slice_datas[i]); + + free(obj_context->codec_state.dec.slice_params); + free(obj_context->codec_state.dec.slice_datas); + } + + free(obj_context->render_targets); + object_heap_free(heap, obj); +} + +VAStatus +i965_CreateContext(VADriverContextP ctx, + VAConfigID config_id, + int picture_width, + int picture_height, + int flag, + VASurfaceID *render_targets, + int num_render_targets, + VAContextID *context) /* out */ +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct object_config *obj_config = CONFIG(config_id); + struct object_context *obj_context = NULL; + VAStatus vaStatus = VA_STATUS_SUCCESS; + int contextID; + int i; + + if (NULL == obj_config) { + vaStatus = VA_STATUS_ERROR_INVALID_CONFIG; + return vaStatus; + } + + /* Validate flag */ + /* Validate picture dimensions */ + contextID = NEW_CONTEXT_ID(); + obj_context = CONTEXT(contextID); + + if (NULL == obj_context) { + vaStatus = VA_STATUS_ERROR_ALLOCATION_FAILED; + return vaStatus; + } + + render_state->inited = 1; + + switch (obj_config->profile) { + case VAProfileH264Baseline: + case VAProfileH264Main: + case VAProfileH264High: + if (!HAS_H264(i965)) + return VA_STATUS_ERROR_UNSUPPORTED_PROFILE; + render_state->interleaved_uv = 1; + break; + default: + render_state->interleaved_uv = !!(IS_GEN6(i965->intel.device_id) || IS_GEN7(i965->intel.device_id)); + break; + } + + *context = contextID; + obj_context->flags = flag; + obj_context->context_id = contextID; + obj_context->config_id = config_id; + obj_context->picture_width = picture_width; + obj_context->picture_height = picture_height; + obj_context->num_render_targets = num_render_targets; + obj_context->render_targets = + (VASurfaceID *)calloc(num_render_targets, sizeof(VASurfaceID)); + obj_context->hw_context = NULL; + + for(i = 0; i < num_render_targets; i++) { + if (NULL == SURFACE(render_targets[i])) { + vaStatus = VA_STATUS_ERROR_INVALID_SURFACE; + break; + } + + obj_context->render_targets[i] = render_targets[i]; + } + + if (VA_STATUS_SUCCESS == vaStatus) { + if (VAEntrypointEncSlice == obj_config->entrypoint ) { /*encode routin only*/ + obj_context->codec_type = CODEC_ENC; + memset(&obj_context->codec_state.enc, 0, sizeof(obj_context->codec_state.enc)); + obj_context->codec_state.enc.current_render_target = VA_INVALID_ID; + obj_context->codec_state.enc.max_slice_params = NUM_SLICES; + obj_context->codec_state.enc.slice_params = calloc(obj_context->codec_state.enc.max_slice_params, + sizeof(*obj_context->codec_state.enc.slice_params)); + assert(i965->codec_info->enc_hw_context_init); + obj_context->hw_context = i965->codec_info->enc_hw_context_init(ctx, obj_config->profile); + } else { + obj_context->codec_type = CODEC_DEC; + memset(&obj_context->codec_state.dec, 0, sizeof(obj_context->codec_state.dec)); + obj_context->codec_state.dec.current_render_target = -1; + obj_context->codec_state.dec.max_slice_params = NUM_SLICES; + obj_context->codec_state.dec.max_slice_datas = NUM_SLICES; + obj_context->codec_state.dec.slice_params = calloc(obj_context->codec_state.dec.max_slice_params, + sizeof(*obj_context->codec_state.dec.slice_params)); + obj_context->codec_state.dec.slice_datas = calloc(obj_context->codec_state.dec.max_slice_datas, + sizeof(*obj_context->codec_state.dec.slice_datas)); + + assert(i965->codec_info->dec_hw_context_init); + obj_context->hw_context = i965->codec_info->dec_hw_context_init(ctx, obj_config->profile); + } + } + + /* Error recovery */ + if (VA_STATUS_SUCCESS != vaStatus) { + i965_destroy_context(&i965->context_heap, (struct object_base *)obj_context); + } + + return vaStatus; +} + +VAStatus +i965_DestroyContext(VADriverContextP ctx, VAContextID context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_context *obj_context = CONTEXT(context); + + assert(obj_context); + i965_destroy_context(&i965->context_heap, (struct object_base *)obj_context); + + return VA_STATUS_SUCCESS; +} + +static void +i965_destroy_buffer(struct object_heap *heap, struct object_base *obj) +{ + struct object_buffer *obj_buffer = (struct object_buffer *)obj; + + assert(obj_buffer->buffer_store); + i965_release_buffer_store(&obj_buffer->buffer_store); + object_heap_free(heap, obj); +} + +static VAStatus +i965_create_buffer_internal(VADriverContextP ctx, + VAContextID context, + VABufferType type, + unsigned int size, + unsigned int num_elements, + void *data, + dri_bo *store_bo, + VABufferID *buf_id) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_buffer *obj_buffer = NULL; + struct buffer_store *buffer_store = NULL; + int bufferID; + + /* Validate type */ + switch (type) { + case VAPictureParameterBufferType: + case VAIQMatrixBufferType: + case VABitPlaneBufferType: + case VASliceGroupMapBufferType: + case VASliceParameterBufferType: + case VASliceDataBufferType: + case VAMacroblockParameterBufferType: + case VAResidualDataBufferType: + case VADeblockingParameterBufferType: + case VAImageBufferType: + case VAEncCodedBufferType: + case VAEncSequenceParameterBufferType: + case VAEncPictureParameterBufferType: + case VAEncSliceParameterBufferType: + /* Ok */ + break; + + default: + return VA_STATUS_ERROR_UNSUPPORTED_BUFFERTYPE; + } + + bufferID = NEW_BUFFER_ID(); + obj_buffer = BUFFER(bufferID); + + if (NULL == obj_buffer) { + return VA_STATUS_ERROR_ALLOCATION_FAILED; + } + + if (type == VAEncCodedBufferType) { + size += ALIGN(sizeof(VACodedBufferSegment), 64); + } + + obj_buffer->max_num_elements = num_elements; + obj_buffer->num_elements = num_elements; + obj_buffer->size_element = size; + obj_buffer->type = type; + obj_buffer->buffer_store = NULL; + buffer_store = calloc(1, sizeof(struct buffer_store)); + assert(buffer_store); + buffer_store->ref_count = 1; + + if (store_bo != NULL) { + buffer_store->bo = store_bo; + dri_bo_reference(buffer_store->bo); + + if (data) + dri_bo_subdata(buffer_store->bo, 0, size * num_elements, data); + } else if (type == VASliceDataBufferType || type == VAImageBufferType || type == VAEncCodedBufferType) { + buffer_store->bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + size * num_elements, 64); + assert(buffer_store->bo); + + if (type == VAEncCodedBufferType) { + VACodedBufferSegment *coded_buffer_segment; + dri_bo_map(buffer_store->bo, 1); + coded_buffer_segment = (VACodedBufferSegment *)buffer_store->bo->virtual; + coded_buffer_segment->size = size - ALIGN(sizeof(VACodedBufferSegment), 64); + coded_buffer_segment->bit_offset = 0; + coded_buffer_segment->status = 0; + coded_buffer_segment->buf = NULL; + coded_buffer_segment->next = NULL; + dri_bo_unmap(buffer_store->bo); + } else if (data) { + dri_bo_subdata(buffer_store->bo, 0, size * num_elements, data); + } + + } else { + buffer_store->buffer = malloc(size * num_elements); + assert(buffer_store->buffer); + + if (data) + memcpy(buffer_store->buffer, data, size * num_elements); + } + + buffer_store->num_elements = obj_buffer->num_elements; + i965_reference_buffer_store(&obj_buffer->buffer_store, buffer_store); + i965_release_buffer_store(&buffer_store); + *buf_id = bufferID; + + return VA_STATUS_SUCCESS; +} + +VAStatus +i965_CreateBuffer(VADriverContextP ctx, + VAContextID context, /* in */ + VABufferType type, /* in */ + unsigned int size, /* in */ + unsigned int num_elements, /* in */ + void *data, /* in */ + VABufferID *buf_id) /* out */ +{ + return i965_create_buffer_internal(ctx, context, type, size, num_elements, data, NULL, buf_id); +} + + +VAStatus +i965_BufferSetNumElements(VADriverContextP ctx, + VABufferID buf_id, /* in */ + unsigned int num_elements) /* in */ +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_buffer *obj_buffer = BUFFER(buf_id); + VAStatus vaStatus = VA_STATUS_SUCCESS; + + assert(obj_buffer); + + if ((num_elements < 0) || + (num_elements > obj_buffer->max_num_elements)) { + vaStatus = VA_STATUS_ERROR_UNKNOWN; + } else { + obj_buffer->num_elements = num_elements; + if (obj_buffer->buffer_store != NULL) { + obj_buffer->buffer_store->num_elements = num_elements; + } + } + + return vaStatus; +} + +VAStatus +i965_MapBuffer(VADriverContextP ctx, + VABufferID buf_id, /* in */ + void **pbuf) /* out */ +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_buffer *obj_buffer = BUFFER(buf_id); + VAStatus vaStatus = VA_STATUS_ERROR_UNKNOWN; + + assert(obj_buffer && obj_buffer->buffer_store); + assert(obj_buffer->buffer_store->bo || obj_buffer->buffer_store->buffer); + assert(!(obj_buffer->buffer_store->bo && obj_buffer->buffer_store->buffer)); + + if (NULL != obj_buffer->buffer_store->bo) { + unsigned int tiling, swizzle; + + dri_bo_get_tiling(obj_buffer->buffer_store->bo, &tiling, &swizzle); + + if (tiling != I915_TILING_NONE) + drm_intel_gem_bo_map_gtt(obj_buffer->buffer_store->bo); + else + dri_bo_map(obj_buffer->buffer_store->bo, 1); + + assert(obj_buffer->buffer_store->bo->virtual); + *pbuf = obj_buffer->buffer_store->bo->virtual; + + if (obj_buffer->type == VAEncCodedBufferType) { + VACodedBufferSegment *coded_buffer_segment = (VACodedBufferSegment *)(obj_buffer->buffer_store->bo->virtual); + coded_buffer_segment->buf = (unsigned char *)(obj_buffer->buffer_store->bo->virtual) + ALIGN(sizeof(VACodedBufferSegment), 64); + } + + vaStatus = VA_STATUS_SUCCESS; + } else if (NULL != obj_buffer->buffer_store->buffer) { + *pbuf = obj_buffer->buffer_store->buffer; + vaStatus = VA_STATUS_SUCCESS; + } + + return vaStatus; +} + +VAStatus +i965_UnmapBuffer(VADriverContextP ctx, VABufferID buf_id) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_buffer *obj_buffer = BUFFER(buf_id); + VAStatus vaStatus = VA_STATUS_ERROR_UNKNOWN; + + assert(obj_buffer && obj_buffer->buffer_store); + assert(obj_buffer->buffer_store->bo || obj_buffer->buffer_store->buffer); + assert(!(obj_buffer->buffer_store->bo && obj_buffer->buffer_store->buffer)); + + if (NULL != obj_buffer->buffer_store->bo) { + unsigned int tiling, swizzle; + + dri_bo_get_tiling(obj_buffer->buffer_store->bo, &tiling, &swizzle); + + if (tiling != I915_TILING_NONE) + drm_intel_gem_bo_unmap_gtt(obj_buffer->buffer_store->bo); + else + dri_bo_unmap(obj_buffer->buffer_store->bo); + + vaStatus = VA_STATUS_SUCCESS; + } else if (NULL != obj_buffer->buffer_store->buffer) { + /* Do nothing */ + vaStatus = VA_STATUS_SUCCESS; + } + + return vaStatus; +} + +VAStatus +i965_DestroyBuffer(VADriverContextP ctx, VABufferID buffer_id) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_buffer *obj_buffer = BUFFER(buffer_id); + + assert(obj_buffer); + i965_destroy_buffer(&i965->buffer_heap, (struct object_base *)obj_buffer); + + return VA_STATUS_SUCCESS; +} + +VAStatus +i965_BeginPicture(VADriverContextP ctx, + VAContextID context, + VASurfaceID render_target) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_context *obj_context = CONTEXT(context); + struct object_surface *obj_surface = SURFACE(render_target); + struct object_config *obj_config; + VAContextID config; + VAStatus vaStatus; + + assert(obj_context); + assert(obj_surface); + + config = obj_context->config_id; + obj_config = CONFIG(config); + assert(obj_config); + + switch (obj_config->profile) { + case VAProfileMPEG2Simple: + case VAProfileMPEG2Main: + vaStatus = VA_STATUS_SUCCESS; + break; + + case VAProfileH264Baseline: + case VAProfileH264Main: + case VAProfileH264High: + vaStatus = VA_STATUS_SUCCESS; + break; + + case VAProfileVC1Simple: + case VAProfileVC1Main: + case VAProfileVC1Advanced: + vaStatus = VA_STATUS_SUCCESS; + break; + + default: + assert(0); + vaStatus = VA_STATUS_ERROR_UNSUPPORTED_PROFILE; + break; + } + + if (obj_context->codec_type == CODEC_ENC) + obj_context->codec_state.enc.current_render_target = render_target; /*This is input new frame*/ + else + obj_context->codec_state.dec.current_render_target = render_target; + + return vaStatus; +} + +static VAStatus +i965_render_picture_parameter_buffer(VADriverContextP ctx, + struct object_context *obj_context, + struct object_buffer *obj_buffer) +{ + assert(obj_buffer->buffer_store->bo == NULL); + assert(obj_buffer->buffer_store->buffer); + i965_release_buffer_store(&obj_context->codec_state.dec.pic_param); + i965_reference_buffer_store(&obj_context->codec_state.dec.pic_param, + obj_buffer->buffer_store); + + return VA_STATUS_SUCCESS; +} + +static VAStatus +i965_render_iq_matrix_buffer(VADriverContextP ctx, + struct object_context *obj_context, + struct object_buffer *obj_buffer) +{ + assert(obj_buffer->buffer_store->bo == NULL); + assert(obj_buffer->buffer_store->buffer); + i965_release_buffer_store(&obj_context->codec_state.dec.iq_matrix); + i965_reference_buffer_store(&obj_context->codec_state.dec.iq_matrix, + obj_buffer->buffer_store); + + return VA_STATUS_SUCCESS; +} + +static VAStatus +i965_render_bit_plane_buffer(VADriverContextP ctx, + struct object_context *obj_context, + struct object_buffer *obj_buffer) +{ + assert(obj_buffer->buffer_store->bo == NULL); + assert(obj_buffer->buffer_store->buffer); + i965_release_buffer_store(&obj_context->codec_state.dec.bit_plane); + i965_reference_buffer_store(&obj_context->codec_state.dec.bit_plane, + obj_buffer->buffer_store); + + return VA_STATUS_SUCCESS; +} + +static VAStatus +i965_render_slice_parameter_buffer(VADriverContextP ctx, + struct object_context *obj_context, + struct object_buffer *obj_buffer) +{ + assert(obj_buffer->buffer_store->bo == NULL); + assert(obj_buffer->buffer_store->buffer); + + if (obj_context->codec_state.dec.num_slice_params == obj_context->codec_state.dec.max_slice_params) { + obj_context->codec_state.dec.slice_params = realloc(obj_context->codec_state.dec.slice_params, + (obj_context->codec_state.dec.max_slice_params + NUM_SLICES) * sizeof(*obj_context->codec_state.dec.slice_params)); + memset(obj_context->codec_state.dec.slice_params + obj_context->codec_state.dec.max_slice_params, 0, NUM_SLICES * sizeof(*obj_context->codec_state.dec.slice_params)); + obj_context->codec_state.dec.max_slice_params += NUM_SLICES; + } + + i965_release_buffer_store(&obj_context->codec_state.dec.slice_params[obj_context->codec_state.dec.num_slice_params]); + i965_reference_buffer_store(&obj_context->codec_state.dec.slice_params[obj_context->codec_state.dec.num_slice_params], + obj_buffer->buffer_store); + obj_context->codec_state.dec.num_slice_params++; + + return VA_STATUS_SUCCESS; +} + +static VAStatus +i965_render_slice_data_buffer(VADriverContextP ctx, + struct object_context *obj_context, + struct object_buffer *obj_buffer) +{ + assert(obj_buffer->buffer_store->buffer == NULL); + assert(obj_buffer->buffer_store->bo); + + if (obj_context->codec_state.dec.num_slice_datas == obj_context->codec_state.dec.max_slice_datas) { + obj_context->codec_state.dec.slice_datas = realloc(obj_context->codec_state.dec.slice_datas, + (obj_context->codec_state.dec.max_slice_datas + NUM_SLICES) * sizeof(*obj_context->codec_state.dec.slice_datas)); + memset(obj_context->codec_state.dec.slice_datas + obj_context->codec_state.dec.max_slice_datas, 0, NUM_SLICES * sizeof(*obj_context->codec_state.dec.slice_datas)); + obj_context->codec_state.dec.max_slice_datas += NUM_SLICES; + } + + i965_release_buffer_store(&obj_context->codec_state.dec.slice_datas[obj_context->codec_state.dec.num_slice_datas]); + i965_reference_buffer_store(&obj_context->codec_state.dec.slice_datas[obj_context->codec_state.dec.num_slice_datas], + obj_buffer->buffer_store); + obj_context->codec_state.dec.num_slice_datas++; + + return VA_STATUS_SUCCESS; +} + +static VAStatus +i965_decoder_render_picture(VADriverContextP ctx, + VAContextID context, + VABufferID *buffers, + int num_buffers) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_context *obj_context = CONTEXT(context); + VAStatus vaStatus; + int i; + + for (i = 0; i < num_buffers; i++) { + struct object_buffer *obj_buffer = BUFFER(buffers[i]); + assert(obj_buffer); + + switch (obj_buffer->type) { + case VAPictureParameterBufferType: + vaStatus = i965_render_picture_parameter_buffer(ctx, obj_context, obj_buffer); + break; + + case VAIQMatrixBufferType: + vaStatus = i965_render_iq_matrix_buffer(ctx, obj_context, obj_buffer); + break; + + case VABitPlaneBufferType: + vaStatus = i965_render_bit_plane_buffer(ctx, obj_context, obj_buffer); + break; + + case VASliceParameterBufferType: + vaStatus = i965_render_slice_parameter_buffer(ctx, obj_context, obj_buffer); + break; + + case VASliceDataBufferType: + vaStatus = i965_render_slice_data_buffer(ctx, obj_context, obj_buffer); + break; + + default: + vaStatus = VA_STATUS_ERROR_UNSUPPORTED_BUFFERTYPE; + break; + } + } + + return vaStatus; +} + +static VAStatus +i965_encoder_render_squence_parameter_buffer(VADriverContextP ctx, + struct object_context *obj_context, + struct object_buffer *obj_buffer) +{ + assert(obj_buffer->buffer_store->bo == NULL); + assert(obj_buffer->buffer_store->buffer); + i965_release_buffer_store(&obj_context->codec_state.enc.seq_param); + i965_reference_buffer_store(&obj_context->codec_state.enc.seq_param, + obj_buffer->buffer_store); + + return VA_STATUS_SUCCESS; +} + + +static VAStatus +i965_encoder_render_picture_parameter_buffer(VADriverContextP ctx, + struct object_context *obj_context, + struct object_buffer *obj_buffer) +{ + assert(obj_buffer->buffer_store->bo == NULL); + assert(obj_buffer->buffer_store->buffer); + i965_release_buffer_store(&obj_context->codec_state.enc.pic_param); + i965_reference_buffer_store(&obj_context->codec_state.enc.pic_param, + obj_buffer->buffer_store); + + return VA_STATUS_SUCCESS; +} + +static VAStatus +i965_encoder_render_slice_parameter_buffer(VADriverContextP ctx, + struct object_context *obj_context, + struct object_buffer *obj_buffer) +{ + if (obj_context->codec_state.enc.num_slice_params == obj_context->codec_state.enc.max_slice_params) { + obj_context->codec_state.enc.slice_params = realloc(obj_context->codec_state.enc.slice_params, + (obj_context->codec_state.enc.max_slice_params + NUM_SLICES) * sizeof(*obj_context->codec_state.enc.slice_params)); + memset(obj_context->codec_state.enc.slice_params + obj_context->codec_state.enc.max_slice_params, 0, NUM_SLICES * sizeof(*obj_context->codec_state.enc.slice_params)); + obj_context->codec_state.enc.max_slice_params += NUM_SLICES; + } + + i965_release_buffer_store(&obj_context->codec_state.enc.slice_params[obj_context->codec_state.enc.num_slice_params]); + i965_reference_buffer_store(&obj_context->codec_state.enc.slice_params[obj_context->codec_state.enc.num_slice_params], + obj_buffer->buffer_store); + obj_context->codec_state.enc.num_slice_params++; + + return VA_STATUS_SUCCESS; +} + +static VAStatus +i965_encoder_render_picture_control_buffer(VADriverContextP ctx, + struct object_context *obj_context, + struct object_buffer *obj_buffer) +{ + assert(obj_buffer->buffer_store->bo == NULL); + assert(obj_buffer->buffer_store->buffer); + i965_release_buffer_store(&obj_context->codec_state.enc.pic_control); + i965_reference_buffer_store(&obj_context->codec_state.enc.pic_control, + obj_buffer->buffer_store); + + return VA_STATUS_SUCCESS; +} + +static VAStatus +i965_encoder_render_qmatrix_buffer(VADriverContextP ctx, + struct object_context *obj_context, + struct object_buffer *obj_buffer) +{ + assert(obj_buffer->buffer_store->bo == NULL); + assert(obj_buffer->buffer_store->buffer); + i965_release_buffer_store(&obj_context->codec_state.enc.q_matrix); + i965_reference_buffer_store(&obj_context->codec_state.enc.iq_matrix, + obj_buffer->buffer_store); + + return VA_STATUS_SUCCESS; +} + +static VAStatus +i965_encoder_render_iqmatrix_buffer(VADriverContextP ctx, + struct object_context *obj_context, + struct object_buffer *obj_buffer) +{ + assert(obj_buffer->buffer_store->bo == NULL); + assert(obj_buffer->buffer_store->buffer); + i965_release_buffer_store(&obj_context->codec_state.enc.iq_matrix); + i965_reference_buffer_store(&obj_context->codec_state.enc.iq_matrix, + obj_buffer->buffer_store); + + return VA_STATUS_SUCCESS; +} + +static VAStatus +i965_encoder_render_picture(VADriverContextP ctx, + VAContextID context, + VABufferID *buffers, + int num_buffers) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_context *obj_context = CONTEXT(context); + VAStatus vaStatus; + int i; + + for (i = 0; i < num_buffers; i++) { + struct object_buffer *obj_buffer = BUFFER(buffers[i]); + assert(obj_buffer); + + switch (obj_buffer->type) { + case VAEncSequenceParameterBufferType: + vaStatus = i965_encoder_render_squence_parameter_buffer(ctx, obj_context, obj_buffer); + break; + + case VAEncPictureParameterBufferType: + vaStatus = i965_encoder_render_picture_parameter_buffer(ctx, obj_context, obj_buffer); + break; + + case VAEncSliceParameterBufferType: + vaStatus = i965_encoder_render_slice_parameter_buffer(ctx, obj_context, obj_buffer); + break; + + case VAPictureParameterBufferType: + vaStatus = i965_encoder_render_picture_control_buffer(ctx, obj_context, obj_buffer); + break; + + case VAQMatrixBufferType: + vaStatus = i965_encoder_render_qmatrix_buffer(ctx, obj_context, obj_buffer); + break; + + case VAIQMatrixBufferType: + vaStatus = i965_encoder_render_iqmatrix_buffer(ctx, obj_context, obj_buffer); + break; + + default: + vaStatus = VA_STATUS_ERROR_UNSUPPORTED_BUFFERTYPE; + break; + } + } + + return vaStatus; +} + +VAStatus +i965_RenderPicture(VADriverContextP ctx, + VAContextID context, + VABufferID *buffers, + int num_buffers) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_context *obj_context; + struct object_config *obj_config; + VAContextID config; + VAStatus vaStatus = VA_STATUS_ERROR_UNKNOWN; + + obj_context = CONTEXT(context); + assert(obj_context); + + config = obj_context->config_id; + obj_config = CONFIG(config); + assert(obj_config); + + if (VAEntrypointEncSlice == obj_config->entrypoint ){ + vaStatus = i965_encoder_render_picture(ctx, context, buffers, num_buffers); + } else { + vaStatus = i965_decoder_render_picture(ctx, context, buffers, num_buffers); + } + + return vaStatus; +} + +VAStatus +i965_EndPicture(VADriverContextP ctx, VAContextID context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_context *obj_context = CONTEXT(context); + struct object_config *obj_config; + VAContextID config; + int i; + + assert(obj_context); + config = obj_context->config_id; + obj_config = CONFIG(config); + assert(obj_config); + + if (obj_context->codec_type == CODEC_ENC) { + assert(VAEntrypointEncSlice == obj_config->entrypoint); + + assert(obj_context->codec_state.enc.pic_param); + assert(obj_context->codec_state.enc.seq_param); + assert(obj_context->codec_state.enc.num_slice_params >= 1); + } else { + assert(obj_context->codec_state.dec.pic_param); + assert(obj_context->codec_state.dec.num_slice_params >= 1); + assert(obj_context->codec_state.dec.num_slice_datas >= 1); + assert(obj_context->codec_state.dec.num_slice_params == obj_context->codec_state.dec.num_slice_datas); + } + + assert(obj_context->hw_context->run); + obj_context->hw_context->run(ctx, obj_config->profile, &obj_context->codec_state, obj_context->hw_context); + + if (obj_context->codec_type == CODEC_ENC) { + obj_context->codec_state.enc.current_render_target = VA_INVALID_SURFACE; + obj_context->codec_state.enc.num_slice_params = 0; + i965_release_buffer_store(&obj_context->codec_state.enc.pic_param); + i965_release_buffer_store(&obj_context->codec_state.enc.seq_param); + + for (i = 0; i < obj_context->codec_state.enc.num_slice_params; i++) { + i965_release_buffer_store(&obj_context->codec_state.enc.slice_params[i]); + } + } else { + obj_context->codec_state.dec.current_render_target = -1; + obj_context->codec_state.dec.num_slice_params = 0; + obj_context->codec_state.dec.num_slice_datas = 0; + i965_release_buffer_store(&obj_context->codec_state.dec.pic_param); + i965_release_buffer_store(&obj_context->codec_state.dec.iq_matrix); + i965_release_buffer_store(&obj_context->codec_state.dec.bit_plane); + + for (i = 0; i < obj_context->codec_state.dec.num_slice_params; i++) { + i965_release_buffer_store(&obj_context->codec_state.dec.slice_params[i]); + i965_release_buffer_store(&obj_context->codec_state.dec.slice_datas[i]); + } + } + + return VA_STATUS_SUCCESS; +} + +VAStatus +i965_SyncSurface(VADriverContextP ctx, + VASurfaceID render_target) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface = SURFACE(render_target); + + assert(obj_surface); + + return VA_STATUS_SUCCESS; +} + +VAStatus +i965_QuerySurfaceStatus(VADriverContextP ctx, + VASurfaceID render_target, + VASurfaceStatus *status) /* out */ +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface = SURFACE(render_target); + + assert(obj_surface); + + /* Usually GEM will handle synchronization with the graphics hardware */ +#if 0 + if (obj_surface->bo) { + dri_bo_map(obj_surface->bo, 0); + dri_bo_unmap(obj_surface->bo); + } +#endif + + *status = obj_surface->status; + + return VA_STATUS_SUCCESS; +} + + +/* + * Query display attributes + * The caller must provide a "attr_list" array that can hold at + * least vaMaxNumDisplayAttributes() entries. The actual number of attributes + * returned in "attr_list" is returned in "num_attributes". + */ +VAStatus +i965_QueryDisplayAttributes(VADriverContextP ctx, + VADisplayAttribute *attr_list, /* out */ + int *num_attributes) /* out */ +{ + if (num_attributes) + *num_attributes = 0; + + return VA_STATUS_SUCCESS; +} + +/* + * Get display attributes + * This function returns the current attribute values in "attr_list". + * Only attributes returned with VA_DISPLAY_ATTRIB_GETTABLE set in the "flags" field + * from vaQueryDisplayAttributes() can have their values retrieved. + */ +VAStatus +i965_GetDisplayAttributes(VADriverContextP ctx, + VADisplayAttribute *attr_list, /* in/out */ + int num_attributes) +{ + /* TODO */ + return VA_STATUS_ERROR_UNIMPLEMENTED; +} + +/* + * Set display attributes + * Only attributes returned with VA_DISPLAY_ATTRIB_SETTABLE set in the "flags" field + * from vaQueryDisplayAttributes() can be set. If the attribute is not settable or + * the value is out of range, the function returns VA_STATUS_ERROR_ATTR_NOT_SUPPORTED + */ +VAStatus +i965_SetDisplayAttributes(VADriverContextP ctx, + VADisplayAttribute *attr_list, + int num_attributes) +{ + /* TODO */ + return VA_STATUS_ERROR_UNIMPLEMENTED; +} + +VAStatus +i965_DbgCopySurfaceToBuffer(VADriverContextP ctx, + VASurfaceID surface, + void **buffer, /* out */ + unsigned int *stride) /* out */ +{ + /* TODO */ + return VA_STATUS_ERROR_UNIMPLEMENTED; +} + +static VAStatus +i965_Init(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + + if (intel_driver_init(ctx) == False) + return VA_STATUS_ERROR_UNKNOWN; + + if (IS_G4X(i965->intel.device_id)) + i965->codec_info = &g4x_hw_codec_info; + else if (IS_IRONLAKE(i965->intel.device_id)) + i965->codec_info = &ironlake_hw_codec_info; + else if (IS_GEN6(i965->intel.device_id)) + i965->codec_info = &gen6_hw_codec_info; + else if (IS_GEN7(i965->intel.device_id)) + i965->codec_info = &gen7_hw_codec_info; + else + return VA_STATUS_ERROR_UNKNOWN; + + if (i965_post_processing_init(ctx) == False) + return VA_STATUS_ERROR_UNKNOWN; + + if (i965_render_init(ctx) == False) + return VA_STATUS_ERROR_UNKNOWN; + + _i965InitMutex(&i965->render_mutex); + i965->batch = intel_batchbuffer_new(&i965->intel, I915_EXEC_RENDER); + + return VA_STATUS_SUCCESS; +} + +static void +i965_destroy_heap(struct object_heap *heap, + void (*func)(struct object_heap *heap, struct object_base *object)) +{ + struct object_base *object; + object_heap_iterator iter; + + object = object_heap_first(heap, &iter); + + while (object) { + if (func) + func(heap, object); + + object = object_heap_next(heap, &iter); + } + + object_heap_destroy(heap); +} + + +VAStatus +i965_DestroyImage(VADriverContextP ctx, VAImageID image); + +VAStatus +i965_CreateImage(VADriverContextP ctx, + VAImageFormat *format, + int width, + int height, + VAImage *out_image) /* out */ +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_image *obj_image; + VAStatus va_status = VA_STATUS_ERROR_OPERATION_FAILED; + VAImageID image_id; + unsigned int width2, height2, size2, size; + + out_image->image_id = VA_INVALID_ID; + out_image->buf = VA_INVALID_ID; + + image_id = NEW_IMAGE_ID(); + if (image_id == VA_INVALID_ID) + return VA_STATUS_ERROR_ALLOCATION_FAILED; + + obj_image = IMAGE(image_id); + if (!obj_image) + return VA_STATUS_ERROR_ALLOCATION_FAILED; + obj_image->bo = NULL; + obj_image->palette = NULL; + obj_image->derived_surface = VA_INVALID_ID; + + VAImage * const image = &obj_image->image; + image->image_id = image_id; + image->buf = VA_INVALID_ID; + + size = width * height; + width2 = (width + 1) / 2; + height2 = (height + 1) / 2; + size2 = width2 * height2; + + image->num_palette_entries = 0; + image->entry_bytes = 0; + memset(image->component_order, 0, sizeof(image->component_order)); + + switch (format->fourcc) { + case VA_FOURCC('I','A','4','4'): + case VA_FOURCC('A','I','4','4'): + image->num_planes = 1; + image->pitches[0] = width; + image->offsets[0] = 0; + image->data_size = image->offsets[0] + image->pitches[0] * height; + image->num_palette_entries = 16; + image->entry_bytes = 3; + image->component_order[0] = 'R'; + image->component_order[1] = 'G'; + image->component_order[2] = 'B'; + break; + case VA_FOURCC('A','R','G','B'): + case VA_FOURCC('A','B','G','R'): + case VA_FOURCC('B','G','R','A'): + case VA_FOURCC('R','G','B','A'): + image->num_planes = 1; + image->pitches[0] = width * 4; + image->offsets[0] = 0; + image->data_size = image->offsets[0] + image->pitches[0] * height; + break; + case VA_FOURCC('Y','V','1','2'): + image->num_planes = 3; + image->pitches[0] = width; + image->offsets[0] = 0; + image->pitches[1] = width2; + image->offsets[1] = size + size2; + image->pitches[2] = width2; + image->offsets[2] = size; + image->data_size = size + 2 * size2; + break; + case VA_FOURCC('I','4','2','0'): + image->num_planes = 3; + image->pitches[0] = width; + image->offsets[0] = 0; + image->pitches[1] = width2; + image->offsets[1] = size; + image->pitches[2] = width2; + image->offsets[2] = size + size2; + image->data_size = size + 2 * size2; + break; + case VA_FOURCC('N','V','1','2'): + image->num_planes = 2; + image->pitches[0] = width; + image->offsets[0] = 0; + image->pitches[1] = width; + image->offsets[1] = size; + image->data_size = size + 2 * size2; + break; + default: + goto error; + } + + va_status = i965_CreateBuffer(ctx, 0, VAImageBufferType, + image->data_size, 1, NULL, &image->buf); + if (va_status != VA_STATUS_SUCCESS) + goto error; + + obj_image->bo = BUFFER(image->buf)->buffer_store->bo; + dri_bo_reference(obj_image->bo); + + if (image->num_palette_entries > 0 && image->entry_bytes > 0) { + obj_image->palette = malloc(image->num_palette_entries * sizeof(obj_image->palette)); + if (!obj_image->palette) + goto error; + } + + image->image_id = image_id; + image->format = *format; + image->width = width; + image->height = height; + + *out_image = *image; + return VA_STATUS_SUCCESS; + + error: + i965_DestroyImage(ctx, image_id); + return va_status; +} + +void +i965_check_alloc_surface_bo(VADriverContextP ctx, + struct object_surface *obj_surface, + int tiled, + unsigned int fourcc) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + + if (obj_surface->bo) + return; + + if (tiled) { + uint32_t tiling_mode = I915_TILING_Y; /* always uses Y-tiled format */ + unsigned long pitch; + + obj_surface->bo = drm_intel_bo_alloc_tiled(i965->intel.bufmgr, + "vaapi surface", + obj_surface->width, + obj_surface->height + obj_surface->height / 2, + 1, + &tiling_mode, + &pitch, + 0); + assert(tiling_mode == I915_TILING_Y); + assert(pitch == obj_surface->width); + } else { + obj_surface->bo = dri_bo_alloc(i965->intel.bufmgr, + "vaapi surface", + obj_surface->size, + 0x1000); + } + + obj_surface->fourcc = fourcc; + assert(obj_surface->bo); +} + +VAStatus i965_DeriveImage(VADriverContextP ctx, + VASurfaceID surface, + VAImage *out_image) /* out */ +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct object_image *obj_image; + struct object_surface *obj_surface; + VAImageID image_id; + unsigned int w_pitch, h_pitch; + unsigned int data_size; + VAStatus va_status; + + out_image->image_id = VA_INVALID_ID; + obj_surface = SURFACE(surface); + + if (!obj_surface) + return VA_STATUS_ERROR_INVALID_SURFACE; + + w_pitch = obj_surface->width; + h_pitch = obj_surface->height; + data_size = obj_surface->orig_width * obj_surface->orig_height + + 2 * (((obj_surface->orig_width + 1) / 2) * ((obj_surface->orig_height + 1) / 2)); + + image_id = NEW_IMAGE_ID(); + + if (image_id == VA_INVALID_ID) + return VA_STATUS_ERROR_ALLOCATION_FAILED; + + obj_image = IMAGE(image_id); + + if (!obj_image) + return VA_STATUS_ERROR_ALLOCATION_FAILED; + + obj_image->bo = NULL; + obj_image->palette = NULL; + obj_image->derived_surface = VA_INVALID_ID; + + VAImage * const image = &obj_image->image; + + memset(image, 0, sizeof(*image)); + image->image_id = image_id; + image->buf = VA_INVALID_ID; + image->num_palette_entries = 0; + image->entry_bytes = 0; + image->width = obj_surface->orig_width; + image->height = obj_surface->orig_height; + image->data_size = data_size; + + if (!render_state->inited) { + image->format.fourcc = VA_FOURCC('Y','V','1','2'); + image->format.byte_order = VA_LSB_FIRST; + image->format.bits_per_pixel = 12; + image->num_planes = 3; + image->pitches[0] = w_pitch; + image->offsets[0] = 0; + image->pitches[1] = w_pitch / 2; + image->offsets[1] = w_pitch * h_pitch; + image->pitches[2] = w_pitch / 2; + image->offsets[2] = w_pitch * h_pitch + (w_pitch / 2) * (h_pitch / 2); + } else { + if (render_state->interleaved_uv) { + image->format.fourcc = VA_FOURCC('N','V','1','2'); + image->format.byte_order = VA_LSB_FIRST; + image->format.bits_per_pixel = 12; + image->num_planes = 2; + image->pitches[0] = w_pitch; + image->offsets[0] = 0; + image->pitches[1] = w_pitch; + image->offsets[1] = w_pitch * h_pitch; + } else { + image->format.fourcc = VA_FOURCC('I','4','2','0'); + image->format.byte_order = VA_LSB_FIRST; + image->format.bits_per_pixel = 12; + image->num_planes = 3; + image->pitches[0] = w_pitch; + image->offsets[0] = 0; + image->pitches[1] = w_pitch / 2; + image->offsets[1] = w_pitch * h_pitch; + image->pitches[2] = w_pitch / 2; + image->offsets[2] = w_pitch * h_pitch + (w_pitch / 2) * (h_pitch / 2); + } + } + + i965_check_alloc_surface_bo(ctx, obj_surface, HAS_TILED_SURFACE(i965), image->format.fourcc); + va_status = i965_create_buffer_internal(ctx, 0, VAImageBufferType, + obj_surface->size, 1, NULL, obj_surface->bo, &image->buf); + if (va_status != VA_STATUS_SUCCESS) + goto error; + + obj_image->bo = BUFFER(image->buf)->buffer_store->bo; + dri_bo_reference(obj_image->bo); + + if (image->num_palette_entries > 0 && image->entry_bytes > 0) { + obj_image->palette = malloc(image->num_palette_entries * sizeof(obj_image->palette)); + if (!obj_image->palette) { + va_status = VA_STATUS_ERROR_ALLOCATION_FAILED; + goto error; + } + } + + *out_image = *image; + obj_surface->flags |= SURFACE_DERIVED; + obj_image->derived_surface = surface; + + return VA_STATUS_SUCCESS; + + error: + i965_DestroyImage(ctx, image_id); + return va_status; +} + +static void +i965_destroy_image(struct object_heap *heap, struct object_base *obj) +{ + object_heap_free(heap, obj); +} + + +VAStatus +i965_DestroyImage(VADriverContextP ctx, VAImageID image) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_image *obj_image = IMAGE(image); + struct object_surface *obj_surface; + + if (!obj_image) + return VA_STATUS_SUCCESS; + + dri_bo_unreference(obj_image->bo); + obj_image->bo = NULL; + + if (obj_image->image.buf != VA_INVALID_ID) { + i965_DestroyBuffer(ctx, obj_image->image.buf); + obj_image->image.buf = VA_INVALID_ID; + } + + if (obj_image->palette) { + free(obj_image->palette); + obj_image->palette = NULL; + } + + obj_surface = SURFACE(obj_image->derived_surface); + + if (obj_surface) { + obj_surface->flags &= ~SURFACE_DERIVED; + } + + i965_destroy_image(&i965->image_heap, (struct object_base *)obj_image); + + return VA_STATUS_SUCCESS; +} + +/* + * pointer to an array holding the palette data. The size of the array is + * num_palette_entries * entry_bytes in size. The order of the components + * in the palette is described by the component_order in VASubpicture struct + */ +VAStatus +i965_SetImagePalette(VADriverContextP ctx, + VAImageID image, + unsigned char *palette) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + unsigned int i; + + struct object_image *obj_image = IMAGE(image); + if (!obj_image) + return VA_STATUS_ERROR_INVALID_IMAGE; + + if (!obj_image->palette) + return VA_STATUS_ERROR_ALLOCATION_FAILED; /* XXX: unpaletted/error */ + + for (i = 0; i < obj_image->image.num_palette_entries; i++) + obj_image->palette[i] = (((unsigned int)palette[3*i + 0] << 16) | + ((unsigned int)palette[3*i + 1] << 8) | + (unsigned int)palette[3*i + 2]); + return VA_STATUS_SUCCESS; +} + +static inline void +memcpy_pic(uint8_t *dst, unsigned int dst_stride, + const uint8_t *src, unsigned int src_stride, + unsigned int len, unsigned int height) +{ + unsigned int i; + + for (i = 0; i < height; i++) { + memcpy(dst, src, len); + dst += dst_stride; + src += src_stride; + } +} + +static void +get_image_i420(struct object_image *obj_image, uint8_t *image_data, + struct object_surface *obj_surface, + const VARectangle *rect) +{ + uint8_t *dst[3], *src[3]; + const int Y = 0; + const int U = obj_image->image.format.fourcc == obj_surface->fourcc ? 1 : 2; + const int V = obj_image->image.format.fourcc == obj_surface->fourcc ? 2 : 1; + unsigned int tiling, swizzle; + + if (!obj_surface->bo) + return; + + assert(obj_surface->fourcc); + dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + + if (tiling != I915_TILING_NONE) + drm_intel_gem_bo_map_gtt(obj_surface->bo); + else + dri_bo_map(obj_surface->bo, 0); + + if (!obj_surface->bo->virtual) + return; + + /* Dest VA image has either I420 or YV12 format. + Source VA surface alway has I420 format */ + dst[Y] = image_data + obj_image->image.offsets[Y]; + src[0] = (uint8_t *)obj_surface->bo->virtual; + dst[U] = image_data + obj_image->image.offsets[U]; + src[1] = src[0] + obj_surface->width * obj_surface->height; + dst[V] = image_data + obj_image->image.offsets[V]; + src[2] = src[1] + (obj_surface->width / 2) * (obj_surface->height / 2); + + /* Y plane */ + dst[Y] += rect->y * obj_image->image.pitches[Y] + rect->x; + src[0] += rect->y * obj_surface->width + rect->x; + memcpy_pic(dst[Y], obj_image->image.pitches[Y], + src[0], obj_surface->width, + rect->width, rect->height); + + /* U plane */ + dst[U] += (rect->y / 2) * obj_image->image.pitches[U] + rect->x / 2; + src[1] += (rect->y / 2) * obj_surface->width / 2 + rect->x / 2; + memcpy_pic(dst[U], obj_image->image.pitches[U], + src[1], obj_surface->width / 2, + rect->width / 2, rect->height / 2); + + /* V plane */ + dst[V] += (rect->y / 2) * obj_image->image.pitches[V] + rect->x / 2; + src[2] += (rect->y / 2) * obj_surface->width / 2 + rect->x / 2; + memcpy_pic(dst[V], obj_image->image.pitches[V], + src[2], obj_surface->width / 2, + rect->width / 2, rect->height / 2); + + if (tiling != I915_TILING_NONE) + drm_intel_gem_bo_unmap_gtt(obj_surface->bo); + else + dri_bo_unmap(obj_surface->bo); +} + +static void +get_image_nv12(struct object_image *obj_image, uint8_t *image_data, + struct object_surface *obj_surface, + const VARectangle *rect) +{ + uint8_t *dst[2], *src[2]; + unsigned int tiling, swizzle; + + if (!obj_surface->bo) + return; + + assert(obj_surface->fourcc); + dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + + if (tiling != I915_TILING_NONE) + drm_intel_gem_bo_map_gtt(obj_surface->bo); + else + dri_bo_map(obj_surface->bo, 0); + + if (!obj_surface->bo->virtual) + return; + + /* Both dest VA image and source surface have NV12 format */ + dst[0] = image_data + obj_image->image.offsets[0]; + src[0] = (uint8_t *)obj_surface->bo->virtual; + dst[1] = image_data + obj_image->image.offsets[1]; + src[1] = src[0] + obj_surface->width * obj_surface->height; + + /* Y plane */ + dst[0] += rect->y * obj_image->image.pitches[0] + rect->x; + src[0] += rect->y * obj_surface->width + rect->x; + memcpy_pic(dst[0], obj_image->image.pitches[0], + src[0], obj_surface->width, + rect->width, rect->height); + + /* UV plane */ + dst[1] += (rect->y / 2) * obj_image->image.pitches[1] + (rect->x & -2); + src[1] += (rect->y / 2) * obj_surface->width + (rect->x & -2); + memcpy_pic(dst[1], obj_image->image.pitches[1], + src[1], obj_surface->width, + rect->width, rect->height / 2); + + if (tiling != I915_TILING_NONE) + drm_intel_gem_bo_unmap_gtt(obj_surface->bo); + else + dri_bo_unmap(obj_surface->bo); +} + +VAStatus +i965_GetImage(VADriverContextP ctx, + VASurfaceID surface, + int x, /* coordinates of the upper left source pixel */ + int y, + unsigned int width, /* width and height of the region */ + unsigned int height, + VAImageID image) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + + struct object_surface *obj_surface = SURFACE(surface); + if (!obj_surface) + return VA_STATUS_ERROR_INVALID_SURFACE; + + struct object_image *obj_image = IMAGE(image); + if (!obj_image) + return VA_STATUS_ERROR_INVALID_IMAGE; + + if (x < 0 || y < 0) + return VA_STATUS_ERROR_INVALID_PARAMETER; + if (x + width > obj_surface->orig_width || + y + height > obj_surface->orig_height) + return VA_STATUS_ERROR_INVALID_PARAMETER; + if (x + width > obj_image->image.width || + y + height > obj_image->image.height) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + VAStatus va_status; + void *image_data = NULL; + + va_status = i965_MapBuffer(ctx, obj_image->image.buf, &image_data); + if (va_status != VA_STATUS_SUCCESS) + return va_status; + + VARectangle rect; + rect.x = x; + rect.y = y; + rect.width = width; + rect.height = height; + + switch (obj_image->image.format.fourcc) { + case VA_FOURCC('Y','V','1','2'): + case VA_FOURCC('I','4','2','0'): + /* I420 is native format for MPEG-2 decoded surfaces */ + if (render_state->interleaved_uv) + goto operation_failed; + get_image_i420(obj_image, image_data, obj_surface, &rect); + break; + case VA_FOURCC('N','V','1','2'): + /* NV12 is native format for H.264 decoded surfaces */ + if (!render_state->interleaved_uv) + goto operation_failed; + get_image_nv12(obj_image, image_data, obj_surface, &rect); + break; + default: + operation_failed: + va_status = VA_STATUS_ERROR_OPERATION_FAILED; + break; + } + + i965_UnmapBuffer(ctx, obj_image->image.buf); + return va_status; +} + +VAStatus +i965_PutSurface(VADriverContextP ctx, + VASurfaceID surface, + void *draw, /* X Drawable */ + short srcx, + short srcy, + unsigned short srcw, + unsigned short srch, + short destx, + short desty, + unsigned short destw, + unsigned short desth, + VARectangle *cliprects, /* client supplied clip list */ + unsigned int number_cliprects, /* number of clip rects in the clip list */ + unsigned int flags) /* de-interlacing flags */ +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct dri_state *dri_state = (struct dri_state *)ctx->dri_state; + struct i965_render_state *render_state = &i965->render_state; + struct dri_drawable *dri_drawable; + union dri_buffer *buffer; + struct intel_region *dest_region; + struct object_surface *obj_surface; + VARectangle src_rect, dst_rect; + int ret; + uint32_t name; + Bool new_region = False; + int pp_flag = 0; + + /* Currently don't support DRI1 */ + if (dri_state->driConnectedFlag != VA_DRI2) + return VA_STATUS_ERROR_UNKNOWN; + + /* Some broken sources such as H.264 conformance case FM2_SVA_C + * will get here + */ + obj_surface = SURFACE(surface); + if (!obj_surface || !obj_surface->bo) + return VA_STATUS_SUCCESS; + + _i965LockMutex(&i965->render_mutex); + + dri_drawable = dri_get_drawable(ctx, (Drawable)draw); + assert(dri_drawable); + + buffer = dri_get_rendering_buffer(ctx, dri_drawable); + assert(buffer); + + dest_region = render_state->draw_region; + + if (dest_region) { + assert(dest_region->bo); + dri_bo_flink(dest_region->bo, &name); + + if (buffer->dri2.name != name) { + new_region = True; + dri_bo_unreference(dest_region->bo); + } + } else { + dest_region = (struct intel_region *)calloc(1, sizeof(*dest_region)); + assert(dest_region); + render_state->draw_region = dest_region; + new_region = True; + } + + if (new_region) { + dest_region->x = dri_drawable->x; + dest_region->y = dri_drawable->y; + dest_region->width = dri_drawable->width; + dest_region->height = dri_drawable->height; + dest_region->cpp = buffer->dri2.cpp; + dest_region->pitch = buffer->dri2.pitch; + + dest_region->bo = intel_bo_gem_create_from_name(i965->intel.bufmgr, "rendering buffer", buffer->dri2.name); + assert(dest_region->bo); + + ret = dri_bo_get_tiling(dest_region->bo, &(dest_region->tiling), &(dest_region->swizzle)); + assert(ret == 0); + } + + if ((flags & VA_FILTER_SCALING_MASK) == VA_FILTER_SCALING_NL_ANAMORPHIC) + pp_flag |= I965_PP_FLAG_AVS; + + if (flags & (VA_BOTTOM_FIELD | VA_TOP_FIELD)) + pp_flag |= I965_PP_FLAG_DEINTERLACING; + + src_rect.x = srcx; + src_rect.y = srcy; + src_rect.width = srcw; + src_rect.height = srch; + + dst_rect.x = destx; + dst_rect.y = desty; + dst_rect.width = destw; + dst_rect.height = desth; + + intel_render_put_surface(ctx, surface, &src_rect, &dst_rect, pp_flag); + + if(obj_surface->subpic != VA_INVALID_ID) { + intel_render_put_subpicture(ctx, surface, &src_rect, &dst_rect); + } + + dri_swap_buffer(ctx, dri_drawable); + obj_surface->flags |= SURFACE_DISPLAYED; + + if ((obj_surface->flags & SURFACE_ALL_MASK) == SURFACE_DISPLAYED) { + dri_bo_unreference(obj_surface->bo); + obj_surface->bo = NULL; + obj_surface->flags &= ~SURFACE_REF_DIS_MASK; + + if (obj_surface->free_private_data) + obj_surface->free_private_data(&obj_surface->private_data); + } + + _i965UnlockMutex(&i965->render_mutex); + + return VA_STATUS_SUCCESS; +} + +VAStatus +i965_Terminate(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + + if (i965->batch) + intel_batchbuffer_free(i965->batch); + + _i965DestroyMutex(&i965->render_mutex); + + if (i965_render_terminate(ctx) == False) + return VA_STATUS_ERROR_UNKNOWN; + + if (i965_post_processing_terminate(ctx) == False) + return VA_STATUS_ERROR_UNKNOWN; + + if (intel_driver_terminate(ctx) == False) + return VA_STATUS_ERROR_UNKNOWN; + + i965_destroy_heap(&i965->buffer_heap, i965_destroy_buffer); + i965_destroy_heap(&i965->image_heap, i965_destroy_image); + i965_destroy_heap(&i965->subpic_heap, i965_destroy_subpic); + i965_destroy_heap(&i965->surface_heap, i965_destroy_surface); + i965_destroy_heap(&i965->context_heap, i965_destroy_context); + i965_destroy_heap(&i965->config_heap, i965_destroy_config); + + free(ctx->pDriverData); + ctx->pDriverData = NULL; + + return VA_STATUS_SUCCESS; +} + +static VAStatus +i965_BufferInfo( + VADriverContextP ctx, /* in */ + VABufferID buf_id, /* in */ + VABufferType *type, /* out */ + unsigned int *size, /* out */ + unsigned int *num_elements /* out */ +) +{ + struct i965_driver_data *i965 = NULL; + struct object_buffer *obj_buffer = NULL; + + i965 = i965_driver_data(ctx); + obj_buffer = BUFFER(buf_id); + + *type = obj_buffer->type; + *size = obj_buffer->size_element; + *num_elements = obj_buffer->num_elements; + + return VA_STATUS_SUCCESS; +} + +static VAStatus +i965_LockSurface( + VADriverContextP ctx, /* in */ + VASurfaceID surface, /* in */ + unsigned int *fourcc, /* out */ + unsigned int *luma_stride, /* out */ + unsigned int *chroma_u_stride, /* out */ + unsigned int *chroma_v_stride, /* out */ + unsigned int *luma_offset, /* out */ + unsigned int *chroma_u_offset, /* out */ + unsigned int *chroma_v_offset, /* out */ + unsigned int *buffer_name, /* out */ + void **buffer /* out */ +) +{ + VAStatus vaStatus = VA_STATUS_SUCCESS; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface = NULL; + VAImage tmpImage; + + assert(fourcc); + assert(luma_stride); + assert(chroma_u_stride); + assert(chroma_v_stride); + assert(luma_offset); + assert(chroma_u_offset); + assert(chroma_v_offset); + assert(buffer_name); + assert(buffer); + + tmpImage.image_id = VA_INVALID_ID; + + obj_surface = SURFACE(surface); + if (obj_surface == NULL) { + // Surface is absent. + vaStatus = VA_STATUS_ERROR_INVALID_PARAMETER; + goto error; + } + + // Lock functionality is absent now. + if (obj_surface->locked_image_id != VA_INVALID_ID) { + // Surface is locked already. + vaStatus = VA_STATUS_ERROR_INVALID_PARAMETER; + goto error; + } + + vaStatus = i965_DeriveImage( + ctx, + surface, + &tmpImage); + if (vaStatus != VA_STATUS_SUCCESS) { + goto error; + } + + obj_surface->locked_image_id = tmpImage.image_id; + + vaStatus = i965_MapBuffer( + ctx, + tmpImage.buf, + buffer); + if (vaStatus != VA_STATUS_SUCCESS) { + goto error; + } + + *fourcc = tmpImage.format.fourcc; + *luma_offset = tmpImage.offsets[0]; + *luma_stride = tmpImage.pitches[0]; + *chroma_u_offset = tmpImage.offsets[1]; + *chroma_u_stride = tmpImage.pitches[1]; + *chroma_v_offset = tmpImage.offsets[2]; + *chroma_v_stride = tmpImage.pitches[2]; + *buffer_name = tmpImage.buf; + +error: + if (vaStatus != VA_STATUS_SUCCESS) { + buffer = NULL; + } + + return vaStatus; +} + +static VAStatus +i965_UnlockSurface( + VADriverContextP ctx, /* in */ + VASurfaceID surface /* in */ +) +{ + VAStatus vaStatus = VA_STATUS_SUCCESS; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_image *locked_img = NULL; + struct object_surface *obj_surface = NULL; + + obj_surface = SURFACE(surface); + + if (obj_surface == NULL) { + vaStatus = VA_STATUS_ERROR_INVALID_PARAMETER; // Surface is absent + goto error; + } + if (obj_surface->locked_image_id == VA_INVALID_ID) { + vaStatus = VA_STATUS_ERROR_INVALID_PARAMETER; // Surface is not locked + goto error; + } + + locked_img = IMAGE(obj_surface->locked_image_id); + if (locked_img == NULL || (locked_img->image.image_id == VA_INVALID_ID)) { + // Work image was deallocated before i965_UnlockSurface() + vaStatus = VA_STATUS_ERROR_INVALID_PARAMETER; + goto error; + } + + vaStatus = i965_UnmapBuffer( + ctx, + locked_img->image.buf); + if (vaStatus != VA_STATUS_SUCCESS) { + goto error; + } + + vaStatus = i965_DestroyImage( + ctx, + locked_img->image.image_id); + if (vaStatus != VA_STATUS_SUCCESS) { + goto error; + } + + locked_img->image.image_id = VA_INVALID_ID; + + error: + return vaStatus; +} + +VAStatus DLL_EXPORT +VA_DRIVER_INIT_FUNC(VADriverContextP ctx); + +VAStatus +VA_DRIVER_INIT_FUNC( VADriverContextP ctx ) +{ + struct VADriverVTable * const vtable = ctx->vtable; + struct i965_driver_data *i965; + int result; + + ctx->version_major = VA_MAJOR_VERSION; + ctx->version_minor = VA_MINOR_VERSION; + ctx->max_profiles = I965_MAX_PROFILES; + ctx->max_entrypoints = I965_MAX_ENTRYPOINTS; + ctx->max_attributes = I965_MAX_CONFIG_ATTRIBUTES; + ctx->max_image_formats = I965_MAX_IMAGE_FORMATS; + ctx->max_subpic_formats = I965_MAX_SUBPIC_FORMATS; + ctx->max_display_attributes = I965_MAX_DISPLAY_ATTRIBUTES; + ctx->str_vendor = I965_STR_VENDOR; + + vtable->vaTerminate = i965_Terminate; + vtable->vaQueryConfigEntrypoints = i965_QueryConfigEntrypoints; + vtable->vaQueryConfigProfiles = i965_QueryConfigProfiles; + vtable->vaQueryConfigEntrypoints = i965_QueryConfigEntrypoints; + vtable->vaQueryConfigAttributes = i965_QueryConfigAttributes; + vtable->vaCreateConfig = i965_CreateConfig; + vtable->vaDestroyConfig = i965_DestroyConfig; + vtable->vaGetConfigAttributes = i965_GetConfigAttributes; + vtable->vaCreateSurfaces = i965_CreateSurfaces; + vtable->vaDestroySurfaces = i965_DestroySurfaces; + vtable->vaCreateContext = i965_CreateContext; + vtable->vaDestroyContext = i965_DestroyContext; + vtable->vaCreateBuffer = i965_CreateBuffer; + vtable->vaBufferSetNumElements = i965_BufferSetNumElements; + vtable->vaMapBuffer = i965_MapBuffer; + vtable->vaUnmapBuffer = i965_UnmapBuffer; + vtable->vaDestroyBuffer = i965_DestroyBuffer; + vtable->vaBeginPicture = i965_BeginPicture; + vtable->vaRenderPicture = i965_RenderPicture; + vtable->vaEndPicture = i965_EndPicture; + vtable->vaSyncSurface = i965_SyncSurface; + vtable->vaQuerySurfaceStatus = i965_QuerySurfaceStatus; + vtable->vaPutSurface = i965_PutSurface; + vtable->vaQueryImageFormats = i965_QueryImageFormats; + vtable->vaCreateImage = i965_CreateImage; + vtable->vaDeriveImage = i965_DeriveImage; + vtable->vaDestroyImage = i965_DestroyImage; + vtable->vaSetImagePalette = i965_SetImagePalette; + vtable->vaGetImage = i965_GetImage; + vtable->vaPutImage = i965_PutImage; + vtable->vaQuerySubpictureFormats = i965_QuerySubpictureFormats; + vtable->vaCreateSubpicture = i965_CreateSubpicture; + vtable->vaDestroySubpicture = i965_DestroySubpicture; + vtable->vaSetSubpictureImage = i965_SetSubpictureImage; + vtable->vaSetSubpictureChromakey = i965_SetSubpictureChromakey; + vtable->vaSetSubpictureGlobalAlpha = i965_SetSubpictureGlobalAlpha; + vtable->vaAssociateSubpicture = i965_AssociateSubpicture; + vtable->vaDeassociateSubpicture = i965_DeassociateSubpicture; + vtable->vaQueryDisplayAttributes = i965_QueryDisplayAttributes; + vtable->vaGetDisplayAttributes = i965_GetDisplayAttributes; + vtable->vaSetDisplayAttributes = i965_SetDisplayAttributes; + vtable->vaBufferInfo = i965_BufferInfo; + vtable->vaLockSurface = i965_LockSurface; + vtable->vaUnlockSurface = i965_UnlockSurface; + // vtable->vaDbgCopySurfaceToBuffer = i965_DbgCopySurfaceToBuffer; + + i965 = (struct i965_driver_data *)calloc(1, sizeof(*i965)); + assert(i965); + ctx->pDriverData = (void *)i965; + + result = object_heap_init(&i965->config_heap, + sizeof(struct object_config), + CONFIG_ID_OFFSET); + assert(result == 0); + + result = object_heap_init(&i965->context_heap, + sizeof(struct object_context), + CONTEXT_ID_OFFSET); + assert(result == 0); + + result = object_heap_init(&i965->surface_heap, + sizeof(struct object_surface), + SURFACE_ID_OFFSET); + assert(result == 0); + + result = object_heap_init(&i965->buffer_heap, + sizeof(struct object_buffer), + BUFFER_ID_OFFSET); + assert(result == 0); + + result = object_heap_init(&i965->image_heap, + sizeof(struct object_image), + IMAGE_ID_OFFSET); + assert(result == 0); + + result = object_heap_init(&i965->subpic_heap, + sizeof(struct object_subpic), + SUBPIC_ID_OFFSET); + assert(result == 0); + + return i965_Init(ctx); +} diff --git a/src/i965_drv_video.h b/src/i965_drv_video.h new file mode 100644 index 00000000..fd423bc1 --- /dev/null +++ b/src/i965_drv_video.h @@ -0,0 +1,255 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao <haihao.xiang@intel.com> + * Zou Nan hai <nanhai.zou@intel.com> + * + */ + +#ifndef _I965_DRV_VIDEO_H_ +#define _I965_DRV_VIDEO_H_ + +#include <va/va.h> +#include <va/va_backend.h> + +#include "i965_mutext.h" +#include "object_heap.h" +#include "intel_driver.h" + +#define I965_MAX_PROFILES 11 +#define I965_MAX_ENTRYPOINTS 5 +#define I965_MAX_CONFIG_ATTRIBUTES 10 +#define I965_MAX_IMAGE_FORMATS 3 +#define I965_MAX_SUBPIC_FORMATS 4 +#define I965_MAX_DISPLAY_ATTRIBUTES 4 +#define I965_STR_VENDOR "i965 Driver 0.1" + +struct i965_kernel +{ + char *name; + int interface; + const uint32_t (*bin)[4]; + int size; + dri_bo *bo; +}; + +struct buffer_store +{ + unsigned char *buffer; + dri_bo *bo; + int ref_count; + int num_elements; +}; + +struct object_config +{ + struct object_base base; + VAProfile profile; + VAEntrypoint entrypoint; + VAConfigAttrib attrib_list[I965_MAX_CONFIG_ATTRIBUTES]; + int num_attribs; +}; + +#define NUM_SLICES 10 + +struct decode_state +{ + struct buffer_store *pic_param; + struct buffer_store **slice_params; + struct buffer_store *iq_matrix; + struct buffer_store *bit_plane; + struct buffer_store **slice_datas; + VASurfaceID current_render_target; + int max_slice_params; + int max_slice_datas; + int num_slice_params; + int num_slice_datas; +}; + +struct encode_state +{ + struct buffer_store *seq_param; + struct buffer_store *pic_param; + struct buffer_store *pic_control; + struct buffer_store *iq_matrix; + struct buffer_store *q_matrix; + struct buffer_store **slice_params; + VASurfaceID current_render_target; + int max_slice_params; + int num_slice_params; +}; + +#define CODEC_DEC 0 +#define CODEC_ENC 1 + +union codec_state +{ + struct decode_state dec; + struct encode_state enc; +}; + +struct hw_context +{ + void (*run)(VADriverContextP ctx, + VAProfile profile, + union codec_state *codec_state, + struct hw_context *hw_context); + void (*destroy)(void *); + struct intel_batchbuffer *batch; +}; + +struct object_context +{ + struct object_base base; + VAContextID context_id; + VAConfigID config_id; + VASurfaceID *render_targets; //input->encode, output->decode + int num_render_targets; + int picture_width; + int picture_height; + int flags; + int codec_type; + union codec_state codec_state; + struct hw_context *hw_context; +}; + +#define SURFACE_REFERENCED (1 << 0) +#define SURFACE_DISPLAYED (1 << 1) +#define SURFACE_DERIVED (1 << 2) +#define SURFACE_REF_DIS_MASK ((SURFACE_REFERENCED) | \ + (SURFACE_DISPLAYED)) +#define SURFACE_ALL_MASK ((SURFACE_REFERENCED) | \ + (SURFACE_DISPLAYED) | \ + (SURFACE_DERIVED)) + +struct object_surface +{ + struct object_base base; + VASurfaceStatus status; + VASubpictureID subpic; + int width; + int height; + int size; + int orig_width; + int orig_height; + int flags; + unsigned int fourcc; + dri_bo *bo; + VAImageID locked_image_id; + void (*free_private_data)(void **data); + void *private_data; +}; + +struct object_buffer +{ + struct object_base base; + struct buffer_store *buffer_store; + int max_num_elements; + int num_elements; + int size_element; + VABufferType type; +}; + +struct object_image +{ + struct object_base base; + VAImage image; + dri_bo *bo; + unsigned int *palette; + VASurfaceID derived_surface; +}; + +struct object_subpic +{ + struct object_base base; + VAImageID image; + VARectangle src_rect; + VARectangle dst_rect; + unsigned int format; + int width; + int height; + int pitch; + dri_bo *bo; + unsigned int flags; +}; + +struct hw_codec_info +{ + struct hw_context *(*dec_hw_context_init)(VADriverContextP, VAProfile); + struct hw_context *(*enc_hw_context_init)(VADriverContextP, VAProfile); +}; + + +#include "i965_render.h" + +struct i965_driver_data +{ + struct intel_driver_data intel; + struct object_heap config_heap; + struct object_heap context_heap; + struct object_heap surface_heap; + struct object_heap buffer_heap; + struct object_heap image_heap; + struct object_heap subpic_heap; + struct hw_codec_info *codec_info; + + _I965Mutex render_mutex; + struct intel_batchbuffer *batch; + struct i965_render_state render_state; + void *pp_context; +}; + +#define NEW_CONFIG_ID() object_heap_allocate(&i965->config_heap); +#define NEW_CONTEXT_ID() object_heap_allocate(&i965->context_heap); +#define NEW_SURFACE_ID() object_heap_allocate(&i965->surface_heap); +#define NEW_BUFFER_ID() object_heap_allocate(&i965->buffer_heap); +#define NEW_IMAGE_ID() object_heap_allocate(&i965->image_heap); +#define NEW_SUBPIC_ID() object_heap_allocate(&i965->subpic_heap); + +#define CONFIG(id) ((struct object_config *)object_heap_lookup(&i965->config_heap, id)) +#define CONTEXT(id) ((struct object_context *)object_heap_lookup(&i965->context_heap, id)) +#define SURFACE(id) ((struct object_surface *)object_heap_lookup(&i965->surface_heap, id)) +#define BUFFER(id) ((struct object_buffer *)object_heap_lookup(&i965->buffer_heap, id)) +#define IMAGE(id) ((struct object_image *)object_heap_lookup(&i965->image_heap, id)) +#define SUBPIC(id) ((struct object_subpic *)object_heap_lookup(&i965->subpic_heap, id)) + +#define FOURCC_IA44 0x34344149 +#define FOURCC_AI44 0x34344941 + +#define STRIDE(w) (((w) + 0xf) & ~0xf) +#define SIZE_YUV420(w, h) (h * (STRIDE(w) + STRIDE(w >> 1))) + +static INLINE struct i965_driver_data * +i965_driver_data(VADriverContextP ctx) +{ + return (struct i965_driver_data *)(ctx->pDriverData); +} + +void +i965_check_alloc_surface_bo(VADriverContextP ctx, + struct object_surface *obj_surface, + int tiled, + unsigned int fourcc); + +#endif /* _I965_DRV_VIDEO_H_ */ diff --git a/src/i965_encoder.c b/src/i965_encoder.c new file mode 100644 index 00000000..0b1efefb --- /dev/null +++ b/src/i965_encoder.c @@ -0,0 +1,83 @@ +/* + * Copyright © 2010 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Zhou Chang <chang.zhou@intel.com> + * + */ + +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <assert.h> + +#include <va/va_backend.h> + +#include "intel_batchbuffer.h" +#include "intel_driver.h" + +#include "i965_defines.h" +#include "i965_drv_video.h" +#include "i965_encoder.h" + +static void +gen6_encoder_end_picture(VADriverContextP ctx, + VAProfile profile, + union codec_state *codec_state, + struct hw_context *hw_context) +{ + struct gen6_encoder_context *gen6_encoder_context = (struct gen6_encoder_context *)hw_context; + struct encode_state *encode_state = &codec_state->enc; + VAStatus vaStatus; + + vaStatus = gen6_vme_pipeline(ctx, profile, encode_state, gen6_encoder_context); + + if (vaStatus == VA_STATUS_SUCCESS) + gen6_mfc_pipeline(ctx, profile, encode_state, gen6_encoder_context); +} +static void +gen6_encoder_context_destroy(void *hw_context) +{ + struct gen6_encoder_context *gen6_encoder_context = (struct gen6_encoder_context *)hw_context; + + gen6_mfc_context_destroy(&gen6_encoder_context->mfc_context); + gen6_vme_context_destroy(&gen6_encoder_context->vme_context); + intel_batchbuffer_free(gen6_encoder_context->base.batch); + free(gen6_encoder_context); +} + +struct hw_context * +gen6_enc_hw_context_init(VADriverContextP ctx, VAProfile profile) +{ + struct intel_driver_data *intel = intel_driver_data(ctx); + struct gen6_encoder_context *gen6_encoder_context = calloc(1, sizeof(struct gen6_encoder_context)); + + gen6_encoder_context->base.destroy = gen6_encoder_context_destroy; + gen6_encoder_context->base.run = gen6_encoder_end_picture; + gen6_encoder_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER); + + gen6_vme_context_init(ctx, &gen6_encoder_context->vme_context); + gen6_mfc_context_init(ctx, &gen6_encoder_context->mfc_context); + + return (struct hw_context *)gen6_encoder_context; +} diff --git a/src/i965_encoder.h b/src/i965_encoder.h new file mode 100644 index 00000000..555efe34 --- /dev/null +++ b/src/i965_encoder.h @@ -0,0 +1,51 @@ +/* + * Copyright © 2010 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Zhou chang <chang.zhou@intel.com> + * + */ + +#ifndef _I965_ENCODER_H_ +#define _I965_ENCODER_H_ + +#include <xf86drm.h> +#include <drm.h> +#include <i915_drm.h> +#include <intel_bufmgr.h> +#include "i965_structs.h" +#include "i965_drv_video.h" + +#include "gen6_vme.h" +#include "gen6_mfc.h" + +struct gen6_encoder_context +{ + struct hw_context base; + struct gen6_vme_context vme_context; + struct gen6_mfc_context mfc_context; +}; + +#endif /* _I965_ENCODER_H_ */ + + diff --git a/src/i965_media.c b/src/i965_media.c new file mode 100644 index 00000000..d6a56d2f --- /dev/null +++ b/src/i965_media.c @@ -0,0 +1,386 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao <haihao.xiang@intel.com> + * Zou Nan hai <nanhai.zou@intel.com> + * + */ + +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <assert.h> + +#include <va/va_backend.h> + +#include "intel_batchbuffer.h" +#include "intel_driver.h" +#include "i965_defines.h" +#include "i965_drv_video.h" + +#include "i965_media.h" +#include "i965_media_mpeg2.h" +#include "i965_media_h264.h" + +static void +i965_media_pipeline_select(VADriverContextP ctx, struct i965_media_context *media_context) +{ + struct intel_batchbuffer *batch = media_context->base.batch; + + BEGIN_BATCH(batch, 1); + OUT_BATCH(batch, CMD_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA); + ADVANCE_BATCH(batch); +} + +static void +i965_media_urb_layout(VADriverContextP ctx, struct i965_media_context *media_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = media_context->base.batch; + unsigned int vfe_fence, cs_fence; + + vfe_fence = media_context->urb.cs_start; + cs_fence = URB_SIZE((&i965->intel)); + + BEGIN_BATCH(batch, 3); + OUT_BATCH(batch, CMD_URB_FENCE | UF0_VFE_REALLOC | UF0_CS_REALLOC | 1); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, + (vfe_fence << UF2_VFE_FENCE_SHIFT) | /* VFE_SIZE */ + (cs_fence << UF2_CS_FENCE_SHIFT)); /* CS_SIZE */ + ADVANCE_BATCH(batch); +} + +static void +i965_media_state_base_address(VADriverContextP ctx, struct i965_media_context *media_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = media_context->base.batch; + + if (IS_IRONLAKE(i965->intel.device_id)) { + BEGIN_BATCH(batch, 8); + OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | 6); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + + if (media_context->indirect_object.bo) { + OUT_RELOC(batch, media_context->indirect_object.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, + media_context->indirect_object.offset | BASE_ADDRESS_MODIFY); + } else { + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + } + + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + ADVANCE_BATCH(batch); + } else { + BEGIN_BATCH(batch, 6); + OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | 4); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + + if (media_context->indirect_object.bo) { + OUT_RELOC(batch, media_context->indirect_object.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, + media_context->indirect_object.offset | BASE_ADDRESS_MODIFY); + } else { + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + } + + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + ADVANCE_BATCH(batch); + } +} + +static void +i965_media_state_pointers(VADriverContextP ctx, struct i965_media_context *media_context) +{ + struct intel_batchbuffer *batch = media_context->base.batch; + + BEGIN_BATCH(batch, 3); + OUT_BATCH(batch, CMD_MEDIA_STATE_POINTERS | 1); + + if (media_context->extended_state.enabled) + OUT_RELOC(batch, media_context->extended_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 1); + else + OUT_BATCH(batch, 0); + + OUT_RELOC(batch, media_context->vfe_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + ADVANCE_BATCH(batch); +} + +static void +i965_media_cs_urb_layout(VADriverContextP ctx, struct i965_media_context *media_context) +{ + struct intel_batchbuffer *batch = media_context->base.batch; + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, CMD_CS_URB_STATE | 0); + OUT_BATCH(batch, + ((media_context->urb.size_cs_entry - 1) << 4) | /* URB Entry Allocation Size */ + (media_context->urb.num_cs_entries << 0)); /* Number of URB Entries */ + ADVANCE_BATCH(batch); +} + +static void +i965_media_pipeline_state(VADriverContextP ctx, struct i965_media_context *media_context) +{ + i965_media_state_base_address(ctx, media_context); + i965_media_state_pointers(ctx, media_context); + i965_media_cs_urb_layout(ctx, media_context); +} + +static void +i965_media_constant_buffer(VADriverContextP ctx, struct decode_state *decode_state, struct i965_media_context *media_context) +{ + struct intel_batchbuffer *batch = media_context->base.batch; + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, CMD_CONSTANT_BUFFER | (1 << 8) | (2 - 2)); + OUT_RELOC(batch, media_context->curbe.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + media_context->urb.size_cs_entry - 1); + ADVANCE_BATCH(batch); +} + +static void +i965_media_depth_buffer(VADriverContextP ctx, struct i965_media_context *media_context) +{ + struct intel_batchbuffer *batch = media_context->base.batch; + + BEGIN_BATCH(batch, 6); + OUT_BATCH(batch, CMD_DEPTH_BUFFER | 4); + OUT_BATCH(batch, (I965_DEPTHFORMAT_D32_FLOAT << 18) | + (I965_SURFACE_NULL << 29)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); +} + +static void +i965_media_pipeline_setup(VADriverContextP ctx, + struct decode_state *decode_state, + struct i965_media_context *media_context) +{ + struct intel_batchbuffer *batch = media_context->base.batch; + + intel_batchbuffer_start_atomic(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); /* step 1 */ + i965_media_depth_buffer(ctx, media_context); + i965_media_pipeline_select(ctx, media_context); /* step 2 */ + i965_media_urb_layout(ctx, media_context); /* step 3 */ + i965_media_pipeline_state(ctx, media_context); /* step 4 */ + i965_media_constant_buffer(ctx, decode_state, media_context); /* step 5 */ + assert(media_context->media_objects); + media_context->media_objects(ctx, decode_state, media_context); /* step 6 */ + intel_batchbuffer_end_atomic(batch); +} + +static void +i965_media_decode_init(VADriverContextP ctx, + VAProfile profile, + struct decode_state *decode_state, + struct i965_media_context *media_context) +{ + int i; + struct i965_driver_data *i965 = i965_driver_data(ctx); + dri_bo *bo; + + /* constant buffer */ + dri_bo_unreference(media_context->curbe.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "constant buffer", + 4096, 64); + assert(bo); + media_context->curbe.bo = bo; + + /* surface state */ + for (i = 0; i < MAX_MEDIA_SURFACES; i++) { + dri_bo_unreference(media_context->surface_state[i].bo); + media_context->surface_state[i].bo = NULL; + } + + /* binding table */ + dri_bo_unreference(media_context->binding_table.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "binding table", + MAX_MEDIA_SURFACES * sizeof(unsigned int), 32); + assert(bo); + media_context->binding_table.bo = bo; + + /* interface descriptor remapping table */ + dri_bo_unreference(media_context->idrt.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "interface discriptor", + MAX_INTERFACE_DESC * sizeof(struct i965_interface_descriptor), 16); + assert(bo); + media_context->idrt.bo = bo; + + /* vfe state */ + dri_bo_unreference(media_context->vfe_state.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "vfe state", + sizeof(struct i965_vfe_state), 32); + assert(bo); + media_context->vfe_state.bo = bo; + + /* extended state */ + media_context->extended_state.enabled = 0; + + switch (profile) { + case VAProfileMPEG2Simple: + case VAProfileMPEG2Main: + i965_media_mpeg2_decode_init(ctx, decode_state, media_context); + break; + + case VAProfileH264Baseline: + case VAProfileH264Main: + case VAProfileH264High: + i965_media_h264_decode_init(ctx, decode_state, media_context); + break; + + default: + assert(0); + break; + } +} + +static void +i965_media_decode_picture(VADriverContextP ctx, + VAProfile profile, + union codec_state *codec_state, + struct hw_context *hw_context) +{ + struct i965_media_context *media_context = (struct i965_media_context *)hw_context; + struct decode_state *decode_state = &codec_state->dec; + + i965_media_decode_init(ctx, profile, decode_state, media_context); + assert(media_context->media_states_setup); + media_context->media_states_setup(ctx, decode_state, media_context); + i965_media_pipeline_setup(ctx, decode_state, media_context); + intel_batchbuffer_flush(hw_context->batch); +} + +static void +i965_media_context_destroy(void *hw_context) +{ + struct i965_media_context *media_context = (struct i965_media_context *)hw_context; + int i; + + if (media_context->free_private_context) + media_context->free_private_context(&media_context->private_context); + + for (i = 0; i < MAX_MEDIA_SURFACES; i++) { + dri_bo_unreference(media_context->surface_state[i].bo); + media_context->surface_state[i].bo = NULL; + } + + dri_bo_unreference(media_context->extended_state.bo); + media_context->extended_state.bo = NULL; + + dri_bo_unreference(media_context->vfe_state.bo); + media_context->vfe_state.bo = NULL; + + dri_bo_unreference(media_context->idrt.bo); + media_context->idrt.bo = NULL; + + dri_bo_unreference(media_context->binding_table.bo); + media_context->binding_table.bo = NULL; + + dri_bo_unreference(media_context->curbe.bo); + media_context->curbe.bo = NULL; + + dri_bo_unreference(media_context->indirect_object.bo); + media_context->indirect_object.bo = NULL; + + intel_batchbuffer_free(media_context->base.batch); + free(media_context); +} + +struct hw_context * +g4x_dec_hw_context_init(VADriverContextP ctx, VAProfile profile) +{ + struct intel_driver_data *intel = intel_driver_data(ctx); + struct i965_media_context *media_context = calloc(1, sizeof(struct i965_media_context)); + + media_context->base.destroy = i965_media_context_destroy; + media_context->base.run = i965_media_decode_picture; + media_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER); + + switch (profile) { + case VAProfileMPEG2Simple: + case VAProfileMPEG2Main: + i965_media_mpeg2_dec_context_init(ctx, media_context); + break; + + case VAProfileH264Baseline: + case VAProfileH264Main: + case VAProfileH264High: + case VAProfileVC1Simple: + case VAProfileVC1Main: + case VAProfileVC1Advanced: + default: + assert(0); + break; + } + + return (struct hw_context *)media_context; +} + +struct hw_context * +ironlake_dec_hw_context_init(VADriverContextP ctx, VAProfile profile) +{ + struct intel_driver_data *intel = intel_driver_data(ctx); + struct i965_media_context *media_context = calloc(1, sizeof(struct i965_media_context)); + + media_context->base.destroy = i965_media_context_destroy; + media_context->base.run = i965_media_decode_picture; + media_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER); + + switch (profile) { + case VAProfileMPEG2Simple: + case VAProfileMPEG2Main: + i965_media_mpeg2_dec_context_init(ctx, media_context); + break; + + case VAProfileH264Baseline: + case VAProfileH264Main: + case VAProfileH264High: + i965_media_h264_dec_context_init(ctx, media_context); + break; + + case VAProfileVC1Simple: + case VAProfileVC1Main: + case VAProfileVC1Advanced: + default: + assert(0); + break; + } + + return (struct hw_context *)media_context; +} diff --git a/src/i965_media.h b/src/i965_media.h new file mode 100644 index 00000000..e309d5b5 --- /dev/null +++ b/src/i965_media.h @@ -0,0 +1,96 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao <haihao.xiang@intel.com> + * Zou Nan hai <nanhai.zou@intel.com> + * + */ + +#ifndef _I965_MEDIA_H_ +#define _I965_MEDIA_H_ + +#include <xf86drm.h> +#include <drm.h> +#include <i915_drm.h> +#include <intel_bufmgr.h> + +#include "i965_structs.h" + +#define MAX_INTERFACE_DESC 16 +#define MAX_MEDIA_SURFACES 34 + +struct decode_state; + +struct i965_media_context +{ + struct hw_context base; + + struct { + dri_bo *bo; + } surface_state[MAX_MEDIA_SURFACES]; + + struct { + dri_bo *bo; + } binding_table; + + struct { + dri_bo *bo; + } idrt; /* interface descriptor remap table */ + + struct { + dri_bo *bo; + int enabled; + } extended_state; + + struct { + dri_bo *bo; + } vfe_state; + + struct { + dri_bo *bo; + } curbe; + + struct { + dri_bo *bo; + unsigned long offset; + } indirect_object; + + struct { + unsigned int vfe_start; + unsigned int cs_start; + + unsigned int num_vfe_entries; + unsigned int num_cs_entries; + + unsigned int size_vfe_entry; + unsigned int size_cs_entry; + } urb; + + void *private_context; + void (*media_states_setup)(VADriverContextP ctx, struct decode_state *decode_state, struct i965_media_context *media_context); + void (*media_objects)(VADriverContextP ctx, struct decode_state *decode_state, struct i965_media_context *media_context); + void (*free_private_context)(void **data); +}; + +#endif /* _I965_MEDIA_H_ */ diff --git a/src/i965_media_h264.c b/src/i965_media_h264.c new file mode 100644 index 00000000..ddc43de5 --- /dev/null +++ b/src/i965_media_h264.c @@ -0,0 +1,913 @@ +#include <stdlib.h> +#include <stdio.h> +#include <string.h> +#include <assert.h> + +#include "va_backend.h" + +#include "intel_batchbuffer.h" +#include "intel_driver.h" + +#include "i965_defines.h" +#include "i965_drv_video.h" +#include "i965_media.h" +#include "i965_media_h264.h" + +enum { + INTRA_16X16 = 0, + INTRA_8X8, + INTRA_4X4, + INTRA_PCM, + FRAMEMB_MOTION, + FIELDMB_MOTION, + MBAFF_MOTION, +}; + +struct intra_kernel_header +{ + /* R1.0 */ + unsigned char intra_4x4_luma_mode_0_offset; + unsigned char intra_4x4_luma_mode_1_offset; + unsigned char intra_4x4_luma_mode_2_offset; + unsigned char intra_4x4_luma_mode_3_offset; + /* R1.1 */ + unsigned char intra_4x4_luma_mode_4_offset; + unsigned char intra_4x4_luma_mode_5_offset; + unsigned char intra_4x4_luma_mode_6_offset; + unsigned char intra_4x4_luma_mode_7_offset; + /* R1.2 */ + unsigned char intra_4x4_luma_mode_8_offset; + unsigned char pad0; + unsigned short top_reference_offset; + /* R1.3 */ + unsigned char intra_8x8_luma_mode_0_offset; + unsigned char intra_8x8_luma_mode_1_offset; + unsigned char intra_8x8_luma_mode_2_offset; + unsigned char intra_8x8_luma_mode_3_offset; + /* R1.4 */ + unsigned char intra_8x8_luma_mode_4_offset; + unsigned char intra_8x8_luma_mode_5_offset; + unsigned char intra_8x8_luma_mode_6_offset; + unsigned char intra_8x8_luma_mode_7_offset; + /* R1.5 */ + unsigned char intra_8x8_luma_mode_8_offset; + unsigned char pad1; + unsigned short const_reverse_data_transfer_intra_8x8; + /* R1.6 */ + unsigned char intra_16x16_luma_mode_0_offset; + unsigned char intra_16x16_luma_mode_1_offset; + unsigned char intra_16x16_luma_mode_2_offset; + unsigned char intra_16x16_luma_mode_3_offset; + /* R1.7 */ + unsigned char intra_chroma_mode_0_offset; + unsigned char intra_chroma_mode_1_offset; + unsigned char intra_chroma_mode_2_offset; + unsigned char intra_chroma_mode_3_offset; + /* R2.0 */ + unsigned int const_intra_16x16_plane_0; + /* R2.1 */ + unsigned int const_intra_16x16_chroma_plane_0; + /* R2.2 */ + unsigned int const_intra_16x16_chroma_plane_1; + /* R2.3 */ + unsigned int const_intra_16x16_plane_1; + /* R2.4 */ + unsigned int left_shift_count_reverse_dw_ordering; + /* R2.5 */ + unsigned int const_reverse_data_transfer_intra_4x4; + /* R2.6 */ + unsigned int intra_4x4_pred_mode_offset; +}; + +struct inter_kernel_header +{ + unsigned short weight_offset; + unsigned char weight_offset_flag; + unsigned char pad0; +}; + +#include "shaders/h264/mc/export.inc" +static unsigned long avc_mc_kernel_offset_gen4[] = { + INTRA_16x16_IP * INST_UNIT_GEN4, + INTRA_8x8_IP * INST_UNIT_GEN4, + INTRA_4x4_IP * INST_UNIT_GEN4, + INTRA_PCM_IP * INST_UNIT_GEN4, + FRAME_MB_IP * INST_UNIT_GEN4, + FIELD_MB_IP * INST_UNIT_GEN4, + MBAFF_MB_IP * INST_UNIT_GEN4 +}; + +struct intra_kernel_header intra_kernel_header_gen4 = { + 0, + (INTRA_4X4_HORIZONTAL_IP - INTRA_4X4_VERTICAL_IP), + (INTRA_4X4_DC_IP - INTRA_4X4_VERTICAL_IP), + (INTRA_4X4_DIAG_DOWN_LEFT_IP - INTRA_4X4_VERTICAL_IP), + + (INTRA_4X4_DIAG_DOWN_RIGHT_IP - INTRA_4X4_VERTICAL_IP), + (INTRA_4X4_VERT_RIGHT_IP - INTRA_4X4_VERTICAL_IP), + (INTRA_4X4_HOR_DOWN_IP - INTRA_4X4_VERTICAL_IP), + (INTRA_4X4_VERT_LEFT_IP - INTRA_4X4_VERTICAL_IP), + + (INTRA_4X4_HOR_UP_IP - INTRA_4X4_VERTICAL_IP), + 0, + 0xFFFC, + + 0, + (INTRA_8X8_HORIZONTAL_IP - INTRA_8X8_VERTICAL_IP), + (INTRA_8X8_DC_IP - INTRA_8X8_VERTICAL_IP), + (INTRA_8X8_DIAG_DOWN_LEFT_IP - INTRA_8X8_VERTICAL_IP), + + (INTRA_8X8_DIAG_DOWN_RIGHT_IP - INTRA_8X8_VERTICAL_IP), + (INTRA_8X8_VERT_RIGHT_IP - INTRA_8X8_VERTICAL_IP), + (INTRA_8X8_HOR_DOWN_IP - INTRA_8X8_VERTICAL_IP), + (INTRA_8X8_VERT_LEFT_IP - INTRA_8X8_VERTICAL_IP), + + (INTRA_8X8_HOR_UP_IP - INTRA_8X8_VERTICAL_IP), + 0, + 0x0001, + + 0, + (INTRA_16x16_HORIZONTAL_IP - INTRA_16x16_VERTICAL_IP), + (INTRA_16x16_DC_IP - INTRA_16x16_VERTICAL_IP), + (INTRA_16x16_PLANE_IP - INTRA_16x16_VERTICAL_IP), + + 0, + (INTRA_CHROMA_HORIZONTAL_IP - INTRA_CHROMA_DC_IP), + (INTRA_CHROMA_VERTICAL_IP - INTRA_CHROMA_DC_IP), + (INTRA_Chroma_PLANE_IP - INTRA_CHROMA_DC_IP), + + 0xFCFBFAF9, + + 0x00FFFEFD, + + 0x04030201, + + 0x08070605, + + 0x18100800, + + 0x00020406, + + (intra_Pred_4x4_Y_IP - ADD_ERROR_SB3_IP) * 0x1000000 + + (intra_Pred_4x4_Y_IP - ADD_ERROR_SB2_IP) * 0x10000 + + (intra_Pred_4x4_Y_IP - ADD_ERROR_SB1_IP) * 0x100 + + (intra_Pred_4x4_Y_IP - ADD_ERROR_SB0_IP) +}; + +static const uint32_t h264_avc_combined_gen4[][4] = { +#include "shaders/h264/mc/avc_mc.g4b" +}; + +static const uint32_t h264_avc_null_gen4[][4] = { +#include "shaders/h264/mc/null.g4b" +}; + +static struct i965_kernel h264_avc_kernels_gen4[] = { + { + "AVC combined kernel", + H264_AVC_COMBINED, + h264_avc_combined_gen4, + sizeof(h264_avc_combined_gen4), + NULL + }, + + { + "NULL kernel", + H264_AVC_NULL, + h264_avc_null_gen4, + sizeof(h264_avc_null_gen4), + NULL + } +}; + +/* On Ironlake */ +#include "shaders/h264/mc/export.inc.gen5" +static unsigned long avc_mc_kernel_offset_gen5[] = { + INTRA_16x16_IP_GEN5 * INST_UNIT_GEN5, + INTRA_8x8_IP_GEN5 * INST_UNIT_GEN5, + INTRA_4x4_IP_GEN5 * INST_UNIT_GEN5, + INTRA_PCM_IP_GEN5 * INST_UNIT_GEN5, + FRAME_MB_IP_GEN5 * INST_UNIT_GEN5, + FIELD_MB_IP_GEN5 * INST_UNIT_GEN5, + MBAFF_MB_IP_GEN5 * INST_UNIT_GEN5 +}; + +struct intra_kernel_header intra_kernel_header_gen5 = { + 0, + (INTRA_4X4_HORIZONTAL_IP_GEN5 - INTRA_4X4_VERTICAL_IP_GEN5), + (INTRA_4X4_DC_IP_GEN5 - INTRA_4X4_VERTICAL_IP_GEN5), + (INTRA_4X4_DIAG_DOWN_LEFT_IP_GEN5 - INTRA_4X4_VERTICAL_IP_GEN5), + + (INTRA_4X4_DIAG_DOWN_RIGHT_IP_GEN5 - INTRA_4X4_VERTICAL_IP_GEN5), + (INTRA_4X4_VERT_RIGHT_IP_GEN5 - INTRA_4X4_VERTICAL_IP_GEN5), + (INTRA_4X4_HOR_DOWN_IP_GEN5 - INTRA_4X4_VERTICAL_IP_GEN5), + (INTRA_4X4_VERT_LEFT_IP_GEN5 - INTRA_4X4_VERTICAL_IP_GEN5), + + (INTRA_4X4_HOR_UP_IP_GEN5 - INTRA_4X4_VERTICAL_IP_GEN5), + 0, + 0xFFFC, + + 0, + (INTRA_8X8_HORIZONTAL_IP_GEN5 - INTRA_8X8_VERTICAL_IP_GEN5), + (INTRA_8X8_DC_IP_GEN5 - INTRA_8X8_VERTICAL_IP_GEN5), + (INTRA_8X8_DIAG_DOWN_LEFT_IP_GEN5 - INTRA_8X8_VERTICAL_IP_GEN5), + + (INTRA_8X8_DIAG_DOWN_RIGHT_IP_GEN5 - INTRA_8X8_VERTICAL_IP_GEN5), + (INTRA_8X8_VERT_RIGHT_IP_GEN5 - INTRA_8X8_VERTICAL_IP_GEN5), + (INTRA_8X8_HOR_DOWN_IP_GEN5 - INTRA_8X8_VERTICAL_IP_GEN5), + (INTRA_8X8_VERT_LEFT_IP_GEN5 - INTRA_8X8_VERTICAL_IP_GEN5), + + (INTRA_8X8_HOR_UP_IP_GEN5 - INTRA_8X8_VERTICAL_IP_GEN5), + 0, + 0x0001, + + 0, + (INTRA_16x16_HORIZONTAL_IP_GEN5 - INTRA_16x16_VERTICAL_IP_GEN5), + (INTRA_16x16_DC_IP_GEN5 - INTRA_16x16_VERTICAL_IP_GEN5), + (INTRA_16x16_PLANE_IP_GEN5 - INTRA_16x16_VERTICAL_IP_GEN5), + + 0, + (INTRA_CHROMA_HORIZONTAL_IP_GEN5 - INTRA_CHROMA_DC_IP_GEN5), + (INTRA_CHROMA_VERTICAL_IP_GEN5 - INTRA_CHROMA_DC_IP_GEN5), + (INTRA_Chroma_PLANE_IP_GEN5 - INTRA_CHROMA_DC_IP_GEN5), + + 0xFCFBFAF9, + + 0x00FFFEFD, + + 0x04030201, + + 0x08070605, + + 0x18100800, + + 0x00020406, + + (intra_Pred_4x4_Y_IP_GEN5 - ADD_ERROR_SB3_IP_GEN5) * 0x1000000 + + (intra_Pred_4x4_Y_IP_GEN5 - ADD_ERROR_SB2_IP_GEN5) * 0x10000 + + (intra_Pred_4x4_Y_IP_GEN5 - ADD_ERROR_SB1_IP_GEN5) * 0x100 + + (intra_Pred_4x4_Y_IP_GEN5 - ADD_ERROR_SB0_IP_GEN5) +}; + +static const uint32_t h264_avc_combined_gen5[][4] = { +#include "shaders/h264/mc/avc_mc.g4b.gen5" +}; + +static const uint32_t h264_avc_null_gen5[][4] = { +#include "shaders/h264/mc/null.g4b.gen5" +}; + +static struct i965_kernel h264_avc_kernels_gen5[] = { + { + "AVC combined kernel", + H264_AVC_COMBINED, + h264_avc_combined_gen5, + sizeof(h264_avc_combined_gen5), + NULL + }, + + { + "NULL kernel", + H264_AVC_NULL, + h264_avc_null_gen5, + sizeof(h264_avc_null_gen5), + NULL + } +}; + +#define NUM_AVC_MC_INTERFACES (sizeof(avc_mc_kernel_offset_gen4) / sizeof(avc_mc_kernel_offset_gen4[0])) +static unsigned long *avc_mc_kernel_offset = NULL; + +static struct intra_kernel_header *intra_kernel_header = NULL; + +static void +i965_media_h264_surface_state(VADriverContextP ctx, + int index, + struct object_surface *obj_surface, + unsigned long offset, + int w, int h, int pitch, + Bool is_dst, + int vert_line_stride, + int vert_line_stride_ofs, + int format, + struct i965_media_context *media_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_surface_state *ss; + dri_bo *bo; + uint32_t write_domain, read_domain; + + assert(obj_surface->bo); + + bo = dri_bo_alloc(i965->intel.bufmgr, + "surface state", + sizeof(struct i965_surface_state), 32); + assert(bo); + dri_bo_map(bo, 1); + assert(bo->virtual); + ss = bo->virtual; + memset(ss, 0, sizeof(*ss)); + ss->ss0.surface_type = I965_SURFACE_2D; + ss->ss0.surface_format = format; + ss->ss0.vert_line_stride = vert_line_stride; + ss->ss0.vert_line_stride_ofs = vert_line_stride_ofs; + ss->ss1.base_addr = obj_surface->bo->offset + offset; + ss->ss2.width = w - 1; + ss->ss2.height = h - 1; + ss->ss3.pitch = pitch - 1; + + if (is_dst) { + write_domain = I915_GEM_DOMAIN_RENDER; + read_domain = I915_GEM_DOMAIN_RENDER; + } else { + write_domain = 0; + read_domain = I915_GEM_DOMAIN_SAMPLER; + } + + dri_bo_emit_reloc(bo, + read_domain, write_domain, + offset, + offsetof(struct i965_surface_state, ss1), + obj_surface->bo); + dri_bo_unmap(bo); + + assert(index < MAX_MEDIA_SURFACES); + media_context->surface_state[index].bo = bo; +} + +static void +i965_media_h264_surfaces_setup(VADriverContextP ctx, + struct decode_state *decode_state, + struct i965_media_context *media_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_h264_context *i965_h264_context; + struct object_surface *obj_surface; + VAPictureParameterBufferH264 *pic_param; + VAPictureH264 *va_pic; + int i, j, w, h; + int field_picture; + + assert(media_context->private_context); + i965_h264_context = (struct i965_h264_context *)media_context->private_context; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; + + /* Target Picture */ + va_pic = &pic_param->CurrPic; + assert(!(va_pic->flags & VA_PICTURE_H264_INVALID)); + obj_surface = SURFACE(va_pic->picture_id); + assert(obj_surface); + w = obj_surface->width; + h = obj_surface->height; + field_picture = !!(va_pic->flags & (VA_PICTURE_H264_TOP_FIELD | VA_PICTURE_H264_BOTTOM_FIELD)); + i965_media_h264_surface_state(ctx, 0, obj_surface, + 0, w / 4, h / (1 + field_picture), w, + 1, + field_picture, + !!(va_pic->flags & VA_PICTURE_H264_BOTTOM_FIELD), + I965_SURFACEFORMAT_R8_SINT, /* Y */ + media_context); + i965_media_h264_surface_state(ctx, 1, obj_surface, + w * h, w / 4, h / 2 / (1 + field_picture), w, + 1, + field_picture, + !!(va_pic->flags & VA_PICTURE_H264_BOTTOM_FIELD), + I965_SURFACEFORMAT_R8G8_SINT, /* INTERLEAVED U/V */ + media_context); + + /* Reference Pictures */ + for (i = 0; i < ARRAY_ELEMS(i965_h264_context->fsid_list); i++) { + if (i965_h264_context->fsid_list[i].surface_id != VA_INVALID_ID) { + int found = 0; + for (j = 0; j < ARRAY_ELEMS(pic_param->ReferenceFrames); j++) { + va_pic = &pic_param->ReferenceFrames[j]; + + if (va_pic->flags & VA_PICTURE_H264_INVALID) + continue; + + if (va_pic->picture_id == i965_h264_context->fsid_list[i].surface_id) { + found = 1; + break; + } + } + + assert(found == 1); + + obj_surface = SURFACE(va_pic->picture_id); + assert(obj_surface); + w = obj_surface->width; + h = obj_surface->height; + field_picture = !!(va_pic->flags & (VA_PICTURE_H264_TOP_FIELD | VA_PICTURE_H264_BOTTOM_FIELD)); + i965_media_h264_surface_state(ctx, 2 + i, obj_surface, + 0, w / 4, h / (1 + field_picture), w, + 0, + field_picture, + !!(va_pic->flags & VA_PICTURE_H264_BOTTOM_FIELD), + I965_SURFACEFORMAT_R8_SINT, /* Y */ + media_context); + i965_media_h264_surface_state(ctx, 18 + i, obj_surface, + w * h, w / 4, h / 2 / (1 + field_picture), w, + 0, + field_picture, + !!(va_pic->flags & VA_PICTURE_H264_BOTTOM_FIELD), + I965_SURFACEFORMAT_R8G8_SINT, /* INTERLEAVED U/V */ + media_context); + } + } +} + +static void +i965_media_h264_binding_table(VADriverContextP ctx, struct i965_media_context *media_context) +{ + int i; + unsigned int *binding_table; + dri_bo *bo = media_context->binding_table.bo; + + dri_bo_map(bo, 1); + assert(bo->virtual); + binding_table = bo->virtual; + memset(binding_table, 0, bo->size); + + for (i = 0; i < MAX_MEDIA_SURFACES; i++) { + if (media_context->surface_state[i].bo) { + binding_table[i] = media_context->surface_state[i].bo->offset; + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0, + i * sizeof(*binding_table), + media_context->surface_state[i].bo); + } + } + + dri_bo_unmap(media_context->binding_table.bo); +} + +static void +i965_media_h264_interface_descriptor_remap_table(VADriverContextP ctx, struct i965_media_context *media_context) +{ + struct i965_h264_context *i965_h264_context = (struct i965_h264_context *)media_context->private_context; + struct i965_interface_descriptor *desc; + int i; + dri_bo *bo; + + bo = media_context->idrt.bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + desc = bo->virtual; + + for (i = 0; i < NUM_AVC_MC_INTERFACES; i++) { + int kernel_offset = avc_mc_kernel_offset[i]; + memset(desc, 0, sizeof(*desc)); + desc->desc0.grf_reg_blocks = 7; + desc->desc0.kernel_start_pointer = (i965_h264_context->avc_kernels[H264_AVC_COMBINED].bo->offset + kernel_offset) >> 6; /* reloc */ + desc->desc1.const_urb_entry_read_offset = 0; + desc->desc1.const_urb_entry_read_len = 2; + desc->desc3.binding_table_entry_count = 0; + desc->desc3.binding_table_pointer = + media_context->binding_table.bo->offset >> 5; /*reloc */ + + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + desc->desc0.grf_reg_blocks + kernel_offset, + i * sizeof(*desc) + offsetof(struct i965_interface_descriptor, desc0), + i965_h264_context->avc_kernels[H264_AVC_COMBINED].bo); + + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + desc->desc3.binding_table_entry_count, + i * sizeof(*desc) + offsetof(struct i965_interface_descriptor, desc3), + media_context->binding_table.bo); + desc++; + } + + dri_bo_unmap(bo); +} + +static void +i965_media_h264_vfe_state(VADriverContextP ctx, struct i965_media_context *media_context) +{ + struct i965_vfe_state *vfe_state; + dri_bo *bo; + + bo = media_context->vfe_state.bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + vfe_state = bo->virtual; + memset(vfe_state, 0, sizeof(*vfe_state)); + vfe_state->vfe0.extend_vfe_state_present = 1; + vfe_state->vfe1.max_threads = media_context->urb.num_vfe_entries - 1; + vfe_state->vfe1.urb_entry_alloc_size = media_context->urb.size_vfe_entry - 1; + vfe_state->vfe1.num_urb_entries = media_context->urb.num_vfe_entries; + vfe_state->vfe1.vfe_mode = VFE_AVC_IT_MODE; + vfe_state->vfe1.children_present = 0; + vfe_state->vfe2.interface_descriptor_base = + media_context->idrt.bo->offset >> 4; /* reloc */ + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0, + offsetof(struct i965_vfe_state, vfe2), + media_context->idrt.bo); + dri_bo_unmap(bo); +} + +static void +i965_media_h264_vfe_state_extension(VADriverContextP ctx, + struct decode_state *decode_state, + struct i965_media_context *media_context) +{ + struct i965_h264_context *i965_h264_context; + struct i965_vfe_state_ex *vfe_state_ex; + VAPictureParameterBufferH264 *pic_param; + int mbaff_frame_flag; + + assert(media_context->private_context); + i965_h264_context = (struct i965_h264_context *)media_context->private_context; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; + mbaff_frame_flag = (pic_param->seq_fields.bits.mb_adaptive_frame_field_flag && + !pic_param->pic_fields.bits.field_pic_flag); + + assert(media_context->extended_state.bo); + dri_bo_map(media_context->extended_state.bo, 1); + assert(media_context->extended_state.bo->virtual); + vfe_state_ex = media_context->extended_state.bo->virtual; + memset(vfe_state_ex, 0, sizeof(*vfe_state_ex)); + + /* + * Indirect data buffer: + * -------------------------------------------------------- + * | Motion Vectors | Weight/Offset data | Residual data | + * -------------------------------------------------------- + * R4-R7: Motion Vectors + * R8-R9: Weight/Offset + * R10-R33: Residual data + */ + vfe_state_ex->vfex1.avc.residual_data_fix_offset_flag = !!RESIDUAL_DATA_OFFSET; + vfe_state_ex->vfex1.avc.residual_data_offset = RESIDUAL_DATA_OFFSET; + + if (i965_h264_context->picture.i_flag) { + vfe_state_ex->vfex1.avc.sub_field_present_flag = PRESENT_NOMV; /* NoMV */ + vfe_state_ex->vfex1.avc.weight_grf_offset = 0; + vfe_state_ex->vfex1.avc.residual_grf_offset = 0; + } else { + vfe_state_ex->vfex1.avc.sub_field_present_flag = PRESENT_MV_WO; /* Both MV and W/O */ + vfe_state_ex->vfex1.avc.weight_grf_offset = 4; + vfe_state_ex->vfex1.avc.residual_grf_offset = 6; + } + + if (!pic_param->pic_fields.bits.field_pic_flag) { + if (mbaff_frame_flag) { + vfe_state_ex->remap_table0.remap_index_0 = INTRA_16X16; + vfe_state_ex->remap_table0.remap_index_1 = INTRA_8X8; + vfe_state_ex->remap_table0.remap_index_2 = INTRA_4X4; + vfe_state_ex->remap_table0.remap_index_3 = INTRA_PCM; + vfe_state_ex->remap_table0.remap_index_4 = MBAFF_MOTION; + vfe_state_ex->remap_table0.remap_index_5 = MBAFF_MOTION; + vfe_state_ex->remap_table0.remap_index_6 = MBAFF_MOTION; + vfe_state_ex->remap_table0.remap_index_7 = MBAFF_MOTION; + + vfe_state_ex->remap_table1.remap_index_8 = MBAFF_MOTION; + vfe_state_ex->remap_table1.remap_index_9 = MBAFF_MOTION; + vfe_state_ex->remap_table1.remap_index_10 = MBAFF_MOTION; + vfe_state_ex->remap_table1.remap_index_11 = MBAFF_MOTION; + vfe_state_ex->remap_table1.remap_index_12 = MBAFF_MOTION; + vfe_state_ex->remap_table1.remap_index_13 = MBAFF_MOTION; + vfe_state_ex->remap_table1.remap_index_14 = MBAFF_MOTION; + vfe_state_ex->remap_table1.remap_index_15 = MBAFF_MOTION; + } else { + vfe_state_ex->remap_table0.remap_index_0 = INTRA_16X16; + vfe_state_ex->remap_table0.remap_index_1 = INTRA_8X8; + vfe_state_ex->remap_table0.remap_index_2 = INTRA_4X4; + vfe_state_ex->remap_table0.remap_index_3 = INTRA_PCM; + vfe_state_ex->remap_table0.remap_index_4 = FRAMEMB_MOTION; + vfe_state_ex->remap_table0.remap_index_5 = FRAMEMB_MOTION; + vfe_state_ex->remap_table0.remap_index_6 = FRAMEMB_MOTION; + vfe_state_ex->remap_table0.remap_index_7 = FRAMEMB_MOTION; + + vfe_state_ex->remap_table1.remap_index_8 = FRAMEMB_MOTION; + vfe_state_ex->remap_table1.remap_index_9 = FRAMEMB_MOTION; + vfe_state_ex->remap_table1.remap_index_10 = FRAMEMB_MOTION; + vfe_state_ex->remap_table1.remap_index_11 = FRAMEMB_MOTION; + vfe_state_ex->remap_table1.remap_index_12 = FRAMEMB_MOTION; + vfe_state_ex->remap_table1.remap_index_13 = FRAMEMB_MOTION; + vfe_state_ex->remap_table1.remap_index_14 = FRAMEMB_MOTION; + vfe_state_ex->remap_table1.remap_index_15 = FRAMEMB_MOTION; + } + } else { + vfe_state_ex->remap_table0.remap_index_0 = INTRA_16X16; + vfe_state_ex->remap_table0.remap_index_1 = INTRA_8X8; + vfe_state_ex->remap_table0.remap_index_2 = INTRA_4X4; + vfe_state_ex->remap_table0.remap_index_3 = INTRA_PCM; + vfe_state_ex->remap_table0.remap_index_4 = FIELDMB_MOTION; + vfe_state_ex->remap_table0.remap_index_5 = FIELDMB_MOTION; + vfe_state_ex->remap_table0.remap_index_6 = FIELDMB_MOTION; + vfe_state_ex->remap_table0.remap_index_7 = FIELDMB_MOTION; + + vfe_state_ex->remap_table1.remap_index_8 = FIELDMB_MOTION; + vfe_state_ex->remap_table1.remap_index_9 = FIELDMB_MOTION; + vfe_state_ex->remap_table1.remap_index_10 = FIELDMB_MOTION; + vfe_state_ex->remap_table1.remap_index_11 = FIELDMB_MOTION; + vfe_state_ex->remap_table1.remap_index_12 = FIELDMB_MOTION; + vfe_state_ex->remap_table1.remap_index_13 = FIELDMB_MOTION; + vfe_state_ex->remap_table1.remap_index_14 = FIELDMB_MOTION; + vfe_state_ex->remap_table1.remap_index_15 = FIELDMB_MOTION; + } + + if (i965_h264_context->use_avc_hw_scoreboard) { + vfe_state_ex->scoreboard0.enable = 1; + vfe_state_ex->scoreboard0.type = SCOREBOARD_STALLING; + vfe_state_ex->scoreboard0.mask = 0xff; + + vfe_state_ex->scoreboard1.delta_x0 = -1; + vfe_state_ex->scoreboard1.delta_y0 = 0; + vfe_state_ex->scoreboard1.delta_x1 = 0; + vfe_state_ex->scoreboard1.delta_y1 = -1; + vfe_state_ex->scoreboard1.delta_x2 = 1; + vfe_state_ex->scoreboard1.delta_y2 = -1; + vfe_state_ex->scoreboard1.delta_x3 = -1; + vfe_state_ex->scoreboard1.delta_y3 = -1; + + vfe_state_ex->scoreboard2.delta_x4 = -1; + vfe_state_ex->scoreboard2.delta_y4 = 1; + vfe_state_ex->scoreboard2.delta_x5 = 0; + vfe_state_ex->scoreboard2.delta_y5 = -2; + vfe_state_ex->scoreboard2.delta_x6 = 1; + vfe_state_ex->scoreboard2.delta_y6 = -2; + vfe_state_ex->scoreboard2.delta_x7 = -1; + vfe_state_ex->scoreboard2.delta_y7 = -2; + } + + dri_bo_unmap(media_context->extended_state.bo); +} + +static void +i965_media_h264_upload_constants(VADriverContextP ctx, + struct decode_state *decode_state, + struct i965_media_context *media_context) +{ + struct i965_h264_context *i965_h264_context; + unsigned char *constant_buffer; + VASliceParameterBufferH264 *slice_param; + + assert(media_context->private_context); + i965_h264_context = (struct i965_h264_context *)media_context->private_context; + + assert(decode_state->slice_params[0] && decode_state->slice_params[0]->buffer); + slice_param = (VASliceParameterBufferH264 *)decode_state->slice_params[0]->buffer; + + dri_bo_map(media_context->curbe.bo, 1); + assert(media_context->curbe.bo->virtual); + constant_buffer = media_context->curbe.bo->virtual; + + /* HW solution for W=128 */ + if (i965_h264_context->use_hw_w128) { + memcpy(constant_buffer, intra_kernel_header, sizeof(*intra_kernel_header)); + } else { + if (slice_param->slice_type == SLICE_TYPE_I || + slice_param->slice_type == SLICE_TYPE_SI) { + memcpy(constant_buffer, intra_kernel_header, sizeof(*intra_kernel_header)); + } else { + /* FIXME: Need to upload CURBE data to inter kernel interface + * to support weighted prediction work-around + */ + *(short *)constant_buffer = i965_h264_context->weight128_offset0; + constant_buffer += 2; + *(char *)constant_buffer = i965_h264_context->weight128_offset0_flag; + constant_buffer++; + *constant_buffer = 0; + } + } + + dri_bo_unmap(media_context->curbe.bo); +} + +static void +i965_media_h264_states_setup(VADriverContextP ctx, + struct decode_state *decode_state, + struct i965_media_context *media_context) +{ + struct i965_h264_context *i965_h264_context; + + assert(media_context->private_context); + i965_h264_context = (struct i965_h264_context *)media_context->private_context; + + i965_avc_bsd_pipeline(ctx, decode_state, i965_h264_context); + + if (i965_h264_context->use_avc_hw_scoreboard) + i965_avc_hw_scoreboard(ctx, decode_state, i965_h264_context); + + i965_media_h264_surfaces_setup(ctx, decode_state, media_context); + i965_media_h264_binding_table(ctx, media_context); + i965_media_h264_interface_descriptor_remap_table(ctx, media_context); + i965_media_h264_vfe_state_extension(ctx, decode_state, media_context); + i965_media_h264_vfe_state(ctx, media_context); + i965_media_h264_upload_constants(ctx, decode_state, media_context); +} + +static void +i965_media_h264_objects(VADriverContextP ctx, + struct decode_state *decode_state, + struct i965_media_context *media_context) +{ + struct intel_batchbuffer *batch = media_context->base.batch; + struct i965_h264_context *i965_h264_context; + unsigned int *object_command; + + assert(media_context->private_context); + i965_h264_context = (struct i965_h264_context *)media_context->private_context; + + dri_bo_map(i965_h264_context->avc_it_command_mb_info.bo, True); + assert(i965_h264_context->avc_it_command_mb_info.bo->virtual); + object_command = i965_h264_context->avc_it_command_mb_info.bo->virtual; + memset(object_command, 0, i965_h264_context->avc_it_command_mb_info.mbs * i965_h264_context->use_avc_hw_scoreboard * MB_CMD_IN_BYTES); + object_command += i965_h264_context->avc_it_command_mb_info.mbs * (1 + i965_h264_context->use_avc_hw_scoreboard) * MB_CMD_IN_DWS; + *object_command++ = 0; + *object_command = MI_BATCH_BUFFER_END; + dri_bo_unmap(i965_h264_context->avc_it_command_mb_info.bo); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, MI_BATCH_BUFFER_START | (2 << 6)); + OUT_RELOC(batch, i965_h264_context->avc_it_command_mb_info.bo, + I915_GEM_DOMAIN_COMMAND, 0, + 0); + ADVANCE_BATCH(batch); + + /* Have to execute the batch buffer here becuase MI_BATCH_BUFFER_END + * will cause control to pass back to ring buffer + */ + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); + intel_batchbuffer_start_atomic(batch, 0x1000); + i965_avc_ildb(ctx, decode_state, i965_h264_context); +} + +static void +i965_media_h264_free_private_context(void **data) +{ + struct i965_h264_context *i965_h264_context = *data; + int i; + + if (i965_h264_context == NULL) + return; + + i965_avc_ildb_ternimate(&i965_h264_context->avc_ildb_context); + i965_avc_hw_scoreboard_ternimate(&i965_h264_context->avc_hw_scoreboard_context); + i965_avc_bsd_ternimate(&i965_h264_context->i965_avc_bsd_context); + dri_bo_unreference(i965_h264_context->avc_it_command_mb_info.bo); + dri_bo_unreference(i965_h264_context->avc_it_data.bo); + dri_bo_unreference(i965_h264_context->avc_ildb_data.bo); + + for (i = 0; i < NUM_H264_AVC_KERNELS; i++) { + struct i965_kernel *kernel = &i965_h264_context->avc_kernels[i]; + + dri_bo_unreference(kernel->bo); + kernel->bo = NULL; + } + + free(i965_h264_context); + *data = NULL; +} + +void +i965_media_h264_decode_init(VADriverContextP ctx, + struct decode_state *decode_state, + struct i965_media_context *media_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_h264_context *i965_h264_context = media_context->private_context; + dri_bo *bo; + VAPictureParameterBufferH264 *pic_param; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; + i965_h264_context->picture.width_in_mbs = ((pic_param->picture_width_in_mbs_minus1 + 1) & 0xff); + i965_h264_context->picture.height_in_mbs = ((pic_param->picture_height_in_mbs_minus1 + 1) & 0xff) / + (1 + !!pic_param->pic_fields.bits.field_pic_flag); /* picture height */ + i965_h264_context->picture.mbaff_frame_flag = (pic_param->seq_fields.bits.mb_adaptive_frame_field_flag && + !pic_param->pic_fields.bits.field_pic_flag); + i965_h264_context->avc_it_command_mb_info.mbs = (i965_h264_context->picture.width_in_mbs * + i965_h264_context->picture.height_in_mbs); + + dri_bo_unreference(i965_h264_context->avc_it_command_mb_info.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "avc it command mb info", + i965_h264_context->avc_it_command_mb_info.mbs * MB_CMD_IN_BYTES * (1 + i965_h264_context->use_avc_hw_scoreboard) + 8, + 0x1000); + assert(bo); + i965_h264_context->avc_it_command_mb_info.bo = bo; + + dri_bo_unreference(i965_h264_context->avc_it_data.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "avc it data", + i965_h264_context->avc_it_command_mb_info.mbs * + 0x800 * + (1 + !!pic_param->pic_fields.bits.field_pic_flag), + 0x1000); + assert(bo); + i965_h264_context->avc_it_data.bo = bo; + i965_h264_context->avc_it_data.write_offset = 0; + dri_bo_unreference(media_context->indirect_object.bo); + media_context->indirect_object.bo = bo; + dri_bo_reference(media_context->indirect_object.bo); + media_context->indirect_object.offset = i965_h264_context->avc_it_data.write_offset; + + dri_bo_unreference(i965_h264_context->avc_ildb_data.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "AVC-ILDB Data Buffer", + i965_h264_context->avc_it_command_mb_info.mbs * 64 * 2, + 0x1000); + assert(bo); + i965_h264_context->avc_ildb_data.bo = bo; + + /* bsd pipeline */ + i965_avc_bsd_decode_init(ctx, i965_h264_context); + + /* HW scoreboard */ + if (i965_h264_context->use_avc_hw_scoreboard) + i965_avc_hw_scoreboard_decode_init(ctx, i965_h264_context); + + /* ILDB */ + i965_avc_ildb_decode_init(ctx, i965_h264_context); + + /* for Media pipeline */ + media_context->extended_state.enabled = 1; + dri_bo_unreference(media_context->extended_state.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "extened vfe state", + sizeof(struct i965_vfe_state_ex), 32); + assert(bo); + media_context->extended_state.bo = bo; +} + +void +i965_media_h264_dec_context_init(VADriverContextP ctx, struct i965_media_context *media_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_h264_context *i965_h264_context; + int i; + + i965_h264_context = calloc(1, sizeof(struct i965_h264_context)); + + /* kernel */ + assert(NUM_H264_AVC_KERNELS == (sizeof(h264_avc_kernels_gen5) / + sizeof(h264_avc_kernels_gen5[0]))); + assert(NUM_AVC_MC_INTERFACES == (sizeof(avc_mc_kernel_offset_gen5) / + sizeof(avc_mc_kernel_offset_gen5[0]))); + if (IS_IRONLAKE(i965->intel.device_id)) { + memcpy(i965_h264_context->avc_kernels, h264_avc_kernels_gen5, sizeof(i965_h264_context->avc_kernels)); + avc_mc_kernel_offset = avc_mc_kernel_offset_gen5; + intra_kernel_header = &intra_kernel_header_gen5; + i965_h264_context->use_avc_hw_scoreboard = 1; + i965_h264_context->use_hw_w128 = 1; + } else { + memcpy(i965_h264_context->avc_kernels, h264_avc_kernels_gen4, sizeof(i965_h264_context->avc_kernels)); + avc_mc_kernel_offset = avc_mc_kernel_offset_gen4; + intra_kernel_header = &intra_kernel_header_gen4; + i965_h264_context->use_avc_hw_scoreboard = 0; + i965_h264_context->use_hw_w128 = 0; + } + + for (i = 0; i < NUM_H264_AVC_KERNELS; i++) { + struct i965_kernel *kernel = &i965_h264_context->avc_kernels[i]; + kernel->bo = dri_bo_alloc(i965->intel.bufmgr, + kernel->name, + kernel->size, 0x1000); + assert(kernel->bo); + dri_bo_subdata(kernel->bo, 0, kernel->size, kernel->bin); + } + + for (i = 0; i < 16; i++) { + i965_h264_context->fsid_list[i].surface_id = VA_INVALID_ID; + i965_h264_context->fsid_list[i].frame_store_id = -1; + } + + i965_h264_context->batch = media_context->base.batch; + + media_context->private_context = i965_h264_context; + media_context->free_private_context = i965_media_h264_free_private_context; + + /* URB */ + if (IS_IRONLAKE(i965->intel.device_id)) { + media_context->urb.num_vfe_entries = 63; + } else { + media_context->urb.num_vfe_entries = 23; + } + + media_context->urb.size_vfe_entry = 16; + + media_context->urb.num_cs_entries = 1; + media_context->urb.size_cs_entry = 1; + + media_context->urb.vfe_start = 0; + media_context->urb.cs_start = media_context->urb.vfe_start + + media_context->urb.num_vfe_entries * media_context->urb.size_vfe_entry; + assert(media_context->urb.cs_start + + media_context->urb.num_cs_entries * media_context->urb.size_cs_entry <= URB_SIZE((&i965->intel))); + + /* hook functions */ + media_context->media_states_setup = i965_media_h264_states_setup; + media_context->media_objects = i965_media_h264_objects; +} diff --git a/src/i965_media_h264.h b/src/i965_media_h264.h new file mode 100644 index 00000000..8a8dc8e9 --- /dev/null +++ b/src/i965_media_h264.h @@ -0,0 +1,75 @@ +#ifndef _I965_MEDIA_H264_H_ +#define _I965_MEDIA_H264_H_ + +#include "i965_avc_bsd.h" +#include "i965_avc_hw_scoreboard.h" +#include "i965_avc_ildb.h" + +struct decode_state; +struct i965_media_context; + +#define INST_UNIT_GEN4 16 +#define INST_UNIT_GEN5 8 + +#define MB_CMD_IN_BYTES 64 +#define MB_CMD_IN_DWS 16 +#define MB_CMD_IN_OWS 4 + +enum { + H264_AVC_COMBINED = 0, + H264_AVC_NULL +}; + +#define NUM_H264_AVC_KERNELS 2 + +struct i965_h264_context +{ + struct { + dri_bo *bo; + unsigned int mbs; + } avc_it_command_mb_info; + + struct { + dri_bo *bo; + long write_offset; + } avc_it_data; + + struct { + dri_bo *bo; + } avc_ildb_data; + + struct { + unsigned int width_in_mbs; + unsigned int height_in_mbs; + int mbaff_frame_flag; + int i_flag; + } picture; + + int enable_avc_ildb; + int use_avc_hw_scoreboard; + + int use_hw_w128; + unsigned int weight128_luma_l0; + unsigned int weight128_luma_l1; + unsigned int weight128_chroma_l0; + unsigned int weight128_chroma_l1; + char weight128_offset0_flag; + short weight128_offset0; + + struct i965_avc_bsd_context i965_avc_bsd_context; + struct i965_avc_hw_scoreboard_context avc_hw_scoreboard_context; + struct i965_avc_ildb_context avc_ildb_context; + + struct { + VASurfaceID surface_id; + int frame_store_id; + } fsid_list[16]; + + struct i965_kernel avc_kernels[NUM_H264_AVC_KERNELS]; + struct intel_batchbuffer *batch; +}; + +void i965_media_h264_decode_init(VADriverContextP ctx, struct decode_state *decode_state, struct i965_media_context *media_context); +void i965_media_h264_dec_context_init(VADriverContextP ctx, struct i965_media_context *media_context); + +#endif /* _I965_MEDIA_H264_H_ */ diff --git a/src/i965_media_mpeg2.c b/src/i965_media_mpeg2.c new file mode 100644 index 00000000..bc3e0486 --- /dev/null +++ b/src/i965_media_mpeg2.c @@ -0,0 +1,1009 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao <haihao.xiang@intel.com> + * Zou Nan hai <nanhai.zou@intel.com> + * + */ + +#include <stdlib.h> +#include <stdio.h> +#include <string.h> +#include <assert.h> + +#include <va/va_backend.h> + +#include "intel_batchbuffer.h" +#include "intel_driver.h" +#include "i965_defines.h" +#include "i965_drv_video.h" + +#include "i965_media.h" +#include "i965_media_mpeg2.h" + +#define SURFACE_TARGET 0 +#define SURFACE_FORWARD 1 +#define SURFACE_BACKWARD 2 +#define SURFACE_BIDIRECT 3 + +enum interface { + FRAME_INTRA = 0, + FRAME_FRAME_PRED_FORWARD, + FRAME_FRAME_PRED_BACKWARD, + FRAME_FRAME_PRED_BIDIRECT, + FRAME_FIELD_PRED_FORWARD, + FRAME_FIELD_PRED_BACKWARD, + FRAME_FIELD_PRED_BIDIRECT, + LIB_INTERFACE, + FIELD_INTRA, + FIELD_FORWARD, + FIELD_FORWARD_16X8, + FIELD_BACKWARD, + FIELD_BACKWARD_16X8, + FIELD_BIDIRECT, + FIELD_BIDIRECT_16X8 +}; + +/* idct table */ +#define C0 23170 +#define C1 22725 +#define C2 21407 +#define C3 19266 +#define C4 16383 +#define C5 12873 +#define C6 8867 +#define C7 4520 +const uint32_t idct_table[] = { + C4, C1, C2, C3, C4, C5, C6, C7, //g5 + C4, C1, C2, C3, C4, C5, C6, C7, + C4, C3, C6,-C7,-C4,-C1,-C2,-C5, + C4, C3, C6,-C7,-C4,-C1,-C2,-C5, + C4, C5,-C6,-C1,-C4, C7, C2, C3, + C4, C5,-C6,-C1,-C4, C7, C2, C3, + C4, C7,-C2,-C5, C4, C3,-C6,-C1, + C4, C7,-C2,-C5, C4, C3,-C6,-C1, + C4,-C7,-C2, C5, C4,-C3,-C6, C1, + C4,-C7,-C2, C5, C4,-C3,-C6, C1, + C4,-C5,-C6, C1,-C4,-C7, C2,-C3, + C4,-C5,-C6, C1,-C4,-C7, C2,-C3, + C4,-C3, C6, C7,-C4, C1,-C2, C5, + C4,-C3, C6, C7,-C4, C1,-C2, C5, + C4,-C1, C2,-C3, C4,-C5, C6,-C7, + C4,-C1, C2,-C3, C4,-C5, C6,-C7 //g20 +}; +#undef C0 +#undef C1 +#undef C2 +#undef C3 +#undef C4 +#undef C5 +#undef C6 +#undef C7 + +const uint32_t zigzag_direct[64] = { + 0, 1, 8, 16, 9, 2, 3, 10, + 17, 24, 32, 25, 18, 11, 4, 5, + 12, 19, 26, 33, 40, 48, 41, 34, + 27, 20, 13, 6, 7, 14, 21, 28, + 35, 42, 49, 56, 57, 50, 43, 36, + 29, 22, 15, 23, 30, 37, 44, 51, + 58, 59, 52, 45, 38, 31, 39, 46, + 53, 60, 61, 54, 47, 55, 62, 63 +}; + +static const uint32_t frame_intra_kernel[][4] = { + #include "shaders/mpeg2/vld/frame_intra.g4b" +}; +static const uint32_t frame_frame_pred_forward_kernel[][4] = { + #include "shaders/mpeg2/vld/frame_frame_pred_forward.g4b" +}; +static const uint32_t frame_frame_pred_backward_kernel[][4] = { + #include "shaders/mpeg2/vld/frame_frame_pred_backward.g4b" +}; +static const uint32_t frame_frame_pred_bidirect_kernel[][4] = { + #include "shaders/mpeg2/vld/frame_frame_pred_bidirect.g4b" +}; +static const uint32_t frame_field_pred_forward_kernel[][4] = { + #include "shaders/mpeg2/vld/frame_field_pred_forward.g4b" +}; +static const uint32_t frame_field_pred_backward_kernel[][4] = { + #include "shaders/mpeg2/vld/frame_field_pred_backward.g4b" +}; +static const uint32_t frame_field_pred_bidirect_kernel[][4] = { + #include "shaders/mpeg2/vld/frame_field_pred_bidirect.g4b" +}; +static const uint32_t lib_kernel[][4] = { + #include "shaders/mpeg2/vld/lib.g4b" +}; +/*field picture*/ +static const uint32_t field_intra_kernel[][4] = { + #include "shaders/mpeg2/vld/field_intra.g4b" +}; +static const uint32_t field_forward_kernel[][4] = { + #include "shaders/mpeg2/vld/field_forward.g4b" +}; +static const uint32_t field_forward_16x8_kernel[][4] = { + #include "shaders/mpeg2/vld/field_forward_16x8.g4b" +}; +static const uint32_t field_backward_kernel[][4] = { + #include "shaders/mpeg2/vld/field_backward.g4b" +}; +static const uint32_t field_backward_16x8_kernel[][4] = { + #include "shaders/mpeg2/vld/field_backward_16x8.g4b" +}; +static const uint32_t field_bidirect_kernel[][4] = { + #include "shaders/mpeg2/vld/field_bidirect.g4b" +}; +static const uint32_t field_bidirect_16x8_kernel[][4] = { + #include "shaders/mpeg2/vld/field_bidirect_16x8.g4b" +}; + +static struct i965_kernel mpeg2_vld_kernels_gen4[] = { + { + "FRAME_INTRA", + FRAME_INTRA, + frame_intra_kernel, + sizeof(frame_intra_kernel), + NULL + }, + + { + "FRAME_FRAME_PRED_FORWARD", + FRAME_FRAME_PRED_FORWARD, + frame_frame_pred_forward_kernel, + sizeof(frame_frame_pred_forward_kernel), + NULL + }, + + { + "FRAME_FRAME_PRED_BACKWARD", + FRAME_FRAME_PRED_BACKWARD, + frame_frame_pred_backward_kernel, + sizeof(frame_frame_pred_backward_kernel), + NULL + }, + + { + "FRAME_FRAME_PRED_BIDIRECT", + FRAME_FRAME_PRED_BIDIRECT, + frame_frame_pred_bidirect_kernel, + sizeof(frame_frame_pred_bidirect_kernel), + NULL + }, + + { + "FRAME_FIELD_PRED_FORWARD", + FRAME_FIELD_PRED_FORWARD, + frame_field_pred_forward_kernel, + sizeof(frame_field_pred_forward_kernel), + NULL + }, + + { + "FRAME_FIELD_PRED_BACKWARD", + FRAME_FIELD_PRED_BACKWARD, + frame_field_pred_backward_kernel, + sizeof(frame_field_pred_backward_kernel), + NULL + }, + + { + "FRAME_FIELD_PRED_BIDIRECT", + FRAME_FIELD_PRED_BIDIRECT, + frame_field_pred_bidirect_kernel, + sizeof(frame_field_pred_bidirect_kernel), + NULL + }, + + { + "LIB", + LIB_INTERFACE, + lib_kernel, + sizeof(lib_kernel), + NULL + }, + + { + "FIELD_INTRA", + FIELD_INTRA, + field_intra_kernel, + sizeof(field_intra_kernel), + NULL + }, + + { + "FIELD_FORWARD", + FIELD_FORWARD, + field_forward_kernel, + sizeof(field_forward_kernel), + NULL + }, + + { + "FIELD_FORWARD_16X8", + FIELD_FORWARD_16X8, + field_forward_16x8_kernel, + sizeof(field_forward_16x8_kernel), + NULL + }, + + { + "FIELD_BACKWARD", + FIELD_BACKWARD, + field_backward_kernel, + sizeof(field_backward_kernel), + NULL + }, + + { + "FIELD_BACKWARD_16X8", + FIELD_BACKWARD_16X8, + field_backward_16x8_kernel, + sizeof(field_backward_16x8_kernel), + NULL + }, + + { + "FIELD_BIDIRECT", + FIELD_BIDIRECT, + field_bidirect_kernel, + sizeof(field_bidirect_kernel), + NULL + }, + + { + "FIELD_BIDIRECT_16X8", + FIELD_BIDIRECT_16X8, + field_bidirect_16x8_kernel, + sizeof(field_bidirect_16x8_kernel), + NULL + } +}; + +/* On IRONLAKE */ +static const uint32_t frame_intra_kernel_gen5[][4] = { + #include "shaders/mpeg2/vld/frame_intra.g4b.gen5" +}; +static const uint32_t frame_frame_pred_forward_kernel_gen5[][4] = { + #include "shaders/mpeg2/vld/frame_frame_pred_forward.g4b.gen5" +}; +static const uint32_t frame_frame_pred_backward_kernel_gen5[][4] = { + #include "shaders/mpeg2/vld/frame_frame_pred_backward.g4b.gen5" +}; +static const uint32_t frame_frame_pred_bidirect_kernel_gen5[][4] = { + #include "shaders/mpeg2/vld/frame_frame_pred_bidirect.g4b.gen5" +}; +static const uint32_t frame_field_pred_forward_kernel_gen5[][4] = { + #include "shaders/mpeg2/vld/frame_field_pred_forward.g4b.gen5" +}; +static const uint32_t frame_field_pred_backward_kernel_gen5[][4] = { + #include "shaders/mpeg2/vld/frame_field_pred_backward.g4b.gen5" +}; +static const uint32_t frame_field_pred_bidirect_kernel_gen5[][4] = { + #include "shaders/mpeg2/vld/frame_field_pred_bidirect.g4b.gen5" +}; +static const uint32_t lib_kernel_gen5[][4] = { + #include "shaders/mpeg2/vld/lib.g4b.gen5" +}; +/*field picture*/ +static const uint32_t field_intra_kernel_gen5[][4] = { + #include "shaders/mpeg2/vld/field_intra.g4b.gen5" +}; +static const uint32_t field_forward_kernel_gen5[][4] = { + #include "shaders/mpeg2/vld/field_forward.g4b.gen5" +}; +static const uint32_t field_forward_16x8_kernel_gen5[][4] = { + #include "shaders/mpeg2/vld/field_forward_16x8.g4b.gen5" +}; +static const uint32_t field_backward_kernel_gen5[][4] = { + #include "shaders/mpeg2/vld/field_backward.g4b.gen5" +}; +static const uint32_t field_backward_16x8_kernel_gen5[][4] = { + #include "shaders/mpeg2/vld/field_backward_16x8.g4b.gen5" +}; +static const uint32_t field_bidirect_kernel_gen5[][4] = { + #include "shaders/mpeg2/vld/field_bidirect.g4b.gen5" +}; +static const uint32_t field_bidirect_16x8_kernel_gen5[][4] = { + #include "shaders/mpeg2/vld/field_bidirect_16x8.g4b.gen5" +}; + +static struct i965_kernel mpeg2_vld_kernels_gen5[] = { + { + "FRAME_INTRA", + FRAME_INTRA, + frame_intra_kernel_gen5, + sizeof(frame_intra_kernel_gen5), + NULL + }, + + { + "FRAME_FRAME_PRED_FORWARD", + FRAME_FRAME_PRED_FORWARD, + frame_frame_pred_forward_kernel_gen5, + sizeof(frame_frame_pred_forward_kernel_gen5), + NULL + }, + + { + "FRAME_FRAME_PRED_BACKWARD", + FRAME_FRAME_PRED_BACKWARD, + frame_frame_pred_backward_kernel_gen5, + sizeof(frame_frame_pred_backward_kernel_gen5), + NULL + }, + + { + "FRAME_FRAME_PRED_BIDIRECT", + FRAME_FRAME_PRED_BIDIRECT, + frame_frame_pred_bidirect_kernel_gen5, + sizeof(frame_frame_pred_bidirect_kernel_gen5), + NULL + }, + + { + "FRAME_FIELD_PRED_FORWARD", + FRAME_FIELD_PRED_FORWARD, + frame_field_pred_forward_kernel_gen5, + sizeof(frame_field_pred_forward_kernel_gen5), + NULL + }, + + { + "FRAME_FIELD_PRED_BACKWARD", + FRAME_FIELD_PRED_BACKWARD, + frame_field_pred_backward_kernel_gen5, + sizeof(frame_field_pred_backward_kernel_gen5), + NULL + }, + + { + "FRAME_FIELD_PRED_BIDIRECT", + FRAME_FIELD_PRED_BIDIRECT, + frame_field_pred_bidirect_kernel_gen5, + sizeof(frame_field_pred_bidirect_kernel_gen5), + NULL + }, + + { + "LIB", + LIB_INTERFACE, + lib_kernel_gen5, + sizeof(lib_kernel_gen5), + NULL + }, + + { + "FIELD_INTRA", + FIELD_INTRA, + field_intra_kernel_gen5, + sizeof(field_intra_kernel_gen5), + NULL + }, + + { + "FIELD_FORWARD", + FIELD_FORWARD, + field_forward_kernel_gen5, + sizeof(field_forward_kernel_gen5), + NULL + }, + + { + "FIELD_FORWARD_16X8", + FIELD_FORWARD_16X8, + field_forward_16x8_kernel_gen5, + sizeof(field_forward_16x8_kernel_gen5), + NULL + }, + + { + "FIELD_BACKWARD", + FIELD_BACKWARD, + field_backward_kernel_gen5, + sizeof(field_backward_kernel_gen5), + NULL + }, + + { + "FIELD_BACKWARD_16X8", + FIELD_BACKWARD_16X8, + field_backward_16x8_kernel_gen5, + sizeof(field_backward_16x8_kernel_gen5), + NULL + }, + + { + "FIELD_BIDIRECT", + FIELD_BIDIRECT, + field_bidirect_kernel_gen5, + sizeof(field_bidirect_kernel_gen5), + NULL + }, + + { + "FIELD_BIDIRECT_16X8", + FIELD_BIDIRECT_16X8, + field_bidirect_16x8_kernel_gen5, + sizeof(field_bidirect_16x8_kernel_gen5), + NULL + } +}; + +static void +i965_media_mpeg2_surface_state(VADriverContextP ctx, + int index, + struct object_surface *obj_surface, + unsigned long offset, + int w, int h, + Bool is_dst, + int vert_line_stride, + int vert_line_stride_ofs, + struct i965_media_context *media_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_surface_state *ss; + dri_bo *bo; + uint32_t write_domain, read_domain; + + bo = dri_bo_alloc(i965->intel.bufmgr, + "surface state", + sizeof(struct i965_surface_state), 32); + assert(bo); + dri_bo_map(bo, 1); + assert(bo->virtual); + ss = bo->virtual; + memset(ss, 0, sizeof(*ss)); + ss->ss0.surface_type = I965_SURFACE_2D; + ss->ss0.surface_format = I965_SURFACEFORMAT_R8_SINT; + ss->ss0.vert_line_stride = vert_line_stride; + ss->ss0.vert_line_stride_ofs = vert_line_stride_ofs; + ss->ss1.base_addr = obj_surface->bo->offset + offset; + ss->ss2.width = w - 1; + ss->ss2.height = h - 1; + ss->ss3.pitch = w - 1; + + if (is_dst) { + write_domain = I915_GEM_DOMAIN_RENDER; + read_domain = I915_GEM_DOMAIN_RENDER; + } else { + write_domain = 0; + read_domain = I915_GEM_DOMAIN_SAMPLER; + } + + dri_bo_emit_reloc(bo, + read_domain, write_domain, + offset, + offsetof(struct i965_surface_state, ss1), + obj_surface->bo); + dri_bo_unmap(bo); + + assert(index < MAX_MEDIA_SURFACES); +// assert(media_context->surface_state[index].bo == NULL); + media_context->surface_state[index].bo = bo; +} + +static void +i965_media_mpeg2_surface_setup(VADriverContextP ctx, + int base_index, + struct object_surface *obj_surface, + Bool is_dst, + int picture_structure, + int surface, + struct i965_media_context *media_context) +{ + int w = obj_surface->width; + int h = obj_surface->height; + + i965_check_alloc_surface_bo(ctx, obj_surface, 0, VA_FOURCC('I','4','2','0')); + + if (picture_structure == MPEG_FRAME) { + i965_media_mpeg2_surface_state(ctx, base_index + 0, obj_surface, + 0, w, h, + is_dst, 0, 0, + media_context); + i965_media_mpeg2_surface_state(ctx, base_index + 1, obj_surface, + w * h, w / 2, h / 2, + is_dst, 0, 0, + media_context); + i965_media_mpeg2_surface_state(ctx, base_index + 2, obj_surface, + w * h + w * h / 4, w / 2, h / 2, + is_dst, 0, 0, + media_context); + } else { + if (surface == SURFACE_TARGET) { + i965_media_mpeg2_surface_state(ctx, 3, obj_surface, + 0, w, h, + False, 0, 0, + media_context); + i965_media_mpeg2_surface_state(ctx, 10, obj_surface, + w * h, w / 2, h / 2, + False, 0, 0, + media_context); + i965_media_mpeg2_surface_state(ctx, 11, obj_surface, + w * h + w * h / 4, w / 2, h / 2, + False, 0, 0, + media_context); + if (picture_structure == MPEG_TOP_FIELD) { + i965_media_mpeg2_surface_state(ctx, base_index + 0, obj_surface, + 0, w, h, + True, 1, 0, + media_context); + i965_media_mpeg2_surface_state(ctx, base_index + 1, obj_surface, + w * h, w / 2, h / 2, + True, 1, 0, + media_context); + i965_media_mpeg2_surface_state(ctx, base_index + 2, obj_surface, + w * h + w * h / 4, w / 2, h / 2, + True, 1, 0, + media_context); + } else { + assert(picture_structure == MPEG_BOTTOM_FIELD); + i965_media_mpeg2_surface_state(ctx, base_index + 0, obj_surface, + 0, w, h, + True, 1, 1, + media_context); + i965_media_mpeg2_surface_state(ctx, base_index + 1, obj_surface, + w * h, w / 2, h / 2, + True, 1, 1, + media_context); + i965_media_mpeg2_surface_state(ctx, base_index + 2, obj_surface, + w * h + w * h / 4, w / 2, h / 2, + True, 1, 1, + media_context); + } + } else { + i965_media_mpeg2_surface_state(ctx, base_index + 0, obj_surface, + 0, w, h, + is_dst, 0, 0, + media_context); + i965_media_mpeg2_surface_state(ctx, base_index + 1, obj_surface, + w * h, w / 2, h / 2, + is_dst, 0, 0, + media_context); + i965_media_mpeg2_surface_state(ctx, base_index + 2, obj_surface, + w * h + w * h / 4, w / 2, h / 2, + is_dst, 0, 0, + media_context); + } + } +} + +void +i965_media_mpeg2_surfaces_setup(VADriverContextP ctx, + struct decode_state *decode_state, + struct i965_media_context *media_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface; + VAPictureParameterBufferMPEG2 *param; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + param = (VAPictureParameterBufferMPEG2 *)decode_state->pic_param->buffer; + + obj_surface = SURFACE(decode_state->current_render_target); + assert(obj_surface); + i965_media_mpeg2_surface_setup(ctx, 0, obj_surface, True, + param->picture_coding_extension.bits.picture_structure, + SURFACE_TARGET, + media_context); + + obj_surface = SURFACE(param->forward_reference_picture); + if (!obj_surface) { +// assert(param->picture_coding_type == 1); /* I-picture */ + } else { + i965_media_mpeg2_surface_setup(ctx, 4, obj_surface, False, + param->picture_coding_extension.bits.picture_structure, + SURFACE_FORWARD, + media_context); + obj_surface = SURFACE(param->backward_reference_picture); + if (!obj_surface) { + assert(param->picture_coding_type == 2); /* P-picture */ + + obj_surface = SURFACE(param->forward_reference_picture); + i965_media_mpeg2_surface_setup(ctx, 7, obj_surface, False, + param->picture_coding_extension.bits.picture_structure, + SURFACE_BACKWARD, + media_context); + } else { + assert(param->picture_coding_type == 3); /* B-picture */ + i965_media_mpeg2_surface_setup(ctx, 7, obj_surface, False, + param->picture_coding_extension.bits.picture_structure, + SURFACE_BIDIRECT, + media_context); + } + } +} + +static void +i965_media_mpeg2_binding_table(VADriverContextP ctx, struct i965_media_context *media_context) +{ + int i; + unsigned int *binding_table; + dri_bo *bo = media_context->binding_table.bo; + + dri_bo_map(bo, 1); + assert(bo->virtual); + binding_table = bo->virtual; + memset(binding_table, 0, bo->size); + + for (i = 0; i < MAX_MEDIA_SURFACES; i++) { + if (media_context->surface_state[i].bo) { + binding_table[i] = media_context->surface_state[i].bo->offset; + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0, + i * sizeof(*binding_table), + media_context->surface_state[i].bo); + } + } + + dri_bo_unmap(media_context->binding_table.bo); +} + +static void +i965_media_mpeg2_vfe_state(VADriverContextP ctx, struct i965_media_context *media_context) +{ + struct i965_vfe_state *vfe_state; + dri_bo *bo; + + bo = media_context->vfe_state.bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + vfe_state = bo->virtual; + memset(vfe_state, 0, sizeof(*vfe_state)); + vfe_state->vfe0.extend_vfe_state_present = 1; + vfe_state->vfe1.vfe_mode = VFE_VLD_MODE; + vfe_state->vfe1.num_urb_entries = media_context->urb.num_vfe_entries; + vfe_state->vfe1.children_present = 0; + vfe_state->vfe1.urb_entry_alloc_size = media_context->urb.size_vfe_entry - 1; + vfe_state->vfe1.max_threads = media_context->urb.num_vfe_entries - 1; + vfe_state->vfe2.interface_descriptor_base = + media_context->idrt.bo->offset >> 4; /* reloc */ + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0, + offsetof(struct i965_vfe_state, vfe2), + media_context->idrt.bo); + dri_bo_unmap(bo); +} + +static void +i965_media_mpeg2_interface_descriptor_remap_table(VADriverContextP ctx, struct i965_media_context *media_context) +{ + struct i965_mpeg2_context *i965_mpeg2_context = (struct i965_mpeg2_context *)media_context->private_context; + struct i965_interface_descriptor *desc; + int i; + dri_bo *bo; + + bo = media_context->idrt.bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + desc = bo->virtual; + + for (i = 0; i < NUM_MPEG2_VLD_KERNELS; i++) { + memset(desc, 0, sizeof(*desc)); + desc->desc0.grf_reg_blocks = 15; + desc->desc0.kernel_start_pointer = i965_mpeg2_context->vld_kernels[i].bo->offset >> 6; /* reloc */ + desc->desc1.const_urb_entry_read_offset = 0; + desc->desc1.const_urb_entry_read_len = 30; + desc->desc3.binding_table_entry_count = 0; + desc->desc3.binding_table_pointer = + media_context->binding_table.bo->offset >> 5; /*reloc */ + + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + desc->desc0.grf_reg_blocks, + i * sizeof(*desc) + offsetof(struct i965_interface_descriptor, desc0), + i965_mpeg2_context->vld_kernels[i].bo); + + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + desc->desc3.binding_table_entry_count, + i * sizeof(*desc) + offsetof(struct i965_interface_descriptor, desc3), + media_context->binding_table.bo); + desc++; + } + + dri_bo_unmap(bo); +} + +void +i965_media_mpeg2_vld_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct i965_media_context *media_context) +{ + struct i965_vld_state *vld_state; + VAPictureParameterBufferMPEG2 *param; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + param = (VAPictureParameterBufferMPEG2 *)decode_state->pic_param->buffer; + + assert(media_context->extended_state.bo); + dri_bo_map(media_context->extended_state.bo, 1); + assert(media_context->extended_state.bo->virtual); + vld_state = media_context->extended_state.bo->virtual; + memset(vld_state, 0, sizeof(*vld_state)); + + vld_state->vld0.f_code_0_0 = ((param->f_code >> 12) & 0xf); + vld_state->vld0.f_code_0_1 = ((param->f_code >> 8) & 0xf); + vld_state->vld0.f_code_1_0 = ((param->f_code >> 4) & 0xf); + vld_state->vld0.f_code_1_1 = (param->f_code & 0xf); + vld_state->vld0.intra_dc_precision = param->picture_coding_extension.bits.intra_dc_precision; + vld_state->vld0.picture_structure = param->picture_coding_extension.bits.picture_structure; + vld_state->vld0.top_field_first = param->picture_coding_extension.bits.top_field_first; + vld_state->vld0.frame_predict_frame_dct = param->picture_coding_extension.bits.frame_pred_frame_dct; + vld_state->vld0.concealment_motion_vector = param->picture_coding_extension.bits.concealment_motion_vectors; + vld_state->vld0.quantizer_scale_type = param->picture_coding_extension.bits.q_scale_type; + vld_state->vld0.intra_vlc_format = param->picture_coding_extension.bits.intra_vlc_format; + vld_state->vld0.scan_order = param->picture_coding_extension.bits.alternate_scan; + + vld_state->vld1.picture_coding_type = param->picture_coding_type; + + if (vld_state->vld0.picture_structure == MPEG_FRAME) { + /*frame picture*/ + vld_state->desc_remap_table0.index_0 = FRAME_INTRA; + vld_state->desc_remap_table0.index_1 = FRAME_FRAME_PRED_FORWARD; + vld_state->desc_remap_table0.index_2 = FRAME_FIELD_PRED_FORWARD; + vld_state->desc_remap_table0.index_3 = FRAME_FIELD_PRED_BIDIRECT; /* dual prime */ + vld_state->desc_remap_table0.index_4 = FRAME_FRAME_PRED_BACKWARD; + vld_state->desc_remap_table0.index_5 = FRAME_FIELD_PRED_BACKWARD; + vld_state->desc_remap_table0.index_6 = FRAME_FRAME_PRED_BIDIRECT; + vld_state->desc_remap_table0.index_7 = FRAME_FIELD_PRED_BIDIRECT; + + vld_state->desc_remap_table1.index_8 = FRAME_INTRA; + vld_state->desc_remap_table1.index_9 = FRAME_FRAME_PRED_FORWARD; + vld_state->desc_remap_table1.index_10 = FRAME_FIELD_PRED_FORWARD; + vld_state->desc_remap_table1.index_11 = FRAME_FIELD_PRED_BIDIRECT; + vld_state->desc_remap_table1.index_12 = FRAME_FRAME_PRED_BACKWARD; + vld_state->desc_remap_table1.index_13 = FRAME_FIELD_PRED_BACKWARD; + vld_state->desc_remap_table1.index_14 = FRAME_FRAME_PRED_BIDIRECT; + vld_state->desc_remap_table1.index_15 = FRAME_FIELD_PRED_BIDIRECT; + } else { + /*field picture*/ + vld_state->desc_remap_table0.index_0 = FIELD_INTRA; + vld_state->desc_remap_table0.index_1 = FIELD_FORWARD; + vld_state->desc_remap_table0.index_2 = FIELD_FORWARD_16X8; + vld_state->desc_remap_table0.index_3 = FIELD_BIDIRECT; /* dual prime */ + vld_state->desc_remap_table0.index_4 = FIELD_BACKWARD; + vld_state->desc_remap_table0.index_5 = FIELD_BACKWARD_16X8; + vld_state->desc_remap_table0.index_6 = FIELD_BIDIRECT; + vld_state->desc_remap_table0.index_7 = FIELD_BIDIRECT_16X8; + } + + dri_bo_unmap(media_context->extended_state.bo); +} + +static void +i965_media_mpeg2_upload_constants(VADriverContextP ctx, + struct decode_state *decode_state, + struct i965_media_context *media_context) +{ + struct i965_mpeg2_context *i965_mpeg2_context = (struct i965_mpeg2_context *)media_context->private_context; + int i, j; + unsigned char *constant_buffer; + unsigned char *qmx; + unsigned int *lib_reloc; + int lib_reloc_offset = 0; + + dri_bo_map(media_context->curbe.bo, 1); + assert(media_context->curbe.bo->virtual); + constant_buffer = media_context->curbe.bo->virtual; + + /* iq_matrix */ + if (decode_state->iq_matrix && decode_state->iq_matrix->buffer) { + VAIQMatrixBufferMPEG2 *iq_matrix = (VAIQMatrixBufferMPEG2 *)decode_state->iq_matrix->buffer; + + /* Upload quantisation matrix in row-major order. The mplayer vaapi + * patch passes quantisation matrix in zig-zag order to va library. + * Do we need a flag in VAIQMatrixBufferMPEG2 to specify the order + * of the quantisation matrix? + */ + qmx = constant_buffer; + if (iq_matrix->load_intra_quantiser_matrix) { + for (i = 0; i < 64; i++) { + j = zigzag_direct[i]; + qmx[j] = iq_matrix->intra_quantiser_matrix[i]; + } + } + + qmx = constant_buffer + 64; + if (iq_matrix->load_non_intra_quantiser_matrix) { + for (i = 0; i < 64; i++) { + j = zigzag_direct[i]; + qmx[j] = iq_matrix->non_intra_quantiser_matrix[i]; + } + } + + /* no chroma quantisation matrices for 4:2:0 data */ + } + + /* idct table */ + memcpy(constant_buffer + 128, idct_table, sizeof(idct_table)); + + /* idct lib reloc */ + lib_reloc_offset = 128 + sizeof(idct_table); + lib_reloc = (unsigned int *)(constant_buffer + lib_reloc_offset); + for (i = 0; i < 8; i++) { + lib_reloc[i] = i965_mpeg2_context->vld_kernels[LIB_INTERFACE].bo->offset; + dri_bo_emit_reloc(media_context->curbe.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0, + lib_reloc_offset + i * sizeof(unsigned int), + i965_mpeg2_context->vld_kernels[LIB_INTERFACE].bo); + } + + dri_bo_unmap(media_context->curbe.bo); +} + +static void +i965_media_mpeg2_states_setup(VADriverContextP ctx, + struct decode_state *decode_state, + struct i965_media_context *media_context) +{ + i965_media_mpeg2_surfaces_setup(ctx, decode_state, media_context); + i965_media_mpeg2_binding_table(ctx, media_context); + i965_media_mpeg2_interface_descriptor_remap_table(ctx, media_context); + i965_media_mpeg2_vld_state(ctx, decode_state, media_context); + i965_media_mpeg2_vfe_state(ctx, media_context); + i965_media_mpeg2_upload_constants(ctx, decode_state, media_context); +} + +static void +i965_media_mpeg2_objects(VADriverContextP ctx, + struct decode_state *decode_state, + struct i965_media_context *media_context) +{ + struct intel_batchbuffer *batch = media_context->base.batch; + VASliceParameterBufferMPEG2 *slice_param; + VAPictureParameterBufferMPEG2 *pic_param; + int i, j; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferMPEG2 *)decode_state->pic_param->buffer; + + for (j = 0; j < decode_state->num_slice_params; j++) { + assert(decode_state->slice_params[j] && decode_state->slice_params[j]->buffer); + assert(decode_state->slice_datas[j] && decode_state->slice_datas[j]->bo); + slice_param = (VASliceParameterBufferMPEG2 *)decode_state->slice_params[j]->buffer; + + for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { + int vpos, hpos, is_field_pic = 0; + + if (pic_param->picture_coding_extension.bits.picture_structure == MPEG_TOP_FIELD || + pic_param->picture_coding_extension.bits.picture_structure == MPEG_BOTTOM_FIELD) + is_field_pic = 1; + + assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL); + vpos = slice_param->slice_vertical_position / (1 + is_field_pic); + hpos = slice_param->slice_horizontal_position; + + BEGIN_BATCH(batch, 6); + OUT_BATCH(batch, CMD_MEDIA_OBJECT | 4); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, slice_param->slice_data_size - (slice_param->macroblock_offset >> 3)); + OUT_RELOC(batch, decode_state->slice_datas[j]->bo, + I915_GEM_DOMAIN_SAMPLER, 0, + slice_param->slice_data_offset + (slice_param->macroblock_offset >> 3)); + OUT_BATCH(batch, + ((hpos << 24) | + (vpos << 16) | + (127 << 8) | + (slice_param->macroblock_offset & 0x7))); + OUT_BATCH(batch, slice_param->quantiser_scale_code << 24); + ADVANCE_BATCH(batch); + slice_param++; + } + } +} + +static void +i965_media_mpeg2_free_private_context(void **data) +{ + struct i965_mpeg2_context *i965_mpeg2_context = *data; + int i; + + if (i965_mpeg2_context == NULL) + return; + + for (i = 0; i < NUM_MPEG2_VLD_KERNELS; i++) { + struct i965_kernel *kernel = &i965_mpeg2_context->vld_kernels[i]; + + dri_bo_unreference(kernel->bo); + kernel->bo = NULL; + } + + free(i965_mpeg2_context); + *data = NULL; +} + +void +i965_media_mpeg2_decode_init(VADriverContextP ctx, + struct decode_state *decode_state, + struct i965_media_context *media_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + dri_bo *bo; + + dri_bo_unreference(media_context->indirect_object.bo); + media_context->indirect_object.bo = NULL; + + media_context->extended_state.enabled = 1; + dri_bo_unreference(media_context->extended_state.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "vld state", + sizeof(struct i965_vld_state), 32); + assert(bo); + media_context->extended_state.bo = bo; +} + +void +i965_media_mpeg2_dec_context_init(VADriverContextP ctx, struct i965_media_context *media_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_mpeg2_context *i965_mpeg2_context; + int i; + + i965_mpeg2_context = calloc(1, sizeof(struct i965_mpeg2_context)); + + /* kernel */ + assert(NUM_MPEG2_VLD_KERNELS == (sizeof(mpeg2_vld_kernels_gen4) / + sizeof(mpeg2_vld_kernels_gen4[0]))); + assert(NUM_MPEG2_VLD_KERNELS == (sizeof(mpeg2_vld_kernels_gen5) / + sizeof(mpeg2_vld_kernels_gen5[0]))); + assert(NUM_MPEG2_VLD_KERNELS <= MAX_INTERFACE_DESC); + + if (IS_IRONLAKE(i965->intel.device_id)) + memcpy(i965_mpeg2_context->vld_kernels, mpeg2_vld_kernels_gen5, sizeof(i965_mpeg2_context->vld_kernels)); + else + memcpy(i965_mpeg2_context->vld_kernels, mpeg2_vld_kernels_gen4, sizeof(i965_mpeg2_context->vld_kernels)); + + for (i = 0; i < NUM_MPEG2_VLD_KERNELS; i++) { + struct i965_kernel *kernel = &i965_mpeg2_context->vld_kernels[i]; + kernel->bo = dri_bo_alloc(i965->intel.bufmgr, + kernel->name, + kernel->size, 64); + assert(kernel->bo); + dri_bo_subdata(kernel->bo, 0, kernel->size, kernel->bin); + } + + /* URB */ + media_context->urb.num_vfe_entries = 28; + media_context->urb.size_vfe_entry = 13; + + media_context->urb.num_cs_entries = 1; + media_context->urb.size_cs_entry = 16; + + media_context->urb.vfe_start = 0; + media_context->urb.cs_start = media_context->urb.vfe_start + + media_context->urb.num_vfe_entries * media_context->urb.size_vfe_entry; + assert(media_context->urb.cs_start + + media_context->urb.num_cs_entries * media_context->urb.size_cs_entry <= URB_SIZE((&i965->intel))); + + /* hook functions */ + media_context->media_states_setup = i965_media_mpeg2_states_setup; + media_context->media_objects = i965_media_mpeg2_objects; + media_context->private_context = i965_mpeg2_context; + media_context->free_private_context = i965_media_mpeg2_free_private_context; +} diff --git a/src/i965_media_mpeg2.h b/src/i965_media_mpeg2.h new file mode 100644 index 00000000..40d91f13 --- /dev/null +++ b/src/i965_media_mpeg2.h @@ -0,0 +1,51 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao <haihao.xiang@intel.com> + * Zou Nan hai <nanhai.zou@intel.com> + * + */ + +#ifndef _I965_MEDIA_MPEG2_H_ +#define _I965_MEDIA_MPEG2_H_ + +#include <xf86drm.h> +#include <drm.h> +#include <i915_drm.h> +#include <intel_bufmgr.h> + +struct decode_state; +struct i965_media_context; + +#define NUM_MPEG2_VLD_KERNELS 15 + +struct i965_mpeg2_context +{ + struct i965_kernel vld_kernels[NUM_MPEG2_VLD_KERNELS]; +}; + +void i965_media_mpeg2_decode_init(VADriverContextP ctx, struct decode_state * decode_state, struct i965_media_context *media_context); +void i965_media_mpeg2_dec_context_init(VADriverContextP ctx, struct i965_media_context *media_context); + +#endif /* _I965_MEDIA_MPEG2_H_ */ diff --git a/src/i965_mutext.h b/src/i965_mutext.h new file mode 100644 index 00000000..57d43729 --- /dev/null +++ b/src/i965_mutext.h @@ -0,0 +1,52 @@ +#ifndef _I965_MUTEX_H_ +#define _I965_MUTEX_H_ + +#include "intel_compiler.h" + +#if defined PTHREADS +#include <pthread.h> + +typedef pthread_mutex_t _I965Mutex; + +static INLINE void _i965InitMutex(_I965Mutex *m) +{ + pthread_mutex_init(m, NULL); +} + +static INLINE void +_i965DestroyMutex(_I965Mutex *m) +{ + pthread_mutex_destroy(m); +} + +static INLINE void +_i965LockMutex(_I965Mutex *m) +{ + pthread_mutex_lock(m); +} + +static INLINE void +_i965UnlockMutex(_I965Mutex *m) +{ + pthread_mutex_unlock(m); +} + +#define _I965_MUTEX_INITIALIZER PTHREAD_MUTEX_INITIALIZER +#define _I965_DECLARE_MUTEX(m) \ + _I965Mutex m = _I965_MUTEX_INITIALIZER + +#else + +typedef int _I965Mutex; +static INLINE void _i965InitMutex(_I965Mutex *m) { (void) m; } +static INLINE void _i965DestroyMutex(_I965Mutex *m) { (void) m; } +static INLINE void _i965LockMutex(_I965Mutex *m) { (void) m; } +static INLINE void _i965UnlockMutex(_I965Mutex *m) { (void) m; } + +#define _I965_MUTEX_INITIALIZER 0 +#define _I965_DECLARE_MUTEX(m) \ + _I965Mutex m = _I965_MUTEX_INITIALIZER + +#endif + +#endif /* _I965_MUTEX_H_ */ diff --git a/src/i965_post_processing.c b/src/i965_post_processing.c new file mode 100644 index 00000000..4201d095 --- /dev/null +++ b/src/i965_post_processing.c @@ -0,0 +1,2384 @@ +/* + * Copyright © 2010 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao <haihao.xiang@intel.com> + * + */ + +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <assert.h> + +#include <va/va_backend.h> + +#include "intel_batchbuffer.h" +#include "intel_driver.h" +#include "i965_defines.h" +#include "i965_structs.h" +#include "i965_drv_video.h" +#include "i965_post_processing.h" +#include "i965_render.h" + +#define HAS_PP(ctx) (IS_IRONLAKE((ctx)->intel.device_id) || \ + IS_GEN6((ctx)->intel.device_id) || \ + IS_GEN7((ctx)->intel.device_id)) + +static const uint32_t pp_null_gen5[][4] = { +#include "shaders/post_processing/null.g4b.gen5" +}; + +static const uint32_t pp_nv12_load_save_gen5[][4] = { +#include "shaders/post_processing/nv12_load_save_nv12.g4b.gen5" +}; + +static const uint32_t pp_nv12_scaling_gen5[][4] = { +#include "shaders/post_processing/nv12_scaling_nv12.g4b.gen5" +}; + +static const uint32_t pp_nv12_avs_gen5[][4] = { +#include "shaders/post_processing/nv12_avs_nv12.g4b.gen5" +}; + +static const uint32_t pp_nv12_dndi_gen5[][4] = { +#include "shaders/post_processing/nv12_dndi_nv12.g4b.gen5" +}; + +static void pp_null_initialize(VADriverContextP ctx, + VASurfaceID in_surface_id, VASurfaceID out_surface_id, + const VARectangle *src_rect, const VARectangle *dst_rect); +static void pp_nv12_avs_initialize(VADriverContextP ctx, + VASurfaceID in_surface_id, VASurfaceID out_surface_id, + const VARectangle *src_rect, const VARectangle *dst_rect); +static void pp_nv12_scaling_initialize(VADriverContextP ctx, + VASurfaceID in_surface_id, VASurfaceID out_surface_id, + const VARectangle *src_rect, const VARectangle *dst_rect); +static void pp_nv12_load_save_initialize(VADriverContextP ctx, + VASurfaceID in_surface_id, VASurfaceID out_surface_id, + const VARectangle *src_rect, const VARectangle *dst_rect); +static void pp_nv12_dndi_initialize(VADriverContextP ctx, + VASurfaceID in_surface_id, VASurfaceID out_surface_id, + const VARectangle *src_rect, const VARectangle *dst_rect); + +static struct pp_module pp_modules_gen5[] = { + { + { + "NULL module (for testing)", + PP_NULL, + pp_null_gen5, + sizeof(pp_null_gen5), + NULL, + }, + + pp_null_initialize, + }, + + { + { + "NV12 Load & Save module", + PP_NV12_LOAD_SAVE, + pp_nv12_load_save_gen5, + sizeof(pp_nv12_load_save_gen5), + NULL, + }, + + pp_nv12_load_save_initialize, + }, + + { + { + "NV12 Scaling module", + PP_NV12_SCALING, + pp_nv12_scaling_gen5, + sizeof(pp_nv12_scaling_gen5), + NULL, + }, + + pp_nv12_scaling_initialize, + }, + + { + { + "NV12 AVS module", + PP_NV12_AVS, + pp_nv12_avs_gen5, + sizeof(pp_nv12_avs_gen5), + NULL, + }, + + pp_nv12_avs_initialize, + }, + + { + { + "NV12 DNDI module", + PP_NV12_DNDI, + pp_nv12_dndi_gen5, + sizeof(pp_nv12_dndi_gen5), + NULL, + }, + + pp_nv12_dndi_initialize, + }, +}; + +static const uint32_t pp_null_gen6[][4] = { +#include "shaders/post_processing/null.g6b" +}; + +static const uint32_t pp_nv12_load_save_gen6[][4] = { +#include "shaders/post_processing/nv12_load_save_nv12.g6b" +}; + +static const uint32_t pp_nv12_scaling_gen6[][4] = { +#include "shaders/post_processing/nv12_scaling_nv12.g6b" +}; + +static const uint32_t pp_nv12_avs_gen6[][4] = { +#include "shaders/post_processing/nv12_avs_nv12.g6b" +}; + +static const uint32_t pp_nv12_dndi_gen6[][4] = { +#include "shaders/post_processing/nv12_dndi_nv12.g6b" +}; + +static struct pp_module pp_modules_gen6[] = { + { + { + "NULL module (for testing)", + PP_NULL, + pp_null_gen6, + sizeof(pp_null_gen6), + NULL, + }, + + pp_null_initialize, + }, + + { + { + "NV12 Load & Save module", + PP_NV12_LOAD_SAVE, + pp_nv12_load_save_gen6, + sizeof(pp_nv12_load_save_gen6), + NULL, + }, + + pp_nv12_load_save_initialize, + }, + + { + { + "NV12 Scaling module", + PP_NV12_SCALING, + pp_nv12_scaling_gen6, + sizeof(pp_nv12_scaling_gen6), + NULL, + }, + + pp_nv12_scaling_initialize, + }, + + { + { + "NV12 AVS module", + PP_NV12_AVS, + pp_nv12_avs_gen6, + sizeof(pp_nv12_avs_gen6), + NULL, + }, + + pp_nv12_avs_initialize, + }, + + { + { + "NV12 DNDI module", + PP_NV12_DNDI, + pp_nv12_dndi_gen6, + sizeof(pp_nv12_dndi_gen6), + NULL, + }, + + pp_nv12_dndi_initialize, + }, +}; + +#define pp_static_parameter pp_context->pp_static_parameter +#define pp_inline_parameter pp_context->pp_inline_parameter + +static void +pp_set_surface_tiling(struct i965_surface_state *ss, unsigned int tiling) +{ + switch (tiling) { + case I915_TILING_NONE: + ss->ss3.tiled_surface = 0; + ss->ss3.tile_walk = 0; + break; + case I915_TILING_X: + ss->ss3.tiled_surface = 1; + ss->ss3.tile_walk = I965_TILEWALK_XMAJOR; + break; + case I915_TILING_Y: + ss->ss3.tiled_surface = 1; + ss->ss3.tile_walk = I965_TILEWALK_YMAJOR; + break; + } +} + +static void +pp_set_surface2_tiling(struct i965_surface_state2 *ss, unsigned int tiling) +{ + switch (tiling) { + case I915_TILING_NONE: + ss->ss2.tiled_surface = 0; + ss->ss2.tile_walk = 0; + break; + case I915_TILING_X: + ss->ss2.tiled_surface = 1; + ss->ss2.tile_walk = I965_TILEWALK_XMAJOR; + break; + case I915_TILING_Y: + ss->ss2.tiled_surface = 1; + ss->ss2.tile_walk = I965_TILEWALK_YMAJOR; + break; + } +} + +static void +ironlake_pp_surface_state(struct i965_post_processing_context *pp_context) +{ + +} + +static void +ironlake_pp_interface_descriptor_table(struct i965_post_processing_context *pp_context) +{ + struct i965_interface_descriptor *desc; + dri_bo *bo; + int pp_index = pp_context->current_pp; + + bo = pp_context->idrt.bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + desc = bo->virtual; + memset(desc, 0, sizeof(*desc)); + desc->desc0.grf_reg_blocks = 10; + desc->desc0.kernel_start_pointer = pp_context->pp_modules[pp_index].kernel.bo->offset >> 6; /* reloc */ + desc->desc1.const_urb_entry_read_offset = 0; + desc->desc1.const_urb_entry_read_len = 4; /* grf 1-4 */ + desc->desc2.sampler_state_pointer = pp_context->sampler_state_table.bo->offset >> 5; + desc->desc2.sampler_count = 0; + desc->desc3.binding_table_entry_count = 0; + desc->desc3.binding_table_pointer = + pp_context->binding_table.bo->offset >> 5; /*reloc */ + + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + desc->desc0.grf_reg_blocks, + offsetof(struct i965_interface_descriptor, desc0), + pp_context->pp_modules[pp_index].kernel.bo); + + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + desc->desc2.sampler_count << 2, + offsetof(struct i965_interface_descriptor, desc2), + pp_context->sampler_state_table.bo); + + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + desc->desc3.binding_table_entry_count, + offsetof(struct i965_interface_descriptor, desc3), + pp_context->binding_table.bo); + + dri_bo_unmap(bo); + pp_context->idrt.num_interface_descriptors++; +} + +static void +ironlake_pp_binding_table(struct i965_post_processing_context *pp_context) +{ + unsigned int *binding_table; + dri_bo *bo = pp_context->binding_table.bo; + int i; + + dri_bo_map(bo, 1); + assert(bo->virtual); + binding_table = bo->virtual; + memset(binding_table, 0, bo->size); + + for (i = 0; i < MAX_PP_SURFACES; i++) { + if (pp_context->surfaces[i].ss_bo) { + assert(pp_context->surfaces[i].s_bo); + + binding_table[i] = pp_context->surfaces[i].ss_bo->offset; + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0, + i * sizeof(*binding_table), + pp_context->surfaces[i].ss_bo); + } + + } + + dri_bo_unmap(bo); +} + +static void +ironlake_pp_vfe_state(struct i965_post_processing_context *pp_context) +{ + struct i965_vfe_state *vfe_state; + dri_bo *bo; + + bo = pp_context->vfe_state.bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + vfe_state = bo->virtual; + memset(vfe_state, 0, sizeof(*vfe_state)); + vfe_state->vfe1.max_threads = pp_context->urb.num_vfe_entries - 1; + vfe_state->vfe1.urb_entry_alloc_size = pp_context->urb.size_vfe_entry - 1; + vfe_state->vfe1.num_urb_entries = pp_context->urb.num_vfe_entries; + vfe_state->vfe1.vfe_mode = VFE_GENERIC_MODE; + vfe_state->vfe1.children_present = 0; + vfe_state->vfe2.interface_descriptor_base = + pp_context->idrt.bo->offset >> 4; /* reloc */ + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0, + offsetof(struct i965_vfe_state, vfe2), + pp_context->idrt.bo); + dri_bo_unmap(bo); +} + +static void +ironlake_pp_upload_constants(struct i965_post_processing_context *pp_context) +{ + unsigned char *constant_buffer; + + assert(sizeof(pp_static_parameter) == 128); + dri_bo_map(pp_context->curbe.bo, 1); + assert(pp_context->curbe.bo->virtual); + constant_buffer = pp_context->curbe.bo->virtual; + memcpy(constant_buffer, &pp_static_parameter, sizeof(pp_static_parameter)); + dri_bo_unmap(pp_context->curbe.bo); +} + +static void +ironlake_pp_states_setup(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_post_processing_context *pp_context = i965->pp_context; + + ironlake_pp_surface_state(pp_context); + ironlake_pp_binding_table(pp_context); + ironlake_pp_interface_descriptor_table(pp_context); + ironlake_pp_vfe_state(pp_context); + ironlake_pp_upload_constants(pp_context); +} + +static void +ironlake_pp_pipeline_select(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + BEGIN_BATCH(batch, 1); + OUT_BATCH(batch, CMD_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA); + ADVANCE_BATCH(batch); +} + +static void +ironlake_pp_urb_layout(VADriverContextP ctx, struct i965_post_processing_context *pp_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + unsigned int vfe_fence, cs_fence; + + vfe_fence = pp_context->urb.cs_start; + cs_fence = pp_context->urb.size; + + BEGIN_BATCH(batch, 3); + OUT_BATCH(batch, CMD_URB_FENCE | UF0_VFE_REALLOC | UF0_CS_REALLOC | 1); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, + (vfe_fence << UF2_VFE_FENCE_SHIFT) | /* VFE_SIZE */ + (cs_fence << UF2_CS_FENCE_SHIFT)); /* CS_SIZE */ + ADVANCE_BATCH(batch); +} + +static void +ironlake_pp_state_base_address(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + BEGIN_BATCH(batch, 8); + OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | 6); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + ADVANCE_BATCH(batch); +} + +static void +ironlake_pp_state_pointers(VADriverContextP ctx, struct i965_post_processing_context *pp_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + BEGIN_BATCH(batch, 3); + OUT_BATCH(batch, CMD_MEDIA_STATE_POINTERS | 1); + OUT_BATCH(batch, 0); + OUT_RELOC(batch, pp_context->vfe_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + ADVANCE_BATCH(batch); +} + +static void +ironlake_pp_cs_urb_layout(VADriverContextP ctx, struct i965_post_processing_context *pp_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, CMD_CS_URB_STATE | 0); + OUT_BATCH(batch, + ((pp_context->urb.size_cs_entry - 1) << 4) | /* URB Entry Allocation Size */ + (pp_context->urb.num_cs_entries << 0)); /* Number of URB Entries */ + ADVANCE_BATCH(batch); +} + +static void +ironlake_pp_constant_buffer(VADriverContextP ctx, struct i965_post_processing_context *pp_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, CMD_CONSTANT_BUFFER | (1 << 8) | (2 - 2)); + OUT_RELOC(batch, pp_context->curbe.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + pp_context->urb.size_cs_entry - 1); + ADVANCE_BATCH(batch); +} + +static void +ironlake_pp_object_walker(VADriverContextP ctx, struct i965_post_processing_context *pp_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + int x, x_steps, y, y_steps; + + x_steps = pp_context->pp_x_steps(&pp_context->private_context); + y_steps = pp_context->pp_y_steps(&pp_context->private_context); + + for (y = 0; y < y_steps; y++) { + for (x = 0; x < x_steps; x++) { + if (!pp_context->pp_set_block_parameter(pp_context, x, y)) { + BEGIN_BATCH(batch, 20); + OUT_BATCH(batch, CMD_MEDIA_OBJECT | 18); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); /* no indirect data */ + OUT_BATCH(batch, 0); + + /* inline data grf 5-6 */ + assert(sizeof(pp_inline_parameter) == 64); + intel_batchbuffer_data(batch, &pp_inline_parameter, sizeof(pp_inline_parameter)); + + ADVANCE_BATCH(batch); + } + } + } +} + +static void +ironlake_pp_pipeline_setup(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_post_processing_context *pp_context = i965->pp_context; + + intel_batchbuffer_start_atomic(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); + ironlake_pp_pipeline_select(ctx); + ironlake_pp_state_base_address(ctx); + ironlake_pp_state_pointers(ctx, pp_context); + ironlake_pp_urb_layout(ctx, pp_context); + ironlake_pp_cs_urb_layout(ctx, pp_context); + ironlake_pp_constant_buffer(ctx, pp_context); + ironlake_pp_object_walker(ctx, pp_context); + intel_batchbuffer_end_atomic(batch); +} + +static int +pp_null_x_steps(void *private_context) +{ + return 1; +} + +static int +pp_null_y_steps(void *private_context) +{ + return 1; +} + +static int +pp_null_set_block_parameter(struct i965_post_processing_context *pp_context, int x, int y) +{ + return 0; +} + +static void +pp_null_initialize(VADriverContextP ctx, + VASurfaceID in_surface_id, VASurfaceID out_surface_id, + const VARectangle *src_rect, const VARectangle *dst_rect) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_post_processing_context *pp_context = i965->pp_context; + + /* private function & data */ + pp_context->pp_x_steps = pp_null_x_steps; + pp_context->pp_y_steps = pp_null_y_steps; + pp_context->pp_set_block_parameter = pp_null_set_block_parameter; +} + +static int +pp_load_save_x_steps(void *private_context) +{ + return 1; +} + +static int +pp_load_save_y_steps(void *private_context) +{ + struct pp_load_save_context *pp_load_save_context = private_context; + + return pp_load_save_context->dest_h / 8; +} + +static int +pp_load_save_set_block_parameter(struct i965_post_processing_context *pp_context, int x, int y) +{ + pp_inline_parameter.grf5.block_vertical_mask = 0xff; + pp_inline_parameter.grf5.block_horizontal_mask = 0xffff; + pp_inline_parameter.grf5.destination_block_horizontal_origin = x * 16; + pp_inline_parameter.grf5.destination_block_vertical_origin = y * 8; + + return 0; +} + +static void +pp_nv12_load_save_initialize(VADriverContextP ctx, + VASurfaceID in_surface_id, VASurfaceID out_surface_id, + const VARectangle *src_rect, const VARectangle *dst_rect) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_post_processing_context *pp_context = i965->pp_context; + struct pp_load_save_context *pp_load_save_context = (struct pp_load_save_context *)&pp_context->private_context; + struct object_surface *obj_surface; + struct i965_surface_state *ss; + dri_bo *bo; + int index, w, h; + int orig_w, orig_h; + unsigned int tiling, swizzle; + + /* source surface */ + obj_surface = SURFACE(in_surface_id); + orig_w = obj_surface->orig_width; + orig_h = obj_surface->orig_height; + w = obj_surface->width; + h = obj_surface->height; + dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + + /* source Y surface index 1 */ + index = 1; + pp_context->surfaces[index].s_bo = obj_surface->bo; + dri_bo_reference(pp_context->surfaces[index].s_bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "surface state", + sizeof(struct i965_surface_state), + 4096); + assert(bo); + pp_context->surfaces[index].ss_bo = bo; + dri_bo_map(bo, True); + assert(bo->virtual); + ss = bo->virtual; + memset(ss, 0, sizeof(*ss)); + ss->ss0.surface_type = I965_SURFACE_2D; + ss->ss0.surface_format = I965_SURFACEFORMAT_R8_UNORM; + ss->ss1.base_addr = pp_context->surfaces[index].s_bo->offset; + ss->ss2.width = orig_w / 4 - 1; + ss->ss2.height = orig_h - 1; + ss->ss3.pitch = w - 1; + pp_set_surface_tiling(ss, tiling); + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, + 0, + 0, + offsetof(struct i965_surface_state, ss1), + pp_context->surfaces[index].s_bo); + dri_bo_unmap(bo); + + /* source UV surface index 2 */ + index = 2; + pp_context->surfaces[index].s_bo = obj_surface->bo; + dri_bo_reference(pp_context->surfaces[index].s_bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "surface state", + sizeof(struct i965_surface_state), + 4096); + assert(bo); + pp_context->surfaces[index].ss_bo = bo; + dri_bo_map(bo, True); + assert(bo->virtual); + ss = bo->virtual; + memset(ss, 0, sizeof(*ss)); + ss->ss0.surface_type = I965_SURFACE_2D; + ss->ss0.surface_format = I965_SURFACEFORMAT_R8G8_UNORM; + ss->ss1.base_addr = pp_context->surfaces[index].s_bo->offset + w * h; + ss->ss2.width = orig_w / 4 - 1; + ss->ss2.height = orig_h / 2 - 1; + ss->ss3.pitch = w - 1; + pp_set_surface_tiling(ss, tiling); + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, + 0, + w * h, + offsetof(struct i965_surface_state, ss1), + pp_context->surfaces[index].s_bo); + dri_bo_unmap(bo); + + /* destination surface */ + obj_surface = SURFACE(out_surface_id); + orig_w = obj_surface->orig_width; + orig_h = obj_surface->orig_height; + w = obj_surface->width; + h = obj_surface->height; + dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + + /* destination Y surface index 7 */ + index = 7; + pp_context->surfaces[index].s_bo = obj_surface->bo; + dri_bo_reference(pp_context->surfaces[index].s_bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "surface state", + sizeof(struct i965_surface_state), + 4096); + assert(bo); + pp_context->surfaces[index].ss_bo = bo; + dri_bo_map(bo, True); + assert(bo->virtual); + ss = bo->virtual; + memset(ss, 0, sizeof(*ss)); + ss->ss0.surface_type = I965_SURFACE_2D; + ss->ss0.surface_format = I965_SURFACEFORMAT_R8_UNORM; + ss->ss1.base_addr = pp_context->surfaces[index].s_bo->offset; + ss->ss2.width = orig_w / 4 - 1; + ss->ss2.height = orig_h - 1; + ss->ss3.pitch = w - 1; + pp_set_surface_tiling(ss, tiling); + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, + I915_GEM_DOMAIN_RENDER, + 0, + offsetof(struct i965_surface_state, ss1), + pp_context->surfaces[index].s_bo); + dri_bo_unmap(bo); + + /* destination UV surface index 8 */ + index = 8; + pp_context->surfaces[index].s_bo = obj_surface->bo; + dri_bo_reference(pp_context->surfaces[index].s_bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "surface state", + sizeof(struct i965_surface_state), + 4096); + assert(bo); + pp_context->surfaces[index].ss_bo = bo; + dri_bo_map(bo, True); + assert(bo->virtual); + ss = bo->virtual; + memset(ss, 0, sizeof(*ss)); + ss->ss0.surface_type = I965_SURFACE_2D; + ss->ss0.surface_format = I965_SURFACEFORMAT_R8G8_UNORM; + ss->ss1.base_addr = pp_context->surfaces[index].s_bo->offset + w * h; + ss->ss2.width = orig_w / 4 - 1; + ss->ss2.height = orig_h / 2 - 1; + ss->ss3.pitch = w - 1; + pp_set_surface_tiling(ss, tiling); + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, + I915_GEM_DOMAIN_RENDER, + w * h, + offsetof(struct i965_surface_state, ss1), + pp_context->surfaces[index].s_bo); + dri_bo_unmap(bo); + + /* private function & data */ + pp_context->pp_x_steps = pp_load_save_x_steps; + pp_context->pp_y_steps = pp_load_save_y_steps; + pp_context->pp_set_block_parameter = pp_load_save_set_block_parameter; + pp_load_save_context->dest_h = h; + pp_load_save_context->dest_w = w; + + pp_inline_parameter.grf5.block_count_x = w / 16; /* 1 x N */ + pp_inline_parameter.grf5.number_blocks = w / 16; +} + +static int +pp_scaling_x_steps(void *private_context) +{ + return 1; +} + +static int +pp_scaling_y_steps(void *private_context) +{ + struct pp_scaling_context *pp_scaling_context = private_context; + + return pp_scaling_context->dest_h / 8; +} + +static int +pp_scaling_set_block_parameter(struct i965_post_processing_context *pp_context, int x, int y) +{ + struct pp_scaling_context *pp_scaling_context = (struct pp_scaling_context *)&pp_context->private_context; + float src_x_steping = pp_inline_parameter.grf5.normalized_video_x_scaling_step; + float src_y_steping = pp_static_parameter.grf1.r1_6.normalized_video_y_scaling_step; + + pp_inline_parameter.grf5.r5_1.source_surface_block_normalized_horizontal_origin = src_x_steping * x * 16 + pp_scaling_context->src_normalized_x; + pp_inline_parameter.grf5.source_surface_block_normalized_vertical_origin = src_y_steping * y * 8 + pp_scaling_context->src_normalized_y; + pp_inline_parameter.grf5.destination_block_horizontal_origin = x * 16 + pp_scaling_context->dest_x; + pp_inline_parameter.grf5.destination_block_vertical_origin = y * 8 + pp_scaling_context->dest_y; + + return 0; +} + +static void +pp_nv12_scaling_initialize(VADriverContextP ctx, + VASurfaceID in_surface_id, VASurfaceID out_surface_id, + const VARectangle *src_rect, const VARectangle *dst_rect) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_post_processing_context *pp_context = i965->pp_context; + struct pp_scaling_context *pp_scaling_context = (struct pp_scaling_context *)&pp_context->private_context; + struct object_surface *obj_surface; + struct i965_sampler_state *sampler_state; + struct i965_surface_state *ss; + dri_bo *bo; + int index; + int in_w, in_h, in_wpitch, in_hpitch; + int out_w, out_h, out_wpitch, out_hpitch; + unsigned int tiling, swizzle; + + /* source surface */ + obj_surface = SURFACE(in_surface_id); + in_w = obj_surface->orig_width; + in_h = obj_surface->orig_height; + in_wpitch = obj_surface->width; + in_hpitch = obj_surface->height; + dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + + /* source Y surface index 1 */ + index = 1; + pp_context->surfaces[index].s_bo = obj_surface->bo; + dri_bo_reference(pp_context->surfaces[index].s_bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "surface state", + sizeof(struct i965_surface_state), + 4096); + assert(bo); + pp_context->surfaces[index].ss_bo = bo; + dri_bo_map(bo, True); + assert(bo->virtual); + ss = bo->virtual; + memset(ss, 0, sizeof(*ss)); + ss->ss0.surface_type = I965_SURFACE_2D; + ss->ss0.surface_format = I965_SURFACEFORMAT_R8_UNORM; + ss->ss1.base_addr = pp_context->surfaces[index].s_bo->offset; + ss->ss2.width = in_w - 1; + ss->ss2.height = in_h - 1; + ss->ss3.pitch = in_wpitch - 1; + pp_set_surface_tiling(ss, tiling); + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, + 0, + 0, + offsetof(struct i965_surface_state, ss1), + pp_context->surfaces[index].s_bo); + dri_bo_unmap(bo); + + /* source UV surface index 2 */ + index = 2; + pp_context->surfaces[index].s_bo = obj_surface->bo; + dri_bo_reference(pp_context->surfaces[index].s_bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "surface state", + sizeof(struct i965_surface_state), + 4096); + assert(bo); + pp_context->surfaces[index].ss_bo = bo; + dri_bo_map(bo, True); + assert(bo->virtual); + ss = bo->virtual; + memset(ss, 0, sizeof(*ss)); + ss->ss0.surface_type = I965_SURFACE_2D; + ss->ss0.surface_format = I965_SURFACEFORMAT_R8G8_UNORM; + ss->ss1.base_addr = pp_context->surfaces[index].s_bo->offset + in_wpitch * in_hpitch; + ss->ss2.width = in_w / 2 - 1; + ss->ss2.height = in_h / 2 - 1; + ss->ss3.pitch = in_wpitch - 1; + pp_set_surface_tiling(ss, tiling); + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, + 0, + in_wpitch * in_hpitch, + offsetof(struct i965_surface_state, ss1), + pp_context->surfaces[index].s_bo); + dri_bo_unmap(bo); + + /* destination surface */ + obj_surface = SURFACE(out_surface_id); + out_w = obj_surface->orig_width; + out_h = obj_surface->orig_height; + out_wpitch = obj_surface->width; + out_hpitch = obj_surface->height; + dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + + /* destination Y surface index 7 */ + index = 7; + pp_context->surfaces[index].s_bo = obj_surface->bo; + dri_bo_reference(pp_context->surfaces[index].s_bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "surface state", + sizeof(struct i965_surface_state), + 4096); + assert(bo); + pp_context->surfaces[index].ss_bo = bo; + dri_bo_map(bo, True); + assert(bo->virtual); + ss = bo->virtual; + memset(ss, 0, sizeof(*ss)); + ss->ss0.surface_type = I965_SURFACE_2D; + ss->ss0.surface_format = I965_SURFACEFORMAT_R8_UNORM; + ss->ss1.base_addr = pp_context->surfaces[index].s_bo->offset; + ss->ss2.width = out_w / 4 - 1; + ss->ss2.height = out_h - 1; + ss->ss3.pitch = out_wpitch - 1; + pp_set_surface_tiling(ss, tiling); + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, + I915_GEM_DOMAIN_RENDER, + 0, + offsetof(struct i965_surface_state, ss1), + pp_context->surfaces[index].s_bo); + dri_bo_unmap(bo); + + /* destination UV surface index 8 */ + index = 8; + pp_context->surfaces[index].s_bo = obj_surface->bo; + dri_bo_reference(pp_context->surfaces[index].s_bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "surface state", + sizeof(struct i965_surface_state), + 4096); + assert(bo); + pp_context->surfaces[index].ss_bo = bo; + dri_bo_map(bo, True); + assert(bo->virtual); + ss = bo->virtual; + memset(ss, 0, sizeof(*ss)); + ss->ss0.surface_type = I965_SURFACE_2D; + ss->ss0.surface_format = I965_SURFACEFORMAT_R8G8_UNORM; + ss->ss1.base_addr = pp_context->surfaces[index].s_bo->offset + out_wpitch * out_hpitch; + ss->ss2.width = out_w / 4 - 1; + ss->ss2.height = out_h / 2 - 1; + ss->ss3.pitch = out_wpitch - 1; + pp_set_surface_tiling(ss, tiling); + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, + I915_GEM_DOMAIN_RENDER, + out_wpitch * out_hpitch, + offsetof(struct i965_surface_state, ss1), + pp_context->surfaces[index].s_bo); + dri_bo_unmap(bo); + + /* sampler state */ + dri_bo_map(pp_context->sampler_state_table.bo, True); + assert(pp_context->sampler_state_table.bo->virtual); + sampler_state = pp_context->sampler_state_table.bo->virtual; + + /* SIMD16 Y index 1 */ + sampler_state[1].ss0.min_filter = I965_MAPFILTER_LINEAR; + sampler_state[1].ss0.mag_filter = I965_MAPFILTER_LINEAR; + sampler_state[1].ss1.r_wrap_mode = I965_TEXCOORDMODE_CLAMP; + sampler_state[1].ss1.s_wrap_mode = I965_TEXCOORDMODE_CLAMP; + sampler_state[1].ss1.t_wrap_mode = I965_TEXCOORDMODE_CLAMP; + + /* SIMD16 UV index 2 */ + sampler_state[2].ss0.min_filter = I965_MAPFILTER_LINEAR; + sampler_state[2].ss0.mag_filter = I965_MAPFILTER_LINEAR; + sampler_state[2].ss1.r_wrap_mode = I965_TEXCOORDMODE_CLAMP; + sampler_state[2].ss1.s_wrap_mode = I965_TEXCOORDMODE_CLAMP; + sampler_state[2].ss1.t_wrap_mode = I965_TEXCOORDMODE_CLAMP; + + dri_bo_unmap(pp_context->sampler_state_table.bo); + + /* private function & data */ + pp_context->pp_x_steps = pp_scaling_x_steps; + pp_context->pp_y_steps = pp_scaling_y_steps; + pp_context->pp_set_block_parameter = pp_scaling_set_block_parameter; + + pp_scaling_context->dest_x = dst_rect->x; + pp_scaling_context->dest_y = dst_rect->y; + pp_scaling_context->dest_w = ALIGN(dst_rect->width, 16); + pp_scaling_context->dest_h = ALIGN(dst_rect->height, 16); + pp_scaling_context->src_normalized_x = (float)src_rect->x / in_w / out_w; + pp_scaling_context->src_normalized_y = (float)src_rect->y / in_h / out_h; + + pp_static_parameter.grf1.r1_6.normalized_video_y_scaling_step = (float) src_rect->height / in_h / out_h; + + pp_inline_parameter.grf5.normalized_video_x_scaling_step = (float) src_rect->width / in_w / out_w; + pp_inline_parameter.grf5.block_count_x = pp_scaling_context->dest_w / 16; /* 1 x N */ + pp_inline_parameter.grf5.number_blocks = pp_scaling_context->dest_w / 16; + pp_inline_parameter.grf5.block_vertical_mask = 0xff; + pp_inline_parameter.grf5.block_horizontal_mask = 0xffff; +} + +static int +pp_avs_x_steps(void *private_context) +{ + struct pp_avs_context *pp_avs_context = private_context; + + return pp_avs_context->dest_w / 16; +} + +static int +pp_avs_y_steps(void *private_context) +{ + return 1; +} + +static int +pp_avs_set_block_parameter(struct i965_post_processing_context *pp_context, int x, int y) +{ + struct pp_avs_context *pp_avs_context = (struct pp_avs_context *)&pp_context->private_context; + float src_x_steping, src_y_steping, video_step_delta; + int tmp_w = ALIGN(pp_avs_context->dest_h * pp_avs_context->src_w / pp_avs_context->src_h, 16); + + if (tmp_w >= pp_avs_context->dest_w) { + pp_inline_parameter.grf5.normalized_video_x_scaling_step = 1.0 / tmp_w; + pp_inline_parameter.grf6.video_step_delta = 0; + + if (x == 0) { + pp_inline_parameter.grf5.r5_1.source_surface_block_normalized_horizontal_origin = (float)(tmp_w - pp_avs_context->dest_w) / tmp_w / 2 + + pp_avs_context->src_normalized_x; + } else { + src_x_steping = pp_inline_parameter.grf5.normalized_video_x_scaling_step; + video_step_delta = pp_inline_parameter.grf6.video_step_delta; + pp_inline_parameter.grf5.r5_1.source_surface_block_normalized_horizontal_origin += src_x_steping * 16 + + 16 * 15 * video_step_delta / 2; + } + } else { + int n0, n1, n2, nls_left, nls_right; + int factor_a = 5, factor_b = 4; + float f; + + n0 = (pp_avs_context->dest_w - tmp_w) / (16 * 2); + n1 = (pp_avs_context->dest_w - tmp_w) / 16 - n0; + n2 = tmp_w / (16 * factor_a); + nls_left = n0 + n2; + nls_right = n1 + n2; + f = (float) n2 * 16 / tmp_w; + + if (n0 < 5) { + pp_inline_parameter.grf6.video_step_delta = 0.0; + + if (x == 0) { + pp_inline_parameter.grf5.normalized_video_x_scaling_step = 1.0 / pp_avs_context->dest_w; + pp_inline_parameter.grf5.r5_1.source_surface_block_normalized_horizontal_origin = pp_avs_context->src_normalized_x; + } else { + src_x_steping = pp_inline_parameter.grf5.normalized_video_x_scaling_step; + video_step_delta = pp_inline_parameter.grf6.video_step_delta; + pp_inline_parameter.grf5.r5_1.source_surface_block_normalized_horizontal_origin += src_x_steping * 16 + + 16 * 15 * video_step_delta / 2; + } + } else { + if (x < nls_left) { + /* f = a * nls_left * 16 + b * nls_left * 16 * (nls_left * 16 - 1) / 2 */ + float a = f / (nls_left * 16 * factor_b); + float b = (f - nls_left * 16 * a) * 2 / (nls_left * 16 * (nls_left * 16 - 1)); + + pp_inline_parameter.grf6.video_step_delta = b; + + if (x == 0) { + pp_inline_parameter.grf5.r5_1.source_surface_block_normalized_horizontal_origin = pp_avs_context->src_normalized_x; + pp_inline_parameter.grf5.normalized_video_x_scaling_step = a; + } else { + src_x_steping = pp_inline_parameter.grf5.normalized_video_x_scaling_step; + video_step_delta = pp_inline_parameter.grf6.video_step_delta; + pp_inline_parameter.grf5.r5_1.source_surface_block_normalized_horizontal_origin += src_x_steping * 16 + + 16 * 15 * video_step_delta / 2; + pp_inline_parameter.grf5.normalized_video_x_scaling_step += 16 * b; + } + } else if (x < (pp_avs_context->dest_w / 16 - nls_right)) { + /* scale the center linearly */ + src_x_steping = pp_inline_parameter.grf5.normalized_video_x_scaling_step; + video_step_delta = pp_inline_parameter.grf6.video_step_delta; + pp_inline_parameter.grf5.r5_1.source_surface_block_normalized_horizontal_origin += src_x_steping * 16 + + 16 * 15 * video_step_delta / 2; + pp_inline_parameter.grf6.video_step_delta = 0.0; + pp_inline_parameter.grf5.normalized_video_x_scaling_step = 1.0 / tmp_w; + } else { + float a = f / (nls_right * 16 * factor_b); + float b = (f - nls_right * 16 * a) * 2 / (nls_right * 16 * (nls_right * 16 - 1)); + + src_x_steping = pp_inline_parameter.grf5.normalized_video_x_scaling_step; + video_step_delta = pp_inline_parameter.grf6.video_step_delta; + pp_inline_parameter.grf5.r5_1.source_surface_block_normalized_horizontal_origin += src_x_steping * 16 + + 16 * 15 * video_step_delta / 2; + pp_inline_parameter.grf6.video_step_delta = -b; + + if (x == (pp_avs_context->dest_w / 16 - nls_right)) + pp_inline_parameter.grf5.normalized_video_x_scaling_step = a + (nls_right * 16 - 1) * b; + else + pp_inline_parameter.grf5.normalized_video_x_scaling_step -= b * 16; + } + } + } + + src_y_steping = pp_static_parameter.grf1.r1_6.normalized_video_y_scaling_step; + pp_inline_parameter.grf5.source_surface_block_normalized_vertical_origin = src_y_steping * y * 8 + pp_avs_context->src_normalized_y; + pp_inline_parameter.grf5.destination_block_horizontal_origin = x * 16 + pp_avs_context->dest_x; + pp_inline_parameter.grf5.destination_block_vertical_origin = y * 8 + pp_avs_context->dest_y; + + return 0; +} + +static void +pp_nv12_avs_initialize(VADriverContextP ctx, + VASurfaceID in_surface_id, VASurfaceID out_surface_id, + const VARectangle *src_rect, const VARectangle *dst_rect) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_post_processing_context *pp_context = i965->pp_context; + struct pp_avs_context *pp_avs_context = (struct pp_avs_context *)&pp_context->private_context; + struct object_surface *obj_surface; + struct i965_surface_state *ss; + struct i965_sampler_8x8 *sampler_8x8; + struct i965_sampler_8x8_state *sampler_8x8_state; + struct i965_surface_state2 *ss_8x8; + dri_bo *bo; + int index; + int in_w, in_h, in_wpitch, in_hpitch; + int out_w, out_h, out_wpitch, out_hpitch; + unsigned int tiling, swizzle; + + /* surface */ + obj_surface = SURFACE(in_surface_id); + in_w = obj_surface->orig_width; + in_h = obj_surface->orig_height; + in_wpitch = obj_surface->width; + in_hpitch = obj_surface->height; + dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + + /* source Y surface index 1 */ + index = 1; + pp_context->surfaces[index].s_bo = obj_surface->bo; + dri_bo_reference(pp_context->surfaces[index].s_bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Y surface state for sample_8x8", + sizeof(struct i965_surface_state2), + 4096); + assert(bo); + pp_context->surfaces[index].ss_bo = bo; + dri_bo_map(bo, True); + assert(bo->virtual); + ss_8x8 = bo->virtual; + memset(ss_8x8, 0, sizeof(*ss_8x8)); + ss_8x8->ss0.surface_base_address = pp_context->surfaces[index].s_bo->offset; + ss_8x8->ss1.cbcr_pixel_offset_v_direction = 0; + ss_8x8->ss1.width = in_w - 1; + ss_8x8->ss1.height = in_h - 1; + ss_8x8->ss2.half_pitch_for_chroma = 0; + ss_8x8->ss2.pitch = in_wpitch - 1; + ss_8x8->ss2.interleave_chroma = 0; + ss_8x8->ss2.surface_format = SURFACE_FORMAT_Y8_UNORM; + ss_8x8->ss3.x_offset_for_cb = 0; + ss_8x8->ss3.y_offset_for_cb = 0; + pp_set_surface2_tiling(ss_8x8, tiling); + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, + 0, + 0, + offsetof(struct i965_surface_state2, ss0), + pp_context->surfaces[index].s_bo); + dri_bo_unmap(bo); + + /* source UV surface index 2 */ + index = 2; + pp_context->surfaces[index].s_bo = obj_surface->bo; + dri_bo_reference(pp_context->surfaces[index].s_bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "UV surface state for sample_8x8", + sizeof(struct i965_surface_state2), + 4096); + assert(bo); + pp_context->surfaces[index].ss_bo = bo; + dri_bo_map(bo, True); + assert(bo->virtual); + ss_8x8 = bo->virtual; + memset(ss_8x8, 0, sizeof(*ss_8x8)); + ss_8x8->ss0.surface_base_address = pp_context->surfaces[index].s_bo->offset + in_wpitch * in_hpitch; + ss_8x8->ss1.cbcr_pixel_offset_v_direction = 0; + ss_8x8->ss1.width = in_w - 1; + ss_8x8->ss1.height = in_h - 1; + ss_8x8->ss2.half_pitch_for_chroma = 0; + ss_8x8->ss2.pitch = in_wpitch - 1; + ss_8x8->ss2.interleave_chroma = 1; + ss_8x8->ss2.surface_format = SURFACE_FORMAT_PLANAR_420_8; + ss_8x8->ss3.x_offset_for_cb = 0; + ss_8x8->ss3.y_offset_for_cb = 0; + pp_set_surface2_tiling(ss_8x8, tiling); + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, + 0, + in_wpitch * in_hpitch, + offsetof(struct i965_surface_state2, ss0), + pp_context->surfaces[index].s_bo); + dri_bo_unmap(bo); + + /* destination surface */ + obj_surface = SURFACE(out_surface_id); + out_w = obj_surface->orig_width; + out_h = obj_surface->orig_height; + out_wpitch = obj_surface->width; + out_hpitch = obj_surface->height; + assert(out_w <= out_wpitch && out_h <= out_hpitch); + dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + + /* destination Y surface index 7 */ + index = 7; + pp_context->surfaces[index].s_bo = obj_surface->bo; + dri_bo_reference(pp_context->surfaces[index].s_bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "surface state", + sizeof(struct i965_surface_state), + 4096); + assert(bo); + pp_context->surfaces[index].ss_bo = bo; + dri_bo_map(bo, True); + assert(bo->virtual); + ss = bo->virtual; + memset(ss, 0, sizeof(*ss)); + ss->ss0.surface_type = I965_SURFACE_2D; + ss->ss0.surface_format = I965_SURFACEFORMAT_R8_UNORM; + ss->ss1.base_addr = pp_context->surfaces[index].s_bo->offset; + ss->ss2.width = out_w / 4 - 1; + ss->ss2.height = out_h - 1; + ss->ss3.pitch = out_wpitch - 1; + pp_set_surface_tiling(ss, tiling); + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, + I915_GEM_DOMAIN_RENDER, + 0, + offsetof(struct i965_surface_state, ss1), + pp_context->surfaces[index].s_bo); + dri_bo_unmap(bo); + + /* destination UV surface index 8 */ + index = 8; + pp_context->surfaces[index].s_bo = obj_surface->bo; + dri_bo_reference(pp_context->surfaces[index].s_bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "surface state", + sizeof(struct i965_surface_state), + 4096); + assert(bo); + pp_context->surfaces[index].ss_bo = bo; + dri_bo_map(bo, True); + assert(bo->virtual); + ss = bo->virtual; + memset(ss, 0, sizeof(*ss)); + ss->ss0.surface_type = I965_SURFACE_2D; + ss->ss0.surface_format = I965_SURFACEFORMAT_R8G8_UNORM; + ss->ss1.base_addr = pp_context->surfaces[index].s_bo->offset + out_wpitch * out_hpitch; + ss->ss2.width = out_w / 4 - 1; + ss->ss2.height = out_h / 2 - 1; + ss->ss3.pitch = out_wpitch - 1; + pp_set_surface_tiling(ss, tiling); + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, + I915_GEM_DOMAIN_RENDER, + out_wpitch * out_hpitch, + offsetof(struct i965_surface_state, ss1), + pp_context->surfaces[index].s_bo); + dri_bo_unmap(bo); + + /* sampler 8x8 state */ + dri_bo_map(pp_context->sampler_state_table.bo_8x8, True); + assert(pp_context->sampler_state_table.bo_8x8->virtual); + assert(sizeof(*sampler_8x8_state) == sizeof(int) * 138); + sampler_8x8_state = pp_context->sampler_state_table.bo_8x8->virtual; + memset(sampler_8x8_state, 0, sizeof(*sampler_8x8_state)); + sampler_8x8_state->dw136.default_sharpness_level = 0; + sampler_8x8_state->dw137.adaptive_filter_for_all_channel = 1; + sampler_8x8_state->dw137.bypass_y_adaptive_filtering = 1; + sampler_8x8_state->dw137.bypass_x_adaptive_filtering = 1; + dri_bo_unmap(pp_context->sampler_state_table.bo_8x8); + + /* sampler 8x8 */ + dri_bo_map(pp_context->sampler_state_table.bo, True); + assert(pp_context->sampler_state_table.bo->virtual); + assert(sizeof(*sampler_8x8) == sizeof(int) * 16); + sampler_8x8 = pp_context->sampler_state_table.bo->virtual; + + /* sample_8x8 Y index 1 */ + index = 1; + memset(&sampler_8x8[index], 0, sizeof(*sampler_8x8)); + sampler_8x8[index].dw0.avs_filter_type = AVS_FILTER_ADAPTIVE_8_TAP; + sampler_8x8[index].dw0.ief_bypass = 0; + sampler_8x8[index].dw0.ief_filter_type = IEF_FILTER_DETAIL; + sampler_8x8[index].dw0.ief_filter_size = IEF_FILTER_SIZE_5X5; + sampler_8x8[index].dw1.sampler_8x8_state_pointer = pp_context->sampler_state_table.bo_8x8->offset >> 5; + sampler_8x8[index].dw2.global_noise_estimation = 22; + sampler_8x8[index].dw2.strong_edge_threshold = 8; + sampler_8x8[index].dw2.weak_edge_threshold = 1; + sampler_8x8[index].dw3.strong_edge_weight = 7; + sampler_8x8[index].dw3.regular_weight = 2; + sampler_8x8[index].dw3.non_edge_weight = 0; + sampler_8x8[index].dw3.gain_factor = 40; + sampler_8x8[index].dw4.steepness_boost = 0; + sampler_8x8[index].dw4.steepness_threshold = 0; + sampler_8x8[index].dw4.mr_boost = 0; + sampler_8x8[index].dw4.mr_threshold = 5; + sampler_8x8[index].dw5.pwl1_point_1 = 4; + sampler_8x8[index].dw5.pwl1_point_2 = 12; + sampler_8x8[index].dw5.pwl1_point_3 = 16; + sampler_8x8[index].dw5.pwl1_point_4 = 26; + sampler_8x8[index].dw6.pwl1_point_5 = 40; + sampler_8x8[index].dw6.pwl1_point_6 = 160; + sampler_8x8[index].dw6.pwl1_r3_bias_0 = 127; + sampler_8x8[index].dw6.pwl1_r3_bias_1 = 98; + sampler_8x8[index].dw7.pwl1_r3_bias_2 = 88; + sampler_8x8[index].dw7.pwl1_r3_bias_3 = 64; + sampler_8x8[index].dw7.pwl1_r3_bias_4 = 44; + sampler_8x8[index].dw7.pwl1_r3_bias_5 = 0; + sampler_8x8[index].dw8.pwl1_r3_bias_6 = 0; + sampler_8x8[index].dw8.pwl1_r5_bias_0 = 3; + sampler_8x8[index].dw8.pwl1_r5_bias_1 = 32; + sampler_8x8[index].dw8.pwl1_r5_bias_2 = 32; + sampler_8x8[index].dw9.pwl1_r5_bias_3 = 58; + sampler_8x8[index].dw9.pwl1_r5_bias_4 = 100; + sampler_8x8[index].dw9.pwl1_r5_bias_5 = 108; + sampler_8x8[index].dw9.pwl1_r5_bias_6 = 88; + sampler_8x8[index].dw10.pwl1_r3_slope_0 = -116; + sampler_8x8[index].dw10.pwl1_r3_slope_1 = -20; + sampler_8x8[index].dw10.pwl1_r3_slope_2 = -96; + sampler_8x8[index].dw10.pwl1_r3_slope_3 = -32; + sampler_8x8[index].dw11.pwl1_r3_slope_4 = -50; + sampler_8x8[index].dw11.pwl1_r3_slope_5 = 0; + sampler_8x8[index].dw11.pwl1_r3_slope_6 = 0; + sampler_8x8[index].dw11.pwl1_r5_slope_0 = 116; + sampler_8x8[index].dw12.pwl1_r5_slope_1 = 0; + sampler_8x8[index].dw12.pwl1_r5_slope_2 = 114; + sampler_8x8[index].dw12.pwl1_r5_slope_3 = 67; + sampler_8x8[index].dw12.pwl1_r5_slope_4 = 9; + sampler_8x8[index].dw13.pwl1_r5_slope_5 = -3; + sampler_8x8[index].dw13.pwl1_r5_slope_6 = -15; + sampler_8x8[index].dw13.limiter_boost = 0; + sampler_8x8[index].dw13.minimum_limiter = 10; + sampler_8x8[index].dw13.maximum_limiter = 11; + sampler_8x8[index].dw14.clip_limiter = 130; + dri_bo_emit_reloc(pp_context->sampler_state_table.bo, + I915_GEM_DOMAIN_RENDER, + 0, + 0, + sizeof(*sampler_8x8) * index + offsetof(struct i965_sampler_8x8, dw1), + pp_context->sampler_state_table.bo_8x8); + + dri_bo_map(pp_context->sampler_state_table.bo_8x8_uv, True); + assert(pp_context->sampler_state_table.bo_8x8_uv->virtual); + assert(sizeof(*sampler_8x8_state) == sizeof(int) * 138); + sampler_8x8_state = pp_context->sampler_state_table.bo_8x8_uv->virtual; + memset(sampler_8x8_state, 0, sizeof(*sampler_8x8_state)); + sampler_8x8_state->dw136.default_sharpness_level = 0; + sampler_8x8_state->dw137.adaptive_filter_for_all_channel = 0; + sampler_8x8_state->dw137.bypass_y_adaptive_filtering = 1; + sampler_8x8_state->dw137.bypass_x_adaptive_filtering = 1; + dri_bo_unmap(pp_context->sampler_state_table.bo_8x8_uv); + + /* sample_8x8 UV index 2 */ + index = 2; + memset(&sampler_8x8[index], 0, sizeof(*sampler_8x8)); + sampler_8x8[index].dw0.avs_filter_type = AVS_FILTER_NEAREST; + sampler_8x8[index].dw0.ief_bypass = 0; + sampler_8x8[index].dw0.ief_filter_type = IEF_FILTER_DETAIL; + sampler_8x8[index].dw0.ief_filter_size = IEF_FILTER_SIZE_5X5; + sampler_8x8[index].dw1.sampler_8x8_state_pointer = pp_context->sampler_state_table.bo_8x8_uv->offset >> 5; + sampler_8x8[index].dw2.global_noise_estimation = 22; + sampler_8x8[index].dw2.strong_edge_threshold = 8; + sampler_8x8[index].dw2.weak_edge_threshold = 1; + sampler_8x8[index].dw3.strong_edge_weight = 7; + sampler_8x8[index].dw3.regular_weight = 2; + sampler_8x8[index].dw3.non_edge_weight = 0; + sampler_8x8[index].dw3.gain_factor = 40; + sampler_8x8[index].dw4.steepness_boost = 0; + sampler_8x8[index].dw4.steepness_threshold = 0; + sampler_8x8[index].dw4.mr_boost = 0; + sampler_8x8[index].dw4.mr_threshold = 5; + sampler_8x8[index].dw5.pwl1_point_1 = 4; + sampler_8x8[index].dw5.pwl1_point_2 = 12; + sampler_8x8[index].dw5.pwl1_point_3 = 16; + sampler_8x8[index].dw5.pwl1_point_4 = 26; + sampler_8x8[index].dw6.pwl1_point_5 = 40; + sampler_8x8[index].dw6.pwl1_point_6 = 160; + sampler_8x8[index].dw6.pwl1_r3_bias_0 = 127; + sampler_8x8[index].dw6.pwl1_r3_bias_1 = 98; + sampler_8x8[index].dw7.pwl1_r3_bias_2 = 88; + sampler_8x8[index].dw7.pwl1_r3_bias_3 = 64; + sampler_8x8[index].dw7.pwl1_r3_bias_4 = 44; + sampler_8x8[index].dw7.pwl1_r3_bias_5 = 0; + sampler_8x8[index].dw8.pwl1_r3_bias_6 = 0; + sampler_8x8[index].dw8.pwl1_r5_bias_0 = 3; + sampler_8x8[index].dw8.pwl1_r5_bias_1 = 32; + sampler_8x8[index].dw8.pwl1_r5_bias_2 = 32; + sampler_8x8[index].dw9.pwl1_r5_bias_3 = 58; + sampler_8x8[index].dw9.pwl1_r5_bias_4 = 100; + sampler_8x8[index].dw9.pwl1_r5_bias_5 = 108; + sampler_8x8[index].dw9.pwl1_r5_bias_6 = 88; + sampler_8x8[index].dw10.pwl1_r3_slope_0 = -116; + sampler_8x8[index].dw10.pwl1_r3_slope_1 = -20; + sampler_8x8[index].dw10.pwl1_r3_slope_2 = -96; + sampler_8x8[index].dw10.pwl1_r3_slope_3 = -32; + sampler_8x8[index].dw11.pwl1_r3_slope_4 = -50; + sampler_8x8[index].dw11.pwl1_r3_slope_5 = 0; + sampler_8x8[index].dw11.pwl1_r3_slope_6 = 0; + sampler_8x8[index].dw11.pwl1_r5_slope_0 = 116; + sampler_8x8[index].dw12.pwl1_r5_slope_1 = 0; + sampler_8x8[index].dw12.pwl1_r5_slope_2 = 114; + sampler_8x8[index].dw12.pwl1_r5_slope_3 = 67; + sampler_8x8[index].dw12.pwl1_r5_slope_4 = 9; + sampler_8x8[index].dw13.pwl1_r5_slope_5 = -3; + sampler_8x8[index].dw13.pwl1_r5_slope_6 = -15; + sampler_8x8[index].dw13.limiter_boost = 0; + sampler_8x8[index].dw13.minimum_limiter = 10; + sampler_8x8[index].dw13.maximum_limiter = 11; + sampler_8x8[index].dw14.clip_limiter = 130; + dri_bo_emit_reloc(pp_context->sampler_state_table.bo, + I915_GEM_DOMAIN_RENDER, + 0, + 0, + sizeof(*sampler_8x8) * index + offsetof(struct i965_sampler_8x8, dw1), + pp_context->sampler_state_table.bo_8x8_uv); + + dri_bo_unmap(pp_context->sampler_state_table.bo); + + /* private function & data */ + pp_context->pp_x_steps = pp_avs_x_steps; + pp_context->pp_y_steps = pp_avs_y_steps; + pp_context->pp_set_block_parameter = pp_avs_set_block_parameter; + + pp_avs_context->dest_x = dst_rect->x; + pp_avs_context->dest_y = dst_rect->y; + pp_avs_context->dest_w = ALIGN(dst_rect->width, 16); + pp_avs_context->dest_h = ALIGN(dst_rect->height, 16); + pp_avs_context->src_normalized_x = (float)src_rect->x / in_w / out_w; + pp_avs_context->src_normalized_y = (float)src_rect->y / in_h / out_h; + pp_avs_context->src_w = src_rect->width; + pp_avs_context->src_h = src_rect->height; + + pp_static_parameter.grf4.r4_2.avs.nlas = 1; + pp_static_parameter.grf1.r1_6.normalized_video_y_scaling_step = (float) src_rect->height / in_h / out_h; + + pp_inline_parameter.grf5.normalized_video_x_scaling_step = (float) src_rect->width / in_w / out_w; + pp_inline_parameter.grf5.block_count_x = 1; /* M x 1 */ + pp_inline_parameter.grf5.number_blocks = pp_avs_context->dest_h / 8; + pp_inline_parameter.grf5.block_vertical_mask = 0xff; + pp_inline_parameter.grf5.block_horizontal_mask = 0xffff; + pp_inline_parameter.grf6.video_step_delta = 0.0; +} + +static int +pp_dndi_x_steps(void *private_context) +{ + return 1; +} + +static int +pp_dndi_y_steps(void *private_context) +{ + struct pp_dndi_context *pp_dndi_context = private_context; + + return pp_dndi_context->dest_h / 4; +} + +static int +pp_dndi_set_block_parameter(struct i965_post_processing_context *pp_context, int x, int y) +{ + pp_inline_parameter.grf5.destination_block_horizontal_origin = x * 16; + pp_inline_parameter.grf5.destination_block_vertical_origin = y * 4; + + return 0; +} + +static +void pp_nv12_dndi_initialize(VADriverContextP ctx, + VASurfaceID in_surface_id, VASurfaceID out_surface_id, + const VARectangle *src_rect, const VARectangle *dst_rect) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_post_processing_context *pp_context = i965->pp_context; + struct pp_dndi_context *pp_dndi_context = (struct pp_dndi_context *)&pp_context->private_context; + struct object_surface *obj_surface; + struct i965_surface_state *ss; + struct i965_surface_state2 *ss_dndi; + struct i965_sampler_dndi *sampler_dndi; + dri_bo *bo; + int index; + int w, h; + int orig_w, orig_h; + unsigned int tiling, swizzle; + + /* surface */ + obj_surface = SURFACE(in_surface_id); + orig_w = obj_surface->orig_width; + orig_h = obj_surface->orig_height; + w = obj_surface->width; + h = obj_surface->height; + dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + + if (pp_context->stmm.bo == NULL) { + pp_context->stmm.bo = dri_bo_alloc(i965->intel.bufmgr, + "STMM surface", + w * h, + 4096); + assert(pp_context->stmm.bo); + } + + /* source UV surface index 2 */ + index = 2; + pp_context->surfaces[index].s_bo = obj_surface->bo; + dri_bo_reference(pp_context->surfaces[index].s_bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "surface state", + sizeof(struct i965_surface_state), + 4096); + assert(bo); + pp_context->surfaces[index].ss_bo = bo; + dri_bo_map(bo, True); + assert(bo->virtual); + ss = bo->virtual; + memset(ss, 0, sizeof(*ss)); + ss->ss0.surface_type = I965_SURFACE_2D; + ss->ss0.surface_format = I965_SURFACEFORMAT_R8G8_UNORM; + ss->ss1.base_addr = pp_context->surfaces[index].s_bo->offset + w * h; + ss->ss2.width = orig_w / 4 - 1; + ss->ss2.height = orig_h / 2 - 1; + ss->ss3.pitch = w - 1; + pp_set_surface_tiling(ss, tiling); + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, + 0, + w * h, + offsetof(struct i965_surface_state, ss1), + pp_context->surfaces[index].s_bo); + dri_bo_unmap(bo); + + /* source YUV surface index 4 */ + index = 4; + pp_context->surfaces[index].s_bo = obj_surface->bo; + dri_bo_reference(pp_context->surfaces[index].s_bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "YUV surface state for deinterlace ", + sizeof(struct i965_surface_state2), + 4096); + assert(bo); + pp_context->surfaces[index].ss_bo = bo; + dri_bo_map(bo, True); + assert(bo->virtual); + ss_dndi = bo->virtual; + memset(ss_dndi, 0, sizeof(*ss_dndi)); + ss_dndi->ss0.surface_base_address = pp_context->surfaces[index].s_bo->offset; + ss_dndi->ss1.cbcr_pixel_offset_v_direction = 0; + ss_dndi->ss1.width = w - 1; + ss_dndi->ss1.height = h - 1; + ss_dndi->ss1.cbcr_pixel_offset_v_direction = 1; + ss_dndi->ss2.half_pitch_for_chroma = 0; + ss_dndi->ss2.pitch = w - 1; + ss_dndi->ss2.interleave_chroma = 1; + ss_dndi->ss2.surface_format = SURFACE_FORMAT_PLANAR_420_8; + ss_dndi->ss2.half_pitch_for_chroma = 0; + ss_dndi->ss2.tiled_surface = 0; + ss_dndi->ss3.x_offset_for_cb = 0; + ss_dndi->ss3.y_offset_for_cb = h; + pp_set_surface2_tiling(ss_dndi, tiling); + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, + 0, + 0, + offsetof(struct i965_surface_state2, ss0), + pp_context->surfaces[index].s_bo); + dri_bo_unmap(bo); + + /* source STMM surface index 20 */ + index = 20; + pp_context->surfaces[index].s_bo = pp_context->stmm.bo; + dri_bo_reference(pp_context->surfaces[index].s_bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "STMM surface state for deinterlace ", + sizeof(struct i965_surface_state2), + 4096); + assert(bo); + pp_context->surfaces[index].ss_bo = bo; + dri_bo_map(bo, True); + assert(bo->virtual); + ss = bo->virtual; + memset(ss, 0, sizeof(*ss)); + ss->ss0.surface_type = I965_SURFACE_2D; + ss->ss0.surface_format = I965_SURFACEFORMAT_R8_UNORM; + ss->ss1.base_addr = pp_context->surfaces[index].s_bo->offset; + ss->ss2.width = w - 1; + ss->ss2.height = h - 1; + ss->ss3.pitch = w - 1; + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, + I915_GEM_DOMAIN_RENDER, + 0, + offsetof(struct i965_surface_state, ss1), + pp_context->surfaces[index].s_bo); + dri_bo_unmap(bo); + + /* destination surface */ + obj_surface = SURFACE(out_surface_id); + orig_w = obj_surface->orig_width; + orig_h = obj_surface->orig_height; + w = obj_surface->width; + h = obj_surface->height; + dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + + /* destination Y surface index 7 */ + index = 7; + pp_context->surfaces[index].s_bo = obj_surface->bo; + dri_bo_reference(pp_context->surfaces[index].s_bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "surface state", + sizeof(struct i965_surface_state), + 4096); + assert(bo); + pp_context->surfaces[index].ss_bo = bo; + dri_bo_map(bo, True); + assert(bo->virtual); + ss = bo->virtual; + memset(ss, 0, sizeof(*ss)); + ss->ss0.surface_type = I965_SURFACE_2D; + ss->ss0.surface_format = I965_SURFACEFORMAT_R8_UNORM; + ss->ss1.base_addr = pp_context->surfaces[index].s_bo->offset; + ss->ss2.width = orig_w / 4 - 1; + ss->ss2.height = orig_h - 1; + ss->ss3.pitch = w - 1; + pp_set_surface_tiling(ss, tiling); + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, + I915_GEM_DOMAIN_RENDER, + 0, + offsetof(struct i965_surface_state, ss1), + pp_context->surfaces[index].s_bo); + dri_bo_unmap(bo); + + /* destination UV surface index 8 */ + index = 8; + pp_context->surfaces[index].s_bo = obj_surface->bo; + dri_bo_reference(pp_context->surfaces[index].s_bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "surface state", + sizeof(struct i965_surface_state), + 4096); + assert(bo); + pp_context->surfaces[index].ss_bo = bo; + dri_bo_map(bo, True); + assert(bo->virtual); + ss = bo->virtual; + memset(ss, 0, sizeof(*ss)); + ss->ss0.surface_type = I965_SURFACE_2D; + ss->ss0.surface_format = I965_SURFACEFORMAT_R8G8_UNORM; + ss->ss1.base_addr = pp_context->surfaces[index].s_bo->offset + w * h; + ss->ss2.width = orig_w / 4 - 1; + ss->ss2.height = orig_h / 2 - 1; + ss->ss3.pitch = w - 1; + pp_set_surface_tiling(ss, tiling); + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, + I915_GEM_DOMAIN_RENDER, + w * h, + offsetof(struct i965_surface_state, ss1), + pp_context->surfaces[index].s_bo); + dri_bo_unmap(bo); + + /* sampler dndi */ + dri_bo_map(pp_context->sampler_state_table.bo, True); + assert(pp_context->sampler_state_table.bo->virtual); + assert(sizeof(*sampler_dndi) == sizeof(int) * 8); + sampler_dndi = pp_context->sampler_state_table.bo->virtual; + + /* sample dndi index 1 */ + index = 0; + sampler_dndi[index].dw0.denoise_asd_threshold = 0; + sampler_dndi[index].dw0.denoise_history_delta = 8; // 0-15, default is 8 + sampler_dndi[index].dw0.denoise_maximum_history = 128; // 128-240 + sampler_dndi[index].dw0.denoise_stad_threshold = 0; + + sampler_dndi[index].dw1.denoise_threshold_for_sum_of_complexity_measure = 64; + sampler_dndi[index].dw1.denoise_moving_pixel_threshold = 0; + sampler_dndi[index].dw1.stmm_c2 = 0; + sampler_dndi[index].dw1.low_temporal_difference_threshold = 8; + sampler_dndi[index].dw1.temporal_difference_threshold = 16; + + sampler_dndi[index].dw2.block_noise_estimate_noise_threshold = 15; // 0-31 + sampler_dndi[index].dw2.block_noise_estimate_edge_threshold = 7; // 0-15 + sampler_dndi[index].dw2.denoise_edge_threshold = 7; // 0-15 + sampler_dndi[index].dw2.good_neighbor_threshold = 7; // 0-63 + + sampler_dndi[index].dw3.maximum_stmm = 128; + sampler_dndi[index].dw3.multipler_for_vecm = 2; + sampler_dndi[index].dw3.blending_constant_across_time_for_small_values_of_stmm = 0; + sampler_dndi[index].dw3.blending_constant_across_time_for_large_values_of_stmm = 64; + sampler_dndi[index].dw3.stmm_blending_constant_select = 0; + + sampler_dndi[index].dw4.sdi_delta = 8; + sampler_dndi[index].dw4.sdi_threshold = 128; + sampler_dndi[index].dw4.stmm_output_shift = 7; // stmm_max - stmm_min = 2 ^ stmm_output_shift + sampler_dndi[index].dw4.stmm_shift_up = 0; + sampler_dndi[index].dw4.stmm_shift_down = 0; + sampler_dndi[index].dw4.minimum_stmm = 0; + + sampler_dndi[index].dw5.fmd_temporal_difference_threshold = 0; + sampler_dndi[index].dw5.sdi_fallback_mode_2_constant = 0; + sampler_dndi[index].dw5.sdi_fallback_mode_1_t2_constant = 0; + sampler_dndi[index].dw5.sdi_fallback_mode_1_t1_constant = 0; + + sampler_dndi[index].dw6.dn_enable = 1; + sampler_dndi[index].dw6.di_enable = 1; + sampler_dndi[index].dw6.di_partial = 0; + sampler_dndi[index].dw6.dndi_top_first = 1; + sampler_dndi[index].dw6.dndi_stream_id = 1; + sampler_dndi[index].dw6.dndi_first_frame = 1; + sampler_dndi[index].dw6.progressive_dn = 0; + sampler_dndi[index].dw6.fmd_tear_threshold = 32; + sampler_dndi[index].dw6.fmd2_vertical_difference_threshold = 32; + sampler_dndi[index].dw6.fmd1_vertical_difference_threshold = 32; + + sampler_dndi[index].dw7.fmd_for_1st_field_of_current_frame = 2; + sampler_dndi[index].dw7.fmd_for_2nd_field_of_previous_frame = 1; + sampler_dndi[index].dw7.vdi_walker_enable = 0; + sampler_dndi[index].dw7.column_width_minus1 = w / 16; + + dri_bo_unmap(pp_context->sampler_state_table.bo); + + /* private function & data */ + pp_context->pp_x_steps = pp_dndi_x_steps; + pp_context->pp_y_steps = pp_dndi_y_steps; + pp_context->pp_set_block_parameter = pp_dndi_set_block_parameter; + + pp_static_parameter.grf1.statistics_surface_picth = w / 2; + pp_static_parameter.grf1.r1_6.di.top_field_first = 0; + pp_static_parameter.grf4.r4_2.di.motion_history_coefficient_m2 = 64; + pp_static_parameter.grf4.r4_2.di.motion_history_coefficient_m1 = 192; + + pp_inline_parameter.grf5.block_count_x = w / 16; /* 1 x N */ + pp_inline_parameter.grf5.number_blocks = w / 16; + pp_inline_parameter.grf5.block_vertical_mask = 0xff; + pp_inline_parameter.grf5.block_horizontal_mask = 0xffff; + + pp_dndi_context->dest_w = w; + pp_dndi_context->dest_h = h; +} + +static void +ironlake_pp_initialize( + VADriverContextP ctx, + VASurfaceID in_surface_id, + VASurfaceID out_surface_id, + const VARectangle *src_rect, + const VARectangle *dst_rect, + int pp_index +) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_post_processing_context *pp_context = i965->pp_context; + struct pp_module *pp_module; + dri_bo *bo; + int i; + + dri_bo_unreference(pp_context->curbe.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "constant buffer", + 4096, + 4096); + assert(bo); + pp_context->curbe.bo = bo; + + dri_bo_unreference(pp_context->binding_table.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "binding table", + sizeof(unsigned int), + 4096); + assert(bo); + pp_context->binding_table.bo = bo; + + dri_bo_unreference(pp_context->idrt.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "interface discriptor", + sizeof(struct i965_interface_descriptor), + 4096); + assert(bo); + pp_context->idrt.bo = bo; + pp_context->idrt.num_interface_descriptors = 0; + + dri_bo_unreference(pp_context->sampler_state_table.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "sampler state table", + 4096, + 4096); + assert(bo); + dri_bo_map(bo, True); + memset(bo->virtual, 0, bo->size); + dri_bo_unmap(bo); + pp_context->sampler_state_table.bo = bo; + + dri_bo_unreference(pp_context->sampler_state_table.bo_8x8); + bo = dri_bo_alloc(i965->intel.bufmgr, + "sampler 8x8 state ", + 4096, + 4096); + assert(bo); + pp_context->sampler_state_table.bo_8x8 = bo; + + dri_bo_unreference(pp_context->sampler_state_table.bo_8x8_uv); + bo = dri_bo_alloc(i965->intel.bufmgr, + "sampler 8x8 state ", + 4096, + 4096); + assert(bo); + pp_context->sampler_state_table.bo_8x8_uv = bo; + + dri_bo_unreference(pp_context->vfe_state.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "vfe state", + sizeof(struct i965_vfe_state), + 4096); + assert(bo); + pp_context->vfe_state.bo = bo; + + for (i = 0; i < MAX_PP_SURFACES; i++) { + dri_bo_unreference(pp_context->surfaces[i].ss_bo); + pp_context->surfaces[i].ss_bo = NULL; + + dri_bo_unreference(pp_context->surfaces[i].s_bo); + pp_context->surfaces[i].s_bo = NULL; + } + + memset(&pp_static_parameter, 0, sizeof(pp_static_parameter)); + memset(&pp_inline_parameter, 0, sizeof(pp_inline_parameter)); + assert(pp_index >= PP_NULL && pp_index < NUM_PP_MODULES); + pp_context->current_pp = pp_index; + pp_module = &pp_context->pp_modules[pp_index]; + + if (pp_module->initialize) + pp_module->initialize(ctx, in_surface_id, out_surface_id, + src_rect, dst_rect); +} + +static void +ironlake_post_processing( + VADriverContextP ctx, + VASurfaceID in_surface_id, + VASurfaceID out_surface_id, + const VARectangle *src_rect, + const VARectangle *dst_rect, + int pp_index +) +{ + ironlake_pp_initialize(ctx, in_surface_id, out_surface_id, src_rect, dst_rect, pp_index); + ironlake_pp_states_setup(ctx); + ironlake_pp_pipeline_setup(ctx); +} + +static void +gen6_pp_initialize( + VADriverContextP ctx, + VASurfaceID in_surface_id, + VASurfaceID out_surface_id, + const VARectangle *src_rect, + const VARectangle *dst_rect, + int pp_index +) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_post_processing_context *pp_context = i965->pp_context; + struct pp_module *pp_module; + dri_bo *bo; + int i; + + dri_bo_unreference(pp_context->curbe.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "constant buffer", + 4096, + 4096); + assert(bo); + pp_context->curbe.bo = bo; + + dri_bo_unreference(pp_context->binding_table.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "binding table", + sizeof(unsigned int), + 4096); + assert(bo); + pp_context->binding_table.bo = bo; + + dri_bo_unreference(pp_context->idrt.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "interface discriptor", + sizeof(struct gen6_interface_descriptor_data), + 4096); + assert(bo); + pp_context->idrt.bo = bo; + pp_context->idrt.num_interface_descriptors = 0; + + dri_bo_unreference(pp_context->sampler_state_table.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "sampler state table", + 4096, + 4096); + assert(bo); + dri_bo_map(bo, True); + memset(bo->virtual, 0, bo->size); + dri_bo_unmap(bo); + pp_context->sampler_state_table.bo = bo; + + dri_bo_unreference(pp_context->sampler_state_table.bo_8x8); + bo = dri_bo_alloc(i965->intel.bufmgr, + "sampler 8x8 state ", + 4096, + 4096); + assert(bo); + pp_context->sampler_state_table.bo_8x8 = bo; + + dri_bo_unreference(pp_context->sampler_state_table.bo_8x8_uv); + bo = dri_bo_alloc(i965->intel.bufmgr, + "sampler 8x8 state ", + 4096, + 4096); + assert(bo); + pp_context->sampler_state_table.bo_8x8_uv = bo; + + dri_bo_unreference(pp_context->vfe_state.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "vfe state", + sizeof(struct i965_vfe_state), + 4096); + assert(bo); + pp_context->vfe_state.bo = bo; + + for (i = 0; i < MAX_PP_SURFACES; i++) { + dri_bo_unreference(pp_context->surfaces[i].ss_bo); + pp_context->surfaces[i].ss_bo = NULL; + + dri_bo_unreference(pp_context->surfaces[i].s_bo); + pp_context->surfaces[i].s_bo = NULL; + } + + memset(&pp_static_parameter, 0, sizeof(pp_static_parameter)); + memset(&pp_inline_parameter, 0, sizeof(pp_inline_parameter)); + assert(pp_index >= PP_NULL && pp_index < NUM_PP_MODULES); + pp_context->current_pp = pp_index; + pp_module = &pp_context->pp_modules[pp_index]; + + if (pp_module->initialize) + pp_module->initialize(ctx, in_surface_id, out_surface_id, + src_rect, dst_rect); +} + +static void +gen6_pp_binding_table(struct i965_post_processing_context *pp_context) +{ + unsigned int *binding_table; + dri_bo *bo = pp_context->binding_table.bo; + int i; + + dri_bo_map(bo, 1); + assert(bo->virtual); + binding_table = bo->virtual; + memset(binding_table, 0, bo->size); + + for (i = 0; i < MAX_PP_SURFACES; i++) { + if (pp_context->surfaces[i].ss_bo) { + assert(pp_context->surfaces[i].s_bo); + + binding_table[i] = pp_context->surfaces[i].ss_bo->offset; + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0, + i * sizeof(*binding_table), + pp_context->surfaces[i].ss_bo); + } + + } + + dri_bo_unmap(bo); +} + +static void +gen6_pp_interface_descriptor_table(struct i965_post_processing_context *pp_context) +{ + struct gen6_interface_descriptor_data *desc; + dri_bo *bo; + int pp_index = pp_context->current_pp; + + bo = pp_context->idrt.bo; + dri_bo_map(bo, True); + assert(bo->virtual); + desc = bo->virtual; + memset(desc, 0, sizeof(*desc)); + desc->desc0.kernel_start_pointer = + pp_context->pp_modules[pp_index].kernel.bo->offset >> 6; /* reloc */ + desc->desc1.single_program_flow = 1; + desc->desc1.floating_point_mode = FLOATING_POINT_IEEE_754; + desc->desc2.sampler_count = 1; /* 1 - 4 samplers used */ + desc->desc2.sampler_state_pointer = + pp_context->sampler_state_table.bo->offset >> 5; + desc->desc3.binding_table_entry_count = 0; + desc->desc3.binding_table_pointer = + pp_context->binding_table.bo->offset >> 5; /*reloc */ + desc->desc4.constant_urb_entry_read_offset = 0; + desc->desc4.constant_urb_entry_read_length = 4; /* grf 1-4 */ + + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0, + offsetof(struct gen6_interface_descriptor_data, desc0), + pp_context->pp_modules[pp_index].kernel.bo); + + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + desc->desc2.sampler_count << 2, + offsetof(struct gen6_interface_descriptor_data, desc2), + pp_context->sampler_state_table.bo); + + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + desc->desc3.binding_table_entry_count, + offsetof(struct gen6_interface_descriptor_data, desc3), + pp_context->binding_table.bo); + + dri_bo_unmap(bo); + pp_context->idrt.num_interface_descriptors++; +} + +static void +gen6_pp_upload_constants(struct i965_post_processing_context *pp_context) +{ + unsigned char *constant_buffer; + + assert(sizeof(pp_static_parameter) == 128); + dri_bo_map(pp_context->curbe.bo, 1); + assert(pp_context->curbe.bo->virtual); + constant_buffer = pp_context->curbe.bo->virtual; + memcpy(constant_buffer, &pp_static_parameter, sizeof(pp_static_parameter)); + dri_bo_unmap(pp_context->curbe.bo); +} + +static void +gen6_pp_states_setup(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_post_processing_context *pp_context = i965->pp_context; + + gen6_pp_binding_table(pp_context); + gen6_pp_interface_descriptor_table(pp_context); + gen6_pp_upload_constants(pp_context); +} + +static void +gen6_pp_pipeline_select(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + BEGIN_BATCH(batch, 1); + OUT_BATCH(batch, CMD_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA); + ADVANCE_BATCH(batch); +} + +static void +gen6_pp_state_base_address(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + BEGIN_BATCH(batch, 10); + OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | (10 - 2)); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + ADVANCE_BATCH(batch); +} + +static void +gen6_pp_vfe_state(VADriverContextP ctx, struct i965_post_processing_context *pp_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + BEGIN_BATCH(batch, 8); + OUT_BATCH(batch, CMD_MEDIA_VFE_STATE | (8 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, + (pp_context->urb.num_vfe_entries - 1) << 16 | + pp_context->urb.num_vfe_entries << 8); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, + (pp_context->urb.size_vfe_entry * 2) << 16 | /* in 256 bits unit */ + (pp_context->urb.size_cs_entry * pp_context->urb.num_cs_entries * 2 - 1)); /* in 256 bits unit */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); +} + +static void +gen6_pp_curbe_load(VADriverContextP ctx, struct i965_post_processing_context *pp_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + assert(pp_context->urb.size_cs_entry * pp_context->urb.num_cs_entries * 512 <= pp_context->curbe.bo->size); + + BEGIN_BATCH(batch, 4); + OUT_BATCH(batch, CMD_MEDIA_CURBE_LOAD | (4 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, + pp_context->urb.size_cs_entry * pp_context->urb.num_cs_entries * 512); + OUT_RELOC(batch, + pp_context->curbe.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + ADVANCE_BATCH(batch); +} + +static void +gen6_interface_descriptor_load(VADriverContextP ctx, struct i965_post_processing_context *pp_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + BEGIN_BATCH(batch, 4); + OUT_BATCH(batch, CMD_MEDIA_INTERFACE_DESCRIPTOR_LOAD | (4 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, + pp_context->idrt.num_interface_descriptors * sizeof(struct gen6_interface_descriptor_data)); + OUT_RELOC(batch, + pp_context->idrt.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + ADVANCE_BATCH(batch); +} + +static void +gen6_pp_object_walker(VADriverContextP ctx, struct i965_post_processing_context *pp_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + int x, x_steps, y, y_steps; + + x_steps = pp_context->pp_x_steps(&pp_context->private_context); + y_steps = pp_context->pp_y_steps(&pp_context->private_context); + + for (y = 0; y < y_steps; y++) { + for (x = 0; x < x_steps; x++) { + if (!pp_context->pp_set_block_parameter(pp_context, x, y)) { + BEGIN_BATCH(batch, 22); + OUT_BATCH(batch, CMD_MEDIA_OBJECT | 20); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); /* no indirect data */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); /* scoreboard */ + OUT_BATCH(batch, 0); + + /* inline data grf 5-6 */ + assert(sizeof(pp_inline_parameter) == 64); + intel_batchbuffer_data(batch, &pp_inline_parameter, sizeof(pp_inline_parameter)); + + ADVANCE_BATCH(batch); + } + } + } +} + +static void +gen6_pp_pipeline_setup(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_post_processing_context *pp_context = i965->pp_context; + + intel_batchbuffer_start_atomic(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); + gen6_pp_pipeline_select(ctx); + gen6_pp_curbe_load(ctx, pp_context); + gen6_interface_descriptor_load(ctx, pp_context); + gen6_pp_state_base_address(ctx); + gen6_pp_vfe_state(ctx, pp_context); + gen6_pp_object_walker(ctx, pp_context); + intel_batchbuffer_end_atomic(batch); +} + +static void +gen6_post_processing( + VADriverContextP ctx, + VASurfaceID in_surface_id, + VASurfaceID out_surface_id, + const VARectangle *src_rect, + const VARectangle *dst_rect, + int pp_index +) +{ + gen6_pp_initialize(ctx, in_surface_id, out_surface_id, src_rect, dst_rect, pp_index); + gen6_pp_states_setup(ctx); + gen6_pp_pipeline_setup(ctx); +} + +static void +i965_post_processing_internal( + VADriverContextP ctx, + VASurfaceID in_surface_id, + VASurfaceID out_surface_id, + const VARectangle *src_rect, + const VARectangle *dst_rect, + int pp_index +) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + + if (IS_GEN6(i965->intel.device_id) || + IS_GEN7(i965->intel.device_id)) + gen6_post_processing(ctx, in_surface_id, out_surface_id, src_rect, dst_rect, pp_index); + else + ironlake_post_processing(ctx, in_surface_id, out_surface_id, src_rect, dst_rect, pp_index); +} + +VAStatus +i965_DestroySurfaces(VADriverContextP ctx, + VASurfaceID *surface_list, + int num_surfaces); +VAStatus +i965_CreateSurfaces(VADriverContextP ctx, + int width, + int height, + int format, + int num_surfaces, + VASurfaceID *surfaces); +VASurfaceID +i965_post_processing( + VADriverContextP ctx, + VASurfaceID surface, + const VARectangle *src_rect, + const VARectangle *dst_rect, + unsigned int flags, + int *has_done_scaling +) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + VASurfaceID in_surface_id = surface; + VASurfaceID out_surface_id = VA_INVALID_ID; + + if (HAS_PP(i965)) { + /* Currently only support post processing for NV12 surface */ + if (i965->render_state.interleaved_uv) { + struct object_surface *obj_surface; + VAStatus status; + + if (flags & I965_PP_FLAG_DEINTERLACING) { + obj_surface = SURFACE(in_surface_id); + status = i965_CreateSurfaces(ctx, + obj_surface->orig_width, + obj_surface->orig_height, + VA_RT_FORMAT_YUV420, + 1, + &out_surface_id); + assert(status == VA_STATUS_SUCCESS); + obj_surface = SURFACE(out_surface_id); + i965_check_alloc_surface_bo(ctx, obj_surface, 0, VA_FOURCC('N','V','1','2')); + i965_post_processing_internal(ctx, + in_surface_id, out_surface_id, + src_rect, dst_rect, + PP_NV12_DNDI); + } + + if (flags & I965_PP_FLAG_AVS) { + struct i965_render_state *render_state = &i965->render_state; + struct intel_region *dest_region = render_state->draw_region; + + if (out_surface_id != VA_INVALID_ID) + in_surface_id = out_surface_id; + + status = i965_CreateSurfaces(ctx, + dest_region->width, + dest_region->height, + VA_RT_FORMAT_YUV420, + 1, + &out_surface_id); + assert(status == VA_STATUS_SUCCESS); + obj_surface = SURFACE(out_surface_id); + i965_check_alloc_surface_bo(ctx, obj_surface, 0, VA_FOURCC('N','V','1','2')); + i965_post_processing_internal(ctx, + in_surface_id, out_surface_id, + src_rect, dst_rect, + PP_NV12_AVS); + + if (in_surface_id != surface) + i965_DestroySurfaces(ctx, &in_surface_id, 1); + + *has_done_scaling = 1; + } + } + } + + return out_surface_id; +} + +Bool +i965_post_processing_terminate(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_post_processing_context *pp_context = i965->pp_context; + int i; + + if (HAS_PP(i965)) { + if (pp_context) { + dri_bo_unreference(pp_context->curbe.bo); + pp_context->curbe.bo = NULL; + + for (i = 0; i < MAX_PP_SURFACES; i++) { + dri_bo_unreference(pp_context->surfaces[i].ss_bo); + pp_context->surfaces[i].ss_bo = NULL; + + dri_bo_unreference(pp_context->surfaces[i].s_bo); + pp_context->surfaces[i].s_bo = NULL; + } + + dri_bo_unreference(pp_context->sampler_state_table.bo); + pp_context->sampler_state_table.bo = NULL; + + dri_bo_unreference(pp_context->sampler_state_table.bo_8x8); + pp_context->sampler_state_table.bo_8x8 = NULL; + + dri_bo_unreference(pp_context->sampler_state_table.bo_8x8_uv); + pp_context->sampler_state_table.bo_8x8_uv = NULL; + + dri_bo_unreference(pp_context->binding_table.bo); + pp_context->binding_table.bo = NULL; + + dri_bo_unreference(pp_context->idrt.bo); + pp_context->idrt.bo = NULL; + pp_context->idrt.num_interface_descriptors = 0; + + dri_bo_unreference(pp_context->vfe_state.bo); + pp_context->vfe_state.bo = NULL; + + dri_bo_unreference(pp_context->stmm.bo); + pp_context->stmm.bo = NULL; + + for (i = 0; i < NUM_PP_MODULES; i++) { + struct pp_module *pp_module = &pp_context->pp_modules[i]; + + dri_bo_unreference(pp_module->kernel.bo); + pp_module->kernel.bo = NULL; + } + + free(pp_context); + } + + i965->pp_context = NULL; + } + + return True; +} + +Bool +i965_post_processing_init(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_post_processing_context *pp_context = i965->pp_context; + int i; + + if (HAS_PP(i965)) { + if (pp_context == NULL) { + pp_context = calloc(1, sizeof(*pp_context)); + i965->pp_context = pp_context; + + pp_context->urb.size = URB_SIZE((&i965->intel)); + pp_context->urb.num_vfe_entries = 32; + pp_context->urb.size_vfe_entry = 1; /* in 512 bits unit */ + pp_context->urb.num_cs_entries = 1; + pp_context->urb.size_cs_entry = 2; /* in 512 bits unit */ + pp_context->urb.vfe_start = 0; + pp_context->urb.cs_start = pp_context->urb.vfe_start + + pp_context->urb.num_vfe_entries * pp_context->urb.size_vfe_entry; + assert(pp_context->urb.cs_start + + pp_context->urb.num_cs_entries * pp_context->urb.size_cs_entry <= URB_SIZE((&i965->intel))); + + assert(NUM_PP_MODULES == ARRAY_ELEMS(pp_modules_gen5)); + assert(NUM_PP_MODULES == ARRAY_ELEMS(pp_modules_gen6)); + + if (IS_GEN6(i965->intel.device_id) || + IS_GEN7(i965->intel.device_id)) + memcpy(pp_context->pp_modules, pp_modules_gen6, sizeof(pp_context->pp_modules)); + else if (IS_IRONLAKE(i965->intel.device_id)) + memcpy(pp_context->pp_modules, pp_modules_gen5, sizeof(pp_context->pp_modules)); + + for (i = 0; i < NUM_PP_MODULES; i++) { + struct pp_module *pp_module = &pp_context->pp_modules[i]; + dri_bo_unreference(pp_module->kernel.bo); + pp_module->kernel.bo = dri_bo_alloc(i965->intel.bufmgr, + pp_module->kernel.name, + pp_module->kernel.size, + 4096); + assert(pp_module->kernel.bo); + dri_bo_subdata(pp_module->kernel.bo, 0, pp_module->kernel.size, pp_module->kernel.bin); + } + } + } + + return True; +} diff --git a/src/i965_post_processing.h b/src/i965_post_processing.h new file mode 100644 index 00000000..0981854d --- /dev/null +++ b/src/i965_post_processing.h @@ -0,0 +1,375 @@ +/* + * Copyright © 2010 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao <haihao.xiang@intel.com> + * + */ + +#ifndef __I965_POST_PROCESSING_H__ +#define __I965_POST_PROCESSING_H__ + +#define MAX_PP_SURFACES 32 + +#define I965_PP_FLAG_DEINTERLACING 1 +#define I965_PP_FLAG_AVS 2 + +enum +{ + PP_NULL = 0, + PP_NV12_LOAD_SAVE, + PP_NV12_SCALING, + PP_NV12_AVS, + PP_NV12_DNDI, +}; + +#define NUM_PP_MODULES 5 + +struct pp_load_save_context +{ + int dest_w; + int dest_h; +}; + +struct pp_scaling_context +{ + int dest_x; /* in pixel */ + int dest_y; /* in pixel */ + int dest_w; + int dest_h; + int src_normalized_x; + int src_normalized_y; +}; + +struct pp_avs_context +{ + int dest_x; /* in pixel */ + int dest_y; /* in pixel */ + int dest_w; + int dest_h; + int src_normalized_x; + int src_normalized_y; + int src_w; + int src_h; +}; + +struct pp_dndi_context +{ + int dest_w; + int dest_h; +}; + +struct pp_module +{ + struct i965_kernel kernel; + + /* others */ + void (*initialize)(VADriverContextP ctx, + VASurfaceID in_surface_id, VASurfaceID out_surface_id, + const VARectangle *src_rect, const VARectangle *dst_rect); +}; + +struct pp_static_parameter +{ + struct { + /* Procamp r1.0 */ + float procamp_constant_c0; + + /* Load and Same r1.1 */ + unsigned int source_packed_y_offset:8; + unsigned int source_packed_u_offset:8; + unsigned int source_packed_v_offset:8; + unsigned int pad0:8; + + union { + /* Load and Save r1.2 */ + struct { + unsigned int destination_packed_y_offset:8; + unsigned int destination_packed_u_offset:8; + unsigned int destination_packed_v_offset:8; + unsigned int pad0:8; + } load_and_save; + + /* CSC r1.2 */ + struct { + unsigned int destination_rgb_format:8; + unsigned int pad0:24; + } csc; + } r1_2; + + /* Procamp r1.3 */ + float procamp_constant_c1; + + /* Procamp r1.4 */ + float procamp_constant_c2; + + /* DI r1.5 */ + unsigned int statistics_surface_picth:16; /* Devided by 2 */ + unsigned int pad1:16; + + union { + /* DI r1.6 */ + struct { + unsigned int pad0:24; + unsigned int top_field_first:8; + } di; + + /* AVS/Scaling r1.6 */ + float normalized_video_y_scaling_step; + } r1_6; + + /* Procamp r1.7 */ + float procamp_constant_c5; + } grf1; + + struct { + /* Procamp r2.0 */ + float procamp_constant_c3; + + /* MBZ r2.1*/ + unsigned int pad0; + + /* WG+CSC r2.2 */ + float wg_csc_constant_c4; + + /* WG+CSC r2.3 */ + float wg_csc_constant_c8; + + /* Procamp r2.4 */ + float procamp_constant_c4; + + /* MBZ r2.5 */ + unsigned int pad1; + + /* MBZ r2.6 */ + unsigned int pad2; + + /* WG+CSC r2.7 */ + float wg_csc_constant_c9; + } grf2; + + struct { + /* WG+CSC r3.0 */ + float wg_csc_constant_c0; + + /* Blending r3.1 */ + float scaling_step_ratio; + + /* Blending r3.2 */ + float normalized_alpha_y_scaling; + + /* WG+CSC r3.3 */ + float wg_csc_constant_c4; + + /* WG+CSC r3.4 */ + float wg_csc_constant_c1; + + /* ALL r3.5 */ + int horizontal_origin_offset:16; + int vertical_origin_offset:16; + + /* Shared r3.6*/ + union { + /* Color filll */ + unsigned int color_pixel; + + /* WG+CSC */ + float wg_csc_constant_c2; + } r3_6; + + /* WG+CSC r3.7 */ + float wg_csc_constant_c3; + } grf3; + + struct { + /* WG+CSC r4.0 */ + float wg_csc_constant_c6; + + /* ALL r4.1 MBZ ???*/ + unsigned int pad0; + + /* Shared r4.2 */ + union { + /* AVS */ + struct { + unsigned int pad1:15; + unsigned int nlas:1; + unsigned int pad2:16; + } avs; + + /* DI */ + struct { + unsigned int motion_history_coefficient_m2:8; + unsigned int motion_history_coefficient_m1:8; + unsigned int pad0:16; + } di; + } r4_2; + + /* WG+CSC r4.3 */ + float wg_csc_constant_c7; + + /* WG+CSC r4.4 */ + float wg_csc_constant_c10; + + /* AVS r4.5 */ + float source_video_frame_normalized_horizontal_origin; + + /* MBZ r4.6 */ + unsigned int pad1; + + /* WG+CSC r4.7 */ + float wg_csc_constant_c11; + } grf4; +}; + +struct pp_inline_parameter +{ + struct { + /* ALL r5.0 */ + int destination_block_horizontal_origin:16; + int destination_block_vertical_origin:16; + + /* Shared r5.1 */ + union { + /* AVS/Scaling */ + float source_surface_block_normalized_horizontal_origin; + + /* FMD */ + struct { + unsigned int variance_surface_vertical_origin:16; + unsigned int pad0:16; + } fmd; + } r5_1; + + /* AVS/Scaling r5.2 */ + float source_surface_block_normalized_vertical_origin; + + /* Alpha r5.3 */ + float alpha_surface_block_normalized_horizontal_origin; + + /* Alpha r5.4 */ + float alpha_surface_block_normalized_vertical_origin; + + /* Alpha r5.5 */ + unsigned int alpha_mask_x:16; + unsigned int alpha_mask_y:8; + unsigned int block_count_x:8; + + /* r5.6 */ + unsigned int block_horizontal_mask:16; + unsigned int block_vertical_mask:8; + unsigned int number_blocks:8; + + /* AVS/Scaling r5.7 */ + float normalized_video_x_scaling_step; + } grf5; + + struct { + /* AVS r6.0 */ + float video_step_delta; + + /* r6.1-r6.7 */ + unsigned int padx[7]; + } grf6; +}; + +struct i965_post_processing_context +{ + int current_pp; + struct pp_module pp_modules[NUM_PP_MODULES]; + struct pp_static_parameter pp_static_parameter; + struct pp_inline_parameter pp_inline_parameter; + + struct { + dri_bo *bo; + } curbe; + + struct { + dri_bo *ss_bo; + dri_bo *s_bo; + } surfaces[MAX_PP_SURFACES]; + + struct { + dri_bo *bo; + } binding_table; + + struct { + dri_bo *bo; + int num_interface_descriptors; + } idrt; + + struct { + dri_bo *bo; + } vfe_state; + + struct { + dri_bo *bo; + dri_bo *bo_8x8; + dri_bo *bo_8x8_uv; + } sampler_state_table; + + struct { + unsigned int size; + + unsigned int vfe_start; + unsigned int cs_start; + + unsigned int num_vfe_entries; + unsigned int num_cs_entries; + + unsigned int size_vfe_entry; + unsigned int size_cs_entry; + } urb; + + struct { + dri_bo *bo; + } stmm; + + union { + struct pp_load_save_context pp_load_save_context; + struct pp_scaling_context pp_scaling_context; + struct pp_avs_context pp_avs_context; + struct pp_dndi_context pp_dndi_context; + } private_context; + + int (*pp_x_steps)(void *private_context); + int (*pp_y_steps)(void *private_context); + int (*pp_set_block_parameter)(struct i965_post_processing_context *pp_context, int x, int y); +}; + +VASurfaceID +i965_post_processing( + VADriverContextP ctx, + VASurfaceID surface, + const VARectangle *src_rect, + const VARectangle *dst_rect, + unsigned int flags, + int *has_done_scaling +); + +Bool +i965_post_processing_terminate(VADriverContextP ctx); +Bool +i965_post_processing_init(VADriverContextP ctx); + +#endif /* __I965_POST_PROCESSING_H__ */ diff --git a/src/i965_render.c b/src/i965_render.c new file mode 100644 index 00000000..fee71090 --- /dev/null +++ b/src/i965_render.c @@ -0,0 +1,3037 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Eric Anholt <eric@anholt.net> + * Keith Packard <keithp@keithp.com> + * Xiang Haihao <haihao.xiang@intel.com> + * + */ + +/* + * Most of rendering codes are ported from xf86-video-intel/src/i965_video.c + */ + +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <assert.h> + +#include <va/va_backend.h> +#include "va/x11/va_dricommon.h" + +#include "intel_batchbuffer.h" +#include "intel_driver.h" +#include "i965_defines.h" +#include "i965_drv_video.h" +#include "i965_structs.h" + +#include "i965_render.h" + +#define SF_KERNEL_NUM_GRF 16 +#define SF_MAX_THREADS 1 + +static const uint32_t sf_kernel_static[][4] = +{ +#include "shaders/render/exa_sf.g4b" +}; + +#define PS_KERNEL_NUM_GRF 32 +#define PS_MAX_THREADS 32 + +#define I965_GRF_BLOCKS(nreg) ((nreg + 15) / 16 - 1) + +static const uint32_t ps_kernel_static[][4] = +{ +#include "shaders/render/exa_wm_xy.g4b" +#include "shaders/render/exa_wm_src_affine.g4b" +#include "shaders/render/exa_wm_src_sample_planar.g4b" +#include "shaders/render/exa_wm_yuv_rgb.g4b" +#include "shaders/render/exa_wm_write.g4b" +}; +static const uint32_t ps_subpic_kernel_static[][4] = +{ +#include "shaders/render/exa_wm_xy.g4b" +#include "shaders/render/exa_wm_src_affine.g4b" +#include "shaders/render/exa_wm_src_sample_argb.g4b" +#include "shaders/render/exa_wm_write.g4b" +}; + +/* On IRONLAKE */ +static const uint32_t sf_kernel_static_gen5[][4] = +{ +#include "shaders/render/exa_sf.g4b.gen5" +}; + +static const uint32_t ps_kernel_static_gen5[][4] = +{ +#include "shaders/render/exa_wm_xy.g4b.gen5" +#include "shaders/render/exa_wm_src_affine.g4b.gen5" +#include "shaders/render/exa_wm_src_sample_planar.g4b.gen5" +#include "shaders/render/exa_wm_yuv_rgb.g4b.gen5" +#include "shaders/render/exa_wm_write.g4b.gen5" +}; +static const uint32_t ps_subpic_kernel_static_gen5[][4] = +{ +#include "shaders/render/exa_wm_xy.g4b.gen5" +#include "shaders/render/exa_wm_src_affine.g4b.gen5" +#include "shaders/render/exa_wm_src_sample_argb.g4b.gen5" +#include "shaders/render/exa_wm_write.g4b.gen5" +}; + +/* programs for Sandybridge */ +static const uint32_t sf_kernel_static_gen6[][4] = +{ +}; + +static const uint32_t ps_kernel_static_gen6[][4] = { +#include "shaders/render/exa_wm_src_affine.g6b" +#include "shaders/render/exa_wm_src_sample_planar.g6b" +#include "shaders/render/exa_wm_yuv_rgb.g6b" +#include "shaders/render/exa_wm_write.g6b" +}; + +static const uint32_t ps_subpic_kernel_static_gen6[][4] = { +#include "shaders/render/exa_wm_src_affine.g6b" +#include "shaders/render/exa_wm_src_sample_argb.g6b" +#include "shaders/render/exa_wm_write.g6b" +}; + +/* programs for Ivybridge */ +static const uint32_t sf_kernel_static_gen7[][4] = +{ +}; + +static const uint32_t ps_kernel_static_gen7[][4] = { +#include "shaders/render/exa_wm_src_affine.g7b" +#include "shaders/render/exa_wm_src_sample_planar.g7b" +#include "shaders/render/exa_wm_yuv_rgb.g7b" +#include "shaders/render/exa_wm_write.g7b" +}; + +static const uint32_t ps_subpic_kernel_static_gen7[][4] = { +#include "shaders/render/exa_wm_src_affine.g7b" +#include "shaders/render/exa_wm_src_sample_argb.g7b" +#include "shaders/render/exa_wm_write.g7b" +}; + +#define SURFACE_STATE_PADDED_SIZE_I965 ALIGN(sizeof(struct i965_surface_state), 32) +#define SURFACE_STATE_PADDED_SIZE_GEN7 ALIGN(sizeof(struct gen7_surface_state), 32) +#define SURFACE_STATE_PADDED_SIZE MAX(SURFACE_STATE_PADDED_SIZE_I965, SURFACE_STATE_PADDED_SIZE_GEN7) +#define SURFACE_STATE_OFFSET(index) (SURFACE_STATE_PADDED_SIZE * index) +#define BINDING_TABLE_OFFSET SURFACE_STATE_OFFSET(MAX_RENDER_SURFACES) + +static uint32_t float_to_uint (float f) +{ + union { + uint32_t i; + float f; + } x; + + x.f = f; + return x.i; +} + +enum +{ + SF_KERNEL = 0, + PS_KERNEL, + PS_SUBPIC_KERNEL +}; + +static struct i965_kernel render_kernels_gen4[] = { + { + "SF", + SF_KERNEL, + sf_kernel_static, + sizeof(sf_kernel_static), + NULL + }, + { + "PS", + PS_KERNEL, + ps_kernel_static, + sizeof(ps_kernel_static), + NULL + }, + + { + "PS_SUBPIC", + PS_SUBPIC_KERNEL, + ps_subpic_kernel_static, + sizeof(ps_subpic_kernel_static), + NULL + } +}; + +static struct i965_kernel render_kernels_gen5[] = { + { + "SF", + SF_KERNEL, + sf_kernel_static_gen5, + sizeof(sf_kernel_static_gen5), + NULL + }, + { + "PS", + PS_KERNEL, + ps_kernel_static_gen5, + sizeof(ps_kernel_static_gen5), + NULL + }, + + { + "PS_SUBPIC", + PS_SUBPIC_KERNEL, + ps_subpic_kernel_static_gen5, + sizeof(ps_subpic_kernel_static_gen5), + NULL + } +}; + +static struct i965_kernel render_kernels_gen6[] = { + { + "SF", + SF_KERNEL, + sf_kernel_static_gen6, + sizeof(sf_kernel_static_gen6), + NULL + }, + { + "PS", + PS_KERNEL, + ps_kernel_static_gen6, + sizeof(ps_kernel_static_gen6), + NULL + }, + + { + "PS_SUBPIC", + PS_SUBPIC_KERNEL, + ps_subpic_kernel_static_gen6, + sizeof(ps_subpic_kernel_static_gen6), + NULL + } +}; + +static struct i965_kernel render_kernels_gen7[] = { + { + "SF", + SF_KERNEL, + sf_kernel_static_gen7, + sizeof(sf_kernel_static_gen7), + NULL + }, + { + "PS", + PS_KERNEL, + ps_kernel_static_gen7, + sizeof(ps_kernel_static_gen7), + NULL + }, + + { + "PS_SUBPIC", + PS_SUBPIC_KERNEL, + ps_subpic_kernel_static_gen7, + sizeof(ps_subpic_kernel_static_gen7), + NULL + } +}; + +#define URB_VS_ENTRIES 8 +#define URB_VS_ENTRY_SIZE 1 + +#define URB_GS_ENTRIES 0 +#define URB_GS_ENTRY_SIZE 0 + +#define URB_CLIP_ENTRIES 0 +#define URB_CLIP_ENTRY_SIZE 0 + +#define URB_SF_ENTRIES 1 +#define URB_SF_ENTRY_SIZE 2 + +#define URB_CS_ENTRIES 1 +#define URB_CS_ENTRY_SIZE 1 + +static void +i965_render_vs_unit(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct i965_vs_unit_state *vs_state; + + dri_bo_map(render_state->vs.state, 1); + assert(render_state->vs.state->virtual); + vs_state = render_state->vs.state->virtual; + memset(vs_state, 0, sizeof(*vs_state)); + + if (IS_IRONLAKE(i965->intel.device_id)) + vs_state->thread4.nr_urb_entries = URB_VS_ENTRIES >> 2; + else + vs_state->thread4.nr_urb_entries = URB_VS_ENTRIES; + + vs_state->thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1; + vs_state->vs6.vs_enable = 0; + vs_state->vs6.vert_cache_disable = 1; + + dri_bo_unmap(render_state->vs.state); +} + +static void +i965_render_sf_unit(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct i965_sf_unit_state *sf_state; + + dri_bo_map(render_state->sf.state, 1); + assert(render_state->sf.state->virtual); + sf_state = render_state->sf.state->virtual; + memset(sf_state, 0, sizeof(*sf_state)); + + sf_state->thread0.grf_reg_count = I965_GRF_BLOCKS(SF_KERNEL_NUM_GRF); + sf_state->thread0.kernel_start_pointer = render_state->render_kernels[SF_KERNEL].bo->offset >> 6; + + sf_state->sf1.single_program_flow = 1; /* XXX */ + sf_state->sf1.binding_table_entry_count = 0; + sf_state->sf1.thread_priority = 0; + sf_state->sf1.floating_point_mode = 0; /* Mesa does this */ + sf_state->sf1.illegal_op_exception_enable = 1; + sf_state->sf1.mask_stack_exception_enable = 1; + sf_state->sf1.sw_exception_enable = 1; + + /* scratch space is not used in our kernel */ + sf_state->thread2.per_thread_scratch_space = 0; + sf_state->thread2.scratch_space_base_pointer = 0; + + sf_state->thread3.const_urb_entry_read_length = 0; /* no const URBs */ + sf_state->thread3.const_urb_entry_read_offset = 0; /* no const URBs */ + sf_state->thread3.urb_entry_read_length = 1; /* 1 URB per vertex */ + sf_state->thread3.urb_entry_read_offset = 0; + sf_state->thread3.dispatch_grf_start_reg = 3; + + sf_state->thread4.max_threads = SF_MAX_THREADS - 1; + sf_state->thread4.urb_entry_allocation_size = URB_SF_ENTRY_SIZE - 1; + sf_state->thread4.nr_urb_entries = URB_SF_ENTRIES; + sf_state->thread4.stats_enable = 1; + + sf_state->sf5.viewport_transform = 0; /* skip viewport */ + + sf_state->sf6.cull_mode = I965_CULLMODE_NONE; + sf_state->sf6.scissor = 0; + + sf_state->sf7.trifan_pv = 2; + + sf_state->sf6.dest_org_vbias = 0x8; + sf_state->sf6.dest_org_hbias = 0x8; + + dri_bo_emit_reloc(render_state->sf.state, + I915_GEM_DOMAIN_INSTRUCTION, 0, + sf_state->thread0.grf_reg_count << 1, + offsetof(struct i965_sf_unit_state, thread0), + render_state->render_kernels[SF_KERNEL].bo); + + dri_bo_unmap(render_state->sf.state); +} + +static void +i965_render_sampler(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct i965_sampler_state *sampler_state; + int i; + + assert(render_state->wm.sampler_count > 0); + assert(render_state->wm.sampler_count <= MAX_SAMPLERS); + + dri_bo_map(render_state->wm.sampler, 1); + assert(render_state->wm.sampler->virtual); + sampler_state = render_state->wm.sampler->virtual; + for (i = 0; i < render_state->wm.sampler_count; i++) { + memset(sampler_state, 0, sizeof(*sampler_state)); + sampler_state->ss0.min_filter = I965_MAPFILTER_LINEAR; + sampler_state->ss0.mag_filter = I965_MAPFILTER_LINEAR; + sampler_state->ss1.r_wrap_mode = I965_TEXCOORDMODE_CLAMP; + sampler_state->ss1.s_wrap_mode = I965_TEXCOORDMODE_CLAMP; + sampler_state->ss1.t_wrap_mode = I965_TEXCOORDMODE_CLAMP; + sampler_state++; + } + + dri_bo_unmap(render_state->wm.sampler); +} +static void +i965_subpic_render_wm_unit(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct i965_wm_unit_state *wm_state; + + assert(render_state->wm.sampler); + + dri_bo_map(render_state->wm.state, 1); + assert(render_state->wm.state->virtual); + wm_state = render_state->wm.state->virtual; + memset(wm_state, 0, sizeof(*wm_state)); + + wm_state->thread0.grf_reg_count = I965_GRF_BLOCKS(PS_KERNEL_NUM_GRF); + wm_state->thread0.kernel_start_pointer = render_state->render_kernels[PS_SUBPIC_KERNEL].bo->offset >> 6; + + wm_state->thread1.single_program_flow = 1; /* XXX */ + + if (IS_IRONLAKE(i965->intel.device_id)) + wm_state->thread1.binding_table_entry_count = 0; /* hardware requirement */ + else + wm_state->thread1.binding_table_entry_count = 7; + + wm_state->thread2.scratch_space_base_pointer = 0; + wm_state->thread2.per_thread_scratch_space = 0; /* 1024 bytes */ + + wm_state->thread3.dispatch_grf_start_reg = 3; /* XXX */ + wm_state->thread3.const_urb_entry_read_length = 0; + wm_state->thread3.const_urb_entry_read_offset = 0; + wm_state->thread3.urb_entry_read_length = 1; /* XXX */ + wm_state->thread3.urb_entry_read_offset = 0; /* XXX */ + + wm_state->wm4.stats_enable = 0; + wm_state->wm4.sampler_state_pointer = render_state->wm.sampler->offset >> 5; + + if (IS_IRONLAKE(i965->intel.device_id)) { + wm_state->wm4.sampler_count = 0; /* hardware requirement */ + wm_state->wm5.max_threads = 12 * 6 - 1; + } else { + wm_state->wm4.sampler_count = (render_state->wm.sampler_count + 3) / 4; + wm_state->wm5.max_threads = 10 * 5 - 1; + } + + wm_state->wm5.thread_dispatch_enable = 1; + wm_state->wm5.enable_16_pix = 1; + wm_state->wm5.enable_8_pix = 0; + wm_state->wm5.early_depth_test = 1; + + dri_bo_emit_reloc(render_state->wm.state, + I915_GEM_DOMAIN_INSTRUCTION, 0, + wm_state->thread0.grf_reg_count << 1, + offsetof(struct i965_wm_unit_state, thread0), + render_state->render_kernels[PS_SUBPIC_KERNEL].bo); + + dri_bo_emit_reloc(render_state->wm.state, + I915_GEM_DOMAIN_INSTRUCTION, 0, + wm_state->wm4.sampler_count << 2, + offsetof(struct i965_wm_unit_state, wm4), + render_state->wm.sampler); + + dri_bo_unmap(render_state->wm.state); +} + + +static void +i965_render_wm_unit(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct i965_wm_unit_state *wm_state; + + assert(render_state->wm.sampler); + + dri_bo_map(render_state->wm.state, 1); + assert(render_state->wm.state->virtual); + wm_state = render_state->wm.state->virtual; + memset(wm_state, 0, sizeof(*wm_state)); + + wm_state->thread0.grf_reg_count = I965_GRF_BLOCKS(PS_KERNEL_NUM_GRF); + wm_state->thread0.kernel_start_pointer = render_state->render_kernels[PS_KERNEL].bo->offset >> 6; + + wm_state->thread1.single_program_flow = 1; /* XXX */ + + if (IS_IRONLAKE(i965->intel.device_id)) + wm_state->thread1.binding_table_entry_count = 0; /* hardware requirement */ + else + wm_state->thread1.binding_table_entry_count = 7; + + wm_state->thread2.scratch_space_base_pointer = 0; + wm_state->thread2.per_thread_scratch_space = 0; /* 1024 bytes */ + + wm_state->thread3.dispatch_grf_start_reg = 2; /* XXX */ + wm_state->thread3.const_urb_entry_read_length = 1; + wm_state->thread3.const_urb_entry_read_offset = 0; + wm_state->thread3.urb_entry_read_length = 1; /* XXX */ + wm_state->thread3.urb_entry_read_offset = 0; /* XXX */ + + wm_state->wm4.stats_enable = 0; + wm_state->wm4.sampler_state_pointer = render_state->wm.sampler->offset >> 5; + + if (IS_IRONLAKE(i965->intel.device_id)) { + wm_state->wm4.sampler_count = 0; /* hardware requirement */ + wm_state->wm5.max_threads = 12 * 6 - 1; + } else { + wm_state->wm4.sampler_count = (render_state->wm.sampler_count + 3) / 4; + wm_state->wm5.max_threads = 10 * 5 - 1; + } + + wm_state->wm5.thread_dispatch_enable = 1; + wm_state->wm5.enable_16_pix = 1; + wm_state->wm5.enable_8_pix = 0; + wm_state->wm5.early_depth_test = 1; + + dri_bo_emit_reloc(render_state->wm.state, + I915_GEM_DOMAIN_INSTRUCTION, 0, + wm_state->thread0.grf_reg_count << 1, + offsetof(struct i965_wm_unit_state, thread0), + render_state->render_kernels[PS_KERNEL].bo); + + dri_bo_emit_reloc(render_state->wm.state, + I915_GEM_DOMAIN_INSTRUCTION, 0, + wm_state->wm4.sampler_count << 2, + offsetof(struct i965_wm_unit_state, wm4), + render_state->wm.sampler); + + dri_bo_unmap(render_state->wm.state); +} + +static void +i965_render_cc_viewport(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct i965_cc_viewport *cc_viewport; + + dri_bo_map(render_state->cc.viewport, 1); + assert(render_state->cc.viewport->virtual); + cc_viewport = render_state->cc.viewport->virtual; + memset(cc_viewport, 0, sizeof(*cc_viewport)); + + cc_viewport->min_depth = -1.e35; + cc_viewport->max_depth = 1.e35; + + dri_bo_unmap(render_state->cc.viewport); +} + +static void +i965_subpic_render_cc_unit(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct i965_cc_unit_state *cc_state; + + assert(render_state->cc.viewport); + + dri_bo_map(render_state->cc.state, 1); + assert(render_state->cc.state->virtual); + cc_state = render_state->cc.state->virtual; + memset(cc_state, 0, sizeof(*cc_state)); + + cc_state->cc0.stencil_enable = 0; /* disable stencil */ + cc_state->cc2.depth_test = 0; /* disable depth test */ + cc_state->cc2.logicop_enable = 0; /* disable logic op */ + cc_state->cc3.ia_blend_enable = 0 ; /* blend alpha just like colors */ + cc_state->cc3.blend_enable = 1; /* enable color blend */ + cc_state->cc3.alpha_test = 0; /* disable alpha test */ + cc_state->cc3.alpha_test_format = 0;//0:ALPHATEST_UNORM8; /*store alpha value with UNORM8 */ + cc_state->cc3.alpha_test_func = 5;//COMPAREFUNCTION_LESS; /*pass if less than the reference */ + cc_state->cc4.cc_viewport_state_offset = render_state->cc.viewport->offset >> 5; + + cc_state->cc5.dither_enable = 0; /* disable dither */ + cc_state->cc5.logicop_func = 0xc; /* WHITE */ + cc_state->cc5.statistics_enable = 1; + cc_state->cc5.ia_blend_function = I965_BLENDFUNCTION_ADD; + cc_state->cc5.ia_src_blend_factor = I965_BLENDFACTOR_DST_ALPHA; + cc_state->cc5.ia_dest_blend_factor = I965_BLENDFACTOR_DST_ALPHA; + + cc_state->cc6.clamp_post_alpha_blend = 0; + cc_state->cc6.clamp_pre_alpha_blend =0; + + /*final color = src_color*src_blend_factor +/- dst_color*dest_color_blend_factor*/ + cc_state->cc6.blend_function = I965_BLENDFUNCTION_ADD; + cc_state->cc6.src_blend_factor = I965_BLENDFACTOR_SRC_ALPHA; + cc_state->cc6.dest_blend_factor = I965_BLENDFACTOR_INV_SRC_ALPHA; + + /*alpha test reference*/ + cc_state->cc7.alpha_ref.f =0.0 ; + + + dri_bo_emit_reloc(render_state->cc.state, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0, + offsetof(struct i965_cc_unit_state, cc4), + render_state->cc.viewport); + + dri_bo_unmap(render_state->cc.state); +} + + +static void +i965_render_cc_unit(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct i965_cc_unit_state *cc_state; + + assert(render_state->cc.viewport); + + dri_bo_map(render_state->cc.state, 1); + assert(render_state->cc.state->virtual); + cc_state = render_state->cc.state->virtual; + memset(cc_state, 0, sizeof(*cc_state)); + + cc_state->cc0.stencil_enable = 0; /* disable stencil */ + cc_state->cc2.depth_test = 0; /* disable depth test */ + cc_state->cc2.logicop_enable = 1; /* enable logic op */ + cc_state->cc3.ia_blend_enable = 0; /* blend alpha just like colors */ + cc_state->cc3.blend_enable = 0; /* disable color blend */ + cc_state->cc3.alpha_test = 0; /* disable alpha test */ + cc_state->cc4.cc_viewport_state_offset = render_state->cc.viewport->offset >> 5; + + cc_state->cc5.dither_enable = 0; /* disable dither */ + cc_state->cc5.logicop_func = 0xc; /* WHITE */ + cc_state->cc5.statistics_enable = 1; + cc_state->cc5.ia_blend_function = I965_BLENDFUNCTION_ADD; + cc_state->cc5.ia_src_blend_factor = I965_BLENDFACTOR_ONE; + cc_state->cc5.ia_dest_blend_factor = I965_BLENDFACTOR_ONE; + + dri_bo_emit_reloc(render_state->cc.state, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0, + offsetof(struct i965_cc_unit_state, cc4), + render_state->cc.viewport); + + dri_bo_unmap(render_state->cc.state); +} + +static void +i965_render_set_surface_tiling(struct i965_surface_state *ss, unsigned int tiling) +{ + switch (tiling) { + case I915_TILING_NONE: + ss->ss3.tiled_surface = 0; + ss->ss3.tile_walk = 0; + break; + case I915_TILING_X: + ss->ss3.tiled_surface = 1; + ss->ss3.tile_walk = I965_TILEWALK_XMAJOR; + break; + case I915_TILING_Y: + ss->ss3.tiled_surface = 1; + ss->ss3.tile_walk = I965_TILEWALK_YMAJOR; + break; + } +} + +static void +i965_render_set_surface_state(struct i965_surface_state *ss, + dri_bo *bo, unsigned long offset, + int width, int height, + int pitch, int format) +{ + unsigned int tiling; + unsigned int swizzle; + + memset(ss, 0, sizeof(*ss)); + ss->ss0.surface_type = I965_SURFACE_2D; + ss->ss0.surface_format = format; + ss->ss0.color_blend = 1; + + ss->ss1.base_addr = bo->offset + offset; + + ss->ss2.width = width - 1; + ss->ss2.height = height - 1; + + ss->ss3.pitch = pitch - 1; + + dri_bo_get_tiling(bo, &tiling, &swizzle); + i965_render_set_surface_tiling(ss, tiling); +} + +static void +gen7_render_set_surface_tiling(struct gen7_surface_state *ss, uint32_t tiling) +{ + switch (tiling) { + case I915_TILING_NONE: + ss->ss0.tiled_surface = 0; + ss->ss0.tile_walk = 0; + break; + case I915_TILING_X: + ss->ss0.tiled_surface = 1; + ss->ss0.tile_walk = I965_TILEWALK_XMAJOR; + break; + case I915_TILING_Y: + ss->ss0.tiled_surface = 1; + ss->ss0.tile_walk = I965_TILEWALK_YMAJOR; + break; + } +} + +static void +gen7_render_set_surface_state(struct gen7_surface_state *ss, + dri_bo *bo, unsigned long offset, + int width, int height, + int pitch, int format) +{ + unsigned int tiling; + unsigned int swizzle; + + memset(ss, 0, sizeof(*ss)); + + ss->ss0.surface_type = I965_SURFACE_2D; + ss->ss0.surface_format = format; + + ss->ss1.base_addr = bo->offset + offset; + + ss->ss2.width = width - 1; + ss->ss2.height = height - 1; + + ss->ss3.pitch = pitch - 1; + + dri_bo_get_tiling(bo, &tiling, &swizzle); + gen7_render_set_surface_tiling(ss, tiling); +} + +static void +i965_render_src_surface_state(VADriverContextP ctx, + int index, + dri_bo *region, + unsigned long offset, + int w, int h, + int pitch, int format) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + void *ss; + dri_bo *ss_bo = render_state->wm.surface_state_binding_table_bo; + + assert(index < MAX_RENDER_SURFACES); + + dri_bo_map(ss_bo, 1); + assert(ss_bo->virtual); + ss = (char *)ss_bo->virtual + SURFACE_STATE_OFFSET(index); + + if (IS_GEN7(i965->intel.device_id)) { + gen7_render_set_surface_state(ss, + region, offset, + w, h, + pitch, format); + dri_bo_emit_reloc(ss_bo, + I915_GEM_DOMAIN_SAMPLER, 0, + offset, + SURFACE_STATE_OFFSET(index) + offsetof(struct gen7_surface_state, ss1), + region); + } else { + i965_render_set_surface_state(ss, + region, offset, + w, h, + pitch, format); + dri_bo_emit_reloc(ss_bo, + I915_GEM_DOMAIN_SAMPLER, 0, + offset, + SURFACE_STATE_OFFSET(index) + offsetof(struct i965_surface_state, ss1), + region); + } + + ((unsigned int *)((char *)ss_bo->virtual + BINDING_TABLE_OFFSET))[index] = SURFACE_STATE_OFFSET(index); + dri_bo_unmap(ss_bo); + render_state->wm.sampler_count++; +} + +static void +i965_render_src_surfaces_state(VADriverContextP ctx, + VASurfaceID surface) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface; + int w, h; + int rw, rh; + dri_bo *region; + + obj_surface = SURFACE(surface); + assert(obj_surface); + + w = obj_surface->width; + h = obj_surface->height; + rw = obj_surface->orig_width; + rh = obj_surface->orig_height; + region = obj_surface->bo; + + i965_render_src_surface_state(ctx, 1, region, 0, rw, rh, w, I965_SURFACEFORMAT_R8_UNORM); /* Y */ + i965_render_src_surface_state(ctx, 2, region, 0, rw, rh, w, I965_SURFACEFORMAT_R8_UNORM); + + if (obj_surface->fourcc == VA_FOURCC('Y','V','1','2')) { + int u3 = 5, u4 = 6, v5 = 3, v6 = 4; + + i965_render_src_surface_state(ctx, u3, region, w * h, rw / 2, rh / 2, w / 2, I965_SURFACEFORMAT_R8_UNORM); /* U */ + i965_render_src_surface_state(ctx, u4, region, w * h, rw / 2, rh / 2, w / 2, I965_SURFACEFORMAT_R8_UNORM); + i965_render_src_surface_state(ctx, v5, region, w * h + w * h / 4, rw / 2, rh / 2, w / 2, I965_SURFACEFORMAT_R8_UNORM); /* V */ + i965_render_src_surface_state(ctx, v6, region, w * h + w * h / 4, rw / 2, rh / 2, w / 2, I965_SURFACEFORMAT_R8_UNORM); + } else { + if (obj_surface->fourcc == VA_FOURCC('N','V','1','2')) { + i965_render_src_surface_state(ctx, 3, region, w * h, rw / 2, rh / 2, w, I965_SURFACEFORMAT_R8G8_UNORM); /* UV */ + i965_render_src_surface_state(ctx, 4, region, w * h, rw / 2, rh / 2, w, I965_SURFACEFORMAT_R8G8_UNORM); + } else { + int u3 = 3, u4 = 4, v5 = 5, v6 = 6; + + i965_render_src_surface_state(ctx, u3, region, w * h, rw / 2, rh / 2, w / 2, I965_SURFACEFORMAT_R8_UNORM); /* U */ + i965_render_src_surface_state(ctx, u4, region, w * h, rw / 2, rh / 2, w / 2, I965_SURFACEFORMAT_R8_UNORM); + i965_render_src_surface_state(ctx, v5, region, w * h + w * h / 4, rw / 2, rh / 2, w / 2, I965_SURFACEFORMAT_R8_UNORM); /* V */ + i965_render_src_surface_state(ctx, v6, region, w * h + w * h / 4, rw / 2, rh / 2, w / 2, I965_SURFACEFORMAT_R8_UNORM); + } + } +} + +static void +i965_subpic_render_src_surfaces_state(VADriverContextP ctx, + VASurfaceID surface) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface = SURFACE(surface); + int w, h; + dri_bo *region; + dri_bo *subpic_region; + struct object_subpic *obj_subpic = SUBPIC(obj_surface->subpic); + struct object_image *obj_image = IMAGE(obj_subpic->image); + assert(obj_surface); + assert(obj_surface->bo); + w = obj_surface->width; + h = obj_surface->height; + region = obj_surface->bo; + subpic_region = obj_image->bo; + /*subpicture surface*/ + i965_render_src_surface_state(ctx, 1, subpic_region, 0, obj_subpic->width, obj_subpic->height, obj_subpic->pitch, obj_subpic->format); + i965_render_src_surface_state(ctx, 2, subpic_region, 0, obj_subpic->width, obj_subpic->height, obj_subpic->pitch, obj_subpic->format); +} + +static void +i965_render_dest_surface_state(VADriverContextP ctx, int index) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct intel_region *dest_region = render_state->draw_region; + void *ss; + dri_bo *ss_bo = render_state->wm.surface_state_binding_table_bo; + int format; + assert(index < MAX_RENDER_SURFACES); + + if (dest_region->cpp == 2) { + format = I965_SURFACEFORMAT_B5G6R5_UNORM; + } else { + format = I965_SURFACEFORMAT_B8G8R8A8_UNORM; + } + + dri_bo_map(ss_bo, 1); + assert(ss_bo->virtual); + ss = (char *)ss_bo->virtual + SURFACE_STATE_OFFSET(index); + + if (IS_GEN7(i965->intel.device_id)) { + gen7_render_set_surface_state(ss, + dest_region->bo, 0, + dest_region->width, dest_region->height, + dest_region->pitch, format); + dri_bo_emit_reloc(ss_bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, + 0, + SURFACE_STATE_OFFSET(index) + offsetof(struct gen7_surface_state, ss1), + dest_region->bo); + } else { + i965_render_set_surface_state(ss, + dest_region->bo, 0, + dest_region->width, dest_region->height, + dest_region->pitch, format); + dri_bo_emit_reloc(ss_bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, + 0, + SURFACE_STATE_OFFSET(index) + offsetof(struct i965_surface_state, ss1), + dest_region->bo); + } + + ((unsigned int *)((char *)ss_bo->virtual + BINDING_TABLE_OFFSET))[index] = SURFACE_STATE_OFFSET(index); + dri_bo_unmap(ss_bo); +} + +static void +i965_subpic_render_upload_vertex(VADriverContextP ctx, + VASurfaceID surface, + const VARectangle *output_rect) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct object_surface *obj_surface = SURFACE(surface); + struct object_subpic *obj_subpic = SUBPIC(obj_surface->subpic); + VARectangle dst_rect; + float *vb, tx1, tx2, ty1, ty2, x1, x2, y1, y2; + int i = 0; + + if (obj_subpic->flags & VA_SUBPICTURE_DESTINATION_IS_SCREEN_COORD) + dst_rect = obj_subpic->dst_rect; + else { + const float sx = (float)output_rect->width / obj_surface->orig_width; + const float sy = (float)output_rect->height / obj_surface->orig_height; + dst_rect.x = output_rect->x + sx * obj_subpic->dst_rect.x; + dst_rect.y = output_rect->y + sy * obj_subpic->dst_rect.y; + dst_rect.width = sx * obj_subpic->dst_rect.width; + dst_rect.height = sy * obj_subpic->dst_rect.height; + } + + dri_bo_map(render_state->vb.vertex_buffer, 1); + assert(render_state->vb.vertex_buffer->virtual); + vb = render_state->vb.vertex_buffer->virtual; + + tx1 = (float)obj_subpic->src_rect.x / obj_subpic->width; + ty1 = (float)obj_subpic->src_rect.y / obj_subpic->height; + tx2 = (float)(obj_subpic->src_rect.x + obj_subpic->src_rect.width) / obj_subpic->width; + ty2 = (float)(obj_subpic->src_rect.y + obj_subpic->src_rect.height) / obj_subpic->height; + + x1 = (float)dst_rect.x; + y1 = (float)dst_rect.y; + x2 = (float)(dst_rect.x + dst_rect.width); + y2 = (float)(dst_rect.y + dst_rect.height); + + vb[i++] = tx2; + vb[i++] = ty2; + vb[i++] = x2; + vb[i++] = y2; + + vb[i++] = tx1; + vb[i++] = ty2; + vb[i++] = x1; + vb[i++] = y2; + + vb[i++] = tx1; + vb[i++] = ty1; + vb[i++] = x1; + vb[i++] = y1; + dri_bo_unmap(render_state->vb.vertex_buffer); +} + +static void +i965_render_upload_vertex( + VADriverContextP ctx, + VASurfaceID surface, + const VARectangle *src_rect, + const VARectangle *dst_rect +) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct intel_region *dest_region = render_state->draw_region; + struct object_surface *obj_surface; + float *vb; + + float u1, v1, u2, v2; + int i, width, height; + int box_x1 = dest_region->x + dst_rect->x; + int box_y1 = dest_region->y + dst_rect->y; + int box_x2 = box_x1 + dst_rect->width; + int box_y2 = box_y1 + dst_rect->height; + + obj_surface = SURFACE(surface); + assert(surface); + width = obj_surface->orig_width; + height = obj_surface->orig_height; + + u1 = (float)src_rect->x / width; + v1 = (float)src_rect->y / height; + u2 = (float)(src_rect->x + src_rect->width) / width; + v2 = (float)(src_rect->y + src_rect->height) / height; + + dri_bo_map(render_state->vb.vertex_buffer, 1); + assert(render_state->vb.vertex_buffer->virtual); + vb = render_state->vb.vertex_buffer->virtual; + + i = 0; + vb[i++] = u2; + vb[i++] = v2; + vb[i++] = (float)box_x2; + vb[i++] = (float)box_y2; + + vb[i++] = u1; + vb[i++] = v2; + vb[i++] = (float)box_x1; + vb[i++] = (float)box_y2; + + vb[i++] = u1; + vb[i++] = v1; + vb[i++] = (float)box_x1; + vb[i++] = (float)box_y1; + + dri_bo_unmap(render_state->vb.vertex_buffer); +} + +static void +i965_render_upload_constants(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + unsigned short *constant_buffer; + + if (render_state->curbe.upload) + return; + + dri_bo_map(render_state->curbe.bo, 1); + assert(render_state->curbe.bo->virtual); + constant_buffer = render_state->curbe.bo->virtual; + + if (render_state->interleaved_uv) + *constant_buffer = 1; + else + *constant_buffer = 0; + + dri_bo_unmap(render_state->curbe.bo); + render_state->curbe.upload = 1; +} + +static void +i965_surface_render_state_setup( + VADriverContextP ctx, + VASurfaceID surface, + const VARectangle *src_rect, + const VARectangle *dst_rect +) +{ + i965_render_vs_unit(ctx); + i965_render_sf_unit(ctx); + i965_render_dest_surface_state(ctx, 0); + i965_render_src_surfaces_state(ctx, surface); + i965_render_sampler(ctx); + i965_render_wm_unit(ctx); + i965_render_cc_viewport(ctx); + i965_render_cc_unit(ctx); + i965_render_upload_vertex(ctx, surface, src_rect, dst_rect); + i965_render_upload_constants(ctx); +} +static void +i965_subpic_render_state_setup( + VADriverContextP ctx, + VASurfaceID surface, + const VARectangle *src_rect, + const VARectangle *dst_rect +) +{ + i965_render_vs_unit(ctx); + i965_render_sf_unit(ctx); + i965_render_dest_surface_state(ctx, 0); + i965_subpic_render_src_surfaces_state(ctx, surface); + i965_render_sampler(ctx); + i965_subpic_render_wm_unit(ctx); + i965_render_cc_viewport(ctx); + i965_subpic_render_cc_unit(ctx); + i965_subpic_render_upload_vertex(ctx, surface, dst_rect); +} + + +static void +i965_render_pipeline_select(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + BEGIN_BATCH(batch, 1); + OUT_BATCH(batch, CMD_PIPELINE_SELECT | PIPELINE_SELECT_3D); + ADVANCE_BATCH(batch); +} + +static void +i965_render_state_sip(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, CMD_STATE_SIP | 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); +} + +static void +i965_render_state_base_address(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + + if (IS_IRONLAKE(i965->intel.device_id)) { + BEGIN_BATCH(batch, 8); + OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | 6); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_RELOC(batch, render_state->wm.surface_state_binding_table_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + ADVANCE_BATCH(batch); + } else { + BEGIN_BATCH(batch, 6); + OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | 4); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_RELOC(batch, render_state->wm.surface_state_binding_table_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + ADVANCE_BATCH(batch); + } +} + +static void +i965_render_binding_table_pointers(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + BEGIN_BATCH(batch, 6); + OUT_BATCH(batch, CMD_BINDING_TABLE_POINTERS | 4); + OUT_BATCH(batch, 0); /* vs */ + OUT_BATCH(batch, 0); /* gs */ + OUT_BATCH(batch, 0); /* clip */ + OUT_BATCH(batch, 0); /* sf */ + OUT_BATCH(batch, BINDING_TABLE_OFFSET); + ADVANCE_BATCH(batch); +} + +static void +i965_render_constant_color(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + BEGIN_BATCH(batch, 5); + OUT_BATCH(batch, CMD_CONSTANT_COLOR | 3); + OUT_BATCH(batch, float_to_uint(1.0)); + OUT_BATCH(batch, float_to_uint(0.0)); + OUT_BATCH(batch, float_to_uint(1.0)); + OUT_BATCH(batch, float_to_uint(1.0)); + ADVANCE_BATCH(batch); +} + +static void +i965_render_pipelined_pointers(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + + BEGIN_BATCH(batch, 7); + OUT_BATCH(batch, CMD_PIPELINED_POINTERS | 5); + OUT_RELOC(batch, render_state->vs.state, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + OUT_BATCH(batch, 0); /* disable GS */ + OUT_BATCH(batch, 0); /* disable CLIP */ + OUT_RELOC(batch, render_state->sf.state, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + OUT_RELOC(batch, render_state->wm.state, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + OUT_RELOC(batch, render_state->cc.state, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + ADVANCE_BATCH(batch); +} + +static void +i965_render_urb_layout(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + int urb_vs_start, urb_vs_size; + int urb_gs_start, urb_gs_size; + int urb_clip_start, urb_clip_size; + int urb_sf_start, urb_sf_size; + int urb_cs_start, urb_cs_size; + + urb_vs_start = 0; + urb_vs_size = URB_VS_ENTRIES * URB_VS_ENTRY_SIZE; + urb_gs_start = urb_vs_start + urb_vs_size; + urb_gs_size = URB_GS_ENTRIES * URB_GS_ENTRY_SIZE; + urb_clip_start = urb_gs_start + urb_gs_size; + urb_clip_size = URB_CLIP_ENTRIES * URB_CLIP_ENTRY_SIZE; + urb_sf_start = urb_clip_start + urb_clip_size; + urb_sf_size = URB_SF_ENTRIES * URB_SF_ENTRY_SIZE; + urb_cs_start = urb_sf_start + urb_sf_size; + urb_cs_size = URB_CS_ENTRIES * URB_CS_ENTRY_SIZE; + + BEGIN_BATCH(batch, 3); + OUT_BATCH(batch, + CMD_URB_FENCE | + UF0_CS_REALLOC | + UF0_SF_REALLOC | + UF0_CLIP_REALLOC | + UF0_GS_REALLOC | + UF0_VS_REALLOC | + 1); + OUT_BATCH(batch, + ((urb_clip_start + urb_clip_size) << UF1_CLIP_FENCE_SHIFT) | + ((urb_gs_start + urb_gs_size) << UF1_GS_FENCE_SHIFT) | + ((urb_vs_start + urb_vs_size) << UF1_VS_FENCE_SHIFT)); + OUT_BATCH(batch, + ((urb_cs_start + urb_cs_size) << UF2_CS_FENCE_SHIFT) | + ((urb_sf_start + urb_sf_size) << UF2_SF_FENCE_SHIFT)); + ADVANCE_BATCH(batch); +} + +static void +i965_render_cs_urb_layout(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, CMD_CS_URB_STATE | 0); + OUT_BATCH(batch, + ((URB_CS_ENTRY_SIZE - 1) << 4) | /* URB Entry Allocation Size */ + (URB_CS_ENTRIES << 0)); /* Number of URB Entries */ + ADVANCE_BATCH(batch); +} + +static void +i965_render_constant_buffer(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, CMD_CONSTANT_BUFFER | (1 << 8) | (2 - 2)); + OUT_RELOC(batch, render_state->curbe.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + URB_CS_ENTRY_SIZE - 1); + ADVANCE_BATCH(batch); +} + +static void +i965_render_drawing_rectangle(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + struct intel_region *dest_region = render_state->draw_region; + + BEGIN_BATCH(batch, 4); + OUT_BATCH(batch, CMD_DRAWING_RECTANGLE | 2); + OUT_BATCH(batch, 0x00000000); + OUT_BATCH(batch, (dest_region->width - 1) | (dest_region->height - 1) << 16); + OUT_BATCH(batch, 0x00000000); + ADVANCE_BATCH(batch); +} + +static void +i965_render_vertex_elements(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + if (IS_IRONLAKE(i965->intel.device_id)) { + BEGIN_BATCH(batch, 5); + OUT_BATCH(batch, CMD_VERTEX_ELEMENTS | 3); + /* offset 0: X,Y -> {X, Y, 1.0, 1.0} */ + OUT_BATCH(batch, (0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) | + VE0_VALID | + (I965_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | + (0 << VE0_OFFSET_SHIFT)); + OUT_BATCH(batch, (I965_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | + (I965_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | + (I965_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) | + (I965_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT)); + /* offset 8: S0, T0 -> {S0, T0, 1.0, 1.0} */ + OUT_BATCH(batch, (0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) | + VE0_VALID | + (I965_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | + (8 << VE0_OFFSET_SHIFT)); + OUT_BATCH(batch, (I965_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | + (I965_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | + (I965_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) | + (I965_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT)); + ADVANCE_BATCH(batch); + } else { + BEGIN_BATCH(batch, 5); + OUT_BATCH(batch, CMD_VERTEX_ELEMENTS | 3); + /* offset 0: X,Y -> {X, Y, 1.0, 1.0} */ + OUT_BATCH(batch, (0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) | + VE0_VALID | + (I965_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | + (0 << VE0_OFFSET_SHIFT)); + OUT_BATCH(batch, (I965_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | + (I965_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | + (I965_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) | + (I965_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT) | + (0 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT)); + /* offset 8: S0, T0 -> {S0, T0, 1.0, 1.0} */ + OUT_BATCH(batch, (0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) | + VE0_VALID | + (I965_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | + (8 << VE0_OFFSET_SHIFT)); + OUT_BATCH(batch, (I965_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | + (I965_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | + (I965_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) | + (I965_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT) | + (4 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT)); + ADVANCE_BATCH(batch); + } +} + +static void +i965_render_upload_image_palette( + VADriverContextP ctx, + VAImageID image_id, + unsigned int alpha +) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + unsigned int i; + + struct object_image *obj_image = IMAGE(image_id); + assert(obj_image); + + if (obj_image->image.num_palette_entries == 0) + return; + + BEGIN_BATCH(batch, 1 + obj_image->image.num_palette_entries); + OUT_BATCH(batch, CMD_SAMPLER_PALETTE_LOAD | (obj_image->image.num_palette_entries - 1)); + /*fill palette*/ + //int32_t out[16]; //0-23:color 23-31:alpha + for (i = 0; i < obj_image->image.num_palette_entries; i++) + OUT_BATCH(batch, (alpha << 24) | obj_image->palette[i]); + ADVANCE_BATCH(batch); +} + +static void +i965_render_startup(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + + BEGIN_BATCH(batch, 11); + OUT_BATCH(batch, CMD_VERTEX_BUFFERS | 3); + OUT_BATCH(batch, + (0 << VB0_BUFFER_INDEX_SHIFT) | + VB0_VERTEXDATA | + ((4 * 4) << VB0_BUFFER_PITCH_SHIFT)); + OUT_RELOC(batch, render_state->vb.vertex_buffer, I915_GEM_DOMAIN_VERTEX, 0, 0); + + if (IS_IRONLAKE(i965->intel.device_id)) + OUT_RELOC(batch, render_state->vb.vertex_buffer, I915_GEM_DOMAIN_VERTEX, 0, 12 * 4); + else + OUT_BATCH(batch, 3); + + OUT_BATCH(batch, 0); + + OUT_BATCH(batch, + CMD_3DPRIMITIVE | + _3DPRIMITIVE_VERTEX_SEQUENTIAL | + (_3DPRIM_RECTLIST << _3DPRIMITIVE_TOPOLOGY_SHIFT) | + (0 << 9) | + 4); + OUT_BATCH(batch, 3); /* vertex count per instance */ + OUT_BATCH(batch, 0); /* start vertex offset */ + OUT_BATCH(batch, 1); /* single instance */ + OUT_BATCH(batch, 0); /* start instance location */ + OUT_BATCH(batch, 0); /* index buffer offset, ignored */ + ADVANCE_BATCH(batch); +} + +static void +i965_clear_dest_region(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + struct intel_region *dest_region = render_state->draw_region; + unsigned int blt_cmd, br13; + int pitch; + + blt_cmd = XY_COLOR_BLT_CMD; + br13 = 0xf0 << 16; + pitch = dest_region->pitch; + + if (dest_region->cpp == 4) { + br13 |= BR13_8888; + blt_cmd |= (XY_COLOR_BLT_WRITE_RGB | XY_COLOR_BLT_WRITE_ALPHA); + } else { + assert(dest_region->cpp == 2); + br13 |= BR13_565; + } + + if (dest_region->tiling != I915_TILING_NONE) { + blt_cmd |= XY_COLOR_BLT_DST_TILED; + pitch /= 4; + } + + br13 |= pitch; + + if (IS_GEN6(i965->intel.device_id) || + IS_GEN7(i965->intel.device_id)) { + intel_batchbuffer_start_atomic_blt(batch, 24); + BEGIN_BLT_BATCH(batch, 6); + } else { + intel_batchbuffer_start_atomic(batch, 24); + BEGIN_BATCH(batch, 6); + } + + OUT_BATCH(batch, blt_cmd); + OUT_BATCH(batch, br13); + OUT_BATCH(batch, (dest_region->y << 16) | (dest_region->x)); + OUT_BATCH(batch, ((dest_region->y + dest_region->height) << 16) | + (dest_region->x + dest_region->width)); + OUT_RELOC(batch, dest_region->bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, + 0); + OUT_BATCH(batch, 0x0); + ADVANCE_BATCH(batch); + intel_batchbuffer_end_atomic(batch); +} + +static void +i965_surface_render_pipeline_setup(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + i965_clear_dest_region(ctx); + intel_batchbuffer_start_atomic(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); + i965_render_pipeline_select(ctx); + i965_render_state_sip(ctx); + i965_render_state_base_address(ctx); + i965_render_binding_table_pointers(ctx); + i965_render_constant_color(ctx); + i965_render_pipelined_pointers(ctx); + i965_render_urb_layout(ctx); + i965_render_cs_urb_layout(ctx); + i965_render_constant_buffer(ctx); + i965_render_drawing_rectangle(ctx); + i965_render_vertex_elements(ctx); + i965_render_startup(ctx); + intel_batchbuffer_end_atomic(batch); +} + +static void +i965_subpic_render_pipeline_setup(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + intel_batchbuffer_start_atomic(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); + i965_render_pipeline_select(ctx); + i965_render_state_sip(ctx); + i965_render_state_base_address(ctx); + i965_render_binding_table_pointers(ctx); + i965_render_constant_color(ctx); + i965_render_pipelined_pointers(ctx); + i965_render_urb_layout(ctx); + i965_render_cs_urb_layout(ctx); + i965_render_drawing_rectangle(ctx); + i965_render_vertex_elements(ctx); + i965_render_startup(ctx); + intel_batchbuffer_end_atomic(batch); +} + + +static void +i965_render_initialize(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + dri_bo *bo; + + /* VERTEX BUFFER */ + dri_bo_unreference(render_state->vb.vertex_buffer); + bo = dri_bo_alloc(i965->intel.bufmgr, + "vertex buffer", + 4096, + 4096); + assert(bo); + render_state->vb.vertex_buffer = bo; + + /* VS */ + dri_bo_unreference(render_state->vs.state); + bo = dri_bo_alloc(i965->intel.bufmgr, + "vs state", + sizeof(struct i965_vs_unit_state), + 64); + assert(bo); + render_state->vs.state = bo; + + /* GS */ + /* CLIP */ + /* SF */ + dri_bo_unreference(render_state->sf.state); + bo = dri_bo_alloc(i965->intel.bufmgr, + "sf state", + sizeof(struct i965_sf_unit_state), + 64); + assert(bo); + render_state->sf.state = bo; + + /* WM */ + dri_bo_unreference(render_state->wm.surface_state_binding_table_bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "surface state & binding table", + (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_RENDER_SURFACES, + 4096); + assert(bo); + render_state->wm.surface_state_binding_table_bo = bo; + + dri_bo_unreference(render_state->wm.sampler); + bo = dri_bo_alloc(i965->intel.bufmgr, + "sampler state", + MAX_SAMPLERS * sizeof(struct i965_sampler_state), + 64); + assert(bo); + render_state->wm.sampler = bo; + render_state->wm.sampler_count = 0; + + dri_bo_unreference(render_state->wm.state); + bo = dri_bo_alloc(i965->intel.bufmgr, + "wm state", + sizeof(struct i965_wm_unit_state), + 64); + assert(bo); + render_state->wm.state = bo; + + /* COLOR CALCULATOR */ + dri_bo_unreference(render_state->cc.state); + bo = dri_bo_alloc(i965->intel.bufmgr, + "color calc state", + sizeof(struct i965_cc_unit_state), + 64); + assert(bo); + render_state->cc.state = bo; + + dri_bo_unreference(render_state->cc.viewport); + bo = dri_bo_alloc(i965->intel.bufmgr, + "cc viewport", + sizeof(struct i965_cc_viewport), + 64); + assert(bo); + render_state->cc.viewport = bo; +} + +static void +i965_render_put_surface( + VADriverContextP ctx, + VASurfaceID surface, + const VARectangle *src_rect, + const VARectangle *dst_rect, + unsigned int flags +) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + i965_render_initialize(ctx); + i965_surface_render_state_setup(ctx, surface, src_rect, dst_rect); + i965_surface_render_pipeline_setup(ctx); + intel_batchbuffer_flush(batch); +} + +static void +i965_render_put_subpicture( + VADriverContextP ctx, + VASurfaceID surface, + const VARectangle *src_rect, + const VARectangle *dst_rect +) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct object_surface *obj_surface = SURFACE(surface); + struct object_subpic *obj_subpic = SUBPIC(obj_surface->subpic); + + assert(obj_subpic); + + i965_render_initialize(ctx); + i965_subpic_render_state_setup(ctx, surface, src_rect, dst_rect); + i965_subpic_render_pipeline_setup(ctx); + i965_render_upload_image_palette(ctx, obj_subpic->image, 0xff); + intel_batchbuffer_flush(batch); +} + +/* + * for GEN6+ + */ +static void +gen6_render_initialize(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + dri_bo *bo; + + /* VERTEX BUFFER */ + dri_bo_unreference(render_state->vb.vertex_buffer); + bo = dri_bo_alloc(i965->intel.bufmgr, + "vertex buffer", + 4096, + 4096); + assert(bo); + render_state->vb.vertex_buffer = bo; + + /* WM */ + dri_bo_unreference(render_state->wm.surface_state_binding_table_bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "surface state & binding table", + (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_RENDER_SURFACES, + 4096); + assert(bo); + render_state->wm.surface_state_binding_table_bo = bo; + + dri_bo_unreference(render_state->wm.sampler); + bo = dri_bo_alloc(i965->intel.bufmgr, + "sampler state", + MAX_SAMPLERS * sizeof(struct i965_sampler_state), + 4096); + assert(bo); + render_state->wm.sampler = bo; + render_state->wm.sampler_count = 0; + + /* COLOR CALCULATOR */ + dri_bo_unreference(render_state->cc.state); + bo = dri_bo_alloc(i965->intel.bufmgr, + "color calc state", + sizeof(struct gen6_color_calc_state), + 4096); + assert(bo); + render_state->cc.state = bo; + + /* CC VIEWPORT */ + dri_bo_unreference(render_state->cc.viewport); + bo = dri_bo_alloc(i965->intel.bufmgr, + "cc viewport", + sizeof(struct i965_cc_viewport), + 4096); + assert(bo); + render_state->cc.viewport = bo; + + /* BLEND STATE */ + dri_bo_unreference(render_state->cc.blend); + bo = dri_bo_alloc(i965->intel.bufmgr, + "blend state", + sizeof(struct gen6_blend_state), + 4096); + assert(bo); + render_state->cc.blend = bo; + + /* DEPTH & STENCIL STATE */ + dri_bo_unreference(render_state->cc.depth_stencil); + bo = dri_bo_alloc(i965->intel.bufmgr, + "depth & stencil state", + sizeof(struct gen6_depth_stencil_state), + 4096); + assert(bo); + render_state->cc.depth_stencil = bo; +} + +static void +gen6_render_color_calc_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct gen6_color_calc_state *color_calc_state; + + dri_bo_map(render_state->cc.state, 1); + assert(render_state->cc.state->virtual); + color_calc_state = render_state->cc.state->virtual; + memset(color_calc_state, 0, sizeof(*color_calc_state)); + color_calc_state->constant_r = 1.0; + color_calc_state->constant_g = 0.0; + color_calc_state->constant_b = 1.0; + color_calc_state->constant_a = 1.0; + dri_bo_unmap(render_state->cc.state); +} + +static void +gen6_render_blend_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct gen6_blend_state *blend_state; + + dri_bo_map(render_state->cc.blend, 1); + assert(render_state->cc.blend->virtual); + blend_state = render_state->cc.blend->virtual; + memset(blend_state, 0, sizeof(*blend_state)); + blend_state->blend1.logic_op_enable = 1; + blend_state->blend1.logic_op_func = 0xc; + dri_bo_unmap(render_state->cc.blend); +} + +static void +gen6_render_depth_stencil_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct gen6_depth_stencil_state *depth_stencil_state; + + dri_bo_map(render_state->cc.depth_stencil, 1); + assert(render_state->cc.depth_stencil->virtual); + depth_stencil_state = render_state->cc.depth_stencil->virtual; + memset(depth_stencil_state, 0, sizeof(*depth_stencil_state)); + dri_bo_unmap(render_state->cc.depth_stencil); +} + +static void +gen6_render_setup_states( + VADriverContextP ctx, + VASurfaceID surface, + const VARectangle *src_rect, + const VARectangle *dst_rect +) +{ + i965_render_dest_surface_state(ctx, 0); + i965_render_src_surfaces_state(ctx, surface); + i965_render_sampler(ctx); + i965_render_cc_viewport(ctx); + gen6_render_color_calc_state(ctx); + gen6_render_blend_state(ctx); + gen6_render_depth_stencil_state(ctx); + i965_render_upload_constants(ctx); + i965_render_upload_vertex(ctx, surface, src_rect, dst_rect); +} + +static void +gen6_emit_invarient_states(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + OUT_BATCH(batch, CMD_PIPELINE_SELECT | PIPELINE_SELECT_3D); + + OUT_BATCH(batch, GEN6_3DSTATE_MULTISAMPLE | (3 - 2)); + OUT_BATCH(batch, GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER | + GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_1); /* 1 sample/pixel */ + OUT_BATCH(batch, 0); + + OUT_BATCH(batch, GEN6_3DSTATE_SAMPLE_MASK | (2 - 2)); + OUT_BATCH(batch, 1); + + /* Set system instruction pointer */ + OUT_BATCH(batch, CMD_STATE_SIP | 0); + OUT_BATCH(batch, 0); +} + +static void +gen6_emit_state_base_address(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + + OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | (10 - 2)); + OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* General state base address */ + OUT_RELOC(batch, render_state->wm.surface_state_binding_table_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* Surface state base address */ + OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* Dynamic state base address */ + OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* Indirect object base address */ + OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* Instruction base address */ + OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* General state upper bound */ + OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* Dynamic state upper bound */ + OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* Indirect object upper bound */ + OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* Instruction access upper bound */ +} + +static void +gen6_emit_viewport_state_pointers(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + + OUT_BATCH(batch, GEN6_3DSTATE_VIEWPORT_STATE_POINTERS | + GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CC | + (4 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_RELOC(batch, render_state->cc.viewport, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); +} + +static void +gen6_emit_urb(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + OUT_BATCH(batch, GEN6_3DSTATE_URB | (3 - 2)); + OUT_BATCH(batch, ((1 - 1) << GEN6_3DSTATE_URB_VS_SIZE_SHIFT) | + (24 << GEN6_3DSTATE_URB_VS_ENTRIES_SHIFT)); /* at least 24 on GEN6 */ + OUT_BATCH(batch, (0 << GEN6_3DSTATE_URB_GS_SIZE_SHIFT) | + (0 << GEN6_3DSTATE_URB_GS_ENTRIES_SHIFT)); /* no GS thread */ +} + +static void +gen6_emit_cc_state_pointers(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + + OUT_BATCH(batch, GEN6_3DSTATE_CC_STATE_POINTERS | (4 - 2)); + OUT_RELOC(batch, render_state->cc.blend, I915_GEM_DOMAIN_INSTRUCTION, 0, 1); + OUT_RELOC(batch, render_state->cc.depth_stencil, I915_GEM_DOMAIN_INSTRUCTION, 0, 1); + OUT_RELOC(batch, render_state->cc.state, I915_GEM_DOMAIN_INSTRUCTION, 0, 1); +} + +static void +gen6_emit_sampler_state_pointers(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + + OUT_BATCH(batch, GEN6_3DSTATE_SAMPLER_STATE_POINTERS | + GEN6_3DSTATE_SAMPLER_STATE_MODIFY_PS | + (4 - 2)); + OUT_BATCH(batch, 0); /* VS */ + OUT_BATCH(batch, 0); /* GS */ + OUT_RELOC(batch,render_state->wm.sampler, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); +} + +static void +gen6_emit_binding_table(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + /* Binding table pointers */ + OUT_BATCH(batch, CMD_BINDING_TABLE_POINTERS | + GEN6_BINDING_TABLE_MODIFY_PS | + (4 - 2)); + OUT_BATCH(batch, 0); /* vs */ + OUT_BATCH(batch, 0); /* gs */ + /* Only the PS uses the binding table */ + OUT_BATCH(batch, BINDING_TABLE_OFFSET); +} + +static void +gen6_emit_depth_buffer_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + OUT_BATCH(batch, CMD_DEPTH_BUFFER | (7 - 2)); + OUT_BATCH(batch, (I965_SURFACE_NULL << CMD_DEPTH_BUFFER_TYPE_SHIFT) | + (I965_DEPTHFORMAT_D32_FLOAT << CMD_DEPTH_BUFFER_FORMAT_SHIFT)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + + OUT_BATCH(batch, CMD_CLEAR_PARAMS | (2 - 2)); + OUT_BATCH(batch, 0); +} + +static void +gen6_emit_drawing_rectangle(VADriverContextP ctx) +{ + i965_render_drawing_rectangle(ctx); +} + +static void +gen6_emit_vs_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + /* disable VS constant buffer */ + OUT_BATCH(batch, GEN6_3DSTATE_CONSTANT_VS | (5 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + + OUT_BATCH(batch, GEN6_3DSTATE_VS | (6 - 2)); + OUT_BATCH(batch, 0); /* without VS kernel */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); /* pass-through */ +} + +static void +gen6_emit_gs_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + /* disable GS constant buffer */ + OUT_BATCH(batch, GEN6_3DSTATE_CONSTANT_GS | (5 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + + OUT_BATCH(batch, GEN6_3DSTATE_GS | (7 - 2)); + OUT_BATCH(batch, 0); /* without GS kernel */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); /* pass-through */ +} + +static void +gen6_emit_clip_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + OUT_BATCH(batch, GEN6_3DSTATE_CLIP | (4 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); /* pass-through */ + OUT_BATCH(batch, 0); +} + +static void +gen6_emit_sf_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + OUT_BATCH(batch, GEN6_3DSTATE_SF | (20 - 2)); + OUT_BATCH(batch, (1 << GEN6_3DSTATE_SF_NUM_OUTPUTS_SHIFT) | + (1 << GEN6_3DSTATE_SF_URB_ENTRY_READ_LENGTH_SHIFT) | + (0 << GEN6_3DSTATE_SF_URB_ENTRY_READ_OFFSET_SHIFT)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, GEN6_3DSTATE_SF_CULL_NONE); + OUT_BATCH(batch, 2 << GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT); /* DW4 */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); /* DW9 */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); /* DW14 */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); /* DW19 */ +} + +static void +gen6_emit_wm_state(VADriverContextP ctx, int kernel) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + + OUT_BATCH(batch, GEN6_3DSTATE_CONSTANT_PS | + GEN6_3DSTATE_CONSTANT_BUFFER_0_ENABLE | + (5 - 2)); + OUT_RELOC(batch, + render_state->curbe.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + + OUT_BATCH(batch, GEN6_3DSTATE_WM | (9 - 2)); + OUT_RELOC(batch, render_state->render_kernels[kernel].bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + OUT_BATCH(batch, (1 << GEN6_3DSTATE_WM_SAMPLER_COUNT_SHITF) | + (5 << GEN6_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, (6 << GEN6_3DSTATE_WM_DISPATCH_START_GRF_0_SHIFT)); /* DW4 */ + OUT_BATCH(batch, ((40 - 1) << GEN6_3DSTATE_WM_MAX_THREADS_SHIFT) | + GEN6_3DSTATE_WM_DISPATCH_ENABLE | + GEN6_3DSTATE_WM_16_DISPATCH_ENABLE); + OUT_BATCH(batch, (1 << GEN6_3DSTATE_WM_NUM_SF_OUTPUTS_SHIFT) | + GEN6_3DSTATE_WM_PERSPECTIVE_PIXEL_BARYCENTRIC); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); +} + +static void +gen6_emit_vertex_element_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + /* Set up our vertex elements, sourced from the single vertex buffer. */ + OUT_BATCH(batch, CMD_VERTEX_ELEMENTS | (5 - 2)); + /* offset 0: X,Y -> {X, Y, 1.0, 1.0} */ + OUT_BATCH(batch, (0 << GEN6_VE0_VERTEX_BUFFER_INDEX_SHIFT) | + GEN6_VE0_VALID | + (I965_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | + (0 << VE0_OFFSET_SHIFT)); + OUT_BATCH(batch, (I965_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | + (I965_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | + (I965_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) | + (I965_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT)); + /* offset 8: S0, T0 -> {S0, T0, 1.0, 1.0} */ + OUT_BATCH(batch, (0 << GEN6_VE0_VERTEX_BUFFER_INDEX_SHIFT) | + GEN6_VE0_VALID | + (I965_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | + (8 << VE0_OFFSET_SHIFT)); + OUT_BATCH(batch, (I965_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | + (I965_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | + (I965_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) | + (I965_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT)); +} + +static void +gen6_emit_vertices(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + + BEGIN_BATCH(batch, 11); + OUT_BATCH(batch, CMD_VERTEX_BUFFERS | 3); + OUT_BATCH(batch, + (0 << GEN6_VB0_BUFFER_INDEX_SHIFT) | + GEN6_VB0_VERTEXDATA | + ((4 * 4) << VB0_BUFFER_PITCH_SHIFT)); + OUT_RELOC(batch, render_state->vb.vertex_buffer, I915_GEM_DOMAIN_VERTEX, 0, 0); + OUT_RELOC(batch, render_state->vb.vertex_buffer, I915_GEM_DOMAIN_VERTEX, 0, 12 * 4); + OUT_BATCH(batch, 0); + + OUT_BATCH(batch, + CMD_3DPRIMITIVE | + _3DPRIMITIVE_VERTEX_SEQUENTIAL | + (_3DPRIM_RECTLIST << _3DPRIMITIVE_TOPOLOGY_SHIFT) | + (0 << 9) | + 4); + OUT_BATCH(batch, 3); /* vertex count per instance */ + OUT_BATCH(batch, 0); /* start vertex offset */ + OUT_BATCH(batch, 1); /* single instance */ + OUT_BATCH(batch, 0); /* start instance location */ + OUT_BATCH(batch, 0); /* index buffer offset, ignored */ + ADVANCE_BATCH(batch); +} + +static void +gen6_render_emit_states(VADriverContextP ctx, int kernel) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + intel_batchbuffer_start_atomic(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); + gen6_emit_invarient_states(ctx); + gen6_emit_state_base_address(ctx); + gen6_emit_viewport_state_pointers(ctx); + gen6_emit_urb(ctx); + gen6_emit_cc_state_pointers(ctx); + gen6_emit_sampler_state_pointers(ctx); + gen6_emit_vs_state(ctx); + gen6_emit_gs_state(ctx); + gen6_emit_clip_state(ctx); + gen6_emit_sf_state(ctx); + gen6_emit_wm_state(ctx, kernel); + gen6_emit_binding_table(ctx); + gen6_emit_depth_buffer_state(ctx); + gen6_emit_drawing_rectangle(ctx); + gen6_emit_vertex_element_state(ctx); + gen6_emit_vertices(ctx); + intel_batchbuffer_end_atomic(batch); +} + +static void +gen6_render_put_surface( + VADriverContextP ctx, + VASurfaceID surface, + const VARectangle *src_rect, + const VARectangle *dst_rect, + unsigned int flags +) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + gen6_render_initialize(ctx); + gen6_render_setup_states(ctx, surface, src_rect, dst_rect); + i965_clear_dest_region(ctx); + gen6_render_emit_states(ctx, PS_KERNEL); + intel_batchbuffer_flush(batch); +} + +static void +gen6_subpicture_render_blend_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct gen6_blend_state *blend_state; + + dri_bo_unmap(render_state->cc.state); + dri_bo_map(render_state->cc.blend, 1); + assert(render_state->cc.blend->virtual); + blend_state = render_state->cc.blend->virtual; + memset(blend_state, 0, sizeof(*blend_state)); + blend_state->blend0.dest_blend_factor = I965_BLENDFACTOR_INV_SRC_ALPHA; + blend_state->blend0.source_blend_factor = I965_BLENDFACTOR_SRC_ALPHA; + blend_state->blend0.blend_func = I965_BLENDFUNCTION_ADD; + blend_state->blend0.blend_enable = 1; + blend_state->blend1.post_blend_clamp_enable = 1; + blend_state->blend1.pre_blend_clamp_enable = 1; + blend_state->blend1.clamp_range = 0; /* clamp range [0, 1] */ + dri_bo_unmap(render_state->cc.blend); +} + +static void +gen6_subpicture_render_setup_states( + VADriverContextP ctx, + VASurfaceID surface, + const VARectangle *src_rect, + const VARectangle *dst_rect +) +{ + i965_render_dest_surface_state(ctx, 0); + i965_subpic_render_src_surfaces_state(ctx, surface); + i965_render_sampler(ctx); + i965_render_cc_viewport(ctx); + gen6_render_color_calc_state(ctx); + gen6_subpicture_render_blend_state(ctx); + gen6_render_depth_stencil_state(ctx); + i965_subpic_render_upload_vertex(ctx, surface, dst_rect); +} + +static void +gen6_render_put_subpicture( + VADriverContextP ctx, + VASurfaceID surface, + const VARectangle *src_rect, + const VARectangle *dst_rect +) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct object_surface *obj_surface = SURFACE(surface); + struct object_subpic *obj_subpic = SUBPIC(obj_surface->subpic); + + assert(obj_subpic); + gen6_render_initialize(ctx); + gen6_subpicture_render_setup_states(ctx, surface, src_rect, dst_rect); + gen6_render_emit_states(ctx, PS_SUBPIC_KERNEL); + i965_render_upload_image_palette(ctx, obj_subpic->image, 0xff); + intel_batchbuffer_flush(batch); +} + +/* + * for GEN7 + */ +static void +gen7_render_initialize(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + dri_bo *bo; + + /* VERTEX BUFFER */ + dri_bo_unreference(render_state->vb.vertex_buffer); + bo = dri_bo_alloc(i965->intel.bufmgr, + "vertex buffer", + 4096, + 4096); + assert(bo); + render_state->vb.vertex_buffer = bo; + + /* WM */ + dri_bo_unreference(render_state->wm.surface_state_binding_table_bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "surface state & binding table", + (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_RENDER_SURFACES, + 4096); + assert(bo); + render_state->wm.surface_state_binding_table_bo = bo; + + dri_bo_unreference(render_state->wm.sampler); + bo = dri_bo_alloc(i965->intel.bufmgr, + "sampler state", + MAX_SAMPLERS * sizeof(struct gen7_sampler_state), + 4096); + assert(bo); + render_state->wm.sampler = bo; + render_state->wm.sampler_count = 0; + + /* COLOR CALCULATOR */ + dri_bo_unreference(render_state->cc.state); + bo = dri_bo_alloc(i965->intel.bufmgr, + "color calc state", + sizeof(struct gen6_color_calc_state), + 4096); + assert(bo); + render_state->cc.state = bo; + + /* CC VIEWPORT */ + dri_bo_unreference(render_state->cc.viewport); + bo = dri_bo_alloc(i965->intel.bufmgr, + "cc viewport", + sizeof(struct i965_cc_viewport), + 4096); + assert(bo); + render_state->cc.viewport = bo; + + /* BLEND STATE */ + dri_bo_unreference(render_state->cc.blend); + bo = dri_bo_alloc(i965->intel.bufmgr, + "blend state", + sizeof(struct gen6_blend_state), + 4096); + assert(bo); + render_state->cc.blend = bo; + + /* DEPTH & STENCIL STATE */ + dri_bo_unreference(render_state->cc.depth_stencil); + bo = dri_bo_alloc(i965->intel.bufmgr, + "depth & stencil state", + sizeof(struct gen6_depth_stencil_state), + 4096); + assert(bo); + render_state->cc.depth_stencil = bo; +} + +static void +gen7_render_color_calc_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct gen6_color_calc_state *color_calc_state; + + dri_bo_map(render_state->cc.state, 1); + assert(render_state->cc.state->virtual); + color_calc_state = render_state->cc.state->virtual; + memset(color_calc_state, 0, sizeof(*color_calc_state)); + color_calc_state->constant_r = 1.0; + color_calc_state->constant_g = 0.0; + color_calc_state->constant_b = 1.0; + color_calc_state->constant_a = 1.0; + dri_bo_unmap(render_state->cc.state); +} + +static void +gen7_render_blend_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct gen6_blend_state *blend_state; + + dri_bo_map(render_state->cc.blend, 1); + assert(render_state->cc.blend->virtual); + blend_state = render_state->cc.blend->virtual; + memset(blend_state, 0, sizeof(*blend_state)); + blend_state->blend1.logic_op_enable = 1; + blend_state->blend1.logic_op_func = 0xc; + blend_state->blend1.pre_blend_clamp_enable = 1; + dri_bo_unmap(render_state->cc.blend); +} + +static void +gen7_render_depth_stencil_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct gen6_depth_stencil_state *depth_stencil_state; + + dri_bo_map(render_state->cc.depth_stencil, 1); + assert(render_state->cc.depth_stencil->virtual); + depth_stencil_state = render_state->cc.depth_stencil->virtual; + memset(depth_stencil_state, 0, sizeof(*depth_stencil_state)); + dri_bo_unmap(render_state->cc.depth_stencil); +} + +static void +gen7_render_sampler(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct gen7_sampler_state *sampler_state; + int i; + + assert(render_state->wm.sampler_count > 0); + assert(render_state->wm.sampler_count <= MAX_SAMPLERS); + + dri_bo_map(render_state->wm.sampler, 1); + assert(render_state->wm.sampler->virtual); + sampler_state = render_state->wm.sampler->virtual; + for (i = 0; i < render_state->wm.sampler_count; i++) { + memset(sampler_state, 0, sizeof(*sampler_state)); + sampler_state->ss0.min_filter = I965_MAPFILTER_LINEAR; + sampler_state->ss0.mag_filter = I965_MAPFILTER_LINEAR; + sampler_state->ss3.r_wrap_mode = I965_TEXCOORDMODE_CLAMP; + sampler_state->ss3.s_wrap_mode = I965_TEXCOORDMODE_CLAMP; + sampler_state->ss3.t_wrap_mode = I965_TEXCOORDMODE_CLAMP; + sampler_state++; + } + + dri_bo_unmap(render_state->wm.sampler); +} + +static void +gen7_render_setup_states( + VADriverContextP ctx, + VASurfaceID surface, + const VARectangle *src_rect, + const VARectangle *dst_rect +) +{ + i965_render_dest_surface_state(ctx, 0); + i965_render_src_surfaces_state(ctx, surface); + gen7_render_sampler(ctx); + i965_render_cc_viewport(ctx); + gen7_render_color_calc_state(ctx); + gen7_render_blend_state(ctx); + gen7_render_depth_stencil_state(ctx); + i965_render_upload_constants(ctx); + i965_render_upload_vertex(ctx, surface, src_rect, dst_rect); +} + +static void +gen7_emit_invarient_states(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + BEGIN_BATCH(batch, 1); + OUT_BATCH(batch, CMD_PIPELINE_SELECT | PIPELINE_SELECT_3D); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 4); + OUT_BATCH(batch, GEN6_3DSTATE_MULTISAMPLE | (4 - 2)); + OUT_BATCH(batch, GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER | + GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_1); /* 1 sample/pixel */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN6_3DSTATE_SAMPLE_MASK | (2 - 2)); + OUT_BATCH(batch, 1); + ADVANCE_BATCH(batch); + + /* Set system instruction pointer */ + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, CMD_STATE_SIP | 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); +} + +static void +gen7_emit_state_base_address(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + + OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | (10 - 2)); + OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* General state base address */ + OUT_RELOC(batch, render_state->wm.surface_state_binding_table_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* Surface state base address */ + OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* Dynamic state base address */ + OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* Indirect object base address */ + OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* Instruction base address */ + OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* General state upper bound */ + OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* Dynamic state upper bound */ + OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* Indirect object upper bound */ + OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* Instruction access upper bound */ +} + +static void +gen7_emit_viewport_state_pointers(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC | (2 - 2)); + OUT_RELOC(batch, + render_state->cc.viewport, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL | (2 - 2)); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); +} + +/* + * URB layout on GEN7 + * ---------------------------------------- + * | PS Push Constants (8KB) | VS entries | + * ---------------------------------------- + */ +static void +gen7_emit_urb(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS | (2 - 2)); + OUT_BATCH(batch, 8); /* in 1KBs */ + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_URB_VS | (2 - 2)); + OUT_BATCH(batch, + (32 << GEN7_URB_ENTRY_NUMBER_SHIFT) | /* at least 32 */ + (2 - 1) << GEN7_URB_ENTRY_SIZE_SHIFT | + (1 << GEN7_URB_STARTING_ADDRESS_SHIFT)); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_URB_GS | (2 - 2)); + OUT_BATCH(batch, + (0 << GEN7_URB_ENTRY_SIZE_SHIFT) | + (1 << GEN7_URB_STARTING_ADDRESS_SHIFT)); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_URB_HS | (2 - 2)); + OUT_BATCH(batch, + (0 << GEN7_URB_ENTRY_SIZE_SHIFT) | + (2 << GEN7_URB_STARTING_ADDRESS_SHIFT)); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_URB_DS | (2 - 2)); + OUT_BATCH(batch, + (0 << GEN7_URB_ENTRY_SIZE_SHIFT) | + (2 << GEN7_URB_STARTING_ADDRESS_SHIFT)); + ADVANCE_BATCH(batch); +} + +static void +gen7_emit_cc_state_pointers(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN6_3DSTATE_CC_STATE_POINTERS | (2 - 2)); + OUT_RELOC(batch, + render_state->cc.state, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 1); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_BLEND_STATE_POINTERS | (2 - 2)); + OUT_RELOC(batch, + render_state->cc.blend, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 1); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS | (2 - 2)); + OUT_RELOC(batch, + render_state->cc.depth_stencil, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 1); + ADVANCE_BATCH(batch); +} + +static void +gen7_emit_sampler_state_pointers(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS | (2 - 2)); + OUT_RELOC(batch, + render_state->wm.sampler, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + ADVANCE_BATCH(batch); +} + +static void +gen7_emit_binding_table(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS | (2 - 2)); + OUT_BATCH(batch, BINDING_TABLE_OFFSET); + ADVANCE_BATCH(batch); +} + +static void +gen7_emit_depth_buffer_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + BEGIN_BATCH(batch, 7); + OUT_BATCH(batch, GEN7_3DSTATE_DEPTH_BUFFER | (7 - 2)); + OUT_BATCH(batch, + (I965_DEPTHFORMAT_D32_FLOAT << 18) | + (I965_SURFACE_NULL << 29)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 3); + OUT_BATCH(batch, GEN7_3DSTATE_CLEAR_PARAMS | (3 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); +} + +static void +gen7_emit_drawing_rectangle(VADriverContextP ctx) +{ + i965_render_drawing_rectangle(ctx); +} + +static void +gen7_emit_vs_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + /* disable VS constant buffer */ + OUT_BATCH(batch, GEN6_3DSTATE_CONSTANT_VS | (7 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + + OUT_BATCH(batch, GEN6_3DSTATE_VS | (6 - 2)); + OUT_BATCH(batch, 0); /* without VS kernel */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); /* pass-through */ +} + +static void +gen7_emit_bypass_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + /* bypass GS */ + BEGIN_BATCH(batch, 7); + OUT_BATCH(batch, GEN6_3DSTATE_CONSTANT_GS | (7 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 7); + OUT_BATCH(batch, GEN6_3DSTATE_GS | (7 - 2)); + OUT_BATCH(batch, 0); /* without GS kernel */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); /* pass-through */ + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS | (2 - 2)); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + /* disable HS */ + BEGIN_BATCH(batch, 7); + OUT_BATCH(batch, GEN7_3DSTATE_CONSTANT_HS | (7 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 7); + OUT_BATCH(batch, GEN7_3DSTATE_HS | (7 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS | (2 - 2)); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + /* Disable TE */ + BEGIN_BATCH(batch, 4); + OUT_BATCH(batch, GEN7_3DSTATE_TE | (4 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + /* Disable DS */ + BEGIN_BATCH(batch, 7); + OUT_BATCH(batch, GEN7_3DSTATE_CONSTANT_DS | (7 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 6); + OUT_BATCH(batch, GEN7_3DSTATE_DS | (6 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS | (2 - 2)); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + /* Disable STREAMOUT */ + BEGIN_BATCH(batch, 3); + OUT_BATCH(batch, GEN7_3DSTATE_STREAMOUT | (3 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); +} + +static void +gen7_emit_clip_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + OUT_BATCH(batch, GEN6_3DSTATE_CLIP | (4 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); /* pass-through */ + OUT_BATCH(batch, 0); +} + +static void +gen7_emit_sf_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + BEGIN_BATCH(batch, 14); + OUT_BATCH(batch, GEN7_3DSTATE_SBE | (14 - 2)); + OUT_BATCH(batch, + (1 << GEN7_SBE_NUM_OUTPUTS_SHIFT) | + (1 << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT) | + (0 << GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); /* DW4 */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); /* DW9 */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 7); + OUT_BATCH(batch, GEN6_3DSTATE_SF | (7 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, GEN6_3DSTATE_SF_CULL_NONE); + OUT_BATCH(batch, 2 << GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); +} + +static void +gen7_emit_wm_state(VADriverContextP ctx, int kernel) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + + BEGIN_BATCH(batch, 3); + OUT_BATCH(batch, GEN6_3DSTATE_WM | (3 - 2)); + OUT_BATCH(batch, + GEN7_WM_DISPATCH_ENABLE | + GEN7_WM_PERSPECTIVE_PIXEL_BARYCENTRIC); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 7); + OUT_BATCH(batch, GEN6_3DSTATE_CONSTANT_PS | (7 - 2)); + OUT_BATCH(batch, 1); + OUT_BATCH(batch, 0); + OUT_RELOC(batch, + render_state->curbe.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 8); + OUT_BATCH(batch, GEN7_3DSTATE_PS | (8 - 2)); + OUT_RELOC(batch, + render_state->render_kernels[kernel].bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + OUT_BATCH(batch, + (1 << GEN7_PS_SAMPLER_COUNT_SHIFT) | + (5 << GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT)); + OUT_BATCH(batch, 0); /* scratch space base offset */ + OUT_BATCH(batch, + ((86 - 1) << GEN7_PS_MAX_THREADS_SHIFT) | + GEN7_PS_PUSH_CONSTANT_ENABLE | + GEN7_PS_ATTRIBUTE_ENABLE | + GEN7_PS_16_DISPATCH_ENABLE); + OUT_BATCH(batch, + (6 << GEN7_PS_DISPATCH_START_GRF_SHIFT_0)); + OUT_BATCH(batch, 0); /* kernel 1 pointer */ + OUT_BATCH(batch, 0); /* kernel 2 pointer */ + ADVANCE_BATCH(batch); +} + +static void +gen7_emit_vertex_element_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + /* Set up our vertex elements, sourced from the single vertex buffer. */ + OUT_BATCH(batch, CMD_VERTEX_ELEMENTS | (5 - 2)); + /* offset 0: X,Y -> {X, Y, 1.0, 1.0} */ + OUT_BATCH(batch, (0 << GEN6_VE0_VERTEX_BUFFER_INDEX_SHIFT) | + GEN6_VE0_VALID | + (I965_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | + (0 << VE0_OFFSET_SHIFT)); + OUT_BATCH(batch, (I965_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | + (I965_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | + (I965_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) | + (I965_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT)); + /* offset 8: S0, T0 -> {S0, T0, 1.0, 1.0} */ + OUT_BATCH(batch, (0 << GEN6_VE0_VERTEX_BUFFER_INDEX_SHIFT) | + GEN6_VE0_VALID | + (I965_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | + (8 << VE0_OFFSET_SHIFT)); + OUT_BATCH(batch, (I965_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | + (I965_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | + (I965_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) | + (I965_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT)); +} + +static void +gen7_emit_vertices(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + + BEGIN_BATCH(batch, 5); + OUT_BATCH(batch, CMD_VERTEX_BUFFERS | (5 - 2)); + OUT_BATCH(batch, + (0 << GEN6_VB0_BUFFER_INDEX_SHIFT) | + GEN6_VB0_VERTEXDATA | + GEN7_VB0_ADDRESS_MODIFYENABLE | + ((4 * 4) << VB0_BUFFER_PITCH_SHIFT)); + OUT_RELOC(batch, render_state->vb.vertex_buffer, I915_GEM_DOMAIN_VERTEX, 0, 0); + OUT_RELOC(batch, render_state->vb.vertex_buffer, I915_GEM_DOMAIN_VERTEX, 0, 12 * 4); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 7); + OUT_BATCH(batch, CMD_3DPRIMITIVE | (7 - 2)); + OUT_BATCH(batch, + _3DPRIM_RECTLIST | + GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL); + OUT_BATCH(batch, 3); /* vertex count per instance */ + OUT_BATCH(batch, 0); /* start vertex offset */ + OUT_BATCH(batch, 1); /* single instance */ + OUT_BATCH(batch, 0); /* start instance location */ + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); +} + +static void +gen7_render_emit_states(VADriverContextP ctx, int kernel) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + intel_batchbuffer_start_atomic(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); + gen7_emit_invarient_states(ctx); + gen7_emit_state_base_address(ctx); + gen7_emit_viewport_state_pointers(ctx); + gen7_emit_urb(ctx); + gen7_emit_cc_state_pointers(ctx); + gen7_emit_sampler_state_pointers(ctx); + gen7_emit_bypass_state(ctx); + gen7_emit_vs_state(ctx); + gen7_emit_clip_state(ctx); + gen7_emit_sf_state(ctx); + gen7_emit_wm_state(ctx, kernel); + gen7_emit_binding_table(ctx); + gen7_emit_depth_buffer_state(ctx); + gen7_emit_drawing_rectangle(ctx); + gen7_emit_vertex_element_state(ctx); + gen7_emit_vertices(ctx); + intel_batchbuffer_end_atomic(batch); +} + +static void +gen7_render_put_surface( + VADriverContextP ctx, + VASurfaceID surface, + const VARectangle *src_rect, + const VARectangle *dst_rect, + unsigned int flags +) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + gen7_render_initialize(ctx); + gen7_render_setup_states(ctx, surface, src_rect, dst_rect); + i965_clear_dest_region(ctx); + gen7_render_emit_states(ctx, PS_KERNEL); + intel_batchbuffer_flush(batch); +} + +static void +gen7_subpicture_render_blend_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct gen6_blend_state *blend_state; + + dri_bo_unmap(render_state->cc.state); + dri_bo_map(render_state->cc.blend, 1); + assert(render_state->cc.blend->virtual); + blend_state = render_state->cc.blend->virtual; + memset(blend_state, 0, sizeof(*blend_state)); + blend_state->blend0.dest_blend_factor = I965_BLENDFACTOR_INV_SRC_ALPHA; + blend_state->blend0.source_blend_factor = I965_BLENDFACTOR_SRC_ALPHA; + blend_state->blend0.blend_func = I965_BLENDFUNCTION_ADD; + blend_state->blend0.blend_enable = 1; + blend_state->blend1.post_blend_clamp_enable = 1; + blend_state->blend1.pre_blend_clamp_enable = 1; + blend_state->blend1.clamp_range = 0; /* clamp range [0, 1] */ + dri_bo_unmap(render_state->cc.blend); +} + +static void +gen7_subpicture_render_setup_states( + VADriverContextP ctx, + VASurfaceID surface, + const VARectangle *src_rect, + const VARectangle *dst_rect +) +{ + i965_render_dest_surface_state(ctx, 0); + i965_subpic_render_src_surfaces_state(ctx, surface); + i965_render_sampler(ctx); + i965_render_cc_viewport(ctx); + gen7_render_color_calc_state(ctx); + gen7_subpicture_render_blend_state(ctx); + gen7_render_depth_stencil_state(ctx); + i965_subpic_render_upload_vertex(ctx, surface, dst_rect); +} + +static void +gen7_render_put_subpicture( + VADriverContextP ctx, + VASurfaceID surface, + const VARectangle *src_rect, + const VARectangle *dst_rect +) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct object_surface *obj_surface = SURFACE(surface); + struct object_subpic *obj_subpic = SUBPIC(obj_surface->subpic); + + assert(obj_subpic); + gen7_render_initialize(ctx); + gen7_subpicture_render_setup_states(ctx, surface, src_rect, dst_rect); + gen7_render_emit_states(ctx, PS_SUBPIC_KERNEL); + i965_render_upload_image_palette(ctx, obj_subpic->image, 0xff); + intel_batchbuffer_flush(batch); +} + + +/* + * global functions + */ +VAStatus +i965_DestroySurfaces(VADriverContextP ctx, + VASurfaceID *surface_list, + int num_surfaces); +void +intel_render_put_surface( + VADriverContextP ctx, + VASurfaceID surface, + const VARectangle *src_rect, + const VARectangle *dst_rect, + unsigned int flags +) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + int has_done_scaling = 0; + VASurfaceID in_surface_id = surface; + VASurfaceID out_surface_id = i965_post_processing(ctx, surface, src_rect, dst_rect, flags, &has_done_scaling); + + assert((!has_done_scaling) || (out_surface_id != VA_INVALID_ID)); + + if (out_surface_id != VA_INVALID_ID) + in_surface_id = out_surface_id; + + if (IS_GEN7(i965->intel.device_id)) + gen7_render_put_surface(ctx, in_surface_id, has_done_scaling ? dst_rect : src_rect, dst_rect, flags); + else if (IS_GEN6(i965->intel.device_id)) + gen6_render_put_surface(ctx, in_surface_id, has_done_scaling ? dst_rect : src_rect, dst_rect, flags); + else + i965_render_put_surface(ctx, in_surface_id, has_done_scaling ? dst_rect : src_rect, dst_rect, flags); + + if (in_surface_id != surface) + i965_DestroySurfaces(ctx, &in_surface_id, 1); +} + +void +intel_render_put_subpicture( + VADriverContextP ctx, + VASurfaceID surface, + const VARectangle *src_rect, + const VARectangle *dst_rect +) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + + if (IS_GEN7(i965->intel.device_id)) + gen7_render_put_subpicture(ctx, surface, src_rect, dst_rect); + else if (IS_GEN6(i965->intel.device_id)) + gen6_render_put_subpicture(ctx, surface, src_rect, dst_rect); + else + i965_render_put_subpicture(ctx, surface, src_rect, dst_rect); +} + +Bool +i965_render_init(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + int i; + + /* kernel */ + assert(NUM_RENDER_KERNEL == (sizeof(render_kernels_gen5) / + sizeof(render_kernels_gen5[0]))); + assert(NUM_RENDER_KERNEL == (sizeof(render_kernels_gen6) / + sizeof(render_kernels_gen6[0]))); + + if (IS_GEN7(i965->intel.device_id)) + memcpy(render_state->render_kernels, render_kernels_gen7, sizeof(render_state->render_kernels)); + else if (IS_GEN6(i965->intel.device_id)) + memcpy(render_state->render_kernels, render_kernels_gen6, sizeof(render_state->render_kernels)); + else if (IS_IRONLAKE(i965->intel.device_id)) + memcpy(render_state->render_kernels, render_kernels_gen5, sizeof(render_state->render_kernels)); + else + memcpy(render_state->render_kernels, render_kernels_gen4, sizeof(render_state->render_kernels)); + + for (i = 0; i < NUM_RENDER_KERNEL; i++) { + struct i965_kernel *kernel = &render_state->render_kernels[i]; + + if (!kernel->size) + continue; + + kernel->bo = dri_bo_alloc(i965->intel.bufmgr, + kernel->name, + kernel->size, 0x1000); + assert(kernel->bo); + dri_bo_subdata(kernel->bo, 0, kernel->size, kernel->bin); + } + + /* constant buffer */ + render_state->curbe.bo = dri_bo_alloc(i965->intel.bufmgr, + "constant buffer", + 4096, 64); + assert(render_state->curbe.bo); + render_state->curbe.upload = 0; + + return True; +} + +Bool +i965_render_terminate(VADriverContextP ctx) +{ + int i; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + + dri_bo_unreference(render_state->curbe.bo); + render_state->curbe.bo = NULL; + + for (i = 0; i < NUM_RENDER_KERNEL; i++) { + struct i965_kernel *kernel = &render_state->render_kernels[i]; + + dri_bo_unreference(kernel->bo); + kernel->bo = NULL; + } + + dri_bo_unreference(render_state->vb.vertex_buffer); + render_state->vb.vertex_buffer = NULL; + dri_bo_unreference(render_state->vs.state); + render_state->vs.state = NULL; + dri_bo_unreference(render_state->sf.state); + render_state->sf.state = NULL; + dri_bo_unreference(render_state->wm.sampler); + render_state->wm.sampler = NULL; + dri_bo_unreference(render_state->wm.state); + render_state->wm.state = NULL; + dri_bo_unreference(render_state->wm.surface_state_binding_table_bo); + dri_bo_unreference(render_state->cc.viewport); + render_state->cc.viewport = NULL; + dri_bo_unreference(render_state->cc.state); + render_state->cc.state = NULL; + dri_bo_unreference(render_state->cc.blend); + render_state->cc.blend = NULL; + dri_bo_unreference(render_state->cc.depth_stencil); + render_state->cc.depth_stencil = NULL; + + if (render_state->draw_region) { + dri_bo_unreference(render_state->draw_region->bo); + free(render_state->draw_region); + render_state->draw_region = NULL; + } + + return True; +} + diff --git a/src/i965_render.h b/src/i965_render.h new file mode 100644 index 00000000..a5034d90 --- /dev/null +++ b/src/i965_render.h @@ -0,0 +1,102 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao <haihao.xiang@intel.com> + * + */ + +#ifndef _I965_RENDER_H_ +#define _I965_RENDER_H_ + +#define MAX_SAMPLERS 16 +#define MAX_RENDER_SURFACES (MAX_SAMPLERS + 1) + +#define NUM_RENDER_KERNEL 3 + +#include "i965_post_processing.h" + +struct i965_kernel; + +struct i965_render_state +{ + struct { + dri_bo *vertex_buffer; + } vb; + + struct { + dri_bo *state; + } vs; + + struct { + dri_bo *state; + } sf; + + struct { + int sampler_count; + dri_bo *sampler; + dri_bo *state; + dri_bo *surface_state_binding_table_bo; + } wm; + + struct { + dri_bo *state; + dri_bo *viewport; + dri_bo *blend; + dri_bo *depth_stencil; + } cc; + + struct { + dri_bo *bo; + int upload; + } curbe; + + unsigned short interleaved_uv; + unsigned short inited; + struct intel_region *draw_region; + + int pp_flag; /* 0: disable, 1: enable */ + + struct i965_kernel render_kernels[3]; +}; + +Bool i965_render_init(VADriverContextP ctx); +Bool i965_render_terminate(VADriverContextP ctx); + +void +intel_render_put_surface( + VADriverContextP ctx, + VASurfaceID surface, + const VARectangle *src_rect, + const VARectangle *dst_rect, + unsigned int flags +); + +void +intel_render_put_subpicture( + VADriverContextP ctx, + VASurfaceID surface, + const VARectangle *src_rect, + const VARectangle *dst_rect +); + +#endif /* _I965_RENDER_H_ */ diff --git a/src/i965_structs.h b/src/i965_structs.h new file mode 100644 index 00000000..12a8d145 --- /dev/null +++ b/src/i965_structs.h @@ -0,0 +1,1307 @@ +#ifndef _I965_STRUCTS_H_ +#define _I965_STRUCTS_H_ + +struct i965_vfe_state +{ + struct { + unsigned int per_thread_scratch_space:4; + unsigned int pad3:3; + unsigned int extend_vfe_state_present:1; + unsigned int pad2:2; + unsigned int scratch_base:22; + } vfe0; + + struct { + unsigned int debug_counter_control:2; + unsigned int children_present:1; + unsigned int vfe_mode:4; + unsigned int pad2:2; + unsigned int num_urb_entries:7; + unsigned int urb_entry_alloc_size:9; + unsigned int max_threads:7; + } vfe1; + + struct { + unsigned int pad4:4; + unsigned int interface_descriptor_base:28; + } vfe2; +}; + +struct i965_vfe_state_ex +{ + struct { + unsigned int pad:8; + unsigned int obj_id:24; + } vfex0; + + union { + struct { + unsigned int residual_grf_offset:5; + unsigned int pad0:3; + unsigned int weight_grf_offset:5; + unsigned int pad1:3; + unsigned int residual_data_offset:8; + unsigned int sub_field_present_flag:2; + unsigned int residual_data_fix_offset_flag:1; + unsigned int pad2:5; + } avc; + + unsigned int vc1; + } vfex1; + + struct { + unsigned int remap_index_0:4; + unsigned int remap_index_1:4; + unsigned int remap_index_2:4; + unsigned int remap_index_3:4; + unsigned int remap_index_4:4; + unsigned int remap_index_5:4; + unsigned int remap_index_6:4; + unsigned int remap_index_7:4; + }remap_table0; + + struct { + unsigned int remap_index_8:4; + unsigned int remap_index_9:4; + unsigned int remap_index_10:4; + unsigned int remap_index_11:4; + unsigned int remap_index_12:4; + unsigned int remap_index_13:4; + unsigned int remap_index_14:4; + unsigned int remap_index_15:4; + } remap_table1; + + struct { + unsigned int mask:8; + unsigned int pad:22; + unsigned int type:1; + unsigned int enable:1; + } scoreboard0; + + struct { + int delta_x0:4; + int delta_y0:4; + int delta_x1:4; + int delta_y1:4; + int delta_x2:4; + int delta_y2:4; + int delta_x3:4; + int delta_y3:4; + } scoreboard1; + + struct { + int delta_x4:4; + int delta_y4:4; + int delta_x5:4; + int delta_y5:4; + int delta_x6:4; + int delta_y6:4; + int delta_x7:4; + int delta_y7:4; + } scoreboard2; + + unsigned int pad; +}; + +struct i965_vld_state +{ + struct { + unsigned int pad6:6; + unsigned int scan_order:1; + unsigned int intra_vlc_format:1; + unsigned int quantizer_scale_type:1; + unsigned int concealment_motion_vector:1; + unsigned int frame_predict_frame_dct:1; + unsigned int top_field_first:1; + unsigned int picture_structure:2; + unsigned int intra_dc_precision:2; + unsigned int f_code_0_0:4; + unsigned int f_code_0_1:4; + unsigned int f_code_1_0:4; + unsigned int f_code_1_1:4; + } vld0; + + struct { + unsigned int pad2:9; + unsigned int picture_coding_type:2; + unsigned int pad:21; + } vld1; + + struct { + unsigned int index_0:4; + unsigned int index_1:4; + unsigned int index_2:4; + unsigned int index_3:4; + unsigned int index_4:4; + unsigned int index_5:4; + unsigned int index_6:4; + unsigned int index_7:4; + } desc_remap_table0; + + struct { + unsigned int index_8:4; + unsigned int index_9:4; + unsigned int index_10:4; + unsigned int index_11:4; + unsigned int index_12:4; + unsigned int index_13:4; + unsigned int index_14:4; + unsigned int index_15:4; + } desc_remap_table1; +}; + +struct i965_interface_descriptor +{ + struct { + unsigned int grf_reg_blocks:4; + unsigned int pad:2; + unsigned int kernel_start_pointer:26; + } desc0; + + struct { + unsigned int pad:7; + unsigned int software_exception:1; + unsigned int pad2:3; + unsigned int maskstack_exception:1; + unsigned int pad3:1; + unsigned int illegal_opcode_exception:1; + unsigned int pad4:2; + unsigned int floating_point_mode:1; + unsigned int thread_priority:1; + unsigned int single_program_flow:1; + unsigned int pad5:1; + unsigned int const_urb_entry_read_offset:6; + unsigned int const_urb_entry_read_len:6; + } desc1; + + struct { + unsigned int pad:2; + unsigned int sampler_count:3; + unsigned int sampler_state_pointer:27; + } desc2; + + struct { + unsigned int binding_table_entry_count:5; + unsigned int binding_table_pointer:27; + } desc3; +}; + +struct i965_surface_state +{ + struct { + unsigned int cube_pos_z:1; + unsigned int cube_neg_z:1; + unsigned int cube_pos_y:1; + unsigned int cube_neg_y:1; + unsigned int cube_pos_x:1; + unsigned int cube_neg_x:1; + unsigned int pad:2; + unsigned int render_cache_read_mode:1; + unsigned int cube_map_corner_mode:1; + unsigned int mipmap_layout_mode:1; + unsigned int vert_line_stride_ofs:1; + unsigned int vert_line_stride:1; + unsigned int color_blend:1; + unsigned int writedisable_blue:1; + unsigned int writedisable_green:1; + unsigned int writedisable_red:1; + unsigned int writedisable_alpha:1; + unsigned int surface_format:9; + unsigned int data_return_format:1; + unsigned int pad0:1; + unsigned int surface_type:3; + } ss0; + + struct { + unsigned int base_addr; + } ss1; + + struct { + unsigned int render_target_rotation:2; + unsigned int mip_count:4; + unsigned int width:13; + unsigned int height:13; + } ss2; + + struct { + unsigned int tile_walk:1; + unsigned int tiled_surface:1; + unsigned int pad:1; + unsigned int pitch:18; + unsigned int depth:11; + } ss3; + + struct { + unsigned int pad:19; + unsigned int min_array_elt:9; + unsigned int min_lod:4; + } ss4; + + struct { + unsigned int pad:20; + unsigned int y_offset:4; + unsigned int pad2:1; + unsigned int x_offset:7; + } ss5; +}; + +struct thread0 +{ + unsigned int pad0:1; + unsigned int grf_reg_count:3; + unsigned int pad1:2; + unsigned int kernel_start_pointer:26; +}; + +struct thread1 +{ + unsigned int ext_halt_exception_enable:1; + unsigned int sw_exception_enable:1; + unsigned int mask_stack_exception_enable:1; + unsigned int timeout_exception_enable:1; + unsigned int illegal_op_exception_enable:1; + unsigned int pad0:3; + unsigned int depth_coef_urb_read_offset:6; /* WM only */ + unsigned int pad1:2; + unsigned int floating_point_mode:1; + unsigned int thread_priority:1; + unsigned int binding_table_entry_count:8; + unsigned int pad3:5; + unsigned int single_program_flow:1; +}; + +struct thread2 +{ + unsigned int per_thread_scratch_space:4; + unsigned int pad0:6; + unsigned int scratch_space_base_pointer:22; +}; + + +struct thread3 +{ + unsigned int dispatch_grf_start_reg:4; + unsigned int urb_entry_read_offset:6; + unsigned int pad0:1; + unsigned int urb_entry_read_length:6; + unsigned int pad1:1; + unsigned int const_urb_entry_read_offset:6; + unsigned int pad2:1; + unsigned int const_urb_entry_read_length:6; + unsigned int pad3:1; +}; + +struct i965_vs_unit_state +{ + struct thread0 thread0; + struct thread1 thread1; + struct thread2 thread2; + struct thread3 thread3; + + struct { + unsigned int pad0:10; + unsigned int stats_enable:1; + unsigned int nr_urb_entries:7; + unsigned int pad1:1; + unsigned int urb_entry_allocation_size:5; + unsigned int pad2:1; + unsigned int max_threads:4; + unsigned int pad3:3; + } thread4; + + struct { + unsigned int sampler_count:3; + unsigned int pad0:2; + unsigned int sampler_state_pointer:27; + } vs5; + + struct { + unsigned int vs_enable:1; + unsigned int vert_cache_disable:1; + unsigned int pad0:30; + } vs6; +}; + +struct i965_gs_unit_state +{ + struct thread0 thread0; + struct thread1 thread1; + struct thread2 thread2; + struct thread3 thread3; + + struct { + unsigned int pad0:10; + unsigned int stats_enable:1; + unsigned int nr_urb_entries:7; + unsigned int pad1:1; + unsigned int urb_entry_allocation_size:5; + unsigned int pad2:1; + unsigned int max_threads:1; + unsigned int pad3:6; + } thread4; + + struct { + unsigned int sampler_count:3; + unsigned int pad0:2; + unsigned int sampler_state_pointer:27; + } gs5; + + + struct { + unsigned int max_vp_index:4; + unsigned int pad0:26; + unsigned int reorder_enable:1; + unsigned int pad1:1; + } gs6; +}; + +struct i965_clip_unit_state +{ + struct thread0 thread0; + struct thread1 thread1; + struct thread2 thread2; + struct thread3 thread3; + + struct { + unsigned int pad0:9; + unsigned int gs_output_stats:1; /* not always */ + unsigned int stats_enable:1; + unsigned int nr_urb_entries:7; + unsigned int pad1:1; + unsigned int urb_entry_allocation_size:5; + unsigned int pad2:1; + unsigned int max_threads:6; /* may be less */ + unsigned int pad3:1; + } thread4; + + struct { + unsigned int pad0:13; + unsigned int clip_mode:3; + unsigned int userclip_enable_flags:8; + unsigned int userclip_must_clip:1; + unsigned int pad1:1; + unsigned int guard_band_enable:1; + unsigned int viewport_z_clip_enable:1; + unsigned int viewport_xy_clip_enable:1; + unsigned int vertex_position_space:1; + unsigned int api_mode:1; + unsigned int pad2:1; + } clip5; + + struct { + unsigned int pad0:5; + unsigned int clipper_viewport_state_ptr:27; + } clip6; + + + float viewport_xmin; + float viewport_xmax; + float viewport_ymin; + float viewport_ymax; +}; + +struct i965_sf_unit_state +{ + struct thread0 thread0; + struct { + unsigned int pad0:7; + unsigned int sw_exception_enable:1; + unsigned int pad1:3; + unsigned int mask_stack_exception_enable:1; + unsigned int pad2:1; + unsigned int illegal_op_exception_enable:1; + unsigned int pad3:2; + unsigned int floating_point_mode:1; + unsigned int thread_priority:1; + unsigned int binding_table_entry_count:8; + unsigned int pad4:5; + unsigned int single_program_flow:1; + } sf1; + + struct thread2 thread2; + struct thread3 thread3; + + struct { + unsigned int pad0:10; + unsigned int stats_enable:1; + unsigned int nr_urb_entries:7; + unsigned int pad1:1; + unsigned int urb_entry_allocation_size:5; + unsigned int pad2:1; + unsigned int max_threads:6; + unsigned int pad3:1; + } thread4; + + struct { + unsigned int front_winding:1; + unsigned int viewport_transform:1; + unsigned int pad0:3; + unsigned int sf_viewport_state_offset:27; + } sf5; + + struct { + unsigned int pad0:9; + unsigned int dest_org_vbias:4; + unsigned int dest_org_hbias:4; + unsigned int scissor:1; + unsigned int disable_2x2_trifilter:1; + unsigned int disable_zero_pix_trifilter:1; + unsigned int point_rast_rule:2; + unsigned int line_endcap_aa_region_width:2; + unsigned int line_width:4; + unsigned int fast_scissor_disable:1; + unsigned int cull_mode:2; + unsigned int aa_enable:1; + } sf6; + + struct { + unsigned int point_size:11; + unsigned int use_point_size_state:1; + unsigned int subpixel_precision:1; + unsigned int sprite_point:1; + unsigned int pad0:11; + unsigned int trifan_pv:2; + unsigned int linestrip_pv:2; + unsigned int tristrip_pv:2; + unsigned int line_last_pixel_enable:1; + } sf7; +}; + +struct i965_sampler_state +{ + struct { + unsigned int shadow_function:3; + unsigned int lod_bias:11; + unsigned int min_filter:3; + unsigned int mag_filter:3; + unsigned int mip_filter:2; + unsigned int base_level:5; + unsigned int pad:1; + unsigned int lod_preclamp:1; + unsigned int border_color_mode:1; + unsigned int pad0:1; + unsigned int disable:1; + } ss0; + + struct { + unsigned int r_wrap_mode:3; + unsigned int t_wrap_mode:3; + unsigned int s_wrap_mode:3; + unsigned int pad:3; + unsigned int max_lod:10; + unsigned int min_lod:10; + } ss1; + + + struct { + unsigned int pad:5; + unsigned int border_color_pointer:27; + } ss2; + + struct { + unsigned int pad:19; + unsigned int max_aniso:3; + unsigned int chroma_key_mode:1; + unsigned int chroma_key_index:2; + unsigned int chroma_key_enable:1; + unsigned int monochrome_filter_width:3; + unsigned int monochrome_filter_height:3; + } ss3; +}; + +struct i965_wm_unit_state +{ + struct thread0 thread0; + struct thread1 thread1; + struct thread2 thread2; + struct thread3 thread3; + + struct { + unsigned int stats_enable:1; + unsigned int pad0:1; + unsigned int sampler_count:3; + unsigned int sampler_state_pointer:27; + } wm4; + + struct { + unsigned int enable_8_pix:1; + unsigned int enable_16_pix:1; + unsigned int enable_32_pix:1; + unsigned int pad0:7; + unsigned int legacy_global_depth_bias:1; + unsigned int line_stipple:1; + unsigned int depth_offset:1; + unsigned int polygon_stipple:1; + unsigned int line_aa_region_width:2; + unsigned int line_endcap_aa_region_width:2; + unsigned int early_depth_test:1; + unsigned int thread_dispatch_enable:1; + unsigned int program_uses_depth:1; + unsigned int program_computes_depth:1; + unsigned int program_uses_killpixel:1; + unsigned int legacy_line_rast: 1; + unsigned int transposed_urb_read:1; + unsigned int max_threads:7; + } wm5; + + float global_depth_offset_constant; + float global_depth_offset_scale; +}; + +struct i965_cc_viewport +{ + float min_depth; + float max_depth; +}; + +struct i965_cc_unit_state +{ + struct { + unsigned int pad0:3; + unsigned int bf_stencil_pass_depth_pass_op:3; + unsigned int bf_stencil_pass_depth_fail_op:3; + unsigned int bf_stencil_fail_op:3; + unsigned int bf_stencil_func:3; + unsigned int bf_stencil_enable:1; + unsigned int pad1:2; + unsigned int stencil_write_enable:1; + unsigned int stencil_pass_depth_pass_op:3; + unsigned int stencil_pass_depth_fail_op:3; + unsigned int stencil_fail_op:3; + unsigned int stencil_func:3; + unsigned int stencil_enable:1; + } cc0; + + + struct { + unsigned int bf_stencil_ref:8; + unsigned int stencil_write_mask:8; + unsigned int stencil_test_mask:8; + unsigned int stencil_ref:8; + } cc1; + + + struct { + unsigned int logicop_enable:1; + unsigned int pad0:10; + unsigned int depth_write_enable:1; + unsigned int depth_test_function:3; + unsigned int depth_test:1; + unsigned int bf_stencil_write_mask:8; + unsigned int bf_stencil_test_mask:8; + } cc2; + + + struct { + unsigned int pad0:8; + unsigned int alpha_test_func:3; + unsigned int alpha_test:1; + unsigned int blend_enable:1; + unsigned int ia_blend_enable:1; + unsigned int pad1:1; + unsigned int alpha_test_format:1; + unsigned int pad2:16; + } cc3; + + struct { + unsigned int pad0:5; + unsigned int cc_viewport_state_offset:27; + } cc4; + + struct { + unsigned int pad0:2; + unsigned int ia_dest_blend_factor:5; + unsigned int ia_src_blend_factor:5; + unsigned int ia_blend_function:3; + unsigned int statistics_enable:1; + unsigned int logicop_func:4; + unsigned int pad1:11; + unsigned int dither_enable:1; + } cc5; + + struct { + unsigned int clamp_post_alpha_blend:1; + unsigned int clamp_pre_alpha_blend:1; + unsigned int clamp_range:2; + unsigned int pad0:11; + unsigned int y_dither_offset:2; + unsigned int x_dither_offset:2; + unsigned int dest_blend_factor:5; + unsigned int src_blend_factor:5; + unsigned int blend_function:3; + } cc6; + + struct { + union { + float f; + unsigned char ub[4]; + } alpha_ref; + } cc7; +}; + +struct i965_sampler_8x8 +{ + struct { + unsigned int pad0:16; + unsigned int chroma_key_index:2; + unsigned int chroma_key_enable:1; + unsigned int pad1:8; + unsigned int ief_filter_size:1; + unsigned int ief_filter_type:1; + unsigned int ief_bypass:1; + unsigned int pad2:1; + unsigned int avs_filter_type:1; + } dw0; + + struct { + unsigned int pad0:5; + unsigned int sampler_8x8_state_pointer:27; + } dw1; + + struct { + unsigned int weak_edge_threshold:4; + unsigned int strong_edge_threshold:4; + unsigned int global_noise_estimation:8; + unsigned int pad0:16; + } dw2; + + struct { + unsigned int r3x_coefficient:5; + unsigned int pad0:1; + unsigned int r3c_coefficient:5; + unsigned int pad1:3; + unsigned int gain_factor:6; + unsigned int non_edge_weight:3; + unsigned int pad2:1; + unsigned int regular_weight:3; + unsigned int pad3:1; + unsigned int strong_edge_weight:3; + unsigned int pad4:1; + } dw3; + + struct { + unsigned int pad0:2; + unsigned int mr_boost:1; + unsigned int mr_threshold:4; + unsigned int steepness_boost:1; + unsigned int steepness_threshold:4; + unsigned int pad1:2; + unsigned int r5x_coefficient:5; + unsigned int pad2:1; + unsigned int r5cx_coefficient:5; + unsigned int pad3:1; + unsigned int r5c_coefficient:5; + unsigned int pad4:1; + } dw4; + + struct { + unsigned int pwl1_point_1:8; + unsigned int pwl1_point_2:8; + unsigned int pwl1_point_3:8; + unsigned int pwl1_point_4:8; + } dw5; + + struct { + unsigned int pwl1_point_5:8; + unsigned int pwl1_point_6:8; + unsigned int pwl1_r3_bias_0:8; + unsigned int pwl1_r3_bias_1:8; + } dw6; + + struct { + unsigned int pwl1_r3_bias_2:8; + unsigned int pwl1_r3_bias_3:8; + unsigned int pwl1_r3_bias_4:8; + unsigned int pwl1_r3_bias_5:8; + } dw7; + + struct { + unsigned int pwl1_r3_bias_6:8; + unsigned int pwl1_r5_bias_0:8; + unsigned int pwl1_r5_bias_1:8; + unsigned int pwl1_r5_bias_2:8; + } dw8; + + struct { + unsigned int pwl1_r5_bias_3:8; + unsigned int pwl1_r5_bias_4:8; + unsigned int pwl1_r5_bias_5:8; + unsigned int pwl1_r5_bias_6:8; + } dw9; + + struct { + int pwl1_r3_slope_0:8; + int pwl1_r3_slope_1:8; + int pwl1_r3_slope_2:8; + int pwl1_r3_slope_3:8; + } dw10; + + struct { + int pwl1_r3_slope_4:8; + int pwl1_r3_slope_5:8; + int pwl1_r3_slope_6:8; + int pwl1_r5_slope_0:8; + } dw11; + + struct { + int pwl1_r5_slope_1:8; + int pwl1_r5_slope_2:8; + int pwl1_r5_slope_3:8; + int pwl1_r5_slope_4:8; + } dw12; + + struct { + int pwl1_r5_slope_5:8; + int pwl1_r5_slope_6:8; + unsigned int limiter_boost:4; + unsigned int pad0:4; + unsigned int minimum_limiter:4; + unsigned int maximum_limiter:4; + } dw13; + + struct { + unsigned int pad0:8; + unsigned int clip_limiter:10; + unsigned int pad1:14; + } dw14; + + unsigned int dw15; /* Just a pad */ +}; + +struct i965_sampler_8x8_coefficient +{ + struct { + int table_0x_filter_c0:8; + int table_0x_filter_c1:8; + int table_0x_filter_c2:8; + int table_0x_filter_c3:8; + } dw0; + + struct { + int table_0x_filter_c4:8; + int table_0x_filter_c5:8; + int table_0x_filter_c6:8; + int table_0x_filter_c7:8; + } dw1; + + struct { + int table_0y_filter_c0:8; + int table_0y_filter_c1:8; + int table_0y_filter_c2:8; + int table_0y_filter_c3:8; + } dw2; + + struct { + int table_0y_filter_c4:8; + int table_0y_filter_c5:8; + int table_0y_filter_c6:8; + int table_0y_filter_c7:8; + } dw3; + + struct { + int pad0:16; + int table_1x_filter_c2:8; + int table_1x_filter_c3:8; + } dw4; + + struct { + int table_1x_filter_c4:8; + int table_1x_filter_c5:8; + int pad0:16; + } dw5; + + struct { + int pad0:16; + int table_1y_filter_c2:8; + int table_1y_filter_c3:8; + } dw6; + + struct { + int table_1y_filter_c4:8; + int table_1y_filter_c5:8; + int pad0:16; + } dw7; +}; + +struct i965_sampler_8x8_state +{ + struct i965_sampler_8x8_coefficient coefficients[17]; + + struct { + unsigned int transition_area_with_8_pixels:3; + unsigned int pad0:1; + unsigned int transition_area_with_4_pixels:3; + unsigned int pad1:1; + unsigned int max_derivative_8_pixels:8; + unsigned int max_derivative_4_pixels:8; + unsigned int default_sharpness_level:8; + } dw136; + + struct { + unsigned int bit_field_name:1; + unsigned int adaptive_filter_for_all_channel:1; + unsigned int pad0:19; + unsigned int bypass_y_adaptive_filtering:1; + unsigned int bypass_x_adaptive_filtering:1; + unsigned int pad1:9; + } dw137; +}; + +struct i965_surface_state2 +{ + struct { + unsigned int surface_base_address; + } ss0; + + struct { + unsigned int cbcr_pixel_offset_v_direction:2; + unsigned int pad0:4; + unsigned int width:13; + unsigned int height:13; + } ss1; + + struct { + unsigned int tile_walk:1; + unsigned int tiled_surface:1; + unsigned int half_pitch_for_chroma:1; + unsigned int pitch:17; + unsigned int pad0:2; + unsigned int surface_object_control_data:4; + unsigned int pad1:1; + unsigned int interleave_chroma:1; + unsigned int surface_format:4; + } ss2; + + struct { + unsigned int y_offset_for_cb:13; + unsigned int pad0:3; + unsigned int x_offset_for_cb:13; + unsigned int pad1:3; + } ss3; + + struct { + unsigned int y_offset_for_cr:13; + unsigned int pad0:3; + unsigned int x_offset_for_cr:13; + unsigned int pad1:3; + } ss4; +}; + +struct i965_sampler_dndi +{ + struct { + unsigned int denoise_asd_threshold:8; + unsigned int denoise_history_delta:8; + unsigned int denoise_maximum_history:8; + unsigned int denoise_stad_threshold:8; + } dw0; + + struct { + unsigned int denoise_threshold_for_sum_of_complexity_measure:8; + unsigned int denoise_moving_pixel_threshold:5; + unsigned int stmm_c2:3; + unsigned int low_temporal_difference_threshold:6; + unsigned int pad0:2; + unsigned int temporal_difference_threshold:6; + unsigned int pad1:2; + } dw1; + + struct { + unsigned int block_noise_estimate_noise_threshold:8; + unsigned int block_noise_estimate_edge_threshold:8; + unsigned int denoise_edge_threshold:8; + unsigned int good_neighbor_threshold:8; + } dw2; + + struct { + unsigned int maximum_stmm:8; + unsigned int multipler_for_vecm:6; + unsigned int pad0:2; + unsigned int blending_constant_across_time_for_small_values_of_stmm:8; + unsigned int blending_constant_across_time_for_large_values_of_stmm:7; + unsigned int stmm_blending_constant_select:1; + } dw3; + + struct { + unsigned int sdi_delta:8; + unsigned int sdi_threshold:8; + unsigned int stmm_output_shift:4; + unsigned int stmm_shift_up:2; + unsigned int stmm_shift_down:2; + unsigned int minimum_stmm:8; + } dw4; + + struct { + unsigned int fmd_temporal_difference_threshold:8; + unsigned int sdi_fallback_mode_2_constant:8; + unsigned int sdi_fallback_mode_1_t2_constant:8; + unsigned int sdi_fallback_mode_1_t1_constant:8; + } dw5; + + struct { + unsigned int dn_enable:1; + unsigned int di_enable:1; + unsigned int di_partial:1; + unsigned int dndi_top_first:1; + unsigned int dndi_stream_id:1; + unsigned int dndi_first_frame:1; + unsigned int progressive_dn:1; + unsigned int pad0:1; + unsigned int fmd_tear_threshold:6; + unsigned int pad1:2; + unsigned int fmd2_vertical_difference_threshold:8; + unsigned int fmd1_vertical_difference_threshold:8; + } dw6; + + struct { + unsigned int pad0:8; + unsigned int fmd_for_1st_field_of_current_frame:2; + unsigned int pad1:6; + unsigned int fmd_for_2nd_field_of_previous_frame:2; + unsigned int vdi_walker_enable:1; + unsigned int pad2:4; + unsigned int column_width_minus1:9; + } dw7; +}; + + +struct gen6_blend_state +{ + struct { + unsigned int dest_blend_factor:5; + unsigned int source_blend_factor:5; + unsigned int pad3:1; + unsigned int blend_func:3; + unsigned int pad2:1; + unsigned int ia_dest_blend_factor:5; + unsigned int ia_source_blend_factor:5; + unsigned int pad1:1; + unsigned int ia_blend_func:3; + unsigned int pad0:1; + unsigned int ia_blend_enable:1; + unsigned int blend_enable:1; + } blend0; + + struct { + unsigned int post_blend_clamp_enable:1; + unsigned int pre_blend_clamp_enable:1; + unsigned int clamp_range:2; + unsigned int pad0:4; + unsigned int x_dither_offset:2; + unsigned int y_dither_offset:2; + unsigned int dither_enable:1; + unsigned int alpha_test_func:3; + unsigned int alpha_test_enable:1; + unsigned int pad1:1; + unsigned int logic_op_func:4; + unsigned int logic_op_enable:1; + unsigned int pad2:1; + unsigned int write_disable_b:1; + unsigned int write_disable_g:1; + unsigned int write_disable_r:1; + unsigned int write_disable_a:1; + unsigned int pad3:1; + unsigned int alpha_to_coverage_dither:1; + unsigned int alpha_to_one:1; + unsigned int alpha_to_coverage:1; + } blend1; +}; + +struct gen6_color_calc_state +{ + struct { + unsigned int alpha_test_format:1; + unsigned int pad0:14; + unsigned int round_disable:1; + unsigned int bf_stencil_ref:8; + unsigned int stencil_ref:8; + } cc0; + + union { + float alpha_ref_f; + struct { + unsigned int ui:8; + unsigned int pad0:24; + } alpha_ref_fi; + } cc1; + + float constant_r; + float constant_g; + float constant_b; + float constant_a; +}; + +struct gen6_depth_stencil_state +{ + struct { + unsigned int pad0:3; + unsigned int bf_stencil_pass_depth_pass_op:3; + unsigned int bf_stencil_pass_depth_fail_op:3; + unsigned int bf_stencil_fail_op:3; + unsigned int bf_stencil_func:3; + unsigned int bf_stencil_enable:1; + unsigned int pad1:2; + unsigned int stencil_write_enable:1; + unsigned int stencil_pass_depth_pass_op:3; + unsigned int stencil_pass_depth_fail_op:3; + unsigned int stencil_fail_op:3; + unsigned int stencil_func:3; + unsigned int stencil_enable:1; + } ds0; + + struct { + unsigned int bf_stencil_write_mask:8; + unsigned int bf_stencil_test_mask:8; + unsigned int stencil_write_mask:8; + unsigned int stencil_test_mask:8; + } ds1; + + struct { + unsigned int pad0:26; + unsigned int depth_write_enable:1; + unsigned int depth_test_func:3; + unsigned int pad1:1; + unsigned int depth_test_enable:1; + } ds2; +}; + +struct gen6_interface_descriptor_data +{ + struct { + unsigned int pad0:6; + unsigned int kernel_start_pointer:26; + } desc0; + + struct { + unsigned int pad0:7; + unsigned int software_exception_enable:1; + unsigned int pad1:3; + unsigned int maskstack_exception_enable:1; + unsigned int pad2:1; + unsigned int illegal_opcode_exception_enable:1; + unsigned int pad3:2; + unsigned int floating_point_mode:1; + unsigned int thread_priority:1; + unsigned int single_program_flow:1; + unsigned int pad4:13; + } desc1; + + struct { + unsigned int pad0:2; + unsigned int sampler_count:3; + unsigned int sampler_state_pointer:27; + } desc2; + + struct { + unsigned int binding_table_entry_count:5; + unsigned int binding_table_pointer:27; + } desc3; + + struct { + unsigned int constant_urb_entry_read_offset:16; + unsigned int constant_urb_entry_read_length:16; + } desc4; + + union { + struct { + unsigned int num_threads:8; + unsigned int barrier_return_byte:8; + unsigned int shared_local_memory_size:5; + unsigned int barrier_enable:1; + unsigned int rounding_mode:2; + unsigned int barrier_return_grf_offset:8; + } gen7; + + struct { + unsigned int barrier_id:4; + unsigned int pad0:28; + } gen6; + } desc5; + + struct { + unsigned int cross_thread_constant_data_read_length:8; + unsigned int pad0:24; + } desc6; + + struct { + unsigned int pad0; + } desc7; +}; + +struct gen7_surface_state +{ + struct { + unsigned int cube_pos_z:1; + unsigned int cube_neg_z:1; + unsigned int cube_pos_y:1; + unsigned int cube_neg_y:1; + unsigned int cube_pos_x:1; + unsigned int cube_neg_x:1; + unsigned int pad2:2; + unsigned int render_cache_read_write:1; + unsigned int pad1:1; + unsigned int surface_array_spacing:1; + unsigned int vert_line_stride_ofs:1; + unsigned int vert_line_stride:1; + unsigned int tile_walk:1; + unsigned int tiled_surface:1; + unsigned int horizontal_alignment:1; + unsigned int vertical_alignment:2; + unsigned int surface_format:9; /**< BRW_SURFACEFORMAT_x */ + unsigned int pad0:1; + unsigned int is_array:1; + unsigned int surface_type:3; /**< BRW_SURFACE_1D/2D/3D/CUBE */ + } ss0; + + struct { + unsigned int base_addr; + } ss1; + + struct { + unsigned int width:14; + unsigned int pad1:2; + unsigned int height:14; + unsigned int pad0:2; + } ss2; + + struct { + unsigned int pitch:18; + unsigned int pad:3; + unsigned int depth:11; + } ss3; + + struct { + unsigned int multisample_position_palette_index:3; + unsigned int num_multisamples:3; + unsigned int multisampled_surface_storage_format:1; + unsigned int render_target_view_extent:11; + unsigned int min_array_elt:11; + unsigned int rotation:2; + unsigned int pad0:1; + } ss4; + + struct { + unsigned int mip_count:4; + unsigned int min_lod:4; + unsigned int pad1:12; + unsigned int y_offset:4; + unsigned int pad0:1; + unsigned int x_offset:7; + } ss5; + + struct { + unsigned int pad; /* Multisample Control Surface stuff */ + } ss6; + + struct { + unsigned int resource_min_lod:12; + unsigned int pad0:16; + unsigned int alpha_clear_color:1; + unsigned int blue_clear_color:1; + unsigned int green_clear_color:1; + unsigned int red_clear_color:1; + } ss7; +}; + +struct gen7_sampler_state +{ + struct + { + unsigned int aniso_algorithm:1; + unsigned int lod_bias:13; + unsigned int min_filter:3; + unsigned int mag_filter:3; + unsigned int mip_filter:2; + unsigned int base_level:5; + unsigned int pad1:1; + unsigned int lod_preclamp:1; + unsigned int default_color_mode:1; + unsigned int pad0:1; + unsigned int disable:1; + } ss0; + + struct + { + unsigned int cube_control_mode:1; + unsigned int shadow_function:3; + unsigned int pad:4; + unsigned int max_lod:12; + unsigned int min_lod:12; + } ss1; + + struct + { + unsigned int pad:5; + unsigned int default_color_pointer:27; + } ss2; + + struct + { + unsigned int r_wrap_mode:3; + unsigned int t_wrap_mode:3; + unsigned int s_wrap_mode:3; + unsigned int pad:1; + unsigned int non_normalized_coord:1; + unsigned int trilinear_quality:2; + unsigned int address_round:6; + unsigned int max_aniso:3; + unsigned int chroma_key_mode:1; + unsigned int chroma_key_index:2; + unsigned int chroma_key_enable:1; + unsigned int pad0:6; + } ss3; +}; + +struct gen7_surface_state2 +{ + struct { + unsigned int surface_base_address; + } ss0; + + struct { + unsigned int cbcr_pixel_offset_v_direction:2; + unsigned int picture_structure:2; + unsigned int width:14; + unsigned int height:14; + } ss1; + + struct { + unsigned int tile_walk:1; + unsigned int tiled_surface:1; + unsigned int half_pitch_for_chroma:1; + unsigned int pitch:18; + unsigned int pad0:1; + unsigned int surface_object_control_data:4; + unsigned int pad1:1; + unsigned int interleave_chroma:1; + unsigned int surface_format:4; + } ss2; + + struct { + unsigned int y_offset_for_cb:15; + unsigned int pad0:1; + unsigned int x_offset_for_cb:14; + unsigned int pad1:2; + } ss3; + + struct { + unsigned int y_offset_for_cr:15; + unsigned int pad0:1; + unsigned int x_offset_for_cr:14; + unsigned int pad1:2; + } ss4; + + struct { + unsigned int pad0; + } ss5; + + struct { + unsigned int pad0; + } ss6; + + struct { + unsigned int pad0; + } ss7; +}; + +#endif /* _I965_STRUCTS_H_ */ diff --git a/src/intel_batchbuffer.c b/src/intel_batchbuffer.c new file mode 100644 index 00000000..f310793c --- /dev/null +++ b/src/intel_batchbuffer.c @@ -0,0 +1,285 @@ +/************************************************************************** + * + * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +#include <stdlib.h> +#include <string.h> +#include <assert.h> + +#include <va/va_backend.h> + +#include "intel_batchbuffer.h" + +static void +intel_batchbuffer_reset(struct intel_batchbuffer *batch) +{ + struct intel_driver_data *intel = batch->intel; + int batch_size = BATCH_SIZE; + + assert(batch->flag == I915_EXEC_RENDER || + batch->flag == I915_EXEC_BLT || + batch->flag == I915_EXEC_BSD); + + dri_bo_unreference(batch->buffer); + batch->buffer = dri_bo_alloc(intel->bufmgr, + "batch buffer", + batch_size, + 0x1000); + assert(batch->buffer); + dri_bo_map(batch->buffer, 1); + assert(batch->buffer->virtual); + batch->map = batch->buffer->virtual; + batch->size = batch_size; + batch->ptr = batch->map; + batch->atomic = 0; +} + +static unsigned int +intel_batchbuffer_space(struct intel_batchbuffer *batch) +{ + return (batch->size - BATCH_RESERVED) - (batch->ptr - batch->map); +} + + +struct intel_batchbuffer * +intel_batchbuffer_new(struct intel_driver_data *intel, int flag) +{ + struct intel_batchbuffer *batch = calloc(1, sizeof(*batch)); + assert(flag == I915_EXEC_RENDER || + flag == I915_EXEC_BSD || + flag == I915_EXEC_BLT); + + batch->intel = intel; + batch->flag = flag; + batch->run = drm_intel_bo_mrb_exec; + intel_batchbuffer_reset(batch); + + return batch; +} + +void intel_batchbuffer_free(struct intel_batchbuffer *batch) +{ + if (batch->map) { + dri_bo_unmap(batch->buffer); + batch->map = NULL; + } + + dri_bo_unreference(batch->buffer); + free(batch); +} + +void +intel_batchbuffer_flush(struct intel_batchbuffer *batch) +{ + unsigned int used = batch->ptr - batch->map; + + if (used == 0) { + return; + } + + if ((used & 4) == 0) { + *(unsigned int*)batch->ptr = 0; + batch->ptr += 4; + } + + *(unsigned int*)batch->ptr = MI_BATCH_BUFFER_END; + batch->ptr += 4; + dri_bo_unmap(batch->buffer); + used = batch->ptr - batch->map; + batch->run(batch->buffer, used, 0, 0, 0, batch->flag); + intel_batchbuffer_reset(batch); +} + +void +intel_batchbuffer_emit_dword(struct intel_batchbuffer *batch, unsigned int x) +{ + assert(intel_batchbuffer_space(batch) >= 4); + *(unsigned int *)batch->ptr = x; + batch->ptr += 4; +} + +void +intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch, dri_bo *bo, + uint32_t read_domains, uint32_t write_domains, + uint32_t delta) +{ + assert(batch->ptr - batch->map < batch->size); + dri_bo_emit_reloc(batch->buffer, read_domains, write_domains, + delta, batch->ptr - batch->map, bo); + intel_batchbuffer_emit_dword(batch, bo->offset + delta); +} + +void +intel_batchbuffer_require_space(struct intel_batchbuffer *batch, + unsigned int size) +{ + assert(size < batch->size - 8); + + if (intel_batchbuffer_space(batch) < size) { + intel_batchbuffer_flush(batch); + } +} + +void +intel_batchbuffer_data(struct intel_batchbuffer *batch, + void *data, + unsigned int size) +{ + assert((size & 3) == 0); + intel_batchbuffer_require_space(batch, size); + + assert(batch->ptr); + memcpy(batch->ptr, data, size); + batch->ptr += size; +} + +void +intel_batchbuffer_emit_mi_flush(struct intel_batchbuffer *batch) +{ + struct intel_driver_data *intel = batch->intel; + + if (IS_GEN6(intel->device_id) || + IS_GEN7(intel->device_id)) { + if (batch->flag == I915_EXEC_RENDER) { + BEGIN_BATCH(batch, 4); + OUT_BATCH(batch, CMD_PIPE_CONTROL | 0x2); + + if (IS_GEN6(intel->device_id)) + OUT_BATCH(batch, + CMD_PIPE_CONTROL_WC_FLUSH | + CMD_PIPE_CONTROL_TC_FLUSH | + CMD_PIPE_CONTROL_NOWRITE); + else + OUT_BATCH(batch, + CMD_PIPE_CONTROL_WC_FLUSH | + CMD_PIPE_CONTROL_TC_FLUSH | + CMD_PIPE_CONTROL_DC_FLUSH | + CMD_PIPE_CONTROL_NOWRITE); + + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + } else { + if (batch->flag == I915_EXEC_BLT) { + BEGIN_BLT_BATCH(batch, 4); + OUT_BLT_BATCH(batch, MI_FLUSH_DW); + OUT_BLT_BATCH(batch, 0); + OUT_BLT_BATCH(batch, 0); + OUT_BLT_BATCH(batch, 0); + ADVANCE_BLT_BATCH(batch); + } else { + assert(batch->flag == I915_EXEC_BSD); + BEGIN_BCS_BATCH(batch, 4); + OUT_BCS_BATCH(batch, MI_FLUSH_DW | MI_FLUSH_DW_VIDEO_PIPELINE_CACHE_INVALIDATE); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); + } + } + } else { + if (batch->flag == I915_EXEC_RENDER) { + BEGIN_BATCH(batch, 1); + OUT_BATCH(batch, MI_FLUSH | MI_FLUSH_STATE_INSTRUCTION_CACHE_INVALIDATE); + ADVANCE_BATCH(batch); + } else { + assert(batch->flag == I915_EXEC_BSD); + BEGIN_BCS_BATCH(batch, 1); + OUT_BCS_BATCH(batch, MI_FLUSH | MI_FLUSH_STATE_INSTRUCTION_CACHE_INVALIDATE); + ADVANCE_BCS_BATCH(batch); + } + } +} + +void +intel_batchbuffer_begin_batch(struct intel_batchbuffer *batch, int total) +{ + batch->emit_total = total * 4; + batch->emit_start = batch->ptr; +} + +void +intel_batchbuffer_advance_batch(struct intel_batchbuffer *batch) +{ + assert(batch->emit_total == (batch->ptr - batch->emit_start)); +} + +void +intel_batchbuffer_check_batchbuffer_flag(struct intel_batchbuffer *batch, int flag) +{ + if (flag != I915_EXEC_RENDER && + flag != I915_EXEC_BLT && + flag != I915_EXEC_BSD) + return; + + if (batch->flag == flag) + return; + + intel_batchbuffer_flush(batch); + batch->flag = flag; +} + +int +intel_batchbuffer_check_free_space(struct intel_batchbuffer *batch, int size) +{ + return intel_batchbuffer_space(batch) >= size; +} + +static void +intel_batchbuffer_start_atomic_helper(struct intel_batchbuffer *batch, + int flag, + unsigned int size) +{ + assert(!batch->atomic); + intel_batchbuffer_check_batchbuffer_flag(batch, flag); + intel_batchbuffer_require_space(batch, size); + batch->atomic = 1; +} + +void +intel_batchbuffer_start_atomic(struct intel_batchbuffer *batch, unsigned int size) +{ + intel_batchbuffer_start_atomic_helper(batch, I915_EXEC_RENDER, size); +} + +void +intel_batchbuffer_start_atomic_blt(struct intel_batchbuffer *batch, unsigned int size) +{ + intel_batchbuffer_start_atomic_helper(batch, I915_EXEC_BLT, size); +} + +void +intel_batchbuffer_start_atomic_bcs(struct intel_batchbuffer *batch, unsigned int size) +{ + intel_batchbuffer_start_atomic_helper(batch, I915_EXEC_BSD, size); +} + +void +intel_batchbuffer_end_atomic(struct intel_batchbuffer *batch) +{ + assert(batch->atomic); + batch->atomic = 0; +} diff --git a/src/intel_batchbuffer.h b/src/intel_batchbuffer.h new file mode 100644 index 00000000..092da5af --- /dev/null +++ b/src/intel_batchbuffer.h @@ -0,0 +1,90 @@ +#ifndef _INTEL_BATCHBUFFER_H_ +#define _INTEL_BATCHBUFFER_H_ + +#include <xf86drm.h> +#include <drm.h> +#include <i915_drm.h> +#include <intel_bufmgr.h> + +#include "intel_driver.h" + +struct intel_batchbuffer +{ + struct intel_driver_data *intel; + dri_bo *buffer; + unsigned int size; + unsigned char *map; + unsigned char *ptr; + int atomic; + int flag; + + int emit_total; + unsigned char *emit_start; + + int (*run)(drm_intel_bo *bo, int used, + drm_clip_rect_t *cliprects, int num_cliprects, + int DR4, unsigned int ring_flag); +}; + +struct intel_batchbuffer *intel_batchbuffer_new(struct intel_driver_data *intel, int flag); +void intel_batchbuffer_free(struct intel_batchbuffer *batch); +void intel_batchbuffer_start_atomic(struct intel_batchbuffer *batch, unsigned int size); +void intel_batchbuffer_start_atomic_bcs(struct intel_batchbuffer *batch, unsigned int size); +void intel_batchbuffer_start_atomic_blt(struct intel_batchbuffer *batch, unsigned int size); +void intel_batchbuffer_end_atomic(struct intel_batchbuffer *batch); +void intel_batchbuffer_emit_dword(struct intel_batchbuffer *batch, unsigned int x); +void intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch, dri_bo *bo, + uint32_t read_domains, uint32_t write_domains, + uint32_t delta); +void intel_batchbuffer_require_space(struct intel_batchbuffer *batch, unsigned int size); +void intel_batchbuffer_data(struct intel_batchbuffer *batch, void *data, unsigned int size); +void intel_batchbuffer_emit_mi_flush(struct intel_batchbuffer *batch); +void intel_batchbuffer_flush(struct intel_batchbuffer *batch); +void intel_batchbuffer_begin_batch(struct intel_batchbuffer *batch, int total); +void intel_batchbuffer_advance_batch(struct intel_batchbuffer *batch); +void intel_batchbuffer_check_batchbuffer_flag(struct intel_batchbuffer *batch, int flag); +int intel_batchbuffer_check_free_space(struct intel_batchbuffer *batch, int size); + +#define __BEGIN_BATCH(batch, n, f) do { \ + assert(f == batch->flag); \ + intel_batchbuffer_check_batchbuffer_flag(batch, f); \ + intel_batchbuffer_require_space(batch, (n) * 4); \ + intel_batchbuffer_begin_batch(batch, (n)); \ + } while (0) + +#define __OUT_BATCH(batch, d) do { \ + intel_batchbuffer_emit_dword(batch, d); \ + } while (0) + +#define __OUT_RELOC(batch, bo, read_domains, write_domain, delta) do { \ + assert((delta) >= 0); \ + intel_batchbuffer_emit_reloc(batch, bo, \ + read_domains, write_domain, \ + delta); \ + } while (0) + +#define __ADVANCE_BATCH(batch) do { \ + intel_batchbuffer_advance_batch(batch); \ + } while (0) + +#define BEGIN_BATCH(batch, n) __BEGIN_BATCH(batch, n, I915_EXEC_RENDER) +#define BEGIN_BLT_BATCH(batch, n) __BEGIN_BATCH(batch, n, I915_EXEC_BLT) +#define BEGIN_BCS_BATCH(batch, n) __BEGIN_BATCH(batch, n, I915_EXEC_BSD) + + +#define OUT_BATCH(batch, d) __OUT_BATCH(batch, d) +#define OUT_BLT_BATCH(batch, d) __OUT_BATCH(batch, d) +#define OUT_BCS_BATCH(batch, d) __OUT_BATCH(batch, d) + +#define OUT_RELOC(batch, bo, read_domains, write_domain, delta) \ + __OUT_RELOC(batch, bo, read_domains, write_domain, delta) +#define OUT_BLT_RELOC(batch, bo, read_domains, write_domain, delta) \ + __OUT_RELOC(batch, bo, read_domains, write_domain, delta) +#define OUT_BCS_RELOC(batch, bo, read_domains, write_domain, delta) \ + __OUT_RELOC(batch, bo, read_domains, write_domain, delta) + +#define ADVANCE_BATCH(batch) __ADVANCE_BATCH(batch) +#define ADVANCE_BLT_BATCH(batch) __ADVANCE_BATCH(batch) +#define ADVANCE_BCS_BATCH(batch) __ADVANCE_BATCH(batch) + +#endif /* _INTEL_BATCHBUFFER_H_ */ diff --git a/src/intel_batchbuffer_dump.c b/src/intel_batchbuffer_dump.c new file mode 100644 index 00000000..99c2c1cf --- /dev/null +++ b/src/intel_batchbuffer_dump.c @@ -0,0 +1,771 @@ +#include <stdio.h> +#include <stdarg.h> +#include <string.h> +#include <inttypes.h> + +#include "intel_driver.h" +#include "intel_batchbuffer_dump.h" + +#define BUFFER_FAIL(_count, _len, _name) do { \ + fprintf(gout, "Buffer size too small in %s (%d < %d)\n", \ + (_name), (_count), (_len)); \ + (*failures)++; \ + return count; \ +} while (0) + +static FILE *gout; + +static void +instr_out(unsigned int *data, unsigned int offset, unsigned int index, char *fmt, ...) +{ + va_list va; + + fprintf(gout, "0x%08x: 0x%08x:%s ", offset + index * 4, data[index], + index == 0 ? "" : " "); + va_start(va, fmt); + vfprintf(gout, fmt, va); + va_end(va); +} + + +static int +dump_mi(unsigned int *data, unsigned int offset, int count, unsigned int device, int *failures) +{ + unsigned int opcode; + int length, i; + + struct { + unsigned int opcode; + int mask_length; + int min_len; + int max_len; + char *name; + } mi_commands[] = { + { 0x00, 0, 1, 1, "MI_NOOP" }, + { 0x04, 0, 1, 1, "MI_FLUSH" }, + { 0x0a, 0, 1, 1, "MI_BATCH_BUFFER_END" }, + { 0x26, 0x3f, 4, 5, "MI_FLUSH_DW" }, + }; + + opcode = ((data[0] & MASK_MI_OPCODE) >> SHIFT_MI_OPCODE); + + for (i = 0; i < sizeof(mi_commands) / sizeof(mi_commands[0]); i++) { + if (opcode == mi_commands[i].opcode) { + int index; + + length = 1; + instr_out(data, offset, 0, "%s\n", mi_commands[i].name); + + if (mi_commands[i].max_len > 1) { + length = (data[0] & mi_commands[i].mask_length) + 2; + + if (length < mi_commands[i].min_len || + length > mi_commands[i].max_len) { + fprintf(gout, "Bad length (%d) in %s, [%d, %d]\n", + length, mi_commands[i].name, + mi_commands[i].min_len, + mi_commands[i].max_len); + } + } + + for (index = 1; index < length; index++) { + if (index >= count) + BUFFER_FAIL(count, length, mi_commands[i].name); + + instr_out(data, offset, index, "dword %d\n", index); + } + + return length; + } + } + + instr_out(data, offset, 0, "UNKNOWN MI COMMAND\n"); + (*failures)++; + return 1; +} + +static int +dump_gfxpipe_3d(unsigned int *data, unsigned int offset, int count, unsigned int device, int *failures) +{ + instr_out(data, offset, 0, "UNKNOWN 3D COMMAND\n"); + (*failures)++; + + return 1; +} + +static void +dump_avc_bsd_img_state(unsigned int *data, unsigned int offset, unsigned int device, int *failures) +{ + int img_struct = ((data[3] >> 8) & 0x3); + + instr_out(data, offset, 1, "frame size: %d\n", (data[1] & 0xffff)); + instr_out(data, offset, 2, "width: %d, height: %d\n", (data[2] & 0xff), (data[2] >> 16) & 0xff); + instr_out(data, offset, 3, + "second_chroma_qp_offset: %d," + "chroma_qp_offset: %d," + "QM present flag: %d," + "image struct: %s," + "img_dec_fs_idc: %d," + "\n", + (data[3] >> 24) & 0x1f, + (data[3] >> 16) & 0x1f, + (data[3] >> 10) & 0x1, + (img_struct == 0) ? "frame" : (img_struct == 2) ? "invalid" : (img_struct == 1) ? "top field" : "bottom field", + data[3] & 0xff); + instr_out(data, offset, 4, + "residual off: 0x%x," + "16MV: %d," + "chroma fmt: %d," + "CABAC: %d," + "non-ref: %d," + "constrained intra: %d," + "direct8x8: %d," + "trans8x8: %d," + "MB only: %d," + "MBAFF: %d," + "\n", + (data[4] >> 24) & 0xff, + (data[4] >> 12) & 0x1, + (data[4] >> 10) & 0x3, + (data[4] >> 7) & 0x1, + (data[4] >> 6) & 0x1, + (data[4] >> 5) & 0x1, + (data[4] >> 4) & 0x1, + (data[4] >> 3) & 0x1, + (data[4] >> 2) & 0x1, + (data[4] >> 1) & 0x1); + instr_out(data, offset, 5, "AVC-IT Command Header\n"); +} + +static void +dump_avc_bsd_qm_state(unsigned int *data, unsigned int offset, unsigned int device, int *failures) +{ + unsigned int length = ((data[0] & MASK_GFXPIPE_LENGTH) >> SHIFT_GFXPIPE_LENGTH) + 2; + int i; + + instr_out(data, offset, 1, "user default: %02x, QM list present: %02x\n", + (data[1] >> 8) & 0xff, data[1] & 0xff); + + for (i = 2; i < length; i++) { + instr_out(data, offset, i, "dword %d\n", i); + } +} + +static void +dump_avc_bsd_slice_state(unsigned int *data, unsigned int offset, unsigned int device, int *failures) +{ + +} + +static void +dump_avc_bsd_buf_base_state(unsigned int *data, unsigned int offset, unsigned int device, int *failures) +{ + int i; + + instr_out(data, offset, 1, "BSD row store base address\n"); + instr_out(data, offset, 2, "MPR row store base address\n"); + instr_out(data, offset, 3, "AVC-IT command buffer base address\n"); + instr_out(data, offset, 4, "AVC-IT data buffer: 0x%08x, write offset: 0x%x\n", + data[4] & 0xFFFFF000, data[4] & 0xFC0); + instr_out(data, offset, 5, "ILDB data buffer\n"); + + for (i = 6; i < 38; i++) { + instr_out(data, offset, i, "Direct MV read base address for reference frame %d\n", i - 6); + } + + instr_out(data, offset, 38, "direct mv wr0 top\n"); + instr_out(data, offset, 39, "direct mv wr0 bottom\n"); + + for (i = 40; i < 74; i++) { + instr_out(data, offset, i, "POC List %d\n", i - 40); + } +} + +static void +dump_bsd_ind_obj_base_addr(unsigned int *data, unsigned int offset, unsigned int device, int *failures) +{ + instr_out(data, offset, 1, "AVC indirect object base address\n"); + instr_out(data, offset, 2, "AVC Indirect Object Access Upper Bound\n"); +} + +static void +dump_ironlake_avc_bsd_object(unsigned int *data, unsigned int offset, int *failures) +{ + int slice_type = data[3] & 0xf; + int i, is_phantom = ((data[1] & 0x3fffff) == 0); + + if (!is_phantom) { + instr_out(data, offset, 1, "Encrypted: %d, bitsteam length: %d\n", data[1] >> 31, data[1] & 0x3fffff); + instr_out(data, offset, 2, "Indirect Data Start Address: %d\n", data[2] & 0x1fffffff); + instr_out(data, offset, 3, "%s Slice\n", slice_type == 0 ? "P" : slice_type == 1 ? "B" : "I"); + instr_out(data, offset, 4, + "Num_Ref_Idx_L1: %d," + "Num_Ref_Idx_L0: %d," + "Log2WeightDenomChroma: %d," + "Log2WeightDenomLuma: %d" + "\n", + (data[4] >> 24) & 0x3f, + (data[4] >> 16) & 0x3f, + (data[4] >> 8) & 0x3, + (data[4] >> 0) & 0x3); + instr_out(data, offset, 5, + "WeightedPredIdc: %d," + "DirectPredType: %d," + "DisableDeblockingFilter: %d," + "CabacInitIdc: %d," + "SliceQp: %d," + "SliceBetaOffsetDiv2: %d," + "SliceAlphaC0OffsetDiv2: %d" + "\n", + (data[5] >> 30) & 0x3, + (data[5] >> 29) & 0x1, + (data[5] >> 27) & 0x3, + (data[5] >> 24) & 0x3, + (data[5] >> 16) & 0x3f, + (data[5] >> 8) & 0xf, + (data[5] >> 0) & 0xf); + instr_out(data, offset, 6, + "Slice_MB_Start_Vert_Pos: %d," + "Slice_MB_Start_Hor_Pos: %d," + "Slice_Start_Mb_Num: %d" + "\n", + (data[6] >> 24) & 0xff, + (data[6] >> 16) & 0xff, + (data[6] >> 0) & 0x7fff); + instr_out(data, offset, 7, + "Fix_Prev_Mb_Skipped: %d," + "First_MB_Bit_Offset: %d" + "\n", + (data[7] >> 7) & 0x1, + (data[7] >> 0) & 0x7); + + for (i = 8; i < 16; i++) + instr_out(data, offset, i, "dword %d\n", i); + } else { + instr_out(data, offset, 1, "phantom slice\n"); + + for (i = 2; i < 6; i++) + instr_out(data, offset, i, "dword %d\n", i); + + instr_out(data, offset, 6, + "Slice_Start_Mb_Num: %d" + "\n", + (data[6] >> 0) & 0x7fff); + + for (i = 7; i < 16; i++) + instr_out(data, offset, i, "dword %d\n", i); + + } +} + +static void +dump_g4x_avc_bsd_object(unsigned int *data, unsigned int offset, int *failures) +{ + +} + +static void +dump_avc_bsd_object(unsigned int *data, unsigned int offset, unsigned int device, int *failures) +{ + if (IS_IRONLAKE(device)) + dump_ironlake_avc_bsd_object(data, offset, failures); + else + dump_g4x_avc_bsd_object(data, offset, failures); +} + +static int +dump_bsd_avc(unsigned int *data, unsigned int offset, int count, unsigned int device, int *failures) +{ + unsigned int subopcode; + int length, i; + + struct { + unsigned int subopcode; + int min_len; + int max_len; + char *name; + void (*detail)(unsigned int *data, unsigned int offset, unsigned int device, int *failures); + } avc_commands[] = { + { 0x00, 0x06, 0x06, "AVC_BSD_IMG_STATE", dump_avc_bsd_img_state }, + { 0x01, 0x02, 0x3a, "AVC_BSD_QM_STATE", dump_avc_bsd_qm_state }, + { 0x02, 0x02, 0xd2, "AVC_BSD_SLICE_STATE", NULL }, + { 0x03, 0x4a, 0x4a, "AVC_BSD_BUF_BASE_STATE", dump_avc_bsd_buf_base_state }, + { 0x04, 0x03, 0x03, "BSD_IND_OBJ_BASE_ADDR", dump_bsd_ind_obj_base_addr }, + { 0x08, 0x08, 0x10, "AVC_BSD_OBJECT", dump_avc_bsd_object }, + }; + + subopcode = ((data[0] & MASK_GFXPIPE_SUBOPCODE) >> SHIFT_GFXPIPE_SUBOPCODE); + + for (i = 0; i < sizeof(avc_commands) / sizeof(avc_commands[0]); i++) { + if (subopcode == avc_commands[i].subopcode) { + unsigned int index; + + length = (data[0] & MASK_GFXPIPE_LENGTH) >> SHIFT_GFXPIPE_LENGTH; + length += 2; + instr_out(data, offset, 0, "%s\n", avc_commands[i].name); + + if (length < avc_commands[i].min_len || + length > avc_commands[i].max_len) { + fprintf(gout, "Bad length(%d) in %s [%d, %d]\n", + length, avc_commands[i].name, + avc_commands[i].min_len, + avc_commands[i].max_len); + } + + if (length - 1 >= count) + BUFFER_FAIL(count, length, avc_commands[i].name); + + if (avc_commands[i].detail) + avc_commands[i].detail(data, offset, device, failures); + else { + for (index = 1; index < length; index++) + instr_out(data, offset, index, "dword %d\n", index); + } + + return length; + } + } + + instr_out(data, offset, 0, "UNKNOWN AVC COMMAND\n"); + (*failures)++; + return 1; +} + +static int +dump_gfxpipe_bsd(unsigned int *data, unsigned int offset, int count, unsigned int device, int *failures) +{ + int length; + + switch ((data[0] & MASK_GFXPIPE_OPCODE) >> SHIFT_GFXPIPE_OPCODE) { + case OPCODE_BSD_AVC: + length = dump_bsd_avc(data, offset, count, device, failures); + break; + + default: + length = 1; + (*failures)++; + instr_out(data, offset, 0, "UNKNOWN BSD OPCODE\n"); + break; + } + + return length; +} + +static void +dump_mfx_mode_select(unsigned int *data, unsigned int offset, unsigned int device, int *failures) +{ + instr_out(data, offset, 1, + "decoder mode: %d(%s)," + "post deblocking output enable %d," + "pre deblocking output enable %d," + "codec select: %d(%s)," + "standard select: %d(%s)" + "\n", + (data[1] >> 16) & 0x1, ((data[1] >> 16) & 0x1) ? "IT" : "VLD", + (data[1] >> 9) & 0x1, + (data[1] >> 8) & 0x1, + (data[1] >> 4) & 0x1, ((data[1] >> 4) & 0x1) ? "Encode" : "Decode", + (data[1] >> 0) & 0x3, ((data[1] >> 0) & 0x3) == 0 ? "MPEG2" : + ((data[1] >> 0) & 0x3) == 1 ? "VC1" : + ((data[1] >> 0) & 0x3) == 2 ? "AVC" : "Reserved"); + instr_out(data, offset, 2, "dword 02\n"); + instr_out(data, offset, 3, "dword 03\n"); +} + +static void +dump_mfx_surface_state(unsigned int *data, unsigned int offset, unsigned int device, int *failures) +{ + instr_out(data, offset, 1, "dword 01\n"); + instr_out(data, offset, 2, "dword 02\n"); + instr_out(data, offset, 3, "dword 03\n"); + instr_out(data, offset, 4, "dword 04\n"); + instr_out(data, offset, 5, "dword 05\n"); +} + +static void +dump_mfx_pipe_buf_addr_state(unsigned int *data, unsigned int offset, unsigned int device, int *failures) +{ + instr_out(data, offset, 1, "dword 01\n"); + instr_out(data, offset, 2, "dword 02\n"); + instr_out(data, offset, 3, "dword 03\n"); + instr_out(data, offset, 4, "dword 04\n"); + instr_out(data, offset, 5, "dword 05\n"); + instr_out(data, offset, 6, "dword 06\n"); + instr_out(data, offset, 7, "dword 07\n"); + instr_out(data, offset, 8, "dword 08\n"); + instr_out(data, offset, 9, "dword 09\n"); + instr_out(data, offset, 10, "dword 10\n"); + instr_out(data, offset, 11, "dword 11\n"); + instr_out(data, offset, 12, "dword 12\n"); + instr_out(data, offset, 13, "dword 13\n"); + instr_out(data, offset, 14, "dword 14\n"); + instr_out(data, offset, 15, "dword 15\n"); + instr_out(data, offset, 16, "dword 16\n"); + instr_out(data, offset, 17, "dword 17\n"); + instr_out(data, offset, 18, "dword 18\n"); + instr_out(data, offset, 19, "dword 19\n"); + instr_out(data, offset, 20, "dword 20\n"); + instr_out(data, offset, 21, "dword 21\n"); + instr_out(data, offset, 22, "dword 22\n"); + instr_out(data, offset, 24, "dword 23\n"); +} + +static void +dump_mfx_ind_obj_base_addr_state(unsigned int *data, unsigned int offset, unsigned int device, int *failures) +{ + instr_out(data, offset, 1, "dword 01\n"); + instr_out(data, offset, 2, "dword 02\n"); + instr_out(data, offset, 3, "dword 03\n"); + instr_out(data, offset, 4, "dword 04\n"); + instr_out(data, offset, 5, "dword 05\n"); + instr_out(data, offset, 6, "dword 06\n"); + instr_out(data, offset, 7, "dword 07\n"); + instr_out(data, offset, 8, "dword 08\n"); + instr_out(data, offset, 9, "dword 09\n"); + instr_out(data, offset, 10, "dword 10\n"); +} + +static void +dump_mfx_bsp_buf_base_addr_state(unsigned int *data, unsigned int offset, unsigned int device, int *failures) +{ + instr_out(data, offset, 1, "dword 01\n"); + instr_out(data, offset, 2, "dword 02\n"); + instr_out(data, offset, 3, "dword 03\n"); +} + +static void +dump_mfx_aes_state(unsigned int *data, unsigned int offset, unsigned int device, int *failures) +{ + instr_out(data, offset, 1, "dword 01\n"); + instr_out(data, offset, 2, "dword 02\n"); + instr_out(data, offset, 3, "dword 03\n"); + instr_out(data, offset, 4, "dword 04\n"); + instr_out(data, offset, 5, "dword 05\n"); + instr_out(data, offset, 6, "dword 06\n"); +} + +static void +dump_mfx_state_pointer(unsigned int *data, unsigned int offset, unsigned int device, int *failures) +{ + instr_out(data, offset, 1, "dword 01\n"); +} + +static int +dump_mfx_common(unsigned int *data, unsigned int offset, int count, unsigned int device, int *failures) +{ + unsigned int subopcode; + int length, i; + + struct { + unsigned int subopcode; + int min_len; + int max_len; + char *name; + void (*detail)(unsigned int *data, unsigned int offset, unsigned int device, int *failures); + } mfx_common_commands[] = { + { SUBOPCODE_MFX(0, 0), 0x04, 0x04, "MFX_PIPE_MODE_SELECT", dump_mfx_mode_select }, + { SUBOPCODE_MFX(0, 1), 0x06, 0x06, "MFX_SURFACE_STATE", dump_mfx_surface_state }, + { SUBOPCODE_MFX(0, 2), 0x18, 0x18, "MFX_PIPE_BUF_ADDR_STATE", dump_mfx_pipe_buf_addr_state }, + { SUBOPCODE_MFX(0, 3), 0x0b, 0x0b, "MFX_IND_OBJ_BASE_ADDR_STATE", dump_mfx_ind_obj_base_addr_state }, + { SUBOPCODE_MFX(0, 4), 0x04, 0x04, "MFX_BSP_BUF_BASE_ADDR_STATE", dump_mfx_bsp_buf_base_addr_state }, + { SUBOPCODE_MFX(0, 5), 0x07, 0x07, "MFX_AES_STATE", dump_mfx_aes_state }, + { SUBOPCODE_MFX(0, 6), 0x00, 0x00, "MFX_STATE_POINTER", dump_mfx_state_pointer }, + }; + + subopcode = ((data[0] & MASK_GFXPIPE_SUBOPCODE) >> SHIFT_GFXPIPE_SUBOPCODE); + + for (i = 0; i < ARRAY_ELEMS(mfx_common_commands); i++) { + if (subopcode == mfx_common_commands[i].subopcode) { + unsigned int index; + + length = (data[0] & MASK_GFXPIPE_LENGTH) >> SHIFT_GFXPIPE_LENGTH; + length += 2; + instr_out(data, offset, 0, "%s\n", mfx_common_commands[i].name); + + if (length < mfx_common_commands[i].min_len || + length > mfx_common_commands[i].max_len) { + fprintf(gout, "Bad length(%d) in %s [%d, %d]\n", + length, mfx_common_commands[i].name, + mfx_common_commands[i].min_len, + mfx_common_commands[i].max_len); + } + + if (length - 1 >= count) + BUFFER_FAIL(count, length, mfx_common_commands[i].name); + + if (mfx_common_commands[i].detail) + mfx_common_commands[i].detail(data, offset, device, failures); + else { + for (index = 1; index < length; index++) + instr_out(data, offset, index, "dword %d\n", index); + } + + return length; + } + } + + instr_out(data, offset, 0, "UNKNOWN MFX COMMON COMMAND\n"); + (*failures)++; + return 1; +} + +static void +dump_mfx_avc_img_state(unsigned int *data, unsigned int offset, unsigned int device, int *failures) +{ + instr_out(data, offset, 1, "dword 01\n"); + instr_out(data, offset, 2, "dword 02\n"); + instr_out(data, offset, 3, "dword 03\n"); + instr_out(data, offset, 4, "dword 04\n"); + instr_out(data, offset, 5, "dword 05\n"); + instr_out(data, offset, 6, "dword 06\n"); + instr_out(data, offset, 7, "dword 07\n"); + instr_out(data, offset, 8, "dword 08\n"); + instr_out(data, offset, 9, "dword 09\n"); + instr_out(data, offset, 10, "dword 10\n"); + instr_out(data, offset, 11, "dword 11\n"); + instr_out(data, offset, 12, "dword 12\n"); +} + +static void +dump_mfx_avc_qm_state(unsigned int *data, unsigned int offset, unsigned int device, int *failures) +{ + unsigned int length = ((data[0] & MASK_GFXPIPE_LENGTH) >> SHIFT_GFXPIPE_LENGTH) + 2; + int i; + + instr_out(data, offset, 1, "user default: %02x, QM list present: %02x\n", + (data[1] >> 8) & 0xff, data[1] & 0xff); + + for (i = 2; i < length; i++) { + instr_out(data, offset, i, "dword %d\n", i); + } +} + +static void +dump_mfx_avc_directmode_state(unsigned int *data, unsigned int offset, unsigned int device, int *failures) +{ + int i; + + for (i = 1; i < 33; i++) { + instr_out(data, offset, i, "Direct MV Buffer Base Address for Picture %d\n", i - 1); + } + + for (i = 33; i < 35; i++) { + instr_out(data, offset, i, "Direct MV Buffer Base Address for Current Decoding Frame/Field\n"); + } + + for (i = 35; i < 69; i++) { + instr_out(data, offset, i, "POC List\n"); + } +} + +static void +dump_mfx_avc_slice_state(unsigned int *data, unsigned int offset, unsigned int device, int *failures) +{ + instr_out(data, offset, 1, "dword 01\n"); + instr_out(data, offset, 2, "dword 02\n"); + instr_out(data, offset, 3, "dword 03\n"); + instr_out(data, offset, 4, "dword 04\n"); + instr_out(data, offset, 5, "dword 05\n"); + instr_out(data, offset, 6, "dword 06\n"); + instr_out(data, offset, 7, "dword 07\n"); + instr_out(data, offset, 8, "dword 08\n"); + instr_out(data, offset, 9, "dword 09\n"); +} + +static void +dump_mfx_avc_ref_idx_state(unsigned int *data, unsigned int offset, unsigned int device, int *failures) +{ + instr_out(data, offset, 1, "dword 01\n"); + instr_out(data, offset, 2, "dword 02\n"); + instr_out(data, offset, 3, "dword 03\n"); + instr_out(data, offset, 4, "dword 04\n"); + instr_out(data, offset, 5, "dword 05\n"); + instr_out(data, offset, 6, "dword 06\n"); + instr_out(data, offset, 7, "dword 07\n"); + instr_out(data, offset, 8, "dword 08\n"); + instr_out(data, offset, 9, "dword 09\n"); +} + +static void +dump_mfx_avc_weightoffset_state(unsigned int *data, unsigned int offset, unsigned int device, int *failures) +{ + int i; + + instr_out(data, offset, 1, + "Weight and Offset L%d table\n", + (data[1] >> 0) & 0x1); + + for (i = 2; i < 31; i++) { + instr_out(data, offset, i, "dword %d\n", i); + } +} + +static void +dump_mfd_bsd_object(unsigned int *data, unsigned int offset, unsigned int device, int *failures) +{ + int is_phantom_slice = ((data[1] & 0x3fffff) == 0); + + if (is_phantom_slice) { + instr_out(data, offset, 1, "phantom slice\n"); + instr_out(data, offset, 2, "dword 02\n"); + instr_out(data, offset, 3, "dword 03\n"); + instr_out(data, offset, 4, "dword 04\n"); + instr_out(data, offset, 5, "dword 05\n"); + } else { + instr_out(data, offset, 1, "Indirect BSD Data Length: %d\n", data[1] & 0x3fffff); + instr_out(data, offset, 2, "Indirect BSD Data Start Address: 0x%08x\n", data[2] & 0x1fffffff); + instr_out(data, offset, 3, "dword 03\n"); + instr_out(data, offset, 4, + "First_MB_Byte_Offset of Slice Data from Slice Header: 0x%08x," + "slice header skip mode: %d" + "\n", + (data[4] >> 16), + (data[4] >> 6) & 0x1); + instr_out(data, offset, 5, "dword 05\n"); + } +} + +static int +dump_mfx_avc(unsigned int *data, unsigned int offset, int count, unsigned int device, int *failures) +{ + unsigned int subopcode; + int length, i; + + struct { + unsigned int subopcode; + int min_len; + int max_len; + char *name; + void (*detail)(unsigned int *data, unsigned int offset, unsigned int device, int *failures); + } mfx_avc_commands[] = { + { SUBOPCODE_MFX(0, 0), 0x0d, 0x0d, "MFX_AVC_IMG_STATE", dump_mfx_avc_img_state }, + { SUBOPCODE_MFX(0, 1), 0x02, 0x3a, "MFX_AVC_QM_STATE", dump_mfx_avc_qm_state }, + { SUBOPCODE_MFX(0, 2), 0x45, 0x45, "MFX_AVC_DIRECTMODE_STATE", dump_mfx_avc_directmode_state }, + { SUBOPCODE_MFX(0, 3), 0x0b, 0x0b, "MFX_AVC_SLICE_STATE", dump_mfx_avc_slice_state }, + { SUBOPCODE_MFX(0, 4), 0x0a, 0x0a, "MFX_AVC_REF_IDX_STATE", dump_mfx_avc_ref_idx_state }, + { SUBOPCODE_MFX(0, 5), 0x32, 0x32, "MFX_AVC_WEIGHTOFFSET_STATE", dump_mfx_avc_weightoffset_state }, + { SUBOPCODE_MFX(1, 8), 0x06, 0x06, "MFD_AVC_BSD_OBJECT", dump_mfd_bsd_object }, + }; + + subopcode = ((data[0] & MASK_GFXPIPE_SUBOPCODE) >> SHIFT_GFXPIPE_SUBOPCODE); + + for (i = 0; i < ARRAY_ELEMS(mfx_avc_commands); i++) { + if (subopcode == mfx_avc_commands[i].subopcode) { + unsigned int index; + + length = (data[0] & MASK_GFXPIPE_LENGTH) >> SHIFT_GFXPIPE_LENGTH; + length += 2; + instr_out(data, offset, 0, "%s\n", mfx_avc_commands[i].name); + + if (length < mfx_avc_commands[i].min_len || + length > mfx_avc_commands[i].max_len) { + fprintf(gout, "Bad length(%d) in %s [%d, %d]\n", + length, mfx_avc_commands[i].name, + mfx_avc_commands[i].min_len, + mfx_avc_commands[i].max_len); + } + + if (length - 1 >= count) + BUFFER_FAIL(count, length, mfx_avc_commands[i].name); + + if (mfx_avc_commands[i].detail) + mfx_avc_commands[i].detail(data, offset, device, failures); + else { + for (index = 1; index < length; index++) + instr_out(data, offset, index, "dword %d\n", index); + } + + return length; + } + } + + instr_out(data, offset, 0, "UNKNOWN MFX AVC COMMAND\n"); + (*failures)++; + return 1; +} + +static int +dump_gfxpipe_mfx(unsigned int *data, unsigned int offset, int count, unsigned int device, int *failures) +{ + int length; + + switch ((data[0] & MASK_GFXPIPE_OPCODE) >> SHIFT_GFXPIPE_OPCODE) { + case OPCODE_MFX_COMMON: + length = dump_mfx_common(data, offset, count, device, failures); + break; + + case OPCODE_MFX_AVC: + length = dump_mfx_avc(data, offset, count, device, failures); + break; + + default: + length = 1; + (*failures)++; + instr_out(data, offset, 0, "UNKNOWN MFX OPCODE\n"); + break; + } + + return length; +} + +static int +dump_gfxpipe(unsigned int *data, unsigned int offset, int count, unsigned int device, int *failures) +{ + int length; + + switch ((data[0] & MASK_GFXPIPE_SUBTYPE) >> SHIFT_GFXPIPE_SUBTYPE) { + case GFXPIPE_3D: + length = dump_gfxpipe_3d(data, offset, count, device, failures); + break; + + case GFXPIPE_BSD: + if (IS_GEN6(device)) + length = dump_gfxpipe_mfx(data, offset, count, device, failures); + else + length = dump_gfxpipe_bsd(data, offset, count, device, failures); + + break; + + default: + length = 1; + (*failures)++; + instr_out(data, offset, 0, "UNKNOWN GFXPIPE COMMAND\n"); + break; + } + + return length; +} + +int intel_batchbuffer_dump(unsigned int *data, unsigned int offset, int count, unsigned int device) +{ + int index = 0; + int failures = 0; + + gout = fopen("/tmp/bsd_command_dump.txt", "w+"); + + while (index < count) { + switch ((data[index] & MASK_CMD_TYPE) >> SHIFT_CMD_TYPE) { + case CMD_TYPE_MI: + index += dump_mi(data + index, offset + index * 4, + count - index, device, &failures); + break; + + case CMD_TYPE_GFXPIPE: + index += dump_gfxpipe(data + index, offset + index * 4, + count - index, device, &failures); + break; + + default: + instr_out(data, offset, index, "UNKNOWN COMMAND\n"); + failures++; + index++; + break; + } + + fflush(gout); + } + + fclose(gout); + + return failures; +} diff --git a/src/intel_batchbuffer_dump.h b/src/intel_batchbuffer_dump.h new file mode 100644 index 00000000..e76b4f74 --- /dev/null +++ b/src/intel_batchbuffer_dump.h @@ -0,0 +1,55 @@ +#ifndef _INTEL_BATCHBUFFER_DUMP_H_ +#define _INTEL_BATCHBUFFER_DUMP_H_ + +#define MASK_CMD_TYPE 0xE0000000 + +#define SHIFT_CMD_TYPE 29 + +#define CMD_TYPE_GFXPIPE 3 +#define CMD_TYPE_BLT 2 +#define CMD_TYPE_MI 0 + + +/* GFXPIPE */ +#define MASK_GFXPIPE_SUBTYPE 0x18000000 +#define MASK_GFXPIPE_OPCODE 0x07000000 +#define MASK_GFXPIPE_SUBOPCODE 0x00FF0000 +#define MASK_GFXPIPE_LENGTH 0x0000FFFF + +#define SHIFT_GFXPIPE_SUBTYPE 27 +#define SHIFT_GFXPIPE_OPCODE 24 +#define SHIFT_GFXPIPE_SUBOPCODE 16 +#define SHIFT_GFXPIPE_LENGTH 0 + +/* 3D */ +#define GFXPIPE_3D 3 + +/* BSD */ +#define GFXPIPE_BSD 2 + +#define OPCODE_BSD_AVC 4 + +#define SUBOPCODE_BSD_IMG 0 +#define SUBOPCODE_BSD_QM 1 +#define SUBOPCODE_BSD_SLICE 2 +#define SUBOPCODE_BSD_BUF_BASE 3 +#define SUBOPCODE_BSD_IND_OBJ 4 +#define SUBOPCODE_BSD_OBJECT 8 + +/* MFX */ +#define OPCODE_MFX_COMMON 0 +#define OPCODE_MFX_AVC 1 + +#define SUBOPCODE_MFX(A, B) ((A) << 5 | (B)) + +/* MI */ +#define MASK_MI_OPCODE 0x1F800000 + +#define SHIFT_MI_OPCODE 23 + +#define OPCODE_MI_FLUSH 0x04 +#define OPCODE_MI_BATCH_BUFFER_END 0x0A + +int intel_batchbuffer_dump(unsigned int *data, unsigned int offset, int count, unsigned int device); + +#endif /* _INTEL_BATCHBUFFER_DUMP_H_ */ diff --git a/src/intel_compiler.h b/src/intel_compiler.h new file mode 100644 index 00000000..e1c3bd2a --- /dev/null +++ b/src/intel_compiler.h @@ -0,0 +1,26 @@ +#ifndef _INTEL_COMPILER_H_ +#define _INTEL_COMPILER_H_ + +/** + * Function inlining + */ +#if defined(__GNUC__) +# define INLINE __inline__ +#elif (__STDC_VERSION__ >= 199901L) /* C99 */ +# define INLINE inline +#else +# define INLINE +#endif + +/** + * Function visibility + */ +#if defined(__GNUC__) +# define DLL_HIDDEN __attribute__((visibility("hidden"))) +# define DLL_EXPORT __attribute__((visibility("default"))) +#else +# define DLL_HIDDEN +# define DLL_EXPORT +#endif + +#endif /* _INTEL_COMPILER_H_ */ diff --git a/src/intel_driver.c b/src/intel_driver.c new file mode 100644 index 00000000..5ccdfa58 --- /dev/null +++ b/src/intel_driver.c @@ -0,0 +1,135 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao <haihao.xiang@intel.com> + * Zou Nan hai <nanhai.zou@intel.com> + * + */ + +#include <assert.h> + +#include "va_dricommon.h" + +#include "intel_batchbuffer.h" +#include "intel_memman.h" +#include "intel_driver.h" + +static Bool +intel_driver_get_param(struct intel_driver_data *intel, int param, int *value) +{ + struct drm_i915_getparam gp; + + gp.param = param; + gp.value = value; + + return drmCommandWriteRead(intel->fd, DRM_I915_GETPARAM, &gp, sizeof(gp)) == 0; +} + +Bool +intel_driver_init(VADriverContextP ctx) +{ + struct intel_driver_data *intel = intel_driver_data(ctx); + struct dri_state *dri_state = (struct dri_state *)ctx->dri_state; + int has_exec2, has_bsd, has_blt; + + assert(dri_state); + assert(dri_state->driConnectedFlag == VA_DRI2 || + dri_state->driConnectedFlag == VA_DRI1); + + intel->fd = dri_state->fd; + intel->dri2Enabled = (dri_state->driConnectedFlag == VA_DRI2); + + if (!intel->dri2Enabled) { + drm_sarea_t *pSAREA; + + pSAREA = (drm_sarea_t *)dri_state->pSAREA; + intel->hHWContext = dri_state->hwContext; + intel->driHwLock = (drmLock *)(&pSAREA->lock); + intel->pPrivSarea = (void *)pSAREA + sizeof(drm_sarea_t); + } + + intel->locked = 0; + pthread_mutex_init(&intel->ctxmutex, NULL); + + intel_driver_get_param(intel, I915_PARAM_CHIPSET_ID, &intel->device_id); + if (intel_driver_get_param(intel, I915_PARAM_HAS_EXECBUF2, &has_exec2)) + intel->has_exec2 = has_exec2; + if (intel_driver_get_param(intel, I915_PARAM_HAS_BSD, &has_bsd)) + intel->has_bsd = has_bsd; + if (intel_driver_get_param(intel, I915_PARAM_HAS_BLT, &has_blt)) + intel->has_blt = has_blt; + + intel_memman_init(intel); + return True; +} + +Bool +intel_driver_terminate(VADriverContextP ctx) +{ + struct intel_driver_data *intel = intel_driver_data(ctx); + + intel_memman_terminate(intel); + pthread_mutex_destroy(&intel->ctxmutex); + + return True; +} + +void +intel_lock_hardware(VADriverContextP ctx) +{ + struct intel_driver_data *intel = intel_driver_data(ctx); + char __ret = 0; + + PPTHREAD_MUTEX_LOCK(); + + assert(!intel->locked); + + if (!intel->dri2Enabled) { + DRM_CAS(intel->driHwLock, + intel->hHWContext, + (DRM_LOCK_HELD|intel->hHWContext), + __ret); + + if (__ret) { + drmGetLock(intel->fd, intel->hHWContext, 0); + } + } + + intel->locked = 1; +} + +void +intel_unlock_hardware(VADriverContextP ctx) +{ + struct intel_driver_data *intel = intel_driver_data(ctx); + + if (!intel->dri2Enabled) { + DRM_UNLOCK(intel->fd, + intel->driHwLock, + intel->hHWContext); + } + + intel->locked = 0; + PPTHREAD_MUTEX_UNLOCK(); +} diff --git a/src/intel_driver.h b/src/intel_driver.h new file mode 100644 index 00000000..e31360df --- /dev/null +++ b/src/intel_driver.h @@ -0,0 +1,186 @@ +#ifndef _INTEL_DRIVER_H_ +#define _INTEL_DRIVER_H_ + +#include <pthread.h> +#include <signal.h> + +#include <xf86drm.h> +#include <drm.h> +#include <i915_drm.h> +#include <intel_bufmgr.h> + +#include <va/va_backend.h> + +#include "intel_compiler.h" + +#define BATCH_SIZE 0x80000 +#define BATCH_RESERVED 0x10 + +#define CMD_MI (0x0 << 29) +#define CMD_2D (0x2 << 29) +#define CMD_3D (0x3 << 29) + +#define MI_NOOP (CMD_MI | 0) + +#define MI_BATCH_BUFFER_END (CMD_MI | (0xA << 23)) +#define MI_BATCH_BUFFER_START (CMD_MI | (0x31 << 23)) + +#define MI_FLUSH (CMD_MI | (0x4 << 23)) +#define MI_FLUSH_STATE_INSTRUCTION_CACHE_INVALIDATE (0x1 << 0) + +#define MI_FLUSH_DW (CMD_MI | (0x26 << 23) | 0x2) +#define MI_FLUSH_DW_VIDEO_PIPELINE_CACHE_INVALIDATE (0x1 << 7) + +#define XY_COLOR_BLT_CMD (CMD_2D | (0x50 << 22) | 0x04) +#define XY_COLOR_BLT_WRITE_ALPHA (1 << 21) +#define XY_COLOR_BLT_WRITE_RGB (1 << 20) +#define XY_COLOR_BLT_DST_TILED (1 << 11) + +/* BR13 */ +#define BR13_565 (0x1 << 24) +#define BR13_8888 (0x3 << 24) + +#define CMD_PIPE_CONTROL (CMD_3D | (3 << 27) | (2 << 24) | (0 << 16)) +#define CMD_PIPE_CONTROL_NOWRITE (0 << 14) +#define CMD_PIPE_CONTROL_WRITE_QWORD (1 << 14) +#define CMD_PIPE_CONTROL_WRITE_DEPTH (2 << 14) +#define CMD_PIPE_CONTROL_WRITE_TIME (3 << 14) +#define CMD_PIPE_CONTROL_DEPTH_STALL (1 << 13) +#define CMD_PIPE_CONTROL_WC_FLUSH (1 << 12) +#define CMD_PIPE_CONTROL_IS_FLUSH (1 << 11) +#define CMD_PIPE_CONTROL_TC_FLUSH (1 << 10) +#define CMD_PIPE_CONTROL_NOTIFY_ENABLE (1 << 8) +#define CMD_PIPE_CONTROL_DC_FLUSH (1 << 5) +#define CMD_PIPE_CONTROL_GLOBAL_GTT (1 << 2) +#define CMD_PIPE_CONTROL_LOCAL_PGTT (0 << 2) +#define CMD_PIPE_CONTROL_DEPTH_CACHE_FLUSH (1 << 0) + + +struct intel_batchbuffer; + +#define ALIGN(i, n) (((i) + (n) - 1) & ~((n) - 1)) +#define MIN(a, b) ((a) < (b) ? (a) : (b)) +#define MAX(a, b) ((a) > (b) ? (a) : (b)) +#define ARRAY_ELEMS(a) (sizeof(a) / sizeof((a)[0])) + +#define SET_BLOCKED_SIGSET() do { \ + sigset_t bl_mask; \ + sigfillset(&bl_mask); \ + sigdelset(&bl_mask, SIGFPE); \ + sigdelset(&bl_mask, SIGILL); \ + sigdelset(&bl_mask, SIGSEGV); \ + sigdelset(&bl_mask, SIGBUS); \ + sigdelset(&bl_mask, SIGKILL); \ + pthread_sigmask(SIG_SETMASK, &bl_mask, &intel->sa_mask); \ + } while (0) + +#define RESTORE_BLOCKED_SIGSET() do { \ + pthread_sigmask(SIG_SETMASK, &intel->sa_mask, NULL); \ + } while (0) + +#define PPTHREAD_MUTEX_LOCK() do { \ + SET_BLOCKED_SIGSET(); \ + pthread_mutex_lock(&intel->ctxmutex); \ + } while (0) + +#define PPTHREAD_MUTEX_UNLOCK() do { \ + pthread_mutex_unlock(&intel->ctxmutex); \ + RESTORE_BLOCKED_SIGSET(); \ + } while (0) + +struct intel_driver_data +{ + int fd; + int device_id; + + int dri2Enabled; + drm_context_t hHWContext; + drm_i915_sarea_t *pPrivSarea; + drmLock *driHwLock; + + sigset_t sa_mask; + pthread_mutex_t ctxmutex; + int locked; + + dri_bufmgr *bufmgr; + + unsigned int has_exec2 : 1; /* Flag: has execbuffer2? */ + unsigned int has_bsd : 1; /* Flag: has bitstream decoder for H.264? */ + unsigned int has_blt : 1; /* Flag: has BLT unit? */ +}; + +Bool intel_driver_init(VADriverContextP ctx); +Bool intel_driver_terminate(VADriverContextP ctx); +void intel_lock_hardware(VADriverContextP ctx); +void intel_unlock_hardware(VADriverContextP ctx); + +static INLINE struct intel_driver_data * +intel_driver_data(VADriverContextP ctx) +{ + return (struct intel_driver_data *)ctx->pDriverData; +} + +struct intel_region +{ + int x; + int y; + unsigned int width; + unsigned int height; + unsigned int cpp; + unsigned int pitch; + unsigned int tiling; + unsigned int swizzle; + dri_bo *bo; +}; + +#define PCI_CHIP_GM45_GM 0x2A42 +#define PCI_CHIP_IGD_E_G 0x2E02 +#define PCI_CHIP_Q45_G 0x2E12 +#define PCI_CHIP_G45_G 0x2E22 +#define PCI_CHIP_G41_G 0x2E32 + +#define PCI_CHIP_IRONLAKE_D_G 0x0042 +#define PCI_CHIP_IRONLAKE_M_G 0x0046 + +#ifndef PCI_CHIP_SANDYBRIDGE_GT1 +#define PCI_CHIP_SANDYBRIDGE_GT1 0x0102 /* Desktop */ +#define PCI_CHIP_SANDYBRIDGE_GT2 0x0112 +#define PCI_CHIP_SANDYBRIDGE_GT2_PLUS 0x0122 +#define PCI_CHIP_SANDYBRIDGE_M_GT1 0x0106 /* Mobile */ +#define PCI_CHIP_SANDYBRIDGE_M_GT2 0x0116 +#define PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS 0x0126 +#define PCI_CHIP_SANDYBRIDGE_S_GT 0x010A /* Server */ +#endif + +#define PCI_CHIP_IVYBRIDGE_GT1 0x0152 /* Desktop */ +#define PCI_CHIP_IVYBRIDGE_GT2 0x0162 +#define PCI_CHIP_IVYBRIDGE_M_GT1 0x0156 /* Mobile */ +#define PCI_CHIP_IVYBRIDGE_M_GT2 0x0166 +#define PCI_CHIP_IVYBRIDGE_S_GT1 0x015a /* Server */ + +#define IS_G45(devid) (devid == PCI_CHIP_IGD_E_G || \ + devid == PCI_CHIP_Q45_G || \ + devid == PCI_CHIP_G45_G || \ + devid == PCI_CHIP_G41_G) +#define IS_GM45(devid) (devid == PCI_CHIP_GM45_GM) +#define IS_G4X(devid) (IS_G45(devid) || IS_GM45(devid)) + +#define IS_IRONLAKE_D(devid) (devid == PCI_CHIP_IRONLAKE_D_G) +#define IS_IRONLAKE_M(devid) (devid == PCI_CHIP_IRONLAKE_M_G) +#define IS_IRONLAKE(devid) (IS_IRONLAKE_D(devid) || IS_IRONLAKE_M(devid)) + +#define IS_GEN6(devid) (devid == PCI_CHIP_SANDYBRIDGE_GT1 || \ + devid == PCI_CHIP_SANDYBRIDGE_GT2 || \ + devid == PCI_CHIP_SANDYBRIDGE_GT2_PLUS ||\ + devid == PCI_CHIP_SANDYBRIDGE_M_GT1 || \ + devid == PCI_CHIP_SANDYBRIDGE_M_GT2 || \ + devid == PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS || \ + devid == PCI_CHIP_SANDYBRIDGE_S_GT) + +#define IS_GEN7(devid) (devid == PCI_CHIP_IVYBRIDGE_GT1 || \ + devid == PCI_CHIP_IVYBRIDGE_GT2 || \ + devid == PCI_CHIP_IVYBRIDGE_M_GT1 || \ + devid == PCI_CHIP_IVYBRIDGE_M_GT2 || \ + devid == PCI_CHIP_IVYBRIDGE_S_GT1) + +#endif /* _INTEL_DRIVER_H_ */ diff --git a/src/intel_memman.c b/src/intel_memman.c new file mode 100644 index 00000000..7d56e963 --- /dev/null +++ b/src/intel_memman.c @@ -0,0 +1,49 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao <haihao.xiang@intel.com> + * Zou Nan hai <nanhai.zou@intel.com> + * + */ + +#include <assert.h> + +#include "intel_driver.h" + +Bool +intel_memman_init(struct intel_driver_data *intel) +{ + intel->bufmgr = intel_bufmgr_gem_init(intel->fd, BATCH_SIZE); + assert(intel->bufmgr); + intel_bufmgr_gem_enable_reuse(intel->bufmgr); + + return True; +} + +Bool +intel_memman_terminate(struct intel_driver_data *intel) +{ + drm_intel_bufmgr_destroy(intel->bufmgr); + return True; +} diff --git a/src/intel_memman.h b/src/intel_memman.h new file mode 100644 index 00000000..4e516e51 --- /dev/null +++ b/src/intel_memman.h @@ -0,0 +1,7 @@ +#ifndef _INTEL_MEMMAN_H_ +#define _INTEL_MEMMAN_H_ + +Bool intel_memman_init(struct intel_driver_data *intel); +Bool intel_memman_terminate(struct intel_driver_data *intel); + +#endif /* _INTEL_MEMMAN_H_ */ diff --git a/src/object_heap.c b/src/object_heap.c new file mode 100644 index 00000000..46062fbc --- /dev/null +++ b/src/object_heap.c @@ -0,0 +1,211 @@ +/* + * Copyright (c) 2007 Intel Corporation. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "object_heap.h" + +#include "assert.h" +#include <stdio.h> +#include <string.h> +#include <stdlib.h> + +#define ASSERT assert + +#define LAST_FREE -1 +#define ALLOCATED -2 + +/* + * Expands the heap + * Return 0 on success, -1 on error + */ +static int object_heap_expand( object_heap_p heap ) +{ + int i; + void *new_heap_index; + int next_free; + int new_heap_size = heap->heap_size + heap->heap_increment; + + new_heap_index = (void *) realloc( heap->heap_index, new_heap_size * heap->object_size ); + if ( NULL == new_heap_index ) + { + return -1; /* Out of memory */ + } + heap->heap_index = new_heap_index; + next_free = heap->next_free; + for(i = new_heap_size; i-- > heap->heap_size; ) + { + object_base_p obj = (object_base_p) (heap->heap_index + i * heap->object_size); + obj->id = i + heap->id_offset; + obj->next_free = next_free; + next_free = i; + } + heap->next_free = next_free; + heap->heap_size = new_heap_size; + return 0; /* Success */ +} + +/* + * Return 0 on success, -1 on error + */ +int object_heap_init( object_heap_p heap, int object_size, int id_offset) +{ + heap->object_size = object_size; + heap->id_offset = id_offset & OBJECT_HEAP_OFFSET_MASK; + heap->heap_size = 0; + heap->heap_increment = 16; + heap->heap_index = NULL; + heap->next_free = LAST_FREE; + _i965InitMutex(&heap->mutex); + return object_heap_expand(heap); +} + +/* + * Allocates an object + * Returns the object ID on success, returns -1 on error + */ +int object_heap_allocate( object_heap_p heap ) +{ + object_base_p obj; + + _i965LockMutex(&heap->mutex); + if ( LAST_FREE == heap->next_free ) + { + if( -1 == object_heap_expand( heap ) ) + { + _i965UnlockMutex(&heap->mutex); + return -1; /* Out of memory */ + } + } + ASSERT( heap->next_free >= 0 ); + + obj = (object_base_p) (heap->heap_index + heap->next_free * heap->object_size); + heap->next_free = obj->next_free; + _i965UnlockMutex(&heap->mutex); + + obj->next_free = ALLOCATED; + return obj->id; +} + +/* + * Lookup an object by object ID + * Returns a pointer to the object on success, returns NULL on error + */ +object_base_p object_heap_lookup( object_heap_p heap, int id ) +{ + object_base_p obj; + + _i965LockMutex(&heap->mutex); + if ( (id < heap->id_offset) || (id > (heap->heap_size+heap->id_offset)) ) + { + _i965UnlockMutex(&heap->mutex); + return NULL; + } + id &= OBJECT_HEAP_ID_MASK; + obj = (object_base_p) (heap->heap_index + id * heap->object_size); + _i965UnlockMutex(&heap->mutex); + + /* Check if the object has in fact been allocated */ + if ( obj->next_free != ALLOCATED ) + { + return NULL; + } + return obj; +} + +/* + * Iterate over all objects in the heap. + * Returns a pointer to the first object on the heap, returns NULL if heap is empty. + */ +object_base_p object_heap_first( object_heap_p heap, object_heap_iterator *iter ) +{ + *iter = -1; + return object_heap_next( heap, iter ); +} + +/* + * Iterate over all objects in the heap. + * Returns a pointer to the next object on the heap, returns NULL if heap is empty. + */ +object_base_p object_heap_next( object_heap_p heap, object_heap_iterator *iter ) +{ + object_base_p obj; + int i = *iter + 1; + _i965LockMutex(&heap->mutex); + while ( i < heap->heap_size) + { + obj = (object_base_p) (heap->heap_index + i * heap->object_size); + if (obj->next_free == ALLOCATED) + { + _i965UnlockMutex(&heap->mutex); + *iter = i; + return obj; + } + i++; + } + _i965UnlockMutex(&heap->mutex); + *iter = i; + return NULL; +} + + + +/* + * Frees an object + */ +void object_heap_free( object_heap_p heap, object_base_p obj ) +{ + /* Don't complain about NULL pointers */ + if (NULL != obj) + { + /* Check if the object has in fact been allocated */ + ASSERT( obj->next_free == ALLOCATED ); + + _i965LockMutex(&heap->mutex); + obj->next_free = heap->next_free; + heap->next_free = obj->id & OBJECT_HEAP_ID_MASK; + _i965UnlockMutex(&heap->mutex); + } +} + +/* + * Destroys a heap, the heap must be empty. + */ +void object_heap_destroy( object_heap_p heap ) +{ + object_base_p obj; + int i; + + _i965DestroyMutex(&heap->mutex); + + /* Check if heap is empty */ + for (i = 0; i < heap->heap_size; i++) + { + /* Check if object is not still allocated */ + obj = (object_base_p) (heap->heap_index + i * heap->object_size); + ASSERT( obj->next_free != ALLOCATED ); + } + free(heap->heap_index); + heap->heap_size = 0; + heap->heap_index = NULL; + heap->next_free = LAST_FREE; +} diff --git a/src/object_heap.h b/src/object_heap.h new file mode 100644 index 00000000..82a69172 --- /dev/null +++ b/src/object_heap.h @@ -0,0 +1,92 @@ +/* + * Copyright (c) 2007 Intel Corporation. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef _OBJECT_HEAP_H_ +#define _OBJECT_HEAP_H_ + +#include "i965_mutext.h" + +#define OBJECT_HEAP_OFFSET_MASK 0x7F000000 +#define OBJECT_HEAP_ID_MASK 0x00FFFFFF + +typedef struct object_base *object_base_p; +typedef struct object_heap *object_heap_p; + +struct object_base { + int id; + int next_free; +}; + +struct object_heap { + int object_size; + int id_offset; + void *heap_index; + int next_free; + int heap_size; + int heap_increment; + _I965Mutex mutex; +}; + +typedef int object_heap_iterator; + +/* + * Return 0 on success, -1 on error + */ +int object_heap_init( object_heap_p heap, int object_size, int id_offset); + +/* + * Allocates an object + * Returns the object ID on success, returns -1 on error + */ +int object_heap_allocate( object_heap_p heap ); + +/* + * Lookup an allocated object by object ID + * Returns a pointer to the object on success, returns NULL on error + */ +object_base_p object_heap_lookup( object_heap_p heap, int id ); + +/* + * Iterate over all objects in the heap. + * Returns a pointer to the first object on the heap, returns NULL if heap is empty. + */ +object_base_p object_heap_first( object_heap_p heap, object_heap_iterator *iter ); + +/* + * Iterate over all objects in the heap. + * Returns a pointer to the next object on the heap, returns NULL if heap is empty. + */ +object_base_p object_heap_next( object_heap_p heap, object_heap_iterator *iter ); + +/* + * Frees an object + */ +void object_heap_free( object_heap_p heap, object_base_p obj ); + +/* + * Destroys a heap, the heap must be empty. + */ +void object_heap_destroy( object_heap_p heap ); + +#endif /* _OBJECT_HEAP_H_ */ diff --git a/src/shaders/Makefile.am b/src/shaders/Makefile.am new file mode 100644 index 00000000..17770a92 --- /dev/null +++ b/src/shaders/Makefile.am @@ -0,0 +1 @@ +SUBDIRS = h264 mpeg2 render post_processing vme diff --git a/src/shaders/gpp.py b/src/shaders/gpp.py new file mode 100755 index 00000000..7e43f133 --- /dev/null +++ b/src/shaders/gpp.py @@ -0,0 +1,200 @@ +#!/usr/bin/env python +#coding=UTF-8 + +# Copyright © 2011 Intel Corporation +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the "Software"), +# to deal in the Software without restriction, including without limitation +# the rights to use, copy, modify, merge, publish, distribute, sublicense, +# and/or sell copies of the Software, and to permit persons to whom the +# Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice (including the next +# paragraph) shall be included in all copies or substantial portions of the +# Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +# SOFTWARE. +# +# Authors: +# Chen, Yangyang <yangyang.chen@intel.com> +# Han, Haofu <haofu.han@intel.com> +# + +import sys + +class Block: + def __init__(self, ln=0, s=None): + assert type(ln) == int + assert type(s) == str or s == None + self.lineno = ln + self.text = s + self.subblocks = [] + + def append(self, block): + self.subblocks.append(block) + + def checkfor(self, line): + import re + p = r'\$\s*for\s*' + if re.match(p, line) == None: + raise Exception(self.__errmsg('syntax error')) + tail = line.split('(', 1)[1].rsplit(')', 1) + conds = tail[0].split(';') + lb = tail[1] + if lb.strip() != '{': + raise Exception(self.__errmsg('missing "{"')) + if len(conds) != 3: + raise Exception(self.__errmsg('syntax error(miss ";"?)')) + init = conds[0] + cond = conds[1] + step = conds[2] + self.__parse_init(init) + self.__parse_cond(cond) + self.__parse_step(step) + + def __parse_init(self, init): + inits = init.split(',') + self.param_init = [] + for ini in inits: + try: + val = eval(ini) + self.param_init.append(val) + except: + raise Exception(self.__errmsg('non an exp: %s'%ini)) + self.param_num = len(inits) + + def __parse_cond(self, cond): + cond = cond.strip() + if cond[0] in ['<', '>']: + if cond[1] == '=': + self.param_op = cond[:2] + limit = cond[2:] + else: + self.param_op = cond[0] + limit = cond[1:] + try: + self.param_limit = eval(limit) + except: + raise Exception(self.__errmsg('non an exp: %s'%limit)) + else: + raise Exception(self.__errmsg('syntax error')) + + def __parse_step(self, step): + steps = step.split(',') + if len(steps) != self.param_num: + raise Exception(self.__errmsg('params number no match')) + self.param_step = [] + for st in steps: + try: + val = eval(st) + self.param_step.append(val) + except: + raise Exception(self.__errmsg('non an exp: %s'%st)) + + def __errmsg(self, msg=''): + return '%d: %s' % (self.lineno, msg) + +def readlines(f): + lines = f.readlines() + buf = [] + for line in lines: + if '\\n' in line: + tmp = line.split('\\n') + buf.extend(tmp) + else: + buf.append(line) + return buf + +def parselines(lines): + root = Block(0) + stack = [root] + lineno = 0 + for line in lines: + lineno += 1 + line = line.strip() + if line.startswith('$'): + block = Block(lineno) + block.checkfor(line) + stack[-1].append(block) + stack.append(block) + elif line.startswith('}'): + stack.pop() + elif line and not line.startswith('#'): + stack[-1].append(Block(lineno, line)) + return root + +def writeblocks(outfile, blocks): + buf = [] + + def check_cond(op, cur, lim): + assert op in ['<', '>', '<=', '>='] + assert type(cur) == int + assert type(lim) == int + return eval('%d %s %d' % (cur, op, lim)) + + def do_writeblock(block, curs): + if block.text != None: + import re + p = r'\%(\d+)' + newline = block.text + params = set(re.findall(p, block.text)) + for param in params: + index = int(param) - 1 + if index >= len(curs): + raise Exception('%d: too many param(%%%d)'%(block.lineno, index+1)) + newline = newline.replace('%%%d'%(index+1), str(curs[index])) + if newline and \ + not newline.startswith('.') and \ + not newline.endswith(':') and \ + not newline.endswith(';'): + newline += ';' + buf.append(newline) + else: + for_curs = block.param_init + while check_cond(block.param_op, for_curs[0], block.param_limit): + for sblock in block.subblocks: + do_writeblock(sblock, for_curs) + for i in range(0, block.param_num): + for_curs[i] += block.param_step[i] + + for block in blocks.subblocks: + do_writeblock(block, []) + outfile.write('\n'.join(buf)) + outfile.write('\n') + +if __name__ == '__main__': + argc = len(sys.argv) + if argc == 1: + print >>sys.stderr, 'no input file' + sys.exit(0) + + try: + infile = open(sys.argv[1], 'r') + except IOError: + print >>sys.stderr, 'can not open %s' % sys.argv[1] + sys.exit(1) + + if argc == 2: + outfile = sys.stdout + else: + try: + outfile = open(sys.argv[2], 'w') + except IOError: + print >>sys.stderr, 'can not write to %s' % sys.argv[2] + sys.exit(1) + + lines = readlines(infile) + try: + infile.close() + except IOError: + pass + + blocks = parselines(lines) + writeblocks(outfile, blocks) diff --git a/src/shaders/h264/Makefile.am b/src/shaders/h264/Makefile.am new file mode 100644 index 00000000..d6d106b3 --- /dev/null +++ b/src/shaders/h264/Makefile.am @@ -0,0 +1 @@ +SUBDIRS = mc diff --git a/src/shaders/h264/ildb/AVC_ILDB.inc b/src/shaders/h264/ildb/AVC_ILDB.inc new file mode 100644 index 00000000..4b3535ea --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB.inc @@ -0,0 +1,718 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+#if !defined(__AVC_ILDB_HEADER__) // Make sure this file is only included once
+#define __AVC_ILDB_HEADER__
+
+// Module name: AVC_ILDB.inc
+
+#undef ORIX
+#undef ORIY
+
+//========== Root thread input parameters ==================================================
+#define RootParam r1 // :w
+#define MBsCntX r1.0 // :w, MB count per row
+#define MBsCntY r1.1 // :w, MB count per col
+//#define PicType r1.2 // :w, Picture type
+#define MaxThreads r1.3 // :w, Max Thread limit
+#define EntrySignature r1.4 // :w, Debug flag
+#define BitFields r1.5 // :uw
+#define MbaffFlag BIT0 // :w, mbaff flag, bit 0 in BitFields
+#define BotFieldFlag BIT1 // :w, bottom field flag, bit 1 in BitFields
+#define CntlDataExpFlag BIT2 // :w, Control Data Expansion Flag, bit 2 in BitFields
+#define RampConst r1.12 // 8 :ub, Ramp constant, r1.12 - r1.19:ub
+#define StepToNextMB r1.20 // :b, 2 bytes
+#define Minus2Minus1 r1.22 // :b, 2 bytes
+// next one starts at r1.11:w
+
+#define TopFieldFlag 0xFFFD // :w, top field flag, used to set bit1 to 0.
+
+
+//========== Root Locals =============================================================
+
+// Variables in root kernel for launching child therad
+#define ChildParam r2.0 // :w
+//Not used #define URBOffset r2.3 // :w, Each row occupies 4 URB entries. All children in the same row use the same set of URB entries
+#define CurCol r2.10 // :w, current col
+#define CurColB r2.20 // :b, current col
+#define CurRow r2.11 // :w, current row
+#define CurRowB r2.22 // :b, current row
+#define LastCol r2.12 // :w, last col
+#define LastRow r2.13 // :w, last row
+
+// Root local constants during spawning process
+#define Col_Boundary r3.0 // :w,
+#define Row_Boundary r3.1 // :w,
+//#define TotalBlocks r3.2 // :w, Total blocks in the frame
+#define URB_EntriesPerMB_2 r3.3 // :w, = URB entries per MB, but in differnt form
+#define URBOffsetUVBase r3.4 // :w, UV Base offset in URB
+
+#define Temp1_D r3.6 // :d:
+#define Temp1_W r3.12 // :w, Temp1
+#define Temp1_B r3.24 // :b, = Temp1_W
+#define Temp2_W r3.13 // :w, Temp2
+#define Temp2_B r3.26 // :b, = Temp2_W
+
+// Root local variables
+#define JumpTable r4 // :d, jump table
+#define JUMPTABLE_BASE 4*32
+#define JumpAddr a0.7
+
+#define TopRowForScan r5.0 // :w, track the top row for scan. All rows above this row is deblocked already.
+
+
+// Child Thread R0 Header Field
+#define MRF0 m0
+#define CT_R0Hdr m1
+
+/*
+.declare GatewayAperture Base=r50.0 ElementSize=4 SrcRegion=REGION(8,1) Type=ud
+#define GatewayApertureB 1600 // r50 byte offset from r0.0
+
+// Chroma root thread updates luma root's ThreadLimit at r10.0:w via gateway
+#define ThreadLimit r62.0 // :w, thread limit //r56.0
+#define THREAD_LIMIT_OFFSET 0x01800000 // Offset from r50 to r56 = 12*32 = 384 = 0x0180. 0x180 << 16 = 0x01800000
+ //#define THREAD_LIMIT_OFFSET 0x00C00000 // Offset from r50 to r56 = 6*32 = 192 = 0x00C0. 0xC0 << 16 = 0x00C00000
+*/
+
+// Gateway size is 16 GRF. 68 rows of MBs takes 9 GRFs (r6 - r14)
+// For CTG: Expended to support 1280 rows of pixel (80 rows of MBs). It requires 10 GRFs (r6 - r15)
+.declare GatewayAperture Base=r6.0 ElementSize=4 SrcRegion=REGION(8,1) Type=ud
+#define GatewayApertureB 192 // r0.0 byte offset from r0.0
+
+// Chroma root thread updates luma root's ThreadLimit at r10.0:w via gateway
+#define ThreadLimit r18.0 // :w, thread limit
+#define THREAD_LIMIT_OFFSET 0x01800000 // Offset from r50 to r56 = 12*32 = 384 = 0x0180. 0x180 << 16 = 0x01800000
+#define TotalBlocks r18.1 // :w, Total blocks in the frame
+
+// Root local variables
+#define ChildThreadsID r19.0 // :w, Child thread ID, unique to each child
+#define OutstandingThreads r20.0 // :w, Outstanding threads
+#define ProcessedMBs r20.1 // :w, # of MBs processed
+
+#define URBOffset r21.0 // :w, Each row occupies 4 URB entries. All children in the same row use the same set of URB entries
+
+//=================================================================================
+
+#define ScoreBd_Size 128 //96 // size of Status[] or ProcCol[]
+
+#define ScoreBd_Idx 2
+//#define Saved_Col 0
+
+#define StatusAddr a0.4 // :w, point to r50
+//=================================================================================
+
+
+// Gateway payload
+#define GatewayPayload r48.0 // :ud
+#define GatewayPayloadKey r48.8 // :uw
+#define DispatchID r48.20 // :ub
+#define RegBase_GatewaySize r48.5 // :ud, used in open a gateway
+#define Offset_Length r48.5 // :ud, used in forwardmsg back to root
+#define EUID_TID r48.9 // :uw, used in forwardmsg back to root
+
+// Gateway response
+#define GatewayResponse r49.0 // :ud, one GRF
+
+#define URBWriteMsgDesc a0.0 // Used in URB write, :ud
+#define URBWriteMsgDescLow a0.0 // Used in URB write, :uw
+#define URBWriteMsgDescHigh a0.1 // Used in URB write, :uw
+
+.declare WritebackResponse Base=r50 ElementSize=4 SrcRegion=REGION(8,1) Type=ud // 1 GRF for write backs
+
+
+/////////////////////////////////////////////////////////////////////////////////////////////
+// IDesc Order Offset
+//
+// 0) luma root 0 from luma root
+// 1) luma child 16 from luma root
+// 2) chroma root 32 from luma root
+// 3) chroma child 16 from chroma root
+
+// 4) luma field root 0 from luma field root
+// 5) luma field child 16 from luma field root
+// 6) chroma field root 32 from luma field root
+// 7) chroma field child 16 from chroma field root
+
+// 8) luma Mbaff root 0 from luma Mbaff root
+// 9) luma Mbaff child 16 from luma Mbaff root
+// 10) chroma Mbaff root 32 from luma Mbaff root
+// 11) chroma Mbaff child 16 from chroma Mbaff root
+
+// IDesc offset within non-mbaff or mbaff mode
+#define CHROMA_ROOT_OFFSET 32 // Offset from luma root to chroma root
+#define CHILD_OFFSET 16 // Offset from luma root to luma child,
+ // and from chroma root to chroma child
+/////////////////////////////////////////////////////////////////////////////////////////////
+
+
+//========== End of Root Variables ======================================================
+
+
+//========== Child thread input parameters ==============================================
+//#define MBsCntX r1.0 // :w, MB count per row (same as root)
+//#define MBsCntY r1.1 // :w, MB count per col (same as root)
+//#define PicTypeC r1.2 // :w, Picture type same as root thread (same as root)
+#define URBOffsetC r1.3 // :w,
+#define EntrySignatureC r1.4 // :w, Debug field (same as root)
+//#define BitFields r1.5 // :w (same as root)
+//#define MbaffFlag BIT0 // :w, mbaff flag, bit 0 in BitFields
+//#define BotFieldFlag BIT1 // :w, bottom field flag, bit 1 in BitFields
+//#define CntlDataExpFlag BIT2 // :w, Control Data Expansion Flag, bit 2 in BitFields
+#define RampConstC r1.12 // 8 :ub, Ramp constant, r1.12 - r1.19:ub.
+#define ORIX r1.10 // :w, carry over from root r1 in MB count
+#define ORIY r1.11 // :w, carry over from root r1 in MB count
+#define LastColC r1.12 // :w, last col
+#define LastRowC r1.13 // :w, last row
+
+.declare GatewayApertureC Base=r1.0 ElementSize=4 SrcRegion=REGION(8,1) Type=ud
+#define GatewayApertureCBase 32 // r1 byte offset from r0.0
+
+
+//========== Child Variables ============================================================
+
+// Mbaff Alpha, Beta, Tc0 vectors for an edge
+.declare Mbaff_ALPHA Base=r14.0 ElementSize=2 SrcRegion=REGION(8,1) Type=uw // r14
+.declare Mbaff_BETA Base=r15.0 ElementSize=2 SrcRegion=REGION(8,1) Type=uw // r15
+.declare Mbaff_TC0 Base=r16.0 ElementSize=2 SrcRegion=REGION(8,1) Type=uw // r16
+.declare RRampW Base=r17.0 ElementSize=2 SrcRegion=REGION(8,1) Type=w // r17
+
+.declare Mbaff_ALPHA2 Base=r45.0 ElementSize=2 SrcRegion=REGION(8,1) Type=uw // alpha2 = (alpha >> 2) + 2
+
+
+#define ORIX_CUR r46.0 // :w, current block origin X in bytes
+#define ORIY_CUR r46.1 // :w, current block origin Y in bytes
+#define ORIX_LEFT r46.2 // :w, left block origin X in bytes
+#define ORIY_LEFT r46.3 // :w, left block origin Y in bytes
+#define ORIX_TOP r46.4 // :w, top block origin X in bytes
+#define ORIY_TOP r46.5 // :w, top block origin Y in bytes
+//#define FilterSampleFlag r46.6 // :uw,
+#define CTemp0_W r46.7 // :w, child Temp0
+
+#define alpha r46.8 // :w, Scaler version for non Mbaff
+#define beta r46.9 // :w, Scaler version for non Mbaff
+#define tc0 r46.20 // 4 :ub, r46.20 ~ r46.23, Scaler version for non Mbaff
+#define MaskA r46.12 // :uw
+#define MaskB r46.13 // :uw
+
+// Child control flags
+#define DualFieldMode r47.0 // Cur MB is frame based, above MB is field based in mbaff mode
+ // :uw, 0 = not in dual field mode, 1 = in dual field mode, filter both top and bot fields
+#define GateWayOffsetC r47.1 // :w, Gateway offset for child writing into root space
+#define CntrlDataOffsetY r47.1 // :ud, MB control data data offset
+#define alpha2 r47.4 // :uw, alpha2 = (alpha >> 2) + 2
+
+#define VertEdgePattern r47.5 // :uw,
+
+#define CTemp1_W r47.6 // :w, child Temp1
+#define CTemp1_B r47.12 // :b, = child Temp1_W
+#define CTemp2_W r47.7 // :w, child Temp2
+#define CTemp2_B r47.14 // :b, = child Temp2_W
+
+// Used in child
+#define ECM_AddrReg a0.4 // Edge Control Map register
+#define P_AddrReg a0.6 // point to P samples in left or top MB
+#define Q_AddrReg a0.7 // point to Q samples in cur MB
+
+
+.declare RTempD Base=r26.0 ElementSize=4 SrcRegion=REGION(8,1) Type=d // r26-27
+.declare RTempB Base=r26.0 ElementSize=1 SrcRegion=REGION(8,4) Type=ub // r26-27
+.declare RTempW Base=r26.0 ElementSize=2 SrcRegion=REGION(8,1) Type=w // r26-27
+#define LEFT_TEMP_D RTempD
+#define LEFT_TEMP_B RTempB
+#define LEFT_TEMP_W RTempW
+
+.declare TempRow0 Base=r26.0 ElementSize=2 SrcRegion=REGION(8,1) Type=w
+.declare TempRow0B Base=r26.0 ElementSize=1 SrcRegion=REGION(8,2) Type=ub
+.declare TempRow1 Base=r27.0 ElementSize=2 SrcRegion=REGION(8,1) Type=w
+.declare TempRow1B Base=r27.0 ElementSize=1 SrcRegion=REGION(8,2) Type=ub
+
+.declare CUR_TEMP_D Base=r28.0 ElementSize=4 SrcRegion=REGION(8,1) Type=d // 8 GRFs
+.declare CUR_TEMP_B Base=r28.0 ElementSize=1 SrcRegion=REGION(8,4) Type=ub
+.declare CUR_TEMP_W Base=r28.0 ElementSize=2 SrcRegion=REGION(8,1) Type=w
+
+#define FilterSampleFlag r28.0 // :uw,
+
+.declare A Base=r28.0 ElementSize=2 SrcRegion=REGION(16,1) Type=w
+.declare BB Base=r29.0 ElementSize=2 SrcRegion=REGION(16,1) Type=w
+
+.declare TempRow3 Base=r30.0 ElementSize=2 SrcRegion=REGION(8,1) Type=w
+.declare TempRow3B Base=r30.0 ElementSize=1 SrcRegion=REGION(8,2) Type=ub
+
+.declare tc0_exp Base=r30.0 ElementSize=2 SrcRegion=REGION(8,1) Type=w
+.declare tc8 Base=r30.0 ElementSize=2 SrcRegion=REGION(8,1) Type=w
+
+.declare tc_exp Base=r31.0 ElementSize=2 SrcRegion=REGION(8,1) Type=w
+.declare tx_exp_8 Base=r31.0 ElementSize=2 SrcRegion=REGION(8,1) Type=w
+
+.declare q0_p0 Base=r32.0 ElementSize=2 SrcRegion=REGION(8,1) Type=w
+.declare ABS_q0_p0 Base=r33.0 ElementSize=2 SrcRegion=REGION(8,1) Type=w
+
+.declare ap Base=r34.0 ElementSize=2 SrcRegion=REGION(8,1) Type=w
+.declare aq Base=r35.0 ElementSize=2 SrcRegion=REGION(8,1) Type=w
+
+// These buffers have the src data for each edge to be beblocked.
+// They have modified pixels from previous edges.
+//
+// Y:
+// +----+----+----+----+----+----+----+----+
+// | p3 | p2 | P1 | p0 | q0 | q1 | q2 | q3 |
+// +----+----+----+----+----+----+----+----+
+//
+// p3 = r[P_AddrReg, 0]<16;16,1>
+// p2 = r[P_AddrReg, 16]<16;16,1>
+// p1 = r[P_AddrReg, 32]<16;16,1>
+// p0 = r[P_AddrReg, 48]<16;16,1>
+// q0 = r[Q_AddrReg, 0]<16;16,1>
+// q1 = r[Q_AddrReg, 16]<16;16,1>
+// q2 = r[Q_AddrReg, 32]<16;16,1>
+// q3 = r[Q_AddrReg, 48]<16;16,1>
+
+.declare p0123_W Base=r36.0 ElementSize=2 SrcRegion=REGION(16,1) Type=uw // r36, r37
+.declare q0123_W Base=r38.0 ElementSize=2 SrcRegion=REGION(16,1) Type=uw // r38, r39
+.declare p3 Base=r36.0 ElementSize=1 SrcRegion=REGION(8,1) Type=ub
+.declare p2 Base=r36.16 ElementSize=1 SrcRegion=REGION(8,1) Type=ub
+.declare p1 Base=r37.0 ElementSize=1 SrcRegion=REGION(8,1) Type=ub
+.declare p0 Base=r37.16 ElementSize=1 SrcRegion=REGION(8,1) Type=ub
+.declare q0 Base=r38.0 ElementSize=1 SrcRegion=REGION(8,1) Type=ub
+.declare q1 Base=r38.16 ElementSize=1 SrcRegion=REGION(8,1) Type=ub
+.declare q2 Base=r39.0 ElementSize=1 SrcRegion=REGION(8,1) Type=ub
+.declare q3 Base=r39.16 ElementSize=1 SrcRegion=REGION(8,1) Type=ub
+
+.declare TempRow2 Base=r38.0 ElementSize=2 SrcRegion=REGION(8,1) Type=w
+
+// Temp space for mbaff dual field mode
+#define ABOVE_CUR_MB_BASE 40*GRFWIB // Byte offset to r40
+.declare ABOVE_CUR_MB_YW Base=r40 ElementSize=2 SrcRegion=REGION(8,1) Type=uw
+.declare ABOVE_CUR_MB_UW Base=r40 ElementSize=2 SrcRegion=REGION(8,1) Type=uw
+
+.declare P0_plus_P1 Base=r41.0 ElementSize=2 SrcRegion=REGION(8,1) Type=w
+.declare Q0_plus_Q1 Base=r42.0 ElementSize=2 SrcRegion=REGION(8,1) Type=w
+
+.declare P2_plus_P3 Base=r43.0 ElementSize=2 SrcRegion=REGION(8,1) Type=w
+.declare Q2_plus_Q3 Base=r44.0 ElementSize=2 SrcRegion=REGION(8,1) Type=w
+
+
+//////////////////////////////////////////////////////////////////////////////////////////
+// MB control data reference
+
+// Expanded control data is in r18 - r25
+.declare CNTRL_DATA_D Base=r18 ElementSize=4 SrcRegion=REGION(8,1) Type=ud // For read, 8 GRFs
+#define CNTRL_DATA_BASE 18*GRFWIB // Base offset to r18
+
+// Bit mask for extracting bits
+#define MbaffFrameFlag 0x01
+#define FieldModeCurrentMbFlag 0x02
+#define FieldModeLeftMbFlag 0x04
+#define FieldModeAboveMbFlag 0x08
+#define FilterInternal8x8EdgesFlag 0x10
+#define FilterInternal4x4EdgesFlag 0x20
+#define FilterLeftMbEdgeFlag 0x40
+#define FilterTopMbEdgeFlag 0x80
+
+#define DISABLE_ILDB_FLAG 0x01
+
+// Exact bit pattern for left and cur MB coding mode (frame vs. field)
+#define LEFT_FRAME_CUR_FRAME 0x00
+#define LEFT_FRAME_CUR_FIELD 0x02
+#define LEFT_FIELD_CUR_FRAME 0x04
+#define LEFT_FIELD_CUR_FIELD 0x06
+
+// Exact bit pattern for above and cur MB coding mode (frame vs. field)
+#define ABOVE_FRAME_CUR_FRAME 0x00
+#define ABOVE_FRAME_CUR_FIELD 0x02
+#define ABOVE_FIELD_CUR_FRAME 0x08
+#define ABOVE_FIELD_CUR_FIELD 0x0A
+
+
+
+//========== MB control data field offset in byte ==========
+
+#if !defined(_APPLE)
+
+// GRF0 - GRF1 holds original control data
+
+// GRF0
+#define HorizOrigin 0
+#define VertOrigin 1
+#define BitFlags 2 // Bit flags
+
+#define bbSinternalLeftVert 4 // Internal left vertical bS, 2 bits per bS for 4 Y pixels and 2 U/V pixels
+#define bbSinternalMidVert 5 // Internal mid vertical bS
+#define bbSinternalRightVert 6 // Internal right vertical bS
+#define bbSinternalTopHorz 7 // Internal top horizontal bS
+
+#define bbSinternalMidHorz 8 // Internal mid horizontal bS
+#define bbSinternalBotHorz 9 // Internal bottom horizontal bS
+#define wbSLeft0 10 // External left vertical bS (0), 4 bits per bS for 4 Y pixels and 2 U/V pixels, and byte 11
+
+#define wbSLeft1 12 // External left vertical bS (1), and byte 13
+#define wbSTop0 14 // External top horizontal bS (0), and byte 15
+
+#define wbSTop1 16 // Externaltop horizontal bS (1), and byte 17
+#define bIndexAinternal_Y 18 // Internal index A for Y
+#define bIndexBinternal_Y 19 // Internal index B for Y
+
+#define bIndexAleft0_Y 20 // Left index A for Y (0)
+#define bIndexBleft0_Y 21 // Left index B for Y (0)
+#define bIndexAleft1_Y 22 // Left index A for Y (1)
+#define bIndexBleft1_Y 23 // Left index B for Y (1)
+
+#define bIndexAtop0_Y 24 // Top index A for Y (0)
+#define bIndexBtop0_Y 25 // Top index B for Y (0)
+#define bIndexAtop1_Y 26 // Top index A for Y (1)
+#define bIndexBtop1_Y 27 // Top index B for Y (1)
+
+#define bIndexAinternal_Cb 28 // Internal index A for Cb
+#define bIndexBinternal_Cb 29 // Internal index B for Cb
+#define bIndexAleft0_Cb 30 // Left index A for Cb (0)
+#define bIndexBleft0_Cb 31 // Left index B for Cb (0)
+
+// GRF1
+#define bIndexAleft1_Cb 32 // Left index A for Cb (1)
+#define bIndexBleft1_Cb 33 // Left index B for Cb (1)
+#define bIndexAtop0_Cb 34 // Top index A for Cb (0)
+#define bIndexBtop0_Cb 35 // Top index B for Cb (0)
+
+#define bIndexAtop1_Cb 36 // Top index A for Cb (1)
+#define bIndexBtop1_Cb 37 // Top index B for Cb (1)
+#define bIndexAinternal_Cr 38 // Internal index A for Cr
+#define bIndexBinternal_Cr 39 // Internal index B for Cr
+
+#define bIndexAleft0_Cr 40 // Left index A for Cr (0)
+#define bIndexBleft0_Cr 41 // Left index B for Cr (0)
+#define bIndexAleft1_Cr 42 // Left index A for Cr (1)
+#define bIndexBleft1_Cr 43 // Left index B for Cr (1)
+
+#define bIndexAtop0_Cr 44 // Top index A for Cr (0)
+#define bIndexBtop0_Cr 45 // Top index B for Cr (0)
+#define bIndexAtop1_Cr 46 // Top index A for Cr (1)
+#define bIndexBtop1_Cr 47 // Top index B for Cr (1)
+
+#define ExtBitFlags 48 // Extended bit flags, such as disable ILDB bits
+
+// Offset 49 - 63 not used
+
+
+//===== GRF2 - GRF7 hold expanded control data =====
+
+// GRF2
+#define wEdgeCntlMap_IntLeftVert 64 // Derived from bbSinternalLeftVert, 1 bit per pixel
+#define wEdgeCntlMap_IntMidVert 66 // Derived from bbSinternalLeftVert
+
+#define wEdgeCntlMap_IntRightVert 68 // Derived from bbSinternalRightVert
+#define wEdgeCntlMap_IntTopHorz 70 // Derived from bbSinternalTopHorz, 1bit per pixel
+
+#define wEdgeCntlMap_IntMidHorz 72 // Derived from bbSinternalMidHorz
+#define wEdgeCntlMap_IntBotHorz 74 // Derived from bbSinternalBotHorz
+
+// Offset 76 - 79 not used
+
+#define wEdgeCntlMapA_ExtLeftVert0 80 // Derived from wbSLeft0, 1bit per pixel
+#define wEdgeCntlMapB_ExtLeftVert0 82 // Derived from wbSLeft0
+
+#define wEdgeCntlMapA_ExtTopHorz0 84 // Derived from wbSTop0, 1bit per pixel
+#define wEdgeCntlMapB_ExtTopHorz0 86 // Derived from wbSTop0
+
+#define wEdgeCntlMapA_ExtLeftVert1 88 // Derived from wbSLeft1, 1bit per pixel
+#define wEdgeCntlMapB_ExtLeftVert1 90 // Derived from wbSLeft1
+
+#define wEdgeCntlMapA_ExtTopHorz1 92 // Derived from wbSTop1, 1bit per pixel
+#define wEdgeCntlMapB_ExtTopHorz1 94 // Derived from wbSTop1
+
+
+// GRF3
+#define bTc0_v00_0_Y 96 // Derived from bSv00_0 and bIndexAleft0_Y, 4 pixels per tc0
+#define bTc0_v10_0_Y 97 // Derived from bSv10_0 and bIndexAleft0_Y
+#define bTc0_v20_0_Y 98 // Derived from bSv20_0 and bIndexAleft0_Y
+#define bTc0_v30_0_Y 99 // Derived from bSv30_0 and bIndexAleft0_Y
+
+#define bTc0_v01_Y 100 // Derived from bSv01 and bIndexAinternal_Y
+#define bTc0_v11_Y 101 // Derived from bSv11 and bIndexAinternal_Y
+#define bTc0_v21_Y 102 // Derived from bSv21 and bIndexAinternal_Y
+#define bTc0_v31_Y 103 // Derived from bSv31 and bIndexAinternal_Y
+
+#define bTc0_v02_Y 104 // Derived from bSv02 and bIndexAinternal_Y
+#define bTc0_v12_Y 105 // Derived from bSv12 and bIndexAinternal_Y
+#define bTc0_v22_Y 106 // Derived from bSv22 and bIndexAinternal_Y
+#define bTc0_v32_Y 107 // Derived from bSv32 and bIndexAinternal_Y
+
+#define bTc0_v03_Y 108 // Derived from bSv03 and bIndexAinternal_Y
+#define bTc0_v13_Y 109 // Derived from bSv13 and bIndexAinternal_Y
+#define bTc0_v23_Y 110 // Derived from bSv23 and bIndexAinternal_Y
+#define bTc0_v33_Y 111 // Derived from bSv33 and bIndexAinternal_Y
+
+#define bTc0_h00_0_Y 112 // Derived from bSh00_0 and bIndexAleft0_Y
+#define bTc0_h01_0_Y 113 // Derived from bSh01_0 and bIndexAleft0_Y
+#define bTc0_h02_0_Y 114 // Derived from bSh02_0 and bIndexAleft0_Y
+#define bTc0_h03_0_Y 115 // Derived from bSh03_0 and bIndexAleft0_Y
+
+#define bTc0_h10_Y 116 // Derived from bSh10 and bIndexAinternal_Y
+#define bTc0_h11_Y 117 // Derived from bSh11 and bIndexAinternal_Y
+#define bTc0_h12_Y 118 // Derived from bSh12 and bIndexAinternal_Y
+#define bTc0_h13_Y 119 // Derived from bSh13 and bIndexAinternal_Y
+
+#define bTc0_h20_Y 120 // Derived from bSh20 and bIndexAinternal_Y
+#define bTc0_h21_Y 121 // Derived from bSh21 and bIndexAinternal_Y
+#define bTc0_h22_Y 122 // Derived from bSh22 and bIndexAinternal_Y
+#define bTc0_h23_Y 123 // Derived from bSh23 and bIndexAinternal_Y
+
+#define bTc0_h30_Y 124 // Derived from bSh30 and bIndexAinternal_Y
+#define bTc0_h31_Y 125 // Derived from bSh31 and bIndexAinternal_Y
+#define bTc0_h32_Y 126 // Derived from bSh32 and bIndexAinternal_Y
+#define bTc0_h33_Y 127 // Derived from bSh33 and bIndexAinternal_Y
+
+// GRF4
+#define bAlphaLeft0_Y 128 // Derived from bIndexAleft0_Y
+#define bBetaLeft0_Y 129 // Derived from bIndexBleft0_Y
+#define bAlphaTop0_Y 130 // Derived from bIndexAtop0_Y
+#define bBetaTop0_Y 131 // Derived from bIndexBtop0_Y
+
+#define bAlphaInternal_Y 132 // Derived from bIndexAinternal_Y
+#define bBetaInternal_Y 133 // Derived from bIndexBinternal_Y
+// Offset 134 - 135 not used
+
+// Offset 136 - 143 not used
+#define bAlphaLeft1_Y 144 // Derived from bIndexAleft1_Y Used in Mbaff mode only
+#define bBetaLeft1_Y 145 // Derived from bIndexBleft1_Y Used in Mbaff mode only
+#define bAlphaTop1_Y 146 // Derived from bIndexAtop1_Y Used in Mbaff mode only
+#define bBetaTop1_Y 147 // Derived from bIndexBtop1_Y Used in Mbaff mode only
+
+// Offset 148 - 151 not used
+#define bTc0_v00_1_Y 152 // Derived from bSv00_1 and bIndexAleft1_Y Used in Mbaff mode only
+#define bTc0_v10_1_Y 153 // Derived from bSv10_1 and bIndexAleft1_Y Used in Mbaff mode only
+#define bTc0_v20_1_Y 154 // Derived from bSv20_1 and bIndexAleft1_Y Used in Mbaff mode only
+#define bTc0_v30_1_Y 155 // Derived from bSv30_1 and bIndexAleft1_Y Used in Mbaff mode only
+
+#define bTc0_h00_1_Y 156 // Derived from bSh00_1 and bIndexAleft1_Y Used in Mbaff mode only
+#define bTc0_h01_1_Y 157 // Derived from bSh01_1 and bIndexAleft1_Y Used in Mbaff mode only
+#define bTc0_h02_1_Y 158 // Derived from bSh02_1 and bIndexAleft1_Y Used in Mbaff mode only
+#define bTc0_h03_1_Y 159 // Derived from bSh03_1 and bIndexAleft1_Y Used in Mbaff mode only
+
+
+// GRF5
+#define bTc0_v00_0_Cb 160 // Derived from bSv00_0 and bIndexAleft0_Cb, 2 pixels per tc0 Left0
+#define bTc0_v10_0_Cb 161 // Derived from bSv10_0 and bIndexAleft0_Cb
+#define bTc0_v20_0_Cb 162 // Derived from bSv20_0 and bIndexAleft0_Cb
+#define bTc0_v30_0_Cb 163 // Derived from bSv30_0 and bIndexAleft0_Cb
+
+#define bTc0_v02_Cb 164 // Derived from bSv02 and bIndexAinternal_Cb MidVert
+#define bTc0_v12_Cb 165 // Derived from bSv12 and bIndexAinternal_Cb
+#define bTc0_v22_Cb 166 // Derived from bSv22 and bIndexAinternal_Cb
+#define bTc0_v32_Cb 167 // Derived from bSv32 and bIndexAinternal_Cb
+
+#define bTc0_h00_0_Cb 168 // Derived from bSh00_0 and bIndexAleft0_Cb Top0
+#define bTc0_h01_0_Cb 169 // Derived from bSh01_0 and bIndexAleft0_Cb
+#define bTc0_h02_0_Cb 170 // Derived from bSh02_0 and bIndexAleft0_Cb
+#define bTc0_h03_0_Cb 171 // Derived from bSh03_0 and bIndexAleft0_Cb
+
+#define bTc0_h20_Cb 172 // Derived from bSh20 and bIndexAinternal_Cb MidHorz
+#define bTc0_h21_Cb 173 // Derived from bSh21 and bIndexAinternal_Cb
+#define bTc0_h22_Cb 174 // Derived from bSh22 and bIndexAinternal_Cb
+#define bTc0_h23_Cb 175 // Derived from bSh23 and bIndexAinternal_Cb
+
+#define bTc0_v00_0_Cr 176 // Derived from bSv00_0 and bIndexAleft0_Cr, 2 pixels per tc0 Left0
+#define bTc0_v10_0_Cr 177 // Derived from bSv10_0 and bIndexAleft0_Cr
+#define bTc0_v20_0_Cr 178 // Derived from bSv20_0 and bIndexAleft0_Cr
+#define bTc0_v30_0_Cr 179 // Derived from bSv30_0 and bIndexAleft0_Cr
+
+#define bTc0_v02_Cr 180 // Derived from bSv02 and bIndexAinternal_Cr Mid Vert
+#define bTc0_v12_Cr 181 // Derived from bSv12 and bIndexAinternal_Cr
+#define bTc0_v22_Cr 182 // Derived from bSv22 and bIndexAinternal_Cr
+#define bTc0_v32_Cr 183 // Derived from bSv32 and bIndexAinternal_Cr
+
+#define bTc0_h00_0_Cr 184 // Derived from bSh00_0 and bIndexAleft0_Cr, 2 pixels per tc0 Top0
+#define bTc0_h01_0_Cr 185 // Derived from bSh01_0 and bIndexAleft0_Cr
+#define bTc0_h02_0_Cr 186 // Derived from bSh02_0 and bIndexAleft0_Cr
+#define bTc0_h03_0_Cr 187 // Derived from bSh03_0 and bIndexAleft0_Cr
+
+#define bTc0_h20_Cr 188 // Derived from bSh20 and bIndexAinternal_Cr Mid Horz
+#define bTc0_h21_Cr 189 // Derived from bSh21 and bIndexAinternal_Cr
+#define bTc0_h22_Cr 190 // Derived from bSh22 and bIndexAinternal_Cr
+#define bTc0_h23_Cr 191 // Derived from bSh23 and bIndexAinternal_Cr
+
+// GRF6
+#define bAlphaLeft0_Cb 192 // Derived from bIndexAleft0_Cb
+#define bBetaLeft0_Cb 193 // Derived from bIndexBleft0_Cb
+#define bAlphaTop0_Cb 194 // Derived from bIndexAtop0_Cb
+#define bBetaTop0_Cb 195 // Derived from bIndexBtop0_Cb
+
+#define bAlphaInternal_Cb 196 // Derived from bIndexAinternal_Cb
+#define bBetaInternal_Cb 197 // Derived from bIndexBinternal_Cb
+// Offset 198 - 199 not used
+
+#define bAlphaLeft0_Cr 200 // Derived from bIndexAleft0_Cr
+#define bBetaLeft0_Cr 201 // Derived from bIndexBleft0_Cr
+#define bAlphaTop0_Cr 202 // Derived from bIndexAtop0_Cr
+#define bBetaTop0_Cr 203 // Derived from bIndexBtop0_Cr
+
+#define bAlphaInternal_Cr 204 // Derived from bIndexAinternal_Cr
+#define bBetaInternal_Cr 205 // Derived from bIndexBinternal_Cr
+// Offset 206 - 223 not used
+
+// GRF7
+#define bAlphaLeft1_Cb 224 // Derived from bIndexAleft1_Cb Used in Mbaff mode only
+#define bBetaLeft1_Cb 225 // Derived from bIndexBleft1_Cb Used in Mbaff mode only
+#define bAlphaTop1_Cb 226 // Derived from bIndexAtop1_Cb Used in Mbaff mode only
+#define bBetaTop1_Cb 227 // Derived from bIndexBtop1_Cb Used in Mbaff mode only
+
+// Offset 228 - 231 not used
+
+#define bTc0_v00_1_Cb 232 // Derived from bSv00_1 and bIndexAleft1_Cb Used in Mbaff mode only
+#define bTc0_v10_1_Cb 233 // Derived from bSv10_1 and bIndexAleft1_Cb Used in Mbaff mode only
+#define bTc0_v20_1_Cb 234 // Derived from bSv20_1 and bIndexAleft1_Cb Used in Mbaff mode only
+#define bTc0_v30_1_Cb 235 // Derived from bSv30_1 and bIndexAleft1_Cb Used in Mbaff mode only
+
+#define bTc0_h00_1_Cb 236 // Derived from bSh00_1 and bIndexAleft1_Cb Used in Mbaff mode only
+#define bTc0_h01_1_Cb 237 // Derived from bSh01_1 and bIndexAleft1_Cb Used in Mbaff mode only
+#define bTc0_h02_1_Cb 238 // Derived from bSh02_1 and bIndexAleft1_Cb Used in Mbaff mode only
+#define bTc0_h03_1_Cb 239 // Derived from bSh03_1 and bIndexAleft1_Cb Used in Mbaff mode only
+
+#define bAlphaLeft1_Cr 240 // Derived from bIndexAleft1_Cr Used in Mbaff mode only
+#define bBetaLeft1_Cr 241 // Derived from bIndexBleft1_Cr Used in Mbaff mode only
+#define bAlphaTop1_Cr 242 // Derived from bIndexAtop1_Cr Used in Mbaff mode only
+#define bBetaTop1_Cr 243 // Derived from bIndexBtop1_Cr Used in Mbaff mode only
+
+// Offset 244 - 247 not used
+
+#define bTc0_v00_1_Cr 248 // Derived from bSv00_1 and bIndexAleft1_Cr Used in Mbaff mode only
+#define bTc0_v10_1_Cr 249 // Derived from bSv10_1 and bIndexAleft1_Cr Used in Mbaff mode only
+#define bTc0_v20_1_Cr 250 // Derived from bSv20_1 and bIndexAleft1_Cr Used in Mbaff mode only
+#define bTc0_v30_1_Cr 251 // Derived from bSv30_1 and bIndexAleft1_Cr Used in Mbaff mode only
+
+#define bTc0_h00_1_Cr 252 // Derived from bSh00_1 and bIndexAleft1_Cr Used in Mbaff mode only
+#define bTc0_h01_1_Cr 253 // Derived from bSh01_1 and bIndexAleft1_Cr Used in Mbaff mode only
+#define bTc0_h02_1_Cr 254 // Derived from bSh02_1 and bIndexAleft1_Cr Used in Mbaff mode only
+#define bTc0_h03_1_Cr 255 // Derived from bSh03_1 and bIndexAleft1_Cr Used in Mbaff mode only
+
+
+#else // _APPLE is defined
+
+//******** Crestline for Apple, progressive only, 88 bytes **********
+
+// GRF0
+#define HorizOrigin 0
+#define VertOrigin 1
+#define BitFlags 2 // Bit flags
+
+#define wEdgeCntlMap_IntLeftVert 4 // Derived from bbSinternalLeftVert, 1 bit per pixel
+#define wEdgeCntlMap_IntMidVert 6 // Derived from bbSinternalLeftVert
+#define wEdgeCntlMap_IntRightVert 8 // Derived from bbSinternalRightVert
+#define wEdgeCntlMap_IntTopHorz 10 // Derived from bbSinternalTopHorz, 1bit per pixel
+#define wEdgeCntlMap_IntMidHorz 12 // Derived from bbSinternalMidHorz
+#define wEdgeCntlMap_IntBotHorz 14 // Derived from bbSinternalBotHorz
+#define wEdgeCntlMapA_ExtLeftVert0 16 // Derived from wbSLeft0, 1bit per pixel
+#define wEdgeCntlMapB_ExtLeftVert0 18 // Derived from wbSLeft0
+#define wEdgeCntlMapA_ExtTopHorz0 20 // Derived from wbSTop0, 1bit per pixel
+#define wEdgeCntlMapB_ExtTopHorz0 22 // Derived from wbSTop0
+
+#define bAlphaLeft0_Y 24 // Derived from bIndexAleft0_Y
+#define bBetaLeft0_Y 25 // Derived from bIndexBleft0_Y
+#define bAlphaTop0_Y 26 // Derived from bIndexAtop0_Y
+#define bBetaTop0_Y 27 // Derived from bIndexBtop0_Y
+#define bAlphaInternal_Y 28 // Derived from bIndexAinternal_Y
+#define bBetaInternal_Y 29 // Derived from bIndexBinternal_Y
+
+// GRF1
+#define bTc0_v00_0_Y 32 // Derived from bSv00_0 and bIndexAleft0_Y, 4 pixels per tc0
+#define bTc0_v10_0_Y 33 // Derived from bSv10_0 and bIndexAleft0_Y
+#define bTc0_v20_0_Y 34 // Derived from bSv20_0 and bIndexAleft0_Y
+#define bTc0_v30_0_Y 35 // Derived from bSv30_0 and bIndexAleft0_Y
+#define bTc0_v01_Y 36 // Derived from bSv01 and bIndexAinternal_Y
+#define bTc0_v11_Y 37 // Derived from bSv11 and bIndexAinternal_Y
+#define bTc0_v21_Y 38 // Derived from bSv21 and bIndexAinternal_Y
+#define bTc0_v31_Y 39 // Derived from bSv31 and bIndexAinternal_Y
+#define bTc0_v02_Y 40 // Derived from bSv02 and bIndexAinternal_Y
+#define bTc0_v12_Y 41 // Derived from bSv12 and bIndexAinternal_Y
+#define bTc0_v22_Y 42 // Derived from bSv22 and bIndexAinternal_Y
+#define bTc0_v32_Y 43 // Derived from bSv32 and bIndexAinternal_Y
+#define bTc0_v03_Y 44 // Derived from bSv03 and bIndexAinternal_Y
+#define bTc0_v13_Y 45 // Derived from bSv13 and bIndexAinternal_Y
+#define bTc0_v23_Y 46 // Derived from bSv23 and bIndexAinternal_Y
+#define bTc0_v33_Y 47 // Derived from bSv33 and bIndexAinternal_Y
+
+#define bTc0_h00_0_Y 48 // Derived from bSh00_0 and bIndexAleft0_Y
+#define bTc0_h01_0_Y 49 // Derived from bSh01_0 and bIndexAleft0_Y
+#define bTc0_h02_0_Y 50 // Derived from bSh02_0 and bIndexAleft0_Y
+#define bTc0_h03_0_Y 51 // Derived from bSh03_0 and bIndexAleft0_Y
+#define bTc0_h10_Y 52 // Derived from bSh10 and bIndexAinternal_Y
+#define bTc0_h11_Y 53 // Derived from bSh11 and bIndexAinternal_Y
+#define bTc0_h12_Y 54 // Derived from bSh12 and bIndexAinternal_Y
+#define bTc0_h13_Y 55 // Derived from bSh13 and bIndexAinternal_Y
+#define bTc0_h20_Y 56 // Derived from bSh20 and bIndexAinternal_Y
+#define bTc0_h21_Y 57 // Derived from bSh21 and bIndexAinternal_Y
+#define bTc0_h22_Y 58 // Derived from bSh22 and bIndexAinternal_Y
+#define bTc0_h23_Y 59 // Derived from bSh23 and bIndexAinternal_Y
+#define bTc0_h30_Y 60 // Derived from bSh30 and bIndexAinternal_Y
+#define bTc0_h31_Y 61 // Derived from bSh31 and bIndexAinternal_Y
+#define bTc0_h32_Y 62 // Derived from bSh32 and bIndexAinternal_Y
+#define bTc0_h33_Y 63 // Derived from bSh33 and bIndexAinternal_Y
+
+// GRF2,
+#define bTc0_v00_0_Cb 64 // Derived from bSv00_0 and bIndexAleft0_Cb, 2 pixels per tc0 Left0
+#define bTc0_v10_0_Cb 65 // Derived from bSv10_0 and bIndexAleft0_Cb
+#define bTc0_v20_0_Cb 66 // Derived from bSv20_0 and bIndexAleft0_Cb
+#define bTc0_v30_0_Cb 67 // Derived from bSv30_0 and bIndexAleft0_Cb
+#define bTc0_v02_Cb 68 // Derived from bSv02 and bIndexAinternal_Cb MidVert
+#define bTc0_v12_Cb 69 // Derived from bSv12 and bIndexAinternal_Cb
+#define bTc0_v22_Cb 70 // Derived from bSv22 and bIndexAinternal_Cb
+#define bTc0_v32_Cb 71 // Derived from bSv32 and bIndexAinternal_Cb
+#define bTc0_h00_0_Cb 72 // Derived from bSh00_0 and bIndexAleft0_Cb Top0
+#define bTc0_h01_0_Cb 73 // Derived from bSh01_0 and bIndexAleft0_Cb
+#define bTc0_h02_0_Cb 74 // Derived from bSh02_0 and bIndexAleft0_Cb
+#define bTc0_h03_0_Cb 75 // Derived from bSh03_0 and bIndexAleft0_Cb
+#define bTc0_h20_Cb 76 // Derived from bSh20 and bIndexAinternal_Cb MidHorz
+#define bTc0_h21_Cb 77 // Derived from bSh21 and bIndexAinternal_Cb
+#define bTc0_h22_Cb 78 // Derived from bSh22 and bIndexAinternal_Cb
+#define bTc0_h23_Cb 79 // Derived from bSh23 and bIndexAinternal_Cb
+
+#define bAlphaLeft0_Cb 80 // Derived from bIndexAleft0_Cb
+#define bBetaLeft0_Cb 81 // Derived from bIndexBleft0_Cb
+#define bAlphaTop0_Cb 82 // Derived from bIndexAtop0_Cb
+#define bBetaTop0_Cb 83 // Derived from bIndexBtop0_Cb
+#define bAlphaInternal_Cb 84 // Derived from bIndexAinternal_Cb
+#define bBetaInternal_Cb 85 // Derived from bIndexBinternal_Cb
+
+#define ExtBitFlags 86 // Extended bit flags, such as disable ILDB bits
+
+// Shared between Cb and Cr
+#define bTc0_v00_0_Cr bTc0_v00_0_Cb
+#define bTc0_v10_0_Cr bTc0_v10_0_Cb
+#define bTc0_v20_0_Cr bTc0_v20_0_Cb
+#define bTc0_v30_0_Cr bTc0_v30_0_Cb
+#define bTc0_v02_Cr bTc0_v02_Cb
+#define bTc0_v12_Cr bTc0_v12_Cb
+#define bTc0_v22_Cr bTc0_v22_Cb
+#define bTc0_v32_Cr bTc0_v32_Cb
+#define bTc0_h00_0_Cr bTc0_h00_0_Cb
+#define bTc0_h01_0_Cr bTc0_h01_0_Cb
+#define bTc0_h02_0_Cr bTc0_h02_0_Cb
+#define bTc0_h03_0_Cr bTc0_h03_0_Cb
+#define bTc0_h20_Cr bTc0_h20_Cb
+#define bTc0_h21_Cr bTc0_h21_Cb
+#define bTc0_h22_Cr bTc0_h22_Cb
+#define bTc0_h23_Cr bTc0_h23_Cb
+
+#define bAlphaLeft0_Cr bAlphaLeft0_Cb
+#define bBetaLeft0_Cr bBetaLeft0_Cb
+#define bAlphaTop0_Cr bAlphaTop0_Cb
+#define bBetaTop0_Cr bBetaTop0_Cb
+#define bAlphaInternal_Cr bAlphaInternal_Cb
+#define bBetaInternal_Cr bBetaInternal_Cb
+
+
+#endif
+
+
+//========== End of Child Variables ===============================================================
+
+#if !defined(COMBINED_KERNEL)
+#define ILDB_LABEL(x) x // No symbol extension for standalone kernels
+#endif
+
+#endif // !defined(__AVC_ILDB_HEADER__)
diff --git a/src/shaders/h264/ildb/AVC_ILDB_Child_Field_UV.asm b/src/shaders/h264/ildb/AVC_ILDB_Child_Field_UV.asm new file mode 100644 index 00000000..b0986b57 --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_Child_Field_UV.asm @@ -0,0 +1,9 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+#include "AVC_ILDB_Child_UV.asm"
diff --git a/src/shaders/h264/ildb/AVC_ILDB_Child_Field_Y.asm b/src/shaders/h264/ildb/AVC_ILDB_Child_Field_Y.asm new file mode 100644 index 00000000..fafd6c05 --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_Child_Field_Y.asm @@ -0,0 +1,9 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+#include "AVC_ILDB_Child_Y.asm"
diff --git a/src/shaders/h264/ildb/AVC_ILDB_Child_Mbaff_UV.asm b/src/shaders/h264/ildb/AVC_ILDB_Child_Mbaff_UV.asm new file mode 100644 index 00000000..fd299814 --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_Child_Mbaff_UV.asm @@ -0,0 +1,173 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+//////////////////////////////////////////////////////////////////////////////////////////////////////////////
+// AVC Child Kernel (Vertical and horizontal de-block a 4:2:0 MB UV comp)
+//
+// First de-block vertical edges from left to right.
+// Second de-block horizontal edge from top to bottom.
+//
+// For 4:2:0, chroma is always de-blocked at 8x8.
+// NV12 format allows to filter U and V together.
+//
+//////////////////////////////////////////////////////////////////////////////////////////////////////////////
+#define AVC_ILDB
+
+.kernel AVC_ILDB_CHILD_MBAFF_UV
+#if defined(COMBINED_KERNEL)
+ILDB_LABEL(AVC_ILDB_CHILD_UV):
+#endif
+
+#include "SetupVPKernel.asm"
+#include "AVC_ILDB.inc"
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xE997:w
+#endif
+
+ // Setup temp buf used by load and save code
+ #define BUF_B RTempB
+ #define BUF_W RTempW
+ #define BUF_D RTempD
+
+ // Init local variables
+ mul (4) ORIX_CUR<2>:w ORIX<0;1,0>:w 16:w { NoDDClr } // Expand X addr to bytes, repeat 4 times
+ mul (4) ORIY_CUR<2>:w ORIY<0;1,0>:w 32:w { NoDDChk } // Expand Y addr to bytes, repeat 4 times
+
+ mov (2) f0.0<1>:w 0:w
+
+ mov (1) GateWayOffsetC:uw ORIY:uw // Use row # as Gateway offset
+
+ //=== Null Kernel ===============================================================
+// jmpi ILDB_LABEL(POST_ILDB_UV)
+ //===============================================================================
+
+ //====================================================================================
+ // Assuming the MB control data is laid out in scan line order in a rectangle with width = 16 bytes.
+ // Control data has dimension of X x Y = 16 x N bytes, where N = W x H / 16
+ // Each MB has 256 bytes of control data
+
+ // For CRESTLINE, 256 bytes are stored in memory and fetched into GRF.
+ // MB_offset = MBsCntX * CurRow + CurCol
+ // Byte_offset = MB_offset * (256 << Mbaff_flag), Mbaff_flag = 0 or 1.
+ // Base address of a control data block = (x, y) = (0, y'=y/x), region width is 16 bytes
+ // where y' = Byte_offset / 16 = MB_offset * (16 << Mbaff_flag)
+ // MBCntrlDataOffsetY holds y'.
+
+ // For BearLake-C, 64 bytes are stored in memory and dataport expands to 256 bytes. Need to use a special read command on BL-C.
+ // MB_offset = MBsCntX * CurRow + CurCol
+ // Byte_offset = MB_offset * (64 << Mbaff_flag), Mbaff_flag = 0 or 1.
+ // MBCntrlDataOffsetY holds globel byte offset.
+
+#if !defined(DEV_CL)
+ mul (1) CntrlDataOffsetY:ud MBsCntX:w ORIY:w
+ add (1) CntrlDataOffsetY:ud CntrlDataOffsetY:ud ORIX:w
+ mul (1) CntrlDataOffsetY:ud CntrlDataOffsetY:ud 128:uw
+#endif
+ //====================================================================================
+
+ add (1) ORIX_LEFT:w ORIX_LEFT:w -4:w
+ add (1) ORIY_TOP:w ORIY_TOP:w -4:w
+
+ //=========== Process Top MB ============
+ and (1) BitFields:w BitFields:w TopFieldFlag:w // Reset BotFieldFlag
+
+ // Build a ramp from 0 to 15
+ mov (16) RRampW(0)<1> RampConstC<0;8,1>:ub
+ add (8) RRampW(0,8)<1> RRampW(0,8) 8:w // RRampW = ramp 15-0
+
+ILDB_LABEL(RE_ENTRY_UV): // for bootom field
+
+ // Load current MB control data
+#if defined(DEV_CL)
+ #include "Load_ILDB_Cntrl_Data_64DW.asm" // Crestline
+#else
+ #include "Load_ILDB_Cntrl_Data_16DW.asm" // Cantiga and beyond
+#endif
+
+ // Init addr register for vertical control data
+ mov (1) ECM_AddrReg<1>:w CNTRL_DATA_BASE:w // Init ECM_AddrReg
+
+ // Use free cycles here
+ // Check loaded control data
+ and.z.f0.1 (16) null<1>:uw r[ECM_AddrReg, wEdgeCntlMap_IntLeftVert]<16;16,1>:uw 0xFFFF:uw // Skip ILDB?
+ and.nz.f0.0 (1) null:w r[ECM_AddrReg, ExtBitFlags]:ub DISABLE_ILDB_FLAG:w // Skip ILDB?
+
+ // Set DualFieldMode for all data read, write and deblocking
+ and (1) CTemp1_W:uw r[ECM_AddrReg, BitFlags]:ub FieldModeAboveMbFlag+FieldModeCurrentMbFlag:uw
+
+ // Get Vert Edge Pattern (frame vs. field MBs)
+ and (1) VertEdgePattern:uw r[ECM_AddrReg, BitFlags]:ub FieldModeLeftMbFlag+FieldModeCurrentMbFlag:uw
+
+ (f0.1.all16h) jmpi ILDB_LABEL(SKIP_ILDB_UV) // Skip ILDB
+ (f0.0) jmpi ILDB_LABEL(SKIP_ILDB_UV) // Skip ILDB
+
+ // Set DualFieldMode for all data read, write and deblocking
+// and (1) CTemp1_W:uw r[ECM_AddrReg, BitFlags]:ub FieldModeAboveMbFlag+FieldModeCurrentMbFlag:uw
+ cmp.z.f0.0 (1) null:w CTemp1_W:uw ABOVE_FIELD_CUR_FRAME:w
+ and (1) DualFieldMode:w f0.0:w 0x0001:w
+
+ #include "load_Cur_UV_8x8T_Mbaff.asm" // Load transposed data 8x8
+ #include "load_Left_UV_2x8T_Mbaff.asm" // Load left MB (2x8) UV data from memory if exists
+
+ #include "Transpose_Cur_UV_8x8.asm"
+ #include "Transpose_Left_UV_2x8.asm"
+
+
+ //---------- Perform vertical ILDB filting on UV ----------
+ #include "AVC_ILDB_Filter_Mbaff_UV_v.asm"
+ //---------------------------------------------------------
+
+ #include "save_Left_UV_8x2T_Mbaff.asm" // Write left MB (2x8) Y data to memory if exists
+ #include "load_Top_UV_8x2_Mbaff.asm" // Load top MB (8x2) Y data from memory if exists
+
+ #include "Transpose_Cur_UV_8x8.asm" // Transpose a MB for horizontal edge de-blocking
+
+ //---------- Perform horizontal ILDB filting on UV ----------
+ #include "AVC_ILDB_Filter_Mbaff_UV_h.asm"
+ //-----------------------------------------------------------
+
+ #include "save_Cur_UV_8x8_Mbaff.asm" // Write 8x8
+ #include "save_Top_UV_8x2_Mbaff.asm" // Write top MB (8x2) if not the top row
+
+ //-----------------------------------------------------------
+ILDB_LABEL(SKIP_ILDB_UV):
+
+ and.z.f0.0 (1) null:w BitFields:w BotFieldFlag:w
+
+ //=========== Process Bottom MB ============
+ or (1) BitFields:w BitFields:w BotFieldFlag:w // Set BotFieldFlag to 1
+ (f0.0) jmpi ILDB_LABEL(RE_ENTRY_UV) // Loop back for bottom deblocking
+
+ // Fall through to finish
+
+ //=========== Check write commit of the last write ============
+ mov (8) WritebackResponse(0)<1> WritebackResponse(0)
+
+ILDB_LABEL(POST_ILDB_UV):
+
+ // Send notification thru Gateway to root thread, update chroma Status[CurRow]
+ #include "AVC_ILDB_ForwardMsg.asm"
+
+#if !defined(GW_DCN) // For non-ILK chipsets
+ //child send EOT : Request type = 1
+ END_CHILD_THREAD
+#endif // !defined(DEV_ILK)
+
+ // The thread finishs here
+ //------------------------------------------------------------------------------
+
+ ////////////////////////////////////////////////////////////////////////////////
+ // Include other subrutines being called
+ #include "AVC_ILDB_Chroma_Core_Mbaff.asm"
+
+#if !defined(COMBINED_KERNEL) // For standalone kernel only
+.end_code
+
+.end_kernel
+#endif
diff --git a/src/shaders/h264/ildb/AVC_ILDB_Child_Mbaff_Y.asm b/src/shaders/h264/ildb/AVC_ILDB_Child_Mbaff_Y.asm new file mode 100644 index 00000000..f4e23a7f --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_Child_Mbaff_Y.asm @@ -0,0 +1,188 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+//////////////////////////////////////////////////////////////////////////////////////////////////////////////
+// AVC Child Kernel (Vertical and horizontal de-block a 4:2:0 MB Y comp)
+//
+// First, de-block vertical edges from left to right.
+// Second, de-block horizontal edge from top to bottom.
+//
+// ***** MBAFF Mode *****
+// This version deblocks top MB first, followed by bottom MB.
+//
+// Need variable CurMB to indicate top MB or bottom MB (CurMB = 0 or 1).
+// We can use BotFieldFlag in BitFields to represent it.
+//
+// Usage:
+// 1) Access control data for top
+// CntrlDataOffsetY + CurMB * Control data block size (64 DWs for CL, 16 DWs for BLC)
+//
+// 2) Load frame/field video data based on flags: FieldModeCurrentMbFlag, FieldModeLeftMbFlag, FieldModeaboveMbFlag,
+//
+// E.g.
+// if (pCntlData->BitField & FieldModeCurrentMbFlag)
+// cur_y = ORIX_CUR.y + CurMB * 1; // Add field vertical offset for bot field MB .
+// else
+// cur_y = ORIX_CUR.y + CurMB * MB_Rows_Y; // Add bottom MB vertical offset for bot MB
+//
+//
+//////////////////////////////////////////////////////////////////////////////////////////////////////////////
+#define AVC_ILDB
+
+.kernel AVC_ILDB_CHILD_MBAFF_Y
+#if defined(COMBINED_KERNEL)
+ILDB_LABEL(AVC_ILDB_CHILD_Y):
+#endif
+
+#include "SetupVPKernel.asm"
+#include "AVC_ILDB.inc"
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xE998:w
+#endif
+
+ // Setup temp buf used by load and save code
+ #define BUF_B RTempB
+ #define BUF_D RTempD
+
+ // Init local variables
+ // These coordinates are in progressive fashion
+ mul (4) ORIX_CUR<2>:w ORIX<0;1,0>:w 16:w { NoDDClr } // Expand X addr to bytes, repeat 4 times
+ mul (4) ORIY_CUR<2>:w ORIY<0;1,0>:w 32:w { NoDDChk } // Expand Y addr to bytes, repeat 4 times
+
+ mov (2) f0.0<1>:w 0:w
+
+ mov (1) GateWayOffsetC:uw ORIY:uw // Use row # as Gateway offset
+
+ //=== Null Kernel ===============================================================
+// jmpi POST_ILDB
+ //===============================================================================
+
+ //====================================================================================
+ // Assuming the MB control data is laid out in scan line order in a rectangle with width = 16 bytes.
+ // Control data has dimension of X x Y = 16 x N bytes, where N = W x H / 16
+ // Each MB has 256 bytes of control data
+
+ // For CRESTLINE, 256 bytes are stored in memory and fetched into GRF.
+ // MB_offset = MBsCntX * CurRow + CurCol
+ // Byte_offset = MB_offset * (256 << Mbaff_flag), Mbaff_flag = 0 or 1.
+ // Base address of a control data block = (x, y) = (0, y'=y/x), region width is 16 bytes
+ // where y' = Byte_offset / 16 = MB_offset * (16 << Mbaff_flag)
+ // MBCntrlDataOffsetY holds y'.
+
+ // For BearLake-C, 64 bytes are stored in memory and dataport expands to 256 bytes. Need to use a special read command on BL-C.
+ // MB_offset = MBsCntX * CurRow + CurCol
+ // Byte_offset = MB_offset * (64 << Mbaff_flag), Mbaff_flag = 0 or 1.
+ // MBCntrlDataOffsetY holds globel byte offset.
+
+#if !defined(DEV_CL)
+ mul (1) CntrlDataOffsetY:ud MBsCntX:w ORIY:w
+ add (1) CntrlDataOffsetY:ud CntrlDataOffsetY:ud ORIX:w
+ mul (1) CntrlDataOffsetY:ud CntrlDataOffsetY:ud 128:uw
+#endif
+
+ //====================================================================================
+
+ add (1) ORIX_LEFT:w ORIX_LEFT:w -4:w
+ add (1) ORIY_TOP:w ORIY_TOP:w -4:w
+
+
+ //=========== Process Top MB ============
+ and (1) BitFields:w BitFields:w TopFieldFlag:w // Reset BotFieldFlag
+
+RE_ENTRY: // for bootom field
+
+ // Load current MB control data
+#if defined(DEV_CL)
+ #include "Load_ILDB_Cntrl_Data_64DW.asm" // Crestline
+#else
+ #include "Load_ILDB_Cntrl_Data_16DW.asm" // Cantiga and beyond
+#endif
+
+ // Init addr register for vertical control data
+ mov (1) ECM_AddrReg<1>:w CNTRL_DATA_BASE:w // Init edge control map AddrReg
+
+ // Check loaded control data
+ and.z.f0.1 (16) null<1>:uw r[ECM_AddrReg, wEdgeCntlMap_IntLeftVert]<16;16,1>:uw 0xFFFF:uw // Skip ILDB?
+ and.nz.f0.0 (1) null:w r[ECM_AddrReg, ExtBitFlags]:ub DISABLE_ILDB_FLAG:w // Skip ILDB?
+
+ // Use free cycles here
+ // Set DualFieldMode for all data read, write and deblocking
+ and (1) CTemp1_W:uw r[ECM_AddrReg, BitFlags]:ub FieldModeAboveMbFlag+FieldModeCurrentMbFlag:uw
+
+ // Get Vert Edge Pattern (frame vs. field MBs)
+ and (1) VertEdgePattern:uw r[ECM_AddrReg, BitFlags]:ub FieldModeLeftMbFlag+FieldModeCurrentMbFlag:uw
+
+ (f0.1.all16h) jmpi SKIP_ILDB // Skip ILDB
+ (f0.0) jmpi SKIP_ILDB // Skip ILDB
+
+ // Set DualFieldMode for all data read, write and deblocking
+// and (1) CTemp1_W:uw r[ECM_AddrReg, BitFlags]:ub FieldModeAboveMbFlag+FieldModeCurrentMbFlag:uw
+ cmp.z.f0.0 (1) null:w CTemp1_W:uw ABOVE_FIELD_CUR_FRAME:w
+ and (1) DualFieldMode:w f0.0:w 0x0001:w
+
+ // Load current MB // DDD1
+ #include "load_Cur_Y_16x16T_Mbaff.asm" // Load cur Y, 16x16, transpose
+ #include "load_Left_Y_4x16T_Mbaff.asm" // Load left MB (4x16) Y data from memory if exists
+
+ #include "Transpose_Cur_Y_16x16.asm"
+ #include "Transpose_Left_Y_4x16.asm"
+
+ //---------- Perform vertical ILDB filting on Y----------
+ #include "AVC_ILDB_Filter_Mbaff_Y_v.asm"
+ //-------------------------------------------------------
+
+ #include "save_Left_Y_16x4T_Mbaff.asm" // Write left MB (4x16) Y data to memory if exists
+ #include "load_Top_Y_16x4_Mbaff.asm" // Load top MB (16x4) Y data from memory if exists
+ #include "Transpose_Cur_Y_16x16.asm" // Transpose a MB for horizontal edge de-blocking
+
+ //---------- Perform horizontal ILDB filting on Y ----------
+ #include "AVC_ILDB_Filter_Mbaff_Y_h.asm"
+ //----------------------------------------------------------
+
+ #include "save_Cur_Y_16x16_Mbaff.asm" // Write cur MB (16x16)
+ #include "save_Top_Y_16x4_Mbaff.asm" // Write top MB (16x4) if not the top row
+
+SKIP_ILDB:
+ //----------------------------------------------------------
+ and.z.f0.0 (1) null:w BitFields:w BotFieldFlag:w
+
+ //=========== Process Bottom MB ============
+ or (1) BitFields:w BitFields:w BotFieldFlag:w // Set BotFieldFlag to 1
+ (f0.0) jmpi RE_ENTRY // Loop back for bottom deblocking
+
+ // Fall through to finish
+
+ //=========== Check write commit of the last write ============
+ mov (8) WritebackResponse(0)<1> WritebackResponse(0)
+
+POST_ILDB:
+
+ //---------------------------------------------------------------------------
+ // Send notification thru Gateway to root thread, update luma Status[CurRow]
+
+ #include "AVC_ILDB_ForwardMsg.asm"
+
+#if !defined(GW_DCN) // For non-ILK chipsets
+ //child send EOT : Request type = 1
+ END_CHILD_THREAD
+#endif // !defined(DEV_ILK)
+
+ // The thread finishs here
+ //------------------------------------------------------------------------------
+
+
+ ////////////////////////////////////////////////////////////////////////////////
+ // Include other subrutines being called
+ #include "AVC_ILDB_Luma_Core_Mbaff.asm"
+
+#if !defined(COMBINED_KERNEL) // For standalone kernel only
+.end_code
+
+.end_kernel
+#endif
diff --git a/src/shaders/h264/ildb/AVC_ILDB_Child_UV.asm b/src/shaders/h264/ildb/AVC_ILDB_Child_UV.asm new file mode 100644 index 00000000..4f411a12 --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_Child_UV.asm @@ -0,0 +1,186 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+//////////////////////////////////////////////////////////////////////////////////////////////////////////////
+// AVC Child Kernel (Vertical and horizontal de-block a 4:2:0 MB UV comp)
+//
+// First de-block vertical edges from left to right.
+// Second de-block horizontal edge from top to bottom.
+//
+// For 4:2:0, chroma is always de-blocked at 8x8.
+// NV12 format allows to filter U and V together.
+//
+//////////////////////////////////////////////////////////////////////////////////////////////////////////////
+#define AVC_ILDB
+
+.kernel AVC_ILDB_CHILD_UV
+#if defined(COMBINED_KERNEL)
+ILDB_LABEL(AVC_ILDB_CHILD_UV):
+#endif
+
+#include "SetupVPKernel.asm"
+#include "AVC_ILDB.inc"
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0x9997:w
+#endif
+
+ // Init local variables
+ shl (8) ORIX_CUR<1>:w ORIX<0;2,1>:w 4:w // Expand addr to bytes, repeat (x,y) 4 times
+
+ // Init addr register for vertical control data
+ mov (1) ECM_AddrReg<1>:w CNTRL_DATA_BASE:w // Init ECM_AddrReg
+
+ //=== Null Kernel ===============================================================
+// jmpi ILDB_LABEL(POST_ILDB_UV_UV)
+ //===============================================================================
+
+#if defined(DEV_CL)
+ mov (1) acc0.0:w 240:w
+#else
+ //====================================================================================
+ // For BearLake-C, 64 bytes are stored in memory and dataport expands to 256 bytes. Need to use a special read command on BL-C.
+ // MB_offset = MBsCntX * CurRow + CurCol
+ // MBCntrlDataOffsetY = globel_byte_offset = MB_offset * 64
+ mul (1) CntrlDataOffsetY:ud MBsCntX:w ORIY:w
+ add (1) CntrlDataOffsetY:ud CntrlDataOffsetY:ud ORIX:w
+
+ // Assign to MSGSRC.2:ud for memory access
+ // mul (1) CntrlDataOffsetY:ud CntrlDataOffsetY:ud 64:uw
+ mul (1) MSGSRC.2:ud CntrlDataOffsetY:ud 64:uw
+
+ mov (1) acc0.0:w 320:w
+#endif
+ mac (1) URBOffsetC:w ORIY:w 4:w // UV URB entries are right after Y entries
+
+
+ // Init local variables
+// shl (8) ORIX_CUR<1>:w ORIX<0;2,1>:w 4:w // Expand addr to bytes, repeat (x,y) 4 times
+ add (1) ORIX_LEFT:w ORIX_LEFT:w -4:w
+ add (1) ORIY_TOP:w ORIY_TOP:w -4:w
+
+ // Build a ramp from 0 to 15
+ mov (16) RRampW(0)<1> RampConstC<0;8,1>:ub
+ add (8) RRampW(0,8)<1> RRampW(0,8) 8:w // RRampW = ramp 15-0
+
+ // Load current MB control data
+#if defined(DEV_CL)
+ #if defined(_APPLE)
+ #include "Load_ILDB_Cntrl_Data_22DW.asm" // Crestline for Apple, progressive only
+ #else
+ #include "Load_ILDB_Cntrl_Data_64DW.asm" // Crestline
+ #endif
+#else
+ #include "Load_ILDB_Cntrl_Data_16DW.asm" // Cantiga and beyond
+#endif
+
+ // Check loaded control data
+ #if defined(_APPLE)
+ and.z.f0.1 (8) null<1>:uw r[ECM_AddrReg, wEdgeCntlMap_IntLeftVert]<8;8,1>:uw 0xFFFF:uw // Skip ILDB?
+ (f0.1) and.z.f0.1 (2) null<1>:uw r[ECM_AddrReg, wEdgeCntlMapA_ExtTopHorz0]<2;2,1>:uw 0xFFFF:uw // Skip ILDB?
+ #else
+ and.z.f0.1 (16) null<1>:uw r[ECM_AddrReg, wEdgeCntlMap_IntLeftVert]<16;16,1>:uw 0xFFFF:uw // Skip ILDB?
+ #endif
+
+ and.nz.f0.0 (1) null:w r[ECM_AddrReg, ExtBitFlags]:ub DISABLE_ILDB_FLAG:w // Skip ILDB?
+
+ mov (1) GateWayOffsetC:uw ORIY:uw // Use row # as Gateway offset
+
+ #if defined(_APPLE)
+ (f0.1.all8h) jmpi ILDB_LABEL(READ_FOR_URB_UV) // Skip ILDB
+ #else
+ (f0.1.all16h) jmpi ILDB_LABEL(READ_FOR_URB_UV) // Skip ILDB
+ #endif
+
+ (f0.0) jmpi ILDB_LABEL(READ_FOR_URB_UV) // Skip ILDB
+
+
+
+ #include "load_Cur_UV_8x8T.asm" // Load transposed data 8x8
+// #include "load_Left_UV_2x8T.asm"
+ #include "load_Top_UV_8x2.asm" // Load top MB (8x2) Y data from memory if exists
+
+ #include "Transpose_Cur_UV_8x8.asm"
+// #include "Transpose_Left_UV_2x8.asm"
+
+
+ //---------- Perform vertical ILDB filting on UV ----------
+ #include "AVC_ILDB_Filter_UV_v.asm"
+ //---------------------------------------------------------
+
+ #include "save_Left_UV_8x2T.asm" // Write left MB (2x8) Y data to memory if exists
+ #include "Transpose_Cur_UV_8x8.asm" // Transpose a MB for horizontal edge de-blocking
+
+ //---------- Perform horizontal ILDB filting on UV ----------
+ #include "AVC_ILDB_Filter_UV_h.asm"
+ //-----------------------------------------------------------
+
+ #include "save_Cur_UV_8x8.asm" // Write 8x8
+ #include "save_Top_UV_8x2.asm" // Write top MB (8x2) if not the top row
+
+ //---------- Write right most 4 columns of cur MB to URB ----------
+ // Transpose the right most 2 cols 2x8 (word) in GRF to 8x2 in BUF_D. It is 2 left most cols in cur MB.
+ #include "Transpose_Cur_UV_2x8.asm"
+
+ILDB_LABEL(WRITE_URB_UV):
+ mov (8) m1<1>:ud LEFT_TEMP_D(1)<8;8,1> // Copy 1 GRF to 1 URB entry (U+V)
+
+ #include "writeURB_UV_Child.asm"
+ //-----------------------------------------------------------------
+
+ //=========== Check write commit of the last write ============
+ mov (8) WritebackResponse(0)<1> WritebackResponse(0)
+
+ILDB_LABEL(POST_ILDB_UV):
+ //---------------------------------
+
+ // Send notification thru Gateway to root thread, update chroma Status[CurRow]
+ #include "AVC_ILDB_ForwardMsg.asm"
+
+#if !defined(GW_DCN) // For non-ILK chipsets
+ //child send EOT : Request type = 1
+ END_CHILD_THREAD
+#endif // !defined(DEV_ILK)
+
+ // The thread finishs here
+ //------------------------------------------------------------------------------
+
+ILDB_LABEL(READ_FOR_URB_UV):
+ // Still need to prepare URB data for the right neighbor MB
+ #include "load_Cur_UV_Right_Most_2x8.asm" // Load cur MB ( right most 4x16) Y data from memory
+ #include "Transpose_Cur_UV_Right_Most_2x8.asm"
+// jmpi ILDB_LABEL(WRITE_URB_UV)
+
+ mov (8) m1<1>:ud LEFT_TEMP_D(1)<8;8,1> // Copy 1 GRF to 1 URB entry (U+V)
+
+ #include "writeURB_UV_Child.asm"
+ //-----------------------------------------------------------------
+
+ // Send notification thru Gateway to root thread, update chroma Status[CurRow]
+ #include "AVC_ILDB_ForwardMsg.asm"
+
+#if !defined(GW_DCN) // For non-ILK chipsets
+ //child send EOT : Request type = 1
+ END_CHILD_THREAD
+#endif // !defined(DEV_ILK)
+
+ // The thread finishs here
+ //------------------------------------------------------------------------------
+
+
+ ////////////////////////////////////////////////////////////////////////////////
+ // Include other subrutines being called
+// #include "AVC_ILDB_Luma_Core.asm"
+ #include "AVC_ILDB_Chroma_Core.asm"
+
+
+#if !defined(COMBINED_KERNEL) // For standalone kernel only
+.end_code
+
+.end_kernel
+#endif
diff --git a/src/shaders/h264/ildb/AVC_ILDB_Child_Y.asm b/src/shaders/h264/ildb/AVC_ILDB_Child_Y.asm new file mode 100644 index 00000000..e19a0b85 --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_Child_Y.asm @@ -0,0 +1,176 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+//////////////////////////////////////////////////////////////////////////////////////////////////////////////
+// AVC Child Kernel (Vertical and horizontal de-block a 4:2:0 MB Y comp)
+//
+// First, de-block vertical edges from left to right.
+// Second, de-block horizontal edge from top to bottom.
+//
+// If transform_size_8x8_flag = 1, luma is de-blocked at 8x8. Otherwise, luma is de-blocked at 4x4.
+//
+//////////////////////////////////////////////////////////////////////////////////////////////////////////////
+#define AVC_ILDB
+
+.kernel AVC_ILDB_CHILD_Y
+#if defined(COMBINED_KERNEL)
+ILDB_LABEL(AVC_ILDB_CHILD_Y):
+#endif
+
+#include "SetupVPKernel.asm"
+#include "AVC_ILDB.inc"
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0x9998:w
+#endif
+
+ // Init local variables
+ shl (8) ORIX_CUR<1>:w ORIX<0;2,1>:w 4:w // Expand addr to bytes, repeat (x,y) 4 times
+
+ // Init addr register for vertical control data
+ mov (1) ECM_AddrReg<1>:w CNTRL_DATA_BASE:w // Init edge control map AddrReg
+
+ //=== Null Kernel ===============================================================
+// jmpi ILDB_LABEL(POST_ILDB_Y)
+ //===============================================================================
+
+ mul (1) URBOffsetC:uw ORIY:uw 4:w
+
+#if !defined(DEV_CL)
+ //====================================================================================
+ // For BearLake-C, 64 bytes are stored in memory and dataport expands to 256 bytes. Need to use a special read command on BL-C.
+ // MB_offset = MBsCntX * CurRow + CurCol
+ // MBCntrlDataOffsetY = globel_byte_offset = MB_offset * 64
+ mul (1) CntrlDataOffsetY:ud MBsCntX:w ORIY:w
+ add (1) CntrlDataOffsetY:ud CntrlDataOffsetY:ud ORIX:w
+
+ // Assign to MSGSRC.2:ud for memory access
+ // mul (1) CntrlDataOffsetY:ud CntrlDataOffsetY:ud 64:uw
+ mul (1) MSGSRC.2:ud CntrlDataOffsetY:ud 64:uw
+
+#endif
+
+ // Load current MB control data
+#if defined(DEV_CL)
+ #if defined(_APPLE)
+ #include "Load_ILDB_Cntrl_Data_22DW.asm" // Crestline for Apple, progressive only
+ #else
+ #include "Load_ILDB_Cntrl_Data_64DW.asm" // Crestline
+ #endif
+#else
+ #include "Load_ILDB_Cntrl_Data_16DW.asm" // Cantiga and beyond
+#endif
+
+ // Check loaded control data
+ #if defined(_APPLE)
+ and.z.f0.1 (8) null<1>:uw r[ECM_AddrReg, wEdgeCntlMap_IntLeftVert]<8;8,1>:uw 0xFFFF:uw // Skip ILDB?
+ (f0.1) and.z.f0.1 (2) null<1>:uw r[ECM_AddrReg, wEdgeCntlMapA_ExtTopHorz0]<2;2,1>:uw 0xFFFF:uw // Skip ILDB?
+ #else
+ and.z.f0.1 (16) null<1>:uw r[ECM_AddrReg, wEdgeCntlMap_IntLeftVert]<16;16,1>:uw 0xFFFF:uw // Skip ILDB?
+ #endif
+
+ and.nz.f0.0 (1) null:w r[ECM_AddrReg, ExtBitFlags]:ub DISABLE_ILDB_FLAG:w // Skip ILDB?
+
+ // Use free cycles here
+ add (1) ORIX_LEFT:w ORIX_LEFT:w -4:w
+// add (1) ORIY_TOP:w ORIY_TOP:w -4:w
+ mov (1) GateWayOffsetC:uw ORIY:uw // Use row # as Gateway offset
+
+ #if defined(_APPLE)
+ (f0.1.all8h) jmpi ILDB_LABEL(READ_FOR_URB_Y) // Skip ILDB
+ #else
+ (f0.1.all16h) jmpi ILDB_LABEL(READ_FOR_URB_Y) // Skip ILDB
+ #endif
+
+ (f0.0) jmpi ILDB_LABEL(READ_FOR_URB_Y) // Skip ILDB
+
+ add (1) ORIY_TOP:w ORIY_TOP:w -4:w
+
+ // Bettr performance is observed if boundary MBs are not checked and skipped.
+
+ #include "load_Cur_Y_16x16T.asm" // Load cur MB Y, 16x16, transpose
+// #include "load_Left_Y_4x16T.asm" // Load left MB (4x16) Y data from memory
+ #include "load_Top_Y_16x4.asm" // Load top MB (16x4) Y data from memory
+
+ #include "Transpose_Cur_Y_16x16.asm"
+// #include "Transpose_Left_Y_4x16.asm"
+
+ //---------- Perform vertical ILDB filting on Y ---------
+ #include "AVC_ILDB_Filter_Y_v.asm"
+ //-------------------------------------------------------
+
+ #include "save_Left_Y_16x4T.asm" // Write left MB (4x16) Y data to memory
+ #include "Transpose_Cur_Y_16x16.asm" // Transpose a MB for horizontal edge de-blocking
+
+ //---------- Perform horizontal ILDB filting on Y -------
+ #include "AVC_ILDB_Filter_Y_h.asm"
+ //-------------------------------------------------------
+
+ #include "save_Cur_Y_16x16.asm" // Write cur MB (16x16)
+ #include "save_Top_Y_16x4.asm" // Write top MB (16x4)
+
+ //---------- Write right most 4 columns of cur MB to URB ----------
+ // Transpose the right most 4 cols 4x16 in GRF to 16x4 in LEFT_TEMP_B. It is 4 left most cols in cur MB.
+ #include "Transpose_Cur_Y_4x16.asm"
+
+ILDB_LABEL(WRITE_URB_Y):
+ // Note: LEFT_TEMP_B(2) = TOP_TEMP_B(0), TOP_TEMP_B must be avail
+ mov (16) m1<1>:ud LEFT_TEMP_D(2)<8;8,1> // Copy 2 GRFs to 2 URB entries (Y)
+
+ #include "writeURB_Y_Child.asm"
+ //-----------------------------------------------------------------
+
+ //=========== Check write commit of the last write ============
+ mov (8) WritebackResponse(0)<1> WritebackResponse(0)
+
+ILDB_LABEL(POST_ILDB_Y):
+ // Send notification thru Gateway to root thread, update luma Status[CurRow]
+ #include "AVC_ILDB_ForwardMsg.asm"
+
+#if !defined(GW_DCN) // For non-ILK chipsets
+ //child send EOT : Request type = 1
+ END_CHILD_THREAD
+#endif // !defined(DEV_ILK)
+
+ // The thread finishs here
+ //------------------------------------------------------------------------------
+
+ILDB_LABEL(READ_FOR_URB_Y):
+ // Still need to prepare URB data for the right neighbor MB
+ #include "load_Cur_Y_Right_Most_4x16.asm" // Load cur MB ( right most 4x16) Y data from memory
+ #include "Transpose_Cur_Y_Right_Most_4x16.asm"
+// jmpi ILDB_LABEL(WRITE_URB_Y)
+
+ // Note: LEFT_TEMP_B(2) = TOP_TEMP_B(0), TOP_TEMP_B must be avail
+ mov (16) m1<1>:ud LEFT_TEMP_D(2)<8;8,1> // Copy 2 GRFs to 2 URB entries (Y)
+
+ #include "writeURB_Y_Child.asm"
+ //-----------------------------------------------------------------
+
+ // Send notification thru Gateway to root thread, update luma Status[CurRow]
+ #include "AVC_ILDB_ForwardMsg.asm"
+
+#if !defined(GW_DCN) // For non-ILK chipsets
+ //child send EOT : Request type = 1
+ END_CHILD_THREAD
+#endif // !defined(DEV_ILK)
+
+ // The thread finishs here
+ //------------------------------------------------------------------------------
+
+ ////////////////////////////////////////////////////////////////////////////////
+ // Include other subrutines being called
+ #include "AVC_ILDB_Luma_Core.asm"
+// #include "AVC_ILDB_Chroma_Core.asm"
+
+
+#if !defined(COMBINED_KERNEL) // For standalone kernel only
+.end_code
+
+.end_kernel
+#endif
diff --git a/src/shaders/h264/ildb/AVC_ILDB_Chroma_Core.asm b/src/shaders/h264/ildb/AVC_ILDB_Chroma_Core.asm new file mode 100644 index 00000000..e33d0229 --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_Chroma_Core.asm @@ -0,0 +1,165 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+#if !defined(__AVC_ILDB_CHROMA_CORE__) // Make sure this file is only included once
+#define __AVC_ILDB_CHROMA_CORE__
+
+////////// AVC ILDB Chroma Core /////////////////////////////////////////////////////////////////////////////////
+//
+// This core performs AVC U or V ILDB filtering on one horizontal edge (8 pixels) of a MB.
+// If data is transposed, it can also de-block a vertical edge.
+//
+// Bafore calling this subroutine, caller needs to set the following parameters.
+//
+// - EdgeCntlMap1 // Edge control map A
+// - EdgeCntlMap2 // Edge control map B
+// - P_AddrReg // Src and dest address register for P pixels
+// - Q_AddrReg // Src and dest address register for Q pixels
+// - alpha // alpha corresponding to the edge to be filtered
+// - beta // beta corresponding to the edge to be filtered
+// - tc0 // tc0 corresponding to the edge to be filtered
+//
+// U or V:
+// +----+----+----+----+
+// | P1 | p0 | q0 | q1 |
+// +----+----+----+----+
+//
+// p1 = r[P_AddrReg, 0]<16;8,2>
+// p0 = r[P_AddrReg, 16]<16;8,2>
+// q0 = r[Q_AddrReg, 0]<16;8,2>
+// q1 = r[Q_AddrReg, 16]<16;8,2>
+//
+/////////////////////////////////////////////////////////////////////////////////////////////////////////////////
+
+// The region is both src and dest
+// P0-P3 and Q0-Q3 should be only used if they have not been modified to new values
+#undef P1
+#undef P0
+#undef Q0
+#undef Q1
+
+#define P1 r[P_AddrReg, 0]<16;8,2>:ub
+#define P0 r[P_AddrReg, 16]<16;8,2>:ub
+#define Q0 r[Q_AddrReg, 0]<16;8,2>:ub
+#define Q1 r[Q_AddrReg, 16]<16;8,2>:ub
+
+// New region as dest
+#undef NewP0
+#undef NewQ0
+
+#define NewP0 r[P_AddrReg, 16]<2>:ub
+#define NewQ0 r[Q_AddrReg, 0]<2>:ub
+
+// Filter one chroma edge
+FILTER_UV:
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0x1112:w
+#endif
+ //---------- Derive filterSampleflag in AVC spec, equition (8-469) ----------
+ // bS is in MaskA
+
+ // Src copy of the p1, p0, q0, q1
+// mov (8) p1(0)<1> r[P_AddrReg, 0]<16;8,2>:ub
+// mov (8) p0(0)<1> r[P_AddrReg, 16]<16;8,2>:ub
+// mov (8) q0(0)<1> r[Q_AddrReg, 0]<16;8,2>:ub
+// mov (8) q1(0)<1> r[Q_AddrReg, 16]<16;8,2>:ub
+
+// mov (1) f0.0:uw MaskA:uw
+
+ add (8) q0_p0(0)<1> Q0 -P0 // q0-p0
+ add (8) TempRow0(0)<1> P1 -P0 // p1-p0
+ add (8) TempRow1(0)<1> Q1 -Q0 // q1-q0
+
+ // Build FilterSampleFlag
+ // abs(q0-p0) < alpha
+ (f0.0) cmp.l.f0.0 (16) null:w (abs)q0_p0(0) alpha:w
+ // abs(p1-p0) < Beta
+ (f0.0) cmp.l.f0.0 (16) null:w (abs)TempRow0(0) beta:w
+ // abs(q1-q0) < Beta
+ (f0.0) cmp.l.f0.0 (16) null:w (abs)TempRow1(0) beta:w
+
+ //-----------------------------------------------------------------------------------------
+
+ // if
+ (f0.0) if (8) UV_ENDIF1
+ // For channels whose edge control map1 = 1 ---> perform de-blocking
+
+// mov (1) f0.1:w MaskB:w {NoMask} // Now check for which algorithm to apply
+
+ (f0.1) if (8) UV_ELSE2
+
+ // For channels whose edge control map2 = 1 ---> bS = 4 algorithm
+ // p0' = (2*p1 + p0 + q1 + 2) >> 2
+ // q0' = (2*q1 + q0 + p1 + 2) >> 2
+
+ // Optimized version:
+ // A = (p1 + q1 + 2)
+ // p0' = (p0 + p1 + A) >> 2
+ // q0' = (q0 + q1 + A) >> 2
+ //------------------------------------------------------------------------------------
+
+ // p0' = (2*p1 + p0 + q1 + 2) >> 2
+ add (8) acc0<1>:w Q1 2:w
+ mac (8) acc0<1>:w P1 2:w
+ add (8) acc0<1>:w acc0<8;8,1>:w P0
+ shr.sat (8) TempRow0B(0)<2> acc0<8;8,1>:w 2:w
+
+ // q0' = (2*q1 + q0 + p1 + 2) >> 2
+ add (8) acc0<1>:w P1 2:w
+ mac (8) acc0<1>:w Q1 2:w
+ add (8) acc0<1>:w acc0<8;8,1>:w Q0
+ shr.sat (8) TempRow1B(0)<2> acc0<8;8,1>:w 2:w
+
+ mov (8) NewP0 TempRow0B(0) // p0'
+ mov (8) NewQ0 TempRow1B(0) // q0'
+
+
+UV_ELSE2:
+ else (8) UV_ENDIF2
+ // For channels whose edge control map2 = 0 ---> bS < 4 algorithm
+
+ // Expand tc0 (tc0 has 4 bytes)
+// mov (8) tc0_exp(0)<1> tc0<1;2,0>:ub {NoMask} // tc0_exp = tc0, each tc0 is duplicated 2 times for 2 adjcent pixels
+ mov (8) acc0<1>:w tc0<1;2,0>:ub {NoMask} // tc0_exp = tc0, each tc0 is duplicated 2 times for 2 adjcent pixels
+
+ // tc_exp = tc0_exp + 1
+// add (8) tc_exp(0)<1> tc0_exp(0) 1:w
+ add (8) tc_exp(0)<1> acc0<8;8,1>:w 1:w
+
+ // delta = Clip3(-tc, tc, ((((q0 - p0)<<2) + (p1-q1) + 4) >> 3))
+ // 4 * (q0-p0) + p1 - q1 + 4
+ add (8) acc0<1>:w P1 4:w
+ mac (8) acc0<1>:w q0_p0(0) 4:w
+ add (8) acc0<1>:w acc0<8;8,1>:w -Q1
+ shr (8) TempRow0(0)<1> acc0<8;8,1>:w 3:w
+
+ // tc clip
+ cmp.g.f0.0 (8) null:w TempRow0(0) tc_exp(0) // Clip if > tc0
+ cmp.l.f0.1 (8) null:w TempRow0(0) -tc_exp(0) // Clip if < -tc0
+
+ (f0.0) mov (8) TempRow0(0)<1> tc_exp(0)
+ (f0.1) mov (8) TempRow0(0)<1> -tc_exp(0)
+
+ // p0' = Clip1(p0 + delta) = Clip3(0, 0xFF, p0 + delta)
+ add.sat (8) TempRow1B(0)<2> P0 TempRow0(0) // p0+delta
+
+ // q0' = Clip1(q0 - delta) = Clip3(0, 0xFF, q0 - delta)
+ add.sat (8) TempRow0B(0)<2> Q0 -TempRow0(0) // q0-delta
+
+ mov (8) NewP0 TempRow1B(0) // p0'
+ mov (8) NewQ0 TempRow0B(0) // q0'
+
+ endif
+UV_ENDIF2:
+UV_ENDIF1:
+ endif
+
+RETURN
+
+#endif // !defined(__AVC_ILDB_CHROMA_CORE__)
diff --git a/src/shaders/h264/ildb/AVC_ILDB_Chroma_Core_Mbaff.asm b/src/shaders/h264/ildb/AVC_ILDB_Chroma_Core_Mbaff.asm new file mode 100644 index 00000000..f567d95b --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_Chroma_Core_Mbaff.asm @@ -0,0 +1,146 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+////////// AVC ILDB Chroma Core Mbaff /////////////////////////////////////////////////////////////////////////////////
+//
+// This core performs AVC U or V ILDB filtering on one horizontal edge (8 pixels) of a MB.
+// If data is transposed, it can also de-block a vertical edge.
+//
+// Bafore calling this subroutine, caller needs to set the following parameters.
+//
+// - EdgeCntlMap1 // Edge control map A
+// - EdgeCntlMap2 // Edge control map B
+// - P_AddrReg // Src and dest address register for P pixels
+// - Q_AddrReg // Src and dest address register for Q pixels
+// - alpha // alpha corresponding to the edge to be filtered
+// - beta // beta corresponding to the edge to be filtered
+// - tc0 // tc0 corresponding to the edge to be filtered
+//
+// U or V:
+// +----+----+----+----+
+// | P1 | p0 | q0 | q1 |
+// +----+----+----+----+
+//
+// p1 = r[P_AddrReg, 0]<16;8,2>
+// p0 = r[P_AddrReg, 16]<16;8,2>
+// q0 = r[Q_AddrReg, 0]<16;8,2>
+// q1 = r[Q_AddrReg, 16]<16;8,2>
+//
+/////////////////////////////////////////////////////////////////////////////////////////////////////////////////
+
+// The region is both src and dest
+// P0-P3 and Q0-Q3 should be only used if they have not been modified to new values
+#undef P1
+#undef P0
+#undef Q0
+#undef Q1
+
+#define P1 r[P_AddrReg, 0]<16;8,2>:ub
+#define P0 r[P_AddrReg, 16]<16;8,2>:ub
+#define Q0 r[Q_AddrReg, 0]<16;8,2>:ub
+#define Q1 r[Q_AddrReg, 16]<16;8,2>:ub
+
+// New region as dest
+#undef NewP0
+#undef NewQ0
+
+#define NewP0 r[P_AddrReg, 16]<2>:ub
+#define NewQ0 r[Q_AddrReg, 0]<2>:ub
+
+// Filter one chroma edge - mbaff
+FILTER_UV_MBAFF:
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0x1112:w
+#endif
+ //---------- Derive filterSampleflag in AVC spec, equition (8-469) ----------
+
+ //===== Assume f0.0 contains MaskA when entering this routine
+// mov (1) f0.0:uw MaskA:uw
+
+ add (8) q0_p0(0)<1> Q0 -P0 // q0-p0
+ add (8) TempRow0(0)<1> P1 -P0 // p1-p0
+ add (8) TempRow1(0)<1> Q1 -Q0 // q1-q0
+
+ // Build FilterSampleFlag
+ // abs(q0-p0) < alpha
+ (f0.0) cmp.l.f0.0 (16) null:w (abs)q0_p0(0) Mbaff_ALPHA(0)
+ // abs(p1-p0) < Beta
+ (f0.0) cmp.l.f0.0 (16) null:w (abs)TempRow0(0) Mbaff_BETA(0)
+ // abs(q1-q0) < Beta
+ (f0.0) cmp.l.f0.0 (16) null:w (abs)TempRow1(0) Mbaff_BETA(0)
+
+ //-----------------------------------------------------------------------------------------
+
+ // if
+ (f0.0) if (8) MBAFF_UV_ENDIF1
+ // For channels whose edge control map1 = 1 ---> perform de-blocking
+
+// mov (1) f0.1:w MaskB:w {NoMask} // Now check for which algorithm to apply
+
+ (f0.1) if (8) MBAFF_UV_ELSE2
+
+ // For channels whose edge control map2 = 1 ---> bS = 4 algorithm
+ // p0' = (2*p1 + P0 + q1 + 2) >> 2
+ // q0' = (2*q1 + q0 + p1 + 2) >> 2
+ //------------------------------------------------------------------------------------
+
+ // p0' = (2*p1 + p0 + q1 + 2) >> 2
+ add (8) acc0<1>:w Q1 2:w
+ mac (8) acc0<1>:w P1 2:w
+ add (8) acc0<1>:w acc0<8;8,1>:w P0
+ shr.sat (8) TempRow0B(0)<2> acc0<8;8,1>:w 2:w
+
+ // q0' = (2*q1 + q0 + p1 + 2) >> 2
+ add (8) acc0<1>:w P1 2:w
+ mac (8) acc0<1>:w Q1 2:w
+ add (8) acc0<1>:w acc0<8;8,1>:w Q0
+ shr.sat (8) TempRow1B(0)<2> acc0<8;8,1>:w 2:w
+
+ mov (8) NewP0 TempRow0B(0) // p0'
+ mov (8) NewQ0 TempRow1B(0) // q0'
+
+MBAFF_UV_ELSE2:
+ else (8) MBAFF_UV_ENDIF2
+ // For channels whose edge control map2 = 0 ---> bS < 4 algorithm
+
+ // tc_exp = tc0_exp + 1
+ add (8) tc_exp(0)<1> Mbaff_TC0(0) 1:w
+
+ // delta = Clip3(-tc, tc, ((((q0 - p0)<<2) + (p1-q1) + 4) >> 3))
+ // 4 * (q0-p0) + p1 - q1 + 4
+ add (8) acc0<1>:w P1 4:w
+ mac (8) acc0<1>:w q0_p0(0) 4:w
+ add (8) acc0<1>:w acc0<8;8,1>:w -Q1
+ shr (8) TempRow0(0)<1> acc0<8;8,1>:w 3:w
+
+ // tc clip
+ cmp.g.f0.0 (8) null:w TempRow0(0) tc_exp(0) // Clip if > tc0
+ cmp.l.f0.1 (8) null:w TempRow0(0) -tc_exp(0) // Clip if < -tc0
+
+ (f0.0) mov (8) TempRow0(0)<1> tc_exp(0)
+ (f0.1) mov (8) TempRow0(0)<1> -tc_exp(0)
+
+ // p0' = Clip1(p0 + delta) = Clip3(0, 0xFF, p0 + delta)
+ add.sat (8) TempRow1B(0)<2> P0 TempRow0(0) // p0+delta
+
+ // q0' = Clip1(q0 - delta) = Clip3(0, 0xFF, q0 - delta)
+ add.sat (8) TempRow0B(0)<2> Q0 -TempRow0(0) // q0-delta
+
+ mov (8) NewP0 TempRow1B(0) // p0'
+ mov (8) NewQ0 TempRow0B(0) // q0'
+
+ endif
+MBAFF_UV_ENDIF2:
+MBAFF_UV_ENDIF1:
+ endif
+
+RETURN
+
+
+
diff --git a/src/shaders/h264/ildb/AVC_ILDB_CloseGateway.asm b/src/shaders/h264/ildb/AVC_ILDB_CloseGateway.asm new file mode 100644 index 00000000..f69ee8c0 --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_CloseGateway.asm @@ -0,0 +1,22 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+//----- Close a Message Gateway -----
+
+#if defined(_DEBUG)
+ mov (1) EntrySignature:b 0x4444:w
+#endif
+
+// Message descriptor
+// bit 31 EOD
+// 27:24 FFID = 0x0011 for msg gateway
+// 23:20 msg length = 1 MRF
+// 19:16 Response length = 0
+// 1:0 SubFuncID = 01 for CloseGateway
+// Message descriptor: 0 000 0011 0001 0000 + 0 0 000000000000 01 ==> 0000 0011 0001 0000 0000 0000 0000 0001
+send (8) null:ud m7 r0.0<0;1,0>:ud MSG_GW CGWMSGDSC
diff --git a/src/shaders/h264/ildb/AVC_ILDB_Dep_Check.asm b/src/shaders/h264/ildb/AVC_ILDB_Dep_Check.asm new file mode 100644 index 00000000..70f8a557 --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_Dep_Check.asm @@ -0,0 +1,186 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+//---------- Check dependency and spawn all MBs ----------
+
+// Launch the 1st round of child threads for Vertical ILDB
+#if defined(_DEBUG)
+ mov (1) EntrySignature:w 0x3333:w
+#endif
+
+//=====================================================================
+// Jump Table 1
+ // 0 0 ---> Goto ALL_SPAWNED
+ // 0 1 ---> Goto ALL_SPAWNED
+ // 1 0 ---> Goto SLEEP_ENTRY
+ // 1 1 ---> Goto POST_SLEEP
+ mov (2) JumpTable.0<1>:d 0:d { NoDDClr }
+#if defined(CHROMA_ROOT)
+ mov (1) JumpTable.2:d SLEEP_ENTRY_UV_ILDB_FRAME_IP-ALL_SPAWNED_UV_ILDB_FRAME_IP:d { NoDDClr, NoDDChk }
+ mov (1) JumpTable.3:d POST_SLEEP_UV_ILDB_FRAME_IP-ALL_SPAWNED_UV_ILDB_FRAME_IP:d { NoDDChk }
+#else
+ mov (1) JumpTable.2:d SLEEP_ENTRY_Y_ILDB_FRAME_IP-ALL_SPAWNED_Y_ILDB_FRAME_IP:d { NoDDClr, NoDDChk }
+ mov (1) JumpTable.3:d POST_SLEEP_Y_ILDB_FRAME_IP-ALL_SPAWNED_Y_ILDB_FRAME_IP:d { NoDDChk }
+#endif
+//=====================================================================
+
+ mov (2) f0.0<1>:w 0:w
+
+ // Get m0 most of fields ready for URB write
+ mov (8) MRF0<1>:ud MSGSRC.0<8;8,1>:ud
+
+ // Add child kernel offset
+ add (1) CT_R0Hdr.2:ud r0.2:ud CHILD_OFFSET:w
+
+ // Init
+ mov (1) Col_Boundary:w 2:w
+ mov (1) Row_Boundary:w LastRow:w
+ mov (1) TopRowForScan:w 0:w
+ mov (2) OutstandingThreads<1>:w 0:w
+
+ // Init Scoreboard (idle = 0x00FF, busy = 0x0000)
+ // Low word is saved col. High word is busy/idle status
+ mov (16) GatewayAperture(0)<1> 0x00FF00FF:ud // Init r6-r7
+ mov (16) GatewayAperture(2)<1> 0x00FF00FF:ud // Init r8-r9
+ mov (16) GatewayAperture(4)<1> 0x00FF00FF:ud // Init r10-r11
+ mov (16) GatewayAperture(6)<1> 0x00FF00FF:ud // Init r12-r13
+ mov (16) GatewayAperture(8)<1> 0x00FF00FF:ud // Init r14-r15
+
+ mul (1) StatusAddr:w CurRow:w 4:w // dword to bytes offset conversion
+
+ //=====================================================================
+
+//SPAWN_LOOP:
+ //===== OutstandingThreads < ThreadLimit ? ============================
+ cmp.l.f0.1 (1) null:w OutstandingThreads:w ThreadLimit:w // Check the thread limit
+#if defined(CHROMA_ROOT)
+ (f0.1) jmpi ILDB_LABEL(POST_SLEEP_UV)
+#else // LUMA_ROOT
+ (f0.1) jmpi ILDB_LABEL(POST_SLEEP_Y)
+#endif
+
+#if defined(CHROMA_ROOT)
+ILDB_LABEL(SLEEP_ENTRY_UV):
+#else // LUMA_ROOT
+ILDB_LABEL(SLEEP_ENTRY_Y):
+#endif
+ //===== Goto Sleep ====================================================
+ // Either reached max thread limit or no child thread can be spawned due to dependency.
+ add (1) OutstandingThreads:w OutstandingThreads:w -1:w // Do this before wait is faster
+ wait n0.0:d
+
+#if defined(CHROMA_ROOT)
+ILDB_LABEL(POST_SLEEP_UV):
+#else // LUMA_ROOT
+ILDB_LABEL(POST_SLEEP_Y):
+#endif
+ //===== Luma Status[CurRow] == busy ? =====
+ cmp.z.f0.0 (1) null:uw r[StatusAddr, GatewayApertureB+ScoreBd_Idx]:uw 0:uw // Check west neighbor
+ cmp.g.f0.1 (1) null:w CurCol:w LastCol:w // Check if the curCol > LastCol
+
+#if defined(CHROMA_ROOT)
+ mov (16) acc0.0<1>:w URBOffsetUVBase<0;1,0>:w // Add offset to UV base (MBsCntY * URB_EBTRIES_PER_MB)
+ mac (1) URBOffset:w CurRow:w 4:w // 4 entries per row
+#else
+ mul (1) URBOffset:w CurRow:w 4:w // 4 entries per row
+#endif
+
+#if defined(CHROMA_ROOT)
+ (f0.0) jmpi ILDB_LABEL(SLEEP_ENTRY_UV) // Current row has a child thread running, can not spawn a new child thread, go back to sleep
+ (f0.1) jmpi ILDB_LABEL(NEXT_MB_UV) // skip MB if the curCol > LastCol
+#else // LUMA_ROOT
+ (f0.0) jmpi ILDB_LABEL(SLEEP_ENTRY_Y) // Current row has a child thread running, can not spawn a new child thread, go back to sleep
+ (f0.1) jmpi ILDB_LABEL(NEXT_MB_Y) // skip MB if the curCol > LastCol
+#endif
+
+ //========== Spwan a child thread ========================================
+ // Save cur col and set Status[CurRow] to busy
+ mov (2) r[StatusAddr, GatewayApertureB]<1>:uw CurColB<2;2,1>:ub // Store the new col
+
+ // Increase OutstandingThreads and ProcessedMBs by 1
+ add (2) OutstandingThreads<1>:w OutstandingThreads<2;2,1>:w 1:w
+
+ #include "AVC_ILDB_SpawnChild.asm"
+
+ //===== Find next MB ===================================================
+#if defined(CHROMA_ROOT)
+ILDB_LABEL(NEXT_MB_UV):
+#else // LUMA_ROOT
+ILDB_LABEL(NEXT_MB_Y):
+#endif
+ // Check pic boundary, results are in f0.0 bit0 and bit1
+ cmp.ge.f0.0 (2) null<1>:w CurCol<2;2,1>:w Col_Boundary<2;2,1>:w
+
+ // Update TopRowForScan if the curCol = LastCol
+ (f0.1) add (1) TopRowForScan:w CurRow:w 1:w
+
+// cmp.l.f0.1 (1) null<1>:w ProcessedMBs:w TotalBlocks:w // Processed all blocks ?
+ // 2 sets compare
+ // ProcessedMBs:w < TotalBlocks:w OutstandingThreads:w < ThreadLimit:wProcessedMBs:w
+ // 0 0 ---> Goto ALL_SPAWNED
+ // 0 1 ---> Goto ALL_SPAWNED
+ // 1 0 ---> Goto SLEEP_ENTRY
+ // 1 1 ---> Goto POST_SLEEP
+ cmp.l.f0.1 (2) null<1>:w OutstandingThreads<2;2,1>:w ThreadLimit<2;2,1>:w
+
+ // Just do it in stalled cycles
+ mov (1) acc0.0:w 4:w
+ mac (1) StatusAddr:w CurRow:w 4:w // dword to bytes offset conversion
+ add (2) CurCol<1>:w CurCol<2;2,1>:w StepToNextMB<2;2,1>:b // CurCol -= 2 and CurRow += 1
+
+ // Set f0.0 if turning around is needed, assuming bit 15 - 2 are zeros for correct comparison.
+ cmp.nz.f0.0 (1) null<1>:w f0.0:w 0x01:w
+
+ mul (1) JumpAddr:w f0.1:w 4:w // byte offet in dword count
+
+ // The next MB is at the row TopRowForScan
+ (f0.0) mul (1) StatusAddr:w TopRowForScan:w 4:w // dword to bytes offset conversion
+ (f0.0) mov (1) CurRow:w TopRowForScan:w { NoDDClr } // Restart from the top row that has MBs not deblocked yet.
+ (f0.0) add (1) CurCol:w r[StatusAddr, GatewayApertureB]:uw 1:w { NoDDChk }
+
+ //===== Processed all blocks ? =========================================
+ // (f0.1) jmpi SPAWN_LOOP
+
+ jmpi r[JumpAddr, JUMPTABLE_BASE]:d
+//JUMP_BASE:
+
+ //======================================================================
+
+ // All MB are spawned at this point, check for outstanding thread count
+#if defined(CHROMA_ROOT)
+ILDB_LABEL(ALL_SPAWNED_UV):
+#else // LUMA_ROOT
+ILDB_LABEL(ALL_SPAWNED_Y):
+#endif
+ cmp.e.f0.1 (1) null:w OutstandingThreads:w 0:w // Check before goto sleep
+#if defined(CHROMA_ROOT)
+ (f0.1) jmpi ILDB_LABEL(ALL_DONE_UV)
+#else // LUMA_ROOT
+ (f0.1) jmpi ILDB_LABEL(ALL_DONE_Y)
+#endif
+
+ wait n0.0:d // Wake up by a finished child thread
+ add (1) OutstandingThreads:w OutstandingThreads:w -1:w
+
+#if defined(CHROMA_ROOT)
+ // One thread is free and give it to luma thread limit --- Increase luma thread limit by one.
+ #include "AVC_ILDB_LumaThrdLimit.asm"
+#endif
+
+#if defined(CHROMA_ROOT)
+ jmpi ILDB_LABEL(ALL_SPAWNED_UV) // Waked up and goto dependency check
+#else // LUMA_ROOT
+ jmpi ILDB_LABEL(ALL_SPAWNED_Y) // Waked up and goto dependency check
+#endif
+
+ // All child threads are finsihed at this point
+#if defined(CHROMA_ROOT)
+ILDB_LABEL(ALL_DONE_UV):
+#else // LUMA_ROOT
+ILDB_LABEL(ALL_DONE_Y):
+#endif
diff --git a/src/shaders/h264/ildb/AVC_ILDB_Filter_Mbaff_UV_h.asm b/src/shaders/h264/ildb/AVC_ILDB_Filter_Mbaff_UV_h.asm new file mode 100644 index 00000000..ff807d54 --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_Filter_Mbaff_UV_h.asm @@ -0,0 +1,223 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+////////// AVC ILDB filter horizontal Mbaff UV ///////////////////////////////////////////////////////
+//
+// This filter code prepares the src data and control data for ILDB filtering on all horizontal edges of UV.
+//
+// It sssumes the data for horizontal de-blocking is already transposed.
+//
+// Chroma:
+//
+// +-------+-------+ H0 Edge
+// | | |
+// | | |
+// | | |
+// +-------+-------+ H1 Edge
+// | | |
+// | | |
+// | | |
+// +-------+-------+
+//
+/////////////////////////////////////////////////////////////////////////////
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xBBBC:w
+#endif
+
+//=============== Chroma deblocking ================
+
+//---------- Deblock UV external top edge ----------
+
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FilterTopMbEdgeFlag:w // Check for FilterTopMbEdgeFlag
+
+ mov (1) f0.1:w DualFieldMode:w // Check for dual field mode
+
+ // Get Luma maskA and maskB
+ shr (16) TempRow0(0)<1> r[ECM_AddrReg, wEdgeCntlMapA_ExtTopHorz0]<0;1,0>:uw RRampW(0)
+ shr (16) TempRow1(0)<1> r[ECM_AddrReg, wEdgeCntlMapB_ExtTopHorz0]<0;1,0>:uw RRampW(0)
+
+ (f0.0) jmpi H0_UV_DONE // Skip H0 UV edge
+
+ (f0.1) jmpi DUAL_FIELD_UV
+
+ // Non dual field mode
+
+ // Extract UV MaskA and MaskB from every other bit of Y masks
+ and.nz.f0.0 (8) null:w TempRow0(0)<16;8,2> 1:w
+ and.nz.f0.1 (8) null:w TempRow1(0)<16;8,2> 1:w
+
+ // Ext U
+ // p1 = Prev MB U row 0
+ // p0 = Prev MB U row 1
+ // q0 = Cur MB U row 0
+ // q1 = Cur MB U row 1
+ mov (1) P_AddrReg:w PREV_MB_U_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w SRC_MB_U_BASE:w { NoDDChk }
+
+ mov (8) Mbaff_ALPHA(0,0)<1> r[ECM_AddrReg, bAlphaTop0_Cb]<0;1,0>:ub
+ mov (8) Mbaff_BETA(0,0)<1> r[ECM_AddrReg, bBetaTop0_Cb]<0;1,0>:ub
+ mov (8) Mbaff_TC0(0,0)<1> r[ECM_AddrReg, bTc0_h00_0_Cb]<1;2,0>:ub
+
+ // Store UV MaskA and MaskB
+ mov (2) MaskA<1>:uw f0.0<2;2,1>:uw
+
+ CALL(FILTER_UV_MBAFF, 1)
+
+ // Ext V
+ mov (1) P_AddrReg:w PREV_MB_V_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w SRC_MB_V_BASE:w { NoDDChk }
+
+ mov (8) Mbaff_ALPHA(0,0)<1> r[ECM_AddrReg, bAlphaTop0_Cr]<0;1,0>:ub
+ mov (8) Mbaff_BETA(0,0)<1> r[ECM_AddrReg, bBetaTop0_Cr]<0;1,0>:ub
+ mov (8) Mbaff_TC0(0,0)<1> r[ECM_AddrReg, bTc0_h00_0_Cr]<1;2,0>:ub
+
+ // Set UV MaskA and MaskB
+ mov (2) f0.0<1>:uw MaskA<2;2,1>:uw
+
+ CALL(FILTER_UV_MBAFF, 1)
+
+ jmpi H0_UV_DONE
+
+DUAL_FIELD_UV:
+ // Dual field mode, FieldModeCurrentMbFlag=0 && FieldModeAboveMbFlag=1
+
+ //===== Ext U, Top field
+
+ // Extract UV MaskA and MaskB from every other bit of Y masks
+ and.nz.f0.0 (8) null:w TempRow0(0)<16;8,2> 1:w
+ and.nz.f0.1 (8) null:w TempRow1(0)<16;8,2> 1:w
+
+ mov (1) P_AddrReg:w ABOVE_CUR_MB_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w ABOVE_CUR_MB_BASE+32:w { NoDDChk }
+
+ mov (16) ABOVE_CUR_MB_UW(0)<1> PREV_MB_UW(0, 0)<16;8,1> // Copy p1, p0
+ mov (16) ABOVE_CUR_MB_UW(1)<1> SRC_UW(0, 0)<16;8,1> // Copy q1, q0
+
+ //===== Ext U, top field
+ mov (8) Mbaff_ALPHA(0,0)<1> r[ECM_AddrReg, bAlphaTop0_Cb]<0;1,0>:ub
+ mov (8) Mbaff_BETA(0,0)<1> r[ECM_AddrReg, bBetaTop0_Cb]<0;1,0>:ub
+ mov (8) Mbaff_TC0(0,0)<1> r[ECM_AddrReg, bTc0_h00_0_Cb]<1;2,0>:ub
+
+ // Store UV MaskA and MaskB
+ mov (2) MaskA<1>:uw f0.0<2;2,1>:uw
+
+ CALL(FILTER_UV_MBAFF, 1) // Ext U, top field
+
+ //===== Ext V, top field
+ mov (1) P_AddrReg:w ABOVE_CUR_MB_BASE+1:w { NoDDClr }
+ mov (1) Q_AddrReg:w ABOVE_CUR_MB_BASE+33:w { NoDDChk }
+
+ mov (8) Mbaff_ALPHA(0,0)<1> r[ECM_AddrReg, bAlphaTop0_Cr]<0;1,0>:ub
+ mov (8) Mbaff_BETA(0,0)<1> r[ECM_AddrReg, bBetaTop0_Cr]<0;1,0>:ub
+ mov (8) Mbaff_TC0(0,0)<1> r[ECM_AddrReg, bTc0_h00_0_Cr]<1;2,0>:ub
+
+ // Set UV MaskA and MaskB
+ mov (2) f0.0<1>:uw MaskA<2;2,1>:uw
+
+ CALL(FILTER_UV_MBAFF, 1) // Ext U, top field
+
+ // Prefetch for bottom field
+ // Get bot field Luma maskA and maskB
+ shr (16) TempRow0(0)<1> r[ECM_AddrReg, wEdgeCntlMapA_ExtTopHorz1]<0;1,0>:uw RRampW(0)
+ shr (16) TempRow1(0)<1> r[ECM_AddrReg, wEdgeCntlMapB_ExtTopHorz1]<0;1,0>:uw RRampW(0)
+
+ // Save deblocked top field rows
+ mov (8) PREV_MB_UW(1, 0)<1> ABOVE_CUR_MB_UW(0, 8) // Copy p0
+ mov (8) SRC_UW(0, 0)<1> ABOVE_CUR_MB_UW(1, 0) // Copy q0
+ //==========================================================================
+
+ //===== Ext U, Bot field
+
+ // Extract UV MaskA and MaskB from every other bit of Y masks
+ and.nz.f0.0 (8) null:w TempRow0(0)<16;8,2> 1:w
+ and.nz.f0.1 (8) null:w TempRow1(0)<16;8,2> 1:w
+
+ mov (1) P_AddrReg:w ABOVE_CUR_MB_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w ABOVE_CUR_MB_BASE+32:w { NoDDChk }
+
+ mov (16) ABOVE_CUR_MB_UW(0)<1> PREV_MB_UW(0, 8)<16;8,1> // Copy p1, p0
+ mov (16) ABOVE_CUR_MB_UW(1)<1> SRC_UW(0, 8)<16;8,1> // Copy q1, q0
+
+ //===== Ext U, bottom field
+ mov (8) Mbaff_ALPHA(0,0)<1> r[ECM_AddrReg, bAlphaTop1_Cb]<0;1,0>:ub
+ mov (8) Mbaff_BETA(0,0)<1> r[ECM_AddrReg, bBetaTop1_Cb]<0;1,0>:ub
+ mov (8) Mbaff_TC0(0,0)<1> r[ECM_AddrReg, bTc0_h00_1_Cb]<1;2,0>:ub
+
+ // Store UV MaskA and MaskB
+ mov (2) MaskA<1>:uw f0.0<2;2,1>:uw
+
+ CALL(FILTER_UV_MBAFF, 1) // Ext U, bottom field
+
+ //===== Ext V, bot field
+ mov (1) P_AddrReg:w ABOVE_CUR_MB_BASE+1:w { NoDDClr }
+ mov (1) Q_AddrReg:w ABOVE_CUR_MB_BASE+33:w { NoDDChk }
+
+ mov (8) Mbaff_ALPHA(0,0)<1> r[ECM_AddrReg, bAlphaTop1_Cr]<0;1,0>:ub
+ mov (8) Mbaff_BETA(0,0)<1> r[ECM_AddrReg, bBetaTop1_Cr]<0;1,0>:ub
+ mov (8) Mbaff_TC0(0,0)<1> r[ECM_AddrReg, bTc0_h00_1_Cr]<1;2,0>:ub
+
+ // Set UV MaskA and MaskB
+ mov (2) f0.0<1>:uw MaskA<2;2,1>:uw
+
+ CALL(FILTER_UV_MBAFF, 1) // Ext V, bottom field
+
+ // Save deblocked bot field rows
+ mov (8) PREV_MB_UW(1, 8)<1> ABOVE_CUR_MB_UW(0, 8) // Copy p0
+ mov (8) SRC_UW(0, 8)<1> ABOVE_CUR_MB_UW(1, 0) // Copy q0
+ //========================================
+
+H0_UV_DONE:
+
+//---------- Deblock U internal horz middle edge ----------
+
+ //***** Need to take every other bit to form U maskA in core
+ shr (16) TempRow0(0)<1> r[ECM_AddrReg, wEdgeCntlMap_IntMidHorz]<0;1,0>:uw RRampW(0)
+
+ // p1 = Cur MB U row 2
+ // p0 = Cur MB U row 3
+ // q0 = Cur MB U row 4
+ // q1 = Cur MB U row 5
+ mov (1) P_AddrReg:w 4*UV_ROW_WIDTH+SRC_MB_U_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w 8*UV_ROW_WIDTH+SRC_MB_U_BASE:w { NoDDChk }
+
+ mov (8) Mbaff_ALPHA(0,0)<1> r[ECM_AddrReg, bAlphaInternal_Cb]<0;1,0>:ub
+ mov (8) Mbaff_BETA(0,0)<1> r[ECM_AddrReg, bBetaInternal_Cb]<0;1,0>:ub
+ mov (8) Mbaff_TC0(0,0)<1> r[ECM_AddrReg, bTc0_h20_Cb]<1;2,0>:ub
+
+ and.nz.f0.0 (8) null:w TempRow0(0)<16;8,2> 1:w
+
+ // Store UV MaskA and MaskB
+ mov (1) f0.1:uw 0:w
+ mov (1) MaskB:uw 0:w { NoDDClr }
+ mov (1) MaskA:uw f0.0:uw { NoDDChk }
+
+ CALL(FILTER_UV_MBAFF, 1)
+//-----------------------------------------------
+
+
+//---------- Deblock V internal horz middle edge ----------
+
+ // p1 = Cur MB V row 2
+ // p0 = Cur MB V row 3
+ // q0 = Cur MB V row 4
+ // q1 = Cur MB V row 5
+ mov (1) P_AddrReg:w 4*UV_ROW_WIDTH+SRC_MB_V_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w 8*UV_ROW_WIDTH+SRC_MB_V_BASE:w { NoDDChk }
+
+ mov (8) Mbaff_ALPHA(0,0)<1> r[ECM_AddrReg, bAlphaInternal_Cr]<0;1,0>:ub
+ mov (8) Mbaff_BETA(0,0)<1> r[ECM_AddrReg, bBetaInternal_Cr]<0;1,0>:ub
+ mov (8) Mbaff_TC0(0,0)<1> r[ECM_AddrReg, bTc0_h20_Cr]<1;2,0>:ub
+
+ // Set UV MaskA and MaskB
+ mov (2) f0.0<1>:uw MaskA<2;2,1>:uw
+
+ CALL(FILTER_UV_MBAFF, 1)
+//-----------------------------------------------
+
+
diff --git a/src/shaders/h264/ildb/AVC_ILDB_Filter_Mbaff_UV_v.asm b/src/shaders/h264/ildb/AVC_ILDB_Filter_Mbaff_UV_v.asm new file mode 100644 index 00000000..c0f26782 --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_Filter_Mbaff_UV_v.asm @@ -0,0 +1,209 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+////////// AVC LDB filter vertical Mbaff UV ///////////////////////////////////////////////////////
+//
+// This filter code prepares the src data and control data for ILDB filtering on all vertical edges of UV.
+//
+// It sssumes the data for vertical de-blocking is already transposed.
+//
+// Chroma:
+//
+// +-------+-------+
+// | | |
+// | | |
+// | | |
+// +-------+-------+
+// | | |
+// | | |
+// | | |
+// +-------+-------+
+//
+// V0 V1
+// Edge Edge
+//
+/////////////////////////////////////////////////////////////////////////////
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xBBBC:w
+#endif
+
+//=============== Chroma deblocking ================
+
+//---------- Deblock U external left edge ----------
+
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FilterLeftMbEdgeFlag:w // Check for FilterLeftMbEdgeFlag
+
+ cmp.z.f0.1 (1) null:w VertEdgePattern:uw LEFT_FIELD_CUR_FRAME:w
+
+ // Get Luma maskA and maskB
+ shr (16) TempRow0(0)<1> r[ECM_AddrReg, wEdgeCntlMapA_ExtLeftVert0]<0;1,0>:uw RRampW(0)
+ shr (16) TempRow1(0)<1> r[ECM_AddrReg, wEdgeCntlMapB_ExtLeftVert0]<0;1,0>:uw RRampW(0)
+
+ (f0.0) jmpi BYPASS_V0_UV // Do not deblock Left ext edge
+
+ cmp.z.f0.0 (1) null:w VertEdgePattern:uw LEFT_FRAME_CUR_FIELD:w
+
+ (-f0.1) jmpi V0_U_NEXT1 // Jump if not LEFT_FIELD_CUR_FRAME
+
+ //----- For LEFT_FIELD_CUR_FRAME
+
+ // Extract UV MaskA and MaskB from every other 2 bits of Y masks
+ and.nz.f0.0 (8) null:w TempRow0(0)<4;2,1> 1:w
+ and.nz.f0.1 (8) null:w TempRow1(0)<4;2,1> 1:w
+
+ // For FieldModeLeftMbFlag=1 && FieldModeCurrentMbFlag=0
+ mov (4) Mbaff_ALPHA(0,0)<2> r[ECM_AddrReg, bAlphaLeft0_Cb]<0;1,0>:ub { NoDDClr }
+ mov (4) Mbaff_ALPHA(0,1)<2> r[ECM_AddrReg, bAlphaLeft1_Cb]<0;1,0>:ub { NoDDChk }
+ mov (4) Mbaff_BETA(0,0)<2> r[ECM_AddrReg, bBetaLeft0_Cb]<0;1,0>:ub { NoDDClr }
+ mov (4) Mbaff_BETA(0,1)<2> r[ECM_AddrReg, bBetaLeft1_Cb]<0;1,0>:ub { NoDDChk }
+ mov (4) Mbaff_TC0(0,0)<2> r[ECM_AddrReg, bTc0_v00_0_Cb]<4;4,1>:ub { NoDDClr }
+ mov (4) Mbaff_TC0(0,1)<2> r[ECM_AddrReg, bTc0_v00_1_Cb]<4;4,1>:ub { NoDDChk }
+
+ jmpi V0_U_NEXT3
+
+V0_U_NEXT1:
+
+ (-f0.0) jmpi V0_U_NEXT2 // Jump if not LEFT_FRAME_CUR_FIELD
+
+ //----- For LEFT_FRAME_CUR_FIELD
+
+ // Extract UV MaskA and MaskB from every other bit of Y masks
+ and.nz.f0.0 (8) null:w TempRow0(0)<16;8,2> 1:w
+ and.nz.f0.1 (8) null:w TempRow1(0)<16;8,2> 1:w
+
+ // For FieldModeLeftMbFlag=0 && FieldModeCurrentMbFlag=1
+ mov (4) Mbaff_ALPHA(0,0)<1> r[ECM_AddrReg, bAlphaLeft0_Cb]<0;1,0>:ub { NoDDClr }
+ mov (4) Mbaff_ALPHA(0,4)<1> r[ECM_AddrReg, bAlphaLeft1_Cb]<0;1,0>:ub { NoDDChk }
+ mov (4) Mbaff_BETA(0,0)<1> r[ECM_AddrReg, bBetaLeft0_Cb]<0;1,0>:ub { NoDDClr }
+ mov (4) Mbaff_BETA(0,4)<1> r[ECM_AddrReg, bBetaLeft1_Cb]<0;1,0>:ub { NoDDChk }
+ mov (4) Mbaff_TC0(0,0)<1> r[ECM_AddrReg, bTc0_v00_0_Cb]<4;4,1>:ub { NoDDClr }
+ mov (4) Mbaff_TC0(0,4)<1> r[ECM_AddrReg, bTc0_v00_1_Cb]<4;4,1>:ub { NoDDChk }
+
+ jmpi V0_U_NEXT3
+
+V0_U_NEXT2:
+
+ // Extract UV MaskA and MaskB from every other bit of Y masks
+ and.nz.f0.0 (8) null:w TempRow0(0)<16;8,2> 1:w
+ and.nz.f0.1 (8) null:w TempRow1(0)<16;8,2> 1:w
+
+ // Both are frames or fields
+ mov (8) Mbaff_ALPHA(0,0)<1> r[ECM_AddrReg, bAlphaLeft0_Cb]<0;1,0>:ub
+ mov (8) Mbaff_BETA(0,0)<1> r[ECM_AddrReg, bBetaLeft0_Cb]<0;1,0>:ub
+ mov (8) Mbaff_TC0(0,0)<1> r[ECM_AddrReg, bTc0_v00_0_Cb]<1;2,0>:ub
+
+V0_U_NEXT3:
+
+ // p1 = Prev MB U row 0
+ // p0 = Prev MB U row 1
+ // q0 = Cur MB U row 0
+ // q1 = Cur MB U row 1
+ mov (1) P_AddrReg:w PREV_MB_U_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w SRC_MB_U_BASE:w { NoDDChk }
+
+ // Store UV MaskA and MaskB
+ mov (2) MaskA<1>:uw f0.0<2;2,1>:uw
+
+ CALL(FILTER_UV_MBAFF, 1)
+//-----------------------------------------------
+
+//---------- Deblock V external left edge ----------
+
+ // No change to MaskA and MaskB
+
+ cmp.z.f0.0 (4) null:w VertEdgePattern:uw LEFT_FIELD_CUR_FRAME:w
+ cmp.z.f0.1 (4) null:w VertEdgePattern:uw LEFT_FRAME_CUR_FIELD:w
+
+ // both are frame or field
+ mov (8) Mbaff_ALPHA(0,0)<1> r[ECM_AddrReg, bAlphaLeft0_Cr]<0;1,0>:ub
+ mov (8) Mbaff_BETA(0,0)<1> r[ECM_AddrReg, bBetaLeft0_Cr]<0;1,0>:ub
+ mov (8) Mbaff_TC0(0,0)<1> r[ECM_AddrReg, bTc0_v00_0_Cr]<1;2,0>:ub
+
+ // p1 = Prev MB V row 0
+ // p0 = Prev MB V row 1
+ // q0 = Cur MB V row 0
+ // q1 = Cur MB V row 1
+ mov (1) P_AddrReg:w PREV_MB_V_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w SRC_MB_V_BASE:w { NoDDChk }
+
+ // For FieldModeLeftMbFlag=1 && FieldModeCurrentMbFlag=0
+ (f0.0) mov (4) Mbaff_ALPHA(0,0)<2> r[ECM_AddrReg, bAlphaLeft0_Cr]<0;1,0>:ub { NoDDClr }
+ (f0.0) mov (4) Mbaff_ALPHA(0,1)<2> r[ECM_AddrReg, bAlphaLeft1_Cr]<0;1,0>:ub { NoDDChk }
+ (f0.0) mov (4) Mbaff_BETA(0,0)<2> r[ECM_AddrReg, bBetaLeft0_Cr]<0;1,0>:ub { NoDDClr }
+ (f0.0) mov (4) Mbaff_BETA(0,1)<2> r[ECM_AddrReg, bBetaLeft1_Cr]<0;1,0>:ub { NoDDChk }
+ (f0.0) mov (4) Mbaff_TC0(0,0)<2> r[ECM_AddrReg, bTc0_v00_0_Cr]<4;4,1>:ub { NoDDClr }
+ (f0.0) mov (4) Mbaff_TC0(0,1)<2> r[ECM_AddrReg, bTc0_v00_1_Cr]<4;4,1>:ub { NoDDChk }
+
+ // For FieldModeLeftMbFlag=0 && FieldModeCurrentMbFlag=1
+ (f0.1) mov (4) Mbaff_ALPHA(0,0)<1> r[ECM_AddrReg, bAlphaLeft0_Cr]<0;1,0>:ub { NoDDClr }
+ (f0.1) mov (4) Mbaff_ALPHA(0,4)<1> r[ECM_AddrReg, bAlphaLeft1_Cr]<0;1,0>:ub { NoDDChk }
+ (f0.1) mov (4) Mbaff_BETA(0,0)<1> r[ECM_AddrReg, bBetaLeft0_Cr]<0;1,0>:ub { NoDDClr }
+ (f0.1) mov (4) Mbaff_BETA(0,4)<1> r[ECM_AddrReg, bBetaLeft1_Cr]<0;1,0>:ub { NoDDChk }
+ (f0.1) mov (4) Mbaff_TC0(0,0)<1> r[ECM_AddrReg, bTc0_v00_0_Cr]<4;4,1>:ub { NoDDClr }
+ (f0.1) mov (4) Mbaff_TC0(0,4)<1> r[ECM_AddrReg, bTc0_v00_1_Cr]<4;4,1>:ub { NoDDChk }
+
+ // Set UV MaskA and MaskB
+ mov (2) f0.0<1>:uw MaskA<2;2,1>:uw
+
+ CALL(FILTER_UV_MBAFF, 1)
+//-----------------------------------------------
+
+BYPASS_V0_UV:
+ // Set EdgeCntlMap2 = 0, so it always uses bS < 4 algorithm.
+ // Same alpha and beta for all internal vert and horiz edges
+
+//---------- Deblock U internal vert middle edge ----------
+
+ //***** Need to take every other bit to form U or V maskA
+ shr (16) TempRow0(0)<1> r[ECM_AddrReg, wEdgeCntlMap_IntMidVert]<0;1,0>:uw RRampW(0)
+
+ // p1 = Cur MB U row 2
+ // p0 = Cur MB U row 3
+ // q0 = Cur MB U row 4
+ // q1 = Cur MB U row 5
+ mov (1) P_AddrReg:w 4*UV_ROW_WIDTH+SRC_MB_U_BASE:w { NoDDClr } // Skip 2 U rows and 2 V rows
+ mov (1) Q_AddrReg:w 8*UV_ROW_WIDTH+SRC_MB_U_BASE:w { NoDDChk }
+
+ mov (8) Mbaff_ALPHA(0,0)<1> r[ECM_AddrReg, bAlphaInternal_Cb]<0;1,0>:ub
+ mov (8) Mbaff_BETA(0,0)<1> r[ECM_AddrReg, bBetaInternal_Cb]<0;1,0>:ub
+ mov (8) Mbaff_TC0(0,0)<1> r[ECM_AddrReg, bTc0_v02_Cb]<1;2,0>:ub
+
+ and.nz.f0.0 (8) null:w TempRow0(0)<16;8,2> 1:w
+
+ // Store MaskA and MaskB
+ mov (1) f0.1:uw 0:w
+ mov (1) MaskB:uw 0:w { NoDDClr }
+ mov (1) MaskA:uw f0.0:uw { NoDDChk }
+
+ CALL(FILTER_UV_MBAFF, 1)
+
+//-----------------------------------------------
+
+
+//---------- Deblock V internal vert middle edge ----------
+
+ // P1 = Cur MB V row 2
+ // P0 = Cur MB V row 3
+ // Q0 = Cur MB V row 4
+ // Q1 = Cur MB V row 5
+ mov (1) P_AddrReg:w 4*UV_ROW_WIDTH+SRC_MB_V_BASE:w { NoDDClr } // Skip 2 U rows and 2 V rows
+ mov (1) Q_AddrReg:w 8*UV_ROW_WIDTH+SRC_MB_V_BASE:w { NoDDChk }
+
+ // Put MaskA into f0.0
+ // Put MaskB into f0.1
+ mov (2) f0.0<1>:uw MaskA<2;2,1>:uw
+
+ mov (8) Mbaff_ALPHA(0,0)<1> r[ECM_AddrReg, bAlphaInternal_Cr]<0;1,0>:ub
+ mov (8) Mbaff_BETA(0,0)<1> r[ECM_AddrReg, bBetaInternal_Cr]<0;1,0>:ub
+ mov (8) Mbaff_TC0(0,0)<1> r[ECM_AddrReg, bTc0_v02_Cr]<1;2,0>:ub
+
+ CALL(FILTER_UV_MBAFF, 1)
+
+//-----------------------------------------------
+
diff --git a/src/shaders/h264/ildb/AVC_ILDB_Filter_Mbaff_Y_h.asm b/src/shaders/h264/ildb/AVC_ILDB_Filter_Mbaff_Y_h.asm new file mode 100644 index 00000000..a98b0245 --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_Filter_Mbaff_Y_h.asm @@ -0,0 +1,234 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+////////// AVC ILDB filter horizontal Mbaff Y ///////////////////////////////////////////////////////
+//
+// This filter code prepares the src data and control data for ILDB filtering on all horizontal edges of Y.
+//
+// It sssumes the data for horizontal de-blocking is already transposed.
+//
+// Luma:
+//
+// +-------+-------+-------+-------+ H0 Edge
+// | | | | |
+// | | | | |
+// | | | | |
+// +-------+-------+-------+-------+ H1 Edge
+// | | | | |
+// | | | | |
+// | | | | |
+// +-------+-------+-------+-------+ H2 Edge
+// | | | | |
+// | | | | |
+// | | | | |
+// +-------+-------+-------+-------+ H3 Edge
+// | | | | |
+// | | | | |
+// | | | | |
+// +-------+-------+-------+-------+
+//
+/////////////////////////////////////////////////////////////////////////////
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xBBBB:w
+#endif
+
+
+//========== Luma deblocking ==========
+
+
+//---------- Deblock Y external top edge (H0) ----------
+
+ // Bypass deblocking if it is the top edge of the picture.
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FilterTopMbEdgeFlag:w // Check for FilterTopMbEdgeFlag
+ mov (1) f0.1:w DualFieldMode:w // Check for dual field mode
+
+ // Non dual field mode
+
+ // Get (alpha >> 2) + 2
+ shr (16) Mbaff_ALPHA2(0,0)<1> r[ECM_AddrReg, bAlphaTop0_Y]<0;1,0>:ub 2:w // alpha >> 2
+
+ mov (2) MaskA<1>:uw r[ECM_AddrReg, wEdgeCntlMapA_ExtTopHorz0]<2;2,1>:uw
+
+ // Ext Y
+ mov (16) Mbaff_ALPHA(0,0)<1> r[ECM_AddrReg, bAlphaTop0_Y]<0;1,0>:ub
+ mov (16) Mbaff_BETA(0,0)<1> r[ECM_AddrReg, bBetaTop0_Y]<0;1,0>:ub
+ mov (16) Mbaff_TC0(0,0)<1> r[ECM_AddrReg, bTc0_h00_0_Y]<1;4,0>:ub
+
+ add (16) Mbaff_ALPHA2(0,0)<1> Mbaff_ALPHA2(0,0)<16;16,1> 2:w // alpha2 = (alpha >> 2) + 2
+
+ (f0.0) jmpi H0_Y_DONE // Skip Ext Y deblocking
+ (f0.1) jmpi DUAL_FIELD_Y
+
+ mov (1) P_AddrReg:w PREV_MB_Y_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w SRC_MB_Y_BASE:w { NoDDChk }
+
+ CALL(FILTER_Y_MBAFF, 1) // Non dual field deblocking
+
+ jmpi H0_Y_DONE
+
+DUAL_FIELD_Y:
+ // Dual field mode, FieldModeCurrentMbFlag=0 && FieldModeAboveMbFlag=1
+
+ mov (1) P_AddrReg:w ABOVE_CUR_MB_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w ABOVE_CUR_MB_BASE+64:w { NoDDChk }
+
+ // Must use PREV_MB_YW. TOP_MB_YW is not big enough.
+ // Get top field rows
+ mov (16) ABOVE_CUR_MB_YW(0)<1> PREV_MB_YW(0, 0)<16;8,1> // Copy p3, p2
+ mov (16) ABOVE_CUR_MB_YW(1)<1> PREV_MB_YW(2, 0)<16;8,1> // Copy p1, p0
+ mov (16) ABOVE_CUR_MB_YW(2)<1> SRC_YW(0, 0)<16;8,1> // Copy q0, q1
+ mov (16) ABOVE_CUR_MB_YW(3)<1> SRC_YW(2, 0)<16;8,1> // Copy q2, q3
+
+ CALL(FILTER_Y_MBAFF, 1) // Ext Y, top field
+
+ // Save deblocked top field rows
+ mov (8) PREV_MB_YW(1, 0)<1> ABOVE_CUR_MB_YW(0, 8) // Copy p2
+ mov (8) PREV_MB_YW(2, 0)<1> ABOVE_CUR_MB_YW(1, 0) // Copy p1
+ mov (8) PREV_MB_YW(3, 0)<1> ABOVE_CUR_MB_YW(1, 8) // Copy p0
+ mov (8) SRC_YW(0, 0)<1> ABOVE_CUR_MB_YW(2, 0) // Copy q0
+ mov (8) SRC_YW(1, 0)<1> ABOVE_CUR_MB_YW(2, 8) // Copy q1
+ mov (8) SRC_YW(2, 0)<1> ABOVE_CUR_MB_YW(3, 0) // Copy q2
+
+ //==================================================================================
+ // Bottom field
+
+ // Get (alpha >> 2) + 2
+ shr (16) Mbaff_ALPHA2(0,0)<1> r[ECM_AddrReg, bAlphaTop1_Y]<0;1,0>:ub 2:w // alpha >> 2
+
+ mov (1) P_AddrReg:w ABOVE_CUR_MB_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w ABOVE_CUR_MB_BASE+64:w { NoDDChk }
+
+ // Get bot field rows
+ mov (16) ABOVE_CUR_MB_YW(0)<1> PREV_MB_YW(0, 8)<16;8,1> // Copy p3, p2
+ mov (16) ABOVE_CUR_MB_YW(1)<1> PREV_MB_YW(2, 8)<16;8,1> // Copy p1, p0
+ mov (16) ABOVE_CUR_MB_YW(2)<1> SRC_YW(0, 8)<16;8,1> // Copy q0, q1
+ mov (16) ABOVE_CUR_MB_YW(3)<1> SRC_YW(2, 8)<16;8,1> // Copy q2, q3
+
+ mov (2) MaskA<1>:uw r[ECM_AddrReg, wEdgeCntlMapA_ExtTopHorz1]<2;2,1>:uw
+
+ mov (16) Mbaff_ALPHA(0,0)<1> r[ECM_AddrReg, bAlphaTop1_Y]<0;1,0>:ub
+ mov (16) Mbaff_BETA(0,0)<1> r[ECM_AddrReg, bBetaTop1_Y]<0;1,0>:ub
+ mov (16) Mbaff_TC0(0,0)<1> r[ECM_AddrReg, bTc0_h00_1_Y]<1;4,0>:ub
+
+ add (16) Mbaff_ALPHA2(0,0)<1> Mbaff_ALPHA2(0,0)<16;16,1> 2:w // alpha2 = (alpha >> 2) + 2
+
+ CALL(FILTER_Y_MBAFF, 1) // Ext Y, bot field
+
+ // Save deblocked top field rows
+ mov (8) PREV_MB_YW(1, 8)<1> ABOVE_CUR_MB_YW(0, 8) // Copy p2
+ mov (8) PREV_MB_YW(2, 8)<1> ABOVE_CUR_MB_YW(1, 0) // Copy p1
+ mov (8) PREV_MB_YW(3, 8)<1> ABOVE_CUR_MB_YW(1, 8) // Copy p0
+ mov (8) SRC_YW(0, 8)<1> ABOVE_CUR_MB_YW(2, 0) // Copy q0
+ mov (8) SRC_YW(1, 8)<1> ABOVE_CUR_MB_YW(2, 8) // Copy q1
+ mov (8) SRC_YW(2, 8)<1> ABOVE_CUR_MB_YW(3, 0) // Copy q2
+ //==================================================================================
+
+H0_Y_DONE:
+
+//BYPASS_H0_Y:
+//------------------------------------------------------------------
+ // Same alpha, alpha2, beta and MaskB for all internal edges
+
+ // Get (alpha >> 2) + 2
+ shr (16) Mbaff_ALPHA2(0,0)<1> r[ECM_AddrReg, bAlphaInternal_Y]<0;1,0>:ub 2:w // alpha >> 2
+
+ // alpha = bAlphaInternal_Y
+ // beta = bBetaInternal_Y
+ mov (16) Mbaff_ALPHA(0,0)<1> r[ECM_AddrReg, bAlphaInternal_Y]<0;1,0>:ub
+ mov (16) Mbaff_BETA(0,0)<1> r[ECM_AddrReg, bBetaInternal_Y]<0;1,0>:ub
+
+ mov (1) MaskB:uw 0:w // Set MaskB = 0 for all 3 edges, so it always uses bS < 4 algorithm.
+
+ add (16) Mbaff_ALPHA2(0,0)<1> Mbaff_ALPHA2(0,0)<16;16,1> 2:w // alpha2 = (alpha >> 2) + 2
+
+//---------- Deblock Y internal top edge (H1) ----------
+
+ // Bypass deblocking if FilterInternal4x4EdgesFlag = 0
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FilterInternal4x4EdgesFlag:w // Check for FilterInternal4x4EdgesFlag
+// (f0.0) jmpi BYPASS_H1_Y
+
+ // p3 = Cur MB Y row 0 = r[P_AddrReg, 0]<16;16,1>
+ // p2 = Cur MB Y row 1 = r[P_AddrReg, 16]<16;16,1>
+ // p1 = Cur MB Y row 2 = r[P_AddrReg, 32]<16;16,1>
+ // p0 = Cur MB Y row 3 = r[P_AddrReg, 48]<16;16,1>
+ // q0 = Cur MB Y row 4 = r[Q_AddrReg, 0]<16;16,1>
+ // q1 = Cur MB Y row 5 = r[Q_AddrReg, 16]<16;16,1>
+ // q2 = Cur MB Y row 6 = r[Q_AddrReg, 32]<16;16,1>
+ // q3 = Cur MB Y row 7 = r[Q_AddrReg, 48]<16;16,1>
+ mov (1) P_AddrReg:w SRC_MB_Y_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w 4*Y_ROW_WIDTH+SRC_MB_Y_BASE:w { NoDDChk }
+
+ mov (1) MaskA:uw r[ECM_AddrReg, wEdgeCntlMap_IntTopHorz]:uw
+
+ // tc0 has bTc0_h13_Y + bTc0_h12_Y + bTc0_h11_Y + bTc0_h10_Y
+ mov (16) Mbaff_TC0(0,0)<1> r[ECM_AddrReg, bTc0_h10_Y]<1;4,0>:ub
+
+// CALL(FILTER_Y_MBAFF, 1)
+ PRED_CALL(-f0.0, FILTER_Y_MBAFF, 1)
+
+//BYPASS_H1_Y:
+//------------------------------------------------------------------
+
+
+//---------- Deblock Y internal mid horizontal edge (H2) ----------
+
+ // Bypass deblocking if FilterInternal8x8EdgesFlag = 0
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FilterInternal8x8EdgesFlag:w // Check for FilterInternal4x4EdgesFlag
+// (f0.0) jmpi BYPASS_H2_Y
+
+ // p3 = Cur MB Y row 4 = r[P_AddrReg, 0]<16;16,1>
+ // p2 = Cur MB Y row 5 = r[P_AddrReg, 16]<16;16,1>
+ // p1 = Cur MB Y row 6 = r[P_AddrReg, 32]<16;16,1>
+ // p0 = Cur MB Y row 7 = r[P_AddrReg, 48]<16;16,1>
+ // q0 = Cur MB Y row 8 = r[Q_AddrReg, 0]<16;16,1>
+ // q1 = Cur MB Y row 9 = r[Q_AddrReg, 16]<16;16,1>
+ // q2 = Cur MB Y row 10 = r[Q_AddrReg, 32]<16;16,1>
+ // q3 = Cur MB Y row 11 = r[Q_AddrReg, 48]<16;16,1>
+ mov (1) P_AddrReg:w 4*Y_ROW_WIDTH+SRC_MB_Y_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w 8*Y_ROW_WIDTH+SRC_MB_Y_BASE:w { NoDDChk }
+
+ mov (1) MaskA:uw r[ECM_AddrReg, wEdgeCntlMap_IntMidHorz]:uw
+
+ // tc0 has bTc0_h23_Y + bTc0_h22_Y + bTc0_h21_Y + bTc0_h20_Y
+ mov (16) Mbaff_TC0(0,0)<1> r[ECM_AddrReg, bTc0_h20_Y]<1;4,0>:ub
+
+// CALL(FILTER_Y_MBAFF, 1)
+ PRED_CALL(-f0.0, FILTER_Y_MBAFF, 1)
+
+//BYPASS_H2_Y:
+//-----------------------------------------------
+
+
+//---------- Deblock Y internal bottom edge (H3) ----------
+
+ // Bypass deblocking if FilterInternal4x4EdgesFlag = 0
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FilterInternal4x4EdgesFlag:w // Check for FilterInternal4x4EdgesFlag
+// (f0.0) jmpi BYPASS_H3_Y
+
+ // p3 = Cur MB Y row 8 = r[P_AddrReg, 0]<16;16,1>
+ // p2 = Cur MB Y row 9 = r[P_AddrReg, 16]<16;16,1>
+ // p1 = Cur MB Y row 10 = r[P_AddrReg, 32]<16;16,1>
+ // p0 = Cur MB Y row 11 = r[P_AddrReg, 48]<16;16,1>
+ // q0 = Cur MB Y row 12 = r[Q_AddrReg, 0]<16;16,1>
+ // q1 = Cur MB Y row 13 = r[Q_AddrReg, 16]<16;16,1>
+ // q2 = Cur MB Y row 14 = r[Q_AddrReg, 32]<16;16,1>
+ // q3 = Cur MB Y row 15 = r[Q_AddrReg, 48]<16;16,1>
+ mov (1) P_AddrReg:w 8*Y_ROW_WIDTH+SRC_MB_Y_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w 12*Y_ROW_WIDTH+SRC_MB_Y_BASE:w { NoDDChk }
+
+ mov (1) MaskA:uw r[ECM_AddrReg, wEdgeCntlMap_IntBotHorz]:uw
+
+ // tc0 has bTc0_h33_Y + bTc0_h32_Y + bTc0_h31_Y + bTc0_h30_Y
+ mov (16) Mbaff_TC0(0,0)<1> r[ECM_AddrReg, bTc0_h30_Y]<1;4,0>:ub
+
+// CALL(FILTER_Y_MBAFF, 1)
+ PRED_CALL(-f0.0, FILTER_Y_MBAFF, 1)
+
+//BYPASS_H3_Y:
+//-----------------------------------------------
diff --git a/src/shaders/h264/ildb/AVC_ILDB_Filter_Mbaff_Y_v.asm b/src/shaders/h264/ildb/AVC_ILDB_Filter_Mbaff_Y_v.asm new file mode 100644 index 00000000..78461682 --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_Filter_Mbaff_Y_v.asm @@ -0,0 +1,269 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+////////// AVC ILDB filter vertical Mbaff Y ///////////////////////////////////////////////////////
+//
+// This filter code prepares the src data and control data for ILDB filtering on all vertical edges of Y.
+//
+// It sssumes the data for vertical de-blocking is already transposed.
+//
+// Luma:
+//
+// +-------+-------+-------+-------+
+// | | | | |
+// | | | | |
+// | | | | |
+// +-------+-------+-------+-------+
+// | | | | |
+// | | | | |
+// | | | | |
+// +-------+-------+-------+-------+
+// | | | | |
+// | | | | |
+// | | | | |
+// +-------+-------+-------+-------+
+// | | | | |
+// | | | | |
+// | | | | |
+// +-------+-------+-------+-------+
+//
+// V0 V1 V2 V3
+// Edge Edge Edge Edge
+//
+/////////////////////////////////////////////////////////////////////////////
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xBBBB:w
+#endif
+
+
+//========== Luma deblocking ==========
+
+
+//---------- Deblock Y external left edge (V0) ----------
+
+ cmp.z.f0.0 (8) null:w VertEdgePattern:uw LEFT_FIELD_CUR_FRAME:w
+ cmp.z.f0.1 (8) null:w VertEdgePattern:uw LEFT_FRAME_CUR_FIELD:w
+
+ // Intial set for both are frame or field
+ mov (16) Mbaff_ALPHA(0,0)<1> r[ECM_AddrReg, bAlphaLeft0_Y]<0;1,0>:ub
+ mov (16) Mbaff_BETA(0,0)<1> r[ECM_AddrReg, bBetaLeft0_Y]<0;1,0>:ub
+ mov (16) Mbaff_TC0(0,0)<1> r[ECM_AddrReg, bTc0_v00_0_Y]<1;4,0>:ub
+
+ // For FieldModeCurrentMbFlag=1 && FieldModeLeftMbFlag=0
+ (f0.0) mov (8) Mbaff_ALPHA(0,0)<2> r[ECM_AddrReg, bAlphaLeft0_Y]<0;1,0>:ub { NoDDClr }
+ (f0.0) mov (8) Mbaff_ALPHA(0,1)<2> r[ECM_AddrReg, bAlphaLeft1_Y]<0;1,0>:ub { NoDDChk }
+ (f0.0) mov (8) Mbaff_BETA(0,0)<2> r[ECM_AddrReg, bBetaLeft0_Y]<0;1,0>:ub { NoDDClr }
+ (f0.0) mov (8) Mbaff_BETA(0,1)<2> r[ECM_AddrReg, bBetaLeft1_Y]<0;1,0>:ub { NoDDChk }
+ (f0.0) mov (8) Mbaff_TC0(0,0)<2> r[ECM_AddrReg, bTc0_v00_0_Y]<1;2,0>:ub { NoDDClr }
+ (f0.0) mov (8) Mbaff_TC0(0,1)<2> r[ECM_AddrReg, bTc0_v00_1_Y]<1;2,0>:ub { NoDDChk }
+
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FilterLeftMbEdgeFlag:w // Check for FilterLeftMbEdgeFlag
+
+ // For FieldModeCurrentMbFlag=0 && FieldModeLeftMbFlag=1
+ (f0.1) mov (8) Mbaff_ALPHA(0,0)<1> r[ECM_AddrReg, bAlphaLeft0_Y]<0;1,0>:ub { NoDDClr }
+ (f0.1) mov (8) Mbaff_ALPHA(0,8)<1> r[ECM_AddrReg, bAlphaLeft1_Y]<0;1,0>:ub { NoDDChk }
+ (f0.1) mov (8) Mbaff_BETA(0,0)<1> r[ECM_AddrReg, bBetaLeft0_Y]<0;1,0>:ub { NoDDClr }
+ (f0.1) mov (8) Mbaff_BETA(0,8)<1> r[ECM_AddrReg, bBetaLeft1_Y]<0;1,0>:ub { NoDDChk }
+ (f0.1) mov (8) Mbaff_TC0(0,0)<1> r[ECM_AddrReg, bTc0_v00_0_Y]<1;2,0>:ub { NoDDClr }
+ (f0.1) mov (8) Mbaff_TC0(0,8)<1> r[ECM_AddrReg, bTc0_v00_1_Y]<1;2,0>:ub { NoDDChk }
+
+ // Get (alpha >> 2) + 2
+ shr (16) Mbaff_ALPHA2(0,0)<1> Mbaff_ALPHA(0) 2:w // alpha >> 2
+
+ // p3 = Prev MB Y row 0 = r[P_AddrReg, 0]<16;16,1>
+ // p2 = Prev MB Y row 1 = r[P_AddrReg, 16]<16;16,1>
+ // p1 = Prev MB Y row 2 = r[P_AddrReg, 32]<16;16,1>
+ // p0 = Prev MB Y row 3 = r[P_AddrReg, 48]<16;16,1>
+ // q0 = Cur MB Y row 0 = r[Q_AddrReg, 0]<16;16,1>
+ // q1 = Cur MB Y row 1 = r[Q_AddrReg, 16]<16;16,1>
+ // q2 = Cur MB Y row 2 = r[Q_AddrReg, 32]<16;16,1>
+ // q3 = Cur MB Y row 3 = r[Q_AddrReg, 48]<16;16,1>
+ mov (1) P_AddrReg:w PREV_MB_Y_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w SRC_MB_Y_BASE:w { NoDDChk }
+
+ // Set MaskA and MaskB
+ mov (2) MaskA<1>:uw r[ECM_AddrReg, wEdgeCntlMapA_ExtLeftVert0]<2;2,1>:uw
+
+ add (16) Mbaff_ALPHA2(0,0)<1> Mbaff_ALPHA2(0,0)<16;16,1> 2:w // alpha2 = (alpha >> 2) + 2
+
+// CALL(FILTER_Y_MBAFF, 1)
+ PRED_CALL(-f0.0, FILTER_Y_MBAFF, 1)
+
+//BYPASS_V0_Y:
+//------------------------------------------------------------------
+
+
+/*
+//---------- Deblock Y external left edge (V0) ----------
+
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FilterLeftMbEdgeFlag:w // Check for FilterLeftMbEdgeFlag
+ (f0.0) jmpi ILDB_LABEL(BYPASS_EXT_LEFT_EDGE_Y)
+
+ // Get vertical border edge control data
+
+// mov (1) f0.0 0:w
+ and (1) CTemp1_W:uw r[ECM_AddrReg, BitFlags]:ub FieldModeLeftMbFlag+FieldModeCurrentMbFlag:uw
+ cmp.z.f0.0 (1) null:w CTemp1_W:uw LEFT_FIELD_CUR_FRAME:w
+ (-f0.0) jmpi LEFT_EDGE_Y_NEXT1
+
+ // For FieldModeCurrentMbFlag=1 && FieldModeLeftMbFlag=0
+ mov (8) Mbaff_ALPHA(0,0)<2> r[ECM_AddrReg, bAlphaLeft0_Y]<0;1,0>:ub { NoDDClr }
+ mov (8) Mbaff_ALPHA(0,1)<2> r[ECM_AddrReg, bAlphaLeft1_Y]<0;1,0>:ub { NoDDChk }
+ mov (8) Mbaff_BETA(0,0)<2> r[ECM_AddrReg, bBetaLeft0_Y]<0;1,0>:ub { NoDDClr }
+ mov (8) Mbaff_BETA(0,1)<2> r[ECM_AddrReg, bBetaLeft1_Y]<0;1,0>:ub { NoDDChk }
+ mov (8) Mbaff_TC0(0,0)<2> r[ECM_AddrReg, bTc0_v00_0_Y]<1;2,0>:ub { NoDDClr }
+ mov (8) Mbaff_TC0(0,1)<2> r[ECM_AddrReg, bTc0_v00_1_Y]<1;2,0>:ub { NoDDChk }
+
+ jmpi LEFT_EDGE_Y_ALPHA_BETA_TC0_SELECTED
+
+LEFT_EDGE_Y_NEXT1:
+ cmp.z.f0.0 (1) null:w CTemp1_W:uw LEFT_FRAME_CUR_FIELD:w
+ (-f0.0) jmpi LEFT_EDGE_Y_NEXT2
+
+
+ // For FieldModeCurrentMbFlag=0 && FieldModeLeftMbFlag=1
+ mov (8) Mbaff_ALPHA(0,0)<1> r[ECM_AddrReg, bAlphaLeft0_Y]<0;1,0>:ub { NoDDClr }
+ mov (8) Mbaff_ALPHA(0,8)<1> r[ECM_AddrReg, bAlphaLeft1_Y]<0;1,0>:ub { NoDDChk }
+ mov (8) Mbaff_BETA(0,0)<1> r[ECM_AddrReg, bBetaLeft0_Y]<0;1,0>:ub { NoDDClr }
+ mov (8) Mbaff_BETA(0,8)<1> r[ECM_AddrReg, bBetaLeft1_Y]<0;1,0>:ub { NoDDChk }
+ mov (8) Mbaff_TC0(0,0)<1> r[ECM_AddrReg, bTc0_v00_0_Y]<1;2,0>:ub { NoDDClr }
+ mov (8) Mbaff_TC0(0,8)<1> r[ECM_AddrReg, bTc0_v00_1_Y]<1;2,0>:ub { NoDDChk }
+
+ jmpi LEFT_EDGE_Y_ALPHA_BETA_TC0_SELECTED
+
+LEFT_EDGE_Y_NEXT2:
+ // both are frame or field
+ mov (16) Mbaff_ALPHA(0,0)<1> r[ECM_AddrReg, bAlphaLeft0_Y]<0;1,0>:ub
+ mov (16) Mbaff_BETA(0,0)<1> r[ECM_AddrReg, bBetaLeft0_Y]<0;1,0>:ub
+ mov (16) Mbaff_TC0(0,0)<1> r[ECM_AddrReg, bTc0_v00_0_Y]<1;4,0>:ub
+
+LEFT_EDGE_Y_ALPHA_BETA_TC0_SELECTED:
+
+ mov (2) MaskA<1>:uw r[ECM_AddrReg, wEdgeCntlMapA_ExtLeftVert0]<2;2,1>:uw
+
+ // p3 = Prev MB Y row 0 = r[P_AddrReg, 0]<16;16,1>
+ // p2 = Prev MB Y row 1 = r[P_AddrReg, 16]<16;16,1>
+ // p1 = Prev MB Y row 2 = r[P_AddrReg, 32]<16;16,1>
+ // p0 = Prev MB Y row 3 = r[P_AddrReg, 48]<16;16,1>
+ // q0 = Cur MB Y row 0 = r[Q_AddrReg, 0]<16;16,1>
+ // q1 = Cur MB Y row 1 = r[Q_AddrReg, 16]<16;16,1>
+ // q2 = Cur MB Y row 2 = r[Q_AddrReg, 32]<16;16,1>
+ // q3 = Cur MB Y row 3 = r[Q_AddrReg, 48]<16;16,1>
+ mov (1) P_AddrReg:w PREV_MB_Y_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w SRC_MB_Y_BASE:w { NoDDChk }
+
+ // Get (alpha >> 2) + 2
+ shr (16) Mbaff_ALPHA2(0,0)<1> r[ECM_AddrReg, bAlphaLeft0_Y]<0;1,0>:ub 2:w // alpha >> 2
+ add (16) Mbaff_ALPHA2(0,0)<1> Mbaff_ALPHA2(0,0)<16;16,1> 2:w // alpha2 = (alpha >> 2) + 2
+
+ CALL(FILTER_Y_MBAFF, 1)
+
+ILDB_LABEL(BYPASS_EXT_LEFT_EDGE_Y):
+//------------------------------------------------------------------
+*/
+
+ // Same alpha, alpha2, beta and MaskB for all internal edges
+
+ // Get (alpha >> 2) + 2
+ shr (16) Mbaff_ALPHA2(0,0)<1> r[ECM_AddrReg, bAlphaInternal_Y]<0;1,0>:ub 2:w // alpha >> 2
+
+ // alpha = bAlphaInternal_Y
+ // beta = bBetaInternal_Y
+ mov (16) Mbaff_ALPHA(0,0)<1> r[ECM_AddrReg, bAlphaInternal_Y]<0;1,0>:ub
+ mov (16) Mbaff_BETA(0,0)<1> r[ECM_AddrReg, bBetaInternal_Y]<0;1,0>:ub
+
+ mov (1) MaskB:uw 0:w // Set MaskB = 0 for all 3 edges, so it always uses bS < 4 algorithm.
+
+ add (16) Mbaff_ALPHA2(0,0)<1> Mbaff_ALPHA2(0,0)<16;16,1> 2:w // alpha2 = (alpha >> 2) + 2
+
+//---------- Deblock Y internal left edge (V1) ----------
+
+ // Bypass deblocking if FilterInternal4x4EdgesFlag = 0
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FilterInternal4x4EdgesFlag:w // Check for FilterInternal4x4EdgesFlag
+// (f0.0) jmpi BYPASS_V1_Y
+
+ // p3 = Cur MB Y row 0 = r[P_AddrReg, 0]<16;16,1>
+ // p2 = Cur MB Y row 1 = r[P_AddrReg, 16]<16;16,1>
+ // p1 = Cur MB Y row 2 = r[P_AddrReg, 32]<16;16,1>
+ // p0 = Cur MB Y row 3 = r[P_AddrReg, 48]<16;16,1>
+ // q0 = Cur MB Y row 4 = r[Q_AddrReg, 0]<16;16,1>
+ // q1 = Cur MB Y row 5 = r[Q_AddrReg, 16]<16;16,1>
+ // q2 = Cur MB Y row 6 = r[Q_AddrReg, 32]<16;16,1>
+ // q3 = Cur MB Y row 7 = r[Q_AddrReg, 48]<16;16,1>
+ mov (1) P_AddrReg:w SRC_MB_Y_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w 4*Y_ROW_WIDTH+SRC_MB_Y_BASE:w { NoDDChk }
+
+ mov (1) MaskA:uw r[ECM_AddrReg, wEdgeCntlMap_IntLeftVert]:uw
+
+ // tc0 has bTc0_v31_Y + bTc0_v21_Y + bTc0_v11_Y + bTc0_v01_Y
+ mov (16) Mbaff_TC0(0,0)<1> r[ECM_AddrReg, bTc0_v01_Y]<1;4,0>:ub
+
+// CALL(FILTER_Y_MBAFF, 1)
+ PRED_CALL(-f0.0, FILTER_Y_MBAFF, 1)
+
+BYPASS_V1_Y:
+//------------------------------------------------------------------
+
+
+//---------- Deblock Y internal mid vert edge (V2) ----------
+
+ // Bypass deblocking if FilterInternal8x8EdgesFlag = 0
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FilterInternal8x8EdgesFlag:w // Check for FilterInternal4x4EdgesFlag
+// (f0.0) jmpi BYPASS_V2_Y
+
+ // p3 = Cur MB Y row 4 = r[P_AddrReg, 0]<16;16,1>
+ // p2 = Cur MB Y row 5 = r[P_AddrReg, 16]<16;16,1>
+ // p1 = Cur MB Y row 6 = r[P_AddrReg, 32]<16;16,1>
+ // p0 = Cur MB Y row 7 = r[P_AddrReg, 48]<16;16,1>
+ // q0 = Cur MB Y row 8 = r[Q_AddrReg, 0]<16;16,1>
+ // q1 = Cur MB Y row 9 = r[Q_AddrReg, 16]<16;16,1>
+ // q2 = Cur MB Y row 10 = r[Q_AddrReg, 32]<16;16,1>
+ // q3 = Cur MB Y row 11 = r[Q_AddrReg, 48]<16;16,1>
+ mov (1) P_AddrReg:w 4*Y_ROW_WIDTH+SRC_MB_Y_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w 8*Y_ROW_WIDTH+SRC_MB_Y_BASE:w { NoDDChk }
+
+ mov (1) MaskA:uw r[ECM_AddrReg, wEdgeCntlMap_IntMidVert]:uw
+
+ // tc0 has bTc0_v32_Y + bTc0_v22_Y + bTc0_v12_Y + bTc0_v02_Y
+ mov (16) Mbaff_TC0(0,0)<1> r[ECM_AddrReg, bTc0_v02_Y]<1;4,0>:ub
+
+// CALL(FILTER_Y_MBAFF, 1)
+ PRED_CALL(-f0.0, FILTER_Y_MBAFF, 1)
+
+BYPASS_V2_Y:
+//-----------------------------------------------
+
+
+//---------- Deblock Y interal right edge (V3) ----------
+
+ // Bypass deblocking if FilterInternal4x4EdgesFlag = 0
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FilterInternal4x4EdgesFlag:w // Check for FilterInternal4x4EdgesFlag
+// (f0.0) jmpi BYPASS_V3_Y
+
+ // p3 = Cur MB Y row 8 = r[P_AddrReg, 0]<16;16,1>
+ // p2 = Cur MB Y row 9 = r[P_AddrReg, 16]<16;16,1>
+ // p1 = Cur MB Y row 10 = r[P_AddrReg, 32]<16;16,1>
+ // p0 = Cur MB Y row 11 = r[P_AddrReg, 48]<16;16,1>
+ // q0 = Cur MB Y row 12 = r[Q_AddrReg, 0]<16;16,1>
+ // q1 = Cur MB Y row 13 = r[Q_AddrReg, 16]<16;16,1>
+ // q2 = Cur MB Y row 14 = r[Q_AddrReg, 32]<16;16,1>
+ // q3 = Cur MB Y row 15 = r[Q_AddrReg, 48]<16;16,1>
+ mov (1) P_AddrReg:w 8*Y_ROW_WIDTH+SRC_MB_Y_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w 12*Y_ROW_WIDTH+SRC_MB_Y_BASE:w { NoDDChk }
+
+ mov (1) MaskA:uw r[ECM_AddrReg, wEdgeCntlMap_IntRightVert]:uw
+
+ // tc0 has bTc0_v33_Y + bTc0_v23_Y + bTc0_v13_Y + bTc0_v03_Y
+ mov (16) Mbaff_TC0(0,0)<1> r[ECM_AddrReg, bTc0_v03_Y]<1;4,0>:ub
+
+// CALL(FILTER_Y_MBAFF, 1)
+ PRED_CALL(-f0.0, FILTER_Y_MBAFF, 1)
+
+BYPASS_V3_Y:
+//-----------------------------------------------
diff --git a/src/shaders/h264/ildb/AVC_ILDB_Filter_UV_h.asm b/src/shaders/h264/ildb/AVC_ILDB_Filter_UV_h.asm new file mode 100644 index 00000000..168df0f3 --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_Filter_UV_h.asm @@ -0,0 +1,145 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+////////// AVC ILDB filter horizontal UV ///////////////////////////////////////////////////////
+//
+// This filter code prepares the src data and control data for ILDB filtering on all horizontal edges of UV.
+//
+// It sssumes the data for horizontal de-blocking is already transposed.
+//
+// Chroma:
+//
+// +-------+-------+ H0 Edge
+// | | |
+// | | |
+// | | |
+// +-------+-------+ H1 Edge
+// | | |
+// | | |
+// | | |
+// +-------+-------+
+//
+/////////////////////////////////////////////////////////////////////////////
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xBBBC:w
+#endif
+
+//=============== Chroma deblocking ================
+
+//---------- Deblock U external top edge ----------
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FilterTopMbEdgeFlag:w // Check for FilterTopMbEdgeFlag
+// (f0.0) jmpi BYPASS_EXT_TOP_EDGE_UV
+
+ // Get horizontal border edge control data.
+
+ //***** Need to take every other bit to form U maskA and mask B
+ // Get Luma maskA and maskB
+ shr (16) TempRow0(0)<1> r[ECM_AddrReg, wEdgeCntlMapA_ExtTopHorz0]<0;1,0>:uw RRampW(0)
+ shr (16) TempRow1(0)<1> r[ECM_AddrReg, wEdgeCntlMapB_ExtTopHorz0]<0;1,0>:uw RRampW(0)
+
+ (f0.0) jmpi ILDB_LABEL(BYPASS_EXT_TOP_EDGE_UV)
+
+ // Extract UV MaskA and MaskB from every other bit of Y masks
+ and.nz.f0.0 (8) null:w TempRow0(0)<16;8,2> 1:w
+ and.nz.f0.1 (8) null:w TempRow1(0)<16;8,2> 1:w
+
+//---------- Deblock U external edge ----------
+ // p1 = Prev MB U row 0
+ // p0 = Prev MB U row 1
+ // q0 = Cur MB U row 0
+ // q1 = Cur MB U row 1
+// mov (1) P_AddrReg:w PREV_MB_U_BASE:w { NoDDClr }
+ mov (1) P_AddrReg:w TOP_MB_U_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w SRC_MB_U_BASE:w { NoDDChk }
+
+ // alpha = bAlphaTop0_Cb, beta = bBetaTop0_Cb
+ mov (2) alpha<1>:w r[ECM_AddrReg, bAlphaTop0_Cb]<2;2,1>:ub { NoDDClr }
+ // tc0 has bTc0_h03_0_Cb + bTc0_h02_0_Cb + bTc0_h01_0_Cb + bTc0_h00_0_Cb
+ mov (4) tc0<1>:ub r[ECM_AddrReg, bTc0_h00_0_Cb]<4;4,1>:ub { NoDDChk }
+
+ // UV MaskA and MaskB
+ mov (2) MaskA<1>:uw f0.0<2;2,1>:uw
+
+ CALL(FILTER_UV, 1)
+
+//---------- Deblock V external top edge ----------
+ // p1 = Prev MB V row 0
+ // p0 = Prev MB V row 1
+ // q0 = Cur MB V row 0
+ // q1 = Cur MB V row 1
+// mov (1) P_AddrReg:w PREV_MB_V_BASE:w { NoDDClr }
+ mov (1) P_AddrReg:w TOP_MB_V_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w SRC_MB_V_BASE:w { NoDDChk }
+
+ // alpha = bAlphaTop0_Cr, beta = bBetaTop0_Cr
+ mov (2) alpha<1>:w r[ECM_AddrReg, bAlphaTop0_Cr]<2;2,1>:ub { NoDDClr }
+
+ // tc0 has bTc0_h03_0_Cr + bTc0_h02_0_Cr + bTc0_h01_0_Cr + bTc0_h00_0_Cr
+ mov (4) tc0<1>:ub r[ECM_AddrReg, bTc0_h00_0_Cr]<4;4,1>:ub { NoDDChk }
+
+ // UV MaskA and MaskB
+ mov (2) f0.0<1>:uw MaskA<2;2,1>:uw
+
+ CALL(FILTER_UV, 1)
+
+ILDB_LABEL(BYPASS_EXT_TOP_EDGE_UV):
+
+ // Set EdgeCntlMap2 = 0, so it always uses bS < 4 algorithm.
+
+ // Bypass deblocking if FilterInternal4x4EdgesFlag = 0
+// and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FilterInternal4x4EdgesFlag:w // Check for FilterInternal4x4EdgesFlag
+// (f0.0) jmpi BYPASS_4x4_DEBLOCK_H
+
+//---------- Deblock U internal horz middle edge ----------
+
+ //***** Need to take every other bit to form U maskA
+ // Get Luma maskA and maskB
+ shr (16) TempRow0(0)<1> r[ECM_AddrReg, wEdgeCntlMap_IntMidHorz]<0;1,0>:uw RRampW(0)
+
+ // p1 = Cur MB U row 2
+ // p0 = Cur MB U row 3
+ // q0 = Cur MB U row 4
+ // q1 = Cur MB U row 5
+ mov (1) P_AddrReg:w 4*UV_ROW_WIDTH+SRC_MB_U_BASE:w { NoDDClr } // Skip 2 U rows and 2 V rows
+ mov (1) Q_AddrReg:w 8*UV_ROW_WIDTH+SRC_MB_U_BASE:w { NoDDChk }
+
+ // alpha = bAlphaInternal_Cb, beta = bBetaInternal_Cb
+ mov (2) alpha<1>:w r[ECM_AddrReg, bAlphaInternal_Cb]<2;2,1>:ub { NoDDClr }
+ // tc0 has bTc0_h23_Cb + bTc0_h22_Cb + bTc0_h21_Cb + bTc0_h20_Cb
+ mov (4) tc0<1>:ub r[ECM_AddrReg, bTc0_h20_Cb]<4;4,1>:ub { NoDDChk }
+
+ // Extract UV MaskA and MaskB from every other bit of Y masks
+ and.nz.f0.0 (8) null:w TempRow0(0)<16;8,2> 1:w
+
+ // UV MaskA and MaskB
+ mov (1) f0.1:uw 0:w
+ mov (1) MaskB:uw 0:w { NoDDClr }
+ mov (1) MaskA:uw f0.0:uw { NoDDChk }
+
+ CALL(FILTER_UV, 1)
+
+//---------- Deblock V internal horz middle edge ----------
+ // p1 = Cur MB V row 2
+ // p0 = Cur MB V row 3
+ // q0 = Cur MB V row 4
+ // q1 = Cur MB V row 5
+ mov (1) P_AddrReg:w 4*UV_ROW_WIDTH+SRC_MB_V_BASE:w { NoDDClr } // Skip 2 U rows and 2 V rows
+ mov (1) Q_AddrReg:w 8*UV_ROW_WIDTH+SRC_MB_V_BASE:w { NoDDChk }
+
+ // alpha = bAlphaInternal_Cr, beta = bBetaInternal_Cr
+ mov (2) alpha<1>:w r[ECM_AddrReg, bAlphaInternal_Cr]<2;2,1>:ub { NoDDClr }
+ // tc0 has bTc0_h23_Cr + bTc0_h22_Cr + bTc0_h21_Cr + bTc0_h20_Cr
+ mov (4) tc0<1>:ub r[ECM_AddrReg, bTc0_h20_Cr]<4;4,1>:ub { NoDDChk }
+
+ // UV MaskA and MaskB
+ mov (2) f0.0<1>:uw MaskA<2;2,1>:uw
+
+ CALL(FILTER_UV, 1)
+
+//BYPASS_4x4_DEBLOCK_H:
diff --git a/src/shaders/h264/ildb/AVC_ILDB_Filter_UV_v.asm b/src/shaders/h264/ildb/AVC_ILDB_Filter_UV_v.asm new file mode 100644 index 00000000..8d331a09 --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_Filter_UV_v.asm @@ -0,0 +1,145 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+////////// AVC LDB filter vertical UV ///////////////////////////////////////////////////////
+//
+// This filter code prepares the src data and control data for ILDB filtering on all vertical edges of UV.
+//
+// It sssumes the data for vertical de-blocking is already transposed.
+//
+// Chroma:
+//
+// +-------+-------+
+// | | |
+// | | |
+// | | |
+// +-------+-------+
+// | | |
+// | | |
+// | | |
+// +-------+-------+
+//
+// V0 V1
+// Edge Edge
+//
+/////////////////////////////////////////////////////////////////////////////
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xBBBC:w
+#endif
+
+//=============== Chroma deblocking ================
+
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FilterLeftMbEdgeFlag:w // Check for FilterLeftMbEdgeFlag
+// (f0.0) jmpi BYPASS_EXT_LEFT_EDGE_UV
+
+ // Get vertical border edge control data.
+
+ // Get Luma maskA and maskB
+ shr (16) TempRow0(0)<1> r[ECM_AddrReg, wEdgeCntlMapA_ExtLeftVert0]<0;1,0>:uw RRampW(0)
+ shr (16) TempRow1(0)<1> r[ECM_AddrReg, wEdgeCntlMapB_ExtLeftVert0]<0;1,0>:uw RRampW(0)
+
+ (f0.0) jmpi ILDB_LABEL(BYPASS_EXT_LEFT_EDGE_UV)
+
+ // Extract UV MaskA and MaskB from every other bit of Y masks
+ and.nz.f0.0 (8) null:w TempRow0(0)<16;8,2> 1:w
+ and.nz.f0.1 (8) null:w TempRow1(0)<16;8,2> 1:w
+
+//---------- Deblock U external edge ----------
+ // p1 = Prev MB U row 0
+ // p0 = Prev MB U row 1
+ // q0 = Cur MB U row 0
+ // q1 = Cur MB U row 1
+ mov (1) P_AddrReg:w PREV_MB_U_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w SRC_MB_U_BASE:w { NoDDChk }
+
+ // alpha = bAlphaLeft0_Cb, beta = bBetaLeft0_Cb
+ mov (2) alpha<1>:w r[ECM_AddrReg, bAlphaLeft0_Cb]<2;2,1>:ub { NoDDClr }
+ // tc0 has bTc0_v30_0_Cb + bTc0_v20_0_Cb + bTc0_v10_0_Cb + bTc0_v00_0_Cb
+ mov (4) tc0<1>:ub r[ECM_AddrReg, bTc0_v00_0_Cb]<4;4,1>:ub { NoDDChk }
+
+ // UV MaskA and MaskB
+ mov (2) MaskA<1>:uw f0.0<2;2,1>:uw
+
+ CALL(FILTER_UV, 1)
+
+//---------- Deblock V external edge ----------
+ // p1 = Prev MB V row 0
+ // p0 = Prev MB V row 1
+ // q0 = Cur MB V row 0
+ // q1 = Cur MB V row 1
+ mov (1) P_AddrReg:w PREV_MB_V_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w SRC_MB_V_BASE:w { NoDDChk }
+
+ // for vert edge: alpha = bAlphaLeft0_Cr, beta = bBetaLeft0_Cr
+ mov (2) alpha<1>:w r[ECM_AddrReg, bAlphaLeft0_Cr]<2;2,1>:ub { NoDDClr }
+
+ // tc0 has bTc0_v30_0_Cr + bTc0_v20_0_Cr + bTc0_v10_0_Cr + bTc0_v00_0_Cr
+ mov (4) tc0<1>:ub r[ECM_AddrReg, bTc0_v00_0_Cr]<4;4,1>:ub { NoDDChk }
+
+ // UV MaskA and MaskB
+ mov (2) f0.0<1>:uw MaskA<2;2,1>:uw
+
+ CALL(FILTER_UV, 1)
+
+
+ILDB_LABEL(BYPASS_EXT_LEFT_EDGE_UV):
+ // Set EdgeCntlMap2 = 0, so it always uses bS < 4 algorithm.
+ // Same alpha and beta for all internal vert and horiz edges
+
+
+ //***** Need to take every other bit to form U or V maskA
+ // Get Luma maskA and maskB
+ shr (16) TempRow0(0)<1> r[ECM_AddrReg, wEdgeCntlMap_IntMidVert]<0;1,0>:uw RRampW(0)
+
+//---------- Deblock U internal edge ----------
+ // p1 = Cur MB U row 2
+ // p0 = Cur MB U row 3
+ // q0 = Cur MB U row 4
+ // q1 = Cur MB U row 5
+ mov (1) P_AddrReg:w 4*UV_ROW_WIDTH+SRC_MB_U_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w 8*UV_ROW_WIDTH+SRC_MB_U_BASE:w { NoDDChk }
+
+ // alpha = bAlphaInternal_Cb, beta = bBetaInternal_Cb
+ mov (2) alpha<1>:w r[ECM_AddrReg, bAlphaInternal_Cb]<2;2,1>:ub { NoDDClr }
+
+ // tc0 has bTc0_v32_Cb + bTc0_v22_Cb + bTc0_v12_Cb + bTc0_v02_Cb
+ mov (4) tc0<1>:ub r[ECM_AddrReg, bTc0_v02_Cb]<4;4,1>:ub { NoDDChk }
+
+ // Extract UV MaskA and MaskB from every other bit of Y masks
+ and.nz.f0.0 (8) null:w TempRow0(0)<16;8,2> 1:w
+
+ // UV MaskA and MaskB
+ mov (1) f0.1:uw 0:w
+ mov (1) MaskB:uw 0:w { NoDDClr }
+ mov (1) MaskA:uw f0.0:uw { NoDDChk }
+
+ CALL(FILTER_UV, 1)
+
+
+//---------- Deblock V internal edge ----------
+ // P1 = Cur MB V row 2
+ // P0 = Cur MB V row 3
+ // Q0 = Cur MB V row 4
+ // Q1 = Cur MB V row 5
+ mov (1) P_AddrReg:w 4*UV_ROW_WIDTH+SRC_MB_V_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w 8*UV_ROW_WIDTH+SRC_MB_V_BASE:w { NoDDChk }
+
+ // alpha = bAlphaInternal_Cr, beta = bBetaInternal_Cr
+ mov (2) alpha<1>:w r[ECM_AddrReg, bAlphaInternal_Cr]<2;2,1>:ub { NoDDClr }
+
+ // tc0 has bTc0_v32_Cr + bTc0_v22_Cr + bTc0_v12_Cr + bTc0_v02_Cr
+ mov (4) tc0<1>:ub r[ECM_AddrReg, bTc0_v02_Cr]<4;4,1>:ub { NoDDChk }
+
+ // UV MaskA and MaskB
+ mov (2) f0.0<1>:uw MaskA<2;2,1>:uw
+
+ CALL(FILTER_UV, 1)
+
+
+//BYPASS_4x4_DEBLOCK_V:
diff --git a/src/shaders/h264/ildb/AVC_ILDB_Filter_Y_h.asm b/src/shaders/h264/ildb/AVC_ILDB_Filter_Y_h.asm new file mode 100644 index 00000000..45ab4dfd --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_Filter_Y_h.asm @@ -0,0 +1,199 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+////////// AVC ILDB filter horizontal Y ///////////////////////////////////////////////////////
+//
+// This filter code prepares the src data and control data for ILDB filtering on all horizontal edges of Y.
+//
+// It sssumes the data for horizontal de-blocking is already transposed.
+//
+// Luma:
+//
+// +-------+-------+-------+-------+ H0 Edge
+// | | | | |
+// | | | | |
+// | | | | |
+// +-------+-------+-------+-------+ H1 Edge
+// | | | | |
+// | | | | |
+// | | | | |
+// +-------+-------+-------+-------+ H2 Edge
+// | | | | |
+// | | | | |
+// | | | | |
+// +-------+-------+-------+-------+ H3 Edge
+// | | | | |
+// | | | | |
+// | | | | |
+// +-------+-------+-------+-------+
+//
+/////////////////////////////////////////////////////////////////////////////
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xBBBB:w
+#endif
+
+
+//========== Luma deblocking ==========
+
+
+//---------- Deblock Y external top edge (H0) ----------
+
+ // Bypass deblocking if it is the top edge of the picture.
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FilterTopMbEdgeFlag:w // Check for FilterTopMbEdgeFlag
+
+// and.z.f0.1 (1) null:uw r[ECM_AddrReg, wEdgeCntlMapA_ExtTopHorz0]:uw 0xFFFF:uw // MaskA = 0?
+
+ // Get (alpha >> 2) + 2
+ shr (1) alpha2:w r[ECM_AddrReg, bAlphaTop0_Y]:ub 2:w // alpha >> 2
+
+ // p3 = Prev MB Y row 0 = r[P_AddrReg, 0]<16;16,1>
+ // p2 = Prev MB Y row 1 = r[P_AddrReg, 16]<16;16,1>
+ // p1 = Prev MB Y row 2 = r[P_AddrReg, 32]<16;16,1>
+ // p0 = Prev MB Y row 3 = r[P_AddrReg, 48]<16;16,1>
+ // q0 = Cur MB Y row 0 = r[Q_AddrReg, 0]<16;16,1>
+ // q1 = Cur MB Y row 1 = r[Q_AddrReg, 16]<16;16,1>
+ // q2 = Cur MB Y row 2 = r[Q_AddrReg, 32]<16;16,1>
+ // q3 = Cur MB Y row 3 = r[Q_AddrReg, 48]<16;16,1>
+// mov (1) P_AddrReg:w PREV_MB_Y_BASE:w { NoDDClr }
+ mov (1) P_AddrReg:w TOP_MB_Y_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w SRC_MB_Y_BASE:w { NoDDChk }
+
+ // Get horizontal border edge control data
+ // alpha = bAlphaTop0_Y
+ // beta = bBetaTop0_Y
+ mov (2) alpha<1>:w r[ECM_AddrReg, bAlphaTop0_Y]<2;2,1>:ub { NoDDClr } // 2 channels for alpha and beta
+
+ mov (2) MaskA<1>:uw r[ECM_AddrReg, wEdgeCntlMapA_ExtTopHorz0]<2;2,1>:uw { NoDDClr, NoDDChk }
+
+ // tc0 has bTc0_h03_0_Y | bTc0_h02_0_Y | bTc0_h01_0_Y | bTc0_h00_0_Y
+ mov (4) tc0<1>:ub r[ECM_AddrReg, bTc0_h00_0_Y]<4;4,1>:ub { NoDDChk }
+
+// (f0.0) jmpi BYPASS_EXT_TOP_EDGE_Y
+// (f0.0.anyv) jmpi BYPASS_EXT_TOP_EDGE_Y
+
+ add (1) alpha2:w alpha2:w 2:w // alpha2 = (alpha >> 2) + 2
+
+// CALL(FILTER_Y, 1)
+ PRED_CALL(-f0.0, FILTER_Y, 1)
+
+//BYPASS_EXT_TOP_EDGE_Y:
+//------------------------------------------------------------------
+ // Same alpha, alpha2, beta and MaskB for all internal edges
+
+ // Get (alpha >> 2) + 2
+ shr (1) alpha2:w r[ECM_AddrReg, bAlphaInternal_Y]:ub 2:w // alpha >> 2
+
+ // alpha = bAlphaInternal_Y
+ // beta = bBetaInternal_Y
+ mov (2) alpha<1>:w r[ECM_AddrReg, bAlphaInternal_Y]<2;2,1>:ub { NoDDClr }
+
+ // Set MaskB = 0 for all 3 int edges, so it always uses bS < 4 algorithm.
+ mov (1) MaskB:uw 0:w { NoDDChk }
+
+ add (1) alpha2:w alpha2:w 2:w // alpha2 = (alpha >> 2) + 2
+
+
+//---------- Deblock Y internal top edge (H1) ----------
+
+ // Bypass deblocking if FilterInternal4x4EdgesFlag = 0
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FilterInternal4x4EdgesFlag:w // Check for FilterInternal4x4EdgesFlag
+
+ // p3 = Cur MB Y row 0 = r[P_AddrReg, 0]<16;16,1>
+ // p2 = Cur MB Y row 1 = r[P_AddrReg, 16]<16;16,1>
+ // p1 = Cur MB Y row 2 = r[P_AddrReg, 32]<16;16,1>
+ // p0 = Cur MB Y row 3 = r[P_AddrReg, 48]<16;16,1>
+ // q0 = Cur MB Y row 4 = r[Q_AddrReg, 0]<16;16,1>
+ // q1 = Cur MB Y row 5 = r[Q_AddrReg, 16]<16;16,1>
+ // q2 = Cur MB Y row 6 = r[Q_AddrReg, 32]<16;16,1>
+ // q3 = Cur MB Y row 7 = r[Q_AddrReg, 48]<16;16,1>
+ mov (1) P_AddrReg:w SRC_MB_Y_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w 4*Y_ROW_WIDTH+SRC_MB_Y_BASE:w { NoDDChk }
+
+ mov (1) MaskA:uw r[ECM_AddrReg, wEdgeCntlMap_IntTopHorz]:uw { NoDDClr }
+
+ // tc0 has bTc0_h13_Y + bTc0_h12_Y + bTc0_h11_Y + bTc0_h10_Y
+ mov (4) tc0<1>:ub r[ECM_AddrReg, bTc0_h10_Y]<4;4,1>:ub { NoDDChk }
+
+// (f0.0) jmpi BYPASS_4x4_DEBLOCK_H
+// (f0.0.anyv) jmpi BYPASS_4x4_DEBLOCK_H
+
+// CALL(FILTER_Y, 1)
+ PRED_CALL(-f0.0, FILTER_Y, 1)
+
+//BYPASS_4x4_DEBLOCK_H:
+//------------------------------------------------------------------
+
+
+//---------- Deblock Y internal mid horizontal edge (H2) ----------
+
+ // Bypass deblocking if FilterInternal8x8EdgesFlag = 0
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FilterInternal8x8EdgesFlag:w // Check for FilterInternal4x4EdgesFlag
+
+// and.z.f0.1 (1) null:uw r[ECM_AddrReg, wEdgeCntlMap_IntMidHorz]:uw 0xFFFF:uw // MaskA = 0?
+
+ // p3 = Cur MB Y row 4 = r[P_AddrReg, 0]<16;16,1>
+ // p2 = Cur MB Y row 5 = r[P_AddrReg, 16]<16;16,1>
+ // p1 = Cur MB Y row 6 = r[P_AddrReg, 32]<16;16,1>
+ // p0 = Cur MB Y row 7 = r[P_AddrReg, 48]<16;16,1>
+ // q0 = Cur MB Y row 8 = r[Q_AddrReg, 0]<16;16,1>
+ // q1 = Cur MB Y row 9 = r[Q_AddrReg, 16]<16;16,1>
+ // q2 = Cur MB Y row 10 = r[Q_AddrReg, 32]<16;16,1>
+ // q3 = Cur MB Y row 11 = r[Q_AddrReg, 48]<16;16,1>
+ mov (1) P_AddrReg:w 4*Y_ROW_WIDTH+SRC_MB_Y_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w 8*Y_ROW_WIDTH+SRC_MB_Y_BASE:w { NoDDChk }
+
+ mov (1) MaskA:uw r[ECM_AddrReg, wEdgeCntlMap_IntMidHorz]:uw { NoDDClr }
+// mov (1) MaskB:uw 0:w // Set MaskB = 0, so it always uses bS < 4 algorithm.
+
+ // tc0 has bTc0_h23_Y + bTc0_h22_Y + bTc0_h21_Y + bTc0_h20_Y
+ mov (4) tc0<1>:ub r[ECM_AddrReg, bTc0_h20_Y]<4;4,1>:ub { NoDDChk }
+
+// (f0.0) jmpi BYPASS_8x8_DEBLOCK_H
+// (f0.0.anyv) jmpi BYPASS_8x8_DEBLOCK_H
+
+// CALL(FILTER_Y, 1)
+ PRED_CALL(-f0.0, FILTER_Y, 1)
+
+//BYPASS_8x8_DEBLOCK_H:
+//-----------------------------------------------
+
+
+//---------- Deblock Y internal bottom edge (H3) ----------
+
+ // Bypass deblocking if FilterInternal4x4EdgesFlag = 0
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FilterInternal4x4EdgesFlag:w // Check for FilterInternal4x4EdgesFlag
+
+// and.z.f0.1 (1) null:uw r[ECM_AddrReg, wEdgeCntlMap_IntBotHorz]:uw 0xFFFF:uw // MaskA = 0?
+
+ // p3 = Cur MB Y row 8 = r[P_AddrReg, 0]<16;16,1>
+ // p2 = Cur MB Y row 9 = r[P_AddrReg, 16]<16;16,1>
+ // p1 = Cur MB Y row 10 = r[P_AddrReg, 32]<16;16,1>
+ // p0 = Cur MB Y row 11 = r[P_AddrReg, 48]<16;16,1>
+ // q0 = Cur MB Y row 12 = r[Q_AddrReg, 0]<16;16,1>
+ // q1 = Cur MB Y row 13 = r[Q_AddrReg, 16]<16;16,1>
+ // q2 = Cur MB Y row 14 = r[Q_AddrReg, 32]<16;16,1>
+ // q3 = Cur MB Y row 15 = r[Q_AddrReg, 48]<16;16,1>
+ mov (1) P_AddrReg:w 8*Y_ROW_WIDTH+SRC_MB_Y_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w 12*Y_ROW_WIDTH+SRC_MB_Y_BASE:w { NoDDChk }
+
+
+ mov (1) MaskA:uw r[ECM_AddrReg, wEdgeCntlMap_IntBotHorz]:uw { NoDDClr }
+// mov (1) MaskB:uw 0:w // Set MaskB = 0, so it always uses bS < 4 algorithm.
+
+ // tc0 has bTc0_h33_Y + bTc0_h32_Y + bTc0_h31_Y + bTc0_h30_Y
+ mov (4) tc0<1>:ub r[ECM_AddrReg, bTc0_h30_Y]<4;4,1>:ub { NoDDChk }
+
+// (f0.0) jmpi BYPASS_4x4_DEBLOCK_H2
+// (f0.0.anyv) jmpi BYPASS_4x4_DEBLOCK_H2
+
+// CALL(FILTER_Y, 1)
+ PRED_CALL(-f0.0, FILTER_Y, 1)
+
+//BYPASS_4x4_DEBLOCK_H2:
+//-----------------------------------------------
diff --git a/src/shaders/h264/ildb/AVC_ILDB_Filter_Y_v.asm b/src/shaders/h264/ildb/AVC_ILDB_Filter_Y_v.asm new file mode 100644 index 00000000..9d6bf0a3 --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_Filter_Y_v.asm @@ -0,0 +1,203 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+////////// AVC ILDB filter vertical Y ///////////////////////////////////////////////////////
+//
+// This filter code prepares the src data and control data for ILDB filtering on all vertical edges of Y.
+//
+// It sssumes the data for vertical de-blocking is already transposed.
+//
+// Luma:
+//
+// +-------+-------+-------+-------+
+// | | | | |
+// | | | | |
+// | | | | |
+// +-------+-------+-------+-------+
+// | | | | |
+// | | | | |
+// | | | | |
+// +-------+-------+-------+-------+
+// | | | | |
+// | | | | |
+// | | | | |
+// +-------+-------+-------+-------+
+// | | | | |
+// | | | | |
+// | | | | |
+// +-------+-------+-------+-------+
+//
+// V0 V1 V2 V3
+// Edge Edge Edge Edge
+//
+/////////////////////////////////////////////////////////////////////////////
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xBBBB:w
+#endif
+
+
+//========== Luma deblocking ==========
+
+
+//---------- Deblock Y external left edge (V0) ----------
+
+ // Bypass deblocking if it is left edge of the picture.
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FilterLeftMbEdgeFlag:w // Check for FilterLeftMbEdgeFlag
+
+// and.z.f0.1 (1) null:uw r[ECM_AddrReg, wEdgeCntlMapA_ExtLeftVert0]:uw 0xFFFF:uw // MaskA = 0?
+
+ // Get (alpha >> 2) + 2
+ shr (1) alpha2:w r[ECM_AddrReg, bAlphaLeft0_Y]:ub 2:w // alpha >> 2
+
+ // p3 = Prev MB Y row 0 = r[P_AddrReg, 0]<16;16,1>
+ // p2 = Prev MB Y row 1 = r[P_AddrReg, 16]<16;16,1>
+ // p1 = Prev MB Y row 2 = r[P_AddrReg, 32]<16;16,1>
+ // p0 = Prev MB Y row 3 = r[P_AddrReg, 48]<16;16,1>
+ // q0 = Cur MB Y row 0 = r[Q_AddrReg, 0]<16;16,1>
+ // q1 = Cur MB Y row 1 = r[Q_AddrReg, 16]<16;16,1>
+ // q2 = Cur MB Y row 2 = r[Q_AddrReg, 32]<16;16,1>
+ // q3 = Cur MB Y row 3 = r[Q_AddrReg, 48]<16;16,1>
+ mov (1) P_AddrReg:w PREV_MB_Y_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w SRC_MB_Y_BASE:w { NoDDChk }
+
+ // Get vertical border edge control data
+ // alpha = bAlphaLeft0_Y
+ // beta = bBetaLeft0_Y
+ mov (2) alpha<1>:w r[ECM_AddrReg, bAlphaLeft0_Y]<2;2,1>:ub { NoDDClr } // 2 channels for alpha and beta
+
+ mov (2) MaskA<1>:uw r[ECM_AddrReg, wEdgeCntlMapA_ExtLeftVert0]<2;2,1>:uw { NoDDClr, NoDDChk }
+
+ // tc0 has bTc0_v30_0_Y | bTc0_v20_0_Y | bTc0_v10_0_Y | bTc0_v00_0_Y
+ mov (4) tc0<1>:ub r[ECM_AddrReg, bTc0_v00_0_Y]<4;4,1>:ub { NoDDChk }
+
+// (f0.0) jmpi BYPASS_EXT_LEFT_EDGE_Y
+// (f0.0.anyv) jmpi BYPASS_EXT_LEFT_EDGE_Y
+
+ add (1) alpha2:w alpha2:w 2:w // alpha2 = (alpha >> 2) + 2
+
+// CALL(FILTER_Y, 1)
+ PRED_CALL(-f0.0, FILTER_Y, 1)
+
+
+//BYPASS_EXT_LEFT_EDGE_Y:
+//------------------------------------------------------------------
+ // Same alpha, alpha2, beta and MaskB for all internal edges
+
+ // Get (alpha >> 2) + 2
+ shr (1) alpha2:w r[ECM_AddrReg, bAlphaInternal_Y]:ub 2:w // alpha >> 2
+
+ // alpha = bAlphaInternal_Y
+ // beta = bBetaInternal_Y
+ mov (2) alpha<1>:w r[ECM_AddrReg, bAlphaInternal_Y]<2;2,1>:ub { NoDDClr }
+
+ // Set MaskB = 0 for all 3 int edges, so it always uses bS < 4 algorithm.
+ mov (1) MaskB:uw 0:w { NoDDChk }
+
+ add (1) alpha2:w alpha2:w 2:w // alpha2 = (alpha >> 2) + 2
+
+
+//---------- Deblock Y internal left edge (V1) ----------
+
+ // Bypass deblocking if FilterInternal4x4EdgesFlag = 0
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FilterInternal4x4EdgesFlag:w // Check for FilterInternal4x4EdgesFlag
+
+// and.z.f0.1 (1) null:uw r[ECM_AddrReg, wEdgeCntlMap_IntLeftVert]:uw 0xFFFF:uw // MaskA = 0?
+
+ // p3 = Cur MB Y row 0 = r[P_AddrReg, 0]<16;16,1>
+ // p2 = Cur MB Y row 1 = r[P_AddrReg, 16]<16;16,1>
+ // p1 = Cur MB Y row 2 = r[P_AddrReg, 32]<16;16,1>
+ // p0 = Cur MB Y row 3 = r[P_AddrReg, 48]<16;16,1>
+ // q0 = Cur MB Y row 4 = r[Q_AddrReg, 0]<16;16,1>
+ // q1 = Cur MB Y row 5 = r[Q_AddrReg, 16]<16;16,1>
+ // q2 = Cur MB Y row 6 = r[Q_AddrReg, 32]<16;16,1>
+ // q3 = Cur MB Y row 7 = r[Q_AddrReg, 48]<16;16,1>
+ mov (1) P_AddrReg:w SRC_MB_Y_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w 4*Y_ROW_WIDTH+SRC_MB_Y_BASE:w { NoDDChk }
+
+ mov (1) MaskA:uw r[ECM_AddrReg, wEdgeCntlMap_IntLeftVert]:uw { NoDDClr }
+
+ // tc0 has bTc0_v31_Y + bTc0_v21_Y + bTc0_v11_Y + bTc0_v01_Y
+ mov (4) tc0<1>:ub r[ECM_AddrReg, bTc0_v01_Y]<4;4,1>:ub { NoDDChk }
+
+// (f0.0) jmpi BYPASS_4x4_DEBLOCK_V
+// (f0.0.anyv) jmpi BYPASS_4x4_DEBLOCK_V
+
+// CALL(FILTER_Y, 1)
+ PRED_CALL(-f0.0, FILTER_Y, 1)
+
+//BYPASS_4x4_DEBLOCK_V:
+//------------------------------------------------------------------
+
+
+//---------- Deblock Y internal mid vert edge (V2) ----------
+
+ // Bypass deblocking if FilterInternal8x8EdgesFlag = 0
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FilterInternal8x8EdgesFlag:w // Check for FilterInternal4x4EdgesFlag
+
+// and.z.f0.1 (1) null:uw r[ECM_AddrReg, wEdgeCntlMap_IntMidVert]:uw 0xFFFF:uw // MaskA = 0?
+
+ // p3 = Cur MB Y row 4 = r[P_AddrReg, 0]<16;16,1>
+ // p2 = Cur MB Y row 5 = r[P_AddrReg, 16]<16;16,1>
+ // p1 = Cur MB Y row 6 = r[P_AddrReg, 32]<16;16,1>
+ // p0 = Cur MB Y row 7 = r[P_AddrReg, 48]<16;16,1>
+ // q0 = Cur MB Y row 8 = r[Q_AddrReg, 0]<16;16,1>
+ // q1 = Cur MB Y row 9 = r[Q_AddrReg, 16]<16;16,1>
+ // q2 = Cur MB Y row 10 = r[Q_AddrReg, 32]<16;16,1>
+ // q3 = Cur MB Y row 11 = r[Q_AddrReg, 48]<16;16,1>
+ mov (1) P_AddrReg:w 4*Y_ROW_WIDTH+SRC_MB_Y_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w 8*Y_ROW_WIDTH+SRC_MB_Y_BASE:w { NoDDChk }
+
+ mov (1) MaskA:uw r[ECM_AddrReg, wEdgeCntlMap_IntMidVert]:uw { NoDDClr }
+// mov (1) MaskB:uw 0:w // Set MaskB = 0, so it always uses bS < 4 algorithm.
+
+ // tc0 has bTc0_v32_Y + bTc0_v22_Y + bTc0_v12_Y + bTc0_v02_Y
+ mov (4) tc0<1>:ub r[ECM_AddrReg, bTc0_v02_Y]<4;4,1>:ub { NoDDChk }
+
+// (f0.0) jmpi BYPASS_8x8_DEBLOCK_V
+// (f0.0.anyv) jmpi BYPASS_8x8_DEBLOCK_V
+
+// CALL(FILTER_Y, 1)
+ PRED_CALL(-f0.0, FILTER_Y, 1)
+
+//BYPASS_8x8_DEBLOCK_V:
+//-----------------------------------------------
+
+
+//---------- Deblock Y interal right edge (V3) ----------
+
+ // Bypass deblocking if FilterInternal4x4EdgesFlag = 0
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FilterInternal4x4EdgesFlag:w // Check for FilterInternal4x4EdgesFlag
+
+// and.z.f0.1 (1) null:uw r[ECM_AddrReg, wEdgeCntlMap_IntRightVert]:uw 0xFFFF:uw // MaskA = 0?
+
+ // p3 = Cur MB Y row 8 = r[P_AddrReg, 0]<16;16,1>
+ // p2 = Cur MB Y row 9 = r[P_AddrReg, 16]<16;16,1>
+ // p1 = Cur MB Y row 10 = r[P_AddrReg, 32]<16;16,1>
+ // p0 = Cur MB Y row 11 = r[P_AddrReg, 48]<16;16,1>
+ // q0 = Cur MB Y row 12 = r[Q_AddrReg, 0]<16;16,1>
+ // q1 = Cur MB Y row 13 = r[Q_AddrReg, 16]<16;16,1>
+ // q2 = Cur MB Y row 14 = r[Q_AddrReg, 32]<16;16,1>
+ // q3 = Cur MB Y row 15 = r[Q_AddrReg, 48]<16;16,1>
+ mov (1) P_AddrReg:w 8*Y_ROW_WIDTH+SRC_MB_Y_BASE:w { NoDDClr }
+ mov (1) Q_AddrReg:w 12*Y_ROW_WIDTH+SRC_MB_Y_BASE:w { NoDDChk }
+
+ mov (1) MaskA:uw r[ECM_AddrReg, wEdgeCntlMap_IntRightVert]:uw { NoDDClr }
+// mov (1) MaskB:uw 0:w // Set MaskB = 0, so it always uses bS < 4 algorithm.
+
+ // tc0 has bTc0_v33_Y + bTc0_v23_Y + bTc0_v13_Y + bTc0_v03_Y
+ mov (4) tc0<1>:ub r[ECM_AddrReg, bTc0_v03_Y]<4;4,1>:ub { NoDDChk }
+
+// (f0.0) jmpi BYPASS_4x4_DEBLOCK_V2
+// (f0.0.anyv) jmpi BYPASS_4x4_DEBLOCK_V2
+
+// CALL(FILTER_Y, 1)
+ PRED_CALL(-f0.0, FILTER_Y, 1)
+
+//BYPASS_4x4_DEBLOCK_V2:
+//-----------------------------------------------
diff --git a/src/shaders/h264/ildb/AVC_ILDB_ForwardMsg.asm b/src/shaders/h264/ildb/AVC_ILDB_ForwardMsg.asm new file mode 100644 index 00000000..96fe8280 --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_ForwardMsg.asm @@ -0,0 +1,57 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+//========== Forward message to root thread through gateway ==========
+// Each child thread write a byte into the root GRF r50 defiend in open Gataway.
+
+#if defined(_DEBUG)
+mov (1) EntrySignatureC:w 0x7777:w
+#endif
+
+// Init payload to r0
+mov (8) GatewayPayload<1>:ud 0:w //{ NoDDClr }
+
+// Forward a message:
+// Offset = x relative to r50 (defiend in open gataway), x = ORIX >> 4 [bit 28:16]
+// Need to shift left 16
+
+// shift 2 more bits for byte to word offset
+
+//shl (1) Offset_Length:ud GateWayOffsetC:w 16:w { NoDDClr, NoDDChk }
+shl (1) Offset_Length:ud GateWayOffsetC:w 18:w
+
+// 2 bytes offset
+add (1) Offset_Length:ud Offset_Length:ud 0x00020000:d { NoDDClr }
+
+// Length = 1 byte, [bit 10:8 = 000]
+//000 xxxxxxxxxxxxx 00000 000 00000000 ==> 000x xxxx xxxx xxxx 0000 0000 0000 0000
+
+//mov (1) DispatchID:ub r0.20:ub // Dispatch ID
+
+//Move in EUid and Thread ID that we received from the PARENT thread
+mov (1) EUID_TID:uw r0.6:uw { NoDDClr, NoDDChk }
+
+mov (1) GatewayPayloadKey:uw 0x1212:uw { NoDDClr, NoDDChk } // Key
+
+//mov (4) GatewayPayload<1>:ud 0:ud { NoDDClr, NoDDChk } // Init payload low 4 dword
+
+// Write back one byte (value = 0xFF) to root thread GRF to indicate this child thread is finished
+// All lower 4 bytes must be assigned to the same byte value.
+mov (4) GatewayPayload<1>:ub 0xFFFF:uw { NoDDChk }
+
+// msg descriptor bit 15 set to '1' for notification
+#ifdef GW_DCN
+// For ILK, EOT bit should also be set to terminate the thread. This is to fix a timing related HW issue.
+//
+send (8) null:ud m0 GatewayPayload<8;8,1>:ud MSG_GW_EOT FWDMSGDSC+NOTIFYMSG
+#else
+send (8) null:ud m0 GatewayPayload<8;8,1>:ud MSG_GW FWDMSGDSC+NOTIFYMSG
+#endif // GW_DCN
+
+//========== Forward Msg Done ========================================
+
diff --git a/src/shaders/h264/ildb/AVC_ILDB_LumaThrdLimit.asm b/src/shaders/h264/ildb/AVC_ILDB_LumaThrdLimit.asm new file mode 100644 index 00000000..554a6738 --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_LumaThrdLimit.asm @@ -0,0 +1,46 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+//========== Forward message to root thread through gateway ==========
+
+// Chroma root kenrel updates luma thread limit.
+
+#if defined(_DEBUG)
+mov (1) EntrySignatureC:w 0x7788:w
+#endif
+
+// Init payload to r0
+mov (8) GatewayPayload<1>:ud 0:w { NoDDClr }
+
+// Forward a message:
+// Offset = x relative to r50 (defiend in open gataway), x = ORIX >> 4 [bit 28:16]
+// Need to shift left 16
+
+mov (1) Offset_Length:ud THREAD_LIMIT_OFFSET:ud { NoDDClr, NoDDChk }
+
+// Length = 1 byte, [bit 10:8 = 000]
+//000 xxxxxxxxxxxxx 00000 000 00000000 ==> 000x xxxx xxxx xxxx 0000 0000 0000 0000
+
+//mov (1) DispatchID:ub r0.20:ub // Dispatch ID
+
+// Copy EUid and Thread ID that we received from the PARENT thread
+mov (1) EUID_TID:uw r0.6:uw { NoDDClr, NoDDChk }
+
+mov (1) GatewayPayloadKey:uw 0x1212:uw { NoDDChk } // Key
+
+//mov (4) GatewayPayload<1>:ud 0:ud { NoDDClr, NoDDChk } // Init payload low 4 dword
+
+// Write back one byte (value = 0xFF) to root thread GRF to indicate this child thread is finished
+// All lower 4 bytes must be assigned to the same byte value.
+add (1) Temp1_W:w MaxThreads:uw -OutstandingThreads:uw
+mov (4) GatewayPayload<1>:ub Temp1_B<0;1,0>:ub
+
+send (8) GatewayResponse:ud m0 GatewayPayload<8;8,1>:ud MSG_GW FWDMSGDSC
+
+//========== Forward Msg Done ========================================
+
diff --git a/src/shaders/h264/ildb/AVC_ILDB_Luma_Core.asm b/src/shaders/h264/ildb/AVC_ILDB_Luma_Core.asm new file mode 100644 index 00000000..f2934886 --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_Luma_Core.asm @@ -0,0 +1,419 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+#if !defined(__AVC_ILDB_LUMA_CORE__) // Make sure this file is only included once
+#define __AVC_ILDB_LUMA_CORE__
+
+////////// AVC ILDB Luma Core /////////////////////////////////////////////////////////////////////////////////
+//
+// This core performs AVC LUMA ILDB filtering on one horizontal edge (16 pixels) of a MB.
+// If data is transposed, it can also de-block a vertical edge.
+//
+// Bafore calling this subroutine, caller needs to set the following parameters.
+//
+// - EdgeCntlMap1 // Edge control map A
+// - EdgeCntlMap2 // Edge control map B
+// - P_AddrReg // Src and dest address register for P pixels
+// - Q_AddrReg // Src and dest address register for Q pixels
+// - alpha // alpha corresponding to the edge to be filtered
+// - beta // beta corresponding to the edge to be filtered
+// - tc0 // tc0 corresponding to the edge to be filtered
+//
+//
+// +----+----+----+----+----+----+----+----+
+// | p3 | p2 | P1 | p0 | q0 | q1 | q2 | q3 |
+// +----+----+----+----+----+----+----+----+
+//
+// p3 = r[P_AddrReg, 0]<16;16,1>
+// p2 = r[P_AddrReg, 16]<16;16,1>
+// p1 = r[P_AddrReg, 32]<16;16,1>
+// p0 = r[P_AddrReg, 48]<16;16,1>
+// q0 = r[Q_AddrReg, 0]<16;16,1>
+// q1 = r[Q_AddrReg, 16]<16;16,1>
+// q2 = r[Q_AddrReg, 32]<16;16,1>
+// q3 = r[Q_AddrReg, 48]<16;16,1>
+//
+/////////////////////////////////////////////////////////////////////////////////////////////////////////////////
+
+// The region is both src and dest
+// P0-P3 and Q0-Q3 should be only used if they have not been modified to new values
+#undef P3
+#undef P2
+#undef P1
+#undef P0
+#undef Q0
+#undef Q1
+#undef Q2
+#undef Q3
+
+#define P3 r[P_AddrReg, 0]<16;16,1>:ub
+#define P2 r[P_AddrReg, 16]<16;16,1>:ub
+#define P1 r[P_AddrReg, 32]<16;16,1>:ub
+#define P0 r[P_AddrReg, 48]<16;16,1>:ub
+#define Q0 r[Q_AddrReg, 0]<16;16,1>:ub
+#define Q1 r[Q_AddrReg, 16]<16;16,1>:ub
+#define Q2 r[Q_AddrReg, 32]<16;16,1>:ub
+#define Q3 r[Q_AddrReg, 48]<16;16,1>:ub
+
+// New region as dest
+#undef NewP2
+#undef NewP1
+#undef NewP0
+#undef NewQ0
+#undef NewQ1
+#undef NewQ2
+
+#define NewP2 r[P_AddrReg, 16]<1>:ub
+#define NewP1 r[P_AddrReg, 32]<1>:ub
+#define NewP0 r[P_AddrReg, 48]<1>:ub
+#define NewQ0 r[Q_AddrReg, 0]<1>:ub
+#define NewQ1 r[Q_AddrReg, 16]<1>:ub
+#define NewQ2 r[Q_AddrReg, 32]<1>:ub
+
+// Filter one luma edge
+FILTER_Y:
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0x1111:w
+#endif
+ //---------- Derive filterSampleflag in AVC spec, equition (8-469) ----------
+ // bS is in MaskA
+
+ // Src copy of the p3, p2, p1, p0, q0, q1, q2, q3
+// mov (16) p0123_W(0)<1> r[P_AddrReg]<16;16,1>:uw
+// mov (16) p0123_W(1)<1> r[P_AddrReg, 32]<16;16,1>:uw
+// mov (16) q0123_W(0)<1> r[Q_AddrReg]<16;16,1>:uw
+// mov (16) q0123_W(1)<1> r[Q_AddrReg, 32]<16;16,1>:uw
+
+ mov (2) f0.0<1>:uw MaskA<2;2,1>:uw
+
+ add (16) q0_p0(0)<1> Q0 -P0 // q0-p0
+ add (16) TempRow0(0)<1> P1 -P0 // p1-p0
+ add (16) TempRow1(0)<1> Q1 -Q0 // q1-q0
+
+ // Build FilterSampleFlag
+ // abs(q0-p0) < alpha
+ (f0.0) cmp.l.f0.0 (16) null:w (abs)q0_p0(0) alpha:w
+ // abs(p1-p0) < Beta
+ (f0.0) cmp.l.f0.0 (16) null:w (abs)TempRow0(0) beta:w
+ // abs(q1-q0) < Beta
+ (f0.0) cmp.l.f0.0 (16) null:w (abs)TempRow1(0) beta:w
+
+ //-----------------------------------------------------------------------------------------
+
+ (f0.0) if (16) Y_ENDIF1
+ // For channels whose edge control map1 = 1 ---> perform de-blocking
+
+// mov (1) f0.1:uw MaskB:uw {NoMask} // Now check for which algorithm to apply
+
+ // (abs)ap = |p2-p0|
+ add (16) ap(0)<1> P2 -P0 // ap = p2-p0
+ // (abs)aq = |q2-q0|
+ add (16) aq(0)<1> Q2 -Q0 // aq = q2-q0
+
+ // Make a copy of unmodified p0 and p1 for use in q0'and q1' calculation
+ mov (16) p0123_W(1)<1> r[P_AddrReg, 32]<16;16,1>:uw {NoMask}
+
+ (f0.1) if (16) Y_ELSE2
+
+ // For channels whose edge control map2 = 1 ---> bS = 4 algorithm
+
+ // Compute q0', q1' and q2'
+ //-----------------------------------------------------------------------------
+ // bS = 4 Algorithm :
+ //
+ // gama = |p0-q0| < ((alpha >> 2) + 2)
+ // deltap = (ap<beta) && gama; // deep filter flag
+ // if (deltap) {
+ // p0' = ( p2 +2*p1 +2*p0 +2*q0 + q1 + 4) >> 3;
+ // p1' = ( p2 + p1 + p0 + q0 + 2) >> 2;
+ // p2' = (2*p3 +3*p2 + p1 + p0 + q0 + 4) >> 3;
+ // } else {
+ // p0' = ( 2*p1 + p0 + q1 + 2) >> 2;
+ // }
+ //-----------------------------------------------------------------------------
+
+ // gama = |p0-q0| < ((alpha >> 2) + 2) = |p0-q0| < alpha2
+ cmp.l.f0.1 (16) null:w (abs)q0_p0(0) alpha2:w
+
+ // Common P01 = p0 + p1
+ add (16) P0_plus_P1(0)<1> P0 P1
+
+ // Common Q01 = q0 + q1
+ add (16) Q0_plus_Q1(0)<1> Q0 Q1
+
+// mov (1) CTemp1_W:w f0.1:uw {NoMask}
+ mov (1) f0.0:uw f0.1:uw {NoMask}
+
+ // deltap = ((abs)ap < beta) && gama
+ (f0.1) cmp.l.f0.1 (16) null:w (abs)ap(0) beta<0;1,0>:w // (abs)ap < beta ?
+
+ // deltaq = ((abs)aq < beta) && gama
+ (f0.0) cmp.l.f0.0 (16) null:w (abs)aq(0) beta<0;1,0>:w // (abs)aq < beta ?
+
+
+// mov (1) CTemp1_W:w f0.0:uw {NoMask} // gama = |p0-q0| < ((alpha >> 2) + 2) for each channel
+// and (1) f0.1:w f0.1:uw CTemp1_W:w {NoMask} // deltap = (ap<beta) && gama
+
+
+ (f0.1) if (16) Y_ELSE3 // for channels its deltap = true
+
+ add (16) P2_plus_P3(0)<1> P2 P3
+
+ // A = (p1 + p0) + q0 = P01 + q0
+ add (16) A(0)<1> P0_plus_P1(0) Q0 // A = P01 + q0
+
+ // Now acc0 = A
+
+ // B = p2 + (p1 + p0 + q0) + 4 = p2 + A + 4
+// add (16) acc0.0<1>:w P2 4:w // p2 + 4
+// add (16) BB(0)<1> acc0.0<16;16,1>:w A(0) // B = p2 + A + 4
+ add (16) acc0.0<1>:w acc0.0<16;16,1>:w 4:w // p2 + 4
+ add (16) BB(0)<1> acc0.0<16;16,1>:w P2 // B = p2 + A + 4
+
+ // Now acc0 = B
+
+ // p2' = (2*p3 +3*p2 + A + 4) >> 3 = (2*(p3+p2) + B) >> 3
+// mov (16) acc0.0<1>:w BB(0)
+ mac (16) acc0.0<1>:w P2_plus_P3(0) 2:w
+ shr.sat (16) TempRow3B(0)<2> acc0.0<16;16,1>:w 3:w
+
+ // p1' = (p2 + A + 2) >> 2 = (B - 2) >> 2
+ add (16) acc0.0<1>:w BB(0) -2:w
+ shr.sat (16) TempRow1B(0)<2> acc0.0<16;16,1>:w 2:w
+
+ // p0' = (p2 +2*A + q1 + 4) >> 3 = (B + A + q1) >> 3
+ add (16) acc0.0<1>:w Q1 A(0) // B + A
+ add (16) acc0.0<1>:w acc0.0<16;16,1>:w BB(0) // B + A + q1
+ shr.sat (16) TempRow0B(0)<2> acc0.0<16;16,1>:w 3:w // (B + A + q1) >> 3
+
+ // p2' = (2*p3 +3*p2 + A + 4) >> 3 = (2*(p3+p2) + B) >> 3
+// mov (16) acc0.0<1>:w BB(0)
+// mac (16) acc0.0<1>:w P2_plus_P3(0) 2:w
+// shr.sat (16) TempRow3B(0)<2> acc0.0<16;16,1>:w 3:w
+
+ mov (16) NewP2 TempRow3B(0) // p2'
+ mov (16) NewP1 TempRow1B(0) // p1'
+ mov (16) NewP0 TempRow0B(0) // p0'
+
+Y_ELSE3:
+ else (16) Y_ENDIF3 // for channels its deltap = false
+
+ // p0' = (2*p1 + p0 + q1 + 2) >> 2 = (p1 + P01 + q1 + 2) >> 2
+ add (16) acc0.0<1>:w P1 P0_plus_P1(0) // p1 + P01 (TempRow1(0) = P01)
+ add (16) acc0.0<1>:w acc0.0<16;16,1>:w Q1
+ add (16) acc0.0<1>:w acc0.0<16;16,1>:w 2:w // p1 + P01 + q1 + 2
+
+ shr.sat (16) TempRow0B(0)<2> acc0.0<16;16,1>:w 2:w // >> 2
+ mov (16) NewP0 TempRow0B(0) // p0'
+
+ endif
+Y_ENDIF3:
+ // Compute q0', q1' and q2'
+ //-----------------------------------------------------------------------------
+ // bS = 4 Algorithm (cont):
+ //
+ // deltaq = (aq<beta) && gama; // deep filter flag
+ // if (deltaq) {
+ // q0' = ( q2 +2*q1 +2*q0 +2*p0 + p1 + 4) >> 3;
+ // q1' = ( q2 + q1 + q0 + p0 + 2) >> 2;
+ // q2' = (2*q3 +3*q2 + q1 + q0 + p0 + 4) >> 3;
+ // } else {
+ // q0' = ( 2*q1 + q0 + p1 + 2) >> 2;
+ // }
+
+ // deltaq = ((abs)aq < beta) && gama
+// cmp.l.f0.1 (16) null:w (abs)aq(0) beta<0;1,0>:w // (abs)aq < beta ?
+
+ // Common Q01 = q0 + q1
+// add (16) Q0_plus_Q1(0)<1> Q0 Q1
+
+// and (1) f0.1:w f0.1:uw CTemp1_W:w {NoMask} // deltaq = ((abs)ap < beta) && gama
+
+ (f0.0) if (16) Y_ELSE4 // for channels its deltaq = true
+
+ add (16) Q2_plus_Q3(0)<1> Q2 Q3
+
+ // A = (q1 + q0) + p0 = Q01 + p0
+ add (16) A(0)<1> Q0_plus_Q1(0) p0(0) // A = q1+q0 + p0
+
+ // Acc0 = A
+
+ // B = q2 + q1 + q0 + p0 + 4 = q2 + A + 4
+ add (16) acc0.0<1>:w acc0.0<16;16,1>:w 4:w // q2 + 4
+ add (16) BB(0)<1> acc0.0<16;16,1>:w Q2 // B = q2 + A + 4
+
+ // Acc0 = B
+
+ // q2' = (2*q3 +3*q2 + A + 4) >> 3 = (2*(q3+q2) + B) >> 3
+// mov (16) acc0.0<1>:w BB(0)
+ mac (16) acc0.0<1>:w Q2_plus_Q3(0) 2:w
+ shr.sat (16) TempRow3B(0)<2> acc0.0<16;16,1>:w 3:w
+
+ // q1' = (q2 + A + 2) >> 2 = (B - 2) >> 2
+ add (16) acc0.0<1>:w BB(0) -2:w
+ shr.sat (16) TempRow1B(0)<2> acc0.0<16;16,1>:w 2:w
+
+ // q0' = (q2 +2*A + p1 + 4) >> 3 = (B + A + p1) >> 3
+ add (16) acc0.0<1>:w p1(0) A(0)
+ add (16) acc0.0<1>:w acc0.0<16;16,1>:w BB(0)
+ shr.sat (16) TempRow0B(0)<2> acc0.0<16;16,1>:w 3:w
+
+ mov (16) NewQ2 TempRow3B(0) // q2'
+ mov (16) NewQ1 TempRow1B(0) // q1'
+ mov (16) NewQ0 TempRow0B(0) // q0'
+
+Y_ELSE4:
+ else (16) Y_ENDIF4 // for channels its deltaq = false
+
+ // q0' = (2*q1 + q0 + p1 + 2) >> 2 = (q1 + Q01 + p1 + 2) >> 2
+ // Use original p1 values in p1(0)
+ add (16) acc0.0<1>:w p1(0) Q0_plus_Q1(0) // p1 + P01 (TempRow1(0) = P01)
+ add (16) acc0.0<1>:w acc0.0<16;16,1>:w Q1
+ add (16) acc0.0<1>:w acc0.0<16;16,1>:w 2:w // p1 + P01 + q1 + 2
+
+ shr.sat (16) TempRow0B(0)<2> acc0.0<16;16,1>:w 2:w // >> 2
+ mov (16) NewQ0 TempRow0B(0) // q0'
+
+ endif
+Y_ENDIF4:
+
+
+ // Done with bS = 4 algorithm
+
+Y_ELSE2:
+ else (16) Y_ENDIF2
+ // For channels whose edge control map2 = 0 ---> bS < 4 algorithm
+
+ //-----------------------------------------------------------------------------
+ // bS < 4 Algorithm :
+ // tc = tc0 + (|p2-p0|<Beta ? 1 : 0) + (|q2-q0|<Beta ? 1 : 0)
+ // delta = Clip3(-tc, tc, ((((q0-p0)<<2) + (p1-q1) + 4) >> 3))
+ // p0' = Clip1(p0 + delta) = Clip3(0, 0xFF, p0 + delta)
+ // q0' = Clip1(q0 - delta) = Clip3(0, 0xFF, q0 - delta)
+ // if (|p2-p0|<Beta)
+ // p1' = p1 + Clip3(-tc0, tc0, (p2 + ((p0+q0+1)>>1) - (p1<<1)) >> 1 )
+ // if (|q2-q0|<Beta)
+ // q1' = q1 + Clip3(-tc0, tc0, (q2 + ((p0+q0+1)>>1) - (q1<<1)) >> 1 )
+ //-----------------------------------------------------------------------------
+
+ // Expand tc0
+ mov (16) tc_exp(0)<1> tc0<1;4,0>:ub {NoMask}
+ mov (16) tc0_exp(0)<1> tc0<1;4,0>:ub {NoMask} // tc0_exp = tc0, each tc0 is duplicated 4 times for 4 adjcent 4 pixels
+
+ // tc_exp = tc0_exp + (|p2-p0|<Beta ? 1 : 0) + (|q2-q0|<Beta ? 1 : 0)
+// mov (16) tc_exp(0)<1> tc0_exp(0) // tc = tc0_exp first
+
+
+ cmp.l.f0.0 (16) null:w (abs)ap(0) beta:w // |p2-p0|< Beta ? ---> (abs)ap < Beta ?
+ cmp.l.f0.1 (16) null:w (abs)aq(0) beta:w // |q2-q0|< Beta ? ---> (abs)aq < Beta ?
+
+ //--- Use free cycles here ---
+ // delta = Clip3(-tc, tc, ((((q0-p0)<<2) + (p1-q1) + 4) >> 3))
+ // 4 * (q0-p0) + p1 - q1 + 4
+ add (16) acc0<1>:w P1 4:w // p1 + 4
+ mac (16) acc0<1>:w q0_p0(0) 4:w // 4 * (q0-p0) + p1 + 4
+ add (16) acc0<1>:w acc0<16;16,1>:w -Q1 // 4 * (q0-p0) + p1 - q1 + 4
+ shr (16) TempRow0(0)<1> acc0<16;16,1>:w 3:w
+
+ // Continue on getting tc_exp
+ (f0.0) add (16) tc_exp(0)<1> tc_exp(0) 1:w // tc0_exp + (|p2-p0|<Beta ? 1 : 0)
+ mov (2) CTemp1_W<1>:w f0.0<2;2,1>:w {NoMask} // Save |p2-p0|<Beta flag
+ (f0.1) add (16) tc_exp(0)<1> tc_exp(0) 1:w // tc_exp = tc0_exp + (|p2-p0|<Beta ? 1 : 0) + (|q2-q0|<Beta ? 1 : 0)
+
+
+ // Continue on cliping tc to get delta
+ cmp.g.f0.0 (16) null:w TempRow0(0) tc_exp(0) // Clip if delta' > tc
+ cmp.l.f0.1 (16) null:w TempRow0(0) -tc_exp(0) // Clip if delta' < -tc
+
+ //--- Use free cycles here ---
+ // common = (p0+q0+1) >> 1 ---> TempRow2(0)
+ // Same as avg of p0 and q0
+ avg (16) TempRow2(0)<1> P0 Q0
+
+ // Continue on cliping tc to get delta
+ (f0.0) mov (16) TempRow0(0)<1> tc_exp(0)
+ (f0.1) mov (16) TempRow0(0)<1> -tc_exp(0)
+
+ //--- Use free cycles here ---
+ mov (2) f0.0<1>:w CTemp1_W<2;2,1>:w {NoMask} // CTemp1_W = (|p2-p0|<Beta)
+ // CTemp2_W = (|q2-q0|<Beta)
+ //-----------------------------------------------------------------------
+
+ // p0' = Clip1(p0 + delta) = Clip3(0, 0xFF, p0 + delta)
+ // q0' = Clip1(q0 - delta) = Clip3(0, 0xFF, q0 - delta)
+ add.sat (16) TempRow1B(0)<2> P0 TempRow0(0) // p0+delta
+ add.sat (16) TempRow0B(0)<2> Q0 -TempRow0(0) // q0-delta
+ mov (16) NewP0 TempRow1B(0) // p0'
+ mov (16) NewQ0 TempRow0B(0) // q0'
+ //-----------------------------------------------------------------------
+
+ // Now compute p1' and q1'
+
+ // if (|p2-p0|<Beta)
+// mov (1) f0.0:w CTemp1_W:w {NoMask} // CTemp1_W = (|p2-p0|<Beta)
+ (f0.0) if (16) Y_ENDIF6
+
+ // p1' = p1 + Clip3(-tc0, tc0, adj)
+ // adj = (p2 + common - (p1<<1)) >> 1 = (p2 + common - (p1*2)) >> 1
+ add (16) acc0<1>:w P2 TempRow2(0) // TempRow2(0) = common = (p0+q0+1) >> 1
+ mac (16) acc0<1>:w P1 -2:w
+ shr (16) TempRow1(0)<1> acc0<16;16,1>:w 1:w
+
+ // tc clip to get tc_adj
+ cmp.g.f0.0 (16) null:w TempRow1(0) tc0_exp(0) // Clip if delta' > tc
+ cmp.l.f0.1 (16) null:w TempRow1(0) -tc0_exp(0) // Clip if delta' < -tc
+
+ (f0.0) mov (16) TempRow1(0)<1> tc0_exp(0)
+ (f0.1) mov (16) TempRow1(0)<1> -tc0_exp(0)
+
+ //--- Use free cycles here ---
+ mov (1) f0.1:w CTemp2_W:w {NoMask} // CTemp2_W = (|q2-q0|<Beta)
+
+ // p1' = p1 + tc_adj
+ add.sat (16) TempRow1B(0)<2> P1 TempRow1(0) // p1+tc_adj
+ mov (16) NewP1 TempRow1B(0) // p1'
+
+ //------------------------------------------------------------------------
+Y_ENDIF6:
+ endif
+
+ // if (|q2-q0|<Beta)
+// mov (1) f0.1:w CTemp2_W:w {NoMask} // CTemp2_W = (|q2-q0|<Beta)
+ (f0.1) if (16) Y_ENDIF7
+
+ // q1' = q1 + Clip3(-tc0, tc0, adj)
+ // adj = (q2 + common - (q1<<1)) >> 1
+ // same as q2 + common - (q1 * 2)
+ add (16) acc0<1>:w Q2 TempRow2(0)
+ mac (16) acc0<1>:w Q1 -2:w
+ shr (16) TempRow1(0)<1> acc0<16;16,1>:w 1:w
+
+ // tc clip to get tc_adj
+ cmp.g.f0.0 (16) null:w TempRow1(0) tc0_exp(0) // Clip if delta' > tc
+ cmp.l.f0.1 (16) null:w TempRow1(0) -tc0_exp(0) // Clip if delta' < -tc
+
+ (f0.0) mov (16) TempRow1(0)<1> tc0_exp(0)
+ (f0.1) mov (16) TempRow1(0)<1> -tc0_exp(0)
+
+ // q1' = q1 + tc_adj
+ add.sat (16) TempRow1B(0)<2> Q1 TempRow1(0) // q1+tc_adj
+ mov (16) NewQ1 TempRow1B(0) // q1'
+
+ //------------------------------------------------------------------------
+Y_ENDIF7:
+ endif
+
+ endif
+Y_ENDIF2:
+Y_ENDIF1:
+ endif
+
+RETURN
+
+#endif // !defined(__AVC_ILDB_LUMA_CORE__)
diff --git a/src/shaders/h264/ildb/AVC_ILDB_Luma_Core_Mbaff.asm b/src/shaders/h264/ildb/AVC_ILDB_Luma_Core_Mbaff.asm new file mode 100644 index 00000000..fd65b3ce --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_Luma_Core_Mbaff.asm @@ -0,0 +1,391 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+#if !defined(__AVC_ILDB_LUMA_CORE_MBAFF__) // Make sure this file is only included once
+#define __AVC_ILDB_LUMA_CORE_MBAFF__
+
+////////// AVC ILDB Luma Core Mbaff /////////////////////////////////////////////////////////////////////////////////
+//
+// This core performs AVC LUMA ILDB filtering on one horizontal edge (16 pixels) of a MB.
+// If data is transposed, it can also de-block a vertical edge.
+//
+// Bafore calling this subroutine, caller needs to set the following parameters.
+//
+// - EdgeCntlMap1 // Edge control map A
+// - EdgeCntlMap2 // Edge control map B
+// - P_AddrReg // Src and dest address register for P pixels
+// - Q_AddrReg // Src and dest address register for Q pixels
+// - alpha // alpha corresponding to the edge to be filtered
+// - beta // beta corresponding to the edge to be filtered
+// - tc0 // tc0 corresponding to the edge to be filtered
+//
+//
+// +----+----+----+----+----+----+----+----+
+// | p3 | p2 | P1 | p0 | q0 | q1 | q2 | q3 |
+// +----+----+----+----+----+----+----+----+
+//
+// p3 = r[P_AddrReg, 0]<16;16,1>
+// p2 = r[P_AddrReg, 16]<16;16,1>
+// p1 = r[P_AddrReg, 32]<16;16,1>
+// p0 = r[P_AddrReg, 48]<16;16,1>
+// q0 = r[Q_AddrReg, 0]<16;16,1>
+// q1 = r[Q_AddrReg, 16]<16;16,1>
+// q2 = r[Q_AddrReg, 32]<16;16,1>
+// q3 = r[Q_AddrReg, 48]<16;16,1>
+//
+/////////////////////////////////////////////////////////////////////////////////////////////////////////////////
+
+// The region is both src and dest
+// P0-P3 and Q0-Q3 should be only used if they have not been modified to new values
+#undef P3
+#undef P2
+#undef P1
+#undef P0
+#undef Q0
+#undef Q1
+#undef Q2
+#undef Q3
+
+#define P3 r[P_AddrReg, 0]<16;16,1>:ub
+#define P2 r[P_AddrReg, 16]<16;16,1>:ub
+#define P1 r[P_AddrReg, 32]<16;16,1>:ub
+#define P0 r[P_AddrReg, 48]<16;16,1>:ub
+#define Q0 r[Q_AddrReg, 0]<16;16,1>:ub
+#define Q1 r[Q_AddrReg, 16]<16;16,1>:ub
+#define Q2 r[Q_AddrReg, 32]<16;16,1>:ub
+#define Q3 r[Q_AddrReg, 48]<16;16,1>:ub
+
+// New region as dest
+#undef NewP2
+#undef NewP1
+#undef NewP0
+#undef NewQ0
+#undef NewQ1
+#undef NewQ2
+
+#define NewP2 r[P_AddrReg, 16]<1>:ub
+#define NewP1 r[P_AddrReg, 32]<1>:ub
+#define NewP0 r[P_AddrReg, 48]<1>:ub
+#define NewQ0 r[Q_AddrReg, 0]<1>:ub
+#define NewQ1 r[Q_AddrReg, 16]<1>:ub
+#define NewQ2 r[Q_AddrReg, 32]<1>:ub
+
+
+
+// Filter one luma edge - mbaff
+FILTER_Y_MBAFF:
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0x1111:w
+#endif
+ //---------- Derive filterSampleflag in AVC spec, equition (8-469) ----------
+ // bS is in MaskA
+
+ // Src copy of the p3, p2, p1, p0, q0, q1, q2, q3
+// mov (16) p0123_W(0)<1> r[P_AddrReg]<16;16,1>:uw
+// mov (16) p0123_W(1)<1> r[P_AddrReg, 32]<16;16,1>:uw
+// mov (16) q0123_W(0)<1> r[Q_AddrReg]<16;16,1>:uw
+// mov (16) q0123_W(1)<1> r[Q_AddrReg, 32]<16;16,1>:uw
+
+ // Move MaskA and MaskB to flag regs
+ mov (2) f0.0<1>:uw MaskA<2;2,1>:uw
+
+ add (16) q0_p0(0)<1> Q0 -P0 // q0-p0
+ add (16) TempRow0(0)<1> P1 -P0 // p1-p0
+ add (16) TempRow1(0)<1> Q1 -Q0 // q1-q0
+
+ // abs(q0-p0) < alpha
+ (f0.0) cmp.l.f0.0 (16) null:w (abs)q0_p0(0) Mbaff_ALPHA(0)
+ // abs(p1-p0) < Beta
+ (f0.0) cmp.l.f0.0 (16) null:w (abs)TempRow0(0) Mbaff_BETA(0)
+ // abs(q1-q0) < Beta
+ (f0.0) cmp.l.f0.0 (16) null:w (abs)TempRow1(0) Mbaff_BETA(0)
+
+ //-----------------------------------------------------------------------------------------
+
+ (f0.0) if (16) MBAFF_Y_ENDIF1
+ // For channels whose edge control map1 = 1 ---> perform de-blocking
+
+// mov (1) f0.1:uw MaskB:uw {NoMask} // Now check for which algorithm to apply
+
+ // (abs)ap = |p2-p0|
+ add (16) ap(0)<1> P2 -P0
+
+ // (abs)aq = |q2-q0|
+ add (16) aq(0)<1> Q2 -Q0
+
+ // Make a copy of unmodified p0 and p1 for use in q0'and q1' calculation
+ mov (16) p0123_W(1)<1> r[P_AddrReg, 32]<16;16,1>:uw {NoMask}
+
+ (f0.1) if (16) MBAFF_Y_ELSE2
+
+ // For channels whose edge control map2 = 1 ---> bS = 4 algorithm
+
+ // Compute q0', q1' and q2'
+ //-----------------------------------------------------------------------------
+ // bS = 4 Algorithm :
+ //
+ // gama = |p0-q0| < ((alpha >> 2) + 2)
+ // deltap = (ap<beta) && gama; // deep filter flag
+ // if (deltap) {
+ // p0' = ( p2 +2*p1 +2*p0 +2*q0 + q1 + 4) >> 3;
+ // p1' = ( p2 + p1 + p0 + q0 + 2) >> 2;
+ // p2' = (2*p3 +3*p2 + p1 + p0 + q0 + 4) >> 3;
+ // } else {
+ // p0' = ( 2*p1 + p0 + q1 + 2) >> 2;
+ // }
+ //-----------------------------------------------------------------------------
+
+ // gama = |p0-q0| < ((alpha >> 2) + 2) = |p0-q0| < alpha2
+ cmp.l.f0.1 (16) null:w (abs)q0_p0(0) Mbaff_ALPHA2(0)
+
+ // Common P01 = p0 + p1
+ add (16) P0_plus_P1(0)<1> P0 P1
+
+ // Common Q01 = q0 + q1
+ add (16) Q0_plus_Q1(0)<1> Q0 Q1
+
+ mov (1) f0.0:uw f0.1:uw {NoMask}
+
+ // deltap = ((abs)ap < beta) && gama
+ (f0.1) cmp.l.f0.1 (16) null:w (abs)ap(0) Mbaff_BETA(0) // (abs)ap < beta ?
+
+ // deltaq = ((abs)aq < beta) && gama
+ (f0.0) cmp.l.f0.0 (16) null:w (abs)aq(0) Mbaff_BETA(0) // (abs)aq < beta ?
+
+
+ (f0.1) if (16) MBAFF_Y_ELSE3 // for channels its deltap = true
+
+ add (16) P2_plus_P3(0)<1> P2 P3
+
+ // A = p1 + p0 + q0 = P01 + q0
+ add (16) A(0)<1> P0_plus_P1(0) Q0 // A = P01 + q0
+
+ // Now acc0 = A
+
+ // B = p2 + p1 + p0 + q0 + 4 = p2 + A + 4
+ add (16) acc0.0<1>:w acc0.0<16;16,1>:w 4:w // p2 + 4
+ add (16) BB(0)<1> acc0.0<16;16,1>:w P2 // B = p2 + A + 4
+
+ // Now acc0 = B
+
+ // p2' = (2*p3 +3*p2 + A + 4) >> 3 = (2*(p3+p2) + B) >> 3
+ mac (16) acc0.0<1>:w P2_plus_P3(0) 2:w
+ shr.sat (16) TempRow3B(0)<2> acc0.0<16;16,1>:w 3:w
+
+ // p1' = (p2 + A + 2) >> 2 = (B - 2) >> 2
+ add (16) acc0.0<1>:w BB(0) -2:w
+ shr.sat (16) TempRow1B(0)<2> acc0.0<16;16,1>:w 2:w
+
+ // p0' = (p2 +2*A + q1 + 4) >> 3 = (B + A + q1) >> 3
+ add (16) acc0.0<1>:w Q1 A(0) // B + A
+ add (16) acc0.0<1>:w acc0.0<16;16,1>:w BB(0) // B + A + q1
+ shr.sat (16) TempRow0B(0)<2> acc0.0<16;16,1>:w 3:w // (B + A + q1) >> 3
+
+ mov (16) NewP2 TempRow3B(0) // p2'
+ mov (16) NewP1 TempRow1B(0) // p1'
+ mov (16) NewP0 TempRow0B(0) // p0'
+
+MBAFF_Y_ELSE3:
+ else (16) MBAFF_Y_ENDIF3 // for channels its deltap = false
+
+ // p0' = (2*p1 + p0 + q1 + 2) >> 2 = (p1 + P01 + q1 + 2) >> 2
+ add (16) acc0.0<1>:w P1 P0_plus_P1(0) // p1 + P01 (TempRow1(0) = P01)
+ add (16) acc0.0<1>:w acc0.0<16;16,1>:w Q1
+ add (16) acc0.0<1>:w acc0.0<16;16,1>:w 2:w // p1 + P01 + q1 + 2
+
+ shr.sat (16) TempRow0B(0)<2> acc0.0<16;16,1>:w 2:w // >> 2
+ mov (16) NewP0 TempRow0B(0) // p0'
+
+ endif
+
+MBAFF_Y_ENDIF3:
+ // Compute q0', q1' and q2'
+ //-----------------------------------------------------------------------------
+ // bS = 4 Algorithm (cont):
+ //
+ // deltaq = (aq<beta) && gama; // deep filter flag
+ // if (deltaq) {
+ // q0' = ( q2 +2*q1 +2*q0 +2*p0 + p1 + 4) >> 3;
+ // q1' = ( q2 + q1 + q0 + p0 + 2) >> 2;
+ // q2' = (2*q3 +3*q2 + q1 + q0 + p0 + 4) >> 3;
+ // } else {
+ // q0' = ( 2*q1 + q0 + p1 + 2) >> 2;
+ // }
+
+ (f0.0) if (16) MBAFF_Y_ELSE4 // for channels its deltaq = true
+
+ add (16) Q2_plus_Q3(0)<1> Q2 Q3
+
+ // A = q1 + q0 + p0 = Q01 + p0
+ add (16) A(0)<1> Q0_plus_Q1(0) p0(0) // A = q1+q0 + p0
+
+ // B = q2 + q1 + q0 + p0 + 4 = q2 + A + 4
+ add (16) acc0.0<1>:w acc0.0<16;16,1>:w 4:w // q2 + 4
+ add (16) BB(0)<1> acc0.0<16;16,1>:w Q2 // B = q2 + A + 4
+
+ // Acc0 = B
+
+ // q2' = (2*q3 +3*q2 + A + 4) >> 3 = (2*(q3+q2) + B) >> 3
+ mac (16) acc0.0<1>:w Q2_plus_Q3(0) 2:w
+ shr.sat (16) TempRow3B(0)<2> acc0.0<16;16,1>:w 3:w
+
+ // q1' = (q2 + A + 2) >> 2 = (B - 2) >> 2
+ add (16) acc0.0<1>:w BB(0) -2:w
+ shr.sat (16) TempRow1B(0)<2> acc0.0<16;16,1>:w 2:w
+
+ // q0' = (q2 +2*A + p1 + 4) >> 3 = (B + A + p1) >> 3
+ add (16) acc0.0<1>:w p1(0) A(0)
+ add (16) acc0.0<1>:w acc0.0<16;16,1>:w BB(0)
+ shr.sat (16) TempRow0B(0)<2> acc0.0<16;16,1>:w 3:w
+
+ mov (16) NewQ2 TempRow3B(0) // q2'
+ mov (16) NewQ1 TempRow1B(0) // q1'
+ mov (16) NewQ0 TempRow0B(0) // q0'
+
+MBAFF_Y_ELSE4:
+ else (16) MBAFF_Y_ENDIF4 // for channels its deltaq = false
+
+ // q0' = (2*q1 + q0 + p1 + 2) >> 2 = (q1 + Q01 + p1 + 2) >> 2
+ // Use original p1 values in p1(0)
+ add (16) acc0.0<1>:w p1(0) Q0_plus_Q1(0) // p1 + P01 (TempRow1(0) = P01)
+ add (16) acc0.0<1>:w acc0.0<16;16,1>:w Q1
+ add (16) acc0.0<1>:w acc0.0<16;16,1>:w 2:w // p1 + P01 + q1 + 2
+
+ shr.sat (16) TempRow0B(0)<2> acc0.0<16;16,1>:w 2:w // >> 2
+ mov (16) NewQ0 TempRow0B(0) // q0'
+
+ endif
+MBAFF_Y_ENDIF4:
+
+
+ // Done with bS = 4 algorithm
+
+MBAFF_Y_ELSE2:
+ else (16) MBAFF_Y_ENDIF2
+ // For channels whose edge control map2 = 0 ---> bS < 4 algorithm
+
+ //-----------------------------------------------------------------------------
+ // bS < 4 Algorithm :
+ // tc = tc0 + (|p2-p0|<Beta ? 1 : 0) + (|q2-q0|<Beta ? 1 : 0)
+ // delta = Clip3(-tc, tc, ((((q0-p0)<<2) + (p1-q1) + 4) >> 3))
+ // p0' = Clip1(p0 + delta) = Clip3(0, 0xFF, p0 + delta)
+ // q0' = Clip1(q0 - delta) = Clip3(0, 0xFF, q0 - delta)
+ // if (|p2-p0|<Beta)
+ // p1' = p1 + Clip3(-tc0, tc0, (p2 + ((p0+q0+1)>>1) - (p1<<1)) >> 1 )
+ // if (|q2-q0|<Beta)
+ // q1' = q1 + Clip3(-tc0, tc0, (q2 + ((p0+q0+1)>>1) - (q1<<1)) >> 1 )
+ //-----------------------------------------------------------------------------
+
+ mov (16) tc_exp(0)<1> Mbaff_TC0(0) // tc = tc0_exp first
+
+ cmp.l.f0.0 (16) null:w (abs)ap(0) Mbaff_BETA(0) // |p2-p0|<Beta ?
+ cmp.l.f0.1 (16) null:w (abs)aq(0) Mbaff_BETA(0) // |q2-q0|<Beta ?
+
+ //--- Use free cycles here ---
+ // delta = Clip3(-tc, tc, ((((q0-p0)<<2) + (p1-q1) + 4) >> 3))
+ // 4 * (q0-p0) + p1 - q1 + 4
+ add (16) acc0<1>:w P1 4:w // p1 + 4
+ mac (16) acc0<1>:w q0_p0(0) 4:w // 4 * (q0-p0) + p1 + 4
+ add (16) acc0<1>:w acc0<16;16,1>:w -Q1 // 4 * (q0-p0) + p1 - q1 + 4
+ shr (16) TempRow0(0)<1> acc0<16;16,1>:w 3:w
+
+ // Continue on getting tc_exp
+ (f0.0) add (16) tc_exp(0)<1> tc_exp(0) 1:w // tc0_exp + (|p2-p0|<Beta ? 1 : 0)
+ mov (2) CTemp1_W<1>:w f0.0<2;2,1>:w {NoMask} // Save |p2-p0|<Beta flag
+ (f0.1) add (16) tc_exp(0)<1> tc_exp(0) 1:w // tc_exp = tc0_exp + (|p2-p0|<Beta ? 1 : 0) + (|q2-q0|<Beta ? 1 : 0)
+
+ // Continue on cliping tc to get delta
+ cmp.g.f0.0 (16) null:w TempRow0(0) tc_exp(0) // Clip if delta' > tc
+ cmp.l.f0.1 (16) null:w TempRow0(0) -tc_exp(0) // Clip if delta' < -tc
+
+ //--- Use free cycles here ---
+ // common = (p0+q0+1) >> 1 ---> TempRow2(0)
+ // Same as avg of p0 and q0
+ avg (16) TempRow2(0)<1> P0 Q0
+
+ // Continue on cliping tc to get delta
+ (f0.0) mov (16) TempRow0(0)<1> tc_exp(0)
+ (f0.1) mov (16) TempRow0(0)<1> -tc_exp(0)
+
+ //--- Use free cycles here ---
+ mov (2) f0.0<1>:w CTemp1_W<2;2,1>:w {NoMask} // CTemp1_W = (|p2-p0|<Beta)
+ // CTemp2_W = (|q2-q0|<Beta)
+
+ // p0' = Clip1(p0 + delta) = Clip3(0, 0xFF, p0 + delta)
+ // q0' = Clip1(q0 - delta) = Clip3(0, 0xFF, q0 - delta)
+ add.sat (16) TempRow1B(0)<2> P0 TempRow0(0) // p0+delta
+ add.sat (16) TempRow0B(0)<2> Q0 -TempRow0(0) // q0-delta
+
+ mov (16) NewP0 TempRow1B(0) // p0'
+ mov (16) NewQ0 TempRow0B(0) // q0'
+
+ //-----------------------------------------------------------------------
+
+ // Now compute p1' and q1'
+
+ // if (|p2-p0|<Beta)
+ (f0.0) if (16) MBAFF_Y_ENDIF6
+
+ // p1' = p1 + Clip3(-tc0, tc0, adj)
+ // adj = (p2 + common - (p1<<1)) >> 1 = (p2 + common - (p1*2)) >> 1
+ add (16) acc0<1>:w P2 TempRow2(0) // TempRow2(0) = common = (p0+q0+1) >> 1
+ mac (16) acc0<1>:w P1 -2:w
+ shr (16) TempRow1(0)<1> acc0<16;16,1>:w 1:w
+
+ // tc clip to get tc_adj
+ cmp.g.f0.0 (16) null:w TempRow1(0) Mbaff_TC0(0) // Clip if delta' > tc
+ cmp.l.f0.1 (16) null:w TempRow1(0) -Mbaff_TC0(0) // Clip if delta' < -tc
+
+ (f0.0) mov (16) TempRow1(0)<1> Mbaff_TC0(0)
+ (f0.1) mov (16) TempRow1(0)<1> -Mbaff_TC0(0)
+
+ //--- Use free cycles here ---
+ mov (1) f0.1:w CTemp2_W:w {NoMask} // CTemp2_W = (|q2-q0|<Beta)
+
+ // p1' = p1 + tc_adj
+ add.sat (16) TempRow1B(0)<2> P1 TempRow1(0) // p1+tc_adj
+ mov (16) NewP1 TempRow1B(0) // p1'
+ //------------------------------------------------------------------------
+
+MBAFF_Y_ENDIF6:
+ endif
+
+ // if (|q2-q0|<Beta)
+ (f0.1) if (16) MBAFF_Y_ENDIF7
+
+ // q1' = q1 + Clip3(-tc0, tc0, adj)
+ // adj = (q2 + common - (q1<<1)) >> 1
+ // same as q2 + common - (q1 * 2)
+ add (16) acc0<1>:w Q2 TempRow2(0)
+ mac (16) acc0<1>:w Q1 -2:w
+ shr (16) TempRow1(0)<1> acc0<16;16,1>:w 1:w
+
+ // tc clip to get tc_adj
+ cmp.g.f0.0 (16) null:w TempRow1(0) Mbaff_TC0(0) // Clip if delta' > tc
+ cmp.l.f0.1 (16) null:w TempRow1(0) -Mbaff_TC0(0) // Clip if delta' < -tc
+
+ (f0.0) mov (16) TempRow1(0)<1> Mbaff_TC0(0)
+ (f0.1) mov (16) TempRow1(0)<1> -Mbaff_TC0(0)
+
+ // q1' = q1 + tc_adj
+ add.sat (16) TempRow1B(0)<2> Q1 TempRow1(0) // q1+tc_adj
+ mov (16) NewQ1 TempRow1B(0) // q1'
+
+ //------------------------------------------------------------------------
+MBAFF_Y_ENDIF7:
+ endif
+
+ endif
+MBAFF_Y_ENDIF2:
+MBAFF_Y_ENDIF1:
+ endif
+
+RETURN
+
+#endif // !defined(__AVC_ILDB_LUMA_CORE_MBAFF__)
diff --git a/src/shaders/h264/ildb/AVC_ILDB_OpenGateway.asm b/src/shaders/h264/ildb/AVC_ILDB_OpenGateway.asm new file mode 100644 index 00000000..06d19334 --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_OpenGateway.asm @@ -0,0 +1,43 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+//----- Open a Message Gateway -----
+// The parent thread is the recipient thread
+
+#if defined(_DEBUG)
+ mov (1) EntrySignature:w 0x1111:w
+#endif
+
+mov (8) GatewayPayload<1>:ud r0.0<8;8,1>:ud // Init payload to r0
+
+// r50- (16 GRFs) are the GRFs child thread can wtite to.
+
+// Reg base is at bit 28:21, Gateway size is at [bit 10:8]
+// r6: 6 = 00000110
+//000 00000110 0000000000 100 00000000 ==> 0000 0000 1100 0000 0000 0100 0000 0000
+mov (1) RegBase_GatewaySize:ud 0x00C00400:ud // Reg base + Gateway size (16 GRFs)
+
+
+//000 00110010 0000000000 100 00000000 ==> 0000 0110 0100 0000 0000 0100 0000 0000
+//mov (1) RegBase_GatewaySize:ud 0x06400400:ud // Reg base (r50 = 0x640 byte offset) + Gateway size (16 GRFs)
+
+//mov (1) DispatchID:ub r0.20:ub // Dispatch ID
+mov (1) GatewayPayloadKey:uw 0x1212:uw // Key=0x1212
+
+// Message descriptor
+// bit 31 EOD
+// 27:24 FFID = 0x0011 for msg gateway
+// 23:20 msg length = 1 MRF
+// 19:16 Response length = 0
+// 14 AckReg = 1
+// 1:0 SubFuncID = 00 for OpenGateway
+// Message descriptor: 0 000 0011 0001 0000 + 0 1 000000000000 00 ==> 0000 0011 0001 0000 0100 0000 0000 0000
+// Send message to gateway: the ack message is put into response GRF r49 ==> Good for debugging
+send (8) GatewayResponse:ud m7 GatewayPayload<8;8,1>:ud MSG_GW OGWMSGDSC
+
+//----- End of Open a Message Gateway -----
diff --git a/src/shaders/h264/ildb/AVC_ILDB_Root_Field_UV.asm b/src/shaders/h264/ildb/AVC_ILDB_Root_Field_UV.asm new file mode 100644 index 00000000..759e80aa --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_Root_Field_UV.asm @@ -0,0 +1,9 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+#include "AVC_ILDB_Root_UV.asm"
diff --git a/src/shaders/h264/ildb/AVC_ILDB_Root_Field_Y.asm b/src/shaders/h264/ildb/AVC_ILDB_Root_Field_Y.asm new file mode 100644 index 00000000..f88eede4 --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_Root_Field_Y.asm @@ -0,0 +1,9 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+#include "AVC_ILDB_Root_Y.asm"
diff --git a/src/shaders/h264/ildb/AVC_ILDB_Root_Mbaff_UV.asm b/src/shaders/h264/ildb/AVC_ILDB_Root_Mbaff_UV.asm new file mode 100644 index 00000000..73f56576 --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_Root_Mbaff_UV.asm @@ -0,0 +1,140 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+/////////////////////////////////////////////////////////////////////////////////////
+// Kernel name: AVC_ILDB_Root_Mbaff.asm
+//
+// Root kernel serves as a scheduler for child threads.
+//
+//
+// ***** Note *****
+// Initial design bundle MB pair for each thread, and share AVC_ILDB_MB_Dep_Check.asm
+// with non mbaff kernels.
+//
+// Optimization will be done later, putting top and bottom MBs on separate threads.
+//
+//
+/////////////////////////////////////////////////////////////////////////////////////
+//
+// $Revision: 1 $
+// $Date: 10/19/06 5:06p $
+//
+
+// ----------------------------------------------------
+// AVC_ILDB_ROOT_MBAFF_UV
+// ----------------------------------------------------
+#define AVC_ILDB
+
+.kernel AVC_ILDB_ROOT_MBAFF_UV
+#if defined(COMBINED_KERNEL)
+ILDB_LABEL(AVC_ILDB_ROOT_UV):
+#endif
+
+#include "SetupVPKernel.asm"
+#include "AVC_ILDB.inc"
+
+
+#if defined(_DEBUG)
+
+/////////////////////////////////////////////////////////////////////////////////////
+// Init URB space for running on RTL. It satisfies reading an unwritten URB entries.
+// Will remove it for production release.
+
+
+//mov (8) m1:ud 0x11111111:ud
+//mov (8) m2:ud 0x22222222:ud
+//mov (8) m3:ud 0x33333333:ud
+//mov (8) m4:ud 0x44444444:ud
+
+//mov (1) Temp1_W:w 0:w
+
+//ILDB_INIT_URB:
+//mul (1) URBOffset:w Temp1_W:w 4:w
+//shl (1) URBWriteMsgDescLow:uw URBOffset:w 4:w // Msg descriptor: URB write dest offset (9:4)
+//mov (1) URBWriteMsgDescHigh:uw 0x0650:uw // Msg descriptor: URB write 5 MRFs (m0 - m4)
+//#include "writeURB.asm"
+
+//add (1) Temp1_W:w Temp1_W:w 1:w // Increase block count
+//cmp.l.f0.0 (1) null Temp1_W:w MBsCntY:w // Check the block count limit
+//(f0.0) jmpi ILDB_INIT_URB // Loop back
+
+
+/////////////////////////////////////////////////////////////////////////////////////
+
+
+mov (1) EntrySignature:w 0xEFF0:w
+
+#endif
+//----------------------------------------------------------------------------------------------------------------
+
+// Set global variable
+mov (32) ChildParam:uw 0:uw // Reset local variables
+//mul (1) TotalBlocks:w MBsCntX:w MBsCntY:w // Total # of MB pairs
+//add (1) GatewayApertureE:w MBsCntY:w GatewayApertureB:w // Aperture End = aperture Head + BlockCntY
+
+
+// 2 URB entries for Y:
+// Entry 0 - Child thread R0Hdr
+// Entry 1 - input parameter to child kernel (child r1)
+
+#define URB_ENTRIES_PER_MB 2
+
+// URB_ENTRIES_PER_MB in differnt form, the final desired format is (URB_ENTRIES_PER_MB-1) << 10
+mov (1) URB_EntriesPerMB_2:w URB_ENTRIES_PER_MB-1:w
+shl (1) URB_EntriesPerMB_2:w URB_EntriesPerMB_2:w 10:w
+
+#define CHROMA_ROOT // Compiling flag for chroma only
+//mul (1) URBOffsetUVBase:w MBsCntY:w URB_ENTRIES_PER_MB:w // Right after Y entries
+
+// URB base for UV kernels
+#if defined(DEV_CL)
+ mov (1) URBOffsetUVBase:w 240:w
+#else
+ mov (1) URBOffsetUVBase:w 320:w
+#endif
+
+
+mov (1) ChildThreadsID:uw 3:uw
+
+shr (1) ThreadLimit:w MaxThreads:w 1:w // Initial luma thread limit to 50%
+mul (1) TotalBlocks:w MBsCntX:w MBsCntY:w // MBs to be processed count down from TotalBlocks
+
+//***** Init CT_R0Hdr fields that are common to all threads *************************
+mov (8) CT_R0Hdr.0:ud r0.0<8;8,1>:ud // Init to root R0 header
+mov (1) CT_R0Hdr.7:ud r0.6:ud // Copy Parent Thread Cnt; JJ did the change on 06/20/2006
+mov (1) CT_R0Hdr.31:ub 0:w // Reset the highest byte
+mov (1) CT_R0Hdr.3:ud 0x00000000
+mov (1) CT_R0Hdr.6:uw sr0.0:uw // sr0.0: state reg contains general thread states, e.g. EUID/TID.
+
+//***** Init ChildParam fields that are common to all threads ***********************
+mov (8) ChildParam<1>:ud RootParam<8;8,1>:ud // Copy all root parameters
+mov (4) CurCol<1>:w 0:w // Reset CurCol, CurRow
+add (2) LastCol<1>:w MBsCntX<2;2,1>:w -1:w // Get LastCol and LastRow
+
+mov (1) URBWriteMsgDesc:ud MSG_LEN(2)+URBWMSGDSC:ud
+
+//===================================================================================
+
+#include "AVC_ILDB_OpenGateway.asm" // Open root thread gateway for receiving notification
+
+#include "AVC_ILDB_Dep_Check.asm" // Check dependency and spawn all MBs
+
+//#include "AVC_ILDB_UpdateThrdLimit.asm" // Update thread limit in luma root thread via gateway
+
+#include "AVC_ILDB_CloseGateway.asm" // Close root thread gateway
+
+// Chroma root EOT = child send EOT : Request type = 1
+ END_CHILD_THREAD
+
+#undef CHROMA_ROOT
+
+#if !defined(COMBINED_KERNEL) // For standalone kernel only
+.end_code
+
+.end_kernel
+#endif
diff --git a/src/shaders/h264/ildb/AVC_ILDB_Root_Mbaff_Y.asm b/src/shaders/h264/ildb/AVC_ILDB_Root_Mbaff_Y.asm new file mode 100644 index 00000000..124154b0 --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_Root_Mbaff_Y.asm @@ -0,0 +1,140 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+/////////////////////////////////////////////////////////////////////////////////////
+// Kernel name: AVC_ILDB_Root_Mbaff.asm
+//
+// Root kernel serves as a scheduler for child threads.
+//
+//
+// ***** Note *****
+// Initial design bundle MB pair for each thread, and share AVC_ILDB_MB_Dep_Check.asm
+// with non mbaff kernels.
+//
+// Optimization will be done later, putting top and bottom MBs on separate threads.
+//
+//
+/////////////////////////////////////////////////////////////////////////////////////
+//
+// $Revision: 1 $
+// $Date: 10/19/06 5:06p $
+//
+
+// ----------------------------------------------------
+// AVC_ILDB_ROOT_MBAFF_Y
+// ----------------------------------------------------
+#define AVC_ILDB
+
+.kernel AVC_ILDB_ROOT_MBAFF_Y
+#if defined(COMBINED_KERNEL)
+ILDB_LABEL(AVC_ILDB_ROOT_Y):
+#endif
+
+#include "SetupVPKernel.asm"
+#include "AVC_ILDB.inc"
+
+
+#if defined(_DEBUG)
+
+/////////////////////////////////////////////////////////////////////////////////////
+// Init URB space for running on RTL. It satisfies reading an unwritten URB entries.
+// Will remove it for production release.
+
+
+//mov (8) m1:ud 0x11111111:ud
+//mov (8) m2:ud 0x22222222:ud
+//mov (8) m3:ud 0x33333333:ud
+//mov (8) m4:ud 0x44444444:ud
+
+//mov (1) Temp1_W:w 0:w
+
+//ILDB_INIT_URB:
+//mul (1) URBOffset:w Temp1_W:w 4:w
+//shl (1) URBWriteMsgDescLow:uw URBOffset:w 4:w // Msg descriptor: URB write dest offset (9:4)
+//mov (1) URBWriteMsgDescHigh:uw 0x0650:uw // Msg descriptor: URB write 5 MRFs (m0 - m4)
+//#include "writeURB.asm"
+
+//add (1) Temp1_W:w Temp1_W:w 1:w // Increase block count
+//cmp.l.f0.0 (1) null Temp1_W:w MBsCntY:w // Check the block count limit
+//(f0.0) jmpi ILDB_INIT_URB // Loop back
+
+/////////////////////////////////////////////////////////////////////////////////////
+
+
+mov (1) EntrySignature:w 0xEFF0:w
+
+#endif
+//----------------------------------------------------------------------------------------------------------------
+
+// Set global variable
+mov (32) ChildParam:uw 0:uw // Reset local variables
+//mul (1) TotalBlocks:w MBsCntX:w MBsCntY:w // Total # of MB pairs
+//add (1) GatewayApertureE:w MBsCntY:w GatewayApertureB:w // Aperture End = aperture Head + BlockCntY
+
+
+// 2 URB entries for Y:
+// Entry 0 - Child thread R0Hdr
+// Entry 1 - input parameter to child kernel (child r1)
+
+#undef URB_ENTRIES_PER_MB
+#define URB_ENTRIES_PER_MB 2
+
+// URB_ENTRIES_PER_MB in differnt form, the final desired format is (URB_ENTRIES_PER_MB-1) << 10
+mov (1) URB_EntriesPerMB_2:w URB_ENTRIES_PER_MB-1:w
+shl (1) URB_EntriesPerMB_2:w URB_EntriesPerMB_2:w 10:w
+
+mov (1) ChildThreadsID:uw 1:uw // ChildThreadsID for chroma root
+
+shr (1) ThreadLimit:w MaxThreads:w 1:w // Initial luma thread limit to 50%
+mul (1) TotalBlocks:w MBsCntX:w MBsCntY:w // MBs to be processed count down from TotalBlocks
+
+//***** Init CT_R0Hdr fields that are common to all threads *************************
+mov (8) CT_R0Hdr.0:ud r0.0<8;8,1>:ud // Init to root R0 header
+mov (1) CT_R0Hdr.7:ud r0.6:ud // Copy Parent Thread Cnt; JJ did the change on 06/20/2006
+mov (1) CT_R0Hdr.31:ub 0:w // Reset the highest byte
+mov (1) CT_R0Hdr.3:ud 0x00000000
+mov (1) CT_R0Hdr.6:uw sr0.0:uw // sr0.0: state reg contains general thread states, e.g. EUID/TID.
+
+//***** Init ChildParam fields that are common to all threads ***********************
+mov (8) ChildParam<1>:ud RootParam<8;8,1>:ud // Copy all root parameters
+mov (4) CurCol<1>:w 0:w // Reset CurCol, CurRow
+add (2) LastCol<1>:w MBsCntX<2;2,1>:w -1:w // Get LastCol and LastRow
+
+mov (1) URBWriteMsgDesc:ud MSG_LEN(2)+URBWMSGDSC:ud
+
+//===================================================================================
+
+#include "AVC_ILDB_OpenGateway.asm" // Open root thread gateway for receiving notification
+
+#if defined(DEV_CL)
+ mov (1) URBOffset:uw 240:uw // Use chroma URB offset to spawn chroma root
+#else
+ mov (1) URBOffset:uw 320:uw // Use chroma URB offset to spawn chroma root
+#endif
+
+#include "AVC_ILDB_SpawnChromaRoot.asm" // Spawn chroma root
+
+mov (1) URBOffset:uw 0:uw // Use luma URB offset to spawn luma child
+mov (1) ChildThreadsID:uw 2:uw // Starting ChildThreadsID for luma child threads
+
+#include "AVC_ILDB_Dep_Check.asm" // Check dependency and spawn all MBs
+
+// Wait for UV root thread to finish
+ILDB_LABEL(WAIT_FOR_UV):
+cmp.l.f0.0 (1) null:w ThreadLimit:w MaxThreads:w
+(f0.0) jmpi ILDB_LABEL(WAIT_FOR_UV)
+
+#include "AVC_ILDB_CloseGateway.asm" // Close root thread gateway
+
+END_THREAD // End of root thread
+
+#if !defined(COMBINED_KERNEL) // For standalone kernel only
+.end_code
+
+.end_kernel
+#endif
diff --git a/src/shaders/h264/ildb/AVC_ILDB_Root_UV.asm b/src/shaders/h264/ildb/AVC_ILDB_Root_UV.asm new file mode 100644 index 00000000..9a779beb --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_Root_UV.asm @@ -0,0 +1,127 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: AVC_ILDB_Root_UV.asm
+//
+// Root kernel serves as a scheduler for child threads
+//
+// $Revision: 1 $
+// $Date: 10/19/06 5:06p $
+//
+
+// ----------------------------------------------------
+// AVC_ILDB_ROOT_UV
+// ----------------------------------------------------
+#define AVC_ILDB
+
+.kernel AVC_ILDB_ROOT_UV
+#if defined(COMBINED_KERNEL)
+ILDB_LABEL(AVC_ILDB_ROOT_UV):
+#endif
+
+#include "SetupVPKernel.asm"
+#include "AVC_ILDB.inc"
+
+#if defined(_DEBUG)
+mov (1) EntrySignature:w 0xFF11:w
+#endif
+
+/////////////////////////////////////////////////////////////////////////////////////
+#if defined(_DEBUG)
+
+// Init URB space for running on RTL. It satisfies reading an unwritten URB entries.
+// Will remove it for production release.
+
+mov (8) m1:ud 0x55555555:ud
+mov (8) m2:ud 0x66666666:ud
+mov (8) m3:ud 0x77777777:ud
+mov (8) m4:ud 0x88888888:ud
+
+mov (1) Temp1_W:w MBsCntY:w
+shl (1) Temp2_W:w MBsCntY:w 1:w
+
+ILDB_LABEL(ILDB_INIT_URB_UV):
+mul (1) URBOffset:uw Temp1_W:uw 4:w // Each thread uses 4 URB entries (1 r0 + 1 inline + 2 data)
+mov (1) URBWriteMsgDesc:ud MSG_LEN(4)+URBWMSGDSC:ud // Msg descriptor: URB write msg length = 5
+#include "writeURB.asm"
+
+add (1) Temp1_W:w Temp1_W:w 1:w // Increase block count
+cmp.l.f0.0 (1) null Temp1_W:w Temp2_W:w // Check the block count limit
+(f0.0) jmpi ILDB_LABEL(ILDB_INIT_URB_UV) // Loop back
+
+mov (1) EntrySignature:w 0xFFF0:w
+
+#endif
+/////////////////////////////////////////////////////////////////////////////////////
+
+// Set global variable
+mov (32) ChildParam:uw 0:uw // Reset local variables, 2 GRFs
+//mul (1) TotalBlocks:w MBsCntX:w MBsCntY:w // Total # of blocks
+//add (1) GatewayApertureE:w MBsCntY:w GatewayApertureB:w // Aperture End = aperture Head + BlockCntY
+
+// 4 URB entries for Y:
+// Entry 0 - Child thread R0Hdr
+// Entry 1 - input parameter to child kernel (child r1)
+// Entry 2 - Prev MB data UV 2x8
+// Entry 3 - Unused
+
+#define URB_ENTRIES_PER_MB 4
+
+// URB_ENTRIES_PER_MB in differnt form, the final desired format is (URB_ENTRIES_PER_MB-1) << 10
+mov (1) URB_EntriesPerMB_2:w URB_ENTRIES_PER_MB-1:w
+shl (1) URB_EntriesPerMB_2:w URB_EntriesPerMB_2:w 10:w
+
+#define CHROMA_ROOT // Compiling flag for chroma only
+
+// URB base for UV kernels
+#if defined(DEV_CL)
+ mov (1) URBOffsetUVBase:w 240:w
+#else
+ mov (1) URBOffsetUVBase:w 320:w
+#endif
+
+
+mov (1) ChildThreadsID:uw 3:uw
+
+shr (1) ThreadLimit:w MaxThreads:w 1:w // Initial luma thread limit to 50%
+mul (1) TotalBlocks:w MBsCntX:w MBsCntY:w // MBs to be processed count down from TotalBlocks
+
+//***** Init CT_R0Hdr fields that are common to all threads *************************
+mov (8) CT_R0Hdr.0:ud r0.0<8;8,1>:ud // Init to root R0 header
+mov (1) CT_R0Hdr.7:ud r0.6:ud // Copy Parent Thread Cnt; JJ did the change on 06/20/2006
+mov (1) CT_R0Hdr.31:ub 0:w // Reset the highest byte
+mov (1) CT_R0Hdr.3:ud 0x00000000
+mov (1) CT_R0Hdr.6:uw sr0.0:uw // sr0.0: state reg contains general thread states, e.g. EUID/TID.
+
+//***** Init ChildParam fields that are common to all threads ***********************
+mov (8) ChildParam<1>:ud RootParam<8;8,1>:ud // Copy all root parameters
+mov (4) CurCol<1>:w 0:w // Reset CurCol, CurRow,
+add (2) LastCol<1>:w MBsCntX<2;2,1>:w -1:w // Get LastCol and LastRow
+
+mov (1) URBWriteMsgDesc:ud MSG_LEN(2)+URBWMSGDSC:ud
+
+//===================================================================================
+
+#include "AVC_ILDB_OpenGateway.asm" // Open gateway for receiving notification
+
+#include "AVC_ILDB_Dep_Check.asm" // Check dependency and spawn all luma child threads in parallel with chroma root
+
+//#include "AVC_ILDB_LumaThrdLimit.asm" // Update thread limit in luma root thread via gateway
+
+#include "AVC_ILDB_CloseGateway.asm" // Close root thread gateway
+
+// Chroma root EOT = child send EOT : Request type = 1
+ END_CHILD_THREAD
+
+#undef CHROMA_ROOT
+
+#if !defined(COMBINED_KERNEL) // For standalone kernel only
+.end_code
+
+.end_kernel
+#endif
diff --git a/src/shaders/h264/ildb/AVC_ILDB_Root_Y.asm b/src/shaders/h264/ildb/AVC_ILDB_Root_Y.asm new file mode 100644 index 00000000..9b9b1a89 --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_Root_Y.asm @@ -0,0 +1,130 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: AVC_ILDB_Root_Y.asm
+//
+// Root kernel serves as a scheduler for child threads
+//
+// $Revision: 1 $
+// $Date: 10/19/06 5:06p $
+//
+
+// ----------------------------------------------------
+// AVC_ILDB_ROOT_Y
+// ----------------------------------------------------
+#define AVC_ILDB
+
+.kernel AVC_ILDB_ROOT_Y
+#if defined(COMBINED_KERNEL)
+ILDB_LABEL(AVC_ILDB_ROOT_Y):
+#endif
+
+#include "SetupVPKernel.asm"
+#include "AVC_ILDB.inc"
+
+/////////////////////////////////////////////////////////////////////////////////////
+#if defined(_DEBUG)
+
+// Init URB space for running on RTL. It satisfies reading an unwritten URB entries.
+// Will remove it for production release.
+
+mov (8) m1:ud 0x11111111:ud
+mov (8) m2:ud 0x22222222:ud
+mov (8) m3:ud 0x33333333:ud
+mov (8) m4:ud 0x44444444:ud
+
+mov (1) Temp1_W:w 0:w
+
+ILDB_LABEL(ILDB_INIT_URB_Y):
+//mul (1) Temp2_W:w Temp1_W:w 4:w // URBOffset
+//shl (1) URBWriteMsgDescLow:uw Temp2_W:w 4:w // Msg descriptor: URB write dest offset (9:4)
+//mov (1) URBWriteMsgDescHigh:uw 0x0650:uw // Msg descriptor: URB write 5 MRFs (m0 - m4)
+
+//mul (1) URBOffset:uw Temp1_W:uw 4:w // Each thread uses 4 URB entries (1 r0 + 1 inline + 2 data)
+mul (1) URBOffset:uw Temp1_W:uw 2:w // Each thread uses 2 URB entries (1 r0 + 1 inline)
+mov (1) URBWriteMsgDesc:ud MSG_LEN(2)+URBWMSGDSC:ud // Msg descriptor: URB write msg length = 3
+#include "writeURB.asm"
+
+add (1) Temp1_W:w Temp1_W:w 1:w // Increase block count
+cmp.l.f0.0 (1) null Temp1_W:w MBsCntY:w // Check the block count limit
+(f0.0) jmpi ILDB_LABEL(ILDB_INIT_URB_Y) // Loop back
+
+mov (1) EntrySignature:w 0xFFF0:w
+
+#endif
+/////////////////////////////////////////////////////////////////////////////////////
+
+
+// Set global variable
+mov (32) ChildParam:uw 0:uw // Reset local variables, 2 GRFs
+//mul (1) TotalBlocks:w MBsCntX:w MBsCntY:w // Total # of blocks
+//add (1) GatewayApertureE:w MBsCntY:w GatewayApertureB:w // Aperture End = aperture Head + BlockCntY
+
+// 4 URB entries for Y:
+// Entry 0 - Child thread R0Hdr
+// Entry 1 - input parameter to child kernel (child r1)
+// Entry 2 - Prev MB data Y 4x16, col 1 and col 0
+// Entry 3 - Prev MB data Y 4x16, col 3 and col 2
+
+#undef URB_ENTRIES_PER_MB
+#define URB_ENTRIES_PER_MB 4
+
+// URB_ENTRIES_PER_MB in differnt form, the final desired format is (URB_ENTRIES_PER_MB-1) << 10
+mov (1) URB_EntriesPerMB_2:w URB_ENTRIES_PER_MB-1:w
+shl (1) URB_EntriesPerMB_2:w URB_EntriesPerMB_2:w 10:w
+
+shr (1) ThreadLimit:w MaxThreads:w 1:w // Initial luma thread limit to 50%
+mul (1) TotalBlocks:w MBsCntX:w MBsCntY:w // MBs to be processed count down from TotalBlocks
+
+//***** Init CT_R0Hdr fields that are common to all threads *************************
+mov (8) CT_R0Hdr.0:ud r0.0<8;8,1>:ud // Init to root R0 header
+mov (1) CT_R0Hdr.7:ud r0.6:ud // Copy Parent Thread Cnt; JJ did the change on 06/20/2006
+mov (1) CT_R0Hdr.31:ub 0:w // Reset the highest byte
+mov (1) CT_R0Hdr.3:ud 0x00000000
+mov (1) CT_R0Hdr.6:uw sr0.0:uw // sr0.0: state reg contains general thread states, e.g. EUID/TID.
+
+//***** Init ChildParam fields that are common to all threads ***********************
+mov (8) ChildParam<1>:ud RootParam<8;8,1>:ud // Copy all root parameters
+mov (4) CurCol<1>:w 0:w // Reset CurCol, CurRow,
+add (2) LastCol<1>:w MBsCntX<2;2,1>:w -1:w // Get LastCol and LastRow
+
+mov (1) URBWriteMsgDesc:ud MSG_LEN(2)+URBWMSGDSC:ud
+
+//===================================================================================
+
+#include "AVC_ILDB_OpenGateway.asm" // Open gateway for receiving notification
+
+#if defined(DEV_CL)
+ mov (1) URBOffset:uw 240:uw // Use chroma URB offset to spawn chroma root
+#else
+ mov (1) URBOffset:uw 320:uw // Use chroma URB offset to spawn chroma root
+#endif
+
+#include "AVC_ILDB_SpawnChromaRoot.asm" // Spawn chroma root
+
+mov (1) URBOffset:uw 0:uw // Use luma URB offset to spawn luma child
+mov (1) ChildThreadsID:uw 2:uw // Starting ChildThreadsID for luma child threads
+
+#include "AVC_ILDB_Dep_Check.asm" // Check dependency and spawn all luma child threads in parallel with chroma root
+
+
+// Wait for UV root thread to finish
+ILDB_LABEL(WAIT_FOR_UV):
+cmp.l.f0.0 (1) null:w ThreadLimit:w MaxThreads:w
+(f0.0) jmpi ILDB_LABEL(WAIT_FOR_UV)
+
+
+#include "AVC_ILDB_CloseGateway.asm" // Close root thread gateway
+
+END_THREAD // End of root thread
+
+#if !defined(COMBINED_KERNEL) // For standalone kernel only
+.end_code
+
+.end_kernel
+#endif
diff --git a/src/shaders/h264/ildb/AVC_ILDB_Spawn.asm b/src/shaders/h264/ildb/AVC_ILDB_Spawn.asm new file mode 100644 index 00000000..5b5c91e9 --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_Spawn.asm @@ -0,0 +1,22 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+//=============== Spawn a child thread for a vertical child ===============
+
+#if defined(_DEBUG)
+ mov (1) EntrySignature:w 0x6666:w
+#endif
+
+ mul (1) URBOffset:uw CurRow:uw 2:w // 5:w // Each row uses 5 URB entries (R0, child R0, 3 GRFs of data from left MB)
+
+ mov (8) CT_R0Hdr.0:ud r0.0<8;8,1>:ud // Init to root R0 header
+
+ // R0.2: Interface Discriptor Ptr. Add offset 16 for next Interface Discriptor for child kernel
+ add (1) CT_R0Hdr.2:ud r0.2:ud IDesc_Child_Offset:w
+
+ #include "AVC_ILDB_SpawnChild.asm"
diff --git a/src/shaders/h264/ildb/AVC_ILDB_SpawnChild.asm b/src/shaders/h264/ildb/AVC_ILDB_SpawnChild.asm new file mode 100644 index 00000000..0f6950c8 --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_SpawnChild.asm @@ -0,0 +1,55 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+//=============== Spawn a child thread for Luma or Chroma ===============
+
+ //----- Create child thread R0 header -----
+#if defined(_DEBUG)
+ mov (1) EntrySignature:w 0xAAAA:w
+#endif
+
+ //***** Set CT_R0Hdr fields that change for every thread
+
+ // Restore CT_R0Hdr.4:ud to r0.4:ud
+ mov (1) CT_R0Hdr.4:ud r0.4:ud
+
+ // R0.2: Interface Discriptor Ptr. Add a child offset for child kernel
+// add (1) CT_R0Hdr.2:ud r0.2:ud CHILD_OFFSET:w
+
+ // Assign a new Thread Count for this child
+ mov (1) CT_R0Hdr.6:ud ChildThreadsID:uw
+
+ //----- Prepare URB for launching a child thread -----
+ mov (16) m2.0:w ChildParam<16;16,1>:w
+
+ shr (1) MRF0.0:uw URBOffset:uw 1:w
+
+ add (1) ChildThreadsID:uw ChildThreadsID:uw 2:uw // Luma child=even, chroma child=odd
+
+ //--------------------------------------------------
+// #include "writeURB.asm"
+ send null:uw MRF0 null:ud URBWRITE URBWriteMsgDesc:ud // URB write
+
+ //--------------------------------------------------
+ // Set URB handle for child thread launching:
+ // URB handle Length (bit 15:10) - 0000 0000 0000 0000 yyyy yy00 0000 0000
+ // URB handle offset (bit 9:0) - 0000 0000 0000 0000 0000 00xx xxxx xxxx
+
+ or (1) CT_R0Hdr.4:ud URB_EntriesPerMB_2:w URBOffset:uw
+
+ // 2 URB entries:
+ // Entry 0 - CT_R0Hdr
+ // Entry 1 - input parameter to child kernel
+
+ //----- Spawn a child now -----
+ send (8) null:ud CT_R0Hdr null:ud TS TSMSGDSC
+// send (8) null:ud CT_Spawn_Reg null:ud 0x07100001
+
+
+ // Restore CT_R0Hdr.4:ud to r0.4:ud for next use
+// mov (1) CT_R0Hdr.4:ud r0.4:ud
diff --git a/src/shaders/h264/ildb/AVC_ILDB_SpawnChromaRoot.asm b/src/shaders/h264/ildb/AVC_ILDB_SpawnChromaRoot.asm new file mode 100644 index 00000000..cd5e57e7 --- /dev/null +++ b/src/shaders/h264/ildb/AVC_ILDB_SpawnChromaRoot.asm @@ -0,0 +1,47 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+//=============== Spawn a chroma root thread ===============
+
+ //----- Create chroma root thread R0 header -----
+#if defined(_DEBUG)
+ mov (1) EntrySignature:w 0xAABA:w
+#endif
+
+
+
+ // Restore CT_R0Hdr.4:ud to r0.4:ud
+// mov (1) CT_R0Hdr.4:ud r0.4:ud
+
+ // R0.2: Interface Discriptor Ptr. Add child offset for child kernel
+ add (1) CT_R0Hdr.2:ud r0.2:ud CHROMA_ROOT_OFFSET:w
+
+ // Assign a new Thread Count for this child
+ mov (1) CT_R0Hdr.6:ud 1:w // ThreadID=1 for chroma root
+
+ //----- Copy luma root r1 for launching chroma root thread -----
+ mov (16) m2.0:w RootParam<16;16,1>:w
+
+ #include "writeURB.asm"
+
+ //--------------------------------------------------
+ // Set URB handle for child thread launching:
+ // URB handle Length (bit 15:10) - 0000 0000 0000 0000 yyyy yy00 0000 0000
+ // URB handle offset (bit 9:0) - 0000 0000 0000 0000 0000 00xx xxxx xxxx
+
+ or (1) CT_R0Hdr.4:ud URB_EntriesPerMB_2:w URBOffset:uw
+
+ // 2 URB entries:
+ // Entry 0 - CT_R0Hdr
+ // Entry 1 - input parameter to child kernel
+
+ //----- Spawn a child now -----
+ send (8) null:ud CT_R0Hdr null:ud TS TSMSGDSC
+
+ // Restore CT_R0Hdr.4:ud to r0.4:ud for next use
+ mov (1) CT_R0Hdr.4:ud r0.4:ud
diff --git a/src/shaders/h264/ildb/Child_Undefs.inc b/src/shaders/h264/ildb/Child_Undefs.inc new file mode 100644 index 00000000..fa3ade1b --- /dev/null +++ b/src/shaders/h264/ildb/Child_Undefs.inc @@ -0,0 +1,24 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Modual name: Child_Undefs.inc
+//
+// Undefine global symbols for new process in child thread
+//
+
+#undef P1
+#undef P2
+#undef P3
+#undef P4
+#undef P5
+#undef P6
+#undef P7
+#undef P8
+#undef EDGECNTLMAP
+#undef CLIP_NEGATIVE
+#undef CLIP_DONE
diff --git a/src/shaders/h264/ildb/ILDB_header.inc b/src/shaders/h264/ildb/ILDB_header.inc new file mode 100644 index 00000000..100c6746 --- /dev/null +++ b/src/shaders/h264/ildb/ILDB_header.inc @@ -0,0 +1,306 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+#if !defined(__ILDB_HEADER__) // Make sure this file is only included once
+#define __ILDB_HEADER__
+
+// Module name: ILDB_header.inc
+//
+
+.default_execution_size (16)
+.default_register_type :ub
+
+#undef NULLREG
+#undef RETURN_REG
+#undef EOTMSGDSC
+#undef MSGSRC
+#undef END_THREAD
+#undef TSMSGDSC
+
+// ----------- Common constant definitions ------------
+//
+// Bit position constants
+//
+#define BIT0 0x01
+#define BIT1 0x02
+#define BIT2 0x04
+#define BIT3 0x08
+#define BIT4 0x10
+#define BIT5 0x20
+#define BIT6 0x40
+#define BIT7 0x80
+#define BIT8 0x0100
+#define BIT9 0x0200
+#define BIT10 0x0400
+#define BIT11 0x0800
+#define BIT12 0x1000
+#define BIT13 0x2000
+#define BIT14 0x4000
+#define BIT15 0x8000
+#define BIT16 0x00010000
+#define BIT17 0x00020000
+#define BIT18 0x00040000
+#define BIT19 0x00080000
+#define BIT20 0x00100000
+#define BIT21 0x00200000
+#define BIT22 0x00400000
+#define BIT23 0x00800000
+#define BIT24 0x01000000
+#define BIT25 0x02000000
+#define BIT26 0x04000000
+#define BIT27 0x08000000
+#define BIT28 0x10000000
+#define BIT29 0x20000000
+#define BIT30 0x40000000
+#define BIT31 0x80000000
+
+// Common constants
+//
+#define INST_SIZE 16 // Instruction size in byte
+
+#define GRFWIB 32 // GRF register width in byte
+#define GRFWIW 16 // GRF register width in word
+#define GRFWID 8 // GRF register width in dword
+
+#define TOP_FIELD 0
+#define BOTTOM_FIELD 1
+
+#define PREVIOUS_FRAME 0 // Previous frame
+#define CURRENT_FRAME 1 // Current frame
+#define NEXT_FRAME 2 // Next frame
+
+#define Y_ROW_WIDTH 16 // in bytes
+#define UV_ROW_WIDTH 8
+
+// Useful macros
+//
+#define REGION(Width,HStride) <Width*HStride;Width,HStride> // Region definition when ExecSize = Width
+
+#define NULLREG null<1>:d
+#define NULLREGW null<1>:w
+
+#define RETURN_REG r62 // Return pointer for all sub-routine calls (type DWORD)
+
+#define CALL(subFunc, skipInst) add (1) RETURN_REG<1>:ud ip:ud (1+skipInst)*INST_SIZE \n\
+ jmpi (1) subFunc
+
+#define RETURN mov (1) ip:ud RETURN_REG<0;1,0>:ud // Return to calling module
+
+#define PRED_CALL(flag, subFunc, skipInst) add (1) RETURN_REG<1>:ud ip:ud (1+skipInst)*INST_SIZE \n\
+ (flag) jmpi (1) subFunc
+
+
+// Definitions for surface states, GRF regions, and common data fields
+//
+// Note: Each kernel needs to define a specific symbol before including this
+// header file to ensure correct definitions.
+//
+
+
+
+#if defined(AVC_ILDB)
+
+.reg_count_total 64
+.reg_count_payload 4
+
+ // Binding Table Index
+ #define BI_CNTRL_DATA 0 // Control data map
+ #define BI_SRC_Y 1
+ #define BI_SRC_UV 2
+ #define BI_DEST_Y 3
+ #define BI_DEST_UV 4
+
+
+ //========== Left MB, 4x16 in r2 and r3 ==========
+ #define PREV_MB_Y_BASE 64 //2*GRFWIB // Byte offset to r2
+ .declare PREV_MB_YD Base=r2 ElementSize=4 SrcRegion=REGION(8,1) Type=ud
+ .declare PREV_MB_YW Base=r2 ElementSize=2 SrcRegion=REGION(8,1) Type=uw
+ .declare PREV_MB_YB Base=r2 ElementSize=1 SrcRegion=REGION(16,1) Type=ub
+
+ #define PREV_MB_U_BASE 64 //2*GRFWIB // seperate thread from Y // Byte offset to r2
+ .declare PREV_MB_UD Base=r2 ElementSize=4 SrcRegion=REGION(8,1) Type=ud
+ .declare PREV_MB_UW Base=r2 ElementSize=2 SrcRegion=REGION(16,1) Type=uw
+ .declare PREV_MB_UB Base=r2 ElementSize=1 SrcRegion=REGION(16,1) Type=ub
+
+ #define PREV_MB_V_BASE 65 //2*GRFWIB+1 // NV12 // Byte offset to r2.1
+ .declare PREV_MB_VB Base=r2.1 ElementSize=1 SrcRegion=REGION(16,1) Type=ub
+
+ //========== Top MB, 16x4 in r4 and r5 ==========
+ #define TOP_MB_Y_BASE 128 //4*GRFWIB // Byte offset to r4
+ .declare TOP_MB_YD Base=r4 ElementSize=4 SrcRegion=REGION(8,1) Type=ud
+ .declare TOP_MB_YW Base=r4 ElementSize=2 SrcRegion=REGION(8,1) Type=uw
+ .declare TOP_MB_YB Base=r4 ElementSize=1 SrcRegion=REGION(16,1) Type=ub
+
+ #define TOP_MB_U_BASE 128 //4*GRFWIB // seperate thread from Y // Byte offset to r4
+ .declare TOP_MB_UD Base=r4 ElementSize=4 SrcRegion=REGION(8,1) Type=ud
+ .declare TOP_MB_UW Base=r4 ElementSize=2 SrcRegion=REGION(16,1) Type=uw
+ .declare TOP_MB_UB Base=r4 ElementSize=1 SrcRegion=REGION(16,1) Type=ub
+
+ #define TOP_MB_V_BASE 129 //4*GRFWIB+1 // NV12 // Byte offset to r4.1
+ .declare TOP_MB_VB Base=r4.1 ElementSize=1 SrcRegion=REGION(16,1) Type=ub
+
+
+ //========== Current MB, 16x16 in r6-r13 ==========
+ #define SRC_MB_Y_BASE 192 //6*GRFWIB // Byte offset to r6
+ .declare SRC_YD Base=r6 ElementSize=4 SrcRegion=REGION(8,1) Type=ud // For read and write, 8 GRFs
+ .declare SRC_YW Base=r6 ElementSize=2 SrcRegion=REGION(8,1) Type=uw
+ .declare SRC_YB Base=r6 ElementSize=1 SrcRegion=REGION(16,1) Type=ub // 8 GRFs
+
+ #define SRC_MB_U_BASE 192 //6*GRFWIB // seperate thread from Y // Byte offset to r6
+ .declare SRC_UD Base=r6 ElementSize=4 SrcRegion=REGION(8,1) Type=ud // For read and write, 2 GRFs
+ .declare SRC_UW Base=r6 ElementSize=2 SrcRegion=REGION(16,1) Type=uw // For read and write, 4 GRFs
+ .declare SRC_UB Base=r6 ElementSize=1 SrcRegion=REGION(16,1) Type=ub // 2 GRFs
+
+ #define SRC_MB_V_BASE 193 // 6*GRFWIB+1 // NV12 // Byte offset to r6.1
+ .declare SRC_VD Base=r6.1 ElementSize=4 SrcRegion=REGION(8,1) Type=ud // For read and write, 2 GRFs
+ .declare SRC_VW Base=r6.1 ElementSize=2 SrcRegion=REGION(16,1) Type=uw // For read and write, 4 GRFs
+ .declare SRC_VB Base=r6.1 ElementSize=1 SrcRegion=REGION(16,1) Type=ub // 2 GRFs
+
+#else // No kernel specified, define nothing.
+
+.reg_count_total 64
+.reg_count_payload 2
+
+ #define SRCAOFF r1.0:ud // Offset into alpha data
+ #define SRCOFF r1.1:ud // Offset into source YUV data
+ #define ORIX r1.4 // :w, H. origin of the destination block in pel
+ #define ORIY r1.5 // :w, V. origin of the destination block in pel
+
+#endif
+
+// ----------- Message Payload Header fields------------
+//
+#define IDP r0.2:ud // Interface Descriptor Pointer
+#define BTP r0.4:ud // Binding Table Pointer
+
+// ----------- Common Message Descriptor ------------
+//
+#ifdef DEV_ILK
+#define GW_DCN // Should be enabled only for ILK-B0 and beyond
+#define MSG_GW 0x03 // Message Gateway
+#define MSG_GW_EOT 0x23 // Message Gateway plus EOT bit set (For ILK only)
+#define DAPREAD 0x04 // Data Port Read Extended Message Descriptor,
+#define DAPWRITE 0x05 // Data Port Write Extended Message Descriptor,
+#define URBWRITE 0x06 // URB
+#define TS 0x07 // Thread Spawner Extended Message Descriptor
+#define TS_EOT 0x27 // End of Thread Extended Message Descriptor
+
+#define EOTMSGDSC 0x02000000 // End of Thread Message Descriptor /w URB handle dereferenced (used by root kernel)
+#define CHILD_EOTMSGDSC 0x02000012 // End of Child Thread Message Descriptor w/o URB handle dereferenced
+
+// Data Port Message Descriptor
+#define DWBRMSGDSC_RC 0x02086000 // DWORD Block Read Message Descriptor, reading from render cache = 6.
+#define DWBRMSGDSC_RC_TF 0x02086600 // DWORD Block Read Message Descriptor, reading from render cache = 6.
+#define DWBRMSGDSC_RC_BF 0x02086700 // DWORD Block Read Message Descriptor, reading from render cache = 6.
+#define DWBRMSGDSC_SC 0x0208A000 // DWORD Block Read Message Descriptor, reading from sampler cache = A.
+#define DWBRMSGDSC_SC_TF 0x0208E600 // DWORD Block Read Message Descriptor, reading top field from field mode sampler cache.
+#define DWBRMSGDSC_SC_BF 0x0208E700 // DWORD Block Read Message Descriptor, reading bottom field from field mode sampler cache.
+
+#define ILDBRMSGDSC 0x02085800 // AVC ILDB Control Data Read Msg Desc on Bearlake-C
+
+#define DWBWMSGDSC 0x02082000 // DWORD Block Write Message Descriptor
+#define DWBWMSGDSC_WC 0x0218A000 // DWORD Block Write Message Descriptor + write commit
+
+// URB Message Descriptor
+#define URBWMSGDSC 0x02080000 // URB Write Message Descriptor
+
+// Thread Spawner Message Descriptor
+#define TSMSGDSC 0x02000001
+
+// Message Gateway Message Descriptors
+#define OGWMSGDSC 0x02000000 // OpenGateway Message Descriptor
+#define CGWMSGDSC 0x02000001 // CloseGateway Message Descriptor
+#define FWDMSGDSC 0x02000002 // ForwardMsg Message Descriptor
+#define NOTIFYMSG 0x00008000 // Send notification with ForwardMsg message
+
+#define RESP_LEN(len) 0x100000*len
+#define MSG_LEN(len) 0x2000000*len
+
+#else // Pre DEV_ILK
+
+#define MSG_GW
+#define MSG_GW_EOT
+#define DAPREAD
+#define DAPWRITE
+#define URBWRITE
+#define TS
+#define TS_EOT
+
+#define EOTMSGDSC 0x87100000 // End of Thread Message Descriptor /w URB handle dereferenced (used by root kernel)
+#define CHILD_EOTMSGDSC 0x87100012 // End of Child Thread Message Descriptor w/o URB handle dereferenced
+
+// Data Port Message Descriptor
+#define DWBRMSGDSC_RC 0x04106000 // DWORD Block Read Message Descriptor, reading from render cache = 6.
+#define DWBRMSGDSC_RC_TF 0x04106600 // DWORD Block Read Message Descriptor, reading from render cache = 6.
+#define DWBRMSGDSC_RC_BF 0x04106700 // DWORD Block Read Message Descriptor, reading from render cache = 6.
+#define DWBRMSGDSC_SC 0x0410A000 // DWORD Block Read Message Descriptor, reading from sampler cache = A.
+#define DWBRMSGDSC_SC_TF 0x0410A600 // DWORD Block Read Message Descriptor, reading top field from field mode sampler cache.
+#define DWBRMSGDSC_SC_BF 0x0410A700 // DWORD Block Read Message Descriptor, reading bottom field from field mode sampler cache.
+
+#define ILDBRMSGDSC 0x04105800 // AVC ILDB Control Data Read Msg Desc on Bearlake-C
+
+#define DWBWMSGDSC 0x05102000 // DWORD Block Write Message Descriptor
+#define DWBWMSGDSC_WC 0x0511A000 // DWORD Block Write Message Descriptor + write commit
+
+// URB Message Descriptor
+#define URBWMSGDSC 0x06100000 // URB Write Message Descriptor
+
+// Thread Spawner Message Descriptor
+#define TSMSGDSC 0x07100001
+
+// Message Gateway Message Descriptors
+#define OGWMSGDSC 0x03100000 // OpenGateway Message Descriptor
+#define CGWMSGDSC 0x03100001 // CloseGateway Message Descriptor
+#define FWDMSGDSC 0x03100002 // ForwardMsg Message Descriptor
+#define NOTIFYMSG 0x00008000 // Send notification with ForwardMsg message
+
+#define RESP_LEN(len) 0x10000*len
+#define MSG_LEN(len) 0x100000*len
+
+// bits 15 - 0 = 01 011 000 00000000 = 0101 1000 0000 0000 = 5800
+// Render cache, AVC loop rd,
+#endif // DEV_ILK
+
+// Enable frame/field selection in message descriptor
+#define ENMSGDSCFM 0x400 // Enable MSGDSC to select frame surface
+#define ENMSGDSCTF 0x600 // Enable MSGDSC to select top field surface
+#define ENMSGDSCBF 0x700 // Enable MSGDSC to select bottom field surface
+
+#define END_THREAD send (8) NULLREG MSGHDR r0:ud TS_EOT EOTMSGDSC
+#define END_CHILD_THREAD send (8) NULLREG MSGHDR r0:ud TS_EOT CHILD_EOTMSGDSC
+
+// ----------- Message related register ------------
+//
+#define MSGHDR m1 // Message Payload Header
+#define MSGHDRY m1 // Message Payload Header register for Y data
+#define MSGHDRU m2 // Message Payload Header register for U data
+#define MSGHDRV m3 // Message Payload Header register for V data
+
+#define MSGHDRC m1 // Message Payload Header register for CUR MB
+#define MSGHDRL m2 // Message Payload Header register for LEFT MB
+#define MSGHDRT m3 // Message Payload Header register for TOP MB
+
+#define MSGHDRYA m4 // Second Message Payload Header register for Y data
+#define MSGSRC r63 // Message source register
+#define MSGDSC a0.0:ud // Message Descriptor register (type DWORD)
+
+#define MH_ORI MSGSRC.0 // DWORD block R/W message header block offset
+#define MH_ORIX MSGSRC.0 // DWORD block R/W message header X offset
+#define MH_ORIY MSGSRC.1 // DWORD block R/W message header Y offset
+#define MH_SIZE MSGSRC.2 // DWORD block R/W message header block width & height
+
+
+// M2 - M9 for message data payload
+.declare MSGPAYLOADB Base=m2 ElementSize=1 SrcRegion=REGION(16,1) Type=ub
+.declare MSGPAYLOADW Base=m2 ElementSize=2 SrcRegion=REGION(16,1) Type=uw
+.declare MSGPAYLOADD Base=m2 ElementSize=4 SrcRegion=REGION(8,1) Type=ud
+.declare MSGPAYLOADF Base=m2 ElementSize=4 SrcRegion=REGION(8,1) Type=f
+
+// End of ILDB_header.inc
+
+#endif // !defined(__ILDB_HEADER__)
diff --git a/src/shaders/h264/ildb/Load_ILDB_Cntrl_Data.asm b/src/shaders/h264/ildb/Load_ILDB_Cntrl_Data.asm new file mode 100644 index 00000000..695ae4ec --- /dev/null +++ b/src/shaders/h264/ildb/Load_ILDB_Cntrl_Data.asm @@ -0,0 +1,80 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: load_ILDB_Cntrl_Data.asm
+//
+// This module loads AVC ILDB control data for one MB.
+//
+//----------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Source region in :ud
+// CNTRL_DATA_D: CNTRL_DATA_D Base=rxx ElementSize=4 SrcRegion=REGION(8,1) Type=ud // 8 GRFs
+//
+// Binding table index:
+// BI_CNTRL_DATA: Binding table index of control data surface
+//
+//----------------------------------------------------------------
+
+ // We need to get control data offset for the bottom MB in mbaff mode.
+ // That is, get f0.1=1 if MbaffFlag==1 && BotFieldFlag==1
+ and (1) CTemp1_W:uw BitFields:uw MbaffFlag+BotFieldFlag:uw // Mute all other bits
+
+ and.nz.f0.0 (1) null:w BitFields:w CntlDataExpFlag:w // Get CntlDataExpFlag
+
+ cmp.e.f0.1 (1) NULLREGW CTemp1_W:uw MbaffFlag+BotFieldFlag:uw // Check mbaff and bot flags
+
+ (f0.0) jmpi ILDB_LABEL(READ_BLC_CNTL_DATA)
+
+ // On Crestline, MB control data in memory occupy 64 DWs (expanded).
+// mov (1) MSGSRC.0<1>:ud 0:w { NoDDClr } // Block origin X
+// mov (1) MSGSRC.1<1>:ud CntrlDataOffsetY:ud { NoDDClr, NoDDChk } // Block origin Y
+// mov (1) MSGSRC.2<1>:ud 0x000F000F:ud { NoDDChk } // Block width and height (16x16=256 bytes)
+
+ mov (2) MSGSRC.0<1>:ud ORIX_CUR<2;2,1>:uw { NoDDClr } // Block origin X,Y
+ mov (1) MSGSRC.2<1>:ud 0x000F000F:ud { NoDDChk } // Block width and height (16x16=256 bytes)
+
+ (f0.1) add (1) MSGSRC.1:ud MSGSRC.1:ud 16:w // +16 to for bottom MB in a pair
+
+ send (8) CNTRL_DATA_D(0)<1> MSGHDRY MSGSRC<8;8,1>:ud DAPREAD DWBRMSGDSC_SC+0x00080000+BI_CNTRL_DATA // Receive 8 GRFs
+ jmpi ILDB_LABEL(READ_CNTL_DATA_DONE)
+
+
+ILDB_LABEL(READ_BLC_CNTL_DATA):
+ // On Bearlake-C, MB control data in memory occupy 16 DWs. Data port returns 8 GRFs with expanded control data.
+
+ // Global offset
+ mov (1) MSGSRC.2:ud CntrlDataOffsetY:ud // CntrlDataOffsetY is the global offset
+
+ (f0.1) add (1) MSGSRC.2:ud MSGSRC.2:ud 64:w // +64 to the next MB control data (bot MB)
+
+ send (8) CNTRL_DATA_D(0)<1> MSGHDRY MSGSRC<8;8,1>:ud DAPREAD RESP_LEN(8)+ILDBRMSGDSC+BI_CNTRL_DATA // Receive 8 GRFs
+
+ILDB_LABEL(READ_CNTL_DATA_DONE):
+
+// End of load_ILDB_Cntrl_Data.asm
+
+
+
+
+// AVC ILDB control data message header format
+
+//DWord Bit Description
+//M0.7 31:0 Debug
+//M0.6 31:0 Debug
+//M0.5 31:8 Ignored
+// 7:0 Dispatch ID. // This ID is assigned by the fixed function unit and is a unique identifier for the thread. It is used to free up resources used by the thread upon thread completion.
+//M0.4 31:0 Ignored
+//M0.3 31:0 Ignored
+//M0.2 31:0 Global Offset. Specifies the global byte offset into the buffer.
+ // This offset must be OWord aligned (bits 3:0 MBZ) Format = U32 Range = [0,FFFFFFF0h]
+//M0.1 31:0 Ignored
+//M0.0 31:0 Ignored
+
+
+
diff --git a/src/shaders/h264/ildb/Load_ILDB_Cntrl_Data_16DW.asm b/src/shaders/h264/ildb/Load_ILDB_Cntrl_Data_16DW.asm new file mode 100644 index 00000000..4c91a293 --- /dev/null +++ b/src/shaders/h264/ildb/Load_ILDB_Cntrl_Data_16DW.asm @@ -0,0 +1,62 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: load_ILDB_Cntrl_Data_16DW.asm
+//
+// This module loads AVC ILDB 64DW control data for one MB CTG.
+// Dataport expands from 16DW to 64DW.
+//
+//----------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Source region in :ud
+// CNTRL_DATA_D: CNTRL_DATA_D Base=rxx ElementSize=4 SrcRegion=REGION(8,1) Type=ud // 8 GRFs
+//
+// Binding table index:
+// BI_CNTRL_DATA: Binding table index of control data surface
+//
+//----------------------------------------------------------------
+
+// On CTG, MB control data in memory occupy 16 DWs. Data port returns 8 GRFs with expanded control data.
+
+#if defined(_MBAFF)
+ // We need to get control data offset for the bottom MB in mbaff mode.
+ // That is, get f0.1=1 if MbaffFlag==1 && BotFieldFlag==1
+// and (1) CTemp1_W:uw BitFields:uw MbaffFlag+BotFieldFlag:uw // Mute all other bits
+// cmp.e.f0.1 (1) NULLREGW CTemp1_W:uw MbaffFlag+BotFieldFlag:uw // Check mbaff and bot flags
+
+ and.ne.f0.1 (1) NULLREGW BitFields:uw BotFieldFlag:uw
+
+ // Global offset
+ mov (1) MSGSRC.2:ud CntrlDataOffsetY:ud
+
+ (f0.1) add (1) MSGSRC.2:ud MSGSRC.2:ud 64:w // +64 to the next MB control data (bot MB)
+#endif
+
+ send (8) CNTRL_DATA_D(0)<1> MSGHDRY MSGSRC<8;8,1>:ud DAPREAD RESP_LEN(8)+ILDBRMSGDSC+BI_CNTRL_DATA // Receive 8 GRFs
+
+// End of load_ILDB_Cntrl_Data_16DW.asm
+
+
+
+// AVC ILDB control data message header format
+
+//DWord Bit Description
+//M0.7 31:0 Debug
+//M0.6 31:0 Debug
+//M0.5 31:8 Ignored
+// 7:0 Dispatch ID. // This ID is assigned by the fixed function unit and is a unique identifier for the thread. It is used to free up resources used by the thread upon thread completion.
+//M0.4 31:0 Ignored
+//M0.3 31:0 Ignored
+//M0.2 31:0 Global Offset. Specifies the global byte offset into the buffer.
+ // This offset must be OWord aligned (bits 3:0 MBZ) Format = U32 Range = [0,FFFFFFF0h]
+//M0.1 31:0 Ignored
+//M0.0 31:0 Ignored
+
+
+
diff --git a/src/shaders/h264/ildb/Load_ILDB_Cntrl_Data_22DW.asm b/src/shaders/h264/ildb/Load_ILDB_Cntrl_Data_22DW.asm new file mode 100644 index 00000000..19e9a20b --- /dev/null +++ b/src/shaders/h264/ildb/Load_ILDB_Cntrl_Data_22DW.asm @@ -0,0 +1,36 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: load_ILDB_Cntrl_Data_22DW.asm
+//
+// ********** Apple only module **********
+//
+// This module loads AVC ILDB 22DW control data for one MB for CLN.
+// The reduced control data set is for progressive picture ONLY.
+//
+// Control data memory layout for each MB is 8x11 = 88 bytes.
+// It ocuppies 3 GRFs after reading in.
+//
+//----------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Source region in :ud
+// CNTRL_DATA_D: CNTRL_DATA_D Base=rxx ElementSize=4 SrcRegion=REGION(8,1) Type=ud // 3 GRFs
+//
+// Binding table index:
+// BI_CNTRL_DATA: Binding table index of control data surface
+//
+//----------------------------------------------------------------
+
+ mul (1) MSGSRC.0<1>:ud ORIX:uw 8:uw { NoDDClr } // Block origin X
+ mul (1) MSGSRC.1<1>:ud ORIY:uw 11:uw { NoDDClr, NoDDChk } // Block origin Y
+ mov (1) MSGSRC.2<1>:ud 0x000A0007:ud { NoDDChk } // Block width and height (8x11=88 bytes)
+
+ send (8) CNTRL_DATA_D(0)<1> MSGHDRY MSGSRC<8;8,1>:ud DAPREAD RESP_LEN(3)+DWBRMSGDSC_SC+BI_CNTRL_DATA // Receive 3 GRFs
+
+// End of load_ILDB_Cntrl_Data_22DW.asm
diff --git a/src/shaders/h264/ildb/Load_ILDB_Cntrl_Data_64DW.asm b/src/shaders/h264/ildb/Load_ILDB_Cntrl_Data_64DW.asm new file mode 100644 index 00000000..b026afb0 --- /dev/null +++ b/src/shaders/h264/ildb/Load_ILDB_Cntrl_Data_64DW.asm @@ -0,0 +1,42 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: load_ILDB_Cntrl_Data_64DW.asm
+//
+// This module loads AVC ILDB 64DW control data for one MB for CLN.
+//
+//----------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Source region in :ud
+// CNTRL_DATA_D: CNTRL_DATA_D Base=rxx ElementSize=4 SrcRegion=REGION(8,1) Type=ud // 8 GRFs
+//
+// Binding table index:
+// BI_CNTRL_DATA: Binding table index of control data surface
+//
+//----------------------------------------------------------------
+
+// On CLN, MB control data in memory occupy 64 DWs.
+
+#if defined(_MBAFF)
+ // We need to get control data offset for the bottom MB in mbaff mode.
+ // That is, set f0.1=1 if MbaffFlag==1 && BotFieldFlag==1
+ and (1) acc0.0:uw BitFields:uw MbaffFlag+BotFieldFlag:uw // Mute all other bits
+ cmp.e.f0.1 (1) NULLREGW acc0.0:uw MbaffFlag+BotFieldFlag:uw // Check mbaff and bot flags
+#endif // CTemp1_W
+
+ mov (2) MSGSRC.0<1>:ud ORIX_CUR<2;2,1>:uw { NoDDClr } // Block origin X,Y
+ mov (1) MSGSRC.2<1>:ud 0x000F000F:ud { NoDDChk } // Block width and height (16x16=256 bytes)
+
+#if defined(_MBAFF)
+ (f0.1) add (1) MSGSRC.1:ud MSGSRC.1:ud 16:w // +16 to the bottom MB control data (bot MB)
+#endif
+
+ send (8) CNTRL_DATA_D(0)<1> MSGHDRY MSGSRC<8;8,1>:ud DAPREAD RESP_LEN(8)+DWBRMSGDSC_SC+BI_CNTRL_DATA // Receive 8 GRFs
+
+// End of load_ILDB_Cntrl_Data_64DW.asm
diff --git a/src/shaders/h264/ildb/Makefile.am b/src/shaders/h264/ildb/Makefile.am new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/src/shaders/h264/ildb/Makefile.am diff --git a/src/shaders/h264/ildb/Root_Undefs.inc b/src/shaders/h264/ildb/Root_Undefs.inc new file mode 100644 index 00000000..c0ee0169 --- /dev/null +++ b/src/shaders/h264/ildb/Root_Undefs.inc @@ -0,0 +1,27 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Modual name: Root_Undefs.inc
+//
+// Undefine global symbols for new process in root thread
+//
+
+#undef READ_BI
+#undef WRITE_BI
+
+#undef ILDB_H_INDEPENDENT
+#undef ILDB_H_INDEPENDENT_CONT
+#undef ILDB_H_DEPENDENT
+#undef ILDB_H_DEPENDENT_SCAN
+#undef ILDB_H_NO_DEPENDENT
+
+#undef ILDB_V_INDEPENDENT
+#undef ILDB_V_INDEPENDENT_CONT
+#undef ILDB_V_DEPENDENT
+#undef ILDB_V_DEPENDENT_SCAN
+#undef ILDB_V_NO_DEPENDENT
diff --git a/src/shaders/h264/ildb/SetupVPKernel.asm b/src/shaders/h264/ildb/SetupVPKernel.asm new file mode 100644 index 00000000..c7d96348 --- /dev/null +++ b/src/shaders/h264/ildb/SetupVPKernel.asm @@ -0,0 +1,24 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Modual name: SetupVPKernel.asm
+//
+// Initial setup for running video-processing kernels
+//
+
+#include "ILDB_header.inc"
+
+//
+// Now, begin source code....
+//
+
+.code
+
+ mov (8) MSGSRC.0<1>:ud r0.0<8;8,1>:ud // Initialize message payload header with R0
+
+// End of SetupVPKernel
diff --git a/src/shaders/h264/ildb/TransposeNV12_16x16.asm b/src/shaders/h264/ildb/TransposeNV12_16x16.asm new file mode 100644 index 00000000..192a89fd --- /dev/null +++ b/src/shaders/h264/ildb/TransposeNV12_16x16.asm @@ -0,0 +1,135 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+//////////////////////////////////////////////////////////////////////////////////////////
+// Module name: TransposeNV12_16x16.asm
+//
+// Transpose a 16x16 NV12 MB. The output is also in NV12
+//
+//----------------------------------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Source region is :ub
+// SRC_YB: SRC_YB Base=rxx ElementSize=1 SrcRegion=REGION(16,1) Type=ub // 8 GRFs
+// SRC_UW: SRC_UW Base=rxx ElementSize=2 SrcRegion=REGION(8,1) Type=uw // 4 GRFs
+//
+// Temp buffer:
+// BUF_B: BUF_B Base=rxx ElementSize=1 SrcRegion=REGION(16,1) Type=ub // 8 GRFs
+// BUF_W: BUF_W Base=rxx ElementSize=2 SrcRegion=REGION(8,1) Type=uw // 4 GRFs
+//
+//////////////////////////////////////////////////////////////////////////////////////////
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDDA:w
+#endif
+
+
+// Transpose Y (16x16 bytes)
+
+// The first step
+mov (16) BUF_B(0,0)<1> SRC_YB(0,0)<16;4,1>
+mov (16) BUF_B(0,16)<1> SRC_YB(2,0)<16;4,1>
+mov (16) BUF_B(1,0)<1> SRC_YB(4,0)<16;4,1>
+mov (16) BUF_B(1,16)<1> SRC_YB(6,0)<16;4,1>
+
+mov (16) BUF_B(2,0)<1> SRC_YB(0,4)<16;4,1>
+mov (16) BUF_B(2,16)<1> SRC_YB(2,4)<16;4,1>
+mov (16) BUF_B(3,0)<1> SRC_YB(4,4)<16;4,1>
+mov (16) BUF_B(3,16)<1> SRC_YB(6,4)<16;4,1>
+
+mov (16) BUF_B(4,0)<1> SRC_YB(0,8)<16;4,1>
+mov (16) BUF_B(4,16)<1> SRC_YB(2,8)<16;4,1>
+mov (16) BUF_B(5,0)<1> SRC_YB(4,8)<16;4,1>
+mov (16) BUF_B(5,16)<1> SRC_YB(6,8)<16;4,1>
+
+mov (16) BUF_B(6,0)<1> SRC_YB(0,12)<16;4,1>
+mov (16) BUF_B(6,16)<1> SRC_YB(2,12)<16;4,1>
+mov (16) BUF_B(7,0)<1> SRC_YB(4,12)<16;4,1>
+mov (16) BUF_B(7,16)<1> SRC_YB(6,12)<16;4,1>
+
+// The second step
+mov (16) SRC_YB(0,0)<1> BUF_B(0,0)<32;8,4>
+mov (16) SRC_YB(0,16)<1> BUF_B(0,1)<32;8,4>
+mov (16) SRC_YB(1,0)<1> BUF_B(0,2)<32;8,4>
+mov (16) SRC_YB(1,16)<1> BUF_B(0,3)<32;8,4>
+
+mov (16) SRC_YB(2,0)<1> BUF_B(2,0)<32;8,4>
+mov (16) SRC_YB(2,16)<1> BUF_B(2,1)<32;8,4>
+mov (16) SRC_YB(3,0)<1> BUF_B(2,2)<32;8,4>
+mov (16) SRC_YB(3,16)<1> BUF_B(2,3)<32;8,4>
+
+mov (16) SRC_YB(4,0)<1> BUF_B(4,0)<32;8,4>
+mov (16) SRC_YB(4,16)<1> BUF_B(4,1)<32;8,4>
+mov (16) SRC_YB(5,0)<1> BUF_B(4,2)<32;8,4>
+mov (16) SRC_YB(5,16)<1> BUF_B(4,3)<32;8,4>
+
+mov (16) SRC_YB(6,0)<1> BUF_B(6,0)<32;8,4>
+mov (16) SRC_YB(6,16)<1> BUF_B(6,1)<32;8,4>
+mov (16) SRC_YB(7,0)<1> BUF_B(6,2)<32;8,4>
+mov (16) SRC_YB(7,16)<1> BUF_B(6,3)<32;8,4>
+
+// Y is transposed.
+
+
+//////////////////////////////////////////////////////////////////////////////////////////////////////////
+
+// Src U and V are mixed in NV12 format. U on even bytes, V on odd bytes.
+// Transpose by treating UV pair as a word.
+
+
+// Src U 8x8 and V 8x8 are mixed. (each pix is specified as yx)
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |17 17 16 16 15 15 14 14 13 13 12 12 11 11 10 10 07 07 06 06 05 05 04 04 03 03 02 02 01 01 00 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |37 37 36 36 35 35 34 34 33 33 32 32 31 31 30 30 27 27 26 26 25 25 24 24 23 23 22 22 21 21 20 20|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |57 57 56 56 55 55 54 54 53 53 52 52 51 51 50 50 47 47 46 46 45 45 44 44 43 43 42 42 41 41 40 40|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |77 77 76 76 75 75 74 74 73 73 72 72 71 71 70 70 67 67 66 66 65 65 64 64 63 63 62 62 61 61 60 60|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+
+// First step (16) <1>:w <==== <8;4,1>:w
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |33 33 32 32 31 31 30 30 23 23 22 22 21 21 20 20 13 13 12 12 11 11 10 10 03 03 02 02 01 01 00 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |73 73 72 72 71 71 70 70 63 63 62 62 61 61 60 60 53 53 52 52 51 51 50 50 43 43 42 42 41 41 40 40|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |37 37 36 36 35 35 34 34 27 27 26 26 25 25 24 24 17 17 16 16 15 15 14 14 07 07 06 06 05 05 04 04|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |77 77 76 76 75 75 74 74 67 67 66 66 65 65 64 64 57 57 56 56 55 55 54 54 47 47 46 46 45 45 44 44|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+//
+// Transpose UV (8x8 words), The first step
+mov (16) BUF_W(0,0)<1> SRC_UW(0,0)<8;4,1>
+mov (16) BUF_W(1,0)<1> SRC_UW(2,0)<8;4,1>
+mov (16) BUF_W(2,0)<1> SRC_UW(0,4)<8;4,1>
+mov (16) BUF_W(3,0)<1> SRC_UW(2,4)<8;4,1>
+
+
+// Second step (16) <1>:w <=== <16;4,4>:w
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |71 71 61 61 51 51 41 41 31 31 21 21 11 11 01 01 70 70 60 60 50 50 40 40 30 30 20 20 10 10 00 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |73 73 63 63 53 53 43 43 33 33 23 23 13 13 03 03 72 72 62 62 52 52 42 42 32 32 22 22 12 12 02 02|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |75 75 65 65 55 55 45 45 35 35 25 25 15 15 05 05 74 74 64 64 54 54 44 44 34 34 24 24 14 14 04 04|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |77 77 67 67 57 57 47 47 37 37 27 27 17 17 07 07 76 76 66 66 56 56 46 46 36 36 26 26 16 16 06 06|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+//
+// Transpose UV (8x8 words), The second step
+mov (8) SRC_UW(0,0)<1> BUF_W(0,0)<16;4,4>
+mov (8) SRC_UW(0,8)<1> BUF_W(0,1)<16;4,4>
+mov (8) SRC_UW(1,0)<1> BUF_W(0,2)<16;4,4>
+mov (8) SRC_UW(1,8)<1> BUF_W(0,3)<16;4,4>
+mov (8) SRC_UW(2,0)<1> BUF_W(2,0)<16;4,4>
+mov (8) SRC_UW(2,8)<1> BUF_W(2,1)<16;4,4>
+mov (8) SRC_UW(3,0)<1> BUF_W(2,2)<16;4,4>
+mov (8) SRC_UW(3,8)<1> BUF_W(2,3)<16;4,4>
+
+// U and V are now transposed and separated.
diff --git a/src/shaders/h264/ildb/TransposeNV12_4x16.asm b/src/shaders/h264/ildb/TransposeNV12_4x16.asm new file mode 100644 index 00000000..cb1dcbcd --- /dev/null +++ b/src/shaders/h264/ildb/TransposeNV12_4x16.asm @@ -0,0 +1,94 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+//////////////////////////////////////////////////////////////////////////////////////////
+// Module name: TransposeNV12_4x16.asm
+//
+// Transpose a 4x16 internal planar to 16x4 internal planar block
+//
+//----------------------------------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Source region is :ub
+// SRC_YB: SRC_YB Base=rxx ElementSize=1 SrcRegion=REGION(16,1) Type=ub // 8 GRFs
+// SRC_UW: SRC_UB Base=rxx ElementSize=2 SrcRegion=REGION(8,1) Type=uw // 4 GRFs
+//
+// Temp buffer:
+// BUF_B: BUF_B Base=rxx ElementSize=1 SrcRegion=REGION(16,1) Type=ub // 8 GRFs
+// BUF_W: BUF_W Base=rxx ElementSize=2 SrcRegion=REGION(8,1) Type=uw // 4 GRFs
+//
+//////////////////////////////////////////////////////////////////////////////////////////
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDDB:w
+#endif
+
+// Transpose Y (4x16) right most 4 columns
+
+// The first step
+mov (16) BUF_B(0,0)<1> SRC_YB(0,0)<16;4,1> // Read 2 rows, write 1 row
+mov (16) BUF_B(0,16)<1> SRC_YB(2,0)<16;4,1>
+mov (16) BUF_B(1,0)<1> SRC_YB(4,0)<16;4,1>
+mov (16) BUF_B(1,16)<1> SRC_YB(6,0)<16;4,1>
+
+// The second step
+mov (16) BUF_B(2,0)<1> BUF_B(0,0)<32;8,4> // Read 2 rows, write 1 row
+mov (16) BUF_B(2,16)<1> BUF_B(0,1)<32;8,4>
+mov (16) BUF_B(3,0)<1> BUF_B(0,2)<32;8,4>
+mov (16) BUF_B(3,16)<1> BUF_B(0,3)<32;8,4>
+
+// Y is now transposed. the result is in BUF_B(2) and BUF_B(3).
+
+
+
+// Transpose UV (4x8), right most 2 columns in word
+// Use BUF_W(0) as temp buf
+
+// Src U 8x8 and V 8x8 are mixed. (each pix is specified as yx)
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |17 17 16 16 15 15 14 14 13 13 12 12 11 11 10 10 07 07 06 06 05 05 04 04 03 03 02 02 01 01 00 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |37 37 36 36 35 35 34 34 33 33 32 32 31 31 30 30 27 27 26 26 25 25 24 24 23 23 22 22 21 21 20 20|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |57 57 56 56 55 55 54 54 53 53 52 52 51 51 50 50 47 47 46 46 45 45 44 44 43 43 42 42 41 41 40 40|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |77 77 76 76 75 75 74 74 73 73 72 72 71 71 70 70 67 67 66 66 65 65 64 64 63 63 62 62 61 61 60 60|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+
+// First step (8) <1>:w <==== <8;2,1>:w
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |71 71 70 70 61 61 60 60 51 51 50 50 41 41 40 40 31 31 30 30 21 21 20 20 11 11 10 10 01 01 00 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+mov (8) BUF_W(0,0)<1> SRC_UW(0,0)<8;2,1>
+mov (8) BUF_W(0,8)<1> SRC_UW(2,0)<8;2,1>
+
+// Second step (16) <1>:w <==== <1;8,2>:w
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |71 71 61 61 51 51 41 41 31 31 21 21 11 11 01 01 70 70 60 60 50 50 40 40 30 30 20 20 10 10 00 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+mov (16) BUF_W(1,0)<1> BUF_W(0,0)<1;8,2>
+
+// UV are now transposed. the result is in BUF_W(1).
+
+
+
+//The first step
+//mov (16) BUF_B(0,0)<1> SRC_UW(0,0)<8;2,1> // Read 2 rows, write 1 row
+// The second step
+//mov (8) SRC_UB(4,0)<1> BUF_B(0,0)<16;8,2> // Read 1 row, write 1 row
+//mov (8) SRC_UB(4,8)<1> BUF_B(0,1)<16;8,2> // Read 1 row, write 1 row
+
+// Transpose V (8x8), right most 2 columns
+// The first step
+//mov (16) BUF_B(0,0)<1> SRC_VB(0,1)<8;2,1> // Read 2 rows, write 1 row
+// The second step
+//mov (8) SRC_UB(4,16)<1> BUF_B(0,0)<16;8,2> // Read 1 row, write 1 row
+//mov (8) SRC_UB(4,24)<1> BUF_B(0,1)<16;8,2> // Read 1 row, write 1 row
+
+// U and V are now transposed. the result is in BUF_B(4).
+
diff --git a/src/shaders/h264/ildb/Transpose_Cur_UV_2x8.asm b/src/shaders/h264/ildb/Transpose_Cur_UV_2x8.asm new file mode 100644 index 00000000..967e5877 --- /dev/null +++ b/src/shaders/h264/ildb/Transpose_Cur_UV_2x8.asm @@ -0,0 +1,56 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+//////////////////////////////////////////////////////////////////////////////////////////
+// Module name: Transpose_UV_2x8.asm
+//
+// Transpose UV 2x8 to 8x2 block (2x8U + 2x8V in NV12)
+//
+//----------------------------------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Source region is :ub
+// SRC_UW: SRC_UB Base=rxx ElementSize=2 SrcRegion=REGION(8,1) Type=uw // 4 GRFs
+//
+// Temp buffer:
+// BUF_W: BUF_W Base=rxx ElementSize=2 SrcRegion=REGION(8,1) Type=uw // 4 GRFs
+//
+//////////////////////////////////////////////////////////////////////////////////////////
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDDB:w
+#endif
+
+// Transpose UV (4x8), right most 2 columns in word
+// Use BUF_W(0) as temp buf
+
+// Src U 8x8 and V 8x8 are mixed. (each pix is specified as yx)
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |17 17 16 16 15 15 14 14 13 13 12 12 11 11 10 10 07 07 06 06 05 05 04 04 03 03 02 02 01 01 00 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |37 37 36 36 35 35 34 34 33 33 32 32 31 31 30 30 27 27 26 26 25 25 24 24 23 23 22 22 21 21 20 20|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |57 57 56 56 55 55 54 54 53 53 52 52 51 51 50 50 47 47 46 46 45 45 44 44 43 43 42 42 41 41 40 40|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |77 77 76 76 75 75 74 74 73 73 72 72 71 71 70 70 67 67 66 66 65 65 64 64 63 63 62 62 61 61 60 60|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+
+// First step (8) <1>:w <==== <8;2,1>:w
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |77 77 76 76 67 67 66 66 57 57 56 56 47 47 46 46 37 37 36 36 27 27 26 26 17 17 16 16 07 07 06 06|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+mov (8) LEFT_TEMP_W(0,0)<1> SRC_UW(0,6)<8;2,1> { NoDDClr }
+mov (8) LEFT_TEMP_W(0,8)<1> SRC_UW(2,6)<8;2,1> { NoDDChk }
+
+// Second step (16) <1>:w <==== <1;8,2>:w
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |77 77 67 67 57 57 47 47 37 37 27 27 17 17 07 07 76 76 66 66 56 56 46 46 36 36 26 26 16 16 06 06|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+mov (16) LEFT_TEMP_W(1,0)<1> LEFT_TEMP_W(0,0)<1;8,2>
+
+// UV are now transposed. the result is in BUF_W(1)
diff --git a/src/shaders/h264/ildb/Transpose_Cur_UV_8x8.asm b/src/shaders/h264/ildb/Transpose_Cur_UV_8x8.asm new file mode 100644 index 00000000..dbb7e656 --- /dev/null +++ b/src/shaders/h264/ildb/Transpose_Cur_UV_8x8.asm @@ -0,0 +1,85 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+//////////////////////////////////////////////////////////////////////////////////////////
+// Module name: Transpose_UV_8x8.asm
+//
+// Transpose a 8x8 UV block. (8x8U + 8x8V) The output is also in NV12
+//
+//----------------------------------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Source region is :ub
+// SRC_UW: SRC_UW Base=rxx ElementSize=2 SrcRegion=REGION(8,1) Type=uw // 4 GRFs
+//
+// Temp buffer:
+// BUF_W: BUF_W Base=rxx ElementSize=2 SrcRegion=REGION(8,1) Type=uw // 4 GRFs
+//
+//////////////////////////////////////////////////////////////////////////////////////////
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDDA:w
+#endif
+
+//////////////////////////////////////////////////////////////////////////////////////////////////////////
+
+// Src U and V are mixed in NV12 format. U on even bytes, V on odd bytes.
+// Transpose by treating UV pair as a word.
+
+
+// Src U 8x8 and V 8x8 are mixed. (each pix is specified as yx)
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |17 17 16 16 15 15 14 14 13 13 12 12 11 11 10 10 07 07 06 06 05 05 04 04 03 03 02 02 01 01 00 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |37 37 36 36 35 35 34 34 33 33 32 32 31 31 30 30 27 27 26 26 25 25 24 24 23 23 22 22 21 21 20 20|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |57 57 56 56 55 55 54 54 53 53 52 52 51 51 50 50 47 47 46 46 45 45 44 44 43 43 42 42 41 41 40 40|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |77 77 76 76 75 75 74 74 73 73 72 72 71 71 70 70 67 67 66 66 65 65 64 64 63 63 62 62 61 61 60 60|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+
+// First step (16) <1>:w <==== <8;4,1>:w
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |33 33 32 32 31 31 30 30 23 23 22 22 21 21 20 20 13 13 12 12 11 11 10 10 03 03 02 02 01 01 00 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |73 73 72 72 71 71 70 70 63 63 62 62 61 61 60 60 53 53 52 52 51 51 50 50 43 43 42 42 41 41 40 40|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |37 37 36 36 35 35 34 34 27 27 26 26 25 25 24 24 17 17 16 16 15 15 14 14 07 07 06 06 05 05 04 04|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |77 77 76 76 75 75 74 74 67 67 66 66 65 65 64 64 57 57 56 56 55 55 54 54 47 47 46 46 45 45 44 44|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+//
+// Transpose UV (8x8 words), The first step
+mov (16) CUR_TEMP_W(0,0)<1> SRC_UW(0,0)<8;4,1>
+mov (16) CUR_TEMP_W(1,0)<1> SRC_UW(2,0)<8;4,1>
+mov (16) CUR_TEMP_W(2,0)<1> SRC_UW(0,4)<8;4,1>
+mov (16) CUR_TEMP_W(3,0)<1> SRC_UW(2,4)<8;4,1>
+
+
+// Second step (16) <1>:w <=== <16;4,4>:w
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |71 71 61 61 51 51 41 41 31 31 21 21 11 11 01 01 70 70 60 60 50 50 40 40 30 30 20 20 10 10 00 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |73 73 63 63 53 53 43 43 33 33 23 23 13 13 03 03 72 72 62 62 52 52 42 42 32 32 22 22 12 12 02 02|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |75 75 65 65 55 55 45 45 35 35 25 25 15 15 05 05 74 74 64 64 54 54 44 44 34 34 24 24 14 14 04 04|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |77 77 67 67 57 57 47 47 37 37 27 27 17 17 07 07 76 76 66 66 56 56 46 46 36 36 26 26 16 16 06 06|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+//
+// Transpose UV (8x8 words), The second step
+mov (8) SRC_UW(0,0)<1> CUR_TEMP_W(0,0)<16;4,4> { NoDDClr }
+mov (8) SRC_UW(0,8)<1> CUR_TEMP_W(0,1)<16;4,4> { NoDDChk }
+mov (8) SRC_UW(1,0)<1> CUR_TEMP_W(0,2)<16;4,4> { NoDDClr }
+mov (8) SRC_UW(1,8)<1> CUR_TEMP_W(0,3)<16;4,4> { NoDDChk }
+mov (8) SRC_UW(2,0)<1> CUR_TEMP_W(2,0)<16;4,4> { NoDDClr }
+mov (8) SRC_UW(2,8)<1> CUR_TEMP_W(2,1)<16;4,4> { NoDDChk }
+mov (8) SRC_UW(3,0)<1> CUR_TEMP_W(2,2)<16;4,4> { NoDDClr }
+mov (8) SRC_UW(3,8)<1> CUR_TEMP_W(2,3)<16;4,4> { NoDDChk }
+
+// U and V are now transposed and separated.
diff --git a/src/shaders/h264/ildb/Transpose_Cur_UV_Right_Most_2x8.asm b/src/shaders/h264/ildb/Transpose_Cur_UV_Right_Most_2x8.asm new file mode 100644 index 00000000..be7febab --- /dev/null +++ b/src/shaders/h264/ildb/Transpose_Cur_UV_Right_Most_2x8.asm @@ -0,0 +1,25 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Transpose Cur MB Right Most 2x8 to 8x2
+// Assume source is LEFT_TEMP_W(0), and detination is LEFT_TEMP_W(1)
+
+// Input from dport for transpose:
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |71 71 70 70 61 61 60 60 51 51 50 50 41 41 40 40 31 31 30 30 21 21 20 20 11 11 10 10 01 01 00 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+//
+// Output of transpose: <1> <=== <16;8,2>:w
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |71 71 61 61 51 51 41 41 31 31 21 21 11 11 01 01 70 70 60 60 50 50 40 40 30 30 20 20 10 10 00 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+
+// mov (8) LEFT_TEMP_W(1,0)<1> LEFT_TEMP_W(0,0)<16;8,2> { NoDDClr }
+// mov (8) LEFT_TEMP_W(1,8)<1> LEFT_TEMP_W(0,1)<16;8,2> { NoDDChk }
+
+ mov (16) LEFT_TEMP_W(1,0)<1> LEFT_TEMP_W(0,0)<1;8,2>
diff --git a/src/shaders/h264/ildb/Transpose_Cur_Y_16x16.asm b/src/shaders/h264/ildb/Transpose_Cur_Y_16x16.asm new file mode 100644 index 00000000..8c20f74e --- /dev/null +++ b/src/shaders/h264/ildb/Transpose_Cur_Y_16x16.asm @@ -0,0 +1,74 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+//////////////////////////////////////////////////////////////////////////////////////////
+// Module name: Transpose_Y_16x16.asm
+//
+// Transpose Y 16x16 block.
+//
+//----------------------------------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Source region is :ub
+// SRC_YB: SRC_YB Base=rxx ElementSize=1 SrcRegion=REGION(16,1) Type=ub // 8 GRFs
+//
+// Temp buffer:
+// CUR_TEMP_B: BUF_B Base=rxx ElementSize=1 SrcRegion=REGION(16,1) Type=ub // 8 GRFs
+//
+//////////////////////////////////////////////////////////////////////////////////////////
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDDA:w
+#endif
+
+
+// Transpose Y (16x16 bytes)
+
+// The first step
+mov (16) CUR_TEMP_B(0,0)<1> SRC_YB(0,0)<16;4,1> { NoDDClr }
+mov (16) CUR_TEMP_B(0,16)<1> SRC_YB(2,0)<16;4,1> { NoDDChk }
+mov (16) CUR_TEMP_B(1,0)<1> SRC_YB(4,0)<16;4,1> { NoDDClr }
+mov (16) CUR_TEMP_B(1,16)<1> SRC_YB(6,0)<16;4,1> { NoDDChk }
+
+mov (16) CUR_TEMP_B(2,0)<1> SRC_YB(0,4)<16;4,1> { NoDDClr }
+mov (16) CUR_TEMP_B(2,16)<1> SRC_YB(2,4)<16;4,1> { NoDDChk }
+mov (16) CUR_TEMP_B(3,0)<1> SRC_YB(4,4)<16;4,1> { NoDDClr }
+mov (16) CUR_TEMP_B(3,16)<1> SRC_YB(6,4)<16;4,1> { NoDDChk }
+
+mov (16) CUR_TEMP_B(4,0)<1> SRC_YB(0,8)<16;4,1> { NoDDClr }
+mov (16) CUR_TEMP_B(4,16)<1> SRC_YB(2,8)<16;4,1> { NoDDChk }
+mov (16) CUR_TEMP_B(5,0)<1> SRC_YB(4,8)<16;4,1> { NoDDClr }
+mov (16) CUR_TEMP_B(5,16)<1> SRC_YB(6,8)<16;4,1> { NoDDChk }
+
+mov (16) CUR_TEMP_B(6,0)<1> SRC_YB(0,12)<16;4,1> { NoDDClr }
+mov (16) CUR_TEMP_B(6,16)<1> SRC_YB(2,12)<16;4,1> { NoDDChk }
+mov (16) CUR_TEMP_B(7,0)<1> SRC_YB(4,12)<16;4,1> { NoDDClr }
+mov (16) CUR_TEMP_B(7,16)<1> SRC_YB(6,12)<16;4,1> { NoDDChk }
+
+// The second step
+mov (16) SRC_YB(0,0)<1> CUR_TEMP_B(0,0)<32;8,4> { NoDDClr }
+mov (16) SRC_YB(0,16)<1> CUR_TEMP_B(0,1)<32;8,4> { NoDDChk }
+mov (16) SRC_YB(1,0)<1> CUR_TEMP_B(0,2)<32;8,4> { NoDDClr }
+mov (16) SRC_YB(1,16)<1> CUR_TEMP_B(0,3)<32;8,4> { NoDDChk }
+
+mov (16) SRC_YB(2,0)<1> CUR_TEMP_B(2,0)<32;8,4> { NoDDClr }
+mov (16) SRC_YB(2,16)<1> CUR_TEMP_B(2,1)<32;8,4> { NoDDChk }
+mov (16) SRC_YB(3,0)<1> CUR_TEMP_B(2,2)<32;8,4> { NoDDClr }
+mov (16) SRC_YB(3,16)<1> CUR_TEMP_B(2,3)<32;8,4> { NoDDChk }
+
+mov (16) SRC_YB(4,0)<1> CUR_TEMP_B(4,0)<32;8,4> { NoDDClr }
+mov (16) SRC_YB(4,16)<1> CUR_TEMP_B(4,1)<32;8,4> { NoDDChk }
+mov (16) SRC_YB(5,0)<1> CUR_TEMP_B(4,2)<32;8,4> { NoDDClr }
+mov (16) SRC_YB(5,16)<1> CUR_TEMP_B(4,3)<32;8,4> { NoDDChk }
+
+mov (16) SRC_YB(6,0)<1> CUR_TEMP_B(6,0)<32;8,4> { NoDDClr }
+mov (16) SRC_YB(6,16)<1> CUR_TEMP_B(6,1)<32;8,4> { NoDDChk }
+mov (16) SRC_YB(7,0)<1> CUR_TEMP_B(6,2)<32;8,4> { NoDDClr }
+mov (16) SRC_YB(7,16)<1> CUR_TEMP_B(6,3)<32;8,4> { NoDDChk }
+
+// Y is transposed.
diff --git a/src/shaders/h264/ildb/Transpose_Cur_Y_4x16.asm b/src/shaders/h264/ildb/Transpose_Cur_Y_4x16.asm new file mode 100644 index 00000000..70c0b1cd --- /dev/null +++ b/src/shaders/h264/ildb/Transpose_Cur_Y_4x16.asm @@ -0,0 +1,75 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+//////////////////////////////////////////////////////////////////////////////////////////
+// Module name: Transpose_Y_4x16.asm
+//
+// Transpose a 4x16 internal planar to 16x4 internal planar block.
+// The src block is 16x16. Right moft 4 columns are transposed.
+//
+//----------------------------------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Source region is :ub
+// SRC_YB: SRC_YB Base=rxx ElementSize=1 SrcRegion=REGION(16,1) Type=ub // 8 GRFs
+//
+// Temp buffer:
+// BUF_B: BUF_B Base=rxx ElementSize=1 SrcRegion=REGION(16,1) Type=ub // 8 GRFs
+//
+//////////////////////////////////////////////////////////////////////////////////////////
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDDB:w
+#endif
+
+// Transpose Y (4x16) right most 4 columns
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |1f 1e 1d 1c 1b 1a 19 18 17 16 15 14 13 12 11 10 0f 0e 0d 0c 0b 0a 09 08 07 06 05 04 03 02 01 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |3f 3e 3d 3c 3b 3a 39 38 37 36 35 34 33 32 31 30 2f 2e 2d 2c 2b 2a 29 28 27 26 25 24 23 22 21 20|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |5f 5e 5d 5c 5b 5a 59 58 57 56 55 54 53 52 51 50 4f 4e 4d 4c 4b 4a 49 48 47 46 45 44 43 42 41 40|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |7f 7e 7d 7c 7b 7a 79 78 77 76 75 74 73 72 71 70 6f 6e 6d 6c 6b 6a 69 68 67 66 65 64 63 62 61 60|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |9f 9e 9d 9c 9b 9a 99 98 97 96 95 94 93 92 91 90 8f 8e 8d 8c 8b 8a 89 88 87 86 85 84 83 82 81 80|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |bf be bd bc bb ba b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 af ae ad ac ab aa a9 a8 a7 a6 a5 a4 a3 a2 a1 a0|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |df de dd dc db da d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 cf ce cd cc cb ca c9 c8 c7 c6 c5 c4 c3 c2 c1 c0|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |ff fe fd fc fb fa f9 f8 f7 f6 f5 f4 f3 f2 f1 f0 ef ee ed ec eb ea e9 e8 e7 e6 e5 e4 e3 e2 e1 e0|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+
+// The first step
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |7f 7e 7d 7c 6f 6e 6d 6c 5f 5e 5d 5c 4f 4e 4d 4c 3f 3e 3d 3c 2f 2e 2d 2c 1f 1e 1d 1c 0f 0e 0d 0c|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |ff fe fd fc ef ee ed ec df de dd dc cf ce cd cc bf be bd bc af ae ad ac 9f 9e 9d 9c 8f 8e 8d 8c|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+
+// The second step
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |fd ed dd cd bd ad 9d 8d 7d 6d 5d 4d 3d 2d 1d 0d fc ec dc cc bc ac 9c 8c 7c 6c 5c 4c 3c 2c 1c 0c|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |ff ef df cf bf af 9f 8f 7f 6f 5f 4f 3f 2f 1f 0f fe ee de ce be ae 9e 8e 7e 6e 5e 4e 3e 2e 1e 0e|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+
+
+mov (16) LEFT_TEMP_B(0,0)<1> SRC_YB(0,12)<16;4,1> { NoDDClr }
+mov (16) LEFT_TEMP_B(0,16)<1> SRC_YB(2,12)<16;4,1> { NoDDChk }
+mov (16) LEFT_TEMP_B(1,0)<1> SRC_YB(4,12)<16;4,1> { NoDDClr }
+mov (16) LEFT_TEMP_B(1,16)<1> SRC_YB(6,12)<16;4,1> { NoDDChk }
+
+// The second step
+mov (16) LEFT_TEMP_B(2,0)<1> LEFT_TEMP_B(0,0)<32;8,4> { NoDDClr }
+mov (16) LEFT_TEMP_B(2,16)<1> LEFT_TEMP_B(0,1)<32;8,4> { NoDDChk }
+mov (16) LEFT_TEMP_B(3,0)<1> LEFT_TEMP_B(0,2)<32;8,4> { NoDDClr }
+mov (16) LEFT_TEMP_B(3,16)<1> LEFT_TEMP_B(0,3)<32;8,4> { NoDDChk }
+
+// Y is now transposed. the result is in LEFT_TEMP_B(2) and LEFT_TEMP_B(3).
diff --git a/src/shaders/h264/ildb/Transpose_Cur_Y_Right_Most_4x16.asm b/src/shaders/h264/ildb/Transpose_Cur_Y_Right_Most_4x16.asm new file mode 100644 index 00000000..c458f85e --- /dev/null +++ b/src/shaders/h264/ildb/Transpose_Cur_Y_Right_Most_4x16.asm @@ -0,0 +1,31 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Transpose cur Y right most 4x16 to 16x4
+// Assume source is LEFT_TEMP_B(0), and detination is LEFT_TEMP_B(2)
+
+
+// Input received from dport:
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |73 72 71 70 63 62 61 60 53 52 51 50 43 42 41 40 33 32 31 30 23 22 21 20 13 12 11 10 03 02 01 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |f3 f2 f1 f0 e3 e2 e1 e0 d3 d2 d1 d0 c3 c2 c1 c0 b3 b2 b1 b0 a3 a2 a1 a0 93 92 91 90 83 82 81 80|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+
+// Output of transpose: <1> <= <32;8,4>
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |f1 e1 d1 c1 b1 a1 91 81 71 61 51 41 31 21 11 01 f0 e0 d0 c0 b0 a0 90 80 70 60 50 40 30 20 10 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |f3 e3 d3 c3 b3 a3 93 83 73 63 53 43 33 23 13 03 f2 e2 d2 c2 b2 a2 92 82 72 62 52 42 32 22 12 02|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+
+ // Transpose the data, also occupy 2 GRFs
+ mov (16) LEFT_TEMP_B(2)<1> LEFT_TEMP_B(0, 0)<32;8,4> { NoDDClr }
+ mov (16) LEFT_TEMP_B(2, 16)<1> LEFT_TEMP_B(0, 1)<32;8,4> { NoDDChk }
+ mov (16) LEFT_TEMP_B(3)<1> LEFT_TEMP_B(0, 2)<32;8,4> { NoDDClr }
+ mov (16) LEFT_TEMP_B(3, 16)<1> LEFT_TEMP_B(0, 3)<32;8,4> { NoDDChk }
diff --git a/src/shaders/h264/ildb/Transpose_Left_UV_2x8.asm b/src/shaders/h264/ildb/Transpose_Left_UV_2x8.asm new file mode 100644 index 00000000..678456e3 --- /dev/null +++ b/src/shaders/h264/ildb/Transpose_Left_UV_2x8.asm @@ -0,0 +1,28 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Transpose left MB 2x8 to 8x2
+// Assume source is LEFT_TEMP_W, and detination is PREV_MB_UW
+
+// Input from dport for transpose:
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |71 71 70 70 61 61 60 60 51 51 50 50 41 41 40 40 31 31 30 30 21 21 20 20 11 11 10 10 01 01 00 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+//
+// Output of transpose: <1> <=== <16;8,2>:w
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |71 71 61 61 51 51 41 41 31 31 21 21 11 11 01 01 70 70 60 60 50 50 40 40 30 30 20 20 10 10 00 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+
+// mov (8) PREV_MB_UW(0,0)<1> BUF_W(0,0)<16;8,2> { NoDDClr }
+// mov (8) PREV_MB_UW(0,8)<1> BUF_W(0,1)<16;8,2> { NoDDChk }
+
+// mov (8) PREV_MB_UW(0,0)<1> LEFT_TEMP_W(0,0)<16;8,2> { NoDDClr }
+// mov (8) PREV_MB_UW(0,8)<1> LEFT_TEMP_W(0,1)<16;8,2> { NoDDChk }
+
+ mov (16) PREV_MB_UW(0,0)<1> LEFT_TEMP_W(0,0)<1;8,2>
diff --git a/src/shaders/h264/ildb/Transpose_Left_Y_4x16.asm b/src/shaders/h264/ildb/Transpose_Left_Y_4x16.asm new file mode 100644 index 00000000..435996c0 --- /dev/null +++ b/src/shaders/h264/ildb/Transpose_Left_Y_4x16.asm @@ -0,0 +1,31 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Transpose left MB 4x16 to 16x4
+// Assume source is LEFT_TEMP_B, and detination is PREV_MB_YB
+
+
+// Input received from dport:
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |73 72 71 70 63 62 61 60 53 52 51 50 43 42 41 40 33 32 31 30 23 22 21 20 13 12 11 10 03 02 01 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |f3 f2 f1 f0 e3 e2 e1 e0 d3 d2 d1 d0 c3 c2 c1 c0 b3 b2 b1 b0 a3 a2 a1 a0 93 92 91 90 83 82 81 80|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+
+// Output of transpose: <1> <= <32;8,4>
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |f1 e1 d1 c1 b1 a1 91 81 71 61 51 41 31 21 11 01 f0 e0 d0 c0 b0 a0 90 80 70 60 50 40 30 20 10 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |f3 e3 d3 c3 b3 a3 93 83 73 63 53 43 33 23 13 03 f2 e2 d2 c2 b2 a2 92 82 72 62 52 42 32 22 12 02|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+
+ // Transpose the data, also occupy 2 GRFs
+ mov (16) PREV_MB_YB(0)<1> LEFT_TEMP_B(0, 0)<32;8,4> { NoDDClr }
+ mov (16) PREV_MB_YB(0, 16)<1> LEFT_TEMP_B(0, 1)<32;8,4> { NoDDChk }
+ mov (16) PREV_MB_YB(1)<1> LEFT_TEMP_B(0, 2)<32;8,4> { NoDDClr }
+ mov (16) PREV_MB_YB(1, 16)<1> LEFT_TEMP_B(0, 3)<32;8,4> { NoDDChk }
diff --git a/src/shaders/h264/ildb/loadNV12_16x16T.asm b/src/shaders/h264/ildb/loadNV12_16x16T.asm new file mode 100644 index 00000000..d5aa552a --- /dev/null +++ b/src/shaders/h264/ildb/loadNV12_16x16T.asm @@ -0,0 +1,53 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: loadNV12_16x16T.asm
+//
+// Load and transpose NV12 16x16 block
+//
+//----------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Source region in :ud
+// SRC_YD: SRC_YD Base=rxx ElementSize=4 SrcRegion=REGION(8,1) Type=ud // 8 GRFs
+// SRC_UD: SRC_UD Base=rxx ElementSize=4 SrcRegion=REGION(8,1) Type=ud (U+V for NV12) // 4 GRFs
+//
+// Source region is :ub. The same region as :ud region
+// SRC_YB: SRC_YB Base=rxx ElementSize=1 SrcRegion=REGION(16,1) Type=ub // 8 GRFs
+// SRC_UB: SRC_UB Base=rxx ElementSize=1 SrcRegion=REGION(16,1) Type=ub // 2 GRFs
+// SRC_VB: SRC_VB Base=rxx ElementSize=1 SrcRegion=REGION(16,1) Type=ub // 2 GRFs
+//
+// Binding table index:
+// BI_SRC_Y: Binding table index of Y surface
+// BI_SRC_UV: Binding table index of UV surface (NV12)
+//
+// Temp buffer:
+// BUF_B: BUF_B Base=rxx ElementSize=1 SrcRegion=REGION(16,1) Type=ub
+//
+//----------------------------------------------------------------
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD1:w
+#endif
+
+ // Read Y
+ mov (2) MSGSRC.0<1>:ud ORIX_CUR<2;2,1>:w // Block origin
+ mov (1) MSGSRC.2<1>:ud 0x000F000F:ud // Block width and height (16x16)
+ send (8) SRC_YD(0)<1> MSGHDRY MSGSRC<8;8,1>:ud DAPREAD RESP_LEN(8)+DWBRMSGDSC_RC+BI_SRC_Y // Read 8 GRFs
+
+ // Read U+V
+ asr (1) MSGSRC.1:ud MSGSRC.1:ud 1:w // NV12 U+V block origin y = half of Y comp
+ mov (1) MSGSRC.2<1>:ud 0x0007000F:ud // NV12 U+V block width and height (16x8)
+ send (8) SRC_UD(0)<1> MSGHDRU MSGSRC<8;8,1>:ud DAPREAD RESP_LEN(4)+DWBRMSGDSC_RC+BI_SRC_UV // Read 4 GRFs
+
+ #include "TransposeNV12_16x16.asm"
+
+// #include "Transpose_Y_16x16.asm"
+// #include "Transpose_NV12_UV_16x8.asm"
+
+// End of loadNV12_16x16T
diff --git a/src/shaders/h264/ildb/loadNV12_16x4.asm b/src/shaders/h264/ildb/loadNV12_16x4.asm new file mode 100644 index 00000000..a2e7dfd8 --- /dev/null +++ b/src/shaders/h264/ildb/loadNV12_16x4.asm @@ -0,0 +1,54 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module Name: Loadnv12_16X4.Asm
+//
+// Load Nv12 16X4 Block
+//
+//----------------------------------------------------------------
+// Symbols Need To Be Defined Before Including This Module
+//
+// Source Region In :Ud
+// Src_Yd: Src_Yd Base=Rxx Elementsize=4 Srcregion=Region(8,1) Type=Ud // 3 Grfs (2 For Y, 1 For U+V)
+//
+// Source Region Is :Ub. The Same Region As :Ud Region
+// Src_Yb: Src_Yb Base=Rxx Elementsize=1 Srcregion=Region(16,1) Type=Ub // 2 Grfs
+// Src_Ub: Src_Ub Base=Rxx Elementsize=1 Srcregion=Region(16,1) Type=Ub // 0.5 Grf
+// Src_Vb: Src_Vb Base=Rxx Elementsize=1 Srcregion=Region(16,1) Type=Ub // 0.5 Grf
+//
+// Binding Table Index:
+// Bi_Src_Y: Binding Table Index Of Y Surface
+// Bi_Src_UV: Binding Table Index Of UV Surface (Nv12)
+//
+// Temp Buffer:
+// Buf_D: Buf_D Base=Rxx Elementsize=4 Srcregion=Region(8,1) Type=Ud
+// Buf_B: Buf_B Base=Rxx Elementsize=1 Srcregion=Region(16,1) Type=Ub
+//
+//----------------------------------------------------------------
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD2:w
+#endif
+
+ // Read Y
+ mov (2) MSGSRC.0<1>:ud ORIX<2;2,1>:w // Block origin
+ mov (1) MSGSRC.2<1>:ud 0x0003000F:ud // Block width and height (16x4)
+ send (8) PREV_MB_YD(0)<1> MSGHDRY MSGSRC<8;8,1>:ud DAPREAD RESP_LEN(2)+DWBRMSGDSC_RC+BI_SRC_Y // Read 2 GRFs
+
+ // Read U+V
+ asr (1) MSGSRC.1:ud MSGSRC.1:ud 1:w // NV12 U+V block origin y = half of Y comp
+ mov (1) MSGSRC.2<1>:ud 0x0001000F:ud // NV12 U+V block width and height (16x2)
+
+ // Load NV12 U+V tp a temp buf
+ send (8) BUF_D(0)<1> MSGHDRU MSGSRC<8;8,1>:ud DAPREAD RESP_LEN(1)+DWBRMSGDSC_RC+BI_SRC_UV // Read 1 GRF
+
+ // Convert NV12 U+V to internal planar U and V and place them right after Y.
+// mov (16) SRC_UB(0,0)<1> BUF_B(0,0)<32;16,2>
+// mov (16) SRC_VB(0,0)<1> BUF_B(0,1)<32;16,2>
+
+// End of loadNV12_16x4.asm
diff --git a/src/shaders/h264/ildb/load_Cur_UV_8x8T.asm b/src/shaders/h264/ildb/load_Cur_UV_8x8T.asm new file mode 100644 index 00000000..25cb96c9 --- /dev/null +++ b/src/shaders/h264/ildb/load_Cur_UV_8x8T.asm @@ -0,0 +1,65 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: load_Cur_UV_8x8T.asm
+//
+// Load and transpose UV 8x8 block (NV12: 8x8U and 8x8V mixed)
+//
+//----------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Source region in :ud
+// SRC_UD: SRC_UD Base=rxx ElementSize=4 SrcRegion=REGION(8,1) Type=ud (U+V for NV12) // 4 GRFs
+//
+// Binding table index:
+// BI_SRC_UV: Binding table index of UV surface (NV12)
+//
+//----------------------------------------------------------------
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD1:w
+#endif
+
+ // Read U+V blk
+#if defined(_PROGRESSIVE)
+ mov (1) MSGSRC.0:ud ORIX_CUR:w { NoDDClr } // Block origin
+ asr (1) MSGSRC.1:ud ORIY_CUR:w 1:w { NoDDClr, NoDDChk } // NV12 U+V block origin y = half of Y comp
+ mov (1) MSGSRC.2:ud 0x0007000F:ud { NoDDChk } // NV12 U+V block width and height (16x8 bytes)
+
+ //send (8) SRC_UD(0)<1> MSGHDRU MSGSRC<8;8,1>:ud DWBRMSGDSC_SC+0x00040000+BI_SRC_UV
+ mov (1) MSGDSC RESP_LEN(4)+DWBRMSGDSC_SC+BI_SRC_UV:ud
+#endif
+
+#if defined(_FIELD)
+// cmp.z.f0.0 (1) NULLREGW PicTypeC:w 0:w // Get pic type flag
+ and.nz.f0.1 (1) NULLREGW BitFields:w BotFieldFlag:w // Get bottom field flag
+ // they are used later in this file
+
+ mov (1) MSGSRC.0:ud ORIX_CUR:w { NoDDClr } // Block origin
+ asr (1) MSGSRC.1:ud ORIY_CUR:w 1:w { NoDDClr, NoDDChk } // NV12 U+V block origin y = half of Y comp
+ mov (1) MSGSRC.2:ud 0x0007000F:ud { NoDDChk } // NV12 U+V block width and height (16x8 bytes)
+
+ // Set message descriptor
+
+ // Frame picture
+// (f0.0) mov (1) MSGDSC RESP_LEN(4)+DWBRMSGDSC_SC+BI_SRC_UV:ud // Read 4 GRFs from SRC_UV
+// (f0.0) jmpi load_UV_8x8T
+
+ // Field picture
+ (f0.1) mov (1) MSGDSC RESP_LEN(4)+DWBRMSGDSC_SC_BF+BI_SRC_UV:ud // Read 4 GRFs from SRC_UV bottom field
+ (-f0.1) mov (1) MSGDSC RESP_LEN(4)+DWBRMSGDSC_SC_TF+BI_SRC_UV:ud // Read 4 GRFs from SRC_UV top field
+
+//load_UV_8x8T:
+
+#endif
+
+ send (8) SRC_UD(0)<1> MSGHDRU MSGSRC<8;8,1>:ud DAPREAD MSGDSC
+
+// #include "Transpose_Cur_UV_8x8.asm"
+
+// End of load_UV_8x8T
diff --git a/src/shaders/h264/ildb/load_Cur_UV_8x8T_Mbaff.asm b/src/shaders/h264/ildb/load_Cur_UV_8x8T_Mbaff.asm new file mode 100644 index 00000000..82b7d9e1 --- /dev/null +++ b/src/shaders/h264/ildb/load_Cur_UV_8x8T_Mbaff.asm @@ -0,0 +1,62 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: load_Cur_UV_8x8T.asm
+//
+// Load and transpose UV 8x8 block (NV12: 8x8U and 8x8V mixed)
+//
+//----------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Source region in :ud
+// SRC_UD: SRC_UD Base=rxx ElementSize=4 SrcRegion=REGION(8,1) Type=ud (U+V for NV12) // 4 GRFs
+//
+// Binding table index:
+// BI_SRC_UV: Binding table index of UV surface (NV12)
+//
+//----------------------------------------------------------------
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD1:w
+#endif
+ // FieldModeCurrentMbFlag determines how to access left MB
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FieldModeCurrentMbFlag:w
+
+ and.nz.f0.1 (1) NULLREGW BitFields:w BotFieldFlag:w // Get bottom field flag
+
+ // Read U+V
+ mov (1) MSGSRC.0:ud ORIX_CUR:w { NoDDClr } // Block origin
+ asr (1) MSGSRC.1:ud ORIY_CUR:w 1:w { NoDDClr, NoDDChk } // NV12 U+V block origin y = half of Y comp
+ mov (1) MSGSRC.2:ud 0x0007000F:ud { NoDDChk } // NV12 U+V block width and height (16x8 bytes)
+
+ // Set message descriptor
+
+ (f0.0) if (1) ILDB_LABEL(ELSE_UV_8X8T)
+
+ // Frame picture
+ mov (1) MSGDSC RESP_LEN(4)+DWBRMSGDSC_SC+BI_SRC_UV:ud // Read 4 GRFs from SRC_UV
+
+ (f0.1) add (1) MSGSRC.1:d MSGSRC.1:d 8:w // Add vertical offset 8 for bot MB in MBAFF mode
+
+ILDB_LABEL(ELSE_UV_8X8T):
+ else (1) ILDB_LABEL(ENDIF_UV_8X8T)
+
+ // Field picture
+ (f0.1) mov (1) MSGDSC RESP_LEN(4)+DWBRMSGDSC_SC_BF+BI_SRC_UV:ud // Read 4 GRFs from SRC_UV bottom field
+ (-f0.1) mov (1) MSGDSC RESP_LEN(4)+DWBRMSGDSC_SC_TF+BI_SRC_UV:ud // Read 4 GRFs from SRC_UV top field
+
+ asr (1) MSGSRC.1:d MSGSRC.1:d 1:w // Reduce y by half in field access mode
+
+ endif
+ILDB_LABEL(ENDIF_UV_8X8T):
+
+ send (8) SRC_UD(0)<1> MSGHDRU MSGSRC<8;8,1>:ud DAPREAD MSGDSC
+
+// #include "Transpose_Cur_UV_8x8.asm"
+
+// End of load_UV_8x8T
diff --git a/src/shaders/h264/ildb/load_Cur_UV_Right_Most_2x8.asm b/src/shaders/h264/ildb/load_Cur_UV_Right_Most_2x8.asm new file mode 100644 index 00000000..426a5188 --- /dev/null +++ b/src/shaders/h264/ildb/load_Cur_UV_Right_Most_2x8.asm @@ -0,0 +1,61 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module Name: Load_Cur_UV_Right_Most_2X8.Asm
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD0:w
+#endif
+
+#if defined(_PROGRESSIVE)
+ // Read U+V, (UV MB size = 16x8)
+ add (1) MSGSRC.0:ud ORIX_CUR:w 12:w { NoDDClr } // Block origin
+ asr (1) MSGSRC.1:ud ORIY_CUR:w 1:w { NoDDClr, NoDDChk } // NV12 U+V block origin y = half of Y comp
+ mov (1) MSGSRC.2:ud 0x00070003:ud { NoDDChk } // NV12 U+V block width and height (4x8)
+ send (8) LEFT_TEMP_D(0)<1> MSGHDRU MSGSRC<8;8,1>:ud DAPREAD RESP_LEN(1)+DWBRMSGDSC_RC+BI_DEST_UV
+#endif
+
+#if defined(_FIELD) || defined(_MBAFF)
+
+ // FieldModeCurrentMbFlag determines how to access left MB
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FieldModeCurrentMbFlag:w
+
+ and.nz.f0.1 (1) NULLREGW BitFields:w BotFieldFlag:w // Get bottom field flag
+
+ // Read U+V
+ add (1) MSGSRC.0:ud ORIX_CUR:w 12:w { NoDDClr } // Block origin
+ asr (1) MSGSRC.1:ud ORIY_CUR:w 1:w { NoDDClr, NoDDChk } // NV12 U+V block origin y = half of Y comp
+ mov (1) MSGSRC.2:ud 0x00070003:ud { NoDDChk } // NV12 U+V block width and height (4x8)
+
+ // Load NV12 U+V
+
+ // Set message descriptor
+
+ (f0.0) if (1) ILDB_LABEL(ELSE_Y_2x8T)
+
+ // Frame picture
+ mov (1) MSGDSC RESP_LEN(1)+DWBRMSGDSC_RC+BI_DEST_UV:ud // Read 1 GRF from SRC_UV
+
+ (f0.1) add (1) MSGSRC.1:d MSGSRC.1:d 8:w // Add vertical offset 8 for bot MB in MBAFF mode
+
+ILDB_LABEL(ELSE_Y_2x8T):
+ else (1) ILDB_LABEL(ENDIF_Y_2x8T)
+
+ // Field picture
+ (f0.1) mov (1) MSGDSC RESP_LEN(1)+DWBRMSGDSC_RC_BF+BI_DEST_UV:ud // Read 1 GRF from SRC_Y bottom field
+ (-f0.1) mov (1) MSGDSC RESP_LEN(1)+DWBRMSGDSC_RC_TF+BI_DEST_UV:ud // Read 1 GRF from SRC_Y top field
+
+ endif
+ILDB_LABEL(ENDIF_Y_2x8T):
+
+ // Read 1 GRF from DEST surface as the above MB has been deblocked.
+// send (8) BUF_D(0)<1> MSGHDRU MSGSRC<8;8,1>:ud MSGDSC
+ send (8) LEFT_TEMP_D(0)<1> MSGHDRU MSGSRC<8;8,1>:ud DAPREAD MSGDSC
+
+#endif
+
diff --git a/src/shaders/h264/ildb/load_Cur_Y_16x16T.asm b/src/shaders/h264/ildb/load_Cur_Y_16x16T.asm new file mode 100644 index 00000000..d70b101c --- /dev/null +++ b/src/shaders/h264/ildb/load_Cur_Y_16x16T.asm @@ -0,0 +1,63 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: load_Y_16x16T.asm
+//
+// Load and transpose Y 16x16 block
+//
+//----------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Source region in :ud
+// SRC_YD: SRC_YD Base=rxx ElementSize=4 SrcRegion=REGION(8,1) Type=ud // 8 GRFs
+//
+// Binding table index:
+// BI_SRC_Y: Binding table index of Y surface
+//
+//----------------------------------------------------------------
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD1:w
+#endif
+ // Read Y
+
+#if defined(_PROGRESSIVE)
+ mov (2) MSGSRC.0<1>:ud ORIX_CUR<2;2,1>:w { NoDDClr } // Block origin
+ mov (1) MSGSRC.2<1>:ud 0x000F000F:ud { NoDDChk } // Block width and height (16x16)
+
+ //send (8) SRC_YD(0)<1> MSGHDRC MSGSRC<8;8,1>:ud DWBRMSGDSC_SMPLR+0x00080000+BI_SRC_Y
+ mov (1) MSGDSC RESP_LEN(8)+DWBRMSGDSC_SC+BI_SRC_Y:ud
+#endif
+
+
+#if defined(_FIELD)
+// cmp.z.f0.0 (1) NULLREGW PicTypeC:w 0:w // Get pic type flag
+ and.nz.f0.1 (1) NULLREGW BitFields:w BotFieldFlag:w // Get bottom field flag
+ // they are used later in this file
+
+ mov (2) MSGSRC.0<1>:ud ORIX_CUR<2;2,1>:w { NoDDClr } // Block origin
+ mov (1) MSGSRC.2<1>:ud 0x000F000F:ud { NoDDChk } // Block width and height (16x16)
+
+ // Set message descriptor
+ // Frame picture
+// (f0.0) mov (1) MSGDSC RESP_LEN(8)+DWBRMSGDSC_SC+BI_SRC_Y:ud // Read 8 GRFs from SRC_Y
+// (f0.0) jmpi load_Y_16x16T
+
+ // Non frame picture
+ (f0.1) mov (1) MSGDSC RESP_LEN(8)+DWBRMSGDSC_SC_BF+BI_SRC_Y:ud // Read 8 GRFs from SRC_Y bottom field
+ (-f0.1) mov (1) MSGDSC RESP_LEN(8)+DWBRMSGDSC_SC_TF+BI_SRC_Y:ud // Read 8 GRFs from SRC_Y top field
+
+//load_Y_16x16T:
+
+#endif
+
+ send (8) SRC_YD(0)<1> MSGHDRC MSGSRC<8;8,1>:ud DAPREAD MSGDSC
+
+// #include "Transpose_Cur_Y_16x16.asm"
+
+// End of load_Y_16x16T
diff --git a/src/shaders/h264/ildb/load_Cur_Y_16x16T_Mbaff.asm b/src/shaders/h264/ildb/load_Cur_Y_16x16T_Mbaff.asm new file mode 100644 index 00000000..f9c47459 --- /dev/null +++ b/src/shaders/h264/ildb/load_Cur_Y_16x16T_Mbaff.asm @@ -0,0 +1,62 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: load_Y_16x16T.asm
+//
+// Load and transpose Y 16x16 block
+//
+//----------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Source region in :ud
+// SRC_YD: SRC_YD Base=rxx ElementSize=4 SrcRegion=REGION(8,1) Type=ud // 8 GRFs
+//
+// Binding table index:
+// BI_SRC_Y: Binding table index of Y surface
+//
+//----------------------------------------------------------------
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD1:w
+#endif
+
+ // FieldModeCurrentMbFlag determines how to access left MB
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FieldModeCurrentMbFlag:w
+
+ and.nz.f0.1 (1) NULLREGW BitFields:w BotFieldFlag:w // Get bottom field flag
+
+ // Read Y
+ mov (2) MSGSRC.0<1>:d ORIX_CUR<2;2,1>:w { NoDDClr } // Block origin
+ mov (1) MSGSRC.2<1>:ud 0x000F000F:ud { NoDDChk } // Block width and height (16x16)
+
+ // Set message descriptor, etc.
+
+ (f0.0) if (1) ILDB_LABEL(ELSE_Y_16x16T)
+
+ // Frame picture
+ mov (1) MSGDSC RESP_LEN(8)+DWBRMSGDSC_SC+BI_SRC_Y:ud // Read 8 GRFs from SRC_Y
+
+ (f0.1) add (1) MSGSRC.1:d MSGSRC.1:d 16:w // Add vertical offset 16 for bot MB in MBAFF mode
+
+ILDB_LABEL(ELSE_Y_16x16T):
+ else (1) ILDB_LABEL(ENDIF_Y_16x16T)
+
+ // Field picture
+ (f0.1) mov (1) MSGDSC RESP_LEN(8)+DWBRMSGDSC_SC_BF+BI_SRC_Y:ud // Read 8 GRFs from SRC_Y bottom field
+ (-f0.1) mov (1) MSGDSC RESP_LEN(8)+DWBRMSGDSC_SC_TF+BI_SRC_Y:ud // Read 8 GRFs from SRC_Y top field
+
+ asr (1) MSGSRC.1:d MSGSRC.1:d 1:w // Reduce y by half in field access mode
+
+ endif
+ILDB_LABEL(ENDIF_Y_16x16T):
+
+ send (8) SRC_YD(0)<1> MSGHDRY MSGSRC<8;8,1>:ud DAPREAD MSGDSC
+
+// #include "Transpose_Cur_Y_16x16.asm"
+
+// End of load_Y_16x16T
diff --git a/src/shaders/h264/ildb/load_Cur_Y_Right_Most_4x16.asm b/src/shaders/h264/ildb/load_Cur_Y_Right_Most_4x16.asm new file mode 100644 index 00000000..cd25ace9 --- /dev/null +++ b/src/shaders/h264/ildb/load_Cur_Y_Right_Most_4x16.asm @@ -0,0 +1,85 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: load_Cur_Y_Right_Most_4x16.asm
+//
+// Load luma cur MB right most 4x16 into LEFT_TEMP_B
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD0:w
+#endif
+
+
+#if defined(_PROGRESSIVE)
+ // Read Y
+ add (1) MSGSRC.0<1>:ud ORIX_CUR:w 12:w { NoDDClr } // Block origin, move right 12 bytes
+ mov (1) MSGSRC.1<1>:ud ORIY_CUR:w { NoDDClr, NoDDChk } // Block origin
+ mov (1) MSGSRC.2<1>:ud 0x000F0003:ud { NoDDChk } // Block width and height (4x16)
+ send (8) LEFT_TEMP_D(0)<1> MSGHDRL MSGSRC<8;8,1>:ud DAPREAD RESP_LEN(2)+DWBRMSGDSC_RC+BI_DEST_Y
+#endif
+
+
+#if defined(_FIELD) || defined(_MBAFF)
+
+ // FieldModeCurrentMbFlag determines how to access left MB
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FieldModeCurrentMbFlag:w
+
+ and.nz.f0.1 (1) NULLREGW BitFields:w BotFieldFlag:w // Get bottom field flag
+
+ // Read Y
+ add (1) MSGSRC.0<1>:ud ORIX_CUR:w 12:w { NoDDClr } // Block origin, move right 12 bytes
+ mov (1) MSGSRC.1<1>:ud ORIY_CUR:w { NoDDClr, NoDDChk } // Block origin
+ mov (1) MSGSRC.2<1>:ud 0x000F0003:ud { NoDDChk } // Block width and height (4x16)
+
+ // Set message descriptor, etc.
+
+ (f0.0) if (1) ILDB_LABEL(ELSE_Y_4x16T)
+
+ // Frame picture
+ mov (1) MSGDSC RESP_LEN(2)+DWBRMSGDSC_RC+BI_DEST_Y:ud // Read 2 GRFs from DEST_Y
+
+ (f0.1) add (1) MSGSRC.1:d MSGSRC.1:d 16:w // Add vertical offset 16 for bot MB in MBAFF mode
+
+ILDB_LABEL(ELSE_Y_4x16T):
+ else (1) ILDB_LABEL(ENDIF_Y_4x16T)
+
+ // Field picture
+ (f0.1) mov (1) MSGDSC RESP_LEN(2)+DWBRMSGDSC_RC_BF+BI_DEST_Y:ud // Read 2 GRFs from DEST_Y bottom field
+ (-f0.1) mov (1) MSGDSC RESP_LEN(2)+DWBRMSGDSC_RC_TF+BI_DEST_Y:ud // Read 2 GRFs from DEST_Y top field
+
+ endif
+ILDB_LABEL(ENDIF_Y_4x16T):
+
+// send (8) BUF_D(0)<1> MSGHDRY MSGSRC<8;8,1>:ud MSGDSC
+ send (8) LEFT_TEMP_D(0)<1> MSGHDRL MSGSRC<8;8,1>:ud DAPREAD MSGDSC
+#endif
+
+// Transpose 4x16 to 16x4
+
+// Input received from dport:
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |73 72 71 70 63 62 61 60 53 52 51 50 43 42 41 40 33 32 31 30 23 22 21 20 13 12 11 10 03 02 01 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |f3 f2 f1 f0 e3 e2 e1 e0 d3 d2 d1 d0 c3 c2 c1 c0 b3 b2 b1 b0 a3 a2 a1 a0 93 92 91 90 83 82 81 80|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+
+// Output of transpose: <1> <= <32;8,4>
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |f1 e1 d1 c1 b1 a1 91 81 71 61 51 41 31 21 11 01 f0 e0 d0 c0 b0 a0 90 80 70 60 50 40 30 20 10 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |f3 e3 d3 c3 b3 a3 93 83 73 63 53 43 33 23 13 03 f2 e2 d2 c2 b2 a2 92 82 72 62 52 42 32 22 12 02|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+/*
+ // Transpose the data, also occupy 2 GRFs
+ mov (16) PREV_MB_YB(0)<1> BUF_B(0, 0)<32;8,4> { NoDDClr }
+ mov (16) PREV_MB_YB(0, 16)<1> BUF_B(0, 1)<32;8,4> { NoDDChk }
+ mov (16) PREV_MB_YB(1)<1> BUF_B(0, 2)<32;8,4> { NoDDClr }
+ mov (16) PREV_MB_YB(1, 16)<1> BUF_B(0, 3)<32;8,4> { NoDDChk }
+*/
+// End of load_Y_4x16T
+
diff --git a/src/shaders/h264/ildb/load_Left_UV_2x8T.asm b/src/shaders/h264/ildb/load_Left_UV_2x8T.asm new file mode 100644 index 00000000..a5f622c0 --- /dev/null +++ b/src/shaders/h264/ildb/load_Left_UV_2x8T.asm @@ -0,0 +1,76 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module Name: Load_Left_UV_2X8T.Asm
+//
+// Load UV 8X2 Block
+//
+//----------------------------------------------------------------
+// Symbols ceed To be defined before including this module
+//
+// Source Region Is :UB
+// BUF_D: BUF_D Base=Rxx Elementsize=4 Srcregion=Region(8,1) Type=UD
+
+// Binding Table Index:
+// BI_SRC_UV: Binding Table Index Of UV Surface (NV12)
+//
+//----------------------------------------------------------------
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD0:w
+#endif
+
+#if defined(_PROGRESSIVE)
+ // Read U+V
+ mov (1) MSGSRC.0:ud ORIX_LEFT:w { NoDDClr } // Block origin
+ asr (1) MSGSRC.1:ud ORIY_LEFT:w 1:w { NoDDClr, NoDDChk } // NV12 U+V block origin y = half of Y comp
+ mov (1) MSGSRC.2:ud 0x00070003:ud { NoDDChk } // NV12 U+V block width and height (4x8)
+
+ send (8) LEFT_TEMP_D(0)<1> MSGHDRU MSGSRC<8;8,1>:ud DAPREAD RESP_LEN(1)+DWBRMSGDSC_RC+BI_DEST_UV
+#endif
+
+#if defined(_FIELD) || defined(_MBAFF)
+
+ // FieldModeCurrentMbFlag determines how to access left MB
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FieldModeCurrentMbFlag:w
+
+ and.nz.f0.1 (1) NULLREGW BitFields:w BotFieldFlag:w // Get bottom field flag
+
+ // Read U+V
+ mov (1) MSGSRC.0:ud ORIX_LEFT:w { NoDDClr } // Block origin
+ asr (1) MSGSRC.1:ud ORIY_LEFT:w 1:w { NoDDClr, NoDDChk } // NV12 U+V block origin y = half of Y comp
+ mov (1) MSGSRC.2:ud 0x00070003:ud { NoDDChk } // NV12 U+V block width and height (4x8)
+
+ // Load NV12 U+V
+
+ // Set message descriptor
+
+ (f0.0) if (1) ILDB_LABEL(ELSE_Y_2x8T)
+
+ // Frame picture
+ mov (1) MSGDSC RESP_LEN(1)+DWBRMSGDSC_RC+BI_DEST_UV:ud // Read 1 GRF from SRC_UV
+
+ (f0.1) add (1) MSGSRC.1:d MSGSRC.1:d 8:w // Add vertical offset 8 for bot MB in MBAFF mode
+
+ILDB_LABEL(ELSE_Y_2x8T):
+ else (1) ILDB_LABEL(ENDIF_Y_2x8T)
+
+ // Field picture
+ (f0.1) mov (1) MSGDSC RESP_LEN(1)+DWBRMSGDSC_RC_BF+BI_DEST_UV:ud // Read 1 GRF from SRC_Y bottom field
+ (-f0.1) mov (1) MSGDSC RESP_LEN(1)+DWBRMSGDSC_RC_TF+BI_DEST_UV:ud // Read 1 GRF from SRC_Y top field
+
+ endif
+ILDB_LABEL(ENDIF_Y_2x8T):
+
+ // Read 1 GRF from DEST surface as the above MB has been deblocked.
+// send (8) BUF_D(0)<1> MSGHDRU MSGSRC<8;8,1>:ud MSGDSC
+ send (8) LEFT_TEMP_D(0)<1> MSGHDRU MSGSRC<8;8,1>:ud DAPREAD MSGDSC
+
+#endif
+
+// End of load_Left_UV_2x8T.asm
diff --git a/src/shaders/h264/ildb/load_Left_UV_2x8T_Mbaff.asm b/src/shaders/h264/ildb/load_Left_UV_2x8T_Mbaff.asm new file mode 100644 index 00000000..fefda4ff --- /dev/null +++ b/src/shaders/h264/ildb/load_Left_UV_2x8T_Mbaff.asm @@ -0,0 +1,79 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module Name: Load_Left_UV_2X8T.Asm
+//
+// Load UV 8X2 Block
+//
+//----------------------------------------------------------------
+// Symbols ceed To be defined before including this module
+//
+// Source Region Is :UB
+// BUF_D: BUF_D Base=Rxx Elementsize=4 Srcregion=Region(8,1) Type=UD
+
+// Binding Table Index:
+// BI_SRC_UV: Binding Table Index Of UV Surface (NV12)
+//
+//----------------------------------------------------------------
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD0:w
+#endif
+
+ // FieldModeCurrentMbFlag determines how to access left MB
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FieldModeCurrentMbFlag:w
+
+ and.nz.f0.1 (1) NULLREGW BitFields:w BotFieldFlag:w // Get bottom field flag
+
+ // Read U+V
+ mov (1) MSGSRC.0:ud ORIX_LEFT:w { NoDDClr } // Block origin
+ asr (1) MSGSRC.1:ud ORIY_LEFT:w 1:w { NoDDClr, NoDDChk } // NV12 U+V block origin y = half of Y comp
+ mov (1) MSGSRC.2:ud 0x00070003:ud { NoDDChk } // NV12 U+V block width and height (4x8)
+
+ // Load NV12 U+V
+
+ // Set message descriptor
+
+ (f0.0) if (1) ILDB_LABEL(ELSE_Y_2x8T)
+
+ // Frame picture
+ mov (1) MSGDSC RESP_LEN(1)+DWBRMSGDSC_RC+BI_DEST_UV:ud // Read 1 GRF from SRC_UV
+
+ (f0.1) add (1) MSGSRC.1:d MSGSRC.1:d 8:w // Add vertical offset 8 for bot MB in MBAFF mode
+
+ILDB_LABEL(ELSE_Y_2x8T):
+ else (1) ILDB_LABEL(ENDIF_Y_2x8T)
+
+ // Field picture
+ (f0.1) mov (1) MSGDSC RESP_LEN(1)+DWBRMSGDSC_RC_BF+BI_DEST_UV:ud // Read 1 GRF from SRC_Y bottom field
+ (-f0.1) mov (1) MSGDSC RESP_LEN(1)+DWBRMSGDSC_RC_TF+BI_DEST_UV:ud // Read 1 GRF from SRC_Y top field
+
+ asr (1) MSGSRC.1:d MSGSRC.1:d 1:w // Reduce y by half in field access mode
+
+ endif
+ILDB_LABEL(ENDIF_Y_2x8T):
+
+ // Read 1 GRF from DEST surface as the above MB has been deblocked.
+// send (8) BUF_D(0)<1> MSGHDRU MSGSRC<8;8,1>:ud MSGDSC
+ send (8) LEFT_TEMP_D(0)<1> MSGHDRU MSGSRC<8;8,1>:ud DAPREAD MSGDSC
+
+
+// Input from dport for transpose:
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |71 71 70 70 61 61 60 60 51 51 50 50 41 41 40 40 31 31 30 30 21 21 20 20 11 11 10 10 01 01 00 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+//
+// Output of transpose: <1> <=== <16;8,2>:w
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |71 71 61 61 51 51 41 41 31 31 21 21 11 11 01 01 70 70 60 60 50 50 40 40 30 30 20 20 10 10 00 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+/*
+ mov (8) PREV_MB_UW(0,0)<1> BUF_W(0,0)<16;8,2> { NoDDClr }
+ mov (8) PREV_MB_UW(0,8)<1> BUF_W(0,1)<16;8,2> { NoDDChk }
+*/
+// End of load_Left_UV_2x8T.asm
diff --git a/src/shaders/h264/ildb/load_Left_Y_4x16T.asm b/src/shaders/h264/ildb/load_Left_Y_4x16T.asm new file mode 100644 index 00000000..ab454f14 --- /dev/null +++ b/src/shaders/h264/ildb/load_Left_Y_4x16T.asm @@ -0,0 +1,96 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: load_Y_4x16T.asm
+//
+// Load luma left MB 4x16 and transpose 4x16 to 16x4.
+//
+//----------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Source region in :ud
+// PREV_MB_YD: PREV_MB_YD Base=rxx ElementSize=4 SrcRegion=REGION(8,1) Type=ud // 2 GRFs
+//
+// Binding table index:
+// BI_SRC_Y: Binding table index of Y surface
+//
+//----------------------------------------------------------------
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD0:w
+#endif
+
+
+#if defined(_PROGRESSIVE)
+ // Read Y
+ mov (2) MSGSRC.0<1>:ud ORIX_LEFT<2;2,1>:w { NoDDClr } // Block origin
+ mov (1) MSGSRC.2<1>:ud 0x000F0003:ud { NoDDChk } // Block width and height (4x16)
+
+// mov (1) MSGDSC DWBRMSGDSC_RC+0x00020000+BI_DEST_Y:ud // Read 2 GRFs from DEST_Y
+ send (8) LEFT_TEMP_D(0)<1> MSGHDRL MSGSRC<8;8,1>:ud DAPREAD RESP_LEN(2)+DWBRMSGDSC_RC+BI_DEST_Y
+#endif
+
+
+#if defined(_FIELD) || defined(_MBAFF)
+
+ // FieldModeCurrentMbFlag determines how to access left MB
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FieldModeCurrentMbFlag:w
+
+ and.nz.f0.1 (1) NULLREGW BitFields:w BotFieldFlag:w // Get bottom field flag
+
+ // Read Y
+ mov (2) MSGSRC.0<1>:ud ORIX_LEFT<2;2,1>:w { NoDDClr } // Block origin
+ mov (1) MSGSRC.2<1>:ud 0x000F0003:ud { NoDDChk } // Block width and height (4x16)
+
+ // Set message descriptor, etc.
+
+ (f0.0) if (1) ILDB_LABEL(ELSE_Y_4x16T)
+
+ // Frame picture
+ mov (1) MSGDSC RESP_LEN(2)+DWBRMSGDSC_RC+BI_DEST_Y:ud // Read 2 GRFs from DEST_Y
+
+ (f0.1) add (1) MSGSRC.1:d MSGSRC.1:d 16:w // Add vertical offset 16 for bot MB in MBAFF mode
+
+ILDB_LABEL(ELSE_Y_4x16T):
+ else (1) ILDB_LABEL(ENDIF_Y_4x16T)
+
+ // Field picture
+ (f0.1) mov (1) MSGDSC RESP_LEN(2)+DWBRMSGDSC_RC_BF+BI_DEST_Y:ud // Read 2 GRFs from DEST_Y bottom field
+ (-f0.1) mov (1) MSGDSC RESP_LEN(2)+DWBRMSGDSC_RC_TF+BI_DEST_Y:ud // Read 2 GRFs from DEST_Y top field
+
+ endif
+ILDB_LABEL(ENDIF_Y_4x16T):
+
+// send (8) BUF_D(0)<1> MSGHDRY MSGSRC<8;8,1>:ud MSGDSC
+ send (8) LEFT_TEMP_D(0)<1> MSGHDRL MSGSRC<8;8,1>:ud DAPREAD MSGDSC
+#endif
+
+// Transpose 4x16 to 16x4
+
+// Input received from dport:
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |73 72 71 70 63 62 61 60 53 52 51 50 43 42 41 40 33 32 31 30 23 22 21 20 13 12 11 10 03 02 01 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |f3 f2 f1 f0 e3 e2 e1 e0 d3 d2 d1 d0 c3 c2 c1 c0 b3 b2 b1 b0 a3 a2 a1 a0 93 92 91 90 83 82 81 80|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+
+// Output of transpose: <1> <= <32;8,4>
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |f1 e1 d1 c1 b1 a1 91 81 71 61 51 41 31 21 11 01 f0 e0 d0 c0 b0 a0 90 80 70 60 50 40 30 20 10 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |f3 e3 d3 c3 b3 a3 93 83 73 63 53 43 33 23 13 03 f2 e2 d2 c2 b2 a2 92 82 72 62 52 42 32 22 12 02|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+/*
+ // Transpose the data, also occupy 2 GRFs
+ mov (16) PREV_MB_YB(0)<1> BUF_B(0, 0)<32;8,4> { NoDDClr }
+ mov (16) PREV_MB_YB(0, 16)<1> BUF_B(0, 1)<32;8,4> { NoDDChk }
+ mov (16) PREV_MB_YB(1)<1> BUF_B(0, 2)<32;8,4> { NoDDClr }
+ mov (16) PREV_MB_YB(1, 16)<1> BUF_B(0, 3)<32;8,4> { NoDDChk }
+*/
+// End of load_Y_4x16T
+
diff --git a/src/shaders/h264/ildb/load_Left_Y_4x16T_Mbaff.asm b/src/shaders/h264/ildb/load_Left_Y_4x16T_Mbaff.asm new file mode 100644 index 00000000..95f73a3e --- /dev/null +++ b/src/shaders/h264/ildb/load_Left_Y_4x16T_Mbaff.asm @@ -0,0 +1,84 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: load_Y_4x16T.asm
+//
+// Load luma left MB 4x16 and transpose 4x16 to 16x4.
+//
+//----------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Source region in :ud
+// PREV_MB_YD: PREV_MB_YD Base=rxx ElementSize=4 SrcRegion=REGION(8,1) Type=ud // 2 GRFs
+//
+// Binding table index:
+// BI_SRC_Y: Binding table index of Y surface
+//
+//----------------------------------------------------------------
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD0:w
+#endif
+
+ // FieldModeCurrentMbFlag determines how to access left MB
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FieldModeCurrentMbFlag:w
+
+ and.nz.f0.1 (1) NULLREGW BitFields:w BotFieldFlag:w // Get bottom field flag
+
+ // Read Y
+ mov (2) MSGSRC.0<1>:ud ORIX_LEFT<2;2,1>:w { NoDDClr } // Block origin
+ mov (1) MSGSRC.2<1>:ud 0x000F0003:ud { NoDDChk } // Block width and height (4x16)
+
+ // Set message descriptor, etc.
+
+ (f0.0) if (1) ELSE_Y_4x16T
+
+ // Frame picture
+ mov (1) MSGDSC RESP_LEN(2)+DWBRMSGDSC_RC+BI_DEST_Y:ud // Read 2 GRFs from DEST_Y
+
+ (f0.1) add (1) MSGSRC.1:d MSGSRC.1:d 16:w // Add vertical offset 16 for bot MB in MBAFF mode
+
+ELSE_Y_4x16T:
+ else (1) ENDIF_Y_4x16T
+
+ // Field picture
+ (f0.1) mov (1) MSGDSC RESP_LEN(2)+DWBRMSGDSC_RC_BF+BI_DEST_Y:ud // Read 2 GRFs from DEST_Y bottom field
+ (-f0.1) mov (1) MSGDSC RESP_LEN(2)+DWBRMSGDSC_RC_TF+BI_DEST_Y:ud // Read 2 GRFs from DEST_Y top field
+
+ asr (1) MSGSRC.1:d MSGSRC.1:d 1:w // Reduce y by half in field access mode
+
+ endif
+ENDIF_Y_4x16T:
+
+// send (8) BUF_D(0)<1> MSGHDRY MSGSRC<8;8,1>:ud MSGDSC
+ send (8) LEFT_TEMP_D(0)<1> MSGHDRL MSGSRC<8;8,1>:ud DAPREAD MSGDSC
+
+
+// Transpose 4x16 to 16x4
+
+// Input received from dport:
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |73 72 71 70 63 62 61 60 53 52 51 50 43 42 41 40 33 32 31 30 23 22 21 20 13 12 11 10 03 02 01 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |f3 f2 f1 f0 e3 e2 e1 e0 d3 d2 d1 d0 c3 c2 c1 c0 b3 b2 b1 b0 a3 a2 a1 a0 93 92 91 90 83 82 81 80|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+
+// Output of transpose: <1> <= <32;8,4>
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |f1 e1 d1 c1 b1 a1 91 81 71 61 51 41 31 21 11 01 f0 e0 d0 c0 b0 a0 90 80 70 60 50 40 30 20 10 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |f3 e3 d3 c3 b3 a3 93 83 73 63 53 43 33 23 13 03 f2 e2 d2 c2 b2 a2 92 82 72 62 52 42 32 22 12 02|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+/*
+ // Transpose the data, also occupy 2 GRFs
+ mov (16) PREV_MB_YB(0)<1> BUF_B(0, 0)<32;8,4> { NoDDClr }
+ mov (16) PREV_MB_YB(0, 16)<1> BUF_B(0, 1)<32;8,4> { NoDDChk }
+ mov (16) PREV_MB_YB(1)<1> BUF_B(0, 2)<32;8,4> { NoDDClr }
+ mov (16) PREV_MB_YB(1, 16)<1> BUF_B(0, 3)<32;8,4> { NoDDChk }
+*/
+// End of load_Y_4x16T
diff --git a/src/shaders/h264/ildb/load_Top_UV_8x2.asm b/src/shaders/h264/ildb/load_Top_UV_8x2.asm new file mode 100644 index 00000000..844291f7 --- /dev/null +++ b/src/shaders/h264/ildb/load_Top_UV_8x2.asm @@ -0,0 +1,70 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module Name: Load_Top_UV_8X2.Asm
+//
+// Load UV 8X2 Block
+//
+//----------------------------------------------------------------
+// Symbols ceed To be defined before including this module
+//
+// Source Region Is :UB
+// BUF_D: BUF_D Base=Rxx Elementsize=4 Srcregion=Region(8,1) Type=UD
+
+// Binding Table Index:
+// BI_SRC_UV: Binding Table Index Of UV Surface (NV12)
+//
+//----------------------------------------------------------------
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD2:w
+#endif
+
+#if defined(_PROGRESSIVE)
+ // Read U+V
+ mov (1) MSGSRC.0:ud ORIX_TOP:w { NoDDClr } // Block origin
+ asr (1) MSGSRC.1:ud ORIY_TOP:w 1:w { NoDDClr, NoDDChk } // NV12 U+V block origin y = half of Y comp
+ mov (1) MSGSRC.2:ud 0x0001000F:ud { NoDDChk } // NV12 U+V block width and height (16x2)
+
+ // Read 1 GRF from DEST surface as the above MB has been deblocked.
+ //send (8) TOP_MB_UD(0)<1> MSGHDRU MSGSRC<8;8,1>:ud RESP_LEN(1)+DWBRMSGDSC_RC+BI_DEST_UV
+ mov (1) MSGDSC RESP_LEN(1)+DWBRMSGDSC_RC+BI_DEST_UV:ud
+#endif
+
+#if defined(_FIELD)
+
+// cmp.z.f0.0 (1) NULLREGW PicTypeC:w 0:w // Get pic type flag
+ and.nz.f0.1 (1) NULLREGW BitFields:w BotFieldFlag:w // Get bottom field flag
+ // They are used later in this file
+
+ // Read U+V
+ mov (1) MSGSRC.0:ud ORIX_TOP:w { NoDDClr } // Block origin
+ asr (1) MSGSRC.1:ud ORIY_TOP:w 1:w { NoDDClr, NoDDChk } // NV12 U+V block origin y = half of Y comp
+ mov (1) MSGSRC.2:ud 0x0001000F:ud { NoDDChk } // NV12 U+V block width and height (16x2)
+
+ // Load NV12 U+V
+
+ // Set message descriptor
+ // Frame picture
+// (f0.0) mov (1) MSGDSC DWBRMSGDSC_RC+0x00010000+BI_DEST_UV:ud // Read 1 GRF from SRC_UV
+// (f0.0) jmpi Load_Top_UV_8x2
+
+ // Field picture
+ (f0.1) mov (1) MSGDSC RESP_LEN(1)+DWBRMSGDSC_RC_BF+BI_DEST_UV:ud // Read 1 GRF from SRC_Y bottom field
+ (-f0.1) mov (1) MSGDSC RESP_LEN(1)+DWBRMSGDSC_RC_TF+BI_DEST_UV:ud // Read 1 GRF from SRC_Y top field
+
+//Load_Top_UV_8x2:
+
+ // Read 1 GRF from DEST surface as the above MB has been deblocked.
+// send (8) PREV_MB_UD(0)<1> MSGHDRU MSGSRC<8;8,1>:ud MSGDSC
+
+#endif
+
+ send (8) TOP_MB_UD(0)<1> MSGHDRU MSGSRC<8;8,1>:ud DAPREAD MSGDSC
+
+// End of load_Top_UV_8x2.asm
diff --git a/src/shaders/h264/ildb/load_Top_UV_8x2_Mbaff.asm b/src/shaders/h264/ildb/load_Top_UV_8x2_Mbaff.asm new file mode 100644 index 00000000..d60aa4e4 --- /dev/null +++ b/src/shaders/h264/ildb/load_Top_UV_8x2_Mbaff.asm @@ -0,0 +1,79 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module Name: Load_Top_UV_8X2.Asm
+//
+// Load UV 8X2 Block
+//
+//----------------------------------------------------------------
+// Symbols ceed To be defined before including this module
+//
+// Source Region Is :UB
+// BUF_D: BUF_D Base=Rxx Elementsize=4 Srcregion=Region(8,1) Type=UD
+
+// Binding Table Index:
+// BI_SRC_UV: Binding Table Index Of UV Surface (NV12)
+//
+//----------------------------------------------------------------
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD2:w
+#endif
+
+ // FieldModeCurrentMbFlag determines how to access above MB
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FieldModeCurrentMbFlag:w
+
+ and.nz.f0.1 (1) NULLREGW BitFields:w BotFieldFlag:w
+
+ // Read U+V
+ mov (1) MSGSRC.0:ud ORIX_TOP:w { NoDDClr } // Block origin
+ asr (1) MSGSRC.1:d ORIY_TOP:w 1:w { NoDDClr, NoDDChk } // NV12 U+V block origin y = half of Y comp
+ mov (1) MSGSRC.2:ud 0x0001000F:ud { NoDDChk } // NV12 U+V block width and height (16x2)
+
+ // Load NV12 U+V
+
+ // Set message descriptor
+
+ (f0.0) if (1) ELSE_UV_8X2
+
+ // Frame picture
+ mov (1) MSGDSC RESP_LEN(1)+DWBRMSGDSC_RC+BI_DEST_UV:ud // Read 1 GRF from SRC_UV
+
+ // Add vertical offset 8 for bot MB in MBAFF mode
+ (f0.1) add (1) MSGSRC.1:d MSGSRC.1:d 8:w
+
+ // Dual field mode setup
+ and.z.f0.1 (1) NULLREGW DualFieldMode:w 1:w
+ (f0.1) jmpi NOT_DUAL_FIELD_UV
+
+ add (1) MSGSRC.1:d MSGSRC.1:d -2:w { NoDDClr } // Load 4 lines in stead of 2
+ mov (1) MSGSRC.2:ud 0x0003000F:ud { NoDDChk } // New block width and height (16x8)
+
+ add (1) MSGDSC MSGDSC RESP_LEN(1):ud // 1 more GRF to receive
+
+NOT_DUAL_FIELD_UV:
+
+ELSE_UV_8X2:
+ else (1) ENDIF_UV_8X2
+
+ // Field picture
+ asr (1) MSGSRC.1:d ORIY_CUR:w 2:w // asr 1: NV12 U+V block origin y = half of Y comp
+ // asr 1: Reduce y by half in field access mode
+
+ (f0.1) mov (1) MSGDSC RESP_LEN(1)+DWBRMSGDSC_RC_BF+BI_DEST_UV:ud // Read 1 GRF from SRC_Y bottom field
+ (-f0.1) mov (1) MSGDSC RESP_LEN(1)+DWBRMSGDSC_RC_TF+BI_DEST_UV:ud // Read 1 GRF from SRC_Y top field
+
+ add (1) MSGSRC.1:d MSGSRC.1:d -2:w // for last 2 rows of above MB
+
+ endif
+ENDIF_UV_8X2:
+
+ // Read 1 GRF from DEST surface as the above MB has been deblocked.
+ send (8) PREV_MB_UD(0)<1> MSGHDRU MSGSRC<8;8,1>:ud DAPREAD MSGDSC
+
+// End of load_Top_UV_8x2.asm
diff --git a/src/shaders/h264/ildb/load_Top_Y_16x4.asm b/src/shaders/h264/ildb/load_Top_Y_16x4.asm new file mode 100644 index 00000000..7590d628 --- /dev/null +++ b/src/shaders/h264/ildb/load_Top_Y_16x4.asm @@ -0,0 +1,70 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module Name: Load_Y_16X4.asm
+//
+// Load Y 16X4 Block to PREV_MB_YD
+//
+//----------------------------------------------------------------
+// Symbols Need To Be Defined Before Including This Module
+//
+// Source Region In :Ud
+// Src_YD: Src_Yd Base=Rxx Elementsize=4 Srcregion=Region(8,1) Type=Ud // 3 Grfs (2 For Y, 1 For U+V)
+//
+// Source Region Is :Ub. The Same Region As :Ud Region
+// Src_YB: Src_Yb Base=Rxx Elementsize=1 Srcregion=Region(16,1) Type=Ub // 2 Grfs
+//
+// Binding Table Index:
+// Bi_Src_Y: Binding Table Index Of Y Surface
+//
+// Temp Buffer:
+// Buf_D: Buf_D Base=Rxx Elementsize=4 Srcregion=Region(8,1) Type=Ud
+// Buf_B: Buf_B Base=Rxx Elementsize=1 Srcregion=Region(16,1) Type=Ub
+//
+//----------------------------------------------------------------
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD2:w
+#endif
+
+#if defined(_PROGRESSIVE)
+ // Read Y
+ mov (2) MSGSRC.0<1>:ud ORIX_TOP<2;2,1>:w { NoDDClr } // Block origin
+ mov (1) MSGSRC.2<1>:ud 0x0003000F:ud { NoDDChk } // Block width and height (16x4)
+
+ mov (1) MSGDSC RESP_LEN(2)+DWBRMSGDSC_RC+BI_DEST_Y:ud // Read 2 GRFs from SRC_Y
+#endif
+
+#if defined(_FIELD)
+
+// cmp.z.f0.0 (1) NULLREGW PicTypeC:w 0:w // Get pic type flag
+ and.nz.f0.1 (1) NULLREGW BitFields:w BotFieldFlag:w // Get bottom field flag
+ // they are used later in this file
+
+ mov (2) MSGSRC.0<1>:ud ORIX_TOP<2;2,1>:w { NoDDClr } // Block origin
+ mov (1) MSGSRC.2<1>:ud 0x0003000F:ud { NoDDChk } // Block width and height (16x4)
+
+ // Set message descriptor
+
+ // Frame picture
+// (f0.0) mov (1) MSGDSC DWBRMSGDSC_RC+0x00020000+BI_DEST_Y:ud // Read 2 GRFs from SRC_Y
+// (f0.0) jmpi load_Y_16x4
+
+ // Field picture
+ (f0.1) mov (1) MSGDSC RESP_LEN(2)+DWBRMSGDSC_RC_BF+BI_DEST_Y:ud // Read 2 GRFs from SRC_Y bottom field
+ (-f0.1) mov (1) MSGDSC RESP_LEN(2)+DWBRMSGDSC_RC_TF+BI_DEST_Y:ud // Read 2 GRFs from SRC_Y top field
+
+//load_Y_16x4:
+ // Read 2 GRFs from DEST surface, as the above MB has been deblocked
+// send (8) PREV_MB_YD(0)<1> MSGHDRY MSGSRC<8;8,1>:ud MSGDSC
+
+#endif
+
+ send (8) TOP_MB_YD(0)<1> MSGHDRT MSGSRC<8;8,1>:ud DAPREAD MSGDSC
+
+// End of load_Y_16x4.asm
diff --git a/src/shaders/h264/ildb/load_Top_Y_16x4_Mbaff.asm b/src/shaders/h264/ildb/load_Top_Y_16x4_Mbaff.asm new file mode 100644 index 00000000..02378821 --- /dev/null +++ b/src/shaders/h264/ildb/load_Top_Y_16x4_Mbaff.asm @@ -0,0 +1,81 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module Name: Load_Y_16X4.asm
+//
+// Load Y 16X4 Block to PREV_MB_YD
+//
+//----------------------------------------------------------------
+// Symbols Need To Be Defined Before Including This Module
+//
+// Source Region In :Ud
+// Src_YD: Src_Yd Base=Rxx Elementsize=4 Srcregion=Region(8,1) Type=Ud // 3 Grfs (2 For Y, 1 For U+V)
+//
+// Source Region Is :Ub. The Same Region As :Ud Region
+// Src_YB: Src_Yb Base=Rxx Elementsize=1 Srcregion=Region(16,1) Type=Ub // 2 Grfs
+//
+// Binding Table Index:
+// Bi_Src_Y: Binding Table Index Of Y Surface
+//
+// Temp Buffer:
+// Buf_D: Buf_D Base=Rxx Elementsize=4 Srcregion=Region(8,1) Type=Ud
+// Buf_B: Buf_B Base=Rxx Elementsize=1 Srcregion=Region(16,1) Type=Ub
+//
+//----------------------------------------------------------------
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD2:w
+#endif
+ // FieldModeCurrentMbFlag determines how to access above MB
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FieldModeCurrentMbFlag:w
+
+ and.nz.f0.1 (1) NULLREGW BitFields:w BotFieldFlag:w
+
+ // Read Y
+ mov (2) MSGSRC.0<1>:ud ORIX_TOP<2;2,1>:w { NoDDClr } // Block origin
+ mov (1) MSGSRC.2<1>:ud 0x0003000F:ud { NoDDChk } // Block width and height (16x4)
+
+ // Set message descriptor
+
+ (f0.0) if (1) ELSE_Y_16x4
+
+ // Frame picture
+ mov (1) MSGDSC RESP_LEN(2)+DWBRMSGDSC_RC+BI_DEST_Y:ud // Read 2 GRFs from SRC_Y
+
+ // Add vertical offset 16 for bot MB in MBAFF mode
+ (f0.1) add (1) MSGSRC.1:d MSGSRC.1:d 16:w
+
+ // Dual field mode setup
+ and.z.f0.1 (1) NULLREGW DualFieldMode:w 1:w
+ (f0.1) jmpi NOT_DUAL_FIELD
+
+ add (1) MSGSRC.1:d MSGSRC.1:d -4:w { NoDDClr } // Load 8 lines in above MB
+ mov (1) MSGSRC.2:ud 0x0007000F:ud { NoDDChk } // New block width and height (16x8)
+
+ add (1) MSGDSC MSGDSC RESP_LEN(2):ud // 2 more GRF to receive
+
+NOT_DUAL_FIELD:
+
+ELSE_Y_16x4:
+ else (1) ENDIF_Y_16x4
+
+ asr (1) MSGSRC.1:d ORIY_CUR:w 1:w // Reduce y by half in field access mode
+
+ // Field picture
+ (f0.1) mov (1) MSGDSC RESP_LEN(2)+DWBRMSGDSC_RC_BF+BI_DEST_Y:ud // Read 2 GRFs from SRC_Y bottom field
+ (-f0.1) mov (1) MSGDSC RESP_LEN(2)+DWBRMSGDSC_RC_TF+BI_DEST_Y:ud // Read 2 GRFs from SRC_Y top field
+
+ add (1) MSGSRC.1:d MSGSRC.1:d -4:w // for last 4 rows of above MB
+
+ endif
+ENDIF_Y_16x4:
+
+ // Read 2 GRFs from DEST surface, as the above MB has been deblocked
+ send (8) PREV_MB_YD(0)<1> MSGHDRY MSGSRC<8;8,1>:ud DAPREAD MSGDSC
+
+// End of load_Y_16x4.asm
diff --git a/src/shaders/h264/ildb/saveNV12_16x16.asm b/src/shaders/h264/ildb/saveNV12_16x16.asm new file mode 100644 index 00000000..1cbe27b8 --- /dev/null +++ b/src/shaders/h264/ildb/saveNV12_16x16.asm @@ -0,0 +1,53 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: saveNV12_16x16.asm
+//
+// Save a NV12 16x16 block
+//
+//----------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Source region in :ud
+// SRC_YD: SRC_YD Base=rxx ElementSize=4 SrcRegion=REGION(8,1) Type=ud // 8 GRFs
+// SRC_UD: SRC_UD Base=rxx ElementSize=4 SrcRegion=REGION(8,1) Type=ud // 4 GRF
+//
+// Binding table index:
+// BI_DEST_Y: Binding table index of Y surface
+// BI_DEST_UV: Binding table index of UV surface (NV12)
+//
+//----------------------------------------------------------------
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD4:w
+#endif
+
+
+ mov (2) MSGSRC.0<1>:ud ORIX_CUR<2;2,1>:w // Block origin
+ mov (1) MSGSRC.2<1>:ud 0x000F000F:ud // Block width and height (16x16)
+
+ // Pack Y
+ mov (16) MSGPAYLOADD(0)<1> SRC_YD(0) // Compressed inst
+ mov (16) MSGPAYLOADD(2)<1> SRC_YD(2)
+ mov (16) MSGPAYLOADD(4)<1> SRC_YD(4)
+ mov (16) MSGPAYLOADD(6)<1> SRC_YD(6)
+
+ send (8) NULLREG MSGHDR MSGSRC<8;8,1>:ud DAPWRITE MSG_LEN(8)+DWBWMSGDSC+BI_DEST_Y // Write 8 GRFs
+
+
+
+ asr (1) MSGSRC.1:ud MSGSRC.1:ud 1:w // NV12 U+V block origin y = half of Y comp
+ mov (1) MSGSRC.2<1>:ud 0x0007000F:ud // NV12 U+V block width and height (16x8)
+
+ mov (16) MSGPAYLOADD(0)<1> SRC_UD(0) // Compressed inst
+ mov (16) MSGPAYLOADD(2)<1> SRC_UD(2)
+
+ send (8) NULLREG MSGHDR MSGSRC<8;8,1>:ud DAPWRITE MSG_LEN(4)+DWBWMSGDSC+BI_DEST_UV // Write 4 GRFs
+
+
+// End of saveNV12_16x16.asm
diff --git a/src/shaders/h264/ildb/saveNV12_16x4.asm b/src/shaders/h264/ildb/saveNV12_16x4.asm new file mode 100644 index 00000000..3a999957 --- /dev/null +++ b/src/shaders/h264/ildb/saveNV12_16x4.asm @@ -0,0 +1,50 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: saveNV12_16x4.asm
+//
+// Save a NV12 16x4 block
+//
+//----------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Source region in :ud
+// SRC_YD: SRC_YD Base=rxx ElementSize=4 SrcRegion=REGION(8,1) Type=ud // 2 GRFs
+// SRC_UD: SRC_UD Base=rxx ElementSize=4 SrcRegion=REGION(8,1) Type=ud // 1 GRF
+//
+// Binding table index:
+// BI_DEST_Y: Binding table index of Y surface
+// BI_DEST_UV: Binding table index of UV surface (NV12)
+//
+//----------------------------------------------------------------
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD5:w
+#endif
+
+ mov (2) MSGSRC.0<1>:ud ORIX_TOP<2;2,1>:w // Block origin
+ mov (1) MSGSRC.2<1>:ud 0x0003000F:ud // Block width and height (16x4)
+
+ // Pack Y
+ mov (16) MSGPAYLOADD(0)<1> SRC_YD(0) // Compressed inst
+
+ send (8) NULLREG MSGHDR MSGSRC<8;8,1>:ud DAPWRITE MSG_LEN(2)+DWBWMSGDSC+BI_DEST_Y // Write 2 GRFs
+
+
+ asr (1) MSGSRC.1:ud MSGSRC.1:ud 1:w // NV12 U+V block origin y = half of Y comp
+ mov (1) MSGSRC.2<1>:ud 0x0001000F:ud // NV12 U+V block width and height (16x2)
+
+ // Pack U and V
+// mov (16) MSGPAYLOADB(0,0)<2> SRC_UB(0,0)
+// mov (16) MSGPAYLOADB(0,1)<2> SRC_VB(0,0)
+
+ mov (8) MSGPAYLOADD(0,0)<1> SRC_UD(0)
+
+ send (8) NULLREG MSGHDR MSGSRC<8;8,1>:ud DAPWRITE MSG_LEN(1)+DWBWMSGDSC+BI_DEST_UV // Write 1 GRF
+
+// End of saveNV12_16x4.asm
diff --git a/src/shaders/h264/ildb/saveNV12_16x4T.asm b/src/shaders/h264/ildb/saveNV12_16x4T.asm new file mode 100644 index 00000000..66085d14 --- /dev/null +++ b/src/shaders/h264/ildb/saveNV12_16x4T.asm @@ -0,0 +1,113 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: saveNV12_16x4T.asm
+//
+// Transpose 16x4 to 4x16 YNV12 data and write to memory
+//
+//----------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Left MB region:
+// PREV_MB_YB: Base=rxx ElementSize=1 SrcRegion=REGION(16,1) Type=ub
+// PREV_MB_UW: Base=ryy ElementSize=2 SrcRegion=REGION(8,1) Type=uw
+
+// Binding table index:
+// BI_SRC_Y: Binding table index of Y surface
+// BI_SRC_UV: Binding table index of UV surface (NV12)
+//
+// Temp buffer:
+// BUF_B: BUF_B Base=rxx ElementSize=1 SrcRegion=REGION(16,1) Type=ub
+// BUF_W: BUF_W Base=rxx ElementSize=1 SrcRegion=REGION(8,1) Type=uw
+//
+//
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD6:w
+#endif
+
+ mov (2) MSGSRC.0<1>:ud ORIX_LEFT<2;2,1>:w // Block origin
+ mov (1) MSGSRC.2<1>:ud 0x000F0003:ud // 4x16
+
+// Transpose Y, save them to MRFs
+
+// 16x4 Y src in GRF (each pix is specified as yx)
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |f1 e1 d1 c1 b1 a1 91 81 71 61 51 41 31 21 11 01 f0 e0 d0 c0 b0 a0 90 80 70 60 50 40 30 20 10 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |f3 e3 d3 c3 b3 a3 93 83 73 63 53 43 33 23 13 03 f2 e2 d2 c2 b2 a2 92 82 72 62 52 42 32 22 12 02|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+//
+// First step (16) <1> <=== <16;4,1>
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |73 63 53 43 72 62 52 42 71 61 51 41 70 60 50 40 33 23 13 03 32 22 12 02 31 21 11 01 30 20 10 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |f3 e3 d3 c3 f2 e2 d2 c2 f1 e1 d1 c1 f0 e0 d0 c0 b3 a3 93 83 b2 a2 92 82 b1 a1 91 81 b0 a0 90 80|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+
+ // The first step
+ mov (16) BUF_B(0,0)<1> PREV_MB_YB(0,0)<16;4,1>
+ mov (16) BUF_B(0,16)<1> PREV_MB_YB(0,4)<16;4,1>
+ mov (16) BUF_B(1,0)<1> PREV_MB_YB(0,8)<16;4,1>
+ mov (16) BUF_B(1,16)<1> PREV_MB_YB(0,12)<16;4,1>
+
+//
+// Second step (16) <1> <=== <1;4,4>
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |73 72 71 70 63 62 61 60 53 52 51 50 43 42 41 40 33 32 31 30 23 22 21 20 13 12 11 10 03 02 01 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |f3 f2 f1 f0 e3 e2 e1 e0 d3 d2 d1 d0 c3 c2 c1 c0 b3 b2 b1 b0 a3 a2 a1 a0 93 92 91 90 83 82 81 80|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+//
+ // The second step
+// mov (16) MSGPAYLOADB(0,0)<1> BUF_B(0,0)<32;8,4> // Read 2 rows, write 1 row
+// mov (16) MSGPAYLOADB(0,16)<1> BUF_B(0,1)<32;8,4>
+// mov (16) MSGPAYLOADB(1,0)<1> BUF_B(0,2)<32;8,4>
+// mov (16) MSGPAYLOADB(1,16)<1> BUF_B(0,3)<32;8,4>
+
+ mov (16) MSGPAYLOADB(0,0)<1> BUF_B(0,0)<1;4,4>
+ mov (16) MSGPAYLOADB(0,16)<1> BUF_B(0,16)<1;4,4>
+ mov (16) MSGPAYLOADB(1,0)<1> BUF_B(1,0)<1;4,4>
+ mov (16) MSGPAYLOADB(1,16)<1> BUF_B(1,16)<1;4,4>
+
+// Transposed Y in 4x16 is ready for writting to dataport.
+//
+ send (8) NULLREG MSGHDR MSGSRC<8;8,1>:ud DAPWRITE MSG_LEN(2)+DWBWMSGDSC+BI_DEST_Y // Write 2 GRFs
+
+
+
+/////////////////////////////////////////////////////////////////////////////////////////////////////
+
+ // Transpose U/V, save them to MRFs in NV12 format
+ asr (1) MSGSRC.1:ud MSGSRC.1:ud 1:w // NV12 U+V block origin y = half of Y comp
+ mov (1) MSGSRC.2<1>:ud 0x00070003:ud // NV12 U+V block width and height (4x8)
+
+
+// 16x2 UV src in GRF (each pix is specified as yx)
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |71 71 61 61 51 51 41 41 31 31 21 21 11 11 01 01 70 70 60 60 50 50 40 40 30 30 20 20 10 10 00 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+//
+// First step (8) <1> <=== <8;4,1>:w
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |71 71 61 61 51 51 41 41 70 70 60 60 50 50 40 40 31 31 21 21 11 11 01 01 30 30 20 20 10 10 00 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+ mov (8) BUF_W(0,0)<1> PREV_MB_UW(0,0)<8;4,1>
+ mov (8) BUF_W(0,8)<1> PREV_MB_UW(0,4)<8;4,1>
+
+// Second step (8) <1> <=== <1;2,4>
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |71 71 70 70 61 61 60 60 51 51 50 50 41 41 40 40 31 31 30 30 21 21 20 20 11 11 10 10 01 01 00 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+ mov (8) MSGPAYLOADW(0,0)<1> BUF_W(0,0)<1;2,4>
+ mov (8) MSGPAYLOADW(0,8)<1> BUF_W(0,8)<1;2,4>
+
+// Transposed U+V in NV12 in 4x8 is ready for writting to dataport.
+
+ send (8) NULLREG MSGHDR MSGSRC<8;8,1>:ud DAPWRITE MSG_LEN(1)+DWBWMSGDSC+BI_DEST_UV // Write 1 GRF
+
+
diff --git a/src/shaders/h264/ildb/save_Cur_UV_8x8.asm b/src/shaders/h264/ildb/save_Cur_UV_8x8.asm new file mode 100644 index 00000000..8959021b --- /dev/null +++ b/src/shaders/h264/ildb/save_Cur_UV_8x8.asm @@ -0,0 +1,53 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: save_Cur_UV_8x8.asm
+//
+// Save UV 8x8 block (8x8U + 8x8V in NV12)
+//
+//----------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Source region in :ud
+// SRC_UD: SRC_UD Base=rxx ElementSize=4 SrcRegion=REGION(8,1) Type=ud // 4 GRF
+//
+// Binding table index:
+// BI_DEST_UV: Binding table index of UV surface (NV12)
+//
+//----------------------------------------------------------------
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD4:w
+#endif
+
+#if defined(_FIELD)
+ and.nz.f0.1 (1) NULLREGW BitFields:w BotFieldFlag:w // Get bottom field flag
+#endif
+
+ mov (1) MSGSRC.0:ud ORIX_CUR:w { NoDDClr } // Block origin
+ asr (1) MSGSRC.1:ud ORIY_CUR:w 1:w { NoDDClr, NoDDChk } // NV12 U+V block origin y = half of Y comp
+ mov (1) MSGSRC.2:ud 0x0007000F:ud { NoDDChk } // NV12 U+V block width and height (16x8)
+
+ mov (16) MSGPAYLOADD(0)<1> SRC_UD(0) // Compressed inst
+ mov (16) MSGPAYLOADD(2)<1> SRC_UD(2)
+
+#if defined(_PROGRESSIVE)
+ mov (1) MSGDSC MSG_LEN(4)+DWBWMSGDSC+BI_DEST_UV:ud
+// send (8) NULLREG MSGHDR MSGSRC<8;8,1>:ud DWBWMSGDSC+0x00400000+BI_DEST_UV
+#endif
+
+#if defined(_FIELD)
+ // Field picture
+ (f0.1) mov (1) MSGDSC MSG_LEN(4)+DWBWMSGDSC+ENMSGDSCBF+BI_DEST_UV:ud // Write 4 GRFs to DEST_UV bottom field
+ (-f0.1) mov (1) MSGDSC MSG_LEN(4)+DWBWMSGDSC+ENMSGDSCTF+BI_DEST_UV:ud // Write 4 GRFs to DEST_UV top field
+
+#endif
+
+ send (8) null:ud MSGHDR MSGSRC<8;8,1>:ud DAPWRITE MSGDSC
+
+// End of save_Cur_UV_8x8.asm
diff --git a/src/shaders/h264/ildb/save_Cur_UV_8x8_Mbaff.asm b/src/shaders/h264/ildb/save_Cur_UV_8x8_Mbaff.asm new file mode 100644 index 00000000..6f469eaa --- /dev/null +++ b/src/shaders/h264/ildb/save_Cur_UV_8x8_Mbaff.asm @@ -0,0 +1,62 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: save_Cur_UV_8x8.asm
+//
+// Save UV 8x8 block (8x8U + 8x8V in NV12)
+//
+//----------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Source region in :ud
+// SRC_UD: SRC_UD Base=rxx ElementSize=4 SrcRegion=REGION(8,1) Type=ud // 4 GRF
+//
+// Binding table index:
+// BI_DEST_UV: Binding table index of UV surface (NV12)
+//
+//----------------------------------------------------------------
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD4:w
+#endif
+
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FieldModeCurrentMbFlag:w
+
+ and.nz.f0.1 (1) NULLREGW BitFields:w BotFieldFlag:w
+
+ mov (1) MSGSRC.0:ud ORIX_CUR:w { NoDDClr } // Block origin
+ asr (1) MSGSRC.1:ud ORIY_CUR:w 1:w { NoDDClr, NoDDChk } // NV12 U+V block origin y = half of Y comp
+ mov (1) MSGSRC.2:ud 0x0007000F:ud { NoDDChk } // NV12 U+V block width and height (16x8)
+
+ mov (16) MSGPAYLOADD(0)<1> SRC_UD(0) // Compressed inst
+ mov (16) MSGPAYLOADD(2)<1> SRC_UD(2)
+
+ // Set message descriptor
+
+ (f0.0) if (1) ELSE_UV_8X8
+
+ // Frame picture
+ mov (1) MSGDSC MSG_LEN(4)+DWBWMSGDSC+BI_DEST_UV:ud // Write 4 GRFs to DEST_UV
+
+ (f0.1) add (1) MSGSRC.1:d MSGSRC.1:d 8:w // Add vertical offset 8 for bot MB in MBAFF mode
+
+ELSE_UV_8X8:
+ else (1) ENDIF_UV_8X8
+
+ // Field picture
+ (f0.1) mov (1) MSGDSC MSG_LEN(4)+DWBWMSGDSC+ENMSGDSCBF+BI_DEST_UV:ud // Write 4 GRFs to DEST_UV bottom field
+ (-f0.1) mov (1) MSGDSC MSG_LEN(4)+DWBWMSGDSC+ENMSGDSCTF+BI_DEST_UV:ud // Write 4 GRFs to DEST_UV top field
+
+ asr (1) MSGSRC.1:d MSGSRC.1:d 1:w // Reduce y by half in field access mode
+
+ endif
+ENDIF_UV_8X8:
+
+ send (8) null:ud MSGHDR MSGSRC<8;8,1>:ud DAPWRITE MSGDSC
+
+// End of save_Cur_UV_8x8.asm
diff --git a/src/shaders/h264/ildb/save_Cur_Y_16x16.asm b/src/shaders/h264/ildb/save_Cur_Y_16x16.asm new file mode 100644 index 00000000..0178b01c --- /dev/null +++ b/src/shaders/h264/ildb/save_Cur_Y_16x16.asm @@ -0,0 +1,56 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: save_Cur_Y_16x16.asm
+//
+// Save a Y 16x16 block
+//
+//----------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Source region in :ud
+// SRC_YD: SRC_YD Base=rxx ElementSize=4 SrcRegion=REGION(8,1) Type=ud // 8 GRFs
+//
+// Binding table index:
+// BI_DEST_Y: Binding table index of Y surface
+//
+//----------------------------------------------------------------
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD4:w
+#endif
+
+#if defined(_FIELD)
+ and.nz.f0.1 (1) NULLREGW BitFields:w BotFieldFlag:w // Get bottom field flag
+#endif
+
+ mov (2) MSGSRC.0<1>:ud ORIX_CUR<2;2,1>:w { NoDDClr } // Block origin
+ mov (1) MSGSRC.2<1>:ud 0x000F000F:ud { NoDDChk } // Block width and height (16x16)
+
+ // Pack Y
+ mov (16) MSGPAYLOADD(0)<1> SRC_YD(0) // Compressed inst
+ mov (16) MSGPAYLOADD(2)<1> SRC_YD(2)
+ mov (16) MSGPAYLOADD(4)<1> SRC_YD(4)
+ mov (16) MSGPAYLOADD(6)<1> SRC_YD(6)
+
+
+#if defined(_PROGRESSIVE)
+ mov (1) MSGDSC MSG_LEN(8)+DWBWMSGDSC+BI_DEST_Y:ud
+// send (8) NULLREG MSGHDR MSGSRC<8;8,1>:ud DWBWMSGDSC+0x00800000+BI_DEST_Y
+#endif
+
+#if defined(_FIELD)
+ // Field picture
+ (f0.1) mov (1) MSGDSC MSG_LEN(8)+DWBWMSGDSC+ENMSGDSCBF+BI_DEST_Y:ud // Write 8 GRFs to DEST_Y bottom field
+ (-f0.1) mov (1) MSGDSC MSG_LEN(8)+DWBWMSGDSC+ENMSGDSCTF+BI_DEST_Y:ud // Write 8 GRFs to DEST_Y top field
+
+#endif
+
+ send (8) null:ud MSGHDR MSGSRC<8;8,1>:ud DAPWRITE MSGDSC
+
+// End of save_Cur_Y_16x16.asm
diff --git a/src/shaders/h264/ildb/save_Cur_Y_16x16_Mbaff.asm b/src/shaders/h264/ildb/save_Cur_Y_16x16_Mbaff.asm new file mode 100644 index 00000000..6ab78dc0 --- /dev/null +++ b/src/shaders/h264/ildb/save_Cur_Y_16x16_Mbaff.asm @@ -0,0 +1,64 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: save_Cur_Y_16x16.asm
+//
+// Save a Y 16x16 block
+//
+//----------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Source region in :ud
+// SRC_YD: SRC_YD Base=rxx ElementSize=4 SrcRegion=REGION(8,1) Type=ud // 8 GRFs
+//
+// Binding table index:
+// BI_DEST_Y: Binding table index of Y surface
+//
+//----------------------------------------------------------------
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD4:w
+#endif
+
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FieldModeCurrentMbFlag:w
+
+ and.nz.f0.1 (1) NULLREGW BitFields:w BotFieldFlag:w
+
+ mov (2) MSGSRC.0<1>:ud ORIX_CUR<2;2,1>:w { NoDDClr } // Block origin
+ mov (1) MSGSRC.2<1>:ud 0x000F000F:ud { NoDDChk } // Block width and height (16x16 or 12x16)
+
+ // Pack Y
+ mov (16) MSGPAYLOADD(0)<1> SRC_YD(0) // Compressed inst
+ mov (16) MSGPAYLOADD(2)<1> SRC_YD(2)
+ mov (16) MSGPAYLOADD(4)<1> SRC_YD(4)
+ mov (16) MSGPAYLOADD(6)<1> SRC_YD(6)
+
+ // Set message descriptor
+
+ (f0.0) if (1) ELSE_Y_16x16
+
+ // Frame picture
+ mov (1) MSGDSC MSG_LEN(8)+DWBWMSGDSC+BI_DEST_Y:ud // Write 8 GRFs to DEST_Y
+
+ (f0.1) add (1) MSGSRC.1:d MSGSRC.1:d 16:w // Add vertical offset 16 for bot MB in MBAFF mode
+
+ELSE_Y_16x16:
+ else (1) ENDIF_Y_16x16
+
+ // Field picture
+ (f0.1) mov (1) MSGDSC MSG_LEN(8)+DWBWMSGDSC+ENMSGDSCBF+BI_DEST_Y:ud // Write 8 GRFs to DEST_Y bottom field
+ (-f0.1) mov (1) MSGDSC MSG_LEN(8)+DWBWMSGDSC+ENMSGDSCTF+BI_DEST_Y:ud // Write 8 GRFs to DEST_Y top field
+
+ asr (1) MSGSRC.1:d MSGSRC.1:d 1:w // Reduce y by half in field access mode
+
+ endif
+ENDIF_Y_16x16:
+
+ send (8) null:ud MSGHDR MSGSRC<8;8,1>:ud DAPWRITE MSGDSC
+
+// End of save_Cur_Y_16x16.asm
diff --git a/src/shaders/h264/ildb/save_Left_UV_8x2T.asm b/src/shaders/h264/ildb/save_Left_UV_8x2T.asm new file mode 100644 index 00000000..172002ee --- /dev/null +++ b/src/shaders/h264/ildb/save_Left_UV_8x2T.asm @@ -0,0 +1,72 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: save_Left_UV_8x2T.asm
+//
+// Transpose 8x2 to 2x8 UV data and write to memory
+//
+//----------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Left MB region:
+// PREV_MB_UW: Base=ryy ElementSize=2 SrcRegion=REGION(8,1) Type=uw
+
+// Binding table index:
+// BI_SRC_UV: Binding table index of UV surface (NV12)
+//
+// Temp buffer:
+// BUF_W: BUF_W Base=rxx ElementSize=1 SrcRegion=REGION(8,1) Type=uw
+//
+//
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD6:w
+#endif
+
+#if defined(_FIELD)
+ and.nz.f0.1 (1) NULLREGW BitFields:w BotFieldFlag:w // Get bottom field flag
+#endif
+
+ // Transpose U/V, save them to MRFs in NV12 format
+ mov (1) MSGSRC.0:ud ORIX_LEFT:w { NoDDClr } // Block origin
+ asr (1) MSGSRC.1:ud ORIY_LEFT:w 1:w { NoDDClr, NoDDChk } // NV12 U+V block origin y = half of Y comp
+ mov (1) MSGSRC.2:ud 0x00070003:ud { NoDDChk } // NV12 U+V block width and height (4x8)
+
+
+// 16x2 UV src in GRF (each pix is specified as yx)
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |71 71 61 61 51 51 41 41 31 31 21 21 11 11 01 01 70 70 60 60 50 50 40 40 30 30 20 20 10 10 00 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+//
+// First step (8) <1> <=== <8;4,1>:w
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |71 71 61 61 51 51 41 41 70 70 60 60 50 50 40 40 31 31 21 21 11 11 01 01 30 30 20 20 10 10 00 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+ mov (8) LEFT_TEMP_W(0,0)<1> PREV_MB_UW(0,0)<8;4,1> { NoDDClr }
+ mov (8) LEFT_TEMP_W(0,8)<1> PREV_MB_UW(0,4)<8;4,1> { NoDDChk }
+
+// Second step (8) <1> <=== <1;2,4>
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |71 71 70 70 61 61 60 60 51 51 50 50 41 41 40 40 31 31 30 30 21 21 20 20 11 11 10 10 01 01 00 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+ mov (8) MSGPAYLOADW(0,0)<1> LEFT_TEMP_W(0,0)<1;2,4>
+ mov (8) MSGPAYLOADW(0,8)<1> LEFT_TEMP_W(0,8)<1;2,4>
+
+// Transposed U+V in NV12 in 4x8 is ready for writting to dataport.
+
+#if defined(_PROGRESSIVE)
+ mov (1) MSGDSC MSG_LEN(1)+DWBWMSGDSC+BI_DEST_UV:ud
+// send (8) NULLREG MSGHDR MSGSRC<8;8,1>:ud DWBWMSGDSC+0x00100000+BI_DEST_UV
+#endif
+
+#if defined(_FIELD)
+ // Field picture
+ (f0.1) mov (1) MSGDSC MSG_LEN(1)+DWBWMSGDSC+ENMSGDSCBF+BI_DEST_UV:ud // Write 1 GRF to DEST_UV bottom field
+ (-f0.1) mov (1) MSGDSC MSG_LEN(1)+DWBWMSGDSC+ENMSGDSCTF+BI_DEST_UV:ud // Write 1 GRF to DEST_UV top field
+
+#endif
+ send (8) null:ud MSGHDR MSGSRC<8;8,1>:ud DAPWRITE MSGDSC
diff --git a/src/shaders/h264/ildb/save_Left_UV_8x2T_Mbaff.asm b/src/shaders/h264/ildb/save_Left_UV_8x2T_Mbaff.asm new file mode 100644 index 00000000..f98b3119 --- /dev/null +++ b/src/shaders/h264/ildb/save_Left_UV_8x2T_Mbaff.asm @@ -0,0 +1,82 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: save_Left_UV_8x2T.asm
+//
+// Transpose 8x2 to 2x8 UV data and write to memory
+//
+//----------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Left MB region:
+// PREV_MB_UW: Base=ryy ElementSize=2 SrcRegion=REGION(8,1) Type=uw
+
+// Binding table index:
+// BI_SRC_UV: Binding table index of UV surface (NV12)
+//
+// Temp buffer:
+// BUF_W: BUF_W Base=rxx ElementSize=1 SrcRegion=REGION(8,1) Type=uw
+//
+//
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD6:w
+#endif
+
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FieldModeCurrentMbFlag:w
+
+ and.nz.f0.1 (1) NULLREGW BitFields:w BotFieldFlag:w
+
+ // Transpose U/V, save them to MRFs in NV12 format
+ mov (1) MSGSRC.0:ud ORIX_LEFT:w { NoDDClr } // Block origin
+ asr (1) MSGSRC.1:ud ORIY_LEFT:w 1:w { NoDDClr, NoDDChk } // NV12 U+V block origin y = half of Y comp
+ mov (1) MSGSRC.2:ud 0x00070003:ud { NoDDChk } // NV12 U+V block width and height (4x8)
+
+
+// 16x2 UV src in GRF (each pix is specified as yx)
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |71 71 61 61 51 51 41 41 31 31 21 21 11 11 01 01 70 70 60 60 50 50 40 40 30 30 20 20 10 10 00 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+//
+// First step (8) <1> <=== <8;4,1>:w
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |71 71 61 61 51 51 41 41 70 70 60 60 50 50 40 40 31 31 21 21 11 11 01 01 30 30 20 20 10 10 00 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+ mov (8) BUF_W(0,0)<1> PREV_MB_UW(0,0)<8;4,1> { NoDDClr }
+ mov (8) BUF_W(0,8)<1> PREV_MB_UW(0,4)<8;4,1> { NoDDChk }
+
+// Second step (8) <1> <=== <1;2,4>
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |71 71 70 70 61 61 60 60 51 51 50 50 41 41 40 40 31 31 30 30 21 21 20 20 11 11 10 10 01 01 00 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+ mov (8) MSGPAYLOADW(0,0)<1> BUF_W(0,0)<1;2,4>
+ mov (8) MSGPAYLOADW(0,8)<1> BUF_W(0,8)<1;2,4>
+
+// Transposed U+V in NV12 in 4x8 is ready for writting to dataport.
+
+ // Set message descriptor
+
+ (f0.0) if (1) ELSE_UV_8X2T
+
+ // Frame picture
+ mov (1) MSGDSC MSG_LEN(1)+DWBWMSGDSC+BI_DEST_UV:ud // Write 1 GRF to DEST_UV
+
+ (f0.1) add (1) MSGSRC.1:d MSGSRC.1:d 8:w // Add vertical offset 8 for bot MB in MBAFF mode
+
+ELSE_UV_8X2T:
+ else (1) ENDIF_UV_8X2T
+
+ // Field picture
+ (f0.1) mov (1) MSGDSC MSG_LEN(1)+DWBWMSGDSC+ENMSGDSCBF+BI_DEST_UV:ud // Write 1 GRF to DEST_UV bottom field
+ (-f0.1) mov (1) MSGDSC MSG_LEN(1)+DWBWMSGDSC+ENMSGDSCTF+BI_DEST_UV:ud // Write 1 GRF to DEST_UV top field
+
+ asr (1) MSGSRC.1:d MSGSRC.1:d 1:w // Reduce y by half in field access mode
+
+ endif
+ENDIF_UV_8X2T:
+
+ send (8) null:ud MSGHDR MSGSRC<8;8,1>:ud DAPWRITE MSGDSC
diff --git a/src/shaders/h264/ildb/save_Left_Y_16x4T.asm b/src/shaders/h264/ildb/save_Left_Y_16x4T.asm new file mode 100644 index 00000000..84d81e9f --- /dev/null +++ b/src/shaders/h264/ildb/save_Left_Y_16x4T.asm @@ -0,0 +1,89 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: save_Left_Y_16x4T.asm
+//
+// Transpose 16x4 to 4x16 Y data and write to memory
+//
+//----------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Left MB region:
+// PREV_MB_YB: Base=rxx ElementSize=1 SrcRegion=REGION(16,1) Type=ub
+
+// Binding table index:
+// BI_SRC_Y: Binding table index of Y surface
+//
+// Temp buffer:
+// BUF_B: BUF_B Base=rxx ElementSize=1 SrcRegion=REGION(16,1) Type=ub
+//
+//
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD6:w
+#endif
+
+#if defined(_FIELD)
+ and.nz.f0.1 (1) NULLREGW BitFields:w BotFieldFlag:w // Get bottom field flag
+#endif
+
+ mov (2) MSGSRC.0<1>:ud ORIX_LEFT<2;2,1>:w { NoDDClr } // Block origin
+ mov (1) MSGSRC.2<1>:ud 0x000F0003:ud { NoDDChk } // 4x16
+
+// Transpose Y, save them to MRFs
+
+// 16x4 Y src in GRF (each pix is specified as yx)
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |f1 e1 d1 c1 b1 a1 91 81 71 61 51 41 31 21 11 01 f0 e0 d0 c0 b0 a0 90 80 70 60 50 40 30 20 10 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |f3 e3 d3 c3 b3 a3 93 83 73 63 53 43 33 23 13 03 f2 e2 d2 c2 b2 a2 92 82 72 62 52 42 32 22 12 02|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+//
+// First step (16) <1> <=== <16;4,1>
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |73 63 53 43 72 62 52 42 71 61 51 41 70 60 50 40 33 23 13 03 32 22 12 02 31 21 11 01 30 20 10 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |f3 e3 d3 c3 f2 e2 d2 c2 f1 e1 d1 c1 f0 e0 d0 c0 b3 a3 93 83 b2 a2 92 82 b1 a1 91 81 b0 a0 90 80|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+
+ // The first step
+ mov (16) LEFT_TEMP_B(0,0)<1> PREV_MB_YB(0,0)<16;4,1> { NoDDClr }
+ mov (16) LEFT_TEMP_B(0,16)<1> PREV_MB_YB(0,4)<16;4,1> { NoDDChk }
+ mov (16) LEFT_TEMP_B(1,0)<1> PREV_MB_YB(0,8)<16;4,1> { NoDDClr }
+ mov (16) LEFT_TEMP_B(1,16)<1> PREV_MB_YB(0,12)<16;4,1> { NoDDChk }
+
+//
+// Second step (16) <1> <=== <1;4,4>
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |73 72 71 70 63 62 61 60 53 52 51 50 43 42 41 40 33 32 31 30 23 22 21 20 13 12 11 10 03 02 01 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |f3 f2 f1 f0 e3 e2 e1 e0 d3 d2 d1 d0 c3 c2 c1 c0 b3 b2 b1 b0 a3 a2 a1 a0 93 92 91 90 83 82 81 80|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+//
+ // The second step
+ mov (16) MSGPAYLOADB(0,0)<1> LEFT_TEMP_B(0,0)<1;4,4>
+ mov (16) MSGPAYLOADB(0,16)<1> LEFT_TEMP_B(0,16)<1;4,4>
+ mov (16) MSGPAYLOADB(1,0)<1> LEFT_TEMP_B(1,0)<1;4,4>
+ mov (16) MSGPAYLOADB(1,16)<1> LEFT_TEMP_B(1,16)<1;4,4>
+
+// Transposed Y in 4x16 is ready for writting to dataport.
+
+
+#if defined(_PROGRESSIVE)
+ mov (1) MSGDSC MSG_LEN(2)+DWBWMSGDSC+BI_DEST_Y:ud
+// send (8) NULLREG MSGHDR MSGSRC<8;8,1>:ud DWBWMSGDSC+0x00200000+BI_DEST_Y
+#endif
+
+#if defined(_FIELD)
+ // Field picture
+ (f0.1) mov (1) MSGDSC MSG_LEN(2)+DWBWMSGDSC+ENMSGDSCBF+BI_DEST_Y:ud // Write 2 GRFs to DEST_Y bottom field
+ (-f0.1) mov (1) MSGDSC MSG_LEN(2)+DWBWMSGDSC+ENMSGDSCTF+BI_DEST_Y:ud // Write 2 GRFs to DEST_Y top field
+
+#endif
+
+ send (8) null:ud MSGHDR MSGSRC<8;8,1>:ud DAPWRITE MSGDSC
+
diff --git a/src/shaders/h264/ildb/save_Left_Y_16x4T_Mbaff.asm b/src/shaders/h264/ildb/save_Left_Y_16x4T_Mbaff.asm new file mode 100644 index 00000000..977ad4f3 --- /dev/null +++ b/src/shaders/h264/ildb/save_Left_Y_16x4T_Mbaff.asm @@ -0,0 +1,101 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: save_Left_Y_16x4T.asm
+//
+// Transpose 16x4 to 4x16 Y data and write to memory
+//
+//----------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Left MB region:
+// PREV_MB_YB: Base=rxx ElementSize=1 SrcRegion=REGION(16,1) Type=ub
+
+// Binding table index:
+// BI_SRC_Y: Binding table index of Y surface
+//
+// Temp buffer:
+// BUF_B: BUF_B Base=rxx ElementSize=1 SrcRegion=REGION(16,1) Type=ub
+//
+//
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD6:w
+#endif
+
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FieldModeCurrentMbFlag:w
+
+ and.nz.f0.1 (1) NULLREGW BitFields:w BotFieldFlag:w
+
+ mov (2) MSGSRC.0<1>:ud ORIX_LEFT<2;2,1>:w { NoDDClr } // Block origin
+ mov (1) MSGSRC.2<1>:ud 0x000F0003:ud { NoDDChk } // 4x16
+
+// Transpose Y, save them to MRFs
+
+// 16x4 Y src in GRF (each pix is specified as yx)
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |f1 e1 d1 c1 b1 a1 91 81 71 61 51 41 31 21 11 01 f0 e0 d0 c0 b0 a0 90 80 70 60 50 40 30 20 10 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |f3 e3 d3 c3 b3 a3 93 83 73 63 53 43 33 23 13 03 f2 e2 d2 c2 b2 a2 92 82 72 62 52 42 32 22 12 02|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+//
+// First step (16) <1> <=== <16;4,1>
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |73 63 53 43 72 62 52 42 71 61 51 41 70 60 50 40 33 23 13 03 32 22 12 02 31 21 11 01 30 20 10 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |f3 e3 d3 c3 f2 e2 d2 c2 f1 e1 d1 c1 f0 e0 d0 c0 b3 a3 93 83 b2 a2 92 82 b1 a1 91 81 b0 a0 90 80|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+
+ // The first step
+ mov (16) BUF_B(0,0)<1> PREV_MB_YB(0,0)<16;4,1> { NoDDClr }
+ mov (16) BUF_B(0,16)<1> PREV_MB_YB(0,4)<16;4,1> { NoDDChk }
+ mov (16) BUF_B(1,0)<1> PREV_MB_YB(0,8)<16;4,1> { NoDDClr }
+ mov (16) BUF_B(1,16)<1> PREV_MB_YB(0,12)<16;4,1> { NoDDChk }
+
+//
+// Second step (16) <1> <=== <1;4,4>
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |73 72 71 70 63 62 61 60 53 52 51 50 43 42 41 40 33 32 31 30 23 22 21 20 13 12 11 10 03 02 01 00|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+// |f3 f2 f1 f0 e3 e2 e1 e0 d3 d2 d1 d0 c3 c2 c1 c0 b3 b2 b1 b0 a3 a2 a1 a0 93 92 91 90 83 82 81 80|
+// +-----------------------+-----------------------+-----------------------+-----------------------+
+//
+ // The second step
+ mov (16) MSGPAYLOADB(0,0)<1> BUF_B(0,0)<1;4,4>
+ mov (16) MSGPAYLOADB(0,16)<1> BUF_B(0,16)<1;4,4>
+ mov (16) MSGPAYLOADB(1,0)<1> BUF_B(1,0)<1;4,4>
+ mov (16) MSGPAYLOADB(1,16)<1> BUF_B(1,16)<1;4,4>
+
+// Transposed Y in 4x16 is ready for writting to dataport.
+
+ //***** Left MB is loaded the same as indicated by FieldModeCurrentMbFlag.
+
+ // Set message descriptor
+
+ (f0.0) if (1) ELSE_Y_16x4T
+
+ // Frame picture
+ mov (1) MSGDSC MSG_LEN(2)+DWBWMSGDSC+BI_DEST_Y:ud // Write 2 GRFs to DEST_Y
+
+ (f0.1) add (1) MSGSRC.1:d MSGSRC.1:d 16:w // Add vertical offset 16 for bot MB in MBAFF mode
+
+ELSE_Y_16x4T:
+ else (1) ENDIF_Y_16x4T
+
+ // Field picture
+ (f0.1) mov (1) MSGDSC MSG_LEN(2)+DWBWMSGDSC+ENMSGDSCBF+BI_DEST_Y:ud // Write 2 GRFs to DEST_Y bottom field
+ (-f0.1) mov (1) MSGDSC MSG_LEN(2)+DWBWMSGDSC+ENMSGDSCTF+BI_DEST_Y:ud // Write 2 GRFs to DEST_Y top field
+
+ asr (1) MSGSRC.1:d MSGSRC.1:d 1:w // Reduce y by half in field access mode
+
+ endif
+ENDIF_Y_16x4T:
+
+ send (8) null:ud MSGHDR MSGSRC<8;8,1>:ud DAPWRITE MSGDSC
+
+
+
diff --git a/src/shaders/h264/ildb/save_Top_UV_8x2.asm b/src/shaders/h264/ildb/save_Top_UV_8x2.asm new file mode 100644 index 00000000..5263c351 --- /dev/null +++ b/src/shaders/h264/ildb/save_Top_UV_8x2.asm @@ -0,0 +1,52 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: save_Top_UV_8x2.asm
+//
+// Save UV 8x2 block (8x2U + 8x2V in NV12)
+//
+//----------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Source region in :ud
+// SRC_UD: SRC_UD Base=rxx ElementSize=4 SrcRegion=REGION(8,1) Type=ud // 1 GRF
+//
+// Binding table index:
+// BI_DEST_UV: Binding table index of UV surface (NV12)
+//
+//----------------------------------------------------------------
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD5:w
+#endif
+
+#if defined(_FIELD)
+ and.nz.f0.1 (1) NULLREGW BitFields:w BotFieldFlag:w // Get bottom field flag
+#endif
+
+ mov (1) MSGSRC.0:ud ORIX_TOP:w { NoDDClr } // Block origin
+ asr (1) MSGSRC.1:ud ORIY_TOP:w 1:w { NoDDClr, NoDDChk } // NV12 U+V block origin y = half of Y comp
+ mov (1) MSGSRC.2:ud 0x0001000F:ud { NoDDChk } // NV12 U+V block width and height (16x2)
+
+ mov (8) MSGPAYLOADD(0,0)<1> TOP_MB_UD(0)
+
+
+#if defined(_PROGRESSIVE)
+ mov (1) MSGDSC MSG_LEN(1)+DWBWMSGDSC_WC+BI_DEST_UV:ud
+// send (8) NULLREG MSGHDR MSGSRC<8;8,1>:ud DWBWMSGDSC+0x00100000+BI_DEST_UV
+#endif
+
+#if defined(_FIELD)
+ // Field picture
+ (f0.1) mov (1) MSGDSC MSG_LEN(1)+DWBWMSGDSC_WC+ENMSGDSCBF+BI_DEST_UV:ud // Write 1 GRF to DEST_Y bottom field
+ (-f0.1) mov (1) MSGDSC MSG_LEN(1)+DWBWMSGDSC_WC+ENMSGDSCTF+BI_DEST_UV:ud // Write 1 GRF to DEST_Y top field
+
+#endif
+
+ send (8) WritebackResponse(0)<1> MSGHDR MSGSRC<8;8,1>:ud DAPWRITE MSGDSC
+// End of save_Top_UV_8x2.asm
diff --git a/src/shaders/h264/ildb/save_Top_UV_8x2_Mbaff.asm b/src/shaders/h264/ildb/save_Top_UV_8x2_Mbaff.asm new file mode 100644 index 00000000..ef2ba840 --- /dev/null +++ b/src/shaders/h264/ildb/save_Top_UV_8x2_Mbaff.asm @@ -0,0 +1,69 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: save_Top_UV_8x2.asm
+//
+// Save UV 8x2 block (8x2U + 8x2V in NV12)
+//
+//----------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Source region in :ud
+// SRC_UD: SRC_UD Base=rxx ElementSize=4 SrcRegion=REGION(8,1) Type=ud // 1 GRF
+//
+// Binding table index:
+// BI_DEST_UV: Binding table index of UV surface (NV12)
+//
+//----------------------------------------------------------------
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD5:w
+#endif
+ and.z.f0.1 (8) NULLREGW DualFieldMode<0;1,0>:w 1:w
+
+ // FieldModeCurrentMbFlag determines how to access above MB
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FieldModeCurrentMbFlag:w
+
+ // Pack U and V
+ mov (1) MSGSRC.0:ud ORIX_TOP:w { NoDDClr } // Block origin
+ asr (1) MSGSRC.1:ud ORIY_TOP:w 1:w { NoDDClr, NoDDChk } // NV12 U+V block origin y = half of Y comp
+ mov (1) MSGSRC.2:ud 0x0001000F:ud { NoDDChk } // NV12 U+V block width and height (16x2)
+
+ // Dual field mode
+ (f0.1) mov (8) MSGPAYLOADD(0)<1> PREV_MB_UD(0)
+ (-f0.1) mov (8) MSGPAYLOADD(0)<1> PREV_MB_UD(1) // for dual field mode, write last 2 rows
+
+ // Set message descriptor
+
+ and.nz.f0.1 (1) NULLREGW BitFields:w BotFieldFlag:w
+
+ (f0.0) if (1) ELSE_UV_8X2_SAVE
+
+ // Frame picture
+ mov (1) MSGDSC MSG_LEN(1)+DWBWMSGDSC_WC+BI_DEST_UV:ud // Write 1 GRFs to DEST_UV
+
+ // Add vertical offset 8 for bot MB in MBAFF mode
+ (f0.1) add (1) MSGSRC.1:d MSGSRC.1:d 8:w
+
+ELSE_UV_8X2_SAVE:
+ else (1) ENDIF_UV_8X2_SAVE
+
+ asr (1) MSGSRC.1:d ORIY_CUR:w 2:w // asr 1: NV12 U+V block origin y = half of Y comp
+ // asr 1: Reduce y by half in field access mode
+ // Field picture
+ (f0.1) mov (1) MSGDSC MSG_LEN(1)+DWBWMSGDSC_WC+ENMSGDSCBF+BI_DEST_UV:ud // Write 1 GRF to DEST_Y bottom field
+ (-f0.1) mov (1) MSGDSC MSG_LEN(1)+DWBWMSGDSC_WC+ENMSGDSCTF+BI_DEST_UV:ud // Write 1 GRF to DEST_Y top field
+
+ add (1) MSGSRC.1:d MSGSRC.1:d -2:w // for last 4 rows of above MB
+
+ endif
+ENDIF_UV_8X2_SAVE:
+
+ send (8) WritebackResponse(0)<1> MSGHDR MSGSRC<8;8,1>:ud DAPWRITE MSGDSC
+
+// End of save_Top_UV_8x2.asm
diff --git a/src/shaders/h264/ildb/save_Top_Y_16x4.asm b/src/shaders/h264/ildb/save_Top_Y_16x4.asm new file mode 100644 index 00000000..88890873 --- /dev/null +++ b/src/shaders/h264/ildb/save_Top_Y_16x4.asm @@ -0,0 +1,52 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: save_Top_Y_16x4.asm
+//
+// Save a Y 16x4 block
+//
+//----------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Source region in :ud
+// SRC_YD: SRC_YD Base=rxx ElementSize=4 SrcRegion=REGION(8,1) Type=ud // 2 GRFs
+//
+// Binding table index:
+// BI_DEST_Y: Binding table index of Y surface
+//
+//----------------------------------------------------------------
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD5:w
+#endif
+
+#if defined(_FIELD)
+ and.nz.f0.1 (1) NULLREGW BitFields:w BotFieldFlag:w // Get bottom field flag
+#endif
+
+ mov (2) MSGSRC.0<1>:ud ORIX_TOP<2;2,1>:w { NoDDClr } // Block origin
+ mov (1) MSGSRC.2<1>:ud 0x0003000F:ud { NoDDChk } // Block width and height (16x4)
+
+ // Pack Y
+ mov (16) MSGPAYLOADD(0)<1> TOP_MB_YD(0) // Compressed inst
+
+
+#if defined(_PROGRESSIVE)
+ mov (1) MSGDSC MSG_LEN(2)+DWBWMSGDSC_WC+BI_DEST_Y:ud
+// send (8) NULLREG MSGHDR MSGSRC<8;8,1>:ud DWBWMSGDSC+0x00200000+BI_DEST_Y
+#endif
+
+#if defined(_FIELD)
+ // Field picture
+ (f0.1) mov (1) MSGDSC MSG_LEN(2)+DWBWMSGDSC_WC+ENMSGDSCBF+BI_DEST_Y:ud // Write 2 GRFs to DEST_Y bottom field
+ (-f0.1) mov (1) MSGDSC MSG_LEN(2)+DWBWMSGDSC_WC+ENMSGDSCTF+BI_DEST_Y:ud // Write 2 GRFs to DEST_Y top field
+
+#endif
+
+ send (8) WritebackResponse(0)<1> MSGHDR MSGSRC<8;8,1>:ud DAPWRITE MSGDSC
+// End of save_Top_Y_16x4.asm
diff --git a/src/shaders/h264/ildb/save_Top_Y_16x4_Mbaff.asm b/src/shaders/h264/ildb/save_Top_Y_16x4_Mbaff.asm new file mode 100644 index 00000000..d8bb9a78 --- /dev/null +++ b/src/shaders/h264/ildb/save_Top_Y_16x4_Mbaff.asm @@ -0,0 +1,69 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: save_Top_Y_16x4.asm
+//
+// Save a Y 16x4 block
+//
+//----------------------------------------------------------------
+// Symbols need to be defined before including this module
+//
+// Source region in :ud
+// SRC_YD: SRC_YD Base=rxx ElementSize=4 SrcRegion=REGION(8,1) Type=ud // 2 GRFs
+//
+// Binding table index:
+// BI_DEST_Y: Binding table index of Y surface
+//
+//----------------------------------------------------------------
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0xDDD5:w
+#endif
+
+ and.z.f0.1 (16) NULLREGW DualFieldMode<0;1,0>:w 1:w
+
+ // FieldModeCurrentMbFlag determines how to access above MB
+ and.z.f0.0 (1) null:w r[ECM_AddrReg, BitFlags]:ub FieldModeCurrentMbFlag:w
+
+ mov (2) MSGSRC.0<1>:ud ORIX_TOP<2;2,1>:w { NoDDClr } // Block origin
+ mov (1) MSGSRC.2<1>:ud 0x0003000F:ud { NoDDChk } // Block width and height (16x4)
+
+ // Pack Y
+ // Dual field mode
+ (f0.1) mov (16) MSGPAYLOADD(0)<1> PREV_MB_YD(0) // Compressed inst
+ (-f0.1) mov (16) MSGPAYLOADD(0)<1> PREV_MB_YD(2) // for dual field mode, write last 4 rows
+
+ // Set message descriptor
+
+ and.nz.f0.1 (1) NULLREGW BitFields:w BotFieldFlag:w
+
+ (f0.0) if (1) ELSE_Y_16x4_SAVE
+
+ // Frame picture
+ mov (1) MSGDSC MSG_LEN(2)+DWBWMSGDSC_WC+BI_DEST_Y:ud // Write 2 GRFs to DEST_Y
+
+ // Add vertical offset 16 for bot MB in MBAFF mode
+ (f0.1) add (1) MSGSRC.1:d MSGSRC.1:d 16:w
+
+ELSE_Y_16x4_SAVE:
+ else (1) ENDIF_Y_16x4_SAVE
+
+ asr (1) MSGSRC.1:d ORIY_CUR:w 1:w // Reduce y by half in field access mode
+
+ // Field picture
+ (f0.1) mov (1) MSGDSC MSG_LEN(2)+DWBWMSGDSC_WC+ENMSGDSCBF+BI_DEST_Y:ud // Write 2 GRFs to DEST_Y bottom field
+ (-f0.1) mov (1) MSGDSC MSG_LEN(2)+DWBWMSGDSC_WC+ENMSGDSCTF+BI_DEST_Y:ud // Write 2 GRFs to DEST_Y top field
+
+ add (1) MSGSRC.1:d MSGSRC.1:d -4:w // for last 4 rows of above MB
+
+ endif
+ENDIF_Y_16x4_SAVE:
+
+ send (8) WritebackResponse(0)<1> MSGHDR MSGSRC<8;8,1>:ud DAPWRITE MSGDSC
+
+// End of save_Top_Y_16x4.asm
diff --git a/src/shaders/h264/ildb/writeURB.asm b/src/shaders/h264/ildb/writeURB.asm new file mode 100644 index 00000000..328d4d44 --- /dev/null +++ b/src/shaders/h264/ildb/writeURB.asm @@ -0,0 +1,38 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: WriteURB.asm
+//
+// General purpose module to write data to URB using the URB handle/offset in r0
+//
+//----------------------------------------------------------------
+// Assume:
+// - a0.0 and a0.1 is meg desc, has been assign with URB offset and msg size
+// - MRFs are alrady assigned with data.
+//----------------------------------------------------------------
+//
+// 16x16 byte pixel block can be saved using just 1 "send" instruction.
+
+#if defined(_DEBUG)
+ mov (1) EntrySignature:w 0x3535:w
+#endif
+
+// URB write header:
+//mov (8) MSGSRC.0:ud r0.0<8;8,1>:ud // Copy parent R0 header
+
+//shr (1) Temp2_W:uw URBOffset:uw 1:w // divide by 2, because URB entry is counted by 512bits. Offset is counted by 256bits.
+//add (1) MSGSRC.0:uw r0.0:uw Temp2_W:uw
+
+
+shr (1) MSGSRC.0:uw URBOffset:uw 1:w // divide by 2, because URB entry is counted by 512bits. Offset is counted by 256bits.
+//mov (1) MSGSRC.0:uw URBOffset_2:uw
+
+//mov (1) MSGSRC.1:ud 0:ud // Reset Handle 1
+
+send null:uw m0 MSGSRC<8;8,1>:uw URBWRITE URBWriteMsgDesc:ud // URB write
+//send null:ud MRF0 null:ud URBWriteMsgDesc:ud // URB write
diff --git a/src/shaders/h264/ildb/writeURB_UV_Child.asm b/src/shaders/h264/ildb/writeURB_UV_Child.asm new file mode 100644 index 00000000..cbb942d0 --- /dev/null +++ b/src/shaders/h264/ildb/writeURB_UV_Child.asm @@ -0,0 +1,39 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: WriteURB_Child.asm
+//
+// General purpose module to write data to URB using the URB handle/offset in r0
+//
+//----------------------------------------------------------------
+// Assume:
+// - a0.0 and a0.1 is meg desc, has been assign with URB offset and msg size
+// - MRFs are alrady assigned with data.
+//----------------------------------------------------------------
+//
+// 16x16 byte pixel block can be saved using just 1 "send" instruction.
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0x3535:w
+#endif
+
+// URB write header:
+//mov (8) MSGSRC.0:ud r0.0<8;8,1>:ud // Copy parent R0 header
+
+//shr (1) Temp2_W:uw URBOffsetC:uw 1:w // divide by 2, because URB entry is counted by 512bits. Offset is counted by 256bits.
+//add (1) MSGSRC.0:uw r0.0:uw Temp2_W:uw
+
+shr (1) MSGSRC.0:uw URBOffsetC:uw 1:w // divide by 2, because URB entry is counted by 512bits. Offset is counted by 256bits.
+
+//mov (1) MSGSRC.1:ud 0:ud // Reset Handle 1
+
+ // URB write 1 MRFs,
+ // Current MB offset is in URBOffset, use it as write origin
+ // Add 2 to offset to store data be be passed to the right MB
+
+send null:uw m0 MSGSRC<8;8,1>:uw URBWRITE MSG_LEN(1)+URBWMSGDSC+0x20 // URB write
diff --git a/src/shaders/h264/ildb/writeURB_Y_Child.asm b/src/shaders/h264/ildb/writeURB_Y_Child.asm new file mode 100644 index 00000000..9559bdae --- /dev/null +++ b/src/shaders/h264/ildb/writeURB_Y_Child.asm @@ -0,0 +1,40 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: WriteURB_Child.asm
+//
+// General purpose module to write data to URB using the URB handle/offset in r0
+//
+//----------------------------------------------------------------
+// Assume:
+// - a0.0 and a0.1 is meg desc, has been assign with URB offset and msg size
+// - MRFs are alrady assigned with data.
+//----------------------------------------------------------------
+//
+// 16x16 byte pixel block can be saved using just 1 "send" instruction.
+
+#if defined(_DEBUG)
+ mov (1) EntrySignatureC:w 0x3535:w
+#endif
+
+// URB write header:
+//mov (8) MSGSRC.0:ud r0.0<8;8,1>:ud // Copy parent R0 header
+
+//shr (1) Temp2_W:uw URBOffsetC:uw 1:w // divide by 2, because URB entry is counted by 512bits. Offset is counted by 256bits.
+//add (1) MSGSRC.0:uw r0.0:uw Temp2_W:uw
+
+shr (1) MSGSRC.0:uw URBOffsetC:uw 1:w // divide by 2, because URB entry is counted by 512bits. Offset is counted by 256bits.
+
+//mov (1) MSGSRC.1:ud 0:ud // Reset Handle 1
+
+ // URB write 2 MRFs,
+ // Current MB offset is in URBOffset, use it as write origin
+ // Add 2 to offset to store data be be passed to the right MB
+ //mov (1) URBWriteMsgDesc:ud 0x06300020:ud
+
+send null:uw m0 MSGSRC<8;8,1>:uw URBWRITE MSG_LEN(2)+URBWMSGDSC+0x20 // URB write
diff --git a/src/shaders/h264/mc/AVCMCInter.asm b/src/shaders/h264/mc/AVCMCInter.asm new file mode 100644 index 00000000..691fb33c --- /dev/null +++ b/src/shaders/h264/mc/AVCMCInter.asm @@ -0,0 +1,254 @@ +/*
+ * All inter-prediction macroblock kernels
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: AVCMCInter.asm
+
+#ifdef INTERLABEL
+#undef INTERLABEL
+#endif
+
+#if defined(MBAFF)
+// < MBaff_Motion >
+#define INTERLABEL(x) x##_##MBF
+#elif defined(FIELD)
+// < FieldMB_Motion >
+#define INTERLABEL(x) x##_##FLD
+#else // FRAME
+// < FrameMB_Motion >
+#define INTERLABEL(x) x##_##FRM
+#endif
+//
+// Decoding an inter-prediction macroblock (conditional compile)
+// -DMBAFF : MBAff picture MB
+// -DFRAME : Frame picture MB
+// -DFIELD : Field picture MB
+// -DMBAFF -DMONO : MBAff mono picture MB
+// -DFRAME -DMONO : Frame mono picture MB
+// -DFIELD -DMONO : Field mono picture MB
+
+
+//#if !defined(__AVCMCInter__) // Make sure this is only included once
+//#define __AVCMCInter__
+
+
+// TODO: header files need to be in sync with intra prediction
+#include "header.inc"
+#include "inter_Header.inc"
+
+// TODO: Kernel names for mono cases
+#if defined(MBAFF)
+.kernel MBAff_Motion
+MBAFF_MB:
+#elif defined(FIELD)
+.kernel FieldMB_Motion
+FIELD_MB:
+#else // Frame
+.kernel FrameMB_Motion
+FRAME_MB:
+#endif
+
+#ifdef _DEBUG
+// WA for FULSIM so we'll know which kernel is being debugged
+#if defined(MBAFF)
+mov (1) acc0:ud 0x0aaa55a5:ud
+#elif defined(FIELD)
+mov (1) acc0:ud 0x0baa55a5:ud
+#else // Frame
+mov (1) acc0:ud 0x0caa55a5:ud
+#endif
+#endif
+
+
+#ifdef SW_SCOREBOARD
+ CALL(scoreboard_start_inter,1)
+#endif
+
+ mov (8) gMSGSRC<1>:ud r0.0<8;8,1>:ud // Initialize message header payload with R0
+
+ and (1) gwMBTYPE<1> gMBTYPE:ub nMBTYPE_MASK:w // MB type
+ shl (2) gX<1>:w gORIX<2;2,1>:ub 4:w // Convert MB origin to pixel unit
+
+// #include "process_inter16x16.asm" // Handle B_L0_16x16 case with zero MVs and weighted pred off.
+ // In the case of B_L0_16x16 with zero MVs and weighted pred off, the kernel jumps to INTERLABEL(EXIT_LOOP).
+
+INTERLABEL(INIT_MBPARA):
+ #include "initialize_MBPara.asm"
+
+
+ //========================= BEGIN - LOOP_SUBMB ===========================
+ mov (1) gLOOP_SUBMB:uw 0:uw // 0, 2, 4, 6
+INTERLABEL(LOOP_SUBMB):
+
+ //========================== BEGIN - LOOP_DIR ============================
+ // Prediction flag (gPREDFLAG - 0:Pred_L0, 1:Pred_L1, 2:BiPred)
+ asr (1) gPREDFLAG:w gSUBMB_MODE:ub gLOOP_SUBMB:uw
+ mov (1) gLOOP_DIR:uw 1:uw // 1, 0
+ and (1) gPREDFLAG:w gPREDFLAG:w 0x3:w
+INTERLABEL(LOOP_DIR):
+
+ cmp.e.f0.0 (1) null:w gLOOP_DIR:w gPREDFLAG:w
+ (f0.0) jmpi INTERLABEL(LOOP_DIR_CONTINUE)
+
+ // Get binding table index
+ // & reference picture parity (gREFPARITY - 0:top, 0x100:bottom, x:frame)
+ // & address of interpolation result
+ cmp.e.f0.1 (1) null:w gLOOP_DIR:w 1:w
+ (f0.1) mov (1) gpINTP:ud nOFFSET_INTP0:ud {NoDDClr} //
+ (f0.1) and (1) gBIDX:w r[pBIDX]:ub 0x7f:w {NoDDChk} //
+ (-f0.1) mov (1) gpINTP:ud nOFFSET_INTP1:ud {NoDDClr} //
+ (-f0.1) and (1) gBIDX:w r[pBIDX,4]:ub 0x7f:w {NoDDChk} //
+#if defined(MBAFF) || defined(FIELD)
+ (f0.1) and (1) gREFPARITY:w r[pBIDX]:ub 0x80:w
+ (-f0.1) and (1) gREFPARITY:w r[pBIDX,4]:ub 0x80:w
+ shl (1) gREFPARITY:w gREFPARITY<0;1,0>:w 1:w
+#endif
+
+ // Sub MB shape
+ asr (1) gSHAPETEMP:w gSUBMB_SHAPE:ub gLOOP_SUBMB:w
+
+ // Chroma MV adjustment & Set message descriptor for frame/field read
+#if defined(MBAFF)
+ #include "chromaMVAdjust.asm"
+ and.nz.f0.0 (1) null:uw gFIELDMBFLAG:ub nFIELDMB_MASK:uw
+ (f0.0) add (1) gD0:ud gBIDX:uw nDWBRMSGDSC_SC_TF:ud
+ (-f0.0) add (1) gMSGDSC_R:ud gBIDX:uw nDWBRMSGDSC_SC:ud
+ (f0.0) add (1) gMSGDSC_R:ud gD0:ud gREFPARITY:uw
+#elif defined(FIELD)
+ #include "chromaMVAdjust.asm"
+ add (1) gMSGDSC_R:ud gBIDX:uw nDWBRMSGDSC_SC_TF:ud
+ add (1) gMSGDSC_R:ud gMSGDSC_R:ud gREFPARITY:uw
+#else // FRAME
+ add (1) gMSGDSC_R:ud gBIDX:uw nDWBRMSGDSC_SC:ud
+#endif
+
+ and.nz.f0.1 (1) null:w gSHAPETEMP:w 3:w
+ (f0.1) jmpi INTERLABEL(PROCESS4x4)
+
+ //======================== BEGIN - PROCESS 8x8 ===========================
+
+ // Reference block load
+ #include "loadRef_Y_16x13.asm"
+#ifndef MONO
+#if defined(MBAFF) || defined(FIELD)
+ add (1) r[pMV,2]:w r[pMV,2]:w gCHRMVADJ:w
+#endif
+ #include "loadRef_C_10x5.asm"
+#endif
+
+ // Interpolation
+ //CALL_INTER(INTERLABEL(Interpolate_Y_8x8_Func), 1)
+ #include "interpolate_Y_8x8.asm"
+#ifndef MONO
+ //CALL_INTER(INTERLABEL(Interpolate_C_4x4_Func), 1)
+ #include "interpolate_C_4x4.asm"
+#endif
+
+ jmpi INTERLABEL(ROUND_SHIFT_C)
+ //========================= END - PROCESS 8x8 ============================
+
+ //======================== BEGIN - LOOP_SUBMBPT ==========================
+INTERLABEL(PROCESS4x4):
+
+ mov (1) gLOOP_SUBMBPT:uw 4:uw // 4, 3, 2, 1
+INTERLABEL(LOOP_SUBMBPT):
+
+ // Reference block load
+ #include "loadRef_Y_16x9.asm"
+#ifndef MONO
+#if defined(MBAFF) || defined(FIELD)
+ add (1) r[pMV,2]:w r[pMV,2]:w gCHRMVADJ:w
+#endif
+ #include "loadRef_C_6x3.asm"
+#endif
+
+ // Interpolation
+ #include "interpolate_Y_4x4.asm"
+#ifndef MONO
+ #include "interpolate_C_2x2.asm"
+#endif
+
+ cmp.e.f0.0 (1) null:w gLOOP_SUBMBPT:uw 3:w
+ add.z.f0.1 (1) gLOOP_SUBMBPT:uw gLOOP_SUBMBPT:uw -1:w
+ add (1) pMV:w pMV:w 8:w
+ (-f0.0) add (1) gpINTP:ud gpINTP:ud 0x00080008:ud // 8 & 8
+ (f0.0) add (1) gpINTP:ud gpINTP:ud 0x00180038:ud // 24 & 56
+ (-f0.1) jmpi INTERLABEL(LOOP_SUBMBPT)
+
+ cmp.e.f0.1 null:w gLOOP_DIR:w 1:w
+ add (1) pMV:w pMV:w -32:w
+ (f0.1) mov (1) gpINTP:ud nOFFSET_INTP0:ud
+ (-f0.1) mov (1) gpINTP:ud nOFFSET_INTP1:ud
+
+ mov (1) pRESULT:uw gpINTPC:uw
+
+ //========================= END - LOOP_SUBMBPT ===========================
+
+INTERLABEL(ROUND_SHIFT_C):
+
+#ifndef MONO
+ #include "roundShift_C_4x4.asm"
+#endif
+
+INTERLABEL(LOOP_DIR_CONTINUE):
+
+ add.nz.f0.1 (1) gLOOP_DIR:uw gLOOP_DIR:uw -1:w
+ add (1) pMV:w pMV:w 4:w
+ (-f0.1) jmpi INTERLABEL(LOOP_DIR)
+ //=========================== END - LOOP_DIR =============================
+
+INTERLABEL(Weighted_Prediction):
+ #include "weightedPred.asm"
+
+ and.z.f0.1 (16) null<1>:w gLOOP_SUBMB<0;1,0>:uw 2:w
+
+ #include "recon_Y_8x8.asm"
+#ifndef MONO
+ #include "recon_C_4x4.asm"
+
+ (-f0.1) add (1) pERRORC:w pERRORC:w 48:w
+#endif
+
+ cmp.e.f0.1 (1) null:w gLOOP_SUBMB:uw 6:w
+ add (1) gLOOP_SUBMB:uw gLOOP_SUBMB:uw 2:w
+
+ add (1) pWGT_BIDX:ud pWGT_BIDX:ud 0x00100001:ud // 12 & 1
+ add (1) pMV:w pMV:w gMVSTEP:w
+
+ (-f0.1) jmpi INTERLABEL(LOOP_SUBMB)
+ //========================== END - LOOP_SUBMB ============================
+
+INTERLABEL(EXIT_LOOP):
+ #include "writeRecon_YC.asm"
+
+#ifdef SW_SCOREBOARD
+ wait n0:ud // Now wait for scoreboard to response
+ #include "Soreboard_update.asm" // scorboard update function
+#else
+// Check for write commit first if SW scoreboard is disabled
+ mov (1) gREG_WRITE_COMMIT_Y<1>:ud gREG_WRITE_COMMIT_Y<0;1,0>:ud // Make sure Y write is committed
+ mov (1) gREG_WRITE_COMMIT_UV<1>:ud gREG_WRITE_COMMIT_UV<0;1,0>:ud // Make sure U/V write is committed
+#endif
+
+// Terminate the thread
+//
+ END_THREAD
+
+
+//#include "Interpolate_Y_8x8_Func.asm"
+//#include "Interpolate_C_4x4_Func.asm"
+//#include "WeightedPred_Y_Func.asm"
+//#include "WeightedPred_C_Func.asm"
+
+
+.end_code
+
+.end_kernel
+
+
+//#endif // !defined(__AVCMCInter__)
diff --git a/src/shaders/h264/mc/AllAVC.asm b/src/shaders/h264/mc/AllAVC.asm new file mode 100644 index 00000000..045ddf3b --- /dev/null +++ b/src/shaders/h264/mc/AllAVC.asm @@ -0,0 +1,426 @@ +/*
+ * All HWMC kernels
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+
+// Kernel name: AllAVC.asm
+//
+// All HWMC kernels merged into this file
+//
+// $Revision: 2 $
+// $Date: 9/10/06 2:02a $
+//
+
+// Note: To enable SW scoreboard for ILK AVC kernels, simply toggle the HW_SCOREBOARD
+// and SW_SCOREBOARD definition as described below.
+//
+// ----------------------------------------------------
+// Main: ALLINTRA
+// ----------------------------------------------------
+
+#define COMBINED_KERNEL
+#define ENABLE_ILDB
+
+// WA for *Stim tool issue, should be removed later
+
+#ifdef DEV_ILK
+#define INSTFACTOR 2 // 128-bit count as 2 instructions
+#else
+#define INSTFACTOR 1 // 128-bit is 1 instruction
+#endif // DEV_ILK
+
+#ifdef DEV_CTG
+ #define SW_SCOREBOARD // SW Scoreboard should be enabled for CTG and earlier
+ #undef HW_SCOREBOARD // HW Scoreboard should be disabled for CTG and earlier
+#else
+ #define HW_SCOREBOARD // HW Scoreboard should be enabled for ILK and beyond
+ #undef SW_SCOREBOARD // SW Scoreboard should be disabled for ILK and beyond
+#endif // DEV_CTG
+#include "export.inc"
+#if defined(_EXPORT)
+ #include "AllAVC_Export.inc"
+#elif defined(_BUILD)
+ #include "AllAVC.ich" // ISAasm dumped .exports
+ #include "AllAVC_Export.inc" // Keep jumping targets aligned, only for CTG and beyond
+ #include "AllAVC_Build.inc"
+#else
+#endif
+
+.kernel AllAVC
+
+// Build all intra prediction kernels
+//
+#ifdef INTRA_16x16_PAD_NENOP
+ $for(0; <INTRA_16x16_PAD_NENOP; 1) {
+ nenop
+ }
+#endif
+#ifdef INTRA_16x16_PAD_NOP
+ $for(0; <INTRA_16x16_PAD_NOP; 1) {
+ nop
+ }
+#endif
+ #include "Intra_16x16.asm"
+
+#ifdef INTRA_8x8_PAD_NENOP
+ $for(0; <INTRA_8x8_PAD_NENOP; 1) {
+ nenop
+ }
+#endif
+#ifdef INTRA_8x8_PAD_NOP
+ $for(0; <INTRA_8x8_PAD_NOP; 1) {
+ nop
+ }
+#endif
+ #include "Intra_8x8.asm"
+
+#ifdef INTRA_4x4_PAD_NENOP
+ $for(0; <INTRA_4x4_PAD_NENOP; 1) {
+ nenop
+ }
+#endif
+#ifdef INTRA_4x4_PAD_NOP
+ $for(0; <INTRA_4x4_PAD_NOP; 1) {
+ nop
+ }
+#endif
+ #include "Intra_4x4.asm"
+
+#ifdef INTRA_PCM_PAD_NENOP
+ $for(0; <INTRA_PCM_PAD_NENOP; 1) {
+ nenop
+ }
+#endif
+#ifdef INTRA_PCM_PAD_NOP
+ $for(0; <INTRA_PCM_PAD_NOP; 1) {
+ nop
+ }
+#endif
+ #include "Intra_PCM.asm"
+
+// Build FrameMB_Motion kernel
+//
+#define FRAME
+
+ #ifdef FRAME_MB_PAD_NENOP
+ $for(0; <FRAME_MB_PAD_NENOP; 1) {
+ nenop
+ }
+ #endif
+ #ifdef FRAME_MB_PAD_NOP
+ $for(0; <FRAME_MB_PAD_NOP; 1) {
+ nop
+ }
+ #endif
+ #include "AVCMCInter.asm"
+#undef FRAME
+
+// Build FieldMB_Motion kernel
+//
+#define FIELD
+
+ #ifdef FIELD_MB_PAD_NENOP
+ $for(0; <FIELD_MB_PAD_NENOP; 1) {
+ nenop
+ }
+ #endif
+ #ifdef FIELD_MB_PAD_NOP
+ $for(0; <FIELD_MB_PAD_NOP; 1) {
+ nop
+ }
+ #endif
+ #include "AVCMCInter.asm"
+#undef FIELD
+
+// Build MBAff_Motion kernel
+//
+#define MBAFF
+
+ #ifdef MBAFF_MB_PAD_NENOP
+ $for(0; <MBAFF_MB_PAD_NENOP; 1) {
+ nenop
+ }
+ #endif
+ #ifdef MBAFF_MB_PAD_NOP
+ $for(0; <MBAFF_MB_PAD_NOP; 1) {
+ nop
+ }
+ #endif
+ #include "AVCMCInter.asm"
+#undef MBAFF
+
+#ifdef SW_SCOREBOARD
+
+// SW scoreboard kernel for non-MBAFF
+//
+#ifdef SCOREBOARD_PAD_NENOP
+ $for(0; <SCOREBOARD_PAD_NENOP; 1) {
+ nenop
+ }
+#endif
+#ifdef SCOREBOARD_PAD_NOP
+ $for(0; <SCOREBOARD_PAD_NOP; 1) {
+ nop
+ }
+#endif
+ #include "scoreboard.asm"
+
+// SW scoreboard kernel for MBAFF
+
+#ifdef SCOREBOARD_MBAFF_PAD_NENOP
+ $for(0; <SCOREBOARD_MBAFF_PAD_NENOP; 1) {
+ nenop
+ }
+#endif
+#ifdef SCOREBOARD_MBAFF_PAD_NOP
+ $for(0; <SCOREBOARD_MBAFF_PAD_NOP; 1) {
+ nop
+ }
+#endif
+ #include "scoreboard_MBAFF.asm"
+
+#elif defined(HW_SCOREBOARD)
+
+// SetHWscoreboard kernel for non-MBAFF
+//
+#ifdef SETHWSCOREBOARD_PAD_NENOP
+ $for(0; <SETHWSCOREBOARD_PAD_NENOP; 1) {
+ nenop
+ }
+#endif
+#ifdef SETHWSCOREBOARD_PAD_NOP
+ $for(0; <SETHWSCOREBOARD_PAD_NOP; 1) {
+ nop
+ }
+#endif
+ #include "SetHWScoreboard.asm"
+
+// SetHWscoreboard kernel for MBAFF
+
+#ifdef SETHWSCOREBOARD_MBAFF_PAD_NENOP
+ $for(0; <SETHWSCOREBOARD_MBAFF_PAD_NENOP; 1) {
+ nenop
+ }
+#endif
+#ifdef SETHWSCOREBOARD_MBAFF_PAD_NOP
+ $for(0; <SETHWSCOREBOARD_MBAFF_PAD_NOP; 1) {
+ nop
+ }
+#endif
+ #include "SetHWScoreboard_MBAFF.asm"
+
+#endif // SW_SCOREBOARD
+
+#ifdef BSDRESET_PAD_NENOP
+ $for(0; <BSDRESET_PAD_NENOP; 1) {
+ nenop
+ }
+#endif
+#ifdef BSDRESET_PAD_NOP
+ $for(0; <BSDRESET_PAD_NOP; 1) {
+ nop
+ }
+#endif
+ #include "BSDReset.asm"
+
+#ifdef DCRESETDUMMY_PAD_NENOP
+ $for(0; <DCRESETDUMMY_PAD_NENOP; 1) {
+ nenop
+ }
+#endif
+#ifdef DCRESETDUMMY_PAD_NOP
+ $for(0; <DCRESETDUMMY_PAD_NOP; 1) {
+ nop
+ }
+#endif
+ #include "DCResetDummy.asm"
+
+#ifdef ENABLE_ILDB
+
+// Build all ILDB kernels
+//
+// Undefine some previous defined symbols since they will be re-defined/re-declared in ILDB kernels
+#undef A
+#undef B
+#undef p0
+#undef p1
+
+#define MSGPAYLOADB MSGPAYLOADB_ILDB
+#define MSGPAYLOADW MSGPAYLOADW_ILDB
+#define MSGPAYLOADD MSGPAYLOADD_ILDB
+#define MSGPAYLOADF MSGPAYLOADF_ILDB
+
+// < Frame ILDB >
+#define _PROGRESSIVE
+#define ILDB_LABEL(x) x##_ILDB_FRAME
+#ifdef AVC_ILDB_ROOT_Y_ILDB_FRAME_PAD_NENOP
+ $for(0; <AVC_ILDB_ROOT_Y_ILDB_FRAME_PAD_NENOP; 1) {
+ nenop
+ }
+#endif
+#ifdef AVC_ILDB_ROOT_Y_ILDB_FRAME_PAD_NOP
+ $for(0; <AVC_ILDB_ROOT_Y_ILDB_FRAME_PAD_NOP; 1) {
+ nop
+ }
+#endif
+ #include "AVC_ILDB_Root_Y.asm"
+
+#ifdef AVC_ILDB_CHILD_Y_ILDB_FRAME_PAD_NENOP
+ $for(0; <AVC_ILDB_CHILD_Y_ILDB_FRAME_PAD_NENOP; 1) {
+ nenop
+ }
+#endif
+#ifdef AVC_ILDB_CHILD_Y_ILDB_FRAME_PAD_NOP
+ $for(0; <AVC_ILDB_CHILD_Y_ILDB_FRAME_PAD_NOP; 1) {
+ nop
+ }
+#endif
+ #include "AVC_ILDB_Child_Y.asm"
+
+#ifdef AVC_ILDB_ROOT_UV_ILDB_FRAME_PAD_NENOP
+ $for(0; <AVC_ILDB_ROOT_UV_ILDB_FRAME_PAD_NENOP; 1) {
+ nenop
+ }
+#endif
+#ifdef AVC_ILDB_ROOT_UV_ILDB_FRAME_PAD_NOP
+ $for(0; <AVC_ILDB_ROOT_UV_ILDB_FRAME_PAD_NOP; 1) {
+ nop
+ }
+#endif
+ #include "AVC_ILDB_Root_UV.asm"
+
+#ifdef AVC_ILDB_CHILD_UV_ILDB_FRAME_PAD_NENOP
+ $for(0; <AVC_ILDB_CHILD_UV_ILDB_FRAME_PAD_NENOP; 1) {
+ nenop
+ }
+#endif
+#ifdef AVC_ILDB_CHILD_UV_ILDB_FRAME_PAD_NOP
+ $for(0; <AVC_ILDB_CHILD_UV_ILDB_FRAME_PAD_NOP; 1) {
+ nop
+ }
+#endif
+ #include "AVC_ILDB_Child_UV.asm"
+#undef ILDB_LABEL
+#undef _PROGRESSIVE
+
+// < Field ILDB >
+#define _FIELD
+#define ILDB_LABEL(x) x##_ILDB_FIELD
+#ifdef AVC_ILDB_ROOT_Y_ILDB_FIELD_PAD_NENOP
+ $for(0; <AVC_ILDB_ROOT_Y_ILDB_FIELD_PAD_NENOP; 1) {
+ nenop
+ }
+#endif
+#ifdef AVC_ILDB_ROOT_Y_ILDB_FIELD_PAD_NOP
+ $for(0; <AVC_ILDB_ROOT_Y_ILDB_FIELD_PAD_NOP; 1) {
+ nop
+ }
+#endif
+ #include "AVC_ILDB_Root_Field_Y.asm"
+
+#ifdef AVC_ILDB_CHILD_Y_ILDB_FIELD_PAD_NENOP
+ $for(0; <AVC_ILDB_CHILD_Y_ILDB_FIELD_PAD_NENOP; 1) {
+ nenop
+ }
+#endif
+#ifdef AVC_ILDB_CHILD_Y_ILDB_FIELD_PAD_NOP
+ $for(0; <AVC_ILDB_CHILD_Y_ILDB_FIELD_PAD_NOP; 1) {
+ nop
+ }
+#endif
+ #include "AVC_ILDB_Child_Field_Y.asm"
+
+#ifdef AVC_ILDB_ROOT_UV_ILDB_FIELD_PAD_NENOP
+ $for(0; <AVC_ILDB_ROOT_UV_ILDB_FIELD_PAD_NENOP; 1) {
+ nenop
+ }
+#endif
+#ifdef AVC_ILDB_ROOT_UV_ILDB_FIELD_PAD_NOP
+ $for(0; <AVC_ILDB_ROOT_UV_ILDB_FIELD_PAD_NOP; 1) {
+ nop
+ }
+#endif
+ #include "AVC_ILDB_Root_Field_UV.asm"
+
+#ifdef AVC_ILDB_CHILD_UV_ILDB_FIELD_PAD_NENOP
+ $for(0; <AVC_ILDB_CHILD_UV_ILDB_FIELD_PAD_NENOP; 1) {
+ nenop
+ }
+#endif
+#ifdef AVC_ILDB_CHILD_UV_ILDB_FIELD_PAD_NOP
+ $for(0; <AVC_ILDB_CHILD_UV_ILDB_FIELD_PAD_NOP; 1) {
+ nop
+ }
+#endif
+ #include "AVC_ILDB_Child_Field_UV.asm"
+#undef ILDB_LABEL
+#undef _FIELD
+
+// < MBAFF Frame ILDB >
+#define _MBAFF
+#define ILDB_LABEL(x) x##_ILDB_MBAFF
+#ifdef AVC_ILDB_ROOT_Y_ILDB_MBAFF_PAD_NENOP
+ $for(0; <AVC_ILDB_ROOT_Y_ILDB_MBAFF_PAD_NENOP; 1) {
+ nenop
+ }
+#endif
+#ifdef AVC_ILDB_ROOT_Y_ILDB_MBAFF_PAD_NOP
+ $for(0; <AVC_ILDB_ROOT_Y_ILDB_MBAFF_PAD_NOP; 1) {
+ nop
+ }
+#endif
+ #include "AVC_ILDB_Root_Mbaff_Y.asm"
+
+#ifdef AVC_ILDB_CHILD_Y_ILDB_MBAFF_PAD_NENOP
+ $for(0; <AVC_ILDB_CHILD_Y_ILDB_MBAFF_PAD_NENOP; 1) {
+ nenop
+ }
+#endif
+#ifdef AVC_ILDB_CHILD_Y_ILDB_MBAFF_PAD_NOP
+ $for(0; <AVC_ILDB_CHILD_Y_ILDB_MBAFF_PAD_NOP; 1) {
+ nop
+ }
+#endif
+ #include "AVC_ILDB_Child_Mbaff_Y.asm"
+
+#ifdef AVC_ILDB_ROOT_UV_ILDB_MBAFF_PAD_NENOP
+ $for(0; <AVC_ILDB_ROOT_UV_ILDB_MBAFF_PAD_NENOP; 1) {
+ nenop
+ }
+#endif
+#ifdef AVC_ILDB_ROOT_UV_ILDB_MBAFF_PAD_NOP
+ $for(0; <AVC_ILDB_ROOT_UV_ILDB_MBAFF_PAD_NOP; 1) {
+ nop
+ }
+#endif
+ #include "AVC_ILDB_Root_Mbaff_UV.asm"
+
+#ifdef AVC_ILDB_CHILD_UV_ILDB_MBAFF_PAD_NENOP
+ $for(0; <AVC_ILDB_CHILD_UV_ILDB_MBAFF_PAD_NENOP; 1) {
+ nenop
+ }
+#endif
+#ifdef AVC_ILDB_CHILD_UV_ILDB_MBAFF_PAD_NOP
+ $for(0; <AVC_ILDB_CHILD_UV_ILDB_MBAFF_PAD_NOP; 1) {
+ nop
+ }
+#endif
+ #include "AVC_ILDB_Child_Mbaff_UV.asm"
+#undef ILDB_LABEL
+#undef _MBAFF
+
+#endif // ENABLE_ILDB
+
+AllAVC_END:
+nop
+// End of AllAVC
+
+.end_code
+
+.end_kernel
+
diff --git a/src/shaders/h264/mc/AllAVCField.asm b/src/shaders/h264/mc/AllAVCField.asm new file mode 100644 index 00000000..88240c35 --- /dev/null +++ b/src/shaders/h264/mc/AllAVCField.asm @@ -0,0 +1,70 @@ +/*
+ * All field picture HWMC kernels
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// 2857702934 // 0xAA551616 - GUID for Intra_16x16 luma prediction mode offsets
+// 0 // Offset to Intra_16x16 luma prediction mode 0
+// 9 // Offset to Intra_16x16 luma prediction mode 1
+// 19 // Offset to Intra_16x16 luma prediction mode 2
+// 42 // Offset to Intra_16x16 luma prediction mode 3
+// 2857699336 // 0xAA550808 - GUID for Intra_8x8 luma prediction mode offsets
+// 0 // Offset to Intra_8x8 luma prediction mode 0
+// 5 // Offset to Intra_8x8 luma prediction mode 1
+// 10 // Offset to Intra_8x8 luma prediction mode 2
+// 26 // Offset to Intra_8x8 luma prediction mode 3
+// 36 // Offset to Intra_8x8 luma prediction mode 4
+// 50 // Offset to Intra_8x8 luma prediction mode 5
+// 68 // Offset to Intra_8x8 luma prediction mode 6
+// 85 // Offset to Intra_8x8 luma prediction mode 7
+// 95 // Offset to Intra_8x8 luma prediction mode 8
+// 2857698308 // 0xAA550404 - GUID for Intra_4x4 luma prediction mode offsets
+// 0 // Offset to Intra_4x4 luma prediction mode 0
+// 2 // Offset to Intra_4x4 luma prediction mode 1
+// 4 // Offset to Intra_4x4 luma prediction mode 2
+// 16 // Offset to Intra_4x4 luma prediction mode 3
+// 23 // Offset to Intra_4x4 luma prediction mode 4
+// 32 // Offset to Intra_4x4 luma prediction mode 5
+// 45 // Offset to Intra_4x4 luma prediction mode 6
+// 59 // Offset to Intra_4x4 luma prediction mode 7
+// 66 // Offset to Intra_4x4 luma prediction mode 8
+// 2857700364 // 0xAA550C0C - GUID for intra chroma prediction mode offsets
+// 0 // Offset to intra chroma prediction mode 0
+// 30 // Offset to intra chroma prediction mode 1
+// 36 // Offset to intra chroma prediction mode 2
+// 41 // Offset to intra chroma prediction mode 3
+
+// Kernel name: AllAVCField.asm
+//
+// All field picture HWMC kernels merged into this file
+//
+// $Revision: 1 $
+// $Date: 4/13/06 4:35p $
+//
+
+// ----------------------------------------------------
+// Main: AllAVCField
+// ----------------------------------------------------
+
+#define ALLHWMC
+#define COMBINED_KERNEL
+
+.kernel AllAVCField
+
+ #include "Intra_PCM.asm"
+ #include "Intra_16x16.asm"
+ #include "Intra_8x8.asm"
+ #include "Intra_4x4.asm"
+ #include "scoreboard.asm"
+
+ #define FIELD
+ #include "AVCMCInter.asm"
+
+// End of AllAVCField
+
+.end_kernel
+
diff --git a/src/shaders/h264/mc/AllAVCFrame.asm b/src/shaders/h264/mc/AllAVCFrame.asm new file mode 100644 index 00000000..88716272 --- /dev/null +++ b/src/shaders/h264/mc/AllAVCFrame.asm @@ -0,0 +1,69 @@ +/*
+ * All frame picture HWMC kernels
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// 2857702934 // 0xAA551616 - GUID for Intra_16x16 luma prediction mode offsets
+// 0 // Offset to Intra_16x16 luma prediction mode 0
+// 9 // Offset to Intra_16x16 luma prediction mode 1
+// 19 // Offset to Intra_16x16 luma prediction mode 2
+// 42 // Offset to Intra_16x16 luma prediction mode 3
+// 2857699336 // 0xAA550808 - GUID for Intra_8x8 luma prediction mode offsets
+// 0 // Offset to Intra_8x8 luma prediction mode 0
+// 5 // Offset to Intra_8x8 luma prediction mode 1
+// 10 // Offset to Intra_8x8 luma prediction mode 2
+// 26 // Offset to Intra_8x8 luma prediction mode 3
+// 36 // Offset to Intra_8x8 luma prediction mode 4
+// 50 // Offset to Intra_8x8 luma prediction mode 5
+// 68 // Offset to Intra_8x8 luma prediction mode 6
+// 85 // Offset to Intra_8x8 luma prediction mode 7
+// 95 // Offset to Intra_8x8 luma prediction mode 8
+// 2857698308 // 0xAA550404 - GUID for Intra_4x4 luma prediction mode offsets
+// 0 // Offset to Intra_4x4 luma prediction mode 0
+// 2 // Offset to Intra_4x4 luma prediction mode 1
+// 4 // Offset to Intra_4x4 luma prediction mode 2
+// 16 // Offset to Intra_4x4 luma prediction mode 3
+// 23 // Offset to Intra_4x4 luma prediction mode 4
+// 32 // Offset to Intra_4x4 luma prediction mode 5
+// 45 // Offset to Intra_4x4 luma prediction mode 6
+// 59 // Offset to Intra_4x4 luma prediction mode 7
+// 66 // Offset to Intra_4x4 luma prediction mode 8
+// 2857700364 // 0xAA550C0C - GUID for intra chroma prediction mode offsets
+// 0 // Offset to intra chroma prediction mode 0
+// 30 // Offset to intra chroma prediction mode 1
+// 36 // Offset to intra chroma prediction mode 2
+// 41 // Offset to intra chroma prediction mode 3
+
+// Kernel name: AllAVCFrame.asm
+//
+// All frame picture HWMC kernels merged into this file
+//
+// $Revision: 1 $
+// $Date: 4/13/06 4:35p $
+//
+
+// ----------------------------------------------------
+// Main: AllAVCFrame
+// ----------------------------------------------------
+
+#define ALLHWMC
+#define COMBINED_KERNEL
+
+.kernel AllAVCFrame
+
+ #include "Intra_PCM.asm"
+ #include "Intra_16x16.asm"
+ #include "Intra_8x8.asm"
+ #include "Intra_4x4.asm"
+ #include "scoreboard.asm"
+
+ #include "AVCMCInter.asm"
+
+// End of AllAVCFrame
+
+.end_kernel
+
diff --git a/src/shaders/h264/mc/AllAVCMBAFF.asm b/src/shaders/h264/mc/AllAVCMBAFF.asm new file mode 100644 index 00000000..1dd06ed3 --- /dev/null +++ b/src/shaders/h264/mc/AllAVCMBAFF.asm @@ -0,0 +1,70 @@ +/*
+ * All MBAFF frame picture HWMC kernels
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// 2857702934 // 0xAA551616 - GUID for Intra_16x16 luma prediction mode offsets
+// 0 // Offset to Intra_16x16 luma prediction mode 0
+// 9 // Offset to Intra_16x16 luma prediction mode 1
+// 19 // Offset to Intra_16x16 luma prediction mode 2
+// 42 // Offset to Intra_16x16 luma prediction mode 3
+// 2857699336 // 0xAA550808 - GUID for Intra_8x8 luma prediction mode offsets
+// 0 // Offset to Intra_8x8 luma prediction mode 0
+// 5 // Offset to Intra_8x8 luma prediction mode 1
+// 10 // Offset to Intra_8x8 luma prediction mode 2
+// 26 // Offset to Intra_8x8 luma prediction mode 3
+// 36 // Offset to Intra_8x8 luma prediction mode 4
+// 50 // Offset to Intra_8x8 luma prediction mode 5
+// 68 // Offset to Intra_8x8 luma prediction mode 6
+// 85 // Offset to Intra_8x8 luma prediction mode 7
+// 95 // Offset to Intra_8x8 luma prediction mode 8
+// 2857698308 // 0xAA550404 - GUID for Intra_4x4 luma prediction mode offsets
+// 0 // Offset to Intra_4x4 luma prediction mode 0
+// 2 // Offset to Intra_4x4 luma prediction mode 1
+// 4 // Offset to Intra_4x4 luma prediction mode 2
+// 16 // Offset to Intra_4x4 luma prediction mode 3
+// 23 // Offset to Intra_4x4 luma prediction mode 4
+// 32 // Offset to Intra_4x4 luma prediction mode 5
+// 45 // Offset to Intra_4x4 luma prediction mode 6
+// 59 // Offset to Intra_4x4 luma prediction mode 7
+// 66 // Offset to Intra_4x4 luma prediction mode 8
+// 2857700364 // 0xAA550C0C - GUID for intra chroma prediction mode offsets
+// 0 // Offset to intra chroma prediction mode 0
+// 30 // Offset to intra chroma prediction mode 1
+// 36 // Offset to intra chroma prediction mode 2
+// 41 // Offset to intra chroma prediction mode 3
+
+// Kernel name: AllAVCMBAFF.asm
+//
+// All MBAFF frame picture HWMC kernels merged into this file
+//
+// $Revision: 1 $
+// $Date: 4/13/06 4:35p $
+//
+
+// ----------------------------------------------------
+// Main: AllAVCMBAFF
+// ----------------------------------------------------
+
+#define ALLHWMC
+#define COMBINED_KERNEL
+
+.kernel AllAVCMBAFF
+
+ #include "Intra_PCM.asm"
+ #include "Intra_16x16.asm"
+ #include "Intra_8x8.asm"
+ #include "Intra_4x4.asm"
+ #include "scoreboard.asm"
+
+ #define MBAFF
+ #include "AVCMCInter.asm"
+
+// End of AllAVCMBAFF
+
+.end_kernel
+
diff --git a/src/shaders/h264/mc/AllAVC_Build.inc b/src/shaders/h264/mc/AllAVC_Build.inc new file mode 100644 index 00000000..5bfb7530 --- /dev/null +++ b/src/shaders/h264/mc/AllAVC_Build.inc @@ -0,0 +1,82 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+$table {
+AllAVC_END_IP/INSTFACTOR // Total instruction count
+#if (defined(SW_SCOREBOARD) || defined(HW_SCOREBOARD)) && defined(ENABLE_ILDB)
+// 23 // Total kernel count
+#elif defined(SW_SCOREBOARD) || defined(HW_SCOREBOARD)
+// 11 // Total kernel count
+#elif defined(ENABLE_ILDB)
+// 21 // Total kernel count
+#else
+// 11 // Total kernel count
+#endif
+INTRA_16x16_ENTRY/INSTFACTOR // Instruction offset to 'Intra_16x16'
+INTRA_8x8_ENTRY/INSTFACTOR // Instruction offset to 'Intra_8x8'
+INTRA_4x4_ENTRY/INSTFACTOR // Instruction offset to 'Intra_4x4'
+INTRA_PCM_ENTRY/INSTFACTOR // Instruction offset to 'Intra_PCM'
+FRAME_MB_ENTRY/INSTFACTOR // Instruction offset to 'FrameMB_Motion'
+FIELD_MB_ENTRY/INSTFACTOR // Instruction offset to 'FieldMB_Motion'
+MBAFF_MB_ENTRY/INSTFACTOR // Instruction offset to 'MBAff_Motion'
+#ifdef SW_SCOREBOARD
+SCOREBOARD_ENTRY/INSTFACTOR // Instruction offset to 'scoreboard'
+SCOREBOARD_MBAFF_ENTRY/INSTFACTOR // Instruction offset to 'scoreboard_MBAFF'
+#elif defined(HW_SCOREBOARD)
+SETHWSCOREBOARD_ENTRY/INSTFACTOR // Instruction offset to 'AVC_SetIntraDepend'
+SETHWSCOREBOARD_MBAFF_ENTRY/INSTFACTOR // Instruction offset to 'AVC_SetIntraDependMBAFF'
+#endif // SW_SCOREBOARD
+#ifdef ENABLE_ILDB
+AVC_ILDB_ROOT_Y_ILDB_FRAME_ENTRY/INSTFACTOR // Instruction offset to 'AVC_ILDB_Root_Y'
+AVC_ILDB_CHILD_Y_ILDB_FRAME_ENTRY/INSTFACTOR // Instruction offset to 'AVC_ILDB_Child_Y'
+AVC_ILDB_ROOT_UV_ILDB_FRAME_ENTRY/INSTFACTOR // Instruction offset to 'AVC_ILDB_Root_UV'
+AVC_ILDB_CHILD_UV_ILDB_FRAME_ENTRY/INSTFACTOR // Instruction offset to 'AVC_ILDB_Child_UV'
+AVC_ILDB_ROOT_Y_ILDB_FIELD_ENTRY/INSTFACTOR // Instruction offset to 'AVC_ILDB_Root_Field_Y'
+AVC_ILDB_CHILD_Y_ILDB_FIELD_ENTRY/INSTFACTOR // Instruction offset to 'AVC_ILDB_Child_Field_Y'
+AVC_ILDB_ROOT_UV_ILDB_FIELD_ENTRY/INSTFACTOR // Instruction offset to 'AVC_ILDB_Root_Field_UV'
+AVC_ILDB_CHILD_UV_ILDB_FIELD_ENTRY/INSTFACTOR // Instruction offset to 'AVC_ILDB_Child_Field_UV'
+AVC_ILDB_ROOT_Y_ILDB_MBAFF_ENTRY/INSTFACTOR // Instruction offset to 'AVC_ILDB_Root_Mbaff_Y'
+AVC_ILDB_CHILD_Y_ILDB_MBAFF_ENTRY/INSTFACTOR // Instruction offset to 'AVC_ILDB_Child_Mbaff_Y'
+AVC_ILDB_ROOT_UV_ILDB_MBAFF_ENTRY/INSTFACTOR // Instruction offset to 'AVC_ILDB_Root_Mbaff_UV'
+AVC_ILDB_CHILD_UV_ILDB_MBAFF_ENTRY/INSTFACTOR // Instruction offset to 'AVC_ILDB_Child_Mbaff_UV'
+#endif // ENABLE_ILDB
+BSDRESET_ENTRY/INSTFACTOR // Instruction offset to 'BSDReset'
+DCRESETDUMMY_ENTRY/INSTFACTOR // Instruction offset to 'DCResetDummy'
+
+// 0 // Instruction offset to Intra_4x4_luma_prediction_mode_0
+INTRA_4X4_HORIZONTAL_IP-INTRA_4X4_VERTICAL_IP // Instruction offset to Intra_4x4_luma_prediction_mode_1
+INTRA_4X4_DC_IP-INTRA_4X4_VERTICAL_IP // Instruction offset to Intra_4x4_luma_prediction_mode_2
+INTRA_4X4_DIAG_DOWN_LEFT_IP-INTRA_4X4_VERTICAL_IP // Instruction offset to Intra_4x4_luma_prediction_mode_3
+INTRA_4X4_DIAG_DOWN_RIGHT_IP-INTRA_4X4_VERTICAL_IP // Instruction offset to Intra_4x4_luma_prediction_mode_4
+INTRA_4X4_VERT_RIGHT_IP-INTRA_4X4_VERTICAL_IP // Instruction offset to Intra_4x4_luma_prediction_mode_5
+INTRA_4X4_HOR_DOWN_IP-INTRA_4X4_VERTICAL_IP // Instruction offset to Intra_4x4_luma_prediction_mode_6
+INTRA_4X4_VERT_LEFT_IP-INTRA_4X4_VERTICAL_IP // Instruction offset to Intra_4x4_luma_prediction_mode_7
+INTRA_4X4_HOR_UP_IP-INTRA_4X4_VERTICAL_IP // Instruction offset to Intra_4x4_luma_prediction_mode_8
+
+// 0 // Instruction offset to Intra_8x8_luma_prediction_mode_0
+INTRA_8X8_HORIZONTAL_IP-INTRA_8X8_VERTICAL_IP // Instruction offset to Intra_8x8_luma_prediction_mode_1
+INTRA_8X8_DC_IP-INTRA_8X8_VERTICAL_IP // Instruction offset to Intra_8x8_luma_prediction_mode_2
+INTRA_8X8_DIAG_DOWN_LEFT_IP-INTRA_8X8_VERTICAL_IP // Instruction offset to Intra_8x8_luma_prediction_mode_3
+INTRA_8X8_DIAG_DOWN_RIGHT_IP-INTRA_8X8_VERTICAL_IP // Instruction offset to Intra_8x8_luma_prediction_mode_4
+INTRA_8X8_VERT_RIGHT_IP-INTRA_8X8_VERTICAL_IP // Instruction offset to Intra_8x8_luma_prediction_mode_5
+INTRA_8X8_HOR_DOWN_IP-INTRA_8X8_VERTICAL_IP // Instruction offset to Intra_8x8_luma_prediction_mode_6
+INTRA_8X8_VERT_LEFT_IP-INTRA_8X8_VERTICAL_IP // Instruction offset to Intra_8x8_luma_prediction_mode_7
+INTRA_8X8_HOR_UP_IP-INTRA_8X8_VERTICAL_IP // Instruction offset to Intra_8x8_luma_prediction_mode_8
+
+// 0 // Instruction offset to Intra_16x16_luma_prediction_mode_0
+INTRA_16x16_HORIZONTAL_IP-INTRA_16x16_VERTICAL_IP // Instruction offset to Intra_16x16_luma_prediction_mode_1
+INTRA_16x16_DC_IP-INTRA_16x16_VERTICAL_IP // Instruction offset to Intra_16x16_luma_prediction_mode_2
+INTRA_16x16_PLANE_IP-INTRA_16x16_VERTICAL_IP // Instruction offset to Intra_16x16_luma_prediction_mode_3
+
+// 0 // Instruction offset to intra_chroma_prediction_mode_0
+INTRA_CHROMA_HORIZONTAL_IP-INTRA_CHROMA_DC_IP // Instruction offset to intra_chroma_prediction_mode_1
+INTRA_CHROMA_VERTICAL_IP-INTRA_CHROMA_DC_IP // Instruction offset to intra_chroma_prediction_mode_2
+INTRA_Chroma_PLANE_IP-INTRA_CHROMA_DC_IP // Instruction offset to intra_chroma_prediction_mode_3
+
+intra_Pred_4x4_Y_IP-ADD_ERROR_SB3_IP*0x100+intra_Pred_4x4_Y_IP-ADD_ERROR_SB2_IP*0x100+intra_Pred_4x4_Y_IP-ADD_ERROR_SB1_IP*0x100+intra_Pred_4x4_Y_IP-ADD_ERROR_SB0_IP // Instruction offset to intra_4x4_pred_module
+}
diff --git a/src/shaders/h264/mc/AllAVC_Export.inc b/src/shaders/h264/mc/AllAVC_Export.inc new file mode 100644 index 00000000..6bb3effd --- /dev/null +++ b/src/shaders/h264/mc/AllAVC_Export.inc @@ -0,0 +1,172 @@ +.export entry_point INTRA_16x16
+.export entry_point INTRA_8x8
+.export entry_point INTRA_4x4
+.export entry_point INTRA_PCM
+.export entry_point FRAME_MB
+.export entry_point FIELD_MB
+.export entry_point MBAFF_MB
+#ifdef SW_SCOREBOARD
+.export entry_point SCOREBOARD
+.export entry_point SCOREBOARD_MBAFF
+#elif defined(HW_SCOREBOARD)
+.export entry_point SETHWSCOREBOARD
+.export entry_point SETHWSCOREBOARD_MBAFF
+#endif // SW_SCOREBOARD
+
+#ifdef ENABLE_ILDB
+.export entry_point AVC_ILDB_ROOT_Y_ILDB_FRAME
+.export entry_point AVC_ILDB_CHILD_Y_ILDB_FRAME
+.export entry_point AVC_ILDB_ROOT_UV_ILDB_FRAME
+.export entry_point AVC_ILDB_CHILD_UV_ILDB_FRAME
+.export entry_point AVC_ILDB_ROOT_Y_ILDB_FIELD
+.export entry_point AVC_ILDB_CHILD_Y_ILDB_FIELD
+.export entry_point AVC_ILDB_ROOT_UV_ILDB_FIELD
+.export entry_point AVC_ILDB_CHILD_UV_ILDB_FIELD
+.export entry_point AVC_ILDB_ROOT_Y_ILDB_MBAFF
+.export entry_point AVC_ILDB_CHILD_Y_ILDB_MBAFF
+.export entry_point AVC_ILDB_ROOT_UV_ILDB_MBAFF
+.export entry_point AVC_ILDB_CHILD_UV_ILDB_MBAFF
+#endif // ENABLE_ILDB
+
+.export entry_point BSDRESET
+.export entry_point DCRESETDUMMY
+
+.export label INTRA_16x16_VERTICAL
+.export label INTRA_16x16_HORIZONTAL
+.export label INTRA_16x16_DC
+.export label INTRA_16x16_PLANE
+
+.export label INTRA_8X8_VERTICAL
+.export label INTRA_8X8_HORIZONTAL
+.export label INTRA_8X8_DC
+.export label INTRA_8X8_DIAG_DOWN_LEFT
+.export label INTRA_8X8_DIAG_DOWN_RIGHT
+.export label INTRA_8X8_VERT_RIGHT
+.export label INTRA_8X8_HOR_DOWN
+.export label INTRA_8X8_VERT_LEFT
+.export label INTRA_8X8_HOR_UP
+
+.export label INTRA_4X4_VERTICAL
+.export label INTRA_4X4_HORIZONTAL
+.export label INTRA_4X4_DC
+.export label INTRA_4X4_DIAG_DOWN_LEFT
+.export label INTRA_4X4_DIAG_DOWN_RIGHT
+.export label INTRA_4X4_VERT_RIGHT
+.export label INTRA_4X4_HOR_DOWN
+.export label INTRA_4X4_VERT_LEFT
+.export label INTRA_4X4_HOR_UP
+
+.export label INTRA_CHROMA_DC
+.export label INTRA_CHROMA_HORIZONTAL
+.export label INTRA_CHROMA_VERTICAL
+.export label INTRA_Chroma_PLANE
+
+.export label intra_Pred_4x4_Y
+.export label ADD_ERROR_SB0
+.export label ADD_ERROR_SB1
+.export label ADD_ERROR_SB2
+.export label ADD_ERROR_SB3
+
+.export label AllAVC_END
+
+#ifdef SW_SCOREBOARD
+.export label MB_Loop
+.export label No_Message
+.export label Dependency_Check
+.export label Notify_MSG
+.export label Update_CurMB
+.export label MBAFF_MB_Loop
+.export label MBAFF_No_Message
+.export label MBAFF_Dependency_Check
+.export label MBAFF_Notify_MSG
+.export label MBAFF_Update_CurMB
+
+//.export label
+
+// Definitions for first pass MC kernel building
+#ifndef No_Message_IP
+#define No_Message_IP 0
+#endif
+
+#ifndef Dependency_Check_IP
+#define Dependency_Check_IP 0
+#endif
+
+#ifndef Notify_MSG_IP
+#define Notify_MSG_IP 0
+#endif
+
+#ifndef Update_CurMB_IP
+#define Update_CurMB_IP 0
+#endif
+
+#ifndef MBAFF_No_Message_IP
+#define MBAFF_No_Message_IP 0
+#endif
+
+#ifndef MBAFF_Dependency_Check_IP
+#define MBAFF_Dependency_Check_IP 0
+#endif
+
+#ifndef MBAFF_Notify_MSG_IP
+#define MBAFF_Notify_MSG_IP 0
+#endif
+
+#ifndef AS_ENABLED
+ #ifndef MBAFF_MB_Loop_IP
+ #define MBAFF_MB_Loop_IP 0
+ #endif
+
+ #ifndef MB_Loop_IP
+ #define MB_Loop_IP 0
+ #endif
+#endif // End AS_ENABLED
+
+#ifndef MBAFF_Update_CurMB_IP
+#define MBAFF_Update_CurMB_IP 0
+#endif
+
+#endif // SW_SCOREBOARD
+/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+
+#ifdef ENABLE_ILDB
+.export label ALL_SPAWNED_UV_ILDB_FRAME
+.export label SLEEP_ENTRY_UV_ILDB_FRAME
+.export label POST_SLEEP_UV_ILDB_FRAME
+.export label ALL_SPAWNED_Y_ILDB_FRAME
+.export label SLEEP_ENTRY_Y_ILDB_FRAME
+.export label POST_SLEEP_Y_ILDB_FRAME
+
+// Definitions for first pass ILDB kernel building
+#ifndef ALL_SPAWNED_UV_ILDB_FRAME_IP
+#define ALL_SPAWNED_UV_ILDB_FRAME_IP 0
+#endif
+
+#ifndef SLEEP_ENTRY_UV_ILDB_FRAME_IP
+#define SLEEP_ENTRY_UV_ILDB_FRAME_IP 0
+#endif
+
+#ifndef POST_SLEEP_UV_ILDB_FRAME_IP
+#define POST_SLEEP_UV_ILDB_FRAME_IP 0
+#endif
+
+#ifndef ALL_SPAWNED_Y_ILDB_FRAME_IP
+#define ALL_SPAWNED_Y_ILDB_FRAME_IP 0
+#endif
+
+#ifndef SLEEP_ENTRY_Y_ILDB_FRAME_IP
+#define SLEEP_ENTRY_Y_ILDB_FRAME_IP 0
+#endif
+
+#ifndef POST_SLEEP_Y_ILDB_FRAME_IP
+#define POST_SLEEP_Y_ILDB_FRAME_IP 0
+#endif
+
+#endif // ENABLE_ILDB
diff --git a/src/shaders/h264/mc/AllIntra.asm b/src/shaders/h264/mc/AllIntra.asm new file mode 100644 index 00000000..1cc895a2 --- /dev/null +++ b/src/shaders/h264/mc/AllIntra.asm @@ -0,0 +1,68 @@ +/*
+ * All intra-prediction macroblock kernels
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// 2857702934 // 0xAA551616 - GUID for Intra_16x16 luma prediction mode offsets
+// 0 // Offset to Intra_16x16 luma prediction mode 0
+// 9 // Offset to Intra_16x16 luma prediction mode 1
+// 19 // Offset to Intra_16x16 luma prediction mode 2
+// 42 // Offset to Intra_16x16 luma prediction mode 3
+// 2857699336 // 0xAA550808 - GUID for Intra_8x8 luma prediction mode offsets
+// 0 // Offset to Intra_8x8 luma prediction mode 0
+// 5 // Offset to Intra_8x8 luma prediction mode 1
+// 10 // Offset to Intra_8x8 luma prediction mode 2
+// 26 // Offset to Intra_8x8 luma prediction mode 3
+// 36 // Offset to Intra_8x8 luma prediction mode 4
+// 50 // Offset to Intra_8x8 luma prediction mode 5
+// 68 // Offset to Intra_8x8 luma prediction mode 6
+// 85 // Offset to Intra_8x8 luma prediction mode 7
+// 95 // Offset to Intra_8x8 luma prediction mode 8
+// 2857698308 // 0xAA550404 - GUID for Intra_4x4 luma prediction mode offsets
+// 0 // Offset to Intra_4x4 luma prediction mode 0
+// 2 // Offset to Intra_4x4 luma prediction mode 1
+// 4 // Offset to Intra_4x4 luma prediction mode 2
+// 16 // Offset to Intra_4x4 luma prediction mode 3
+// 23 // Offset to Intra_4x4 luma prediction mode 4
+// 32 // Offset to Intra_4x4 luma prediction mode 5
+// 45 // Offset to Intra_4x4 luma prediction mode 6
+// 59 // Offset to Intra_4x4 luma prediction mode 7
+// 66 // Offset to Intra_4x4 luma prediction mode 8
+// 2857700364 // 0xAA550C0C - GUID for intra chroma prediction mode offsets
+// 0 // Offset to intra chroma prediction mode 0
+// 30 // Offset to intra chroma prediction mode 1
+// 36 // Offset to intra chroma prediction mode 2
+// 41 // Offset to intra chroma prediction mode 3
+
+// Kernel name: AllIntra.asm
+//
+// All HWMC kernels merged into this file
+//
+// $Revision: 1 $
+// $Date: 4/13/06 4:35p $
+//
+
+// ----------------------------------------------------
+// Main: ALLINTRA
+// ----------------------------------------------------
+
+#define ALLHWMC
+#define COMBINED_KERNEL
+
+.kernel ALLINTRA
+
+ // All frame destination HWMC kernels
+ //
+ #include "Intra_PCM.asm"
+ #include "Intra_16x16.asm"
+ #include "Intra_8x8.asm"
+ #include "Intra_4x4.asm"
+
+// End of ALLINTRA
+
+.end_kernel
+
diff --git a/src/shaders/h264/mc/BSDReset.asm b/src/shaders/h264/mc/BSDReset.asm new file mode 100644 index 00000000..5c6e5df8 --- /dev/null +++ b/src/shaders/h264/mc/BSDReset.asm @@ -0,0 +1,43 @@ +/*
+ * Initial kernel for filling initial BSD command buffer
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: BSDReset.asm
+//
+// Initial kernel for filling initial BSD command buffer
+//
+
+// ----------------------------------------------------
+// Main: BSDReset
+// ----------------------------------------------------
+
+.kernel BSDReset
+BSDRESET:
+
+#include "header.inc"
+
+.code
+#ifdef SW_SCOREBOARD
+ CALL(scoreboard_start_inter,1)
+ wait n0:ud // Now wait for scoreboard to response
+
+#define BSDRESET_ENABLE
+ #include "scoreboard_update.asm" // scorboard update function
+#undef BSDRESET_ENABLE
+
+#endif // defined(SW_SCOREBOARD)
+
+// Terminate the thread
+//
+ END_THREAD
+
+#if !defined(COMBINED_KERNEL) // For standalone kernel only
+.end_code
+
+.end_kernel
+#endif // !defined(COMBINED_KERNEL)
diff --git a/src/shaders/h264/mc/DCResetDummy.asm b/src/shaders/h264/mc/DCResetDummy.asm new file mode 100644 index 00000000..d4e52a90 --- /dev/null +++ b/src/shaders/h264/mc/DCResetDummy.asm @@ -0,0 +1,34 @@ +/*
+ * Dummy kernel
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: DCResetDummy.asm
+//
+// Dummy kernel used by driver for debug-counter reset SW WA
+//
+
+// ----------------------------------------------------
+// Main: DCResetDummy
+// ----------------------------------------------------
+
+.kernel DCResetDummy
+DCRESETDUMMY:
+
+#include "header.inc"
+
+.code
+
+// Terminate the thread
+//
+ END_THREAD
+
+#if !defined(COMBINED_KERNEL) // For standalone kernel only
+.end_code
+
+.end_kernel
+#endif // !defined(COMBINED_KERNEL)
diff --git a/src/shaders/h264/mc/Decode_Chroma_Intra.asm b/src/shaders/h264/mc/Decode_Chroma_Intra.asm new file mode 100644 index 00000000..7799825c --- /dev/null +++ b/src/shaders/h264/mc/Decode_Chroma_Intra.asm @@ -0,0 +1,29 @@ +/*
+ * Decode both intra chroma blocks
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+#if !defined(__DECODE_CHROMA_INTRA__) // Make sure this is only included once
+#define __DECODE_CHROMA_INTRA__
+
+// Module name: Decode_Chroma_Intra.asm
+//
+// Decode both intra chroma blocks
+//
+
+decode_Chroma_Intra:
+#ifndef MONO
+ #include "load_Intra_Ref_UV.asm" // Load intra U/V reference data
+ #include "intra_Pred_Chroma.asm" // Intra predict chroma blocks
+ #include "add_Error_UV.asm" // Add error data to predicted U/V data blocks
+#endif // !defined(MONO)
+ #include "save_8x8_UV.asm" // Save to destination U/V frame surface
+
+ RETURN
+// End of Decode_Chroma_Intra
+
+#endif // !defined(__DECODE_CHROMA_INTRA__)
diff --git a/src/shaders/h264/mc/EndIntraThread.asm b/src/shaders/h264/mc/EndIntraThread.asm new file mode 100644 index 00000000..2c78b62d --- /dev/null +++ b/src/shaders/h264/mc/EndIntraThread.asm @@ -0,0 +1,30 @@ +/*
+ * Common module to end current intra thread
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: EndIntraThread.asm
+//
+// Common module to end current intra thread
+//
+#ifndef SW_SCOREBOARD
+// Check for write commit first if SW scoreboard is disabled
+ mov (1) REG_WRITE_COMMIT_Y<1>:ud REG_WRITE_COMMIT_Y<0;1,0>:ud // Make sure Y write is committed
+ mov (1) REG_WRITE_COMMIT_UV<1>:ud REG_WRITE_COMMIT_UV<0;1,0>:ud // Make sure U/V write is committed
+#endif
+
+ END_THREAD
+
+ #include "Intra_funcLib.asm"
+
+#ifndef COMBINED_KERNEL // For standalone kernel only
+.end_code
+
+.end_kernel
+#endif // COMBINED_KERNEL
+
+// End of EndIntraThread
diff --git a/src/shaders/h264/mc/HwmcOnlyHeader.inc b/src/shaders/h264/mc/HwmcOnlyHeader.inc new file mode 100644 index 00000000..514cb78b --- /dev/null +++ b/src/shaders/h264/mc/HwmcOnlyHeader.inc @@ -0,0 +1,29 @@ +/*
+ * Header file used only in HWMC_ONLY mode
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: HwmcOnlyHeader.inc
+//
+// Header file used only in HWMC_ONLY mode
+//
+
+#include "header.inc"
+
+#if !defined(__HWMCONLYHEADER__) // Make sure the following are only included once
+#define __HWMCONLYHEADER__
+
+.reg_count_total 64
+.reg_count_payload 2
+
+//
+// Now, begin source code....
+//
+
+.code
+#endif // !defined(__HWMCONLYHEADER__)
+
diff --git a/src/shaders/h264/mc/Intra_16x16.asm b/src/shaders/h264/mc/Intra_16x16.asm new file mode 100644 index 00000000..e40e6a36 --- /dev/null +++ b/src/shaders/h264/mc/Intra_16x16.asm @@ -0,0 +1,71 @@ +/*
+ * Decode Intra_16x16 macroblock
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: Intra_16x16.asm
+//
+// Decoding of Intra_16x16 macroblock
+//
+// $Revision: 8 $
+// $Date: 10/18/06 4:10p $
+//
+
+// ----------------------------------------------------
+// Main: Intra_16x16
+// ----------------------------------------------------
+
+#define INTRA_16X16
+
+.kernel Intra_16x16
+INTRA_16x16:
+
+#ifdef _DEBUG
+// WA for FULSIM so we'll know which kernel is being debugged
+mov (1) acc0:ud 0x00aa55a5:ud
+#endif
+
+#include "SetupForHWMC.asm"
+
+#ifdef SW_SCOREBOARD
+ CALL(scoreboard_start_intra,1)
+#endif
+
+#ifdef SW_SCOREBOARD
+ wait n0:ud // Now wait for scoreboard to response
+#endif
+
+//
+// Decode Y blocks
+//
+// Load reference data from neighboring macroblocks
+ CALL(load_Intra_Ref_Y,1)
+
+// Intra predict Intra_16x16 luma block
+ #include "intra_pred_16x16_Y.asm"
+
+// Add error data to predicted intra data
+ #include "add_Error_16x16_Y.asm"
+
+// Save decoded Y picture
+ CALL(save_16x16_Y,1)
+//
+// Decode U/V blocks
+//
+// Note: The decoding for chroma blocks will be the same for all intra prediction mode
+//
+ CALL(decode_Chroma_Intra,1)
+
+#ifdef SW_SCOREBOARD
+ #include "scoreboard_update.asm"
+#endif
+
+// Terminate the thread
+//
+ #include "EndIntraThread.asm"
+
+// End of Intra_16x16
diff --git a/src/shaders/h264/mc/Intra_4x4.asm b/src/shaders/h264/mc/Intra_4x4.asm new file mode 100644 index 00000000..11699833 --- /dev/null +++ b/src/shaders/h264/mc/Intra_4x4.asm @@ -0,0 +1,175 @@ +/*
+ * Decode Intra_4x4 macroblock
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: Intra_4x4.asm
+//
+// Decoding of Intra_4x4 macroblock
+//
+// $Revision: 12 $
+// $Date: 10/18/06 4:10p $
+//
+
+// ----------------------------------------------------
+// Main: Intra_4x4
+// ----------------------------------------------------
+
+#define INTRA_4X4
+
+.kernel Intra_4x4
+INTRA_4x4:
+
+#ifdef _DEBUG
+// WA for FULSIM so we'll know which kernel is being debugged
+mov (1) acc0:ud 0x02aa55a5:ud
+#endif
+
+#include "SetupForHWMC.asm"
+
+#undef PPREDBUF_Y
+#define PPREDBUF_Y a0.3 // Pointer to predicted Y picture
+
+#define REG_INTRA_PRED_AVAIL REG_INTRA_TEMP_4
+#define REG_INTRA_4X4_PRED REG_INTRA_TEMP_7 // Store predicted Intra_4x4 data
+
+// Offset where 4x4 predicted data blocks are stored
+#define PREDSUBBLK0 0*GRFWIB
+#define PREDSUBBLK1 1*GRFWIB
+#define PREDSUBBLK2 2*GRFWIB
+#define PREDSUBBLK3 3*GRFWIB
+#define PREDSUBBLK4 4*GRFWIB
+#define PREDSUBBLK5 5*GRFWIB
+#define PREDSUBBLK6 6*GRFWIB
+#define PREDSUBBLK7 7*GRFWIB
+#define PREDSUBBLK8 8*GRFWIB
+#define PREDSUBBLK9 9*GRFWIB
+#define PREDSUBBLK10 10*GRFWIB
+#define PREDSUBBLK11 11*GRFWIB
+#define PREDSUBBLK12 12*GRFWIB
+#define PREDSUBBLK13 13*GRFWIB
+#define PREDSUBBLK14 14*GRFWIB
+#define PREDSUBBLK15 15*GRFWIB
+
+// 4x4 error block byte offset within the 8x8 error block
+#define ERRBLK0 0
+#define ERRBLK1 8
+#define ERRBLK2 64
+#define ERRBLK3 72
+
+#ifdef SW_SCOREBOARD
+ CALL(scoreboard_start_intra,1)
+#endif
+
+#ifdef SW_SCOREBOARD
+ wait n0:ud // Now wait for scoreboard to response
+#endif
+
+//
+// Decode Y blocks
+//
+// Load reference data from neighboring macroblocks
+ CALL(load_Intra_Ref_Y,1)
+
+ mov (1) PERROR<1>:w ERRBUF*GRFWIB:w // Pointer to macroblock error data
+ mov (1) PPREDBUF_Y<1>:w PREDBUF*GRFWIB:w // Pointer to predicted data
+ shr (2) REG_INTRA_PRED_AVAIL<1>:w REG_INTRA_PRED_AVAIL_FLAG_BYTE<0;1,0>:ub 0x40:v
+ and.nz.f0.0 (8) NULLREG REG_INTRA_PRED_AVAIL_FLAG_BYTE<0;1,0>:ub 4:w // Top-right macroblock available for intra prediction?
+ (-f0.0.any8h) mov (8) INTRA_REF_TOP(0,16)<1> INTRA_REF_TOP(0,15)REGION(1,0) // Extend right boundary of MB B to C
+
+// Intra predict Intra_4x4 luma blocks
+//
+// Sub-macroblock 0 *****************
+ mov (16) REF_TOP0(0)<1> INTRA_REF_TOP0(0) // Top reference data
+ mov (8) REF_LEFT(0)<1> INTRA_REF_LEFT(0)REGION(8,4) // Left reference data
+ shr (4) PRED_MODE<1>:w INTRA_PRED_MODE(0)<1;2,0> 0x4040:v // Expand IntraPredMode to 1 byte/block
+ CALL(intra_Pred_4x4_Y_4,1)
+ add (1) PERROR<1>:w PERROR<0;1,0>:w 0x0080:w // Pointers to next error block
+
+ or (1) REG_INTRA_PRED_AVAIL<1>:w REG_INTRA_PRED_AVAIL<0;1,0>:w 0x1:w // Left neighbor is available now
+
+// Sub-macroblock 1 *****************
+
+ mov (16) REF_TOP0(0)<1> INTRA_REF_TOP0(0,8) // Top reference data
+ mov (4) REF_LEFT(0)<1> r[PPREDBUF_Y,PREDSUBBLK1+6]<8;1,0>:ub // Left reference data (top half)
+ mov (4) REF_LEFT(0,4)<1> r[PPREDBUF_Y,PREDSUBBLK3+6]<8;1,0>:ub // Left reference data (bottom half)
+ shr (4) PRED_MODE<1>:w INTRA_PRED_MODE(0,2)<1;2,0> 0x4040:v // Expand IntraPredMode to 1 byte/block
+ add (1) PPREDBUF_Y<1>:w PPREDBUF_Y<0;1,0>:w 4*GRFWIB:w // Pointer to predicted sub-macroblock 1
+ CALL(intra_Pred_4x4_Y_4,1)
+ add (1) PERROR<1>:w PERROR<0;1,0>:w 0x0080:w // Pointers to next error block
+
+ or (1) REG_INTRA_PRED_AVAIL<1>:w REG_INTRA_PRED_AVAIL.1<0;1,0>:w 0x2:w // Top neighbor is available now
+
+// Pack constructed data from word-aligned to byte-aligned format
+// to speed up save_4x4_Y module later
+// PPREDBUF_Y now points to sub-block #4
+ mov (16) r[PPREDBUF_Y,-PREDSUBBLK4]<1>:ub r[PPREDBUF_Y,-PREDSUBBLK4]<32;16,2>:ub // Sub-block 0
+ mov (16) r[PPREDBUF_Y,0-PREDSUBBLK4+16]<1>:ub r[PPREDBUF_Y,-PREDSUBBLK3]<32;16,2>:ub // Sub-block 1
+ mov (16) r[PPREDBUF_Y,-PREDSUBBLK2]<1>:ub r[PPREDBUF_Y,-PREDSUBBLK2]<32;16,2>:ub // Sub-block 2
+ mov (16) r[PPREDBUF_Y,0-PREDSUBBLK2+16]<1>:ub r[PPREDBUF_Y,-PREDSUBBLK1]<32;16,2>:ub // Sub-block 3
+
+ mov (16) r[PPREDBUF_Y,-PREDSUBBLK3]<1>:ub r[PPREDBUF_Y]<32;16,2>:ub // Sub-block 4
+ mov (16) r[PPREDBUF_Y,0-PREDSUBBLK3+16]<1>:ub r[PPREDBUF_Y,PREDSUBBLK1]<32;16,2>:ub // Sub-block 5
+ mov (16) r[PPREDBUF_Y,-PREDSUBBLK1]<1>:ub r[PPREDBUF_Y,PREDSUBBLK2]<32;16,2>:ub // Sub-block 6
+ mov (16) r[PPREDBUF_Y,0-PREDSUBBLK1+16]<1>:ub r[PPREDBUF_Y,PREDSUBBLK3]<32;16,2>:ub // Sub-block 7
+
+// Sub-macroblock 2 *****************
+
+ mov (4) REF_TOP0(0)<1> INTRA_REF_LEFT0(0,28)REGION(4,1) // Top-left reference data
+ mov (8) REF_TOP0(0,4)<1> r[PPREDBUF_Y,0-2*GRFWIB+12]<16;4,1>:ub // Top reference data from SB 2,3
+ mov (8) REF_TOP0(0,12)<1> r[PPREDBUF_Y,0-GRFWIB+12]<16;4,1>:ub // Top reference data from SB 6,7
+ mov (8) REF_TOP0(0,20)<1> r[PPREDBUF_Y,0-GRFWIB+31]<0;1,0>:ub // Top-right reference data
+ mov (16) REG_INTRA_REF_TOP<1>:w REF_TOP_W(0) // Store top reference data for SubMB #2 and #3.
+ mov (8) REF_LEFT(0)<1> INTRA_REF_LEFT(1)REGION(8,4) // Left reference data
+ shr (4) PRED_MODE<1>:w INTRA_PRED_MODE(0,4)<1;2,0> 0x4040:v // Expand IntraPredMode to 1 byte/block
+ CALL(intra_Pred_4x4_Y_4,1)
+ add (1) PERROR<1>:w PERROR<0;1,0>:w 0x0080:w // Pointers to next error block
+
+ or (1) REG_INTRA_PRED_AVAIL<1>:w REG_INTRA_PRED_AVAIL<0;1,0>:w 0x1:w // Left neighbor is available now
+
+// Sub-macroblock 3 *****************
+
+ mov (16) REF_TOP0(0)<1> INTRA_REF_TOP0(0,8) // Top reference data
+ mov (8) REF_TOP0(0,16)<1> INTRA_REF_TOP0(0,24)REGION(8,1) // Top reference data
+ mov (4) REF_LEFT(0)<1> r[PPREDBUF_Y,PREDSUBBLK1+6]<8;1,0>:ub // Left reference data (top half)
+ mov (4) REF_LEFT(0,4)<1> r[PPREDBUF_Y,PREDSUBBLK3+6]<8;1,0>:ub // Left reference data (bottom half)
+ shr (4) PRED_MODE<1>:w INTRA_PRED_MODE(0,6)<1;2,0> 0x4040:v // Expand IntraPredMode to 1 byte/block
+ add (1) PPREDBUF_Y<1>:w PPREDBUF_Y<0;1,0>:w 4*GRFWIB:w // Pointer to predicted sub-macroblock 3
+ CALL(intra_Pred_4x4_Y_4,1)
+
+// Pack constructed data from word-aligned to byte-aligned format
+// to speed up save_4x4_Y module later
+// PPREDBUF_Y now points to sub-block #12
+ mov (16) r[PPREDBUF_Y,-PREDSUBBLK4]<1>:ub r[PPREDBUF_Y,-PREDSUBBLK4]<32;16,2>:ub // Sub-block 8
+ mov (16) r[PPREDBUF_Y,0-PREDSUBBLK4+16]<1>:ub r[PPREDBUF_Y,-PREDSUBBLK3]<32;16,2>:ub // Sub-block 9
+ mov (16) r[PPREDBUF_Y,-PREDSUBBLK2]<1>:ub r[PPREDBUF_Y,-PREDSUBBLK2]<32;16,2>:ub // Sub-block 10
+ mov (16) r[PPREDBUF_Y,0-PREDSUBBLK2+16]<1>:ub r[PPREDBUF_Y,-PREDSUBBLK1]<32;16,2>:ub // Sub-block 11
+
+ mov (16) r[PPREDBUF_Y,-PREDSUBBLK3]<1>:ub r[PPREDBUF_Y]<32;16,2>:ub // Sub-block 12
+ mov (16) r[PPREDBUF_Y,0-PREDSUBBLK3+16]<1>:ub r[PPREDBUF_Y,PREDSUBBLK1]<32;16,2>:ub // Sub-block 13
+ mov (16) r[PPREDBUF_Y,-PREDSUBBLK1]<1>:ub r[PPREDBUF_Y,PREDSUBBLK2]<32;16,2>:ub // Sub-block 14
+ mov (16) r[PPREDBUF_Y,0-PREDSUBBLK1+16]<1>:ub r[PPREDBUF_Y,PREDSUBBLK3]<32;16,2>:ub // Sub-block 15
+
+// All 4 sub-macroblock (containing 4 intra_4x4 blocks) have be constructed
+// Save constructed Y picture
+ CALL(save_4x4_Y,1) // Save Intra_4x4 predicted luma data.
+//
+// Decode U/V blocks
+//
+// Note: The decoding for chroma blocks will be the same for all intra prediction mode
+//
+ CALL(decode_Chroma_Intra,1)
+
+#ifdef SW_SCOREBOARD
+ #include "scoreboard_update.asm"
+#endif
+
+// Terminate the thread
+//
+ #include "EndIntraThread.asm"
+
+// End of Intra_4x4
diff --git a/src/shaders/h264/mc/Intra_8x8.asm b/src/shaders/h264/mc/Intra_8x8.asm new file mode 100644 index 00000000..05a0be59 --- /dev/null +++ b/src/shaders/h264/mc/Intra_8x8.asm @@ -0,0 +1,192 @@ +/*
+ * Decode Intra_8x8 macroblock
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: Intra_8x8.asm
+//
+// Decoding of Intra_8x8 macroblock
+//
+// $Revision: 12 $
+// $Date: 10/18/06 4:10p $
+//
+
+// ----------------------------------------------------
+// Main: Intra_8x8
+// ----------------------------------------------------
+
+#define INTRA_8X8
+
+.kernel Intra_8x8
+INTRA_8x8:
+
+#ifdef _DEBUG
+// WA for FULSIM so we'll know which kernel is being debugged
+mov (1) acc0:ud 0x01aa55a5:ud
+#endif
+
+#include "SetupForHWMC.asm"
+
+#define REG_INTRA_PRED_AVAIL REG_INTRA_TEMP_4
+#define INTRA_PRED_AVAIL REG_INTRA_TEMP_4.4
+
+// Offset where 8x8 predicted data blocks are stored
+#define PREDBLK0 0*GRFWIB
+#define PREDBLK1 4*GRFWIB
+#define PREDBLK2 8*GRFWIB
+#define PREDBLK3 12*GRFWIB
+
+#ifdef SW_SCOREBOARD
+
+// Update "E" flag with "F" flag information
+ mov (1) REG_INTRA_TEMP_0<1>:w REG_INTRA_PRED_AVAIL_FLAG_WORD<0;1,0>:w // Store original Intra_Pred_Avail_Flag
+ and.nz.f0.0 (1) NULLREG REG_MBAFF_PIC MBAFF_PIC // Is current MBAFF picture
+ and.z.f0.1 (1) NULLREG REG_INTRA_PRED_AVAIL_FLAG INTRA_PRED_LEFT_TH_AVAIL_FLAG // Is "A" not available?
+ (f0.0) and.z.f0.0 (1) NULLREG REG_FIELD_MACROBLOCK_FLAG FIELD_MACROBLOCK_FLAG // Is current frame MB?
+ (f0.1) and.nz.f0.1 (1) NULLREG REG_INTRA_PRED_8X8_BLK2_AVAIL_FLAG INTRA_PRED_8X8_BLK2_AVAIL_FLAG // Is "F" flag set?
+ (f0.0.allv) or (1) REG_INTRA_PRED_AVAIL_FLAG_WORD<1>:w REG_INTRA_PRED_AVAIL_FLAG_WORD<0;1,0>:w INTRA_PRED_LEFT_BH_AVAIL_FLAG // Set "E" to 1 if all conditions meet
+
+ CALL(scoreboard_start_intra,1)
+ mov (1) REG_INTRA_PRED_AVAIL_FLAG_WORD<1>:w REG_INTRA_TEMP_0<0;1,0>:w // Restore original Intra_Pred_Avail_Flag
+#endif
+
+#ifdef SW_SCOREBOARD
+ wait n0:ud // Now wait for scoreboard to response
+#endif
+
+//
+// Decode Y blocks
+//
+// Load reference data from neighboring macroblocks
+ CALL(load_Intra_Ref_Y,1)
+
+ mov (1) PERROR<1>:w ERRBUF*GRFWIB:w // Pointer to macroblock error data
+ mov (1) PDECBUF_UD<1>:ud 0x00010001*PREDBUF*GRFWIB+0x00100000:ud // Pointers to predicted data
+ shr (2) REG_INTRA_PRED_AVAIL<1>:w REG_INTRA_PRED_AVAIL_FLAG_BYTE<0;1,0>:ub 0x40:v
+
+#if 1
+ mov (4) REF_LEFT_D(0,0)<1> 0:ud // This is to make validation easier. Without it, DRAM mismatch occurs.
+#endif
+
+// Intra predict Intra_8x8 luma blocks
+//
+// Sub-macroblock 0 *****************
+ mov (16) REF_TOP_W(0)<1> REG_INTRA_REF_TOP<16;16,1>:w // Copy entire top reference data
+ and.nz.f0.0 (8) NULLREG REG_INTRA_PRED_AVAIL_FLAG INTRA_PRED_UP_LEFT_AVAIL_FLAG // Is "D" available?
+ (-f0.0) mov (1) REF_TOP(0,-1)<1> INTRA_REF_TOP(0)REGION(1,0) // p[-1,-1] = p[0,-1]
+
+ mov (8) REF_LEFT(0,2)<1> INTRA_REF_LEFT(0) // Left reference data, (leave 2 for reference filtering)
+ (-f0.0) mov (1) REF_LEFT(0,1)<1> INTRA_REF_LEFT(0)REGION(1,0) // p[-1,-1]=p[-1,0]
+ (f0.0.any2h) mov (2) REF_LEFT(0,0)<1> INTRA_REF_TOP(0,-1)REGION(1,0) // p'[-1,y] (y=0,1) = p[-1,-1]
+ and.nz.f0.1 (1) NULLREG REG_INTRA_PRED_AVAIL_FLAG INTRA_PRED_UP_AVAIL_FLAG // Is "B" available?
+ (f0.1) mov (1) REF_LEFT(0,0)<1> INTRA_REF_TOP(0,0)REGION(1,0) // p[0,-1] for left filtering
+ and.nz.f0.1 (1) NULLREG REG_INTRA_PRED_AVAIL_FLAG INTRA_PRED_LEFT_TH_AVAIL_FLAG // Is "A" available?
+ (-f0.1) mov (1) REF_LEFT(0,2)<1> INTRA_REF_TOP(0,-1)REGION(1,0) // p'[-1,2] = p[-1,-1]
+
+ and (1) PRED_MODE<1>:w INTRA_PRED_MODE(0)REGION(1,0) 0x0F:w // Intra pred mode for current block
+ mov (1) INTRA_PRED_AVAIL<1>:w REG_INTRA_PRED_AVAIL<0;1,0>:w // Top/Left neighbor available flags
+ CALL(intra_Pred_8x8_Y,1)
+ add (1) PERROR<1>:w PERROR<0;1,0>:w 0x0080:w // Pointers to next error block
+
+// Sub-macroblock 1 *****************
+ mov (16) REF_TOP0(0)<1> INTRA_REF_TOP(0,4) // Top reference data
+ and.nz.f0.1 (8) NULLREG REG_INTRA_PRED_AVAIL_FLAG INTRA_PRED_UP_RIGHT_AVAIL_FLAG // Is "C" available?
+ (f0.1.any8h) mov (8) REF_TOP(0,8)<1> INTRA_REF_TOP(0,16)<8;8,1> // Take data from "C"
+ (-f0.1.any8h) mov (8) REF_TOP(0,8)<1> INTRA_REF_TOP(0,15)REGION(1,0) // Repeat last pixel from "B"
+
+ mov (4) REF_LEFT(0,2)<1> DEC_Y(0,14)<16;1,0> // Left reference data (top half) (leave 2 for reference filtering)
+ mov (4) REF_LEFT(0,6)<1> DEC_Y(2,14)<16;1,0> // Left reference data (bottom half)
+ mov (2) REF_LEFT(0,0)<1> INTRA_REF_TOP(0,7)REGION(1,0) // p'[-1,y] (y=0,1) = p[-1,-1]
+ and.nz.f0.1 (1) NULLREG REG_INTRA_PRED_AVAIL_FLAG INTRA_PRED_UP_AVAIL_FLAG // Is "B" available?
+ (f0.1) mov (1) REF_LEFT(0,0)<1> INTRA_REF_TOP(0,8)REGION(1,0) // p[-1,-1] for left filtering
+ (-f0.1) mov (1) REF_LEFT(0,1)<1> DEC_Y(0,14)REGION(1,0) // p[-1,-1] = p[-1,0]
+
+ shr (1) PRED_MODE<1>:w INTRA_PRED_MODE(0)REGION(1,0) 4:w // Intra pred mode for current block
+ add (2) PPREDBUF_Y<1>:w PPREDBUF_Y<2;2,1>:w 4*GRFWIB:w // Pointer to predicted sub-macroblock 1
+ or (1) INTRA_PRED_AVAIL<1>:w REG_INTRA_PRED_AVAIL<0;1,0>:w 1:w // Left neighbor is available
+ CALL(intra_Pred_8x8_Y,1)
+ add (1) PERROR<1>:w PERROR<0;1,0>:w 0x0080:w // Pointers to next error block
+
+// Pack constructed data from word-aligned to byte-aligned format and interlace Y0 and Y1(every two Y rows)
+// to speed up save_8x8_Y module later
+// PPREDBUF_Y now points to sub-macroblock Y1
+ mov (32) r[PPREDBUF_Y,-PREDBLK1]<1>:ub DEC_Y(0)<32;16,2> {Compr} // First 4 Y0 rows
+ mov (32) r[PPREDBUF_Y,0-PREDBLK1+32]<1>:ub DEC_Y(4)<32;16,2> {Compr} // First 4 Y1 rows
+ mov (32) r[PPREDBUF_Y,0-PREDBLK1+64]<1>:ub DEC_Y(2)<32;16,2> {Compr} // Second 4 Y0 rows
+ mov (32) r[PPREDBUF_Y,0-PREDBLK1+96]<1>:ub DEC_Y(6)<32;16,2> {Compr} // Second 4 Y1 rows
+
+// Sub-macroblock 2 *****************
+// Intra_8x8 special available flag handling
+ and.nz.f0.0 (1) NULLREG REG_MBAFF_PIC MBAFF_PIC // Is current MBAFF picture
+ and.z.f0.1 (1) NULLREG REG_INTRA_PRED_AVAIL_FLAG INTRA_PRED_LEFT_TH_AVAIL_FLAG // Is "A" not available?
+ (f0.0) and.z.f0.0 (1) NULLREG REG_FIELD_MACROBLOCK_FLAG FIELD_MACROBLOCK_FLAG // Is current frame MB?
+ (f0.1) and.nz.f0.1 (1) NULLREG REG_INTRA_PRED_8X8_BLK2_AVAIL_FLAG INTRA_PRED_8X8_BLK2_AVAIL_FLAG // Is special intra_8x8 available flag set?
+ (f0.0.allv) mov (1) REF_TOP(0,-1)<1> INTRA_REF_LEFT0(0,31)REGION(1,0) // Top-left reference data
+ (f0.0.allv) jmpi (1) INTRA_8x8_BLK2
+// Done intra_8x8 special available flag handling
+
+ and.nz.f0.0 (8) NULLREG REG_INTRA_PRED_AVAIL_FLAG INTRA_PRED_LEFT_TH_AVAIL_FLAG // Is top-half "A" available?
+ (f0.0.any4h) mov (4) REF_TOP0(0)<1> INTRA_REF_LEFT0(0,28)REGION(4,1) // Top-left reference data
+ (-f0.0) mov (1) REF_TOP(0,-1)<1> DEC_Y(2,24)REGION(1,0) // p[-1,-1] = p[0,-1]
+INTRA_8x8_BLK2:
+ mov (8) REF_TOP(0)<1> DEC_Y(2,24)REGION(8,1) // Top reference data
+ mov (8) REF_TOP(0,8)<1> DEC_Y(3,24)REGION(8,1) // Top reference data
+
+ mov (8) REF_LEFT(0,2)<1> INTRA_REF_LEFT(1) // Left reference data, (leave 2 for reference filtering)
+ mov (1) REF_LEFT(0,0)<1> DEC_Y(2,24)REGION(1,0) // p'[-1,0] = p[0,-1] since "B" is always available
+ (f0.0) mov (1) REF_LEFT(0,1)<1> INTRA_REF_LEFT(0,28)REGION(1,0) // p[-1,1] = p[-1,-1] if top-half "A" available
+ (-f0.0) mov (1) REF_LEFT(0,1)<1> INTRA_REF_LEFT(1)REGION(1,0) // p[-1,1] = p[-1,0]
+ and.nz.f0.1 (1) NULLREG REG_INTRA_PRED_AVAIL_FLAG INTRA_PRED_LEFT_BH_AVAIL_FLAG // Is bottom-half "A" available?
+ (-f0.1) mov (1) REF_LEFT(0,2)<1> INTRA_REF_LEFT(0,28)REGION(1,0) // p'[-1,2] = p[-1,-1]
+
+ and (1) PRED_MODE<1>:w INTRA_PRED_MODE(0,1)REGION(1,0) 0x0F:w // Intra pred mode for current block
+ or (1) INTRA_PRED_AVAIL<1>:w REG_INTRA_PRED_AVAIL.1<0;1,0>:w 2:w // Top neighbor is available
+ CALL(intra_Pred_8x8_Y,1)
+ add (1) PERROR<1>:w PERROR<0;1,0>:w 0x0080:w // Pointers to next error block
+
+// Sub-macroblock 3 *****************
+ mov (4) REF_TOP0(0)<1> DEC_Y(2,28)REGION(4,1) // Top-left reference data
+ mov (8) REF_TOP(0)<1> DEC_Y(3,24)REGION(8,1) // Top reference data
+ mov (16) REF_TOP(0,8)<1> DEC_Y(3,31)REGION(1,0) // Top-right reference data
+
+ mov (4) REF_LEFT(0,2)<1> DEC_Y(4,14)<16;1,0> // Left reference data (top half) (leave 2 for reference filtering)
+ mov (4) REF_LEFT(0,6)<1> DEC_Y(6,14)<16;1,0> // Left reference data (bottom half)
+ mov (1) REF_LEFT(0,0)<1> DEC_Y(3,24)REGION(1,0) // p[-1,0] = p[0,-1]
+ mov (1) REF_LEFT(0,1)<1> DEC_Y(2,31)REGION(1,0) // p[-1,1] = p[-1,-1]
+
+ shr (1) PRED_MODE<1>:w INTRA_PRED_MODE(0,1)REGION(1,0) 4:w // Intra pred mode for current block
+ add (2) PPREDBUF_Y<1>:w PPREDBUF_Y<2;2,1>:w 4*GRFWIB:w // Pointer to predicted sub-macroblock 3
+ or (1) INTRA_PRED_AVAIL<1>:w REG_INTRA_PRED_AVAIL<0;1,0>:w 3:w // Top and Left neighbor are available
+ CALL(intra_Pred_8x8_Y,1)
+
+// Pack constructed data from word-aligned to byte-aligned format
+// to speed up save_8x8_Y module later
+// PPREDBUF_Y now points to sub-macroblock Y1
+ mov (32) r[PPREDBUF_Y,-PREDBLK1]<1>:ub DEC_Y(4)<32;16,2> {Compr} // First 4 Y2 rows
+ mov (32) r[PPREDBUF_Y,0-PREDBLK1+32]<1>:ub DEC_Y(8)<32;16,2> {Compr} // First 4 Y3 rows
+ mov (32) r[PPREDBUF_Y,0-PREDBLK1+64]<1>:ub DEC_Y(6)<32;16,2> {Compr} // Second 4 Y2 rows
+ mov (32) r[PPREDBUF_Y,0-PREDBLK1+96]<1>:ub DEC_Y(10)<32;16,2> {Compr} // Second 4 Y3 rows
+
+// All 4 sub-macroblock (containing 4 intra_8x8 blocks) have be constructed
+// Save constructed Y picture
+ CALL(save_8x8_Y,1) // Save Intra_8x8 predicted luma data.
+//
+// Decode U/V blocks
+//
+// Note: The decoding for chroma blocks will be the same for all intra prediction mode
+//
+ CALL(decode_Chroma_Intra,1)
+
+#ifdef SW_SCOREBOARD
+ #include "scoreboard_update.asm"
+#endif
+
+// Terminate the thread
+//
+ #include "EndIntraThread.asm"
+
+// End of Intra_8x8
diff --git a/src/shaders/h264/mc/Intra_PCM.asm b/src/shaders/h264/mc/Intra_PCM.asm new file mode 100644 index 00000000..6bc81af2 --- /dev/null +++ b/src/shaders/h264/mc/Intra_PCM.asm @@ -0,0 +1,56 @@ +/*
+ * Decode Intra_PCM macroblock
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: Intra_PCM.asm
+//
+// Decoding of I_PCM macroblock
+//
+// $Revision: 8 $
+// $Date: 10/18/06 4:10p $
+//
+
+// ----------------------------------------------------
+// Main: Intra_PCM
+// ----------------------------------------------------
+
+.kernel Intra_PCM
+INTRA_PCM:
+
+#ifdef _DEBUG
+// WA for FULSIM so we'll know which kernel is being debugged
+mov (1) acc0:ud 0x03aa55a5:ud
+#endif
+
+#include "SetupForHWMC.asm"
+
+// Not actually needed here but just want to slow down the Intra-PCM to avoid race condition
+//
+#ifdef SW_SCOREBOARD
+ and (1) REG_INTRA_PRED_AVAIL_FLAG_WORD<1>:w REG_INTRA_PRED_AVAIL_FLAG_WORD<0;1,0>:w 0xffe0:w // Ensure all neighbor avail flags are "0"
+ CALL(scoreboard_start_intra,1)
+ wait n0:ud // Now wait for scoreboard to response
+#endif
+
+//
+// Decoding Y blocks
+//
+// In I_PCM mode, the samples are already arranged in raster scan order within the macroblock.
+// We just need to save them to picture buffers
+//
+ #include "save_I_PCM.asm" // Save to destination picture buffers
+
+#ifdef SW_SCOREBOARD
+ #include "scoreboard_update.asm"
+#endif
+
+// Terminate the thread
+//
+ #include "EndIntraThread.asm"
+
+// End of Intra_PCM
diff --git a/src/shaders/h264/mc/Intra_funcLib.asm b/src/shaders/h264/mc/Intra_funcLib.asm new file mode 100644 index 00000000..9644f7f9 --- /dev/null +++ b/src/shaders/h264/mc/Intra_funcLib.asm @@ -0,0 +1,42 @@ +/*
+ * Library of common modules shared among different intra prediction kernels
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: Intra_funcLib.asm
+//
+// Library of common modules shared among different intra prediction kernels
+//
+// Note: Any sub-modules, if they are #included in more than one kernel,
+// should be moved to this module.
+//
+#if defined(INTRA_16X16)
+#undef INTRA_16X16
+ #include "load_Intra_Ref_Y.asm" // Load intra Y reference data
+ #include "Decode_Chroma_Intra.asm" // Decode chroma blocks
+ #include "save_16x16_Y.asm" // Save to destination Y frame surface
+#elif defined(INTRA_8X8)
+#undef INTRA_8X8
+ #include "load_Intra_Ref_Y.asm" // Load intra Y reference data
+ #include "Decode_Chroma_Intra.asm" // Decode chroma blocks
+ #include "intra_Pred_8x8_Y.asm" // Intra predict Intra_4x4 blocks
+ #include "save_8x8_Y.asm" // Save to destination Y frame surface
+#elif defined(INTRA_4X4)
+#undef INTRA_4X4
+ #include "load_Intra_Ref_Y.asm" // Load intra Y reference data
+ #include "Decode_Chroma_Intra.asm" // Decode chroma blocks
+ #include "intra_Pred_4x4_Y_4.asm" // Intra predict Intra_4x4 blocks
+ #include "save_4x4_Y.asm" // Save to destination Y frame surface
+#else // For all merged kernels
+#endif
+
+#ifdef SW_SCOREBOARD
+ #include "scoreboard_start_intra.asm" // scorboard intra start function
+ #include "scoreboard_start_inter.asm" // scorboard inter start function
+#endif // SW_SCOREBOARD
+
+// End of Intra_funcLib
diff --git a/src/shaders/h264/mc/Makefile.am b/src/shaders/h264/mc/Makefile.am new file mode 100644 index 00000000..a4ab3c05 --- /dev/null +++ b/src/shaders/h264/mc/Makefile.am @@ -0,0 +1,184 @@ + +INTEL_G4I = + +INTEL_G4A = null.g4a + +INTEL_G4B = null.g4b + +INTEL_G4B_GEN5 = null.g4b.gen5 + +INTEL_MC_G4B_GEN5 = avc_mc.g4b.gen5 +INTEL_MC_EXPORT_GEN5 = export.inc.gen5 + +INTEL_MC_ASM = \ + add_Error_16x16_Y.asm \ + add_Error_UV.asm \ + AllAVC.asm \ + AllAVCField.asm \ + AllAVCFrame.asm \ + AllAVCMBAFF.asm \ + AllIntra.asm \ + AVCMCInter.asm \ + BSDReset.asm \ + chromaMVAdjust.asm \ + DCResetDummy.asm \ + Decode_Chroma_Intra.asm \ + EndIntraThread.asm \ + initialize_MBPara.asm \ + interpolate_C_2x2.asm \ + interpolate_C_4x4.asm \ + interpolate_Y_4x4.asm \ + interpolate_Y_8x8.asm \ + Intra_16x16.asm \ + Intra_4x4.asm \ + Intra_8x8.asm \ + Intra_funcLib.asm \ + Intra_PCM.asm \ + intra_pred_16x16_Y.asm \ + intra_Pred_4x4_Y_4.asm \ + intra_Pred_8x8_Y.asm \ + intra_Pred_Chroma.asm \ + load_Intra_Ref_UV.asm \ + load_Intra_Ref_Y.asm \ + loadRef_C_10x5.asm \ + loadRef_C_6x3.asm \ + loadRef_Y_16x13.asm \ + loadRef_Y_16x9.asm \ + recon_C_4x4.asm \ + recon_Y_8x8.asm \ + roundShift_C_4x4.asm \ + save_16x16_Y.asm \ + save_4x4_Y.asm \ + save_8x8_UV.asm \ + save_8x8_Y.asm \ + save_I_PCM.asm \ + scoreboard.asm \ + scoreboard_MBAFF.asm \ + scoreboard_restore_AS.asm \ + scoreboard_save_AS.asm \ + scoreboard_sip.asm \ + scoreboard_start_inter.asm \ + scoreboard_start_intra.asm \ + scoreboard_update.asm \ + SetHWScoreboard.asm \ + SetHWScoreboard_MBAFF.asm \ + set_SB_offset.asm \ + SetupForHWMC.asm \ + weightedPred.asm \ + writeRecon_C_8x4.asm \ + writeRecon_Y_16x8.asm \ + writeRecon_YC.asm + +INTEL_ILDB_ASM = \ + ../ildb/AVC_ILDB_Child_Field_UV.asm \ + ../ildb/AVC_ILDB_Child_Field_Y.asm \ + ../ildb/AVC_ILDB_Child_Mbaff_UV.asm \ + ../ildb/AVC_ILDB_Child_Mbaff_Y.asm \ + ../ildb/AVC_ILDB_Child_UV.asm \ + ../ildb/AVC_ILDB_Child_Y.asm \ + ../ildb/AVC_ILDB_Chroma_Core.asm \ + ../ildb/AVC_ILDB_Chroma_Core_Mbaff.asm \ + ../ildb/AVC_ILDB_CloseGateway.asm \ + ../ildb/AVC_ILDB_Dep_Check.asm \ + ../ildb/AVC_ILDB_Filter_Mbaff_UV_h.asm \ + ../ildb/AVC_ILDB_Filter_Mbaff_UV_v.asm \ + ../ildb/AVC_ILDB_Filter_Mbaff_Y_h.asm \ + ../ildb/AVC_ILDB_Filter_Mbaff_Y_v.asm \ + ../ildb/AVC_ILDB_Filter_UV_h.asm \ + ../ildb/AVC_ILDB_Filter_UV_v.asm \ + ../ildb/AVC_ILDB_Filter_Y_h.asm \ + ../ildb/AVC_ILDB_Filter_Y_v.asm \ + ../ildb/AVC_ILDB_ForwardMsg.asm \ + ../ildb/AVC_ILDB_Luma_Core.asm \ + ../ildb/AVC_ILDB_Luma_Core_Mbaff.asm \ + ../ildb/AVC_ILDB_LumaThrdLimit.asm \ + ../ildb/AVC_ILDB_OpenGateway.asm \ + ../ildb/AVC_ILDB_Root_Field_UV.asm \ + ../ildb/AVC_ILDB_Root_Field_Y.asm \ + ../ildb/AVC_ILDB_Root_Mbaff_UV.asm \ + ../ildb/AVC_ILDB_Root_Mbaff_Y.asm \ + ../ildb/AVC_ILDB_Root_UV.asm \ + ../ildb/AVC_ILDB_Root_Y.asm \ + ../ildb/AVC_ILDB_Spawn.asm \ + ../ildb/AVC_ILDB_SpawnChild.asm \ + ../ildb/AVC_ILDB_SpawnChromaRoot.asm \ + ../ildb/load_Cur_UV_8x8T.asm \ + ../ildb/load_Cur_UV_8x8T_Mbaff.asm \ + ../ildb/load_Cur_UV_Right_Most_2x8.asm \ + ../ildb/load_Cur_Y_16x16T.asm \ + ../ildb/load_Cur_Y_16x16T_Mbaff.asm \ + ../ildb/load_Cur_Y_Right_Most_4x16.asm \ + ../ildb/Load_ILDB_Cntrl_Data_16DW.asm \ + ../ildb/Load_ILDB_Cntrl_Data_22DW.asm \ + ../ildb/Load_ILDB_Cntrl_Data_64DW.asm \ + ../ildb/Load_ILDB_Cntrl_Data.asm \ + ../ildb/load_Left_UV_2x8T.asm \ + ../ildb/load_Left_UV_2x8T_Mbaff.asm \ + ../ildb/load_Left_Y_4x16T.asm \ + ../ildb/load_Left_Y_4x16T_Mbaff.asm \ + ../ildb/loadNV12_16x16T.asm \ + ../ildb/loadNV12_16x4.asm \ + ../ildb/load_Top_UV_8x2.asm \ + ../ildb/load_Top_UV_8x2_Mbaff.asm \ + ../ildb/load_Top_Y_16x4.asm \ + ../ildb/load_Top_Y_16x4_Mbaff.asm \ + ../ildb/save_Cur_UV_8x8.asm \ + ../ildb/save_Cur_UV_8x8_Mbaff.asm \ + ../ildb/save_Cur_Y_16x16.asm \ + ../ildb/save_Cur_Y_16x16_Mbaff.asm \ + ../ildb/save_Left_UV_8x2T.asm \ + ../ildb/save_Left_UV_8x2T_Mbaff.asm \ + ../ildb/save_Left_Y_16x4T.asm \ + ../ildb/save_Left_Y_16x4T_Mbaff.asm \ + ../ildb/saveNV12_16x16.asm \ + ../ildb/saveNV12_16x4.asm \ + ../ildb/saveNV12_16x4T.asm \ + ../ildb/save_Top_UV_8x2.asm \ + ../ildb/save_Top_UV_8x2_Mbaff.asm \ + ../ildb/save_Top_Y_16x4.asm \ + ../ildb/save_Top_Y_16x4_Mbaff.asm \ + ../ildb/SetupVPKernel.asm \ + ../ildb/Transpose_Cur_UV_2x8.asm \ + ../ildb/Transpose_Cur_UV_8x8.asm \ + ../ildb/Transpose_Cur_UV_Right_Most_2x8.asm \ + ../ildb/Transpose_Cur_Y_16x16.asm \ + ../ildb/Transpose_Cur_Y_4x16.asm \ + ../ildb/Transpose_Cur_Y_Right_Most_4x16.asm \ + ../ildb/Transpose_Left_UV_2x8.asm \ + ../ildb/Transpose_Left_Y_4x16.asm \ + ../ildb/TransposeNV12_16x16.asm \ + ../ildb/TransposeNV12_4x16.asm \ + ../ildb/writeURB.asm \ + ../ildb/writeURB_UV_Child.asm \ + ../ildb/writeURB_Y_Child.asm + +EXTRA_DIST = $(INTEL_G4I) \ + $(INTEL_G4A) \ + $(INTEL_G4B) \ + $(INTEL_G4B_GEN5) + +if HAVE_GEN4ASM + +SUFFIXES = .g4a .g4b +.g4a.g4b: + m4 $*.g4a > $*.g4m && intel-gen4asm -o $@ $*.g4m && intel-gen4asm -g 5 -o $@.gen5 $*.g4m && rm $*.g4m + +$(INTEL_MC_G4B_GEN5): $(INTEL_MC_ASM) $(INTEL_ILDB_ASM) + @cpp -D DEV_ILK -I ../ildb/ AllAVC.asm > a.asm; \ + ../../gpp.py a.asm avc_mc.asm; \ + intel-gen4asm -l list -a -e _export.inc -o $@ -g 5 avc_mc.asm; \ + cpp -D DEV_ILK -I ../ildb/ AllAVC.asm > a.asm; \ + ../../gpp.py a.asm avc_mc.asm; \ + intel-gen4asm -l list -a -e _export.inc -o $@ -g 5 avc_mc.asm; \ + cat _export.inc | sed "s/_IP/_IP_GEN5/g" > $(INTEL_MC_EXPORT_GEN5); \ + rm a.asm avc_mc.asm _export.inc + +$(INTEL_G4B): $(INTEL_G4I) + +BUILT_SOURCES= $(INTEL_G4B) $(INTEL_MC_G4B) $(INTEL_MC_G4B_GEN5) + +clean-local: + -rm -f $(INTEL_G4B) + -rm -f $(INTEL_G4B_GEN5) + -rm -f $(INTEL_MC_G4B_GEN5) $(INTEL_MC_EXPORT_GEN5) +endif diff --git a/src/shaders/h264/mc/Scoreboard_header.inc b/src/shaders/h264/mc/Scoreboard_header.inc new file mode 100644 index 00000000..5e87275e --- /dev/null +++ b/src/shaders/h264/mc/Scoreboard_header.inc @@ -0,0 +1,85 @@ +/*
+ * Common header file for both scoreboard and scoreboard_MBAFF kernels
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+#if !defined(__SCOREBOARD_HEADER__) // Make sure this file is only included once
+#define __SCOREBOARD_HEADER__
+
+// Module name: scoreboard_header.inc
+//
+// Common header file for both scoreboard and scoreboard_MBAFF kernels
+//
+
+#define ONE_MB_WA // Enable WA for 1-MB wide pictures. To disable WA, simply comment out this line.
+
+#define INLINE_REG_OFF 1
+#define INLINE_REG r1
+#define INLINE_REG1 r2
+
+#define DONEFLAG 0x40 // Bit mask of "completed" thread flag
+
+// GRF r1 map
+//
+#define WIDTHINMB_1 INLINE_REG.0 // :uw type. Picture width in MB - 1
+#define HEIGHTINMB_1 INLINE_REG.1 // :uw type. Picture height in MB - 1
+#define TotalMB INLINE_REG.2 // :uw type. Total number of macroblocks
+#define WFLen_B INLINE_REG.3 // :uw type. Bottom MB Wavefront length (Reserved for MBAFF scoreboard)
+#define WFLen INLINE_REG.4 // :uw type. Wavefront length (used as loop counter)
+#define WFLenY INLINE_REG.5 // :uw type. Wavefront length (vertical component)
+#define StartX INLINE_REG.6 // :uw type. Start X of current wavefront
+#define StartY INLINE_REG.7 // :uw type. Start Y of current wavefront
+#define StartXD INLINE_REG.3 // :ud type. Start (X,Y) of current wavefront
+#define CASE00PTR INLINE_REG.4 // :ud type. Pointer to "inter start" handler
+#define WFLen_Save INLINE_REG.10 // :uw type. Saved Wavefront length (Reserved for MBAFF scoreboard)
+#define CASE10PTR INLINE_REG.6 // :ud type. Pointer to "intra start" handler
+#define CASE11PTR INLINE_REG.7 // :ud type. Pointer to "inter complete" handler
+
+// GRF r2 map
+//
+.declare WFStart Base=GRF(2) ElementSize=2 SrcRegion=REGION(4,1) Type=w // Start MB of recent 4 wavefronts, actually use 5 WORDs
+.declare WFStart_T Base=GRF(2) ElementSize=2 SrcRegion=REGION(4,1) Type=w // Start MB of recent 4 wavefronts
+.declare WFStart_B Base=GRF(2).4 ElementSize=2 SrcRegion=REGION(4,1) Type=w // Start MB of recent 4 wavefronts
+
+#define NewWFOffsetD INLINE_REG1.5 // :d type. Offsets used for new wavefront = 0x01ffff00 (0, -1, -1, 1)
+#define NewWFOffset INLINE_REG1.20 // :b type. Offsets used for new wavefront = 0x01ffff00 (0, -1, -1, 1)
+
+#define AVAILFLAGD INLINE_REG1.6 // :ud type. Neighbor available flags = 0x08020401 (in ACBD order)
+#define AVAILFLAG INLINE_REG1.24 // :ub type. Neighbor available flags as above
+#define AVAILFLAG1D INLINE_REG1.7 // :ud type. Top-half neighbor available flags = 0x80402010 (in A_Bxxx order)
+
+.declare MBINDEX Base=GRF(3) ElementSize=2 SrcRegion=REGION(16,1) Type=w // MB order # of current MB group (Cur, ACBD and AC_B_D_)
+#define AR_SAVE r3.8 // :uw type. Saved Address Register information
+
+#define CMDPTR a0.0 // :uw type. DWORD Pointer to the scoreboard
+#define DEPPTR a0.0 // :uw type. Pointer to the dependency scoreboard - Current MB
+#define DEPPTRL a0.1 // :uw type. Pointer to the dependency scoreboard - Left MB
+#define DEPPTRTR a0.2 // :uw type. Pointer to the dependency scoreboard - Top right MB
+#define DEPPTRT a0.3 // :uw type. Pointer to the dependency scoreboard - Top MB
+#define DEPPTRTL a0.4 // :uw type. Pointer to the dependency scoreboard - Top left MB
+#define DEPPTRLB a0.5 // :uw type. Pointer to the dependency scoreboard - Left bottom-half MB
+
+#define PMSGSEL a0.7 // :uw type. Pointer to current message in message handling table
+
+#define CMD_SB_REG_OFF 4
+.declare CMD_SB Base=GRF(4) ElementSize=4 SrcRegion=REGION(8,1) Type=ud // Command scoreboard (64 GRF)
+
+#ifdef AS_ENABLED
+// Definitions for Advanced Scheduler support
+#define AS_INT BIT23 // "Preemption Exception Status" bit in cr0.1:ud control register
+#define AS_INT_EN BIT10 // "Preemption Exception Enable" bit in cr0.1:ud control register
+#define TH_INT BIT2 // "Thread Interrupted" bit in message descriptor
+#define TH_RES BIT0 // "Thread Restart Enable" bit in R0 header r0.2
+
+#define AS_SAVE 34 // Surface state for saving scoreboard contents
+ // Ensure not to conflict with existing binding table entries
+#endif // End AS_ENABLED
+
+// End of scoreboard_header
+
+#endif // !defined(__SCOREBOARD_HEADER__)
+
diff --git a/src/shaders/h264/mc/SetHWScoreboard.asm b/src/shaders/h264/mc/SetHWScoreboard.asm new file mode 100644 index 00000000..c2da855f --- /dev/null +++ b/src/shaders/h264/mc/SetHWScoreboard.asm @@ -0,0 +1,209 @@ +/*
+ * Set dependency control HW scoreboard kernel
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: SetHWScoreboard.asm
+//
+// Set dependency control HW scoreboard kernel
+//
+
+// ----------------------------------------------------
+// Main: SetHWScoreboard
+// ----------------------------------------------------
+
+.kernel SetHWScoreboard
+
+SETHWSCOREBOARD:
+
+#ifdef _DEBUG
+// WA for FULSIM so we'll know which kernel is being debugged
+mov (1) acc0:ud 0xf0aa55a5:ud
+#endif
+
+#include "header.inc"
+#include "SetHWScoreboard_header.inc"
+
+//
+// Now, begin source code....
+//
+
+.code
+
+// Separate the TotalMB so TotalMB will be multiple of 8
+// and RemainderMB will hold the TotalMB%8
+//
+ and.z.f0.1 (1) RemainderMB<1>:uw TotalMB<0;1,0>:uw 0x0007:uw // number of %8 commands
+ and.z.f0.0 (1) TotalMB<1>:uw TotalMB<0;1,0>:uw 0xfff8:uw // Number of 8-command blocks
+
+ mov (1) MB_SHIFT_MASK_W<1>:uw 0x100*16+12:w // Set up shift values (12, 16)
+
+// Initialize common DAP read header
+//
+ mov (8) MRF_READ_HEADER_SRC<1>:ud r0.0<8;8,1>:ud
+ shl (1) MRF_READ_HEADER_SRC.2<1>:ud StartingMB<0;1,0>:uw 6:uw // Byte-aligned offset being read
+
+// Initialize Inter DAP write header
+ mov (8) MRF_INTER_WRITE_HEADER<1>:ud r0.0<8;8,1>:ud
+
+ (f0.0) jmpi (1) SetHWScoreboard_Remainder // Jump if TotalMB < 8
+
+//------------------------------------------------------------------------
+// Command buffer parsing loop
+// Each loop will handle 8 commands
+//------------------------------------------------------------------------
+//
+SetHWScoreboard_Loop:
+// Load block 0 (Commands 0/1)
+ mov (8) MRF_READ_HEADER0.0<1>:ud MRF_READ_HEADER_SRC.0<8;8,1>:ud
+ send (16) CMD_BUFFER_W(0)<1> MRF_READ_HEADER0 null:uw DAPREAD RESP_LEN(4)+OWBRMSGDSC_SC+OWORD_8+BI_CMD_BUFFER
+
+// Load block 1 (Commands 2/3)
+ mov (8) MRF_READ_HEADER1.0<1>:ud MRF_READ_HEADER_SRC.0<8;8,1>:ud
+ add (1) MRF_READ_HEADER1.2<1>:ud MRF_READ_HEADER_SRC.2<0;1,0>:ud 128:ud // Point to next 2-command block
+ send (16) CMD_BUFFER_W(4)<1> MRF_READ_HEADER1 null:uw DAPREAD RESP_LEN(4)+OWBRMSGDSC_SC+OWORD_8+BI_CMD_BUFFER
+
+// Load block 2 (Commands 4/5)
+ mov (8) MRF_READ_HEADER2.0<1>:ud MRF_READ_HEADER_SRC.0<8;8,1>:ud
+ add (1) MRF_READ_HEADER2.2<1>:ud MRF_READ_HEADER_SRC.2<0;1,0>:ud 256:ud // Point to next 2-command block
+ send (16) CMD_BUFFER_W(8)<1> MRF_READ_HEADER2 null:uw DAPREAD RESP_LEN(4)+OWBRMSGDSC_SC+OWORD_8+BI_CMD_BUFFER
+
+// Load block 3 (Commands 6/7)
+ mov (8) MRF_READ_HEADER3.0<1>:ud MRF_READ_HEADER_SRC.0<8;8,1>:ud
+ add (1) MRF_READ_HEADER3.2<1>:ud MRF_READ_HEADER_SRC.2<0;1,0>:ud 384:ud // Point to next 2-command block
+ send (16) CMD_BUFFER_W(12)<1> MRF_READ_HEADER3 null:uw DAPREAD RESP_LEN(4)+OWBRMSGDSC_SC+OWORD_8+BI_CMD_BUFFER
+
+// Start parsing commands
+ $for(0; <16; 2) {
+ and.nz.f0.1 (8) NULLREG CMD_BUFFER_D(%1,4)<0;1,0> IS_INTRA_MB:ud // Is it an "Intra" MB?
+ or (1) CMD_BUFFER_D(%1,2)<1> CMD_BUFFER_D(%1,2)<0;1,0> BIT21:ud // Set "Use Scoreboard" for every MB
+ shl (2) CMD_BUFFER_W(%1,2)<1> CMD_BUFFER_W(%1,14)<0;1,0> MB_SHIFT_MASK_B<2;2,1>:b // Set HW SB masks
+ mov (2) CMD_BUFFER_B(%1,4)<2> CMD_BUFFER_B(%1,20)<2;2,1> // Set scoreboard (X,Y) for intra MB
+ (-f0.1) mov (2) CMD_BUFFER_W(%1,2)<1> CMD_BUFFER_B(%1,20)<2;2,1> // Set scoreboard (X,Y) for inter MB
+ (f0.1) jmpi (1) Parse_8_Loop_%1
+
+// Inter Macroblock
+// Output MEDIA_OBJECT command in raster scan order
+ mul (16) acc0<1>:uw CMD_BUFFER_B(%1,21)<0;1,0> PicWidthMB<0;1,0>:uw // MB offset = Y*W
+ add (16) acc0<1>:uw acc0<8;8,1>:uw CMD_BUFFER_B(%1,20)<0;1,0> // MB offset = Y*W+X
+ shl (1) MRF_INTER_WRITE_HEADER.2<1>:ud acc0.2<0;1,0>:uw 6:uw // Byte-aligned MB offset
+ mov (16) MRF_INTER_WRITE_DATA0<1>:ud CMD_BUFFER_D(%1)<8;8,1> {Compr} // Copy entire command to inter buffer
+ mov (16) CMD_BUFFER_D(%1)<1> 0:ud {Compr} // Clear original command
+ send (16) NULLREGW MRF_INTER_WRITE_HEADER null:uw DAPWRITE MSG_LEN(2)+OWBWMSGDSC+OWORD_4+BI_CMD_BUFFER
+
+Parse_8_Loop_%1:
+ }
+
+ add.z.f0.0 (1) TotalMB<1>:w TotalMB<0;1,0>:w -8:w // Update remaining number of 8-command blocks
+
+// Output modified intra commands
+// Write block 0
+ mov (8) MRF_INTRA_WRITE_HEADER.0<1>:ud MRF_READ_HEADER_SRC.0<8;8,1>:ud
+ $for(0; <4; 2) {
+ mov (16) MRF_CMD_BUF_D(%1)<1> CMD_BUFFER_D(%1)<8;8,1> {Compr}
+ }
+ send (16) NULLREGW MRF_INTRA_WRITE_HEADER null:uw DAPWRITE MSG_LEN(4)+OWBWMSGDSC+OWORD_8+BI_CMD_BUFFER
+
+// Write block 1
+ mov (8) m1.0<1>:ud MRF_READ_HEADER_SRC.0<8;8,1>:ud
+ add (1) m1.2<1>:ud MRF_READ_HEADER_SRC.2<0;1,0>:ud 128:ud // Point to next 2-command block
+ mov (16) m2<1>:ud CMD_BUFFER_D(4)<8;8,1> {Compr}
+ mov (16) m4<1>:ud CMD_BUFFER_D(6)<8;8,1> {Compr}
+ send (16) NULLREGW m1 null:uw DAPWRITE MSG_LEN(4)+OWBWMSGDSC+OWORD_8+BI_CMD_BUFFER
+
+// Write block 2
+ add (1) MRF_INTRA_WRITE_HEADER.2<1>:ud MRF_READ_HEADER_SRC.2<0;1,0>:ud 256:ud // Point to next 2-command block
+ $for(0; <4; 2) {
+ mov (16) MRF_CMD_BUF_D(%1)<1> CMD_BUFFER_D(%1+8)<8;8,1> {Compr}
+ }
+ send (16) NULLREGW MRF_INTRA_WRITE_HEADER null:uw DAPWRITE MSG_LEN(4)+OWBWMSGDSC+OWORD_8+BI_CMD_BUFFER
+
+// Write block 3
+ add (1) m1.2<1>:ud MRF_READ_HEADER_SRC.2<0;1,0>:ud 384:ud // Point to next 2-command block
+ mov (16) m2<1>:ud CMD_BUFFER_D(12)<8;8,1> {Compr}
+ mov (16) m4<1>:ud CMD_BUFFER_D(14)<8;8,1> {Compr}
+ send (16) NULLREGW m1 null:uw DAPWRITE MSG_LEN(4)+OWBWMSGDSC+OWORD_8+BI_CMD_BUFFER
+
+// Update message header for next DAP read
+ add (1) MRF_READ_HEADER_SRC.2<1>:ud MRF_READ_HEADER_SRC.2<0;1,0>:ud 512:ud // Point to next block of 8-commands
+
+ cmp.z.f0.1 (1) NULLREG RemainderMB<0;1,0>:w 0:uw // Check if remainder MB = 0
+ (-f0.0) jmpi (1) SetHWScoreboard_Loop // Continue if more command blocks remain
+
+SetHWScoreboard_Remainder:
+// f0.1 should have been set to indicate if RemainderMB = 0
+//
+ (f0.1) jmpi (1) SetHWScoreboard_Done // Stop if all commands have been updated
+
+// Blindly load next 8 commands anyway
+//
+// Load block 0 (Commands 0/1)
+ mov (8) MRF_READ_HEADER0.0<1>:ud MRF_READ_HEADER_SRC.0<8;8,1>:ud
+ send (16) CMD_BUFFER_W(0)<1> MRF_READ_HEADER0 null:uw DAPREAD RESP_LEN(4)+OWBRMSGDSC_SC+OWORD_8+BI_CMD_BUFFER
+
+// Load block 1 (Commands 2/3)
+ mov (8) MRF_READ_HEADER1.0<1>:ud MRF_READ_HEADER_SRC.0<8;8,1>:ud
+ add (1) MRF_READ_HEADER1.2<1>:ud MRF_READ_HEADER_SRC.2<0;1,0>:ud 128:ud // Point to next 2-command block
+ send (16) CMD_BUFFER_W(4)<1> MRF_READ_HEADER1 null:uw DAPREAD RESP_LEN(4)+OWBRMSGDSC_SC+OWORD_8+BI_CMD_BUFFER
+
+// Load block 2 (Commands 4/5)
+ mov (8) MRF_READ_HEADER2.0<1>:ud MRF_READ_HEADER_SRC.0<8;8,1>:ud
+ add (1) MRF_READ_HEADER2.2<1>:ud MRF_READ_HEADER_SRC.2<0;1,0>:ud 256:ud // Point to next 2-command block
+ send (16) CMD_BUFFER_W(8)<1> MRF_READ_HEADER2 null:uw DAPREAD RESP_LEN(4)+OWBRMSGDSC_SC+OWORD_8+BI_CMD_BUFFER
+
+// Load block 3 (Commands 6/7)
+ mov (8) MRF_READ_HEADER3.0<1>:ud MRF_READ_HEADER_SRC.0<8;8,1>:ud
+ add (1) MRF_READ_HEADER3.2<1>:ud MRF_READ_HEADER_SRC.2<0;1,0>:ud 384:ud // Point to next 2-command block
+ send (16) CMD_BUFFER_W(12)<1> MRF_READ_HEADER3 null:uw DAPREAD RESP_LEN(4)+OWBRMSGDSC_SC+OWORD_8+BI_CMD_BUFFER
+
+// Initialize necessary pointers
+ mov (1) a0.1<1>:ud ((CMD_BUFFER_REG_OFF+1)*0x10000+CMD_BUFFER_REG_OFF)*32 // a0.2:w points to command buffer (first half)
+ // a0.3:w points to command buffer (second half)
+// Initialize Inter DAP write header
+ mov (8) MRF_INTER_WRITE_HEADER<1>:ud r0.0<8;8,1>:ud
+
+SetHWScoreboard_Remainder_Loop:
+ and.nz.f0.1 (8) NULLREG r[a0.2,4*4]<0;1,0>:ud IS_INTRA_MB:ud // Is it an "Intra" MB?
+ add.z.f0.0 (1) RemainderMB<1>:w RemainderMB<0;1,0>:w -1:w // Decrement MB #
+ or (1) r[a0.2,2*4]<1>:ud r[a0.2,2*4]<0;1,0>:ud BIT21:ud // Set "Use Scoreboard" for every MB
+ shl (2) r[a0.2,2*2]<1>:uw r[a0.2,14*2]<0;1,0>:uw MB_SHIFT_MASK_B<2;2,1>:b // Set HW SB masks
+ mov (2) r[a0.2,4*1]<2>:ub r[a0.2,5*4]<2;2,1>:ub // Set scoreboard (X,Y) for intra MB
+
+ (-f0.1) mov (2) r[a0.2,4*1]<1>:uw r[a0.2,5*4]<2;2,1>:ub // Set scoreboard (X,Y) for inter MB
+ (f0.1) jmpi (1) Output_Remainder_Intra
+
+// Inter Macroblock
+// Output MEDIA_OBJECT command in raster scan order
+ mul (16) acc0<1>:uw r[a0.2,21]<0;1,0>:ub PicWidthMB<0;1,0>:uw // MB offset = Y*W
+ add (16) acc0<1>:uw acc0<8;8,1>:uw r[a0.2,20]<0;1,0>:ub // MB offset = Y*W+X
+ shl (1) MRF_INTER_WRITE_HEADER.2<1>:ud acc0.2<0;1,0>:uw 6:uw // Byte-aligned MB offset
+ mov (16) MRF_INTER_WRITE_DATA0<1>:ud r[a0.2]<8;8,1>:ud {Compr} // Copy entire command to inter buffer
+ mov (16) r[a0.2]<1>:ud 0:ud {Compr} // Clear original command
+ send (16) NULLREGW MRF_INTER_WRITE_HEADER null:uw DAPWRITE MSG_LEN(2)+OWBWMSGDSC+OWORD_4+BI_CMD_BUFFER
+
+Output_Remainder_Intra:
+// Intra MB command always output
+ mov (8) MRF_INTRA_WRITE_HEADER.0<1>:ud MRF_READ_HEADER_SRC.0<8;8,1>:ud
+ mov (16) MRF_CMD_BUF_D(0)<1> r[a0.2]<8;8,1>:ud {Compr} // Copy entire command to intra buffer
+ send (16) NULLREGW MRF_INTRA_WRITE_HEADER null:uw DAPWRITE MSG_LEN(2)+OWBWMSGDSC+OWORD_4+BI_CMD_BUFFER
+
+ add (1) MRF_READ_HEADER_SRC.2<1>:ud MRF_READ_HEADER_SRC.2<0;1,0>:ud 64:ud // Point to next command
+ add (1) a0.1<1>:ud a0.1<0;1,0>:ud 0x00400040:ud // Update pointers
+ (-f0.0) jmpi (1) SetHWScoreboard_Remainder_Loop
+
+// All MBs have been decoded. Terminate the thread now
+//
+SetHWScoreboard_Done:
+ END_THREAD
+
+#if !defined(COMBINED_KERNEL) // For standalone kernel only
+.end_code
+
+.end_kernel
+#endif
+
+// End of SetHWScoreboard
diff --git a/src/shaders/h264/mc/SetHWScoreboard_MBAFF.asm b/src/shaders/h264/mc/SetHWScoreboard_MBAFF.asm new file mode 100644 index 00000000..c5cfeb3d --- /dev/null +++ b/src/shaders/h264/mc/SetHWScoreboard_MBAFF.asm @@ -0,0 +1,279 @@ +/*
+ * Set dependency control HW scoreboard kernel for MBAFF picture
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: SetHWScoreboard_MBAFF.asm
+//
+// Set dependency control HW scoreboard kernel for MBAFF picture
+//
+
+// ----------------------------------------------------
+// Main: SetHWScoreboard_MBAFF
+// ----------------------------------------------------
+
+.kernel SetHWScoreboard_MBAFF
+
+SETHWSCOREBOARD_MBAFF:
+
+#ifdef _DEBUG
+// WA for FULSIM so we'll know which kernel is being debugged
+mov (1) acc0:ud 0xf1aa55a5:ud
+#endif
+
+#include "header.inc"
+#include "SetHWScoreboard_header.inc"
+
+//
+// Now, begin source code....
+//
+
+.code
+
+// Separate the TotalMB so TotalMB will be multiple of 8
+// and RemainderMB will hold the TotalMB%8
+//
+ and.z.f0.1 (1) RemainderMB<1>:uw TotalMB<0;1,0>:uw 0x0007:uw // number of %8 commands
+ and.z.f0.0 (1) TotalMB<1>:uw TotalMB<0;1,0>:uw 0xfff8:uw // Number of 8-command blocks
+
+// Initialize common DAP read header
+//
+ mov (8) MRF_READ_HEADER_SRC<1>:ud r0.0<8;8,1>:ud
+ shl (1) MRF_READ_HEADER_SRC.2<1>:ud StartingMB<0;1,0>:uw 6:uw // Byte-aligned offset being read
+
+// Initialize Inter DAP write header
+ mov (8) MRF_INTER_WRITE_HEADER<1>:ud r0.0<8;8,1>:ud
+
+ (f0.0) jmpi (1) SetHWScoreboard_MBAFF_Remainder // Jump if TatalMB < 8
+
+//------------------------------------------------------------------------
+// Command buffer parsing loop
+// Each loop will handle 8 commands
+//------------------------------------------------------------------------
+//
+SetHWScoreboard_MBAFF_Loop:
+// Load block 0 (Commands 0/1)
+ mov (8) MRF_READ_HEADER0.0<1>:ud MRF_READ_HEADER_SRC.0<8;8,1>:ud
+ send (16) CMD_BUFFER_W(0)<1> MRF_READ_HEADER0 null:uw DAPREAD RESP_LEN(4)+OWBRMSGDSC_SC+OWORD_8+BI_CMD_BUFFER
+
+// Load block 1 (Commands 2/3)
+ mov (8) MRF_READ_HEADER1.0<1>:ud MRF_READ_HEADER_SRC.0<8;8,1>:ud
+ add (1) MRF_READ_HEADER1.2<1>:ud MRF_READ_HEADER_SRC.2<0;1,0>:ud 128:ud // Point to next 2-command block
+ send (16) CMD_BUFFER_W(4)<1> MRF_READ_HEADER1 null:uw DAPREAD RESP_LEN(4)+OWBRMSGDSC_SC+OWORD_8+BI_CMD_BUFFER
+
+// Load block 2 (Commands 4/5)
+ mov (8) MRF_READ_HEADER2.0<1>:ud MRF_READ_HEADER_SRC.0<8;8,1>:ud
+ add (1) MRF_READ_HEADER2.2<1>:ud MRF_READ_HEADER_SRC.2<0;1,0>:ud 256:ud // Point to next 2-command block
+ send (16) CMD_BUFFER_W(8)<1> MRF_READ_HEADER2 null:uw DAPREAD RESP_LEN(4)+OWBRMSGDSC_SC+OWORD_8+BI_CMD_BUFFER
+
+// Load block 3 (Commands 6/7)
+ mov (8) MRF_READ_HEADER3.0<1>:ud MRF_READ_HEADER_SRC.0<8;8,1>:ud
+ add (1) MRF_READ_HEADER3.2<1>:ud MRF_READ_HEADER_SRC.2<0;1,0>:ud 384:ud // Point to next 2-command block
+ send (16) CMD_BUFFER_W(12)<1> MRF_READ_HEADER3 null:uw DAPREAD RESP_LEN(4)+OWBRMSGDSC_SC+OWORD_8+BI_CMD_BUFFER
+
+// Start parsing commands
+ $for(0; <16; 2) {
+// Adjust MB Y origin for field MBs
+//
+ mov (2) TEMP_FD_X_W<1>:uw CMD_BUFFER_B(%1,20)<2;2,1> // Initialize temp (X,Y) location
+ and.nz.f0.1 (8) NULLREG CMD_BUFFER_D(%1,4)<0;1,0> IS_BOT_FD:ud // Is it a "Bottom Field MB"?
+ and.nz.f0.0 (8) NULLREG CMD_BUFFER_D(%1,4)<0;1,0> IS_FIELD_MB:ud // Is it a "Field MB"?
+ mul (8) acc0<1>:w CMD_BUFFER_B(%1,21)<0;1,0> 2:w
+ (-f0.1) mov (1) TEMP_FD_Y_W<1>:w acc0<0;1,0>:w
+ (f0.1) add (1) TEMP_FD_Y_W<1>:w acc0<0;1,0>:w 1:w
+ (-f0.0) mov (1) TEMP_FD_Y_W<1>:w CMD_BUFFER_B(%1,21)<0;1,0> // Discard field MB Y origin handling
+
+ and.nz.f0.0 (8) NULLREG CMD_BUFFER_D(%1,4)<0;1,0> IS_INTRA_MB:ud // Is it an "Intra" MB?
+ and.nz.f0.1 (8) NULLREG TEMP_FD_Y_W<0;1,0>:uw BIT0 // Is it "Bottom MB"?
+ or (1) CMD_BUFFER_D(%1,2)<1> CMD_BUFFER_D(%1,2)<0;1,0> BIT21 // Set "Use Scoreboard"
+ mov (2) CMD_BUFFER_W(%1,2)<1> TEMP_FD_X_W<2;2,1>:uw // Set scoreboard (X,Y) for inter MB
+ (f0.0) jmpi (1) SET_SB_MBAFF_INTRA_%1 // Jump if intra MB.
+
+// Inter Macroblock
+// Output MEDIA_OBJECT command in raster scan order
+ mul (16) acc0<1>:uw TEMP_FD_Y_W<0;1,0>:uw PicWidthMB<0;1,0>:uw // MB offset = Y*W
+ add (16) acc0<1>:uw acc0<8;8,1>:uw TEMP_FD_X_W<0;1,0>:uw // MB offset = Y*W+X
+ shl (1) MRF_INTER_WRITE_HEADER.2<1>:ud acc0.2<0;1,0>:uw 6:uw // Byte-aligned MB offset
+ mov (16) MRF_INTER_WRITE_DATA0<1>:ud CMD_BUFFER_D(%1)<8;8,1> {Compr} // Copy entire command to inter buffer
+ mov (16) CMD_BUFFER_D(%1)<1> 0:ud {Compr} // Clear original command
+ send (16) NULLREGW MRF_INTER_WRITE_HEADER null:uw DAPWRITE MSG_LEN(2)+OWBWMSGDSC+OWORD_4+BI_CMD_BUFFER
+ jmpi (1) NEXT_MB_MBAFF_%1 // Done for inter MB. Move to next MB.
+
+SET_SB_MBAFF_INTRA_%1:
+// Intra MB
+//
+ and.nz.f0.0 (8) NULLREG CMD_BUFFER_D(%1,4)<0;1,0> IS_FIELD_MB:ud // Is it an "Field" MB?
+ (f0.1) sel (2) MB_MASK_D<1>:ud BOT_FD_MASK1_D<2;2,1>:ud TOP_FD_MASK1_D<2;2,1>:ud // Assume field MB
+ mov (1) TEMP_INTRA_FLAG_W<1>:uw CMD_BUFFER_W(%1,14)<0;1,0> // Don't want to alter original in-line data
+ (f0.0) jmpi (1) SET_SB_MBAFF_%1 // Jump if it's really field MB
+
+// Frame MB
+//
+// Derive E'
+ and.nz.f0.0 (8) NULLREG CMD_BUFFER_W(%1,14)<0;1,0> E_FLAG // Is "E" = 1
+ (f0.1) sel (2) MB_MASK_D<1>:ud BOT_FM_MASK1_D<2;2,1>:ud TOP_FM_MASK1_D<2;2,1>:ud
+ and.z.f0.1 (8) NULLREG CMD_BUFFER_W(%1,14)<0;1,0> A_FLAG // "A" = 0?
+ (f0.0) jmpi (1) SET_SB_MBAFF_%1 // If "E" flag = 1, skip the rest of derivation
+ (f0.1) and.nz.f0.1 (8) NULLREG CMD_BUFFER_D(%1,4)<0;1,0> IS_INTRA8X8
+ (f0.1) and.nz.f0.1 (8) NULLREG CMD_BUFFER_W(%1,14)<0;1,0> F_FLAG
+ (f0.1) or (1) TEMP_INTRA_FLAG_W<1>:uw CMD_BUFFER_W(%1,14)<0;1,0> E_FLAG
+
+SET_SB_MBAFF_%1:
+ and.nz.f0.1 (16) NULLREGW TEMP_INTRA_FLAG_W<0;1,0>:uw MB_MASK_B<0;8,1>:ub
+ shl (1) CMD_BUFFER_W(%1,2)<1> f0.1<0;1,0>:uw 12:w // Masks 0-3
+ and (1) CMD_BUFFER_W(%1,3)<1> f0.1<0;1,0>:uw 0xf000:uw // Masks 4-7
+
+ mov (2) CMD_BUFFER_B(%1,4)<2> TEMP_FD_X_B<4;2,2>:ub // Set scoreboard (X,Y) for intra MB
+
+NEXT_MB_MBAFF_%1:
+ }
+
+ add.z.f0.0 (1) TotalMB<1>:w TotalMB<0;1,0>:w -8:w // Update remaining number of 8-command blocks
+
+// Output modified intra commands
+// Write block 0
+ mov (8) MRF_INTRA_WRITE_HEADER.0<1>:ud MRF_READ_HEADER_SRC.0<8;8,1>:ud
+ $for(0; <4; 2) {
+ mov (16) MRF_CMD_BUF_D(%1)<1> CMD_BUFFER_D(%1)<8;8,1> {Compr}
+ }
+ send (16) NULLREGW MRF_INTRA_WRITE_HEADER null:uw DAPWRITE MSG_LEN(4)+OWBWMSGDSC+OWORD_8+BI_CMD_BUFFER
+
+// Write block 1
+ mov (8) m1.0<1>:ud MRF_READ_HEADER_SRC.0<8;8,1>:ud
+ add (1) m1.2<1>:ud MRF_READ_HEADER_SRC.2<0;1,0>:ud 128:ud // Point to next 2-command block
+ mov (16) m2<1>:ud CMD_BUFFER_D(4)<8;8,1> {Compr}
+ mov (16) m4<1>:ud CMD_BUFFER_D(6)<8;8,1> {Compr}
+ send (16) NULLREGW m1 null:uw DAPWRITE MSG_LEN(4)+OWBWMSGDSC+OWORD_8+BI_CMD_BUFFER
+
+// Write block 2
+ add (1) MRF_INTRA_WRITE_HEADER.2<1>:ud MRF_READ_HEADER_SRC.2<0;1,0>:ud 256:ud // Point to next 2-command block
+ $for(0; <4; 2) {
+ mov (16) MRF_CMD_BUF_D(%1)<1> CMD_BUFFER_D(%1+8)<8;8,1> {Compr}
+ }
+ send (16) NULLREGW MRF_INTRA_WRITE_HEADER null:uw DAPWRITE MSG_LEN(4)+OWBWMSGDSC+OWORD_8+BI_CMD_BUFFER
+
+// Write block 3
+ add (1) m1.2<1>:ud MRF_READ_HEADER_SRC.2<0;1,0>:ud 384:ud // Point to next 2-command block
+ mov (16) m2<1>:ud CMD_BUFFER_D(12)<8;8,1> {Compr}
+ mov (16) m4<1>:ud CMD_BUFFER_D(14)<8;8,1> {Compr}
+ send (16) NULLREGW m1 null:uw DAPWRITE MSG_LEN(4)+OWBWMSGDSC+OWORD_8+BI_CMD_BUFFER
+
+// Update message header for next DAP read
+ add (1) MRF_READ_HEADER_SRC.2<1>:ud MRF_READ_HEADER_SRC.2<0;1,0>:ud 512:ud // Point to next block of 8-commands
+
+ cmp.z.f0.1 (1) NULLREG RemainderMB<0;1,0>:w 0:uw // Check if remaining MB = 0
+ (-f0.0) jmpi (1) SetHWScoreboard_MBAFF_Loop // Continue if more command blocks remain
+
+SetHWScoreboard_MBAFF_Remainder:
+// f0.1 should have been set to indicate if RemainderMB = 0
+//
+ (f0.1) jmpi (1) SetHWScoreboard_MBAFF_Done // Stop if all commands have been updated
+
+// Blindly load next 8 commands anyway
+//
+// Load block 0 (Commands 0/1)
+ mov (8) MRF_READ_HEADER0.0<1>:ud MRF_READ_HEADER_SRC.0<8;8,1>:ud
+ send (16) CMD_BUFFER_W(0)<1> MRF_READ_HEADER0 null:uw DAPREAD RESP_LEN(4)+OWBRMSGDSC_SC+OWORD_8+BI_CMD_BUFFER
+
+// Load block 1 (Commands 2/3)
+ mov (8) MRF_READ_HEADER1.0<1>:ud MRF_READ_HEADER_SRC.0<8;8,1>:ud
+ add (1) MRF_READ_HEADER1.2<1>:ud MRF_READ_HEADER_SRC.2<0;1,0>:ud 128:ud // Point to next 2-command block
+ send (16) CMD_BUFFER_W(4)<1> MRF_READ_HEADER1 null:uw DAPREAD RESP_LEN(4)+OWBRMSGDSC_SC+OWORD_8+BI_CMD_BUFFER
+
+// Load block 2 (Commands 4/5)
+ mov (8) MRF_READ_HEADER2.0<1>:ud MRF_READ_HEADER_SRC.0<8;8,1>:ud
+ add (1) MRF_READ_HEADER2.2<1>:ud MRF_READ_HEADER_SRC.2<0;1,0>:ud 256:ud // Point to next 2-command block
+ send (16) CMD_BUFFER_W(8)<1> MRF_READ_HEADER2 null:uw DAPREAD RESP_LEN(4)+OWBRMSGDSC_SC+OWORD_8+BI_CMD_BUFFER
+
+// Load block 3 (Commands 6/7)
+ mov (8) MRF_READ_HEADER3.0<1>:ud MRF_READ_HEADER_SRC.0<8;8,1>:ud
+ add (1) MRF_READ_HEADER3.2<1>:ud MRF_READ_HEADER_SRC.2<0;1,0>:ud 384:ud // Point to next 2-command block
+ send (16) CMD_BUFFER_W(12)<1> MRF_READ_HEADER3 null:uw DAPREAD RESP_LEN(4)+OWBRMSGDSC_SC+OWORD_8+BI_CMD_BUFFER
+
+// Initialize necessary pointers
+ mov (1) a0.1<1>:ud ((CMD_BUFFER_REG_OFF+1)*0x10000+CMD_BUFFER_REG_OFF)*32 // a0.2:w points to command buffer (first half)
+ // a0.3:w points to command buffer (second half)
+// Initialize Inter DAP write header
+ mov (8) MRF_INTER_WRITE_HEADER<1>:ud r0.0<8;8,1>:ud
+
+SetHWScoreboard_MBAFF_Remainder_Loop:
+// Adjust MB Y origin for field MBs
+//
+ mov (2) TEMP_FD_X_W<1>:uw r[a0.2,5*4]<2;2,1>:ub // Initialize temp (X,Y) location
+ and.nz.f0.1 (8) NULLREG r[a0.2,4*4]<0;1,0>:ud IS_BOT_FD:ud // Is it a "Bottom Field MB"?
+ and.nz.f0.0 (8) NULLREG r[a0.2,4*4]<0;1,0>:ud IS_FIELD_MB:ud // Is it a "Field MB"?
+ mul (8) acc0<1>:w r[a0.2,21]<0;1,0>:ub 2:w
+ (-f0.1) mov (1) TEMP_FD_Y_W<1>:w acc0<0;1,0>:w
+ (f0.1) add (1) TEMP_FD_Y_W<1>:w acc0<0;1,0>:w 1:w
+ (-f0.0) mov (1) TEMP_FD_Y_W<1>:w r[a0.2,5*4+1]<0;1,0>:ub // Discard field MB Y origin handling
+
+ and.nz.f0.0 (8) NULLREG r[a0.2,4*4]<0;1,0>:ud IS_INTRA_MB:ud // Is it an "Intra" MB?
+ add.z.f0.1 (1) RemainderMB<1>:w RemainderMB<0;1,0>:w -1:w // Decrement MB #
+ or (1) r[a0.2,2*4]<1>:ud r[a0.2,2*4]<0;1,0>:ud BIT21:ud // Set "Use Scoreboard"
+ mov (2) r[a0.2,2*2]<1>:uw TEMP_FD_X_W<2;2,1>:uw // Set scoreboard (X,Y) for inter MB
+ (f0.0) jmpi (1) SET_SB_MBAFF_REM_INTRA // Jump if intra MB.
+
+// Inter Macroblock
+// Output MEDIA_OBJECT command in raster scan order
+ mul (16) acc0<1>:uw TEMP_FD_Y_W<0;1,0>:uw PicWidthMB<0;1,0>:uw // MB offset = Y*W
+ add (16) acc0<1>:uw acc0<8;8,1>:uw TEMP_FD_X_W<0;1,0>:uw // MB offset = Y*W+X
+ shl (1) MRF_INTER_WRITE_HEADER.2<1>:ud acc0.2<0;1,0>:uw 6:uw // Byte-aligned MB offset
+ mov (16) MRF_INTER_WRITE_DATA0<1>:ud r[a0.2]<8;8,1>:ud {Compr} // Copy entire command to inter buffer
+ mov (16) r[a0.2]<1>:ud 0:ud {Compr} // Clear original command
+ send (16) NULLREGW MRF_INTER_WRITE_HEADER null:uw DAPWRITE MSG_LEN(2)+OWBWMSGDSC+OWORD_4+BI_CMD_BUFFER
+ jmpi (1) Output_MBAFF_Remainder_Intra // Done for inter MB. Move to dump intra MB.
+
+SET_SB_MBAFF_REM_INTRA:
+// Intra MB
+//
+ and.nz.f0.1 (8) NULLREG TEMP_FD_Y_W<0;1,0>:uw BIT0:ud // Is it "Bottom MB"?
+ and.nz.f0.0 (8) NULLREG r[a0.2,4*4]<0;1,0>:ud IS_FIELD_MB:ud // Is it "Field MB"?
+ mov (1) TEMP_INTRA_FLAG_W<1>:uw r[a0.2,14*2]<0;1,0>:uw // Don't want to alter original in-line data
+ (f0.1) sel (2) MB_MASK_D<1>:ud BOT_FD_MASK1_D<2;2,1>:ud TOP_FD_MASK1_D<2;2,1>:ud // Assume field MB
+ (f0.0) jmpi (1) SET_SB_MBAFF_REM // Jump if it's really field MB
+
+// Frame MB
+//
+// Derive E'
+ and.nz.f0.0 (8) NULLREG r[a0.2,14*2]<0;1,0>:uw E_FLAG // Is "E" = 1
+ (f0.1) sel (2) MB_MASK_D<1>:ud BOT_FM_MASK1_D<2;2,1>:ud TOP_FM_MASK1_D<2;2,1>:ud
+ and.z.f0.1 (8) NULLREG r[a0.2,14*2]<0;1,0>:uw A_FLAG // "A" = 0?
+ (f0.0) jmpi (1) SET_SB_MBAFF_REM // If "E" flag = 1, skip the rest of derivation
+ (f0.1) and.nz.f0.1 (8) NULLREG r[a0.2,4*4]<0;1,0>:ud IS_INTRA8X8
+ (f0.1) and.nz.f0.1 (8) NULLREG r[a0.2,14*2]<0;1,0>:uw F_FLAG
+ (f0.1) or (1) TEMP_INTRA_FLAG_W<1>:uw r[a0.2,14*2]<0;1,0>:uw E_FLAG
+
+SET_SB_MBAFF_REM:
+ and.nz.f0.0 (16) NULLREGW TEMP_INTRA_FLAG_W<0;1,0>:uw MB_MASK_B<0;8,1>:ub
+ add.z.f0.1 (1) RemainderMB<1>:w RemainderMB<0;1,0>:w 0:w // Check remaining MB #
+ shl (1) r[a0.2,2*2]<1>:uw f0.0<0;1,0>:uw 12:w // Masks 0-3
+ and (1) r[a0.2,3*2]<1>:uw f0.0<0;1,0>:uw 0xf000:uw // Masks 4-7
+
+ mov (2) r[a0.2,4*1]<2>:ub TEMP_FD_X_B<4;2,2>:ub // Set scoreboard (X,Y) for intra MB
+
+Output_MBAFF_Remainder_Intra:
+// Intra MB command always output
+ mov (8) MRF_INTRA_WRITE_HEADER.0<1>:ud MRF_READ_HEADER_SRC.0<8;8,1>:ud
+ mov (16) MRF_CMD_BUF_D(0)<1> r[a0.2]<8;8,1>:ud {Compr} // Copy entire command to intra buffer
+ send (16) NULLREGW MRF_INTRA_WRITE_HEADER null:uw DAPWRITE MSG_LEN(2)+OWBWMSGDSC+OWORD_4+BI_CMD_BUFFER
+
+ add (1) MRF_READ_HEADER_SRC.2<1>:ud MRF_READ_HEADER_SRC.2<0;1,0>:ud 64:ud // Point to next command
+ add (1) a0.1<1>:ud a0.1<0;1,0>:ud 0x00400040:ud // Update pointers
+ (-f0.1) jmpi (1) SetHWScoreboard_MBAFF_Remainder_Loop
+
+// All MBs have been decoded. Terminate the thread now
+//
+SetHWScoreboard_MBAFF_Done:
+ END_THREAD
+
+#if !defined(COMBINED_KERNEL) // For standalone kernel only
+.end_code
+
+.end_kernel
+#endif
+
+// End of SetHWScoreboard_MBAFF
diff --git a/src/shaders/h264/mc/SetHWScoreboard_header.inc b/src/shaders/h264/mc/SetHWScoreboard_header.inc new file mode 100644 index 00000000..1df91f92 --- /dev/null +++ b/src/shaders/h264/mc/SetHWScoreboard_header.inc @@ -0,0 +1,134 @@ +/*
+ * Common header file for both SetHWScoreboard and SetHWScoreboard_MBAFF kernels
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+#if !defined(__SETHWSCOREBOARD_HEADER__) // Make sure this file is only included once
+#define __SETHWSCOREBOARD_HEADER__
+
+// Module name: SetHWScoreboard_header.inc
+//
+// Common header file for both SetHWScoreboard and SetHWScoreboard_MBAFF kernels
+//
+
+#define BI_CMD_BUF 0 // Binding table index for command buffer
+
+// GRF r1 map
+//
+// For use by setting HW scoreboard kernel for MBAFF picture
+//
+// CURBE data
+#define TOP_FM_MASK1_D r1.0 // Bit mask for first half of top frame MB SB mask
+#define TOP_FM_MASK1_B r1.0 // Bit mask for first half of top frame MB SB mask
+#define TOP_FM_MASK2_D r1.1 // Bit mask for second half of top frame MB SB mask
+#define TOP_FM_MASK2_B r1.4 // Bit mask for second half of top frame MB SB mask
+#define BOT_FM_MASK1_D r1.2 // Bit mask for first half of bottom frame MB SB mask
+#define BOT_FM_MASK1_B r1.8 // Bit mask for first half of bottom frame MB SB mask
+#define BOT_FM_MASK2_D r1.3 // Bit mask for second half of bottom frame MB SB mask
+#define BOT_FM_MASK2_B r1.12 // Bit mask for second half of bottom frame MB SB mask
+#define TOP_FD_MASK1_D r1.4 // Bit mask for first half of top field MB SB mask
+#define TOP_FD_MASK1_B r1.16 // Bit mask for first half of top field MB SB mask
+#define TOP_FD_MASK2_D r1.5 // Bit mask for second half of top field MB SB mask
+#define TOP_FD_MASK2_B r1.20 // Bit mask for second half of top field MB SB mask
+#define BOT_FD_MASK1_D r1.6 // Bit mask for first half of bottom field MB SB mask
+#define BOT_FD_MASK1_B r1.24 // Bit mask for first half of bottom field MB SB mask
+#define BOT_FD_MASK2_D r1.7 // Bit mask for second half of bottom field MB SB mask
+#define BOT_FD_MASK2_B r1.28 // Bit mask for second half of bottom field MB SB mask
+
+// For use by setting HW scoreboard kernel for non-MBAFF picture
+#define MB_SHIFT_MASK_W r1.0 // :w type. Shift values for two parts of the MB SB mask
+#define MB_SHIFT_MASK_B r1.0 // :b type. Shift values for two parts of the MB SB mask
+
+// GRF r2 map
+//
+// In-line data
+//
+#define INLINE_REG_OFFSET 1
+#define INLINE_REG r2
+
+#define StartingMB INLINE_REG.0 // :uw type. Starting MB number
+#define TotalMB INLINE_REG.1 // :uw type. Total number of MB to be processed
+#define PicWidthMB INLINE_REG.2 // :uw type. Picture width in MB
+
+// GRF r3 map
+//
+// Temporary variables
+//
+#define RemainderMB r3.0 // :uw type. Remainder of MB (<16) to be processed
+
+#define TEMP_FD_X_W r3.2 // :w type. Temporary variable for field MB X origin in MBAFF picture
+#define TEMP_FD_X_B r3.4 // :b type. Temporary variable for field MB X origin in MBAFF picture
+#define TEMP_FD_Y_W r3.3 // :w type. Temporary variable for field MB Y origin in MBAFF picture
+#define TEMP_FD_Y_B r3.6 // :b type. Temporary variable for field MB Y origin in MBAFF picture
+
+#define TEMP_INTRA_FLAG_W r3.4 // :uw type. Temporary intra available flag
+
+#define MB_MASK_D r3.4 // :ud type. Bit masks for MBAFF MB
+#define MB_MASK_B r3.16 // :ub type. Bit masks for MBAFF MB
+
+#define MRF_READ_HEADER_SRC r63
+
+// MEDIA_OBJECT_EX Command map
+//
+// In DW1 of each MEDIA_OBJECT_EX command (VFE DWORD)
+#define CUR_X 0 // Byte 0
+#define CUR_Y 0 // Byte 2
+
+// In DW2 of each MEDIA_OBJECT_EX command
+#define USE_SCOREBOARD BIT21
+
+// In DW4 of each MEDIA_OBJECT_EX command
+#define F_FLAG BIT4
+#define IS_INTRA_MB BIT13
+#define IS_FIELD_MB BIT14
+#define IS_INTRA8X8 BIT15
+#define IS_BOT_FD BIT24
+
+// In DW7 of each MEDIA_OBJECT_EX command
+#define A_FLAG BIT0
+#define B_FLAG BIT1
+#define C_FLAG BIT2
+#define D_FLAG BIT3
+#define E_FLAG BIT4
+
+#define CMD_BUFFER_REG_OFF 4
+.declare CMD_BUFFER_D Base=GRF(4) ElementSize=4 SrcRegion=REGION(8,1) Type=ud // Command buffer (32 GRF)
+.declare CMD_BUFFER_W Base=GRF(4) ElementSize=2 SrcRegion=REGION(16,1) Type=uw // Command buffer (32 GRF)
+.declare CMD_BUFFER_B Base=GRF(4) ElementSize=1 SrcRegion=REGION(16,1) Type=ub // Command buffer (32 GRF)
+
+#define MRF_READ_HEADER m1
+#define MRF_READ_HEADER0 m1
+#define MRF_READ_HEADER1 m2
+#define MRF_READ_HEADER2 m3
+#define MRF_READ_HEADER3 m4
+
+#define MRF_INTER_WRITE_HEADER m5
+#define MRF_INTER_WRITE_DATA0 m6
+#define MRF_INTER_WRITE_DATA1 m7
+
+#define MRF_WRITE_HEADER m11
+#define MRF_INTRA_WRITE_HEADER m11
+
+#define MRF_CMD_BUF_REG_OFF 12
+.declare MRF_CMD_BUF_D Base=m12 ElementSize=4 SrcRegion=REGION(8,1) Type=ud // Command buffer stored in MRF
+.declare MRF_CMD_BUF_W Base=m12 ElementSize=2 SrcRegion=REGION(16,1) Type=uw // Command buffer stored in MRF
+.declare MRF_CMD_BUF_B Base=m12 ElementSize=1 SrcRegion=REGION(16,1) Type=ub // Command buffer stored in MRF
+
+#define BI_CMD_BUFFER 0
+
+#define OWBRMSGDSC_SC 0x02088000 // OWORD Block Read Message Descriptor, reading from sampler cache = A.
+#define OWBWMSGDSC 0x02080000 // OWORD Block Write Message Descriptor
+
+#define OWORD_1 0x000
+#define OWORD_2 0x200
+#define OWORD_4 0x300
+#define OWORD_8 0x400
+
+// End of SETHWSCOREBOARD_HEADER
+
+#endif // !defined(__SETHWSCOREBOARD_HEADER__)
+
diff --git a/src/shaders/h264/mc/SetupForHWMC.asm b/src/shaders/h264/mc/SetupForHWMC.asm new file mode 100644 index 00000000..b6dc5959 --- /dev/null +++ b/src/shaders/h264/mc/SetupForHWMC.asm @@ -0,0 +1,33 @@ +/*
+ * Initial setup for running HWMC kernels in HWMC-Only decoding mode
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: SetupForHWMC.asm
+//
+// Initial setup for running HWMC kernels in HWMC-Only decoding mode
+//
+#include "header.inc"
+#include "intra_Header.inc"
+
+#if !defined(__SETUPFORHWMC__) // Make sure the following are only included once
+#define __SETUPFORHWMC__
+
+.reg_count_total 64
+.reg_count_payload 2
+
+//
+// Now, begin source code....
+//
+
+.code
+#endif // !defined(__SETUPFORHWMC__)
+
+ mov (8) MSGSRC<1>:ud r0.0<8;8,1>:ud // Initialize message header payload with R0
+ shl (2) I_ORIX<1>:uw ORIX<2;2,1>:ub 4:w // Convert MB origin to pixel unit
+
+// End of SetupForHWMC
diff --git a/src/shaders/h264/mc/add_Error_16x16_Y.asm b/src/shaders/h264/mc/add_Error_16x16_Y.asm new file mode 100644 index 00000000..df01b997 --- /dev/null +++ b/src/shaders/h264/mc/add_Error_16x16_Y.asm @@ -0,0 +1,51 @@ +/*
+ * Add macroblock correction Y data blocks to predicted picture
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+
+// Module name: add_Error_16x16_Y.asm
+//
+// Add macroblock correction Y data blocks to predicted picture
+//
+
+// Every line of predicted Y data is added to Y error data if CBP bit is set
+
+ mov (1) PERROR_UD<1>:ud 0x10001*ERRBUF*GRFWIB+0x00100000:ud // Pointers to first and second row of error block
+
+ and.z.f0.1 (1) NULLREG REG_CBPCY CBP_Y_MASK
+ (f0.1) jmpi (1) End_add_Error_16x16_Y // Skip all blocks
+
+// Block Y0
+//
+ $for(0,0; <8; 2,1) {
+ add.sat (16) DEC_Y(%1)<2> r[PERROR,%2*GRFWIB]REGION(8,1):w PRED_Y(%1)REGION(8,2) {Compr}
+ }
+
+// Block Y1
+//
+ $for(0,0; <8; 2,1) {
+ add.sat (16) DEC_Y(%1,16)<2> r[PERROR,%2*GRFWIB+0x80]REGION(8,1):w PRED_Y(%1,16)REGION(8,2) {Compr}
+ }
+
+// Block Y2
+//
+ $for(8,0; <16; 2,1) {
+ add.sat (16) DEC_Y(%1)<2> r[PERROR,%2*GRFWIB+0x100]REGION(8,1):w PRED_Y(%1)REGION(8,2) {Compr}
+ }
+
+// Block Y3
+//
+ $for(8,0; <16; 2,1) {
+ add.sat (16) DEC_Y(%1,16)<2> r[PERROR,%2*GRFWIB+0x180]REGION(8,1):w PRED_Y(%1,16)REGION(8,2) {Compr}
+ }
+
+End_add_Error_16x16_Y:
+ add (1) PERROR_UD<1>:ud PERROR_UD:ud 0x01800180:ud // Pointers to Y3 error block
+
+// End of add_Error_16x16_Y
+
diff --git a/src/shaders/h264/mc/add_Error_UV.asm b/src/shaders/h264/mc/add_Error_UV.asm new file mode 100644 index 00000000..e2c0deaf --- /dev/null +++ b/src/shaders/h264/mc/add_Error_UV.asm @@ -0,0 +1,38 @@ +/*
+ * Add macroblock correction UV data blocks to predicted picture
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+
+#if !defined(__ADD_ERROR_UV__) // Make sure this is only included once
+#define __ADD_ERROR_UV__
+
+// Module name: add_Error_UV.asm
+//
+// Add macroblock correction UV data blocks to predicted picture
+
+// PERROR points to error block Y3 after decoding Y component
+
+// Update address register used in instruction compression
+//
+
+// U component
+//
+ add (1) PERROR1<1>:w PERROR:w 0x00010:w // Pointers to next error row
+ $for(0,0; <8; 2,1) {
+ add.sat (16) DEC_UV(%1)<4> r[PERROR,%2*GRFWIB+0x80]REGION(8,1):w PRED_UV(%1)REGION(8,4) {Compr}
+ }
+
+// V component
+//
+ $for(0,0; <8; 2,1) {
+ add.sat (16) DEC_UV(%1,2)<4> r[PERROR,%2*GRFWIB+0x100]REGION(8,1):w PRED_UV(%1,2)REGION(8,4) {Compr}
+ }
+
+// End of add_Error_UV
+
+#endif // !defined(__ADD_ERROR_UV__)
diff --git a/src/shaders/h264/mc/avc_mc.g4b b/src/shaders/h264/mc/avc_mc.g4b new file mode 100644 index 00000000..cdee6ac3 --- /dev/null +++ b/src/shaders/h264/mc/avc_mc.g4b @@ -0,0 +1,5251 @@ + { 0x00600001, 0x27c00021, 0x008d0000, 0x00000000 }, + { 0x00200009, 0x27fa3e29, 0x00450064, 0x00040004 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000000d4 }, + { 0x00000005, 0x220e3e2c, 0x00000070, 0x000f000f }, + { 0x00000001, 0x26a00221, 0x00009c38, 0x00000000 }, + { 0x00000220, 0x34001400, 0x00001400, 0x000006a0 }, + { 0x00a02001, 0x24000229, 0x00b10624, 0x00000000 }, + { 0x00a02001, 0x24400229, 0x00b10624, 0x00000000 }, + { 0x00a02001, 0x24800229, 0x00b10624, 0x00000000 }, + { 0x00a02001, 0x24c00229, 0x00b10624, 0x00000000 }, + { 0x00a02001, 0x25000229, 0x00b10624, 0x00000000 }, + { 0x00a02001, 0x25400229, 0x00b10624, 0x00000000 }, + { 0x00a02001, 0x25800229, 0x00b10624, 0x00000000 }, + { 0x00a02001, 0x25c00229, 0x00b10624, 0x00000000 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000086 }, + { 0x00000001, 0x22080060, 0x00000000, 0x06440640 }, + { 0x00a02001, 0x24000229, 0x00009003, 0x00000000 }, + { 0x00a02001, 0x24400229, 0x0000900b, 0x00000000 }, + { 0x00a02001, 0x24800229, 0x00009013, 0x00000000 }, + { 0x00a02001, 0x24c00229, 0x0000901b, 0x00000000 }, + { 0x00a02001, 0x25000229, 0x00009023, 0x00000000 }, + { 0x00a02001, 0x25400229, 0x0000902b, 0x00000000 }, + { 0x00a02001, 0x25800229, 0x00009033, 0x00000000 }, + { 0x00a02001, 0x25c00229, 0x0000903b, 0x00000000 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000072 }, + { 0x02600005, 0x20000c20, 0x0000006c, 0x00000002 }, + { 0x00600005, 0x24000c20, 0x0000006c, 0x00000011 }, + { 0x01600007, 0x20000c00, 0x028d0400, 0x00000011 }, + { 0x00780001, 0x26240169, 0x00000000, 0x80808080 }, + { 0x00780001, 0x66430231, 0x028d0624, 0x00000000 }, + { 0x00780001, 0x66630231, 0x028d062c, 0x00000000 }, + { 0x00780001, 0x26240231, 0x00cf0643, 0x00000000 }, + { 0x00780001, 0x262c0231, 0x00cf0663, 0x00000000 }, + { 0x00800040, 0x25e04629, 0x00cf0643, 0x00b10624 }, + { 0x00600040, 0x25e02529, 0x008d05e0, 0x008d05f0 }, + { 0x00400040, 0x25e02529, 0x006905e0, 0x006905e8 }, + { 0x00200040, 0x25e02529, 0x004505e0, 0x004505e4 }, + { 0x00a02040, 0x2400252c, 0x000005e0, 0x000005e2 }, + { 0x00a02040, 0x24003d8c, 0x00b10400, 0x00100010 }, + { 0x00a02008, 0x24003d89, 0x00b10400, 0x00050005 }, + { 0x00a02008, 0x24403d89, 0x00b10400, 0x00050005 }, + { 0x00a02008, 0x24803d89, 0x00b10400, 0x00050005 }, + { 0x00a02008, 0x24c03d89, 0x00b10400, 0x00050005 }, + { 0x00a02008, 0x25003d89, 0x00b10400, 0x00050005 }, + { 0x00a02008, 0x25403d89, 0x00b10400, 0x00050005 }, + { 0x00a02008, 0x25803d89, 0x00b10400, 0x00050005 }, + { 0x00a02008, 0x25c03d89, 0x00b10400, 0x00050005 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000044 }, + { 0x00600041, 0x26806e2d, 0x008d062c, 0x89abcdef }, + { 0x00600041, 0x26906e2d, 0x008d0623, 0xfedcba98 }, + { 0x00600041, 0x26a06e2d, 0x00cf0663, 0x89abcdef }, + { 0x00600041, 0x26b06e2d, 0x00cf0643, 0x0fedcba9 }, + { 0x00000041, 0x26be3e2d, 0x00000623, 0xfff8fff8 }, + { 0x00802040, 0x268035ad, 0x008d4680, 0x008d0690 }, + { 0x00802040, 0x268035ad, 0x008d0680, 0x008d0688 }, + { 0x00802040, 0x268035ad, 0x008d0680, 0x008d0684 }, + { 0x00802040, 0x268035ad, 0x008d0680, 0x008d0682 }, + { 0x00800001, 0x240001ec, 0x00000000, 0x00200020 }, + { 0x00200048, 0x24003dac, 0x00a00680, 0x00050005 }, + { 0x00200008, 0x26e03d8d, 0x00450400, 0x00060006 }, + { 0x00800001, 0x240001ec, 0x00000000, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x00000633, 0x00100010 }, + { 0x00800048, 0x26c03e2d, 0x0000067f, 0x00100010 }, + { 0x00800048, 0x272055ad, 0x000006e0, 0x00b10040 }, + { 0x00600041, 0x268055ad, 0x000006e2, 0x00ae0040 }, + { 0x00600041, 0x26a055ad, 0x000006e2, 0x00ae0041 }, + { 0x00a02040, 0x240035ac, 0x00b10720, 0x00b00680 }, + { 0x80a02008, 0x44003d91, 0x00b10400, 0x00050005 }, + { 0x00a02040, 0x240035ac, 0x00b10720, 0x00b00682 }, + { 0x80a02008, 0x44403d91, 0x00b10400, 0x00050005 }, + { 0x00a02040, 0x240035ac, 0x00b10720, 0x00b00684 }, + { 0x80a02008, 0x44803d91, 0x00b10400, 0x00050005 }, + { 0x00a02040, 0x240035ac, 0x00b10720, 0x00b00686 }, + { 0x80a02008, 0x44c03d91, 0x00b10400, 0x00050005 }, + { 0x00a02040, 0x240035ac, 0x00b10720, 0x00b00688 }, + { 0x80a02008, 0x45003d91, 0x00b10400, 0x00050005 }, + { 0x00a02040, 0x240035ac, 0x00b10720, 0x00b0068a }, + { 0x80a02008, 0x45403d91, 0x00b10400, 0x00050005 }, + { 0x00a02040, 0x240035ac, 0x00b10720, 0x00b0068c }, + { 0x80a02008, 0x45803d91, 0x00b10400, 0x00050005 }, + { 0x00a02040, 0x240035ac, 0x00b10720, 0x00b0068e }, + { 0x80a02008, 0x45c03d91, 0x00b10400, 0x00050005 }, + { 0x00000001, 0x22040060, 0x00000000, 0x00900080 }, + { 0x01000005, 0x20000c20, 0x02000068, 0x00003c00 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000020 }, + { 0x80802040, 0x440045b1, 0x008d8800, 0x00ae0400 }, + { 0x80802040, 0x444045b1, 0x008d8820, 0x00ae0440 }, + { 0x80802040, 0x448045b1, 0x008d8840, 0x00ae0480 }, + { 0x80802040, 0x44c045b1, 0x008d8860, 0x00ae04c0 }, + { 0x80802040, 0x441045b1, 0x008d8880, 0x00ae0410 }, + { 0x80802040, 0x445045b1, 0x008d88a0, 0x00ae0450 }, + { 0x80802040, 0x449045b1, 0x008d88c0, 0x00ae0490 }, + { 0x80802040, 0x44d045b1, 0x008d88e0, 0x00ae04d0 }, + { 0x80802040, 0x450045b1, 0x008d8900, 0x00ae0500 }, + { 0x80802040, 0x454045b1, 0x008d8920, 0x00ae0540 }, + { 0x80802040, 0x458045b1, 0x008d8940, 0x00ae0580 }, + { 0x80802040, 0x45c045b1, 0x008d8960, 0x00ae05c0 }, + { 0x80802040, 0x451045b1, 0x008d8980, 0x00ae0510 }, + { 0x80802040, 0x455045b1, 0x008d89a0, 0x00ae0550 }, + { 0x80802040, 0x459045b1, 0x008d89c0, 0x00ae0590 }, + { 0x80802040, 0x45d045b1, 0x008d89e0, 0x00ae05d0 }, + { 0x00000040, 0x22040c00, 0x00000204, 0x01800180 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000000e2 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000018 }, + { 0x00000001, 0x27800021, 0x00000780, 0x00000000 }, + { 0x00000001, 0x27a00021, 0x000007a0, 0x00000000 }, + { 0x01600031, 0x20001c20, 0x708d0000, 0x82000010 }, + { 0x00200440, 0x27c055a5, 0x004507fa, 0x0045002a }, + { 0x00000801, 0x27c80061, 0x00000000, 0x0000001b }, + { 0x00000040, 0x22000d20, 0x00000062, 0x02186000 }, + { 0x01600031, 0x26200021, 0x408d07c0, 0x00000200 }, + { 0x00000440, 0x27c43ca5, 0x000007c4, 0x00010001 }, + { 0x00000801, 0x27c80061, 0x00000000, 0x000f0003 }, + { 0x00000040, 0x22000c00, 0x00000200, 0x00100000 }, + { 0x02600031, 0x26400021, 0x408d07c0, 0x00000200 }, + { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, + { 0x00000008, 0x27fc3dad, 0x000007fc, 0x00010001 }, + { 0x00200440, 0x27c055a5, 0x004507fa, 0x0045002a }, + { 0x00000801, 0x27c80061, 0x00000000, 0x00000013 }, + { 0x00000040, 0x22000c00, 0x00000200, 0xefffc001 }, + { 0x01600031, 0x26200021, 0x408d07c0, 0x00000200 }, + { 0x00000440, 0x27c43ca5, 0x000007c4, 0x00010001 }, + { 0x00000801, 0x27c80061, 0x00000000, 0x00070003 }, + { 0x05600031, 0x26400021, 0x408d07c0, 0x00000200 }, + { 0x00000008, 0x220e3e2c, 0x0000006c, 0x00060006 }, + { 0x00000001, 0x26a002a5, 0x00009c3c, 0x00000000 }, + { 0x00000220, 0x34001400, 0x00001400, 0x000006a0 }, + { 0x02600005, 0x20000c20, 0x0000006c, 0x00000002 }, + { 0x00780001, 0x26240169, 0x00000000, 0x80808080 }, + { 0x02400005, 0x20000c20, 0x0200006c, 0x00000001 }, + { 0x00560001, 0x46420129, 0x02690624, 0x00000000 }, + { 0x02400005, 0x20000c20, 0x0200006c, 0x00000010 }, + { 0x00560001, 0x46520129, 0x0269062c, 0x00000000 }, + { 0x00780001, 0x26240129, 0x00ae0642, 0x00000000 }, + { 0x00800040, 0x24004629, 0x00b10624, 0x00650642 }, + { 0x00600040, 0x24002529, 0x00650400, 0x00650404 }, + { 0x00600040, 0x25202529, 0x00050400, 0x00050404 }, + { 0x00600040, 0x25702529, 0x00050408, 0x0005040c }, + { 0x00560001, 0x26240169, 0x00000000, 0x80808080 }, + { 0x00460001, 0x26240129, 0x028a0652, 0x00000000 }, + { 0x00560001, 0x46520129, 0x02690624, 0x00000000 }, + { 0x02400005, 0x20000c20, 0x0200006c, 0x00000001 }, + { 0x00560001, 0x46420169, 0x02000000, 0x80808080 }, + { 0x00460001, 0x46420129, 0x0069062c, 0x00000000 }, + { 0x00560001, 0x262c0129, 0x008a0642, 0x00000000 }, + { 0x00600040, 0x24004629, 0x008d0624, 0x00650652 }, + { 0x00600040, 0x24104629, 0x00650642, 0x008d062c }, + { 0x00600040, 0x24002529, 0x00650400, 0x00650404 }, + { 0x00600040, 0x25302529, 0x00050408, 0x0005040c }, + { 0x00600040, 0x25602529, 0x00050400, 0x00050404 }, + { 0x00a02040, 0x24003d2c, 0x00b10520, 0x00040004 }, + { 0x00a02008, 0x24003d89, 0x00b10400, 0x00030003 }, + { 0x00a02008, 0x24403d89, 0x00b10400, 0x00030003 }, + { 0x00a02040, 0x24003d2c, 0x00b10560, 0x00040004 }, + { 0x00a02008, 0x24803d89, 0x00b10400, 0x00030003 }, + { 0x00a02008, 0x24c03d89, 0x00b10400, 0x00030003 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000048 }, + { 0x00000001, 0x22080060, 0x00000000, 0x06440640 }, + { 0x00a02001, 0x24000229, 0x00059002, 0x00000000 }, + { 0x00a02001, 0x24400229, 0x0005900a, 0x00000000 }, + { 0x00a02001, 0x24800229, 0x00059012, 0x00000000 }, + { 0x00a02001, 0x24c00229, 0x0005901a, 0x00000000 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000003c }, + { 0x00a02001, 0x24000229, 0x00b10624, 0x00000000 }, + { 0x00a02001, 0x24400229, 0x00b10624, 0x00000000 }, + { 0x00a02001, 0x24800229, 0x00b10624, 0x00000000 }, + { 0x00a02001, 0x24c00229, 0x00b10624, 0x00000000 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000032 }, + { 0x00600041, 0x26806e2d, 0x008d062c, 0x44332211 }, + { 0x00600041, 0x26906e2d, 0x008d0622, 0xffeeddcc }, + { 0x00600041, 0x26a06e2d, 0x00650652, 0x44332211 }, + { 0x00600041, 0x26b06e2d, 0x00650642, 0x00ffeedd }, + { 0x00200041, 0x26bc3e2d, 0x00450622, 0xfffcfffc }, + { 0x00802040, 0x268035ad, 0x008d0680, 0x008d0690 }, + { 0x00802040, 0x268035ad, 0x008d0680, 0x008d0688 }, + { 0x00802040, 0x268035ad, 0x008d0680, 0x008d0684 }, + { 0x00800001, 0x240001ec, 0x00000000, 0x00200020 }, + { 0x00400048, 0x24003dac, 0x00a50680, 0x00220022 }, + { 0x00400008, 0x26e03d8d, 0x00690400, 0x00060006 }, + { 0x00800001, 0x240001ec, 0x00000000, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x00050632, 0x00100010 }, + { 0x00800048, 0x26c03e2d, 0x0005065e, 0x00100010 }, + { 0x00800048, 0x272055ad, 0x000506e0, 0x00240044 }, + { 0x00600041, 0x268055ad, 0x000506e4, 0x00440044 }, + { 0x00600041, 0x26a055ad, 0x000506e4, 0x00440045 }, + { 0x00a02040, 0x240035ac, 0x00b10720, 0x00050680 }, + { 0x80a02008, 0x44003d91, 0x00b10400, 0x00050005 }, + { 0x00a02040, 0x240035ac, 0x00b10720, 0x00050684 }, + { 0x80a02008, 0x44403d91, 0x00b10400, 0x00050005 }, + { 0x00a02040, 0x240035ac, 0x00b10720, 0x00050688 }, + { 0x80a02008, 0x44803d91, 0x00b10400, 0x00050005 }, + { 0x00a02040, 0x240035ac, 0x00b10720, 0x0005068c }, + { 0x80a02008, 0x44c03d91, 0x00b10400, 0x00050005 }, + { 0x00000040, 0x22063d8c, 0x00000204, 0x00100010 }, + { 0x80802040, 0x640045b1, 0x008d8880, 0x00cf0400 }, + { 0x80802040, 0x644045b1, 0x008d88a0, 0x00cf0440 }, + { 0x80802040, 0x648045b1, 0x008d88c0, 0x00cf0480 }, + { 0x80802040, 0x64c045b1, 0x008d88e0, 0x00cf04c0 }, + { 0x80802040, 0x640245b1, 0x008d8900, 0x00cf0402 }, + { 0x80802040, 0x644245b1, 0x008d8920, 0x00cf0442 }, + { 0x80802040, 0x648245b1, 0x008d8940, 0x00cf0482 }, + { 0x80802040, 0x64c245b1, 0x008d8960, 0x00cf04c2 }, + { 0x00000401, 0x27c80061, 0x00000000, 0x0007000f }, + { 0x00200801, 0x27c001a1, 0x004507fa, 0x00000000 }, + { 0x00000040, 0x22000c00, 0x00000200, 0x08004000 }, + { 0x00800001, 0x20400232, 0x00d20400, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20420, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00d20440, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00d20460, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00d20480, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00d204a0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00d204c0, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00d204e0, 0x00000000 }, + { 0x01600031, 0x27a00021, 0x508d07c0, 0x00000200 }, + { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, + { 0x00000401, 0x27c80061, 0x00000000, 0x000f000f }, + { 0x00200801, 0x27c001a1, 0x004507fa, 0x00000000 }, + { 0x00000040, 0x22000c00, 0x00000200, 0x0ff04000 }, + { 0x00000001, 0x22080060, 0x00000000, 0x04400400 }, + { 0x00a02001, 0x20400232, 0x00d29000, 0x00000000 }, + { 0x00a02001, 0x20500232, 0x00d29020, 0x00000000 }, + { 0x00a02001, 0x20800232, 0x00d29080, 0x00000000 }, + { 0x00a02001, 0x20900232, 0x00d290a0, 0x00000000 }, + { 0x00a02001, 0x20c00232, 0x00d29100, 0x00000000 }, + { 0x00a02001, 0x20d00232, 0x00d29120, 0x00000000 }, + { 0x00a02001, 0x21000232, 0x00d29180, 0x00000000 }, + { 0x00a02001, 0x21100232, 0x00d291a0, 0x00000000 }, + { 0x01600031, 0x27800021, 0x508d07c0, 0x00000200 }, + { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, + { 0x00600001, 0x27c00021, 0x008d0000, 0x00000000 }, + { 0x00200009, 0x27fa3e29, 0x00450064, 0x00040004 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffff04 }, + { 0x00000001, 0x220401ec, 0x00000000, 0x00800080 }, + { 0x00000001, 0x22080060, 0x00000000, 0x04100400 }, + { 0x00200008, 0x27006e2d, 0x0000006c, 0x00000040 }, + { 0x00400001, 0x27400061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x272001a9, 0x00b10620, 0x00000000 }, + { 0x02600005, 0x20001c20, 0x0000006c, 0x00000008 }, + { 0x00110001, 0x27230231, 0x00000624, 0x00000000 }, + { 0x00600001, 0x27420231, 0x00cf0643, 0x00000000 }, + { 0x00110001, 0x27410231, 0x00000643, 0x00000000 }, + { 0x00240001, 0x27400231, 0x00000623, 0x00000000 }, + { 0x02000005, 0x20001c20, 0x0200006c, 0x00000002 }, + { 0x00010001, 0x27400231, 0x02000624, 0x00000000 }, + { 0x02000005, 0x20001c20, 0x0200006c, 0x00000001 }, + { 0x00110001, 0x27420231, 0x02000623, 0x00000000 }, + { 0x00000005, 0x26803e2d, 0x00000070, 0x000f000f }, + { 0x00000001, 0x270801ad, 0x00000700, 0x00000000 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000084 }, + { 0x00000040, 0x22043d8c, 0x00000204, 0x00800080 }, + { 0x00800001, 0x27200231, 0x00b10628, 0x00000000 }, + { 0x02600005, 0x20001c20, 0x0200006c, 0x00000004 }, + { 0x00680001, 0x272c0231, 0x028d0634, 0x00000000 }, + { 0x00780001, 0x272c0231, 0x02000633, 0x00000000 }, + { 0x00400001, 0x27420231, 0x00a0040e, 0x00000000 }, + { 0x00400001, 0x27460231, 0x00a0044e, 0x00000000 }, + { 0x00200001, 0x27400231, 0x0000062b, 0x00000000 }, + { 0x02000005, 0x20001c20, 0x0200006c, 0x00000002 }, + { 0x00010001, 0x27400231, 0x0200062c, 0x00000000 }, + { 0x00110001, 0x27410231, 0x0200040e, 0x00000000 }, + { 0x00000008, 0x26803e2d, 0x00000070, 0x00040004 }, + { 0x00200040, 0x22083d8c, 0x00450208, 0x00800080 }, + { 0x00000006, 0x27083dad, 0x00000700, 0x00010001 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000064 }, + { 0x00000040, 0x22043d8c, 0x00000204, 0x00800080 }, + { 0x00a02001, 0xb3800231, 0x00d20400, 0x00000000 }, + { 0x00a02001, 0xb3a00231, 0x00d20480, 0x00000000 }, + { 0x00a02001, 0xb3c00231, 0x00d20440, 0x00000000 }, + { 0x00a02001, 0xb3e00231, 0x00d204c0, 0x00000000 }, + { 0x02000005, 0x20001c20, 0x00000060, 0x00000002 }, + { 0x01000005, 0x20001c20, 0x0200006c, 0x00000001 }, + { 0x01010005, 0x20001c20, 0x00000060, 0x00004000 }, + { 0x02010005, 0x20001c20, 0x02000060, 0x00000010 }, + { 0x00030001, 0x27230231, 0x0000065f, 0x00000000 }, + { 0x00030220, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x02600005, 0x20001c20, 0x0000006c, 0x00000001 }, + { 0x00460001, 0x27200231, 0x0069065c, 0x00000000 }, + { 0x00110001, 0x27230231, 0x00000458, 0x00000000 }, + { 0x00600001, 0x27240231, 0x008d0458, 0x00000000 }, + { 0x00600001, 0x272c0231, 0x008d0478, 0x00000000 }, + { 0x00600001, 0x27420231, 0x00cf0663, 0x00000000 }, + { 0x00000001, 0x27400231, 0x00000458, 0x00000000 }, + { 0x00010001, 0x27410231, 0x0000065f, 0x00000000 }, + { 0x00110001, 0x27410231, 0x00000663, 0x00000000 }, + { 0x02000005, 0x20001c20, 0x0200006c, 0x00000010 }, + { 0x00110001, 0x27420231, 0x0200065f, 0x00000000 }, + { 0x00000005, 0x26803e2d, 0x00000071, 0x000f000f }, + { 0x00000006, 0x27083dad, 0x00000702, 0x00020002 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000030 }, + { 0x00000040, 0x22043d8c, 0x00000204, 0x00800080 }, + { 0x00400001, 0x27200231, 0x0069045c, 0x00000000 }, + { 0x00600001, 0x27240231, 0x008d0478, 0x00000000 }, + { 0x00800001, 0x272c0231, 0x0000047f, 0x00000000 }, + { 0x00400001, 0x27420231, 0x00a0048e, 0x00000000 }, + { 0x00400001, 0x27460231, 0x00a004ce, 0x00000000 }, + { 0x00000001, 0x27400231, 0x00000478, 0x00000000 }, + { 0x00000001, 0x27410231, 0x0000045f, 0x00000000 }, + { 0x00000008, 0x26803e2d, 0x00000071, 0x00040004 }, + { 0x00200040, 0x22083d8c, 0x00450208, 0x00800080 }, + { 0x00000006, 0x27083dad, 0x00000700, 0x00030003 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00a02001, 0xb3800231, 0x00d20480, 0x00000000 }, + { 0x00a02001, 0xb3a00231, 0x00d20500, 0x00000000 }, + { 0x00a02001, 0xb3c00231, 0x00d204c0, 0x00000000 }, + { 0x00a02001, 0xb3e00231, 0x00d20540, 0x00000000 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000100 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffe74 }, + { 0x00000001, 0x27800021, 0x00000780, 0x00000000 }, + { 0x00000001, 0x27a00021, 0x000007a0, 0x00000000 }, + { 0x01600031, 0x20001c20, 0x708d0000, 0x82000010 }, + { 0x00000001, 0x27340231, 0x00000733, 0x00000000 }, + { 0x00600001, 0x274a0231, 0x00000749, 0x00000000 }, + { 0x00800040, 0x24003e2c, 0x00b10723, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b10724, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b10725, 0x00010001 }, + { 0x00800008, 0x26c03d8d, 0x008d0400, 0x00020002 }, + { 0x00800040, 0x24003e2c, 0x00b10740, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b10741, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b10742, 0x00010001 }, + { 0x00800008, 0x26a03d8d, 0x008d0400, 0x00020002 }, + { 0x00800001, 0x27240231, 0x00d206c0, 0x00000000 }, + { 0x00600001, 0x27400231, 0x00ae06a2, 0x00000000 }, + { 0x00000001, 0x27230231, 0x000006a0, 0x00000000 }, + { 0x00000005, 0x220e3dac, 0x00000680, 0x000f000f }, + { 0x00000001, 0x26a00221, 0x00009c2c, 0x00000000 }, + { 0x00000220, 0x34001400, 0x00001400, 0x000006a0 }, + { 0x80800040, 0xd00045b1, 0x00b18800, 0x000d0724 }, + { 0x80800040, 0xd02045b1, 0x00b18820, 0x000d0724 }, + { 0x80800040, 0xd04045b1, 0x00b18840, 0x000d0724 }, + { 0x80800040, 0xd06045b1, 0x00b18860, 0x000d0724 }, + { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, + { 0x80800040, 0xd00045b1, 0x00b18800, 0x002c0740 }, + { 0x80800040, 0xd02045b1, 0x00b18820, 0x002c0742 }, + { 0x80800040, 0xd04045b1, 0x00b18840, 0x002c0744 }, + { 0x80800040, 0xd06045b1, 0x00b18860, 0x002c0746 }, + { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, + { 0x02802005, 0x20003da0, 0x00000708, 0x00020002 }, + { 0x02600005, 0x20003da0, 0x02000708, 0x00010001 }, + { 0x009a0001, 0x27200169, 0x00000000, 0x80808080 }, + { 0x00780001, 0x27400231, 0x028d0724, 0x00000000 }, + { 0x00780001, 0x27240231, 0x008d0740, 0x00000000 }, + { 0x00600040, 0x25e04629, 0x008d0724, 0x008d0740 }, + { 0x00400040, 0x25e02529, 0x006905e0, 0x006905e8 }, + { 0x00200040, 0x25e02529, 0x004505e0, 0x004505e4 }, + { 0x00800040, 0x2400252c, 0x000005e0, 0x000005e2 }, + { 0x00800040, 0x24003d8c, 0x008d0400, 0x00080008 }, + { 0x00800008, 0x26803d8d, 0x008d0400, 0x00040004 }, + { 0x80800040, 0xd00035b1, 0x00b18800, 0x00b10680 }, + { 0x80800040, 0xd02035b1, 0x00b18820, 0x00b10680 }, + { 0x80800040, 0xd04035b1, 0x00b18840, 0x00b10680 }, + { 0x80800040, 0xd06035b1, 0x00b18860, 0x00b10680 }, + { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, + { 0x00600001, 0x27340231, 0x008d0733, 0x00000000 }, + { 0x00800040, 0x24003e2c, 0x00b10726, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b10725, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b10724, 0x00010001 }, + { 0x00800008, 0x26803d8d, 0x00b10400, 0x00020002 }, + { 0x80800040, 0xd00035b1, 0x00b18800, 0x002d0680 }, + { 0x80800040, 0xd02035b1, 0x00b18820, 0x002d0684 }, + { 0x80800040, 0xd04035b1, 0x00b18840, 0x002d0688 }, + { 0x80800040, 0xd06035b1, 0x00b18860, 0x002d068c }, + { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, + { 0x00400009, 0x26c05421, 0x00000744, 0x00690050 }, + { 0x00400009, 0x26d05421, 0x00000740, 0x00690050 }, + { 0x00600001, 0x26a00231, 0x00cf06c3, 0x00000000 }, + { 0x00800001, 0x26a80231, 0x00b10723, 0x00000000 }, + { 0x00800040, 0x24003e2c, 0x00b106a2, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b106a1, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b106a0, 0x00010001 }, + { 0x00800008, 0x26a03d8d, 0x00b10400, 0x00020002 }, + { 0x00200040, 0x220c3eac, 0x00450056, 0x06a006a0 }, + { 0x80800040, 0xd06035b1, 0x01ed9800, 0x00b18860 }, + { 0x80800040, 0xd04035b1, 0x01ed9804, 0x00b18840 }, + { 0x80800040, 0xd02035b1, 0x01ed9808, 0x00b18820 }, + { 0x80800040, 0xd00035b1, 0x01ed980c, 0x00b18800 }, + { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, + { 0x00400009, 0x26c05421, 0x00000744, 0x00690050 }, + { 0x00400009, 0x26d05421, 0x00000740, 0x00690050 }, + { 0x00600001, 0x26a00231, 0x00cf06c3, 0x00000000 }, + { 0x00800001, 0x26a80231, 0x00b10723, 0x00000000 }, + { 0x00800042, 0x25c04629, 0x00b106a8, 0x00b106a9 }, + { 0x00800040, 0x24003e2c, 0x00b106a3, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b106a2, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b106a1, 0x00010001 }, + { 0x00800008, 0x26c03d8d, 0x008d0400, 0x00020002 }, + { 0x00600001, 0x26a00231, 0x00ae06c0, 0x00000000 }, + { 0x00600001, 0x46a60231, 0x00ae06cc, 0x00000000 }, + { 0x00600001, 0x46a70231, 0x00ae05c0, 0x00000000 }, + { 0x00200040, 0x220c3eac, 0x00450036, 0x06a006a0 }, + { 0x80800040, 0xd0603631, 0x01ee9800, 0x00b18860 }, + { 0x80800040, 0xd0403631, 0x01ee9802, 0x00b18840 }, + { 0x80800040, 0xd0203631, 0x01ee9804, 0x00b18820 }, + { 0x80800040, 0xd0003631, 0x01ee9806, 0x00b18800 }, + { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, + { 0x00400009, 0x26c05421, 0x00000744, 0x00690050 }, + { 0x00400009, 0x26d05421, 0x00000740, 0x00690050 }, + { 0x00600001, 0x26a00231, 0x00ab06c3, 0x00000000 }, + { 0x00800001, 0x26a80231, 0x00b10723, 0x00000000 }, + { 0x00800040, 0x24003e2c, 0x00b106a2, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b106a1, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b106a0, 0x00010001 }, + { 0x00800008, 0x25c03d89, 0x008d0400, 0x00020002 }, + { 0x00800042, 0x26a0462d, 0x00b106a0, 0x00b106a1 }, + { 0x00600001, 0x46a10231, 0x00ae05c0, 0x00000000 }, + { 0x00600001, 0x26b00231, 0x00ae05d0, 0x00000000 }, + { 0x00200040, 0x220c3eac, 0x00450056, 0x06a006a0 }, + { 0x80800040, 0xd0603631, 0x01ed9800, 0x00b18860 }, + { 0x80800040, 0xd0403631, 0x01ed9804, 0x00b18840 }, + { 0x80800040, 0xd0203631, 0x01ed9808, 0x00b18820 }, + { 0x80800040, 0xd0003631, 0x01ed980c, 0x00b18800 }, + { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, + { 0x00800042, 0x25c04629, 0x00b10724, 0x00b10725 }, + { 0x00800040, 0x24003e2c, 0x00b10726, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b10725, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b10724, 0x00010001 }, + { 0x00800008, 0x25e03d89, 0x002d0400, 0x00020002 }, + { 0x80800040, 0xd0003531, 0x00ad05c0, 0x00b18800 }, + { 0x80800040, 0xd0203531, 0x00ad05c2, 0x00b18820 }, + { 0x80800040, 0xd0403531, 0x00ad05c4, 0x00b18840 }, + { 0x80800040, 0xd0603531, 0x00ad05c6, 0x00b18860 }, + { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, + { 0x00600001, 0x27480231, 0x00000747, 0x00000000 }, + { 0x00800042, 0x25c04629, 0x00b10740, 0x00b10741 }, + { 0x00800040, 0x24003e2c, 0x00b10742, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b10741, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b10740, 0x00010001 }, + { 0x00800008, 0x25e03d89, 0x002d0400, 0x00020002 }, + { 0x00800001, 0x45c10231, 0x00d205e0, 0x00000000 }, + { 0x80800040, 0xd0003631, 0x004d05c0, 0x00b18800 }, + { 0x80800040, 0xd0203631, 0x004d05c4, 0x00b18820 }, + { 0x80800040, 0xd0403631, 0x004d05c8, 0x00b18840 }, + { 0x80800040, 0xd0603631, 0x004d05cc, 0x00b18860 }, + { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, + { 0x00000401, 0x27c80061, 0x00000000, 0x000f000f }, + { 0x00200801, 0x27c001a1, 0x004507fa, 0x00000000 }, + { 0x00000040, 0x22000c00, 0x00000200, 0x0ff04000 }, + { 0x00800001, 0x20400232, 0x00cd0400, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00cd0408, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00cd0410, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00cd0418, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00cd0440, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00cd0448, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00cd0450, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00cd0458, 0x00000000 }, + { 0x00800001, 0x20c00232, 0x00cd0480, 0x00000000 }, + { 0x00800001, 0x20d00232, 0x00cd0488, 0x00000000 }, + { 0x00800001, 0x20e00232, 0x00cd0490, 0x00000000 }, + { 0x00800001, 0x20f00232, 0x00cd0498, 0x00000000 }, + { 0x00800001, 0x21000232, 0x00cd04c0, 0x00000000 }, + { 0x00800001, 0x21100232, 0x00cd04c8, 0x00000000 }, + { 0x00800001, 0x21200232, 0x00cd04d0, 0x00000000 }, + { 0x00800001, 0x21300232, 0x00cd04d8, 0x00000000 }, + { 0x01600031, 0x27800021, 0x508d07c0, 0x00000200 }, + { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, + { 0x00600001, 0x27c00021, 0x008d0000, 0x00000000 }, + { 0x00200009, 0x27fa3e29, 0x00450064, 0x00040004 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffd34 }, + { 0x00000001, 0x220401ec, 0x00000000, 0x00800080 }, + { 0x00000001, 0x220601ec, 0x00000000, 0x04000400 }, + { 0x00200008, 0x27006e2d, 0x0000006c, 0x00000040 }, + { 0x02600005, 0x20003e20, 0x0000006c, 0x00040004 }, + { 0x00780001, 0x26340231, 0x00000633, 0x00000000 }, + { 0x00800001, 0x27200231, 0x00b10620, 0x00000000 }, + { 0x00600001, 0x27400231, 0x00cf0643, 0x00000000 }, + { 0x00400008, 0x26806e2d, 0x00240070, 0x00004040 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000006a }, + { 0x00000040, 0x22043d8c, 0x00000204, 0x00800080 }, + { 0x00000006, 0x27003dad, 0x00000700, 0x00010001 }, + { 0x00800001, 0x27200231, 0x00b10628, 0x00000000 }, + { 0x00400001, 0x27400231, 0x00808c26, 0x00000000 }, + { 0x00400001, 0x27440231, 0x00808c66, 0x00000000 }, + { 0x00400008, 0x26806e2d, 0x00240072, 0x00004040 }, + { 0x00000040, 0x22063d8c, 0x00000206, 0x00800080 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000058 }, + { 0x00000040, 0x22043d8c, 0x00000204, 0x00800080 }, + { 0x00000006, 0x27003dad, 0x00000702, 0x00020002 }, + { 0x00800001, 0xaf800231, 0x00d28f80, 0x00000000 }, + { 0x00800001, 0xaf900231, 0x00d28fa0, 0x00000000 }, + { 0x00800001, 0xafc00231, 0x00d28fc0, 0x00000000 }, + { 0x00800001, 0xafd00231, 0x00d28fe0, 0x00000000 }, + { 0x00800001, 0xafa00231, 0x00d28c00, 0x00000000 }, + { 0x00800001, 0xafb00231, 0x00d28c20, 0x00000000 }, + { 0x00800001, 0xafe00231, 0x00d28c40, 0x00000000 }, + { 0x00800001, 0xaff00231, 0x00d28c60, 0x00000000 }, + { 0x00400001, 0x27200231, 0x0069065c, 0x00000000 }, + { 0x00600001, 0x27240231, 0x00a98fcc, 0x00000000 }, + { 0x00600001, 0x272c0231, 0x00a98fec, 0x00000000 }, + { 0x00600001, 0x27340231, 0x00008fff, 0x00000000 }, + { 0x00800001, 0x2620012d, 0x00b10720, 0x00000000 }, + { 0x00600001, 0x27400231, 0x00cf0663, 0x00000000 }, + { 0x00400008, 0x26806e2d, 0x00240074, 0x00004040 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000032 }, + { 0x00000040, 0x22043d8c, 0x00000204, 0x00800080 }, + { 0x00000006, 0x27003dad, 0x00000700, 0x00010001 }, + { 0x00800001, 0x27200231, 0x00b10628, 0x00000000 }, + { 0x00600001, 0x27300231, 0x008d0638, 0x00000000 }, + { 0x00400001, 0x27400231, 0x00808c26, 0x00000000 }, + { 0x00400001, 0x27440231, 0x00808c66, 0x00000000 }, + { 0x00400008, 0x26806e2d, 0x00240076, 0x00004040 }, + { 0x00000040, 0x22063d8c, 0x00000206, 0x00800080 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000001e }, + { 0x00800001, 0xaf800231, 0x00d28f80, 0x00000000 }, + { 0x00800001, 0xaf900231, 0x00d28fa0, 0x00000000 }, + { 0x00800001, 0xafc00231, 0x00d28fc0, 0x00000000 }, + { 0x00800001, 0xafd00231, 0x00d28fe0, 0x00000000 }, + { 0x00800001, 0xafa00231, 0x00d28c00, 0x00000000 }, + { 0x00800001, 0xafb00231, 0x00d28c20, 0x00000000 }, + { 0x00800001, 0xafe00231, 0x00d28c40, 0x00000000 }, + { 0x00800001, 0xaff00231, 0x00d28c60, 0x00000000 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000000e0 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffcce }, + { 0x00000001, 0x27800021, 0x00000780, 0x00000000 }, + { 0x00000001, 0x27a00021, 0x000007a0, 0x00000000 }, + { 0x01600031, 0x20001c20, 0x708d0000, 0x82000010 }, + { 0x00600001, 0x27800231, 0x008d0740, 0x00000000 }, + { 0x00400005, 0x22083dac, 0x00690680, 0x000f000f }, + { 0x00400040, 0x26a04625, 0x01e09020, 0x00690058 }, + { 0x00000001, 0x26d001ad, 0x00000700, 0x00000000 }, + { 0x00000040, 0x27e41c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001400, 0x00001400, 0x000006a0 }, + { 0x80600040, 0xcc0035b1, 0x00898800, 0x008d0760 }, + { 0x80600040, 0xcc1035b1, 0x00898820, 0x008d0770 }, + { 0x00800001, 0x27200231, 0x008d0724, 0x00000000 }, + { 0x00400001, 0x27400231, 0x00808c06, 0x00000000 }, + { 0x00000006, 0x26d03dad, 0x00000700, 0x00010001 }, + { 0x00000040, 0x27e41c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001400, 0x00001400, 0x000006a4 }, + { 0x80600040, 0xcc2035b1, 0x00898808, 0x008d0760 }, + { 0x80600040, 0xcc3035b1, 0x00898828, 0x008d0770 }, + { 0x00000001, 0x27230231, 0x00000783, 0x00000000 }, + { 0x00400001, 0x27240231, 0x008a8c18, 0x00000000 }, + { 0x00400001, 0x27280231, 0x008a8c38, 0x00000000 }, + { 0x00400001, 0x272c0231, 0x00008c3e, 0x00000000 }, + { 0x00400001, 0x27400231, 0x00690784, 0x00000000 }, + { 0x00000006, 0x26d03dad, 0x00000700, 0x00020002 }, + { 0x00000040, 0x27e41c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001400, 0x00001400, 0x000006a8 }, + { 0x80600040, 0xcc4035b1, 0x00898840, 0x008d0760 }, + { 0x80600040, 0xcc5035b1, 0x00898860, 0x008d0770 }, + { 0x00800001, 0x27200231, 0x008d0724, 0x00000000 }, + { 0x00600001, 0x27280231, 0x00000727, 0x00000000 }, + { 0x00400001, 0x27400231, 0x00808c46, 0x00000000 }, + { 0x00000006, 0x26d03dad, 0x00000700, 0x00030003 }, + { 0x00000040, 0x27e41c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001400, 0x00001400, 0x000006ac }, + { 0x80600040, 0xcc6035b1, 0x00898848, 0x008d0760 }, + { 0x80600040, 0xcc7035b1, 0x00898868, 0x008d0770 }, + { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, + { 0x00800001, 0x2760022d, 0x00090724, 0x00000000 }, + { 0x00000001, 0x34000020, 0x000007e4, 0x00000000 }, + { 0x00800001, 0x2760022d, 0x00280740, 0x00000000 }, + { 0x00000001, 0x34000020, 0x000007e4, 0x00000000 }, + { 0x02802005, 0x20003da0, 0x000006d0, 0x00020002 }, + { 0x02802005, 0x20003da0, 0x020006d0, 0x00010001 }, + { 0x009a0001, 0x27200169, 0x00000000, 0x80808080 }, + { 0x00780001, 0x27400231, 0x028d0724, 0x00000000 }, + { 0x00780001, 0x27240231, 0x008d0740, 0x00000000 }, + { 0x00400040, 0x25e04629, 0x00690724, 0x00690740 }, + { 0x00200040, 0x25e02529, 0x004505e0, 0x004505e4 }, + { 0x00800040, 0x2400252c, 0x000005e0, 0x000005e2 }, + { 0x00800040, 0x24003d8c, 0x008d0400, 0x00040004 }, + { 0x00800008, 0x27603d8d, 0x008d0400, 0x00030003 }, + { 0x00000001, 0x34000020, 0x000007e4, 0x00000000 }, + { 0x00600001, 0x26c00231, 0x008d0724, 0x00000000 }, + { 0x00400001, 0x26c80231, 0x0069072b, 0x00000000 }, + { 0x00600040, 0x24003e2c, 0x008d06c2, 0x00020002 }, + { 0x00600048, 0x24003e2c, 0x008d06c1, 0x00020002 }, + { 0x00600048, 0x25e03e29, 0x008d06c0, 0x00010001 }, + { 0x00800008, 0x27603d2d, 0x002905e0, 0x00020002 }, + { 0x00000001, 0x34000020, 0x000007e4, 0x00000000 }, + { 0x00400009, 0x26e05421, 0x00000740, 0x00690050 }, + { 0x00600001, 0x26c40231, 0x008d0723, 0x00000000 }, + { 0x00400001, 0x26c00231, 0x00ab06e3, 0x00000000 }, + { 0x00600040, 0x24003e2c, 0x008d06c2, 0x00020002 }, + { 0x00600048, 0x24003e2c, 0x008d06c1, 0x00020002 }, + { 0x00600048, 0x26c03e2d, 0x008d06c0, 0x00010001 }, + { 0x00400040, 0x22083eac, 0x00690054, 0x06c006c0 }, + { 0x00800008, 0x27603dad, 0x01e99000, 0x00020002 }, + { 0x00000001, 0x34000020, 0x000007e4, 0x00000000 }, + { 0x00400009, 0x26e05421, 0x00000740, 0x00690050 }, + { 0x00600001, 0x26c40231, 0x008d0723, 0x00000000 }, + { 0x00400001, 0x26c00231, 0x00ab06e3, 0x00000000 }, + { 0x00600042, 0x25c04629, 0x008d06c4, 0x008d06c5 }, + { 0x00600040, 0x24003e2c, 0x008d06c3, 0x00020002 }, + { 0x00600048, 0x24003e2c, 0x008d06c2, 0x00020002 }, + { 0x00600048, 0x24003e2c, 0x008d06c1, 0x00010001 }, + { 0x00600008, 0x26c03d8d, 0x008d0400, 0x00020002 }, + { 0x00400001, 0x46c401ad, 0x006906c4, 0x00000000 }, + { 0x00400001, 0x46c6012d, 0x006905c0, 0x00000000 }, + { 0x00400040, 0x22083eac, 0x00690054, 0x06c006c0 }, + { 0x00800001, 0x276001ad, 0x01ea9000, 0x00000000 }, + { 0x00000001, 0x34000020, 0x000007e4, 0x00000000 }, + { 0x00400009, 0x26e05421, 0x00000740, 0x00690050 }, + { 0x00600001, 0x26c40231, 0x008d0723, 0x00000000 }, + { 0x00400001, 0x26c00231, 0x00ab06e3, 0x00000000 }, + { 0x00600042, 0x25c04629, 0x008d06c0, 0x008d06c1 }, + { 0x00600040, 0x24003e2c, 0x008d06c2, 0x00020002 }, + { 0x00600048, 0x24003e2c, 0x008d06c1, 0x00020002 }, + { 0x00600048, 0x26e03e2d, 0x008d06c0, 0x00010001 }, + { 0x00400008, 0x46c23dad, 0x006906e0, 0x00020002 }, + { 0x00200008, 0x26d03dad, 0x004506e8, 0x00020002 }, + { 0x00400001, 0x46c0012d, 0x006905c0, 0x00000000 }, + { 0x00400009, 0x22083eac, 0x00690054, 0x00010001 }, + { 0x00400040, 0x22083d8c, 0x00690208, 0x06c006c0 }, + { 0x00800001, 0x276001ad, 0x01e99000, 0x00000000 }, + { 0x00000001, 0x34000020, 0x000007e4, 0x00000000 }, + { 0x00600042, 0x45c04629, 0x008d0724, 0x008d0725 }, + { 0x00600040, 0x24003e2c, 0x008d0726, 0x00020002 }, + { 0x00600048, 0x24003e2c, 0x008d0725, 0x00020002 }, + { 0x00600048, 0x25e03e29, 0x008d0724, 0x00010001 }, + { 0x00600008, 0x45c23d29, 0x008d05e0, 0x00020002 }, + { 0x00800001, 0x2760012d, 0x002a05c0, 0x00000000 }, + { 0x00000001, 0x34000020, 0x000007e4, 0x00000000 }, + { 0x00600001, 0x27440231, 0x00000743, 0x00000000 }, + { 0x00600042, 0x45c04629, 0x008d0740, 0x008d0741 }, + { 0x00600040, 0x24003e2c, 0x008d0742, 0x00020002 }, + { 0x00600048, 0x24003e2c, 0x008d0741, 0x00020002 }, + { 0x00600048, 0x25e03e29, 0x008d0740, 0x00010001 }, + { 0x00600008, 0x45c23d29, 0x008d05e0, 0x00020002 }, + { 0x00800001, 0x2760012d, 0x004905c0, 0x00000000 }, + { 0x00000001, 0x34000020, 0x000007e4, 0x00000000 }, + { 0x00000401, 0x27c80061, 0x00000000, 0x000f000f }, + { 0x00200801, 0x27c001a1, 0x004507fa, 0x00000000 }, + { 0x00000040, 0x22000c00, 0x00000200, 0x0ff04000 }, + { 0x00800001, 0x20400232, 0x00a90400, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00a90404, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00a90408, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00a9040c, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00a90440, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00a90444, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00a90448, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00a9044c, 0x00000000 }, + { 0x00800001, 0x20c00232, 0x00a90480, 0x00000000 }, + { 0x00800001, 0x20d00232, 0x00a90484, 0x00000000 }, + { 0x00800001, 0x20e00232, 0x00a90488, 0x00000000 }, + { 0x00800001, 0x20f00232, 0x00a9048c, 0x00000000 }, + { 0x00800001, 0x21000232, 0x00a904c0, 0x00000000 }, + { 0x00800001, 0x21100232, 0x00a904c4, 0x00000000 }, + { 0x00800001, 0x21200232, 0x00a904c8, 0x00000000 }, + { 0x00800001, 0x21300232, 0x00a904cc, 0x00000000 }, + { 0x01600031, 0x27800021, 0x508d07c0, 0x00000200 }, + { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27c00021, 0x008d0000, 0x00000000 }, + { 0x00200009, 0x27fa3e29, 0x00450064, 0x00040004 }, + { 0x00000401, 0x27c80061, 0x00000000, 0x000f000f }, + { 0x00200809, 0x27c03e21, 0x00450064, 0x00040004 }, + { 0x00000040, 0x22000d20, 0x00000062, 0x1218a000 }, + { 0x00a02401, 0x20400232, 0x00b10080, 0x00000000 }, + { 0x00a02801, 0x20500232, 0x00b10090, 0x00000000 }, + { 0x00a02401, 0x20800232, 0x00b100c0, 0x00000000 }, + { 0x00a02801, 0x20900232, 0x00b100d0, 0x00000000 }, + { 0x00a02401, 0x20c00232, 0x00b10100, 0x00000000 }, + { 0x00a02801, 0x20d00232, 0x00b10110, 0x00000000 }, + { 0x00a02401, 0x21000232, 0x00b10140, 0x00000000 }, + { 0x00a02801, 0x21100232, 0x00b10150, 0x00000000 }, + { 0x01600031, 0x27800021, 0x508d07c0, 0x00000200 }, + { 0x00000401, 0x20280062, 0x00000000, 0x0007000f }, + { 0x0000080c, 0x20243c22, 0x000007c4, 0x00010001 }, + { 0x00000040, 0x22001c00, 0x00000200, 0xf8000001 }, + { 0x00800001, 0x40400232, 0x00b10180, 0x00000000 }, + { 0x00800001, 0x40410232, 0x00b101c0, 0x00000000 }, + { 0x00800001, 0x40600232, 0x00b10190, 0x00000000 }, + { 0x00800001, 0x40610232, 0x00b101d0, 0x00000000 }, + { 0x00800001, 0x40800232, 0x00b101a0, 0x00000000 }, + { 0x00800001, 0x40810232, 0x00b101e0, 0x00000000 }, + { 0x00800001, 0x40a00232, 0x00b101b0, 0x00000000 }, + { 0x00800001, 0x40a10232, 0x00b101f0, 0x00000000 }, + { 0x01600031, 0x27a00001, 0x508d0000, 0x00000200 }, + { 0x00000001, 0x27800021, 0x00000780, 0x00000000 }, + { 0x00000001, 0x27a00021, 0x000007a0, 0x00000000 }, + { 0x01600031, 0x20001c20, 0x708d0000, 0x82000010 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x20400021, 0x008d0000, 0x00000000 }, + { 0x00000005, 0x20203e2d, 0x00000061, 0x001f001f }, + { 0x00200009, 0x20643e2d, 0x00450064, 0x00040004 }, + { 0x00000001, 0x203a01ed, 0x00000000, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000020, 0x00160016 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000001e }, + { 0x01200010, 0x20003e2c, 0x0200006c, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000024 }, + { 0x00800009, 0x25403dad, 0x00050064, 0x00020002 }, + { 0x00000001, 0x203a01ed, 0x00000000, 0x00180018 }, + { 0x00200040, 0x45483dad, 0x00660548, 0x00100010 }, + { 0x00200040, 0x45523dad, 0x00660552, 0x00100010 }, + { 0x00400040, 0x25583dad, 0x00690558, 0x00100010 }, + { 0x00800040, 0x208035ad, 0x00b10080, 0x00b10540 }, + { 0x00600040, 0x45403dad, 0x00ae0540, 0x00200020 }, + { 0x00800040, 0x20a035ad, 0x00b100a0, 0x00b10540 }, + { 0x00600040, 0x45423dad, 0x00ae0542, 0x00200020 }, + { 0x00800040, 0x20e035ad, 0x00b100e0, 0x00b10540 }, + { 0x00600040, 0x45403dad, 0x00ae0540, 0xffe0ffe0 }, + { 0x00800040, 0x20c035ad, 0x00b100c0, 0x00b10540 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000014 }, + { 0x06600010, 0x20003dac, 0x02000020, 0x00030003 }, + { 0x00000001, 0x206c0171, 0x00000000, 0x00000000 }, + { 0x00610001, 0x208000a5, 0x02050080, 0x00000000 }, + { 0x00610001, 0x212000a5, 0x02090100, 0x00000000 }, + { 0x00410001, 0x211000a5, 0x02690100, 0x00000000 }, + { 0x00200009, 0x25403dad, 0x00450064, 0x00020002 }, + { 0x00800040, 0x208035ad, 0x00b10080, 0x00050540 }, + { 0x00200040, 0x40883dad, 0x00660088, 0x00200020 }, + { 0x00200040, 0x40923dad, 0x00660092, 0x00200020 }, + { 0x00400040, 0x20983dad, 0x00690098, 0x00200020 }, + { 0x00200401, 0x22080060, 0x00000000, 0x03400140 }, + { 0x00000c01, 0x220c0060, 0x00000000, 0x04400080 }, + { 0x00000801, 0x22040060, 0x00000000, 0x01000070 }, + { 0x00000001, 0x20200169, 0x00000000, 0x00000000 }, + { 0x0000000c, 0x2458262d, 0x0000006d, 0x00000020 }, + { 0x00000001, 0x210e0169, 0x00000000, 0x00010001 }, + { 0x00000005, 0x24583dad, 0x00000458, 0x00030003 }, + { 0x01000010, 0x200035ac, 0x0000010e, 0x00000458 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x000002fe }, + { 0x01000010, 0x20003dac, 0x0200010e, 0x00010001 }, + { 0x00010401, 0x24540061, 0x02000000, 0x06c00640 }, + { 0x00010805, 0x245a3e2d, 0x02008800, 0x007f007f }, + { 0x00110401, 0x24540061, 0x02000000, 0x04800780 }, + { 0x00110805, 0x245a3e2d, 0x02008804, 0x007f007f }, + { 0x0000000c, 0x211e362d, 0x0000006c, 0x00000020 }, + { 0x00000040, 0x20780d21, 0x0000045a, 0x0208a002 }, + { 0x02000005, 0x20003dac, 0x0200011e, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000001be }, + { 0x01000005, 0x20003dac, 0x00009800, 0x00030003 }, + { 0x00200005, 0x24443dad, 0x00459800, 0x00030003 }, + { 0x0020000c, 0x24403dad, 0x00459800, 0x00020002 }, + { 0x01600006, 0x20003dac, 0x02000446, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000012 }, + { 0x00010040, 0x22000c20, 0x02000078, 0x00400000 }, + { 0x00110040, 0x22000c20, 0x02000078, 0x00700000 }, + { 0x00310040, 0x20401da5, 0x02450440, 0xfffffffe }, + { 0x00110001, 0x20480061, 0x02000000, 0x000c000c }, + { 0x00010040, 0x20401da5, 0x02000440, 0xfffffffe }, + { 0x00010001, 0x204401a5, 0x02000442, 0x00000000 }, + { 0x00010001, 0x20480061, 0x02000000, 0x0007000c }, + { 0x01600031, 0x25600021, 0x408d0040, 0x00000200 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00010040, 0x22000c20, 0x02000078, 0x00200000 }, + { 0x00110040, 0x22000c20, 0x02000078, 0x00400000 }, + { 0x00200001, 0x204001a5, 0x00450440, 0x00000000 }, + { 0x00110040, 0x20441da5, 0x02000442, 0xfffffffe }, + { 0x00110001, 0x20480061, 0x02000000, 0x000c0007 }, + { 0x00010001, 0x20480061, 0x02000000, 0x00070007 }, + { 0x01600031, 0x25600021, 0x408d0040, 0x00000200 }, + { 0x0020040c, 0x24403dad, 0x00459800, 0x00030003 }, + { 0x00200805, 0x24483dad, 0x00459800, 0x00070007 }, + { 0x01600006, 0x20003dac, 0x0000044a, 0x00000000 }, + { 0x00200001, 0x204001a5, 0x00450440, 0x00000000 }, + { 0x00000009, 0x20403ca5, 0x00000040, 0x00010001 }, + { 0x00010040, 0x22000c20, 0x00000078, 0x00200010 }, + { 0x00110040, 0x22000c20, 0x00000078, 0x00300010 }, + { 0x00010001, 0x20480061, 0x00000000, 0x00030009 }, + { 0x00110001, 0x20480061, 0x00000000, 0x00040009 }, + { 0x02600031, 0x27000021, 0x408d0040, 0x00000200 }, + { 0x01000005, 0x20003dac, 0x00009800, 0x00030003 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000001a }, + { 0x00600001, 0x26220231, 0x008d05c0, 0x00000000 }, + { 0x00600401, 0x26120231, 0x008d05b8, 0x00000000 }, + { 0x00600801, 0x26020231, 0x008d05b0, 0x00000000 }, + { 0x00600401, 0x25f20231, 0x008d05a8, 0x00000000 }, + { 0x00600801, 0x25e20231, 0x008d05a0, 0x00000000 }, + { 0x00600401, 0x25d20231, 0x008d0598, 0x00000000 }, + { 0x00600801, 0x25c20231, 0x008d0590, 0x00000000 }, + { 0x00600401, 0x25b20231, 0x008d0588, 0x00000000 }, + { 0x00600801, 0x25a20231, 0x008d0580, 0x00000000 }, + { 0x00600401, 0x25920231, 0x008d0578, 0x00000000 }, + { 0x00600801, 0x25820231, 0x008d0570, 0x00000000 }, + { 0x00600001, 0x25720231, 0x008d0568, 0x00000000 }, + { 0x00600001, 0x25620231, 0x008d0560, 0x00000000 }, + { 0x00110001, 0x220001ec, 0x02000000, 0x05820582 }, + { 0x00010001, 0x220001ec, 0x02000000, 0x05620562 }, + { 0x00000001, 0x220e0128, 0x00000454, 0x00000000 }, + { 0x01800006, 0x200035ac, 0x02000446, 0x00000444 }, + { 0x00810001, 0xbc000229, 0x02ad8000, 0x00000000 }, + { 0x00810001, 0xbc200229, 0x02ad8020, 0x00000000 }, + { 0x00810001, 0xbc400229, 0x02ad8040, 0x00000000 }, + { 0x00810001, 0xbc600229, 0x02ad8060, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000012a }, + { 0x00600001, 0x2024018d, 0x008d0200, 0x00000000 }, + { 0x01000041, 0x245e35ad, 0x00000446, 0x00000444 }, + { 0x00000040, 0x22022d08, 0x00000200, 0x00100010 }, + { 0x02000005, 0x20003db0, 0x0200045e, 0x00010001 }, + { 0x00200040, 0x22042d08, 0x00450200, 0x00200020 }, + { 0x00400001, 0x244c0109, 0x00690200, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000066 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000064 }, + { 0x00000040, 0x22003d08, 0x00000200, 0xffdeffde }, + { 0x00000440, 0x22023d08, 0x00000202, 0xffeeffee }, + { 0x00000801, 0x220c0060, 0x00000000, 0x04a00480 }, + { 0x01000010, 0x20003db0, 0x0000045e, 0x00040004 }, + { 0x00a02040, 0x2400462c, 0x00ad8000, 0x00ad8005 }, + { 0x00a02048, 0x24003e2c, 0x00ad8001, 0xfffbfffb }, + { 0x00a02048, 0x24003e2c, 0x00ad8002, 0x00140014 }, + { 0x00a02048, 0x24003e2c, 0x00ad8003, 0x00140014 }, + { 0x00a02048, 0xb8003e2d, 0x00ad8004, 0xfffbfffb }, + { 0x00a02040, 0x2400462c, 0x00ad8040, 0x00ad8045 }, + { 0x00a02048, 0x24003e2c, 0x00ad8041, 0xfffbfffb }, + { 0x00a02048, 0x24003e2c, 0x00ad8042, 0x00140014 }, + { 0x00a02048, 0x24003e2c, 0x00ad8043, 0x00140014 }, + { 0x00a02048, 0xb8403e2d, 0x00ad8044, 0xfffbfffb }, + { 0x00a02040, 0x2400462c, 0x00ad8080, 0x00ad8085 }, + { 0x00a02048, 0x24003e2c, 0x00ad8081, 0xfffbfffb }, + { 0x00a02048, 0x24003e2c, 0x00ad8082, 0x00140014 }, + { 0x00a02048, 0x24003e2c, 0x00ad8083, 0x00140014 }, + { 0x00a02048, 0xb8803e2d, 0x00ad8084, 0xfffbfffb }, + { 0x00600040, 0x2400462c, 0x008d80c0, 0x008d80c5 }, + { 0x00600048, 0x24003e2c, 0x008d80c1, 0xfffbfffb }, + { 0x00600048, 0x24003e2c, 0x008d80c2, 0x00140014 }, + { 0x00600048, 0x24003e2c, 0x008d80c3, 0x00140014 }, + { 0x00600048, 0xb8c03e2d, 0x008d80c4, 0xfffbfffb }, + { 0x00000401, 0x22000060, 0x00000000, 0x04a00480 }, + { 0x00000c01, 0x22040060, 0x00000000, 0x04a00490 }, + { 0x00010802, 0x220c2d28, 0x00000454, 0x04800480 }, + { 0x00a02040, 0x24003dac, 0x00b18000, 0x02000200 }, + { 0x00800048, 0x24003dac, 0x01ed8800, 0xfffbfffb }, + { 0x00800048, 0x24203dac, 0x01ed8820, 0xfffbfffb }, + { 0x00a02048, 0x24003dac, 0x00b18020, 0x00140014 }, + { 0x00800048, 0x24003dac, 0x01ed8820, 0x00140014 }, + { 0x00800048, 0x24203dac, 0x01ed8840, 0x00140014 }, + { 0x00a02048, 0x24003dac, 0x00b18040, 0xfffbfffb }, + { 0x00800048, 0x24003dac, 0x01ed8840, 0x00010001 }, + { 0x00800048, 0x24203dac, 0x01ed8860, 0x00010001 }, + { 0x8080000c, 0xd8003d91, 0x00b10400, 0x000a000a }, + { 0x8080100c, 0xd8203d91, 0x00b10420, 0x000a000a }, + { 0x00a02040, 0x24003dac, 0x00b18040, 0x02000200 }, + { 0x00800048, 0x24003dac, 0x01ed8840, 0xfffbfffb }, + { 0x00800048, 0x24203dac, 0x01ed8860, 0xfffbfffb }, + { 0x00a02048, 0x24003dac, 0x00b18060, 0x00140014 }, + { 0x00800048, 0x24003dac, 0x01ed8860, 0x00140014 }, + { 0x00800048, 0x24203dac, 0x01ed8880, 0x00140014 }, + { 0x00a02048, 0x24003dac, 0x00b18080, 0xfffbfffb }, + { 0x00800048, 0x24003dac, 0x01ed8880, 0x00010001 }, + { 0x00800048, 0x24203dac, 0x01ed88a0, 0x00010001 }, + { 0x8080000c, 0xd8403d91, 0x00b10400, 0x000a000a }, + { 0x8080100c, 0xd8603d91, 0x00b10420, 0x000a000a }, + { 0x00010220, 0x34001c00, 0x00001400, 0x000000b4 }, + { 0x01000010, 0x20003db0, 0x00000444, 0x00000000 }, + { 0x01000010, 0x20003db0, 0x02000446, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000004c }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000004a }, + { 0x00400040, 0x22003d28, 0x0069044c, 0xfffefffe }, + { 0x03400010, 0x20003dac, 0x00000446, 0x00020002 }, + { 0x01000010, 0x20003db0, 0x02000444, 0x00020002 }, + { 0x00410040, 0x22002d08, 0x00690200, 0x00100010 }, + { 0x01000010, 0x20003dac, 0x00000446, 0x00000000 }, + { 0x00010002, 0x220c2d28, 0x02000454, 0x04800480 }, + { 0x00800040, 0x24003e2c, 0x01ed8000, 0x00100010 }, + { 0x00800040, 0x24203e2c, 0x01ed8020, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01ed8001, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8021, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8002, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8022, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8003, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8023, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8004, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8024, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8005, 0x00010001 }, + { 0x00800048, 0x24203e2c, 0x01ed8025, 0x00010001 }, + { 0x8080000c, 0xd8003d91, 0x00b10400, 0x00050005 }, + { 0x8080100c, 0xd8203d91, 0x00b10420, 0x00050005 }, + { 0x00800040, 0x24003e2c, 0x01ed8040, 0x00100010 }, + { 0x00800040, 0x24203e2c, 0x01ed8060, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01ed8041, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8061, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8042, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8062, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8043, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8063, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8044, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8064, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8045, 0x00010001 }, + { 0x00800048, 0x24203e2c, 0x01ed8065, 0x00010001 }, + { 0x8080000c, 0xd8403d91, 0x00b10400, 0x00050005 }, + { 0x8080100c, 0xd8603d91, 0x00b10420, 0x00050005 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000004 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000005c }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000062 }, + { 0x01000010, 0x20003db0, 0x00000446, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000042 }, + { 0x00200401, 0x22000128, 0x0066044c, 0x00000000 }, + { 0x00200c01, 0x22040128, 0x0045044e, 0x00000000 }, + { 0x00000801, 0x220c0128, 0x00000454, 0x00000000 }, + { 0x03400010, 0x20003dac, 0x02000444, 0x00020002 }, + { 0x01000010, 0x20003dac, 0x00000444, 0x00000000 }, + { 0x00410040, 0x22002d08, 0x02690200, 0x00010001 }, + { 0x01000010, 0x20003db0, 0x02000446, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000002 }, + { 0x00110001, 0x220c0168, 0x02000000, 0x04800480 }, + { 0x00a02040, 0x24003e2c, 0x00ad83e0, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01ed8be0, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8800, 0xfffbfffb }, + { 0x00a02048, 0x24003e2c, 0x00ad8000, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8800, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8820, 0x00140014 }, + { 0x00a02048, 0x24003e2c, 0x00ad8020, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8820, 0x00010001 }, + { 0x00800048, 0x24203e2c, 0x01ed8840, 0x00010001 }, + { 0x8080000c, 0xd8003d91, 0x00b10400, 0x00050005 }, + { 0x8080100c, 0xd8203d91, 0x00b10420, 0x00050005 }, + { 0x00a02040, 0x24003e2c, 0x00ad8020, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01ed8820, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8840, 0xfffbfffb }, + { 0x00a02048, 0x24003e2c, 0x00ad8040, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8840, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8860, 0x00140014 }, + { 0x00a02048, 0x24003e2c, 0x00ad8060, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8860, 0x00010001 }, + { 0x00800048, 0x24203e2c, 0x01ed8880, 0x00010001 }, + { 0x8080000c, 0xd8403d91, 0x00b10400, 0x00050005 }, + { 0x8080100c, 0xd8603d91, 0x00b10420, 0x00050005 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001c }, + { 0x00200401, 0x22000128, 0x0045044c, 0x00000000 }, + { 0x00000801, 0x220c0128, 0x00000454, 0x00000000 }, + { 0x01200010, 0x20003dac, 0x00000444, 0x00030003 }, + { 0x01200010, 0x20003dac, 0x02000446, 0x00030003 }, + { 0x00210040, 0x22002d08, 0x00450200, 0x00010001 }, + { 0x00210040, 0x22002d08, 0x02450200, 0x00100010 }, + { 0x00800001, 0xb8000229, 0x01ed8000, 0x00000000 }, + { 0x00800001, 0xb8200229, 0x01ed8020, 0x00000000 }, + { 0x00800001, 0xb8400229, 0x01ed8040, 0x00000000 }, + { 0x00800001, 0xb8600229, 0x01ed8060, 0x00000000 }, + { 0x80800042, 0xd8004631, 0x00d29800, 0x00d20480 }, + { 0x80800042, 0xd8204631, 0x00d29820, 0x00d204a0 }, + { 0x80800042, 0xd8404631, 0x00d29840, 0x00d204c0 }, + { 0x80800042, 0xd8604631, 0x00d29860, 0x00d204e0 }, + { 0x00600001, 0x220001ac, 0x008d0024, 0x00000000 }, + { 0x00200040, 0x244c3dad, 0x00450448, 0xfff8fff8 }, + { 0x00000401, 0x220001ec, 0x00000000, 0x07000700 }, + { 0x00000c01, 0x220201e8, 0x00000000, 0x07100710 }, + { 0x00000801, 0x220e0128, 0x00000456, 0x00000000 }, + { 0x00000441, 0x254635ad, 0x00000448, 0x0000044a }, + { 0x00000c41, 0x254025ad, 0x0000444c, 0x0000444e }, + { 0x00000c41, 0x254225ad, 0x00000448, 0x0000444e }, + { 0x00000841, 0x254435ad, 0x0000444c, 0x0000044a }, + { 0x00200040, 0x244c3d09, 0x00450200, 0x00100010 }, + { 0x00800041, 0x24002628, 0x00ad8000, 0x00000540 }, + { 0x00800041, 0x24202628, 0x00ad8020, 0x00000540 }, + { 0x00800048, 0x24002628, 0x00ad8002, 0x00000542 }, + { 0x00800048, 0x24202628, 0x00ad8022, 0x00000542 }, + { 0x00200001, 0x22000128, 0x0045044c, 0x00000000 }, + { 0x00800048, 0x24002628, 0x01ed8000, 0x00000544 }, + { 0x00800048, 0x24202628, 0x01ed8020, 0x00000544 }, + { 0x00800048, 0xbc002629, 0x01ed8002, 0x00000546 }, + { 0x00801048, 0xbc202629, 0x01ed8022, 0x00000546 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000126 }, + { 0x00000001, 0x20220169, 0x00000000, 0x00040004 }, + { 0x00200005, 0x24443dad, 0x00459800, 0x00030003 }, + { 0x0020000c, 0x24403dad, 0x00459800, 0x00020002 }, + { 0x01600006, 0x20003dac, 0x02000446, 0x00000000 }, + { 0x00010040, 0x22000c20, 0x02000078, 0x00200000 }, + { 0x00110040, 0x22000c20, 0x02000078, 0x00500000 }, + { 0x00310040, 0x20401da5, 0x02450440, 0xfffffffe }, + { 0x00110001, 0x20480061, 0x02000000, 0x00080008 }, + { 0x00010040, 0x20401da5, 0x02000440, 0xfffffffe }, + { 0x00010001, 0x204401a5, 0x02000442, 0x00000000 }, + { 0x00010001, 0x20480061, 0x02000000, 0x00030008 }, + { 0x01600031, 0x25600021, 0x408d0040, 0x00000200 }, + { 0x00000040, 0x22000c20, 0x00000078, 0x00100010 }, + { 0x0020040c, 0x24403dad, 0x00459800, 0x00030003 }, + { 0x00200805, 0x24483dad, 0x00459800, 0x00070007 }, + { 0x00200001, 0x204001a5, 0x00450440, 0x00000000 }, + { 0x00000009, 0x20403ca5, 0x00000040, 0x00010001 }, + { 0x00000001, 0x20480061, 0x00000000, 0x00020005 }, + { 0x02600031, 0x27000021, 0x408d0040, 0x00000200 }, + { 0x00110001, 0x220001ec, 0x02000000, 0x05820582 }, + { 0x00010001, 0x220001ec, 0x02000000, 0x05620562 }, + { 0x00000001, 0x220e0128, 0x00000454, 0x00000000 }, + { 0x01800006, 0x200035ac, 0x02000446, 0x00000444 }, + { 0x00410001, 0xbc000229, 0x02698000, 0x00000000 }, + { 0x00410001, 0xbc100229, 0x02698010, 0x00000000 }, + { 0x00410001, 0xbc200229, 0x02698020, 0x00000000 }, + { 0x00410001, 0xbc300229, 0x02698030, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000be }, + { 0x00600001, 0x2024018d, 0x008d0200, 0x00000000 }, + { 0x01000041, 0x245e35ad, 0x00000446, 0x00000444 }, + { 0x02000005, 0x20003db0, 0x0200045e, 0x00010001 }, + { 0x00000040, 0x22022d08, 0x00000200, 0x00100010 }, + { 0x00200040, 0x22042d08, 0x00450200, 0x00200020 }, + { 0x00400001, 0x244c0109, 0x00690200, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000044 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000042 }, + { 0x00000040, 0x22003d08, 0x00000200, 0xffdeffde }, + { 0x00000440, 0x22023d08, 0x00000202, 0xffeeffee }, + { 0x00000801, 0x220c0060, 0x00000000, 0x04d004c0 }, + { 0x01000010, 0x20003db0, 0x0000045e, 0x00040004 }, + { 0x00802040, 0x2400462c, 0x00a98000, 0x00a98005 }, + { 0x00802048, 0x24003e2c, 0x00a98001, 0xfffbfffb }, + { 0x00802048, 0x24003e2c, 0x00a98002, 0x00140014 }, + { 0x00802048, 0x24003e2c, 0x00a98003, 0x00140014 }, + { 0x00802048, 0xb8003e2d, 0x00a98004, 0xfffbfffb }, + { 0x00802040, 0x2400462c, 0x00a98040, 0x00a98045 }, + { 0x00802048, 0x24003e2c, 0x00a98041, 0xfffbfffb }, + { 0x00802048, 0x24003e2c, 0x00a98042, 0x00140014 }, + { 0x00802048, 0x24003e2c, 0x00a98043, 0x00140014 }, + { 0x00802048, 0xb8203e2d, 0x00a98044, 0xfffbfffb }, + { 0x00400040, 0x2400462c, 0x00698080, 0x00698085 }, + { 0x00400048, 0x24003e2c, 0x00698081, 0xfffbfffb }, + { 0x00400048, 0x24003e2c, 0x00698082, 0x00140014 }, + { 0x00400048, 0x24003e2c, 0x00698083, 0x00140014 }, + { 0x00400048, 0xb8403e2d, 0x00698084, 0xfffbfffb }, + { 0x00000401, 0x220c0060, 0x00000000, 0x04e004d0 }, + { 0x00000c01, 0x22000060, 0x00000000, 0x04d004c8 }, + { 0x00000c01, 0x22040060, 0x00000000, 0x04e004d8 }, + { 0x00000801, 0x22080060, 0x00000000, 0x04f004e8 }, + { 0x00800040, 0x24003dac, 0x00b104c0, 0x02000200 }, + { 0x00800048, 0x24003dac, 0x00b104e0, 0xfffbfffb }, + { 0x00800048, 0x24003dac, 0x01ed9800, 0x00140014 }, + { 0x00010001, 0x220c0168, 0x00000000, 0x05400540 }, + { 0x00110001, 0x220c0168, 0x00000000, 0x04c004c0 }, + { 0x00800048, 0x24003dac, 0x01e98000, 0xfffbfffb }, + { 0x00800048, 0x24003dac, 0x01e98020, 0x00010001 }, + { 0x00800048, 0x24003dac, 0x01e98800, 0x00140014 }, + { 0x8080000c, 0xd8003d91, 0x00b10400, 0x000a000a }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000060 }, + { 0x01000010, 0x20003db0, 0x00000444, 0x00000000 }, + { 0x01000010, 0x20003db0, 0x02000446, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000022 }, + { 0x00400040, 0x22003d28, 0x0069044c, 0xfffefffe }, + { 0x03400010, 0x20003dac, 0x00000446, 0x00020002 }, + { 0x01000010, 0x20003db0, 0x02000444, 0x00020002 }, + { 0x00410040, 0x22002d08, 0x00690200, 0x00100010 }, + { 0x01000010, 0x20003dac, 0x00000446, 0x00000000 }, + { 0x00010001, 0x220e0168, 0x02000000, 0x05400540 }, + { 0x00110001, 0x220e0168, 0x02000000, 0x04c004c0 }, + { 0x00800040, 0x24003e2c, 0x01e98000, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01e98001, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01e98002, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01e98003, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01e98004, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01e98005, 0x00010001 }, + { 0x8080000c, 0xdc003d91, 0x00b10400, 0x00050005 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000004 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000036 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000036 }, + { 0x01000010, 0x20003db0, 0x00000446, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x03600010, 0x20003dac, 0x02000444, 0x00020002 }, + { 0x00400401, 0x22000128, 0x0069044c, 0x00000000 }, + { 0x00400840, 0x22083d2c, 0x0069044c, 0x00100010 }, + { 0x00610040, 0x22002d08, 0x02690200, 0x00010001 }, + { 0x01000010, 0x20003dac, 0x00000444, 0x00000000 }, + { 0x01000010, 0x20003db0, 0x02000446, 0x00020002 }, + { 0x00800040, 0x24003e2c, 0x01e983e0, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01e98000, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01e98020, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01e993e0, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01e99000, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01e99020, 0x00010001 }, + { 0x00000001, 0x220e0168, 0x00000000, 0x05400540 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000002 }, + { 0x00110001, 0x220e0168, 0x02000000, 0x04c004c0 }, + { 0x8080000c, 0xdc003d91, 0x00b10400, 0x00050005 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000e }, + { 0x00400001, 0x22000128, 0x0069044c, 0x00000000 }, + { 0x01400010, 0x20003dac, 0x00000444, 0x00030003 }, + { 0x01400010, 0x20003dac, 0x02000446, 0x00030003 }, + { 0x00410040, 0x22002d08, 0x00690200, 0x00010001 }, + { 0x00410040, 0x22002d08, 0x02690200, 0x00100010 }, + { 0x00800001, 0x25400229, 0x01e98000, 0x00000000 }, + { 0x80800042, 0x45404631, 0x00d20540, 0x00d204c0 }, + { 0x00000001, 0x220c0128, 0x00000454, 0x00000000 }, + { 0x00400001, 0xd8000231, 0x008a0540, 0x00000000 }, + { 0x00400001, 0xd8100231, 0x008a0548, 0x00000000 }, + { 0x00400001, 0xd8200231, 0x008a0550, 0x00000000 }, + { 0x00400001, 0xd8300231, 0x008a0558, 0x00000000 }, + { 0x00600001, 0x220001ac, 0x008d0024, 0x00000000 }, + { 0x00200040, 0x244c3dad, 0x00450448, 0xfff8fff8 }, + { 0x00000401, 0x220001ec, 0x00000000, 0x07000700 }, + { 0x00000801, 0x220e0128, 0x00000456, 0x00000000 }, + { 0x00000441, 0x254635ad, 0x00000448, 0x0000044a }, + { 0x00000c41, 0x254025ad, 0x0000444c, 0x0000444e }, + { 0x00000c41, 0x254225ad, 0x00000448, 0x0000444e }, + { 0x00000841, 0x254435ad, 0x0000444c, 0x0000044a }, + { 0x00600041, 0x24002628, 0x00898000, 0x00000540 }, + { 0x00600048, 0x24002628, 0x00898002, 0x00000542 }, + { 0x00600048, 0x24002628, 0x00898008, 0x00000544 }, + { 0x00600048, 0x2540262d, 0x0089800a, 0x00000546 }, + { 0x00400401, 0xbc0001a9, 0x00690540, 0x00000000 }, + { 0x00400801, 0xbc1001a9, 0x00690548, 0x00000000 }, + { 0x01000010, 0x20003d2c, 0x00000022, 0x00030003 }, + { 0x01000040, 0x20223d29, 0x02000022, 0xffffffff }, + { 0x00000040, 0x220c3d8c, 0x0000020c, 0x00080008 }, + { 0x00110040, 0x24540c21, 0x00000454, 0x00080008 }, + { 0x00010040, 0x24540c21, 0x00000454, 0x00180038 }, + { 0x00110220, 0x34001c00, 0x02001400, 0xfffffee6 }, + { 0x01800010, 0x20003dac, 0x0200010e, 0x00010001 }, + { 0x00000040, 0x220c3d8c, 0x0000020c, 0xffe0ffe0 }, + { 0x00010001, 0x24540061, 0x02000000, 0x06c00640 }, + { 0x00110001, 0x24540061, 0x02000000, 0x04800780 }, + { 0x00000001, 0x220e0128, 0x00000456, 0x00000000 }, + { 0x00800040, 0x24003dac, 0x00b19c00, 0x00200020 }, + { 0x00800040, 0x24203dac, 0x00b19c20, 0x00200020 }, + { 0x8080000c, 0xdc003d91, 0x00b10400, 0x00060006 }, + { 0x8080000c, 0xdc203d91, 0x00b10420, 0x00060006 }, + { 0x02000040, 0x210e3d29, 0x0200010e, 0xffffffff }, + { 0x00000040, 0x220c3d8c, 0x0000020c, 0x00040004 }, + { 0x00110220, 0x34001c00, 0x02001400, 0xfffffcf8 }, + { 0x01000005, 0x25643e2d, 0x00000060, 0x00c000c0 }, + { 0x01000010, 0x20003dac, 0x02000458, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000c }, + { 0x01000010, 0x20003dac, 0x00000458, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000086 }, + { 0x00a02001, 0x46400231, 0x00d20780, 0x00000000 }, + { 0x00a02001, 0x46800231, 0x00d207c0, 0x00000000 }, + { 0x00a02001, 0x46c00231, 0x00d20480, 0x00000000 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000007e }, + { 0x80a02042, 0x46404631, 0x00d20640, 0x00d20780 }, + { 0x80a02042, 0x46804631, 0x00d20680, 0x00d207c0 }, + { 0x80a02042, 0x46c04631, 0x00d206c0, 0x00d20480 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000076 }, + { 0x01000010, 0x20003dac, 0x02000564, 0x00800080 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x0000000e }, + { 0x01000010, 0x20003dac, 0x00000458, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0xffffffe4 }, + { 0x00200401, 0x256801ed, 0x00000000, 0x00200020 }, + { 0x00200801, 0x256c01ed, 0x00000000, 0x00060006 }, + { 0x00400001, 0x258001ed, 0x00000000, 0x00000000 }, + { 0x00600001, 0x45a001ad, 0x00058c00, 0x00000000 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000028 }, + { 0x02600005, 0x20006e28, 0x02008c0c, 0x88848421 }, + { 0x0220000c, 0x25663dad, 0x00000458, 0x00010001 }, + { 0x0000000c, 0x25643dad, 0x00000564, 0x00060006 }, + { 0x00310001, 0x25c401ad, 0x00000458, 0x00000000 }, + { 0x00210001, 0x25c00061, 0x00000000, 0x00010001 }, + { 0x00310040, 0x25c03dad, 0x004545c4, 0x00010001 }, + { 0x00610001, 0x25a00061, 0x02000000, 0x00000080 }, + { 0x00710001, 0x45a002ad, 0x02ae8c00, 0x00000000 }, + { 0x00710001, 0x45a202ad, 0x02ae8c01, 0x00000000 }, + { 0x00800041, 0x25a035ad, 0x00b105a0, 0x000905c0 }, + { 0x01200010, 0x20003e2c, 0x0245006e, 0x00000000 }, + { 0x00310009, 0x244c45ad, 0x02000564, 0x0045006e }, + { 0x00210001, 0x244c01ed, 0x02000000, 0x00000000 }, + { 0x0031000c, 0x244c3dad, 0x0245044c, 0x00010001 }, + { 0x00200009, 0x256835ad, 0x0045044c, 0x00000566 }, + { 0x00210040, 0x256835ad, 0x02450568, 0x00000566 }, + { 0x00200040, 0x256c362d, 0x0045006e, 0x00000566 }, + { 0x00400040, 0x240035ac, 0x00ab05a2, 0x00ab05a6 }, + { 0x00400040, 0x2400358c, 0x00690400, 0x00000566 }, + { 0x0040000c, 0x2580358d, 0x00690400, 0x00000566 }, + { 0x00800041, 0x2400362c, 0x00d20640, 0x000005a0 }, + { 0x00800041, 0x2420362c, 0x00d20660, 0x000005a0 }, + { 0x00800048, 0x2400362c, 0x00d20780, 0x000005a4 }, + { 0x00800048, 0x2420362c, 0x00d207a0, 0x000005a4 }, + { 0x00800040, 0x2400358c, 0x00b10400, 0x00000568 }, + { 0x00800040, 0x2420358c, 0x00b10420, 0x00000568 }, + { 0x0080000c, 0x24c0358d, 0x00b10400, 0x0000056c }, + { 0x0080000c, 0x24e0358d, 0x00b10420, 0x0000056c }, + { 0x80800040, 0x464035b1, 0x00b104c0, 0x00000580 }, + { 0x80800040, 0x466035b1, 0x00b104e0, 0x00000580 }, + { 0x00800041, 0x2400362c, 0x00d20680, 0x000005a0 }, + { 0x00800041, 0x2420362c, 0x00d206a0, 0x000005a0 }, + { 0x00800048, 0x2400362c, 0x00d207c0, 0x000005a4 }, + { 0x00800048, 0x2420362c, 0x00d207e0, 0x000005a4 }, + { 0x00800040, 0x2400358c, 0x00b10400, 0x00000568 }, + { 0x00800040, 0x2420358c, 0x00b10420, 0x00000568 }, + { 0x0080000c, 0x24c0358d, 0x00b10400, 0x0000056c }, + { 0x0080000c, 0x24e0358d, 0x00b10420, 0x0000056c }, + { 0x80800040, 0x468035b1, 0x00b104c0, 0x00000580 }, + { 0x80800040, 0x46a035b1, 0x00b104e0, 0x00000580 }, + { 0x00800041, 0x2400362c, 0x00d206c0, 0x000705a8 }, + { 0x00800041, 0x2420362c, 0x00d206e0, 0x000705a8 }, + { 0x00800048, 0x2400362c, 0x00d20480, 0x000705ac }, + { 0x00800048, 0x2420362c, 0x00d204a0, 0x000705ac }, + { 0x00800040, 0x2400358c, 0x00b10400, 0x0000056a }, + { 0x00800040, 0x2420358c, 0x00b10420, 0x0000056a }, + { 0x0080000c, 0x24c0358d, 0x00b10400, 0x0000056e }, + { 0x0080000c, 0x24e0358d, 0x00b10420, 0x0000056e }, + { 0x80800040, 0x46c035b1, 0x00b104c0, 0x00050582 }, + { 0x80800040, 0x46e035b1, 0x00b104e0, 0x00050582 }, + { 0x01800005, 0x20003d2c, 0x02000020, 0x00020002 }, + { 0x80800040, 0xd00045b1, 0x00b19000, 0x00d20640 }, + { 0x80800040, 0xd02045b1, 0x00b19020, 0x00d20660 }, + { 0x80800040, 0xd04045b1, 0x00b19040, 0x00d20680 }, + { 0x80800040, 0xd06045b1, 0x00b19060, 0x00d206a0 }, + { 0x00000040, 0x22083d8c, 0x00000208, 0x00800080 }, + { 0x80400040, 0xd40045b1, 0x00699400, 0x00ab06c0 }, + { 0x80400040, 0xd48045b1, 0x00699480, 0x00ab06c2 }, + { 0x80400040, 0xd42045b1, 0x00699420, 0x00ab06e0 }, + { 0x80400040, 0xd4a045b1, 0x006994a0, 0x00ab06e2 }, + { 0x80400040, 0xd41045b1, 0x00699410, 0x00ab06d0 }, + { 0x80400040, 0xd49045b1, 0x00699490, 0x00ab06d2 }, + { 0x80400040, 0xd43045b1, 0x00699430, 0x00ab06f0 }, + { 0x80400040, 0xd4b045b1, 0x006994b0, 0x00ab06f2 }, + { 0x00000040, 0x220a3d8c, 0x0000020a, 0x00080008 }, + { 0x00110040, 0x220a3d8c, 0x0200020a, 0x00300030 }, + { 0x01000010, 0x20003d2c, 0x02000020, 0x00060006 }, + { 0x00000040, 0x20203d29, 0x00000020, 0x00020002 }, + { 0x00000040, 0x22040c00, 0x00000204, 0x00100001 }, + { 0x00000040, 0x220c358c, 0x0000020c, 0x0000003a }, + { 0x00110220, 0x34001c00, 0x02001400, 0xfffffc36 }, + { 0x00000001, 0x220001ec, 0x00000000, 0x01400140 }, + { 0x00000001, 0x220201ec, 0x00000000, 0x01c001c0 }, + { 0x00800401, 0x20400236, 0x01ee8000, 0x00000000 }, + { 0x00800801, 0x20500236, 0x01ee8010, 0x00000000 }, + { 0x00800401, 0x20600236, 0x01ee8020, 0x00000000 }, + { 0x00800801, 0x20700236, 0x01ee8030, 0x00000000 }, + { 0x00800401, 0x20800236, 0x01ee8040, 0x00000000 }, + { 0x00800801, 0x20900236, 0x01ee8050, 0x00000000 }, + { 0x00800401, 0x20a00236, 0x01ee8060, 0x00000000 }, + { 0x00800801, 0x20b00236, 0x01ee8070, 0x00000000 }, + { 0x00800401, 0x20c00236, 0x01ee8100, 0x00000000 }, + { 0x00800801, 0x20d00236, 0x01ee8110, 0x00000000 }, + { 0x00800401, 0x20e00236, 0x01ee8120, 0x00000000 }, + { 0x00800801, 0x20f00236, 0x01ee8130, 0x00000000 }, + { 0x00800401, 0x21000236, 0x01ee8140, 0x00000000 }, + { 0x00800801, 0x21100236, 0x01ee8150, 0x00000000 }, + { 0x00800401, 0x21200236, 0x01ee8160, 0x00000000 }, + { 0x00800801, 0x21300236, 0x01ee8170, 0x00000000 }, + { 0x00200401, 0x204001a5, 0x00450064, 0x00000000 }, + { 0x00000801, 0x20480061, 0x00000000, 0x000f000f }, + { 0x01600031, 0x21401c21, 0x508d0040, 0x1218a000 }, + { 0x00000001, 0x220001ec, 0x00000000, 0x03400340 }, + { 0x00800401, 0x41600236, 0x00d28000, 0x00000000 }, + { 0x00800801, 0x41610236, 0x00d28080, 0x00000000 }, + { 0x00800401, 0x41800236, 0x00d28020, 0x00000000 }, + { 0x00800801, 0x41810236, 0x00d280a0, 0x00000000 }, + { 0x00800401, 0x41a00236, 0x00d28040, 0x00000000 }, + { 0x00800801, 0x41a10236, 0x00d280c0, 0x00000000 }, + { 0x00800401, 0x41c00236, 0x00d28060, 0x00000000 }, + { 0x00800801, 0x41c10236, 0x00d280e0, 0x00000000 }, + { 0x0000040c, 0x20443ca5, 0x00000044, 0x00010001 }, + { 0x00000801, 0x20480061, 0x00000000, 0x0007000f }, + { 0x0a600031, 0x21601c21, 0x508d0040, 0x0a18a001 }, + { 0x00000001, 0x21400021, 0x00000140, 0x00000000 }, + { 0x00000001, 0x21600021, 0x00000160, 0x00000000 }, + { 0x01600031, 0x20001c20, 0x708d0000, 0x82000010 }, + { 0x00600001, 0x20400021, 0x008d0000, 0x00000000 }, + { 0x00000005, 0x20203e2d, 0x00000061, 0x001f001f }, + { 0x00200009, 0x20643e2d, 0x00450064, 0x00040004 }, + { 0x00000001, 0x203a01ed, 0x00000000, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000020, 0x00160016 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000001e }, + { 0x01200010, 0x20003e2c, 0x0200006c, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000024 }, + { 0x00800009, 0x25403dad, 0x00050064, 0x00020002 }, + { 0x00000001, 0x203a01ed, 0x00000000, 0x00180018 }, + { 0x00200040, 0x45483dad, 0x00660548, 0x00100010 }, + { 0x00200040, 0x45523dad, 0x00660552, 0x00100010 }, + { 0x00400040, 0x25583dad, 0x00690558, 0x00100010 }, + { 0x00800040, 0x208035ad, 0x00b10080, 0x00b10540 }, + { 0x00600040, 0x45403dad, 0x00ae0540, 0x00200020 }, + { 0x00800040, 0x20a035ad, 0x00b100a0, 0x00b10540 }, + { 0x00600040, 0x45423dad, 0x00ae0542, 0x00200020 }, + { 0x00800040, 0x20e035ad, 0x00b100e0, 0x00b10540 }, + { 0x00600040, 0x45403dad, 0x00ae0540, 0xffe0ffe0 }, + { 0x00800040, 0x20c035ad, 0x00b100c0, 0x00b10540 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000014 }, + { 0x06600010, 0x20003dac, 0x02000020, 0x00030003 }, + { 0x00000001, 0x206c0171, 0x00000000, 0x00000000 }, + { 0x00610001, 0x208000a5, 0x02050080, 0x00000000 }, + { 0x00610001, 0x212000a5, 0x02090100, 0x00000000 }, + { 0x00410001, 0x211000a5, 0x02690100, 0x00000000 }, + { 0x00200009, 0x25403dad, 0x00450064, 0x00020002 }, + { 0x00800040, 0x208035ad, 0x00b10080, 0x00050540 }, + { 0x00200040, 0x40883dad, 0x00660088, 0x00200020 }, + { 0x00200040, 0x40923dad, 0x00660092, 0x00200020 }, + { 0x00400040, 0x20983dad, 0x00690098, 0x00200020 }, + { 0x00200401, 0x22080060, 0x00000000, 0x03400140 }, + { 0x00000c01, 0x220c0060, 0x00000000, 0x04400080 }, + { 0x00000801, 0x22040060, 0x00000000, 0x01000070 }, + { 0x00000005, 0x203e2e29, 0x00000063, 0x00010001 }, + { 0x00000001, 0x20200169, 0x00000000, 0x00000000 }, + { 0x0000000c, 0x2458262d, 0x0000006d, 0x00000020 }, + { 0x00000001, 0x210e0169, 0x00000000, 0x00010001 }, + { 0x00000005, 0x24583dad, 0x00000458, 0x00030003 }, + { 0x01000010, 0x200035ac, 0x0000010e, 0x00000458 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000316 }, + { 0x01000010, 0x20003dac, 0x0200010e, 0x00010001 }, + { 0x00010401, 0x24540061, 0x02000000, 0x06c00640 }, + { 0x00010805, 0x245a3e2d, 0x02008800, 0x007f007f }, + { 0x00110401, 0x24540061, 0x02000000, 0x04800780 }, + { 0x00110805, 0x245a3e2d, 0x02008804, 0x007f007f }, + { 0x00010005, 0x245c3e2d, 0x02008800, 0x00800080 }, + { 0x00110005, 0x245c3e2d, 0x02008804, 0x00800080 }, + { 0x00000009, 0x245c3dad, 0x0000045c, 0x00010001 }, + { 0x0000000c, 0x211e362d, 0x0000006c, 0x00000020 }, + { 0x00000040, 0x240035ac, 0x0000003e, 0x0000045c }, + { 0x01000010, 0x20003d8c, 0x00210400, 0x00010001 }, + { 0x01000010, 0x20003d8c, 0x02210400, 0x01000100 }, + { 0x00000001, 0x203c01ed, 0x00000000, 0x00000000 }, + { 0x00010001, 0x203c01ed, 0x00000000, 0x00020002 }, + { 0x00010001, 0x203c01ed, 0x02000000, 0xfffefffe }, + { 0x00000040, 0x20780d21, 0x0000045a, 0x0208e602 }, + { 0x00000040, 0x20782421, 0x00000078, 0x0000045c }, + { 0x02000005, 0x20003dac, 0x0200011e, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000001c0 }, + { 0x01000005, 0x20003dac, 0x00009800, 0x00030003 }, + { 0x00200005, 0x24443dad, 0x00459800, 0x00030003 }, + { 0x0020000c, 0x24403dad, 0x00459800, 0x00020002 }, + { 0x01600006, 0x20003dac, 0x02000446, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000012 }, + { 0x00010040, 0x22000c20, 0x02000078, 0x00400000 }, + { 0x00110040, 0x22000c20, 0x02000078, 0x00700000 }, + { 0x00310040, 0x20401da5, 0x02450440, 0xfffffffe }, + { 0x00110001, 0x20480061, 0x02000000, 0x000c000c }, + { 0x00010040, 0x20401da5, 0x02000440, 0xfffffffe }, + { 0x00010001, 0x204401a5, 0x02000442, 0x00000000 }, + { 0x00010001, 0x20480061, 0x02000000, 0x0007000c }, + { 0x01600031, 0x25600021, 0x408d0040, 0x00000200 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00010040, 0x22000c20, 0x02000078, 0x00200000 }, + { 0x00110040, 0x22000c20, 0x02000078, 0x00400000 }, + { 0x00200001, 0x204001a5, 0x00450440, 0x00000000 }, + { 0x00110040, 0x20441da5, 0x02000442, 0xfffffffe }, + { 0x00110001, 0x20480061, 0x02000000, 0x000c0007 }, + { 0x00010001, 0x20480061, 0x02000000, 0x00070007 }, + { 0x01600031, 0x25600021, 0x408d0040, 0x00000200 }, + { 0x00000040, 0xb80235ad, 0x00009802, 0x0000003c }, + { 0x0020040c, 0x24403dad, 0x00459800, 0x00030003 }, + { 0x00200805, 0x24483dad, 0x00459800, 0x00070007 }, + { 0x01600006, 0x20003dac, 0x0000044a, 0x00000000 }, + { 0x00200001, 0x204001a5, 0x00450440, 0x00000000 }, + { 0x00000009, 0x20403ca5, 0x00000040, 0x00010001 }, + { 0x00010040, 0x22000c20, 0x00000078, 0x00200010 }, + { 0x00110040, 0x22000c20, 0x00000078, 0x00300010 }, + { 0x00010001, 0x20480061, 0x00000000, 0x00030009 }, + { 0x00110001, 0x20480061, 0x00000000, 0x00040009 }, + { 0x02600031, 0x27000021, 0x408d0040, 0x00000200 }, + { 0x01000005, 0x20003dac, 0x00009800, 0x00030003 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000001a }, + { 0x00600001, 0x26220231, 0x008d05c0, 0x00000000 }, + { 0x00600401, 0x26120231, 0x008d05b8, 0x00000000 }, + { 0x00600801, 0x26020231, 0x008d05b0, 0x00000000 }, + { 0x00600401, 0x25f20231, 0x008d05a8, 0x00000000 }, + { 0x00600801, 0x25e20231, 0x008d05a0, 0x00000000 }, + { 0x00600401, 0x25d20231, 0x008d0598, 0x00000000 }, + { 0x00600801, 0x25c20231, 0x008d0590, 0x00000000 }, + { 0x00600401, 0x25b20231, 0x008d0588, 0x00000000 }, + { 0x00600801, 0x25a20231, 0x008d0580, 0x00000000 }, + { 0x00600401, 0x25920231, 0x008d0578, 0x00000000 }, + { 0x00600801, 0x25820231, 0x008d0570, 0x00000000 }, + { 0x00600001, 0x25720231, 0x008d0568, 0x00000000 }, + { 0x00600001, 0x25620231, 0x008d0560, 0x00000000 }, + { 0x00110001, 0x220001ec, 0x02000000, 0x05820582 }, + { 0x00010001, 0x220001ec, 0x02000000, 0x05620562 }, + { 0x00000001, 0x220e0128, 0x00000454, 0x00000000 }, + { 0x01800006, 0x200035ac, 0x02000446, 0x00000444 }, + { 0x00810001, 0xbc000229, 0x02ad8000, 0x00000000 }, + { 0x00810001, 0xbc200229, 0x02ad8020, 0x00000000 }, + { 0x00810001, 0xbc400229, 0x02ad8040, 0x00000000 }, + { 0x00810001, 0xbc600229, 0x02ad8060, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000012a }, + { 0x00600001, 0x2024018d, 0x008d0200, 0x00000000 }, + { 0x01000041, 0x245e35ad, 0x00000446, 0x00000444 }, + { 0x00000040, 0x22022d08, 0x00000200, 0x00100010 }, + { 0x02000005, 0x20003db0, 0x0200045e, 0x00010001 }, + { 0x00200040, 0x22042d08, 0x00450200, 0x00200020 }, + { 0x00400001, 0x244c0109, 0x00690200, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000066 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000064 }, + { 0x00000040, 0x22003d08, 0x00000200, 0xffdeffde }, + { 0x00000440, 0x22023d08, 0x00000202, 0xffeeffee }, + { 0x00000801, 0x220c0060, 0x00000000, 0x04a00480 }, + { 0x01000010, 0x20003db0, 0x0000045e, 0x00040004 }, + { 0x00a02040, 0x2400462c, 0x00ad8000, 0x00ad8005 }, + { 0x00a02048, 0x24003e2c, 0x00ad8001, 0xfffbfffb }, + { 0x00a02048, 0x24003e2c, 0x00ad8002, 0x00140014 }, + { 0x00a02048, 0x24003e2c, 0x00ad8003, 0x00140014 }, + { 0x00a02048, 0xb8003e2d, 0x00ad8004, 0xfffbfffb }, + { 0x00a02040, 0x2400462c, 0x00ad8040, 0x00ad8045 }, + { 0x00a02048, 0x24003e2c, 0x00ad8041, 0xfffbfffb }, + { 0x00a02048, 0x24003e2c, 0x00ad8042, 0x00140014 }, + { 0x00a02048, 0x24003e2c, 0x00ad8043, 0x00140014 }, + { 0x00a02048, 0xb8403e2d, 0x00ad8044, 0xfffbfffb }, + { 0x00a02040, 0x2400462c, 0x00ad8080, 0x00ad8085 }, + { 0x00a02048, 0x24003e2c, 0x00ad8081, 0xfffbfffb }, + { 0x00a02048, 0x24003e2c, 0x00ad8082, 0x00140014 }, + { 0x00a02048, 0x24003e2c, 0x00ad8083, 0x00140014 }, + { 0x00a02048, 0xb8803e2d, 0x00ad8084, 0xfffbfffb }, + { 0x00600040, 0x2400462c, 0x008d80c0, 0x008d80c5 }, + { 0x00600048, 0x24003e2c, 0x008d80c1, 0xfffbfffb }, + { 0x00600048, 0x24003e2c, 0x008d80c2, 0x00140014 }, + { 0x00600048, 0x24003e2c, 0x008d80c3, 0x00140014 }, + { 0x00600048, 0xb8c03e2d, 0x008d80c4, 0xfffbfffb }, + { 0x00000401, 0x22000060, 0x00000000, 0x04a00480 }, + { 0x00000c01, 0x22040060, 0x00000000, 0x04a00490 }, + { 0x00010802, 0x220c2d28, 0x00000454, 0x04800480 }, + { 0x00a02040, 0x24003dac, 0x00b18000, 0x02000200 }, + { 0x00800048, 0x24003dac, 0x01ed8800, 0xfffbfffb }, + { 0x00800048, 0x24203dac, 0x01ed8820, 0xfffbfffb }, + { 0x00a02048, 0x24003dac, 0x00b18020, 0x00140014 }, + { 0x00800048, 0x24003dac, 0x01ed8820, 0x00140014 }, + { 0x00800048, 0x24203dac, 0x01ed8840, 0x00140014 }, + { 0x00a02048, 0x24003dac, 0x00b18040, 0xfffbfffb }, + { 0x00800048, 0x24003dac, 0x01ed8840, 0x00010001 }, + { 0x00800048, 0x24203dac, 0x01ed8860, 0x00010001 }, + { 0x8080000c, 0xd8003d91, 0x00b10400, 0x000a000a }, + { 0x8080100c, 0xd8203d91, 0x00b10420, 0x000a000a }, + { 0x00a02040, 0x24003dac, 0x00b18040, 0x02000200 }, + { 0x00800048, 0x24003dac, 0x01ed8840, 0xfffbfffb }, + { 0x00800048, 0x24203dac, 0x01ed8860, 0xfffbfffb }, + { 0x00a02048, 0x24003dac, 0x00b18060, 0x00140014 }, + { 0x00800048, 0x24003dac, 0x01ed8860, 0x00140014 }, + { 0x00800048, 0x24203dac, 0x01ed8880, 0x00140014 }, + { 0x00a02048, 0x24003dac, 0x00b18080, 0xfffbfffb }, + { 0x00800048, 0x24003dac, 0x01ed8880, 0x00010001 }, + { 0x00800048, 0x24203dac, 0x01ed88a0, 0x00010001 }, + { 0x8080000c, 0xd8403d91, 0x00b10400, 0x000a000a }, + { 0x8080100c, 0xd8603d91, 0x00b10420, 0x000a000a }, + { 0x00010220, 0x34001c00, 0x00001400, 0x000000b4 }, + { 0x01000010, 0x20003db0, 0x00000444, 0x00000000 }, + { 0x01000010, 0x20003db0, 0x02000446, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000004c }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000004a }, + { 0x00400040, 0x22003d28, 0x0069044c, 0xfffefffe }, + { 0x03400010, 0x20003dac, 0x00000446, 0x00020002 }, + { 0x01000010, 0x20003db0, 0x02000444, 0x00020002 }, + { 0x00410040, 0x22002d08, 0x00690200, 0x00100010 }, + { 0x01000010, 0x20003dac, 0x00000446, 0x00000000 }, + { 0x00010002, 0x220c2d28, 0x02000454, 0x04800480 }, + { 0x00800040, 0x24003e2c, 0x01ed8000, 0x00100010 }, + { 0x00800040, 0x24203e2c, 0x01ed8020, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01ed8001, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8021, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8002, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8022, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8003, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8023, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8004, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8024, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8005, 0x00010001 }, + { 0x00800048, 0x24203e2c, 0x01ed8025, 0x00010001 }, + { 0x8080000c, 0xd8003d91, 0x00b10400, 0x00050005 }, + { 0x8080100c, 0xd8203d91, 0x00b10420, 0x00050005 }, + { 0x00800040, 0x24003e2c, 0x01ed8040, 0x00100010 }, + { 0x00800040, 0x24203e2c, 0x01ed8060, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01ed8041, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8061, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8042, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8062, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8043, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8063, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8044, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8064, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8045, 0x00010001 }, + { 0x00800048, 0x24203e2c, 0x01ed8065, 0x00010001 }, + { 0x8080000c, 0xd8403d91, 0x00b10400, 0x00050005 }, + { 0x8080100c, 0xd8603d91, 0x00b10420, 0x00050005 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000004 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000005c }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000062 }, + { 0x01000010, 0x20003db0, 0x00000446, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000042 }, + { 0x00200401, 0x22000128, 0x0066044c, 0x00000000 }, + { 0x00200c01, 0x22040128, 0x0045044e, 0x00000000 }, + { 0x00000801, 0x220c0128, 0x00000454, 0x00000000 }, + { 0x03400010, 0x20003dac, 0x02000444, 0x00020002 }, + { 0x01000010, 0x20003dac, 0x00000444, 0x00000000 }, + { 0x00410040, 0x22002d08, 0x02690200, 0x00010001 }, + { 0x01000010, 0x20003db0, 0x02000446, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000002 }, + { 0x00110001, 0x220c0168, 0x02000000, 0x04800480 }, + { 0x00a02040, 0x24003e2c, 0x00ad83e0, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01ed8be0, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8800, 0xfffbfffb }, + { 0x00a02048, 0x24003e2c, 0x00ad8000, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8800, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8820, 0x00140014 }, + { 0x00a02048, 0x24003e2c, 0x00ad8020, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8820, 0x00010001 }, + { 0x00800048, 0x24203e2c, 0x01ed8840, 0x00010001 }, + { 0x8080000c, 0xd8003d91, 0x00b10400, 0x00050005 }, + { 0x8080100c, 0xd8203d91, 0x00b10420, 0x00050005 }, + { 0x00a02040, 0x24003e2c, 0x00ad8020, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01ed8820, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8840, 0xfffbfffb }, + { 0x00a02048, 0x24003e2c, 0x00ad8040, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8840, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8860, 0x00140014 }, + { 0x00a02048, 0x24003e2c, 0x00ad8060, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8860, 0x00010001 }, + { 0x00800048, 0x24203e2c, 0x01ed8880, 0x00010001 }, + { 0x8080000c, 0xd8403d91, 0x00b10400, 0x00050005 }, + { 0x8080100c, 0xd8603d91, 0x00b10420, 0x00050005 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001c }, + { 0x00200401, 0x22000128, 0x0045044c, 0x00000000 }, + { 0x00000801, 0x220c0128, 0x00000454, 0x00000000 }, + { 0x01200010, 0x20003dac, 0x00000444, 0x00030003 }, + { 0x01200010, 0x20003dac, 0x02000446, 0x00030003 }, + { 0x00210040, 0x22002d08, 0x00450200, 0x00010001 }, + { 0x00210040, 0x22002d08, 0x02450200, 0x00100010 }, + { 0x00800001, 0xb8000229, 0x01ed8000, 0x00000000 }, + { 0x00800001, 0xb8200229, 0x01ed8020, 0x00000000 }, + { 0x00800001, 0xb8400229, 0x01ed8040, 0x00000000 }, + { 0x00800001, 0xb8600229, 0x01ed8060, 0x00000000 }, + { 0x80800042, 0xd8004631, 0x00d29800, 0x00d20480 }, + { 0x80800042, 0xd8204631, 0x00d29820, 0x00d204a0 }, + { 0x80800042, 0xd8404631, 0x00d29840, 0x00d204c0 }, + { 0x80800042, 0xd8604631, 0x00d29860, 0x00d204e0 }, + { 0x00600001, 0x220001ac, 0x008d0024, 0x00000000 }, + { 0x00200040, 0x244c3dad, 0x00450448, 0xfff8fff8 }, + { 0x00000401, 0x220001ec, 0x00000000, 0x07000700 }, + { 0x00000c01, 0x220201e8, 0x00000000, 0x07100710 }, + { 0x00000801, 0x220e0128, 0x00000456, 0x00000000 }, + { 0x00000441, 0x254635ad, 0x00000448, 0x0000044a }, + { 0x00000c41, 0x254025ad, 0x0000444c, 0x0000444e }, + { 0x00000c41, 0x254225ad, 0x00000448, 0x0000444e }, + { 0x00000841, 0x254435ad, 0x0000444c, 0x0000044a }, + { 0x00200040, 0x244c3d09, 0x00450200, 0x00100010 }, + { 0x00800041, 0x24002628, 0x00ad8000, 0x00000540 }, + { 0x00800041, 0x24202628, 0x00ad8020, 0x00000540 }, + { 0x00800048, 0x24002628, 0x00ad8002, 0x00000542 }, + { 0x00800048, 0x24202628, 0x00ad8022, 0x00000542 }, + { 0x00200001, 0x22000128, 0x0045044c, 0x00000000 }, + { 0x00800048, 0x24002628, 0x01ed8000, 0x00000544 }, + { 0x00800048, 0x24202628, 0x01ed8020, 0x00000544 }, + { 0x00800048, 0xbc002629, 0x01ed8002, 0x00000546 }, + { 0x00801048, 0xbc202629, 0x01ed8022, 0x00000546 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000128 }, + { 0x00000001, 0x20220169, 0x00000000, 0x00040004 }, + { 0x00200005, 0x24443dad, 0x00459800, 0x00030003 }, + { 0x0020000c, 0x24403dad, 0x00459800, 0x00020002 }, + { 0x01600006, 0x20003dac, 0x02000446, 0x00000000 }, + { 0x00010040, 0x22000c20, 0x02000078, 0x00200000 }, + { 0x00110040, 0x22000c20, 0x02000078, 0x00500000 }, + { 0x00310040, 0x20401da5, 0x02450440, 0xfffffffe }, + { 0x00110001, 0x20480061, 0x02000000, 0x00080008 }, + { 0x00010040, 0x20401da5, 0x02000440, 0xfffffffe }, + { 0x00010001, 0x204401a5, 0x02000442, 0x00000000 }, + { 0x00010001, 0x20480061, 0x02000000, 0x00030008 }, + { 0x01600031, 0x25600021, 0x408d0040, 0x00000200 }, + { 0x00000040, 0xb80235ad, 0x00009802, 0x0000003c }, + { 0x00000040, 0x22000c20, 0x00000078, 0x00100010 }, + { 0x0020040c, 0x24403dad, 0x00459800, 0x00030003 }, + { 0x00200805, 0x24483dad, 0x00459800, 0x00070007 }, + { 0x00200001, 0x204001a5, 0x00450440, 0x00000000 }, + { 0x00000009, 0x20403ca5, 0x00000040, 0x00010001 }, + { 0x00000001, 0x20480061, 0x00000000, 0x00020005 }, + { 0x02600031, 0x27000021, 0x408d0040, 0x00000200 }, + { 0x00110001, 0x220001ec, 0x02000000, 0x05820582 }, + { 0x00010001, 0x220001ec, 0x02000000, 0x05620562 }, + { 0x00000001, 0x220e0128, 0x00000454, 0x00000000 }, + { 0x01800006, 0x200035ac, 0x02000446, 0x00000444 }, + { 0x00410001, 0xbc000229, 0x02698000, 0x00000000 }, + { 0x00410001, 0xbc100229, 0x02698010, 0x00000000 }, + { 0x00410001, 0xbc200229, 0x02698020, 0x00000000 }, + { 0x00410001, 0xbc300229, 0x02698030, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000be }, + { 0x00600001, 0x2024018d, 0x008d0200, 0x00000000 }, + { 0x01000041, 0x245e35ad, 0x00000446, 0x00000444 }, + { 0x02000005, 0x20003db0, 0x0200045e, 0x00010001 }, + { 0x00000040, 0x22022d08, 0x00000200, 0x00100010 }, + { 0x00200040, 0x22042d08, 0x00450200, 0x00200020 }, + { 0x00400001, 0x244c0109, 0x00690200, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000044 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000042 }, + { 0x00000040, 0x22003d08, 0x00000200, 0xffdeffde }, + { 0x00000440, 0x22023d08, 0x00000202, 0xffeeffee }, + { 0x00000801, 0x220c0060, 0x00000000, 0x04d004c0 }, + { 0x01000010, 0x20003db0, 0x0000045e, 0x00040004 }, + { 0x00802040, 0x2400462c, 0x00a98000, 0x00a98005 }, + { 0x00802048, 0x24003e2c, 0x00a98001, 0xfffbfffb }, + { 0x00802048, 0x24003e2c, 0x00a98002, 0x00140014 }, + { 0x00802048, 0x24003e2c, 0x00a98003, 0x00140014 }, + { 0x00802048, 0xb8003e2d, 0x00a98004, 0xfffbfffb }, + { 0x00802040, 0x2400462c, 0x00a98040, 0x00a98045 }, + { 0x00802048, 0x24003e2c, 0x00a98041, 0xfffbfffb }, + { 0x00802048, 0x24003e2c, 0x00a98042, 0x00140014 }, + { 0x00802048, 0x24003e2c, 0x00a98043, 0x00140014 }, + { 0x00802048, 0xb8203e2d, 0x00a98044, 0xfffbfffb }, + { 0x00400040, 0x2400462c, 0x00698080, 0x00698085 }, + { 0x00400048, 0x24003e2c, 0x00698081, 0xfffbfffb }, + { 0x00400048, 0x24003e2c, 0x00698082, 0x00140014 }, + { 0x00400048, 0x24003e2c, 0x00698083, 0x00140014 }, + { 0x00400048, 0xb8403e2d, 0x00698084, 0xfffbfffb }, + { 0x00000401, 0x220c0060, 0x00000000, 0x04e004d0 }, + { 0x00000c01, 0x22000060, 0x00000000, 0x04d004c8 }, + { 0x00000c01, 0x22040060, 0x00000000, 0x04e004d8 }, + { 0x00000801, 0x22080060, 0x00000000, 0x04f004e8 }, + { 0x00800040, 0x24003dac, 0x00b104c0, 0x02000200 }, + { 0x00800048, 0x24003dac, 0x00b104e0, 0xfffbfffb }, + { 0x00800048, 0x24003dac, 0x01ed9800, 0x00140014 }, + { 0x00010001, 0x220c0168, 0x00000000, 0x05400540 }, + { 0x00110001, 0x220c0168, 0x00000000, 0x04c004c0 }, + { 0x00800048, 0x24003dac, 0x01e98000, 0xfffbfffb }, + { 0x00800048, 0x24003dac, 0x01e98020, 0x00010001 }, + { 0x00800048, 0x24003dac, 0x01e98800, 0x00140014 }, + { 0x8080000c, 0xd8003d91, 0x00b10400, 0x000a000a }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000060 }, + { 0x01000010, 0x20003db0, 0x00000444, 0x00000000 }, + { 0x01000010, 0x20003db0, 0x02000446, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000022 }, + { 0x00400040, 0x22003d28, 0x0069044c, 0xfffefffe }, + { 0x03400010, 0x20003dac, 0x00000446, 0x00020002 }, + { 0x01000010, 0x20003db0, 0x02000444, 0x00020002 }, + { 0x00410040, 0x22002d08, 0x00690200, 0x00100010 }, + { 0x01000010, 0x20003dac, 0x00000446, 0x00000000 }, + { 0x00010001, 0x220e0168, 0x02000000, 0x05400540 }, + { 0x00110001, 0x220e0168, 0x02000000, 0x04c004c0 }, + { 0x00800040, 0x24003e2c, 0x01e98000, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01e98001, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01e98002, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01e98003, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01e98004, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01e98005, 0x00010001 }, + { 0x8080000c, 0xdc003d91, 0x00b10400, 0x00050005 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000004 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000036 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000036 }, + { 0x01000010, 0x20003db0, 0x00000446, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x03600010, 0x20003dac, 0x02000444, 0x00020002 }, + { 0x00400401, 0x22000128, 0x0069044c, 0x00000000 }, + { 0x00400840, 0x22083d2c, 0x0069044c, 0x00100010 }, + { 0x00610040, 0x22002d08, 0x02690200, 0x00010001 }, + { 0x01000010, 0x20003dac, 0x00000444, 0x00000000 }, + { 0x01000010, 0x20003db0, 0x02000446, 0x00020002 }, + { 0x00800040, 0x24003e2c, 0x01e983e0, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01e98000, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01e98020, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01e993e0, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01e99000, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01e99020, 0x00010001 }, + { 0x00000001, 0x220e0168, 0x00000000, 0x05400540 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000002 }, + { 0x00110001, 0x220e0168, 0x02000000, 0x04c004c0 }, + { 0x8080000c, 0xdc003d91, 0x00b10400, 0x00050005 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000e }, + { 0x00400001, 0x22000128, 0x0069044c, 0x00000000 }, + { 0x01400010, 0x20003dac, 0x00000444, 0x00030003 }, + { 0x01400010, 0x20003dac, 0x02000446, 0x00030003 }, + { 0x00410040, 0x22002d08, 0x00690200, 0x00010001 }, + { 0x00410040, 0x22002d08, 0x02690200, 0x00100010 }, + { 0x00800001, 0x25400229, 0x01e98000, 0x00000000 }, + { 0x80800042, 0x45404631, 0x00d20540, 0x00d204c0 }, + { 0x00000001, 0x220c0128, 0x00000454, 0x00000000 }, + { 0x00400001, 0xd8000231, 0x008a0540, 0x00000000 }, + { 0x00400001, 0xd8100231, 0x008a0548, 0x00000000 }, + { 0x00400001, 0xd8200231, 0x008a0550, 0x00000000 }, + { 0x00400001, 0xd8300231, 0x008a0558, 0x00000000 }, + { 0x00600001, 0x220001ac, 0x008d0024, 0x00000000 }, + { 0x00200040, 0x244c3dad, 0x00450448, 0xfff8fff8 }, + { 0x00000401, 0x220001ec, 0x00000000, 0x07000700 }, + { 0x00000801, 0x220e0128, 0x00000456, 0x00000000 }, + { 0x00000441, 0x254635ad, 0x00000448, 0x0000044a }, + { 0x00000c41, 0x254025ad, 0x0000444c, 0x0000444e }, + { 0x00000c41, 0x254225ad, 0x00000448, 0x0000444e }, + { 0x00000841, 0x254435ad, 0x0000444c, 0x0000044a }, + { 0x00600041, 0x24002628, 0x00898000, 0x00000540 }, + { 0x00600048, 0x24002628, 0x00898002, 0x00000542 }, + { 0x00600048, 0x24002628, 0x00898008, 0x00000544 }, + { 0x00600048, 0x2540262d, 0x0089800a, 0x00000546 }, + { 0x00400401, 0xbc0001a9, 0x00690540, 0x00000000 }, + { 0x00400801, 0xbc1001a9, 0x00690548, 0x00000000 }, + { 0x01000010, 0x20003d2c, 0x00000022, 0x00030003 }, + { 0x01000040, 0x20223d29, 0x02000022, 0xffffffff }, + { 0x00000040, 0x220c3d8c, 0x0000020c, 0x00080008 }, + { 0x00110040, 0x24540c21, 0x00000454, 0x00080008 }, + { 0x00010040, 0x24540c21, 0x00000454, 0x00180038 }, + { 0x00110220, 0x34001c00, 0x02001400, 0xfffffee4 }, + { 0x01800010, 0x20003dac, 0x0200010e, 0x00010001 }, + { 0x00000040, 0x220c3d8c, 0x0000020c, 0xffe0ffe0 }, + { 0x00010001, 0x24540061, 0x02000000, 0x06c00640 }, + { 0x00110001, 0x24540061, 0x02000000, 0x04800780 }, + { 0x00000001, 0x220e0128, 0x00000456, 0x00000000 }, + { 0x00800040, 0x24003dac, 0x00b19c00, 0x00200020 }, + { 0x00800040, 0x24203dac, 0x00b19c20, 0x00200020 }, + { 0x8080000c, 0xdc003d91, 0x00b10400, 0x00060006 }, + { 0x8080000c, 0xdc203d91, 0x00b10420, 0x00060006 }, + { 0x02000040, 0x210e3d29, 0x0200010e, 0xffffffff }, + { 0x00000040, 0x220c3d8c, 0x0000020c, 0x00040004 }, + { 0x00110220, 0x34001c00, 0x02001400, 0xfffffce0 }, + { 0x01000005, 0x25643e2d, 0x00000060, 0x00c000c0 }, + { 0x01000010, 0x20003dac, 0x02000458, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000c }, + { 0x01000010, 0x20003dac, 0x00000458, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000086 }, + { 0x00a02001, 0x46400231, 0x00d20780, 0x00000000 }, + { 0x00a02001, 0x46800231, 0x00d207c0, 0x00000000 }, + { 0x00a02001, 0x46c00231, 0x00d20480, 0x00000000 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000007e }, + { 0x80a02042, 0x46404631, 0x00d20640, 0x00d20780 }, + { 0x80a02042, 0x46804631, 0x00d20680, 0x00d207c0 }, + { 0x80a02042, 0x46c04631, 0x00d206c0, 0x00d20480 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000076 }, + { 0x01000010, 0x20003dac, 0x02000564, 0x00800080 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x0000000e }, + { 0x01000010, 0x20003dac, 0x00000458, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0xffffffe4 }, + { 0x00200401, 0x256801ed, 0x00000000, 0x00200020 }, + { 0x00200801, 0x256c01ed, 0x00000000, 0x00060006 }, + { 0x00400001, 0x258001ed, 0x00000000, 0x00000000 }, + { 0x00600001, 0x45a001ad, 0x00058c00, 0x00000000 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000028 }, + { 0x02600005, 0x20006e28, 0x02008c0c, 0x88848421 }, + { 0x0220000c, 0x25663dad, 0x00000458, 0x00010001 }, + { 0x0000000c, 0x25643dad, 0x00000564, 0x00060006 }, + { 0x00310001, 0x25c401ad, 0x00000458, 0x00000000 }, + { 0x00210001, 0x25c00061, 0x00000000, 0x00010001 }, + { 0x00310040, 0x25c03dad, 0x004545c4, 0x00010001 }, + { 0x00610001, 0x25a00061, 0x02000000, 0x00000080 }, + { 0x00710001, 0x45a002ad, 0x02ae8c00, 0x00000000 }, + { 0x00710001, 0x45a202ad, 0x02ae8c01, 0x00000000 }, + { 0x00800041, 0x25a035ad, 0x00b105a0, 0x000905c0 }, + { 0x01200010, 0x20003e2c, 0x0245006e, 0x00000000 }, + { 0x00310009, 0x244c45ad, 0x02000564, 0x0045006e }, + { 0x00210001, 0x244c01ed, 0x02000000, 0x00000000 }, + { 0x0031000c, 0x244c3dad, 0x0245044c, 0x00010001 }, + { 0x00200009, 0x256835ad, 0x0045044c, 0x00000566 }, + { 0x00210040, 0x256835ad, 0x02450568, 0x00000566 }, + { 0x00200040, 0x256c362d, 0x0045006e, 0x00000566 }, + { 0x00400040, 0x240035ac, 0x00ab05a2, 0x00ab05a6 }, + { 0x00400040, 0x2400358c, 0x00690400, 0x00000566 }, + { 0x0040000c, 0x2580358d, 0x00690400, 0x00000566 }, + { 0x00800041, 0x2400362c, 0x00d20640, 0x000005a0 }, + { 0x00800041, 0x2420362c, 0x00d20660, 0x000005a0 }, + { 0x00800048, 0x2400362c, 0x00d20780, 0x000005a4 }, + { 0x00800048, 0x2420362c, 0x00d207a0, 0x000005a4 }, + { 0x00800040, 0x2400358c, 0x00b10400, 0x00000568 }, + { 0x00800040, 0x2420358c, 0x00b10420, 0x00000568 }, + { 0x0080000c, 0x24c0358d, 0x00b10400, 0x0000056c }, + { 0x0080000c, 0x24e0358d, 0x00b10420, 0x0000056c }, + { 0x80800040, 0x464035b1, 0x00b104c0, 0x00000580 }, + { 0x80800040, 0x466035b1, 0x00b104e0, 0x00000580 }, + { 0x00800041, 0x2400362c, 0x00d20680, 0x000005a0 }, + { 0x00800041, 0x2420362c, 0x00d206a0, 0x000005a0 }, + { 0x00800048, 0x2400362c, 0x00d207c0, 0x000005a4 }, + { 0x00800048, 0x2420362c, 0x00d207e0, 0x000005a4 }, + { 0x00800040, 0x2400358c, 0x00b10400, 0x00000568 }, + { 0x00800040, 0x2420358c, 0x00b10420, 0x00000568 }, + { 0x0080000c, 0x24c0358d, 0x00b10400, 0x0000056c }, + { 0x0080000c, 0x24e0358d, 0x00b10420, 0x0000056c }, + { 0x80800040, 0x468035b1, 0x00b104c0, 0x00000580 }, + { 0x80800040, 0x46a035b1, 0x00b104e0, 0x00000580 }, + { 0x00800041, 0x2400362c, 0x00d206c0, 0x000705a8 }, + { 0x00800041, 0x2420362c, 0x00d206e0, 0x000705a8 }, + { 0x00800048, 0x2400362c, 0x00d20480, 0x000705ac }, + { 0x00800048, 0x2420362c, 0x00d204a0, 0x000705ac }, + { 0x00800040, 0x2400358c, 0x00b10400, 0x0000056a }, + { 0x00800040, 0x2420358c, 0x00b10420, 0x0000056a }, + { 0x0080000c, 0x24c0358d, 0x00b10400, 0x0000056e }, + { 0x0080000c, 0x24e0358d, 0x00b10420, 0x0000056e }, + { 0x80800040, 0x46c035b1, 0x00b104c0, 0x00050582 }, + { 0x80800040, 0x46e035b1, 0x00b104e0, 0x00050582 }, + { 0x01800005, 0x20003d2c, 0x02000020, 0x00020002 }, + { 0x80800040, 0xd00045b1, 0x00b19000, 0x00d20640 }, + { 0x80800040, 0xd02045b1, 0x00b19020, 0x00d20660 }, + { 0x80800040, 0xd04045b1, 0x00b19040, 0x00d20680 }, + { 0x80800040, 0xd06045b1, 0x00b19060, 0x00d206a0 }, + { 0x00000040, 0x22083d8c, 0x00000208, 0x00800080 }, + { 0x80400040, 0xd40045b1, 0x00699400, 0x00ab06c0 }, + { 0x80400040, 0xd48045b1, 0x00699480, 0x00ab06c2 }, + { 0x80400040, 0xd42045b1, 0x00699420, 0x00ab06e0 }, + { 0x80400040, 0xd4a045b1, 0x006994a0, 0x00ab06e2 }, + { 0x80400040, 0xd41045b1, 0x00699410, 0x00ab06d0 }, + { 0x80400040, 0xd49045b1, 0x00699490, 0x00ab06d2 }, + { 0x80400040, 0xd43045b1, 0x00699430, 0x00ab06f0 }, + { 0x80400040, 0xd4b045b1, 0x006994b0, 0x00ab06f2 }, + { 0x00000040, 0x220a3d8c, 0x0000020a, 0x00080008 }, + { 0x00110040, 0x220a3d8c, 0x0200020a, 0x00300030 }, + { 0x01000010, 0x20003d2c, 0x02000020, 0x00060006 }, + { 0x00000040, 0x20203d29, 0x00000020, 0x00020002 }, + { 0x00000040, 0x22040c00, 0x00000204, 0x00100001 }, + { 0x00000040, 0x220c358c, 0x0000020c, 0x0000003a }, + { 0x00110220, 0x34001c00, 0x02001400, 0xfffffc1e }, + { 0x00000001, 0x220001ec, 0x00000000, 0x01400140 }, + { 0x00000001, 0x220201ec, 0x00000000, 0x01c001c0 }, + { 0x00800401, 0x20400236, 0x01ee8000, 0x00000000 }, + { 0x00800801, 0x20500236, 0x01ee8010, 0x00000000 }, + { 0x00800401, 0x20600236, 0x01ee8020, 0x00000000 }, + { 0x00800801, 0x20700236, 0x01ee8030, 0x00000000 }, + { 0x00800401, 0x20800236, 0x01ee8040, 0x00000000 }, + { 0x00800801, 0x20900236, 0x01ee8050, 0x00000000 }, + { 0x00800401, 0x20a00236, 0x01ee8060, 0x00000000 }, + { 0x00800801, 0x20b00236, 0x01ee8070, 0x00000000 }, + { 0x00800401, 0x20c00236, 0x01ee8100, 0x00000000 }, + { 0x00800801, 0x20d00236, 0x01ee8110, 0x00000000 }, + { 0x00800401, 0x20e00236, 0x01ee8120, 0x00000000 }, + { 0x00800801, 0x20f00236, 0x01ee8130, 0x00000000 }, + { 0x00800401, 0x21000236, 0x01ee8140, 0x00000000 }, + { 0x00800801, 0x21100236, 0x01ee8150, 0x00000000 }, + { 0x00800401, 0x21200236, 0x01ee8160, 0x00000000 }, + { 0x00800801, 0x21300236, 0x01ee8170, 0x00000000 }, + { 0x00000040, 0x22000d20, 0x00000062, 0x1218a600 }, + { 0x00200401, 0x204001a5, 0x00450064, 0x00000000 }, + { 0x00000801, 0x20480061, 0x00000000, 0x000f000f }, + { 0x01600031, 0x21400021, 0x508d0040, 0x00000200 }, + { 0x00000001, 0x220001ec, 0x00000000, 0x03400340 }, + { 0x00800401, 0x41600236, 0x00d28000, 0x00000000 }, + { 0x00800801, 0x41610236, 0x00d28080, 0x00000000 }, + { 0x00800401, 0x41800236, 0x00d28020, 0x00000000 }, + { 0x00800801, 0x41810236, 0x00d280a0, 0x00000000 }, + { 0x00800401, 0x41a00236, 0x00d28040, 0x00000000 }, + { 0x00800801, 0x41a10236, 0x00d280c0, 0x00000000 }, + { 0x00800401, 0x41c00236, 0x00d28060, 0x00000000 }, + { 0x00800801, 0x41c10236, 0x00d280e0, 0x00000000 }, + { 0x00000040, 0x22000d20, 0x00000062, 0x0a18a601 }, + { 0x0000040c, 0x20443ca5, 0x00000044, 0x00010001 }, + { 0x00000801, 0x20480061, 0x00000000, 0x0007000f }, + { 0x0a600031, 0x21600021, 0x508d0040, 0x00000200 }, + { 0x00000001, 0x21400021, 0x00000140, 0x00000000 }, + { 0x00000001, 0x21600021, 0x00000160, 0x00000000 }, + { 0x01600031, 0x20001c20, 0x708d0000, 0x82000010 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x20400021, 0x008d0000, 0x00000000 }, + { 0x00000005, 0x20203e2d, 0x00000061, 0x001f001f }, + { 0x00200009, 0x20643e2d, 0x00450064, 0x00040004 }, + { 0x00000001, 0x203a01ed, 0x00000000, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000020, 0x00160016 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000001e }, + { 0x01200010, 0x20003e2c, 0x0200006c, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000024 }, + { 0x00800009, 0x25403dad, 0x00050064, 0x00020002 }, + { 0x00000001, 0x203a01ed, 0x00000000, 0x00180018 }, + { 0x00200040, 0x45483dad, 0x00660548, 0x00100010 }, + { 0x00200040, 0x45523dad, 0x00660552, 0x00100010 }, + { 0x00400040, 0x25583dad, 0x00690558, 0x00100010 }, + { 0x00800040, 0x208035ad, 0x00b10080, 0x00b10540 }, + { 0x00600040, 0x45403dad, 0x00ae0540, 0x00200020 }, + { 0x00800040, 0x20a035ad, 0x00b100a0, 0x00b10540 }, + { 0x00600040, 0x45423dad, 0x00ae0542, 0x00200020 }, + { 0x00800040, 0x20e035ad, 0x00b100e0, 0x00b10540 }, + { 0x00600040, 0x45403dad, 0x00ae0540, 0xffe0ffe0 }, + { 0x00800040, 0x20c035ad, 0x00b100c0, 0x00b10540 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000014 }, + { 0x06600010, 0x20003dac, 0x02000020, 0x00030003 }, + { 0x00000001, 0x206c0171, 0x00000000, 0x00000000 }, + { 0x00610001, 0x208000a5, 0x02050080, 0x00000000 }, + { 0x00610001, 0x212000a5, 0x02090100, 0x00000000 }, + { 0x00410001, 0x211000a5, 0x02690100, 0x00000000 }, + { 0x00200009, 0x25403dad, 0x00450064, 0x00020002 }, + { 0x00800040, 0x208035ad, 0x00b10080, 0x00050540 }, + { 0x00200040, 0x40883dad, 0x00660088, 0x00200020 }, + { 0x00200040, 0x40923dad, 0x00660092, 0x00200020 }, + { 0x00400040, 0x20983dad, 0x00690098, 0x00200020 }, + { 0x00200401, 0x22080060, 0x00000000, 0x03400140 }, + { 0x00000c01, 0x220c0060, 0x00000000, 0x04400080 }, + { 0x00000801, 0x22040060, 0x00000000, 0x01000070 }, + { 0x02000005, 0x20002e28, 0x00000061, 0x00400040 }, + { 0x00010005, 0x203e2e29, 0x00000063, 0x00010001 }, + { 0x00110001, 0x203e0169, 0x00000000, 0x00030003 }, + { 0x00000001, 0x20200169, 0x00000000, 0x00000000 }, + { 0x0000000c, 0x2458262d, 0x0000006d, 0x00000020 }, + { 0x00000001, 0x210e0169, 0x00000000, 0x00010001 }, + { 0x00000005, 0x24583dad, 0x00000458, 0x00030003 }, + { 0x01000010, 0x200035ac, 0x0000010e, 0x00000458 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000031a }, + { 0x01000010, 0x20003dac, 0x0200010e, 0x00010001 }, + { 0x00010401, 0x24540061, 0x02000000, 0x06c00640 }, + { 0x00010805, 0x245a3e2d, 0x02008800, 0x007f007f }, + { 0x00110401, 0x24540061, 0x02000000, 0x04800780 }, + { 0x00110805, 0x245a3e2d, 0x02008804, 0x007f007f }, + { 0x00010005, 0x245c3e2d, 0x02008800, 0x00800080 }, + { 0x00110005, 0x245c3e2d, 0x02008804, 0x00800080 }, + { 0x00000009, 0x245c3dad, 0x0000045c, 0x00010001 }, + { 0x0000000c, 0x211e362d, 0x0000006c, 0x00000020 }, + { 0x00000040, 0x240035ac, 0x0000003e, 0x0000045c }, + { 0x01000010, 0x20003d8c, 0x00210400, 0x00010001 }, + { 0x01000010, 0x20003d8c, 0x02210400, 0x01000100 }, + { 0x00000001, 0x203c01ed, 0x00000000, 0x00000000 }, + { 0x00010001, 0x203c01ed, 0x00000000, 0x00020002 }, + { 0x00010001, 0x203c01ed, 0x02000000, 0xfffefffe }, + { 0x02000005, 0x20002e28, 0x00000061, 0x00400040 }, + { 0x00010040, 0x244c0d21, 0x0000045a, 0x0208e602 }, + { 0x00110040, 0x20780d21, 0x0000045a, 0x0208a002 }, + { 0x00010040, 0x20782421, 0x0000044c, 0x0000045c }, + { 0x02000005, 0x20003dac, 0x0200011e, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000001c0 }, + { 0x01000005, 0x20003dac, 0x00009800, 0x00030003 }, + { 0x00200005, 0x24443dad, 0x00459800, 0x00030003 }, + { 0x0020000c, 0x24403dad, 0x00459800, 0x00020002 }, + { 0x01600006, 0x20003dac, 0x02000446, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000012 }, + { 0x00010040, 0x22000c20, 0x02000078, 0x00400000 }, + { 0x00110040, 0x22000c20, 0x02000078, 0x00700000 }, + { 0x00310040, 0x20401da5, 0x02450440, 0xfffffffe }, + { 0x00110001, 0x20480061, 0x02000000, 0x000c000c }, + { 0x00010040, 0x20401da5, 0x02000440, 0xfffffffe }, + { 0x00010001, 0x204401a5, 0x02000442, 0x00000000 }, + { 0x00010001, 0x20480061, 0x02000000, 0x0007000c }, + { 0x01600031, 0x25600021, 0x408d0040, 0x00000200 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00010040, 0x22000c20, 0x02000078, 0x00200000 }, + { 0x00110040, 0x22000c20, 0x02000078, 0x00400000 }, + { 0x00200001, 0x204001a5, 0x00450440, 0x00000000 }, + { 0x00110040, 0x20441da5, 0x02000442, 0xfffffffe }, + { 0x00110001, 0x20480061, 0x02000000, 0x000c0007 }, + { 0x00010001, 0x20480061, 0x02000000, 0x00070007 }, + { 0x01600031, 0x25600021, 0x408d0040, 0x00000200 }, + { 0x00000040, 0xb80235ad, 0x00009802, 0x0000003c }, + { 0x0020040c, 0x24403dad, 0x00459800, 0x00030003 }, + { 0x00200805, 0x24483dad, 0x00459800, 0x00070007 }, + { 0x01600006, 0x20003dac, 0x0000044a, 0x00000000 }, + { 0x00200001, 0x204001a5, 0x00450440, 0x00000000 }, + { 0x00000009, 0x20403ca5, 0x00000040, 0x00010001 }, + { 0x00010040, 0x22000c20, 0x00000078, 0x00200010 }, + { 0x00110040, 0x22000c20, 0x00000078, 0x00300010 }, + { 0x00010001, 0x20480061, 0x00000000, 0x00030009 }, + { 0x00110001, 0x20480061, 0x00000000, 0x00040009 }, + { 0x02600031, 0x27000021, 0x408d0040, 0x00000200 }, + { 0x01000005, 0x20003dac, 0x00009800, 0x00030003 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000001a }, + { 0x00600001, 0x26220231, 0x008d05c0, 0x00000000 }, + { 0x00600401, 0x26120231, 0x008d05b8, 0x00000000 }, + { 0x00600801, 0x26020231, 0x008d05b0, 0x00000000 }, + { 0x00600401, 0x25f20231, 0x008d05a8, 0x00000000 }, + { 0x00600801, 0x25e20231, 0x008d05a0, 0x00000000 }, + { 0x00600401, 0x25d20231, 0x008d0598, 0x00000000 }, + { 0x00600801, 0x25c20231, 0x008d0590, 0x00000000 }, + { 0x00600401, 0x25b20231, 0x008d0588, 0x00000000 }, + { 0x00600801, 0x25a20231, 0x008d0580, 0x00000000 }, + { 0x00600401, 0x25920231, 0x008d0578, 0x00000000 }, + { 0x00600801, 0x25820231, 0x008d0570, 0x00000000 }, + { 0x00600001, 0x25720231, 0x008d0568, 0x00000000 }, + { 0x00600001, 0x25620231, 0x008d0560, 0x00000000 }, + { 0x00110001, 0x220001ec, 0x02000000, 0x05820582 }, + { 0x00010001, 0x220001ec, 0x02000000, 0x05620562 }, + { 0x00000001, 0x220e0128, 0x00000454, 0x00000000 }, + { 0x01800006, 0x200035ac, 0x02000446, 0x00000444 }, + { 0x00810001, 0xbc000229, 0x02ad8000, 0x00000000 }, + { 0x00810001, 0xbc200229, 0x02ad8020, 0x00000000 }, + { 0x00810001, 0xbc400229, 0x02ad8040, 0x00000000 }, + { 0x00810001, 0xbc600229, 0x02ad8060, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000012a }, + { 0x00600001, 0x2024018d, 0x008d0200, 0x00000000 }, + { 0x01000041, 0x245e35ad, 0x00000446, 0x00000444 }, + { 0x00000040, 0x22022d08, 0x00000200, 0x00100010 }, + { 0x02000005, 0x20003db0, 0x0200045e, 0x00010001 }, + { 0x00200040, 0x22042d08, 0x00450200, 0x00200020 }, + { 0x00400001, 0x244c0109, 0x00690200, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000066 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000064 }, + { 0x00000040, 0x22003d08, 0x00000200, 0xffdeffde }, + { 0x00000440, 0x22023d08, 0x00000202, 0xffeeffee }, + { 0x00000801, 0x220c0060, 0x00000000, 0x04a00480 }, + { 0x01000010, 0x20003db0, 0x0000045e, 0x00040004 }, + { 0x00a02040, 0x2400462c, 0x00ad8000, 0x00ad8005 }, + { 0x00a02048, 0x24003e2c, 0x00ad8001, 0xfffbfffb }, + { 0x00a02048, 0x24003e2c, 0x00ad8002, 0x00140014 }, + { 0x00a02048, 0x24003e2c, 0x00ad8003, 0x00140014 }, + { 0x00a02048, 0xb8003e2d, 0x00ad8004, 0xfffbfffb }, + { 0x00a02040, 0x2400462c, 0x00ad8040, 0x00ad8045 }, + { 0x00a02048, 0x24003e2c, 0x00ad8041, 0xfffbfffb }, + { 0x00a02048, 0x24003e2c, 0x00ad8042, 0x00140014 }, + { 0x00a02048, 0x24003e2c, 0x00ad8043, 0x00140014 }, + { 0x00a02048, 0xb8403e2d, 0x00ad8044, 0xfffbfffb }, + { 0x00a02040, 0x2400462c, 0x00ad8080, 0x00ad8085 }, + { 0x00a02048, 0x24003e2c, 0x00ad8081, 0xfffbfffb }, + { 0x00a02048, 0x24003e2c, 0x00ad8082, 0x00140014 }, + { 0x00a02048, 0x24003e2c, 0x00ad8083, 0x00140014 }, + { 0x00a02048, 0xb8803e2d, 0x00ad8084, 0xfffbfffb }, + { 0x00600040, 0x2400462c, 0x008d80c0, 0x008d80c5 }, + { 0x00600048, 0x24003e2c, 0x008d80c1, 0xfffbfffb }, + { 0x00600048, 0x24003e2c, 0x008d80c2, 0x00140014 }, + { 0x00600048, 0x24003e2c, 0x008d80c3, 0x00140014 }, + { 0x00600048, 0xb8c03e2d, 0x008d80c4, 0xfffbfffb }, + { 0x00000401, 0x22000060, 0x00000000, 0x04a00480 }, + { 0x00000c01, 0x22040060, 0x00000000, 0x04a00490 }, + { 0x00010802, 0x220c2d28, 0x00000454, 0x04800480 }, + { 0x00a02040, 0x24003dac, 0x00b18000, 0x02000200 }, + { 0x00800048, 0x24003dac, 0x01ed8800, 0xfffbfffb }, + { 0x00800048, 0x24203dac, 0x01ed8820, 0xfffbfffb }, + { 0x00a02048, 0x24003dac, 0x00b18020, 0x00140014 }, + { 0x00800048, 0x24003dac, 0x01ed8820, 0x00140014 }, + { 0x00800048, 0x24203dac, 0x01ed8840, 0x00140014 }, + { 0x00a02048, 0x24003dac, 0x00b18040, 0xfffbfffb }, + { 0x00800048, 0x24003dac, 0x01ed8840, 0x00010001 }, + { 0x00800048, 0x24203dac, 0x01ed8860, 0x00010001 }, + { 0x8080000c, 0xd8003d91, 0x00b10400, 0x000a000a }, + { 0x8080100c, 0xd8203d91, 0x00b10420, 0x000a000a }, + { 0x00a02040, 0x24003dac, 0x00b18040, 0x02000200 }, + { 0x00800048, 0x24003dac, 0x01ed8840, 0xfffbfffb }, + { 0x00800048, 0x24203dac, 0x01ed8860, 0xfffbfffb }, + { 0x00a02048, 0x24003dac, 0x00b18060, 0x00140014 }, + { 0x00800048, 0x24003dac, 0x01ed8860, 0x00140014 }, + { 0x00800048, 0x24203dac, 0x01ed8880, 0x00140014 }, + { 0x00a02048, 0x24003dac, 0x00b18080, 0xfffbfffb }, + { 0x00800048, 0x24003dac, 0x01ed8880, 0x00010001 }, + { 0x00800048, 0x24203dac, 0x01ed88a0, 0x00010001 }, + { 0x8080000c, 0xd8403d91, 0x00b10400, 0x000a000a }, + { 0x8080100c, 0xd8603d91, 0x00b10420, 0x000a000a }, + { 0x00010220, 0x34001c00, 0x00001400, 0x000000b4 }, + { 0x01000010, 0x20003db0, 0x00000444, 0x00000000 }, + { 0x01000010, 0x20003db0, 0x02000446, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000004c }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000004a }, + { 0x00400040, 0x22003d28, 0x0069044c, 0xfffefffe }, + { 0x03400010, 0x20003dac, 0x00000446, 0x00020002 }, + { 0x01000010, 0x20003db0, 0x02000444, 0x00020002 }, + { 0x00410040, 0x22002d08, 0x00690200, 0x00100010 }, + { 0x01000010, 0x20003dac, 0x00000446, 0x00000000 }, + { 0x00010002, 0x220c2d28, 0x02000454, 0x04800480 }, + { 0x00800040, 0x24003e2c, 0x01ed8000, 0x00100010 }, + { 0x00800040, 0x24203e2c, 0x01ed8020, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01ed8001, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8021, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8002, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8022, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8003, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8023, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8004, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8024, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8005, 0x00010001 }, + { 0x00800048, 0x24203e2c, 0x01ed8025, 0x00010001 }, + { 0x8080000c, 0xd8003d91, 0x00b10400, 0x00050005 }, + { 0x8080100c, 0xd8203d91, 0x00b10420, 0x00050005 }, + { 0x00800040, 0x24003e2c, 0x01ed8040, 0x00100010 }, + { 0x00800040, 0x24203e2c, 0x01ed8060, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01ed8041, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8061, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8042, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8062, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8043, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8063, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8044, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8064, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8045, 0x00010001 }, + { 0x00800048, 0x24203e2c, 0x01ed8065, 0x00010001 }, + { 0x8080000c, 0xd8403d91, 0x00b10400, 0x00050005 }, + { 0x8080100c, 0xd8603d91, 0x00b10420, 0x00050005 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000004 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000005c }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000062 }, + { 0x01000010, 0x20003db0, 0x00000446, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000042 }, + { 0x00200401, 0x22000128, 0x0066044c, 0x00000000 }, + { 0x00200c01, 0x22040128, 0x0045044e, 0x00000000 }, + { 0x00000801, 0x220c0128, 0x00000454, 0x00000000 }, + { 0x03400010, 0x20003dac, 0x02000444, 0x00020002 }, + { 0x01000010, 0x20003dac, 0x00000444, 0x00000000 }, + { 0x00410040, 0x22002d08, 0x02690200, 0x00010001 }, + { 0x01000010, 0x20003db0, 0x02000446, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000002 }, + { 0x00110001, 0x220c0168, 0x02000000, 0x04800480 }, + { 0x00a02040, 0x24003e2c, 0x00ad83e0, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01ed8be0, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8800, 0xfffbfffb }, + { 0x00a02048, 0x24003e2c, 0x00ad8000, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8800, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8820, 0x00140014 }, + { 0x00a02048, 0x24003e2c, 0x00ad8020, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8820, 0x00010001 }, + { 0x00800048, 0x24203e2c, 0x01ed8840, 0x00010001 }, + { 0x8080000c, 0xd8003d91, 0x00b10400, 0x00050005 }, + { 0x8080100c, 0xd8203d91, 0x00b10420, 0x00050005 }, + { 0x00a02040, 0x24003e2c, 0x00ad8020, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01ed8820, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8840, 0xfffbfffb }, + { 0x00a02048, 0x24003e2c, 0x00ad8040, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8840, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8860, 0x00140014 }, + { 0x00a02048, 0x24003e2c, 0x00ad8060, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8860, 0x00010001 }, + { 0x00800048, 0x24203e2c, 0x01ed8880, 0x00010001 }, + { 0x8080000c, 0xd8403d91, 0x00b10400, 0x00050005 }, + { 0x8080100c, 0xd8603d91, 0x00b10420, 0x00050005 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001c }, + { 0x00200401, 0x22000128, 0x0045044c, 0x00000000 }, + { 0x00000801, 0x220c0128, 0x00000454, 0x00000000 }, + { 0x01200010, 0x20003dac, 0x00000444, 0x00030003 }, + { 0x01200010, 0x20003dac, 0x02000446, 0x00030003 }, + { 0x00210040, 0x22002d08, 0x00450200, 0x00010001 }, + { 0x00210040, 0x22002d08, 0x02450200, 0x00100010 }, + { 0x00800001, 0xb8000229, 0x01ed8000, 0x00000000 }, + { 0x00800001, 0xb8200229, 0x01ed8020, 0x00000000 }, + { 0x00800001, 0xb8400229, 0x01ed8040, 0x00000000 }, + { 0x00800001, 0xb8600229, 0x01ed8060, 0x00000000 }, + { 0x80800042, 0xd8004631, 0x00d29800, 0x00d20480 }, + { 0x80800042, 0xd8204631, 0x00d29820, 0x00d204a0 }, + { 0x80800042, 0xd8404631, 0x00d29840, 0x00d204c0 }, + { 0x80800042, 0xd8604631, 0x00d29860, 0x00d204e0 }, + { 0x00600001, 0x220001ac, 0x008d0024, 0x00000000 }, + { 0x00200040, 0x244c3dad, 0x00450448, 0xfff8fff8 }, + { 0x00000401, 0x220001ec, 0x00000000, 0x07000700 }, + { 0x00000c01, 0x220201e8, 0x00000000, 0x07100710 }, + { 0x00000801, 0x220e0128, 0x00000456, 0x00000000 }, + { 0x00000441, 0x254635ad, 0x00000448, 0x0000044a }, + { 0x00000c41, 0x254025ad, 0x0000444c, 0x0000444e }, + { 0x00000c41, 0x254225ad, 0x00000448, 0x0000444e }, + { 0x00000841, 0x254435ad, 0x0000444c, 0x0000044a }, + { 0x00200040, 0x244c3d09, 0x00450200, 0x00100010 }, + { 0x00800041, 0x24002628, 0x00ad8000, 0x00000540 }, + { 0x00800041, 0x24202628, 0x00ad8020, 0x00000540 }, + { 0x00800048, 0x24002628, 0x00ad8002, 0x00000542 }, + { 0x00800048, 0x24202628, 0x00ad8022, 0x00000542 }, + { 0x00200001, 0x22000128, 0x0045044c, 0x00000000 }, + { 0x00800048, 0x24002628, 0x01ed8000, 0x00000544 }, + { 0x00800048, 0x24202628, 0x01ed8020, 0x00000544 }, + { 0x00800048, 0xbc002629, 0x01ed8002, 0x00000546 }, + { 0x00801048, 0xbc202629, 0x01ed8022, 0x00000546 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000128 }, + { 0x00000001, 0x20220169, 0x00000000, 0x00040004 }, + { 0x00200005, 0x24443dad, 0x00459800, 0x00030003 }, + { 0x0020000c, 0x24403dad, 0x00459800, 0x00020002 }, + { 0x01600006, 0x20003dac, 0x02000446, 0x00000000 }, + { 0x00010040, 0x22000c20, 0x02000078, 0x00200000 }, + { 0x00110040, 0x22000c20, 0x02000078, 0x00500000 }, + { 0x00310040, 0x20401da5, 0x02450440, 0xfffffffe }, + { 0x00110001, 0x20480061, 0x02000000, 0x00080008 }, + { 0x00010040, 0x20401da5, 0x02000440, 0xfffffffe }, + { 0x00010001, 0x204401a5, 0x02000442, 0x00000000 }, + { 0x00010001, 0x20480061, 0x02000000, 0x00030008 }, + { 0x01600031, 0x25600021, 0x408d0040, 0x00000200 }, + { 0x00000040, 0xb80235ad, 0x00009802, 0x0000003c }, + { 0x00000040, 0x22000c20, 0x00000078, 0x00100010 }, + { 0x0020040c, 0x24403dad, 0x00459800, 0x00030003 }, + { 0x00200805, 0x24483dad, 0x00459800, 0x00070007 }, + { 0x00200001, 0x204001a5, 0x00450440, 0x00000000 }, + { 0x00000009, 0x20403ca5, 0x00000040, 0x00010001 }, + { 0x00000001, 0x20480061, 0x00000000, 0x00020005 }, + { 0x02600031, 0x27000021, 0x408d0040, 0x00000200 }, + { 0x00110001, 0x220001ec, 0x02000000, 0x05820582 }, + { 0x00010001, 0x220001ec, 0x02000000, 0x05620562 }, + { 0x00000001, 0x220e0128, 0x00000454, 0x00000000 }, + { 0x01800006, 0x200035ac, 0x02000446, 0x00000444 }, + { 0x00410001, 0xbc000229, 0x02698000, 0x00000000 }, + { 0x00410001, 0xbc100229, 0x02698010, 0x00000000 }, + { 0x00410001, 0xbc200229, 0x02698020, 0x00000000 }, + { 0x00410001, 0xbc300229, 0x02698030, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000be }, + { 0x00600001, 0x2024018d, 0x008d0200, 0x00000000 }, + { 0x01000041, 0x245e35ad, 0x00000446, 0x00000444 }, + { 0x02000005, 0x20003db0, 0x0200045e, 0x00010001 }, + { 0x00000040, 0x22022d08, 0x00000200, 0x00100010 }, + { 0x00200040, 0x22042d08, 0x00450200, 0x00200020 }, + { 0x00400001, 0x244c0109, 0x00690200, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000044 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000042 }, + { 0x00000040, 0x22003d08, 0x00000200, 0xffdeffde }, + { 0x00000440, 0x22023d08, 0x00000202, 0xffeeffee }, + { 0x00000801, 0x220c0060, 0x00000000, 0x04d004c0 }, + { 0x01000010, 0x20003db0, 0x0000045e, 0x00040004 }, + { 0x00802040, 0x2400462c, 0x00a98000, 0x00a98005 }, + { 0x00802048, 0x24003e2c, 0x00a98001, 0xfffbfffb }, + { 0x00802048, 0x24003e2c, 0x00a98002, 0x00140014 }, + { 0x00802048, 0x24003e2c, 0x00a98003, 0x00140014 }, + { 0x00802048, 0xb8003e2d, 0x00a98004, 0xfffbfffb }, + { 0x00802040, 0x2400462c, 0x00a98040, 0x00a98045 }, + { 0x00802048, 0x24003e2c, 0x00a98041, 0xfffbfffb }, + { 0x00802048, 0x24003e2c, 0x00a98042, 0x00140014 }, + { 0x00802048, 0x24003e2c, 0x00a98043, 0x00140014 }, + { 0x00802048, 0xb8203e2d, 0x00a98044, 0xfffbfffb }, + { 0x00400040, 0x2400462c, 0x00698080, 0x00698085 }, + { 0x00400048, 0x24003e2c, 0x00698081, 0xfffbfffb }, + { 0x00400048, 0x24003e2c, 0x00698082, 0x00140014 }, + { 0x00400048, 0x24003e2c, 0x00698083, 0x00140014 }, + { 0x00400048, 0xb8403e2d, 0x00698084, 0xfffbfffb }, + { 0x00000401, 0x220c0060, 0x00000000, 0x04e004d0 }, + { 0x00000c01, 0x22000060, 0x00000000, 0x04d004c8 }, + { 0x00000c01, 0x22040060, 0x00000000, 0x04e004d8 }, + { 0x00000801, 0x22080060, 0x00000000, 0x04f004e8 }, + { 0x00800040, 0x24003dac, 0x00b104c0, 0x02000200 }, + { 0x00800048, 0x24003dac, 0x00b104e0, 0xfffbfffb }, + { 0x00800048, 0x24003dac, 0x01ed9800, 0x00140014 }, + { 0x00010001, 0x220c0168, 0x00000000, 0x05400540 }, + { 0x00110001, 0x220c0168, 0x00000000, 0x04c004c0 }, + { 0x00800048, 0x24003dac, 0x01e98000, 0xfffbfffb }, + { 0x00800048, 0x24003dac, 0x01e98020, 0x00010001 }, + { 0x00800048, 0x24003dac, 0x01e98800, 0x00140014 }, + { 0x8080000c, 0xd8003d91, 0x00b10400, 0x000a000a }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000060 }, + { 0x01000010, 0x20003db0, 0x00000444, 0x00000000 }, + { 0x01000010, 0x20003db0, 0x02000446, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000022 }, + { 0x00400040, 0x22003d28, 0x0069044c, 0xfffefffe }, + { 0x03400010, 0x20003dac, 0x00000446, 0x00020002 }, + { 0x01000010, 0x20003db0, 0x02000444, 0x00020002 }, + { 0x00410040, 0x22002d08, 0x00690200, 0x00100010 }, + { 0x01000010, 0x20003dac, 0x00000446, 0x00000000 }, + { 0x00010001, 0x220e0168, 0x02000000, 0x05400540 }, + { 0x00110001, 0x220e0168, 0x02000000, 0x04c004c0 }, + { 0x00800040, 0x24003e2c, 0x01e98000, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01e98001, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01e98002, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01e98003, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01e98004, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01e98005, 0x00010001 }, + { 0x8080000c, 0xdc003d91, 0x00b10400, 0x00050005 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000004 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000036 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000036 }, + { 0x01000010, 0x20003db0, 0x00000446, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x03600010, 0x20003dac, 0x02000444, 0x00020002 }, + { 0x00400401, 0x22000128, 0x0069044c, 0x00000000 }, + { 0x00400840, 0x22083d2c, 0x0069044c, 0x00100010 }, + { 0x00610040, 0x22002d08, 0x02690200, 0x00010001 }, + { 0x01000010, 0x20003dac, 0x00000444, 0x00000000 }, + { 0x01000010, 0x20003db0, 0x02000446, 0x00020002 }, + { 0x00800040, 0x24003e2c, 0x01e983e0, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01e98000, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01e98020, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01e993e0, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01e99000, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01e99020, 0x00010001 }, + { 0x00000001, 0x220e0168, 0x00000000, 0x05400540 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000002 }, + { 0x00110001, 0x220e0168, 0x02000000, 0x04c004c0 }, + { 0x8080000c, 0xdc003d91, 0x00b10400, 0x00050005 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000e }, + { 0x00400001, 0x22000128, 0x0069044c, 0x00000000 }, + { 0x01400010, 0x20003dac, 0x00000444, 0x00030003 }, + { 0x01400010, 0x20003dac, 0x02000446, 0x00030003 }, + { 0x00410040, 0x22002d08, 0x00690200, 0x00010001 }, + { 0x00410040, 0x22002d08, 0x02690200, 0x00100010 }, + { 0x00800001, 0x25400229, 0x01e98000, 0x00000000 }, + { 0x80800042, 0x45404631, 0x00d20540, 0x00d204c0 }, + { 0x00000001, 0x220c0128, 0x00000454, 0x00000000 }, + { 0x00400001, 0xd8000231, 0x008a0540, 0x00000000 }, + { 0x00400001, 0xd8100231, 0x008a0548, 0x00000000 }, + { 0x00400001, 0xd8200231, 0x008a0550, 0x00000000 }, + { 0x00400001, 0xd8300231, 0x008a0558, 0x00000000 }, + { 0x00600001, 0x220001ac, 0x008d0024, 0x00000000 }, + { 0x00200040, 0x244c3dad, 0x00450448, 0xfff8fff8 }, + { 0x00000401, 0x220001ec, 0x00000000, 0x07000700 }, + { 0x00000801, 0x220e0128, 0x00000456, 0x00000000 }, + { 0x00000441, 0x254635ad, 0x00000448, 0x0000044a }, + { 0x00000c41, 0x254025ad, 0x0000444c, 0x0000444e }, + { 0x00000c41, 0x254225ad, 0x00000448, 0x0000444e }, + { 0x00000841, 0x254435ad, 0x0000444c, 0x0000044a }, + { 0x00600041, 0x24002628, 0x00898000, 0x00000540 }, + { 0x00600048, 0x24002628, 0x00898002, 0x00000542 }, + { 0x00600048, 0x24002628, 0x00898008, 0x00000544 }, + { 0x00600048, 0x2540262d, 0x0089800a, 0x00000546 }, + { 0x00400401, 0xbc0001a9, 0x00690540, 0x00000000 }, + { 0x00400801, 0xbc1001a9, 0x00690548, 0x00000000 }, + { 0x01000010, 0x20003d2c, 0x00000022, 0x00030003 }, + { 0x01000040, 0x20223d29, 0x02000022, 0xffffffff }, + { 0x00000040, 0x220c3d8c, 0x0000020c, 0x00080008 }, + { 0x00110040, 0x24540c21, 0x00000454, 0x00080008 }, + { 0x00010040, 0x24540c21, 0x00000454, 0x00180038 }, + { 0x00110220, 0x34001c00, 0x02001400, 0xfffffee4 }, + { 0x01800010, 0x20003dac, 0x0200010e, 0x00010001 }, + { 0x00000040, 0x220c3d8c, 0x0000020c, 0xffe0ffe0 }, + { 0x00010001, 0x24540061, 0x02000000, 0x06c00640 }, + { 0x00110001, 0x24540061, 0x02000000, 0x04800780 }, + { 0x00000001, 0x220e0128, 0x00000456, 0x00000000 }, + { 0x00800040, 0x24003dac, 0x00b19c00, 0x00200020 }, + { 0x00800040, 0x24203dac, 0x00b19c20, 0x00200020 }, + { 0x8080000c, 0xdc003d91, 0x00b10400, 0x00060006 }, + { 0x8080000c, 0xdc203d91, 0x00b10420, 0x00060006 }, + { 0x02000040, 0x210e3d29, 0x0200010e, 0xffffffff }, + { 0x00000040, 0x220c3d8c, 0x0000020c, 0x00040004 }, + { 0x00110220, 0x34001c00, 0x02001400, 0xfffffcdc }, + { 0x01000005, 0x25643e2d, 0x00000060, 0x00c000c0 }, + { 0x01000010, 0x20003dac, 0x02000458, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000c }, + { 0x01000010, 0x20003dac, 0x00000458, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000086 }, + { 0x00a02001, 0x46400231, 0x00d20780, 0x00000000 }, + { 0x00a02001, 0x46800231, 0x00d207c0, 0x00000000 }, + { 0x00a02001, 0x46c00231, 0x00d20480, 0x00000000 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000007e }, + { 0x80a02042, 0x46404631, 0x00d20640, 0x00d20780 }, + { 0x80a02042, 0x46804631, 0x00d20680, 0x00d207c0 }, + { 0x80a02042, 0x46c04631, 0x00d206c0, 0x00d20480 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000076 }, + { 0x01000010, 0x20003dac, 0x02000564, 0x00800080 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x0000000e }, + { 0x01000010, 0x20003dac, 0x00000458, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0xffffffe4 }, + { 0x00200401, 0x256801ed, 0x00000000, 0x00200020 }, + { 0x00200801, 0x256c01ed, 0x00000000, 0x00060006 }, + { 0x00400001, 0x258001ed, 0x00000000, 0x00000000 }, + { 0x00600001, 0x45a001ad, 0x00058c00, 0x00000000 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000028 }, + { 0x02600005, 0x20006e28, 0x02008c0c, 0x88848421 }, + { 0x0220000c, 0x25663dad, 0x00000458, 0x00010001 }, + { 0x0000000c, 0x25643dad, 0x00000564, 0x00060006 }, + { 0x00310001, 0x25c401ad, 0x00000458, 0x00000000 }, + { 0x00210001, 0x25c00061, 0x00000000, 0x00010001 }, + { 0x00310040, 0x25c03dad, 0x004545c4, 0x00010001 }, + { 0x00610001, 0x25a00061, 0x02000000, 0x00000080 }, + { 0x00710001, 0x45a002ad, 0x02ae8c00, 0x00000000 }, + { 0x00710001, 0x45a202ad, 0x02ae8c01, 0x00000000 }, + { 0x00800041, 0x25a035ad, 0x00b105a0, 0x000905c0 }, + { 0x01200010, 0x20003e2c, 0x0245006e, 0x00000000 }, + { 0x00310009, 0x244c45ad, 0x02000564, 0x0045006e }, + { 0x00210001, 0x244c01ed, 0x02000000, 0x00000000 }, + { 0x0031000c, 0x244c3dad, 0x0245044c, 0x00010001 }, + { 0x00200009, 0x256835ad, 0x0045044c, 0x00000566 }, + { 0x00210040, 0x256835ad, 0x02450568, 0x00000566 }, + { 0x00200040, 0x256c362d, 0x0045006e, 0x00000566 }, + { 0x00400040, 0x240035ac, 0x00ab05a2, 0x00ab05a6 }, + { 0x00400040, 0x2400358c, 0x00690400, 0x00000566 }, + { 0x0040000c, 0x2580358d, 0x00690400, 0x00000566 }, + { 0x00800041, 0x2400362c, 0x00d20640, 0x000005a0 }, + { 0x00800041, 0x2420362c, 0x00d20660, 0x000005a0 }, + { 0x00800048, 0x2400362c, 0x00d20780, 0x000005a4 }, + { 0x00800048, 0x2420362c, 0x00d207a0, 0x000005a4 }, + { 0x00800040, 0x2400358c, 0x00b10400, 0x00000568 }, + { 0x00800040, 0x2420358c, 0x00b10420, 0x00000568 }, + { 0x0080000c, 0x24c0358d, 0x00b10400, 0x0000056c }, + { 0x0080000c, 0x24e0358d, 0x00b10420, 0x0000056c }, + { 0x80800040, 0x464035b1, 0x00b104c0, 0x00000580 }, + { 0x80800040, 0x466035b1, 0x00b104e0, 0x00000580 }, + { 0x00800041, 0x2400362c, 0x00d20680, 0x000005a0 }, + { 0x00800041, 0x2420362c, 0x00d206a0, 0x000005a0 }, + { 0x00800048, 0x2400362c, 0x00d207c0, 0x000005a4 }, + { 0x00800048, 0x2420362c, 0x00d207e0, 0x000005a4 }, + { 0x00800040, 0x2400358c, 0x00b10400, 0x00000568 }, + { 0x00800040, 0x2420358c, 0x00b10420, 0x00000568 }, + { 0x0080000c, 0x24c0358d, 0x00b10400, 0x0000056c }, + { 0x0080000c, 0x24e0358d, 0x00b10420, 0x0000056c }, + { 0x80800040, 0x468035b1, 0x00b104c0, 0x00000580 }, + { 0x80800040, 0x46a035b1, 0x00b104e0, 0x00000580 }, + { 0x00800041, 0x2400362c, 0x00d206c0, 0x000705a8 }, + { 0x00800041, 0x2420362c, 0x00d206e0, 0x000705a8 }, + { 0x00800048, 0x2400362c, 0x00d20480, 0x000705ac }, + { 0x00800048, 0x2420362c, 0x00d204a0, 0x000705ac }, + { 0x00800040, 0x2400358c, 0x00b10400, 0x0000056a }, + { 0x00800040, 0x2420358c, 0x00b10420, 0x0000056a }, + { 0x0080000c, 0x24c0358d, 0x00b10400, 0x0000056e }, + { 0x0080000c, 0x24e0358d, 0x00b10420, 0x0000056e }, + { 0x80800040, 0x46c035b1, 0x00b104c0, 0x00050582 }, + { 0x80800040, 0x46e035b1, 0x00b104e0, 0x00050582 }, + { 0x01800005, 0x20003d2c, 0x02000020, 0x00020002 }, + { 0x80800040, 0xd00045b1, 0x00b19000, 0x00d20640 }, + { 0x80800040, 0xd02045b1, 0x00b19020, 0x00d20660 }, + { 0x80800040, 0xd04045b1, 0x00b19040, 0x00d20680 }, + { 0x80800040, 0xd06045b1, 0x00b19060, 0x00d206a0 }, + { 0x00000040, 0x22083d8c, 0x00000208, 0x00800080 }, + { 0x80400040, 0xd40045b1, 0x00699400, 0x00ab06c0 }, + { 0x80400040, 0xd48045b1, 0x00699480, 0x00ab06c2 }, + { 0x80400040, 0xd42045b1, 0x00699420, 0x00ab06e0 }, + { 0x80400040, 0xd4a045b1, 0x006994a0, 0x00ab06e2 }, + { 0x80400040, 0xd41045b1, 0x00699410, 0x00ab06d0 }, + { 0x80400040, 0xd49045b1, 0x00699490, 0x00ab06d2 }, + { 0x80400040, 0xd43045b1, 0x00699430, 0x00ab06f0 }, + { 0x80400040, 0xd4b045b1, 0x006994b0, 0x00ab06f2 }, + { 0x00000040, 0x220a3d8c, 0x0000020a, 0x00080008 }, + { 0x00110040, 0x220a3d8c, 0x0200020a, 0x00300030 }, + { 0x01000010, 0x20003d2c, 0x02000020, 0x00060006 }, + { 0x00000040, 0x20203d29, 0x00000020, 0x00020002 }, + { 0x00000040, 0x22040c00, 0x00000204, 0x00100001 }, + { 0x00000040, 0x220c358c, 0x0000020c, 0x0000003a }, + { 0x00110220, 0x34001c00, 0x02001400, 0xfffffc1a }, + { 0x00000001, 0x220001ec, 0x00000000, 0x01400140 }, + { 0x00000001, 0x220201ec, 0x00000000, 0x01c001c0 }, + { 0x00800401, 0x20400236, 0x01ee8000, 0x00000000 }, + { 0x00800801, 0x20500236, 0x01ee8010, 0x00000000 }, + { 0x00800401, 0x20600236, 0x01ee8020, 0x00000000 }, + { 0x00800801, 0x20700236, 0x01ee8030, 0x00000000 }, + { 0x00800401, 0x20800236, 0x01ee8040, 0x00000000 }, + { 0x00800801, 0x20900236, 0x01ee8050, 0x00000000 }, + { 0x00800401, 0x20a00236, 0x01ee8060, 0x00000000 }, + { 0x00800801, 0x20b00236, 0x01ee8070, 0x00000000 }, + { 0x00800401, 0x20c00236, 0x01ee8100, 0x00000000 }, + { 0x00800801, 0x20d00236, 0x01ee8110, 0x00000000 }, + { 0x00800401, 0x20e00236, 0x01ee8120, 0x00000000 }, + { 0x00800801, 0x20f00236, 0x01ee8130, 0x00000000 }, + { 0x00800401, 0x21000236, 0x01ee8140, 0x00000000 }, + { 0x00800801, 0x21100236, 0x01ee8150, 0x00000000 }, + { 0x00800401, 0x21200236, 0x01ee8160, 0x00000000 }, + { 0x00800801, 0x21300236, 0x01ee8170, 0x00000000 }, + { 0x00000040, 0x22000d20, 0x00000062, 0x1218a000 }, + { 0x00200401, 0x204001a5, 0x00450064, 0x00000000 }, + { 0x00000801, 0x20480061, 0x00000000, 0x000f000f }, + { 0x01600031, 0x21400021, 0x508d0040, 0x00000200 }, + { 0x00000001, 0x220001ec, 0x00000000, 0x03400340 }, + { 0x00800401, 0x41600236, 0x00d28000, 0x00000000 }, + { 0x00800801, 0x41610236, 0x00d28080, 0x00000000 }, + { 0x00800401, 0x41800236, 0x00d28020, 0x00000000 }, + { 0x00800801, 0x41810236, 0x00d280a0, 0x00000000 }, + { 0x00800401, 0x41a00236, 0x00d28040, 0x00000000 }, + { 0x00800801, 0x41a10236, 0x00d280c0, 0x00000000 }, + { 0x00800401, 0x41c00236, 0x00d28060, 0x00000000 }, + { 0x00800801, 0x41c10236, 0x00d280e0, 0x00000000 }, + { 0x00000040, 0x22000d20, 0x00000062, 0x0a18a001 }, + { 0x0000040c, 0x20443ca5, 0x00000044, 0x00010001 }, + { 0x00000801, 0x20480061, 0x00000000, 0x0007000f }, + { 0x0a600031, 0x21600021, 0x508d0040, 0x00000200 }, + { 0x00000001, 0x21400021, 0x00000140, 0x00000000 }, + { 0x00000001, 0x21600021, 0x00000160, 0x00000000 }, + { 0x01600031, 0x20001c20, 0x708d0000, 0x82000010 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20602d29, 0x02000042, 0x00070007 }, + { 0x01000005, 0x20422d29, 0x00000042, 0xfff8fff8 }, + { 0x00000001, 0x202001e9, 0x00000000, 0x100c100c }, + { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, + { 0x00000009, 0x27e82d21, 0x00000040, 0x00060006 }, + { 0x00600001, 0x20a00022, 0x008d0000, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000100 }, + { 0x00600001, 0x20200022, 0x008d07e0, 0x00000000 }, + { 0x01800031, 0x20801d09, 0x408d0000, 0x02488400 }, + { 0x00600001, 0x20400022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20480c22, 0x000007e8, 0x00000080 }, + { 0x02800031, 0x21001d09, 0x408d0000, 0x02488400 }, + { 0x00600001, 0x20600022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20680c22, 0x000007e8, 0x00000100 }, + { 0x03800031, 0x21801d09, 0x408d0000, 0x02488400 }, + { 0x00600001, 0x20800022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20880c22, 0x000007e8, 0x00000180 }, + { 0x04800031, 0x22001d09, 0x408d0000, 0x02488400 }, + { 0x02600005, 0x20000c20, 0x02000090, 0x00002000 }, + { 0x00000006, 0x20880c21, 0x00000088, 0x00200000 }, + { 0x00200009, 0x20845529, 0x0000009c, 0x00450020 }, + { 0x00200001, 0x40840231, 0x00450094, 0x00000000 }, + { 0x00310001, 0x20840229, 0x02450094, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000c }, + { 0x00800041, 0x24002628, 0x00000095, 0x00000044 }, + { 0x00800040, 0x24004508, 0x008d0400, 0x00000094 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d0080, 0x00000000 }, + { 0x00802001, 0x20800061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x02600005, 0x20000c20, 0x020000d0, 0x00002000 }, + { 0x00000006, 0x20c80c21, 0x000000c8, 0x00200000 }, + { 0x00200009, 0x20c45529, 0x000000dc, 0x00450020 }, + { 0x00200001, 0x40c40231, 0x004500d4, 0x00000000 }, + { 0x00310001, 0x20c40229, 0x024500d4, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000c }, + { 0x00800041, 0x24002628, 0x000000d5, 0x00000044 }, + { 0x00800040, 0x24004508, 0x008d0400, 0x000000d4 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d00c0, 0x00000000 }, + { 0x00802001, 0x20c00061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x02600005, 0x20000c20, 0x02000110, 0x00002000 }, + { 0x00000006, 0x21080c21, 0x00000108, 0x00200000 }, + { 0x00200009, 0x21045529, 0x0000011c, 0x00450020 }, + { 0x00200001, 0x41040231, 0x00450114, 0x00000000 }, + { 0x00310001, 0x21040229, 0x02450114, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000c }, + { 0x00800041, 0x24002628, 0x00000115, 0x00000044 }, + { 0x00800040, 0x24004508, 0x008d0400, 0x00000114 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d0100, 0x00000000 }, + { 0x00802001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x02600005, 0x20000c20, 0x02000150, 0x00002000 }, + { 0x00000006, 0x21480c21, 0x00000148, 0x00200000 }, + { 0x00200009, 0x21445529, 0x0000015c, 0x00450020 }, + { 0x00200001, 0x41440231, 0x00450154, 0x00000000 }, + { 0x00310001, 0x21440229, 0x02450154, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000c }, + { 0x00800041, 0x24002628, 0x00000155, 0x00000044 }, + { 0x00800040, 0x24004508, 0x008d0400, 0x00000154 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d0140, 0x00000000 }, + { 0x00802001, 0x21400061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x02600005, 0x20000c20, 0x02000190, 0x00002000 }, + { 0x00000006, 0x21880c21, 0x00000188, 0x00200000 }, + { 0x00200009, 0x21845529, 0x0000019c, 0x00450020 }, + { 0x00200001, 0x41840231, 0x00450194, 0x00000000 }, + { 0x00310001, 0x21840229, 0x02450194, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000c }, + { 0x00800041, 0x24002628, 0x00000195, 0x00000044 }, + { 0x00800040, 0x24004508, 0x008d0400, 0x00000194 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d0180, 0x00000000 }, + { 0x00802001, 0x21800061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x02600005, 0x20000c20, 0x020001d0, 0x00002000 }, + { 0x00000006, 0x21c80c21, 0x000001c8, 0x00200000 }, + { 0x00200009, 0x21c45529, 0x000001dc, 0x00450020 }, + { 0x00200001, 0x41c40231, 0x004501d4, 0x00000000 }, + { 0x00310001, 0x21c40229, 0x024501d4, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000c }, + { 0x00800041, 0x24002628, 0x000001d5, 0x00000044 }, + { 0x00800040, 0x24004508, 0x008d0400, 0x000001d4 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d01c0, 0x00000000 }, + { 0x00802001, 0x21c00061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x02600005, 0x20000c20, 0x02000210, 0x00002000 }, + { 0x00000006, 0x22080c21, 0x00000208, 0x00200000 }, + { 0x00200009, 0x22045529, 0x0000021c, 0x00450020 }, + { 0x00200001, 0x42040231, 0x00450214, 0x00000000 }, + { 0x00310001, 0x22040229, 0x02450214, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000c }, + { 0x00800041, 0x24002628, 0x00000215, 0x00000044 }, + { 0x00800040, 0x24004508, 0x008d0400, 0x00000214 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d0200, 0x00000000 }, + { 0x00802001, 0x22000061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x02600005, 0x20000c20, 0x02000250, 0x00002000 }, + { 0x00000006, 0x22480c21, 0x00000248, 0x00200000 }, + { 0x00200009, 0x22445529, 0x0000025c, 0x00450020 }, + { 0x00200001, 0x42440231, 0x00450254, 0x00000000 }, + { 0x00310001, 0x22440229, 0x02450254, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000c }, + { 0x00800041, 0x24002628, 0x00000255, 0x00000044 }, + { 0x00800040, 0x24004508, 0x008d0400, 0x00000254 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d0240, 0x00000000 }, + { 0x00802001, 0x22400061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x01000040, 0x20423dad, 0x00000042, 0xfff8fff8 }, + { 0x00600001, 0x21600022, 0x008d07e0, 0x00000000 }, + { 0x00802001, 0x21800022, 0x008d0080, 0x00000000 }, + { 0x00802001, 0x21c00022, 0x008d00c0, 0x00000000 }, + { 0x0b800031, 0x20001d0c, 0x508d0000, 0x0a080400 }, + { 0x00600001, 0x20200022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20280c22, 0x000007e8, 0x00000080 }, + { 0x00802001, 0x20400022, 0x008d0100, 0x00000000 }, + { 0x00802001, 0x20800022, 0x008d0140, 0x00000000 }, + { 0x01800031, 0x20001d0c, 0x508d0000, 0x0a080400 }, + { 0x00000040, 0x21680c22, 0x000007e8, 0x00000100 }, + { 0x00802001, 0x21800022, 0x008d0180, 0x00000000 }, + { 0x00802001, 0x21c00022, 0x008d01c0, 0x00000000 }, + { 0x0b800031, 0x20001d0c, 0x508d0000, 0x0a080400 }, + { 0x00000040, 0x20280c22, 0x000007e8, 0x00000180 }, + { 0x00802001, 0x20400022, 0x008d0200, 0x00000000 }, + { 0x00802001, 0x20800022, 0x008d0240, 0x00000000 }, + { 0x01800031, 0x20001d0c, 0x508d0000, 0x0a080400 }, + { 0x00000040, 0x27e80c21, 0x000007e8, 0x00000200 }, + { 0x01000010, 0x20002da0, 0x02000060, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x00001400, 0xffffff00 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000040 }, + { 0x00600001, 0x20200022, 0x008d07e0, 0x00000000 }, + { 0x01800031, 0x20801d09, 0x408d0000, 0x02488400 }, + { 0x00600001, 0x20400022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20480c22, 0x000007e8, 0x00000080 }, + { 0x02800031, 0x21001d09, 0x408d0000, 0x02488400 }, + { 0x00600001, 0x20600022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20680c22, 0x000007e8, 0x00000100 }, + { 0x03800031, 0x21801d09, 0x408d0000, 0x02488400 }, + { 0x00600001, 0x20800022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20880c22, 0x000007e8, 0x00000180 }, + { 0x04800031, 0x22001d09, 0x408d0000, 0x02488400 }, + { 0x00000001, 0x220400e0, 0x00000000, 0x00a00080 }, + { 0x00600001, 0x20a00022, 0x008d0000, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x02008810, 0x00002000 }, + { 0x01000040, 0x20603dad, 0x00000060, 0xffffffff }, + { 0x00000006, 0xa8080c21, 0x00008808, 0x00200000 }, + { 0x00200009, 0xa8045529, 0x0000881c, 0x00450020 }, + { 0x00200001, 0xc8040231, 0x00458814, 0x00000000 }, + { 0x00310001, 0xa8040229, 0x02458814, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000c }, + { 0x00800041, 0x24002628, 0x00008815, 0x00000044 }, + { 0x00800040, 0x24004508, 0x008d0400, 0x00008814 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d8800, 0x00000000 }, + { 0x00802001, 0xa8000061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x00600001, 0x21600022, 0x008d07e0, 0x00000000 }, + { 0x00802001, 0x21800022, 0x008d8800, 0x00000000 }, + { 0x0b800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x00000040, 0x27e80c21, 0x000007e8, 0x00000040 }, + { 0x00000040, 0x22040c00, 0x00000204, 0x00400040 }, + { 0x00110220, 0x34001c00, 0x00001400, 0xffffffda }, + { 0x01600031, 0x20001c20, 0x708d0000, 0x82000010 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20602d29, 0x02000042, 0x00070007 }, + { 0x01000005, 0x20422d29, 0x00000042, 0xfff8fff8 }, + { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, + { 0x00000009, 0x27e82d21, 0x00000040, 0x00060006 }, + { 0x00600001, 0x20a00022, 0x008d0000, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000260 }, + { 0x00600001, 0x20200022, 0x008d07e0, 0x00000000 }, + { 0x01800031, 0x20801d09, 0x408d0000, 0x02488400 }, + { 0x00600001, 0x20400022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20480c22, 0x000007e8, 0x00000080 }, + { 0x02800031, 0x21001d09, 0x408d0000, 0x02488400 }, + { 0x00600001, 0x20600022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20680c22, 0x000007e8, 0x00000100 }, + { 0x03800031, 0x21801d09, 0x408d0000, 0x02488400 }, + { 0x00600001, 0x20800022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20880c22, 0x000007e8, 0x00000180 }, + { 0x04800031, 0x22001d09, 0x408d0000, 0x02488400 }, + { 0x00200001, 0x20640229, 0x00450094, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x02000090, 0x01000000 }, + { 0x02600005, 0x20000c20, 0x00000090, 0x00004000 }, + { 0x00600041, 0x24003e2c, 0x00000095, 0x00020002 }, + { 0x00110001, 0x2066018d, 0x02000400, 0x00000000 }, + { 0x00010040, 0x20663d8d, 0x02000400, 0x00010001 }, + { 0x00110001, 0x2066022d, 0x00000095, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x00000090, 0x00002000 }, + { 0x02600005, 0x20001d20, 0x02000066, 0x00000001 }, + { 0x00000006, 0x20881c21, 0x00000088, 0x00200000 }, + { 0x00200001, 0x20840129, 0x00450064, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00800041, 0x24002528, 0x00000066, 0x00000044 }, + { 0x00800040, 0x24002508, 0x008d0400, 0x00000064 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d0080, 0x00000000 }, + { 0x00802001, 0x20800061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000001e }, + { 0x02600005, 0x20000c20, 0x00000090, 0x00004000 }, + { 0x00210002, 0x20700421, 0x02450038, 0x00450030 }, + { 0x00000001, 0x20680129, 0x0000009c, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x02600005, 0x20001d20, 0x0000009c, 0x00000010 }, + { 0x00210002, 0x20700421, 0x02450028, 0x00450020 }, + { 0x01600005, 0x20001d20, 0x0200009c, 0x00000001 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x02610005, 0x20001c20, 0x02000090, 0x00008000 }, + { 0x02610005, 0x20001d20, 0x0200009c, 0x00000010 }, + { 0x00010006, 0x20681d29, 0x0200009c, 0x00000010 }, + { 0x02800005, 0x2000452c, 0x02000068, 0x000d0070 }, + { 0x00000009, 0x20843d09, 0x00000602, 0x000c000c }, + { 0x00000005, 0x20862d09, 0x00000602, 0xf000f000 }, + { 0x00200001, 0x40840231, 0x00660064, 0x00000000 }, + { 0x00200001, 0x20640229, 0x004500d4, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x020000d0, 0x01000000 }, + { 0x02600005, 0x20000c20, 0x000000d0, 0x00004000 }, + { 0x00600041, 0x24003e2c, 0x000000d5, 0x00020002 }, + { 0x00110001, 0x2066018d, 0x02000400, 0x00000000 }, + { 0x00010040, 0x20663d8d, 0x02000400, 0x00010001 }, + { 0x00110001, 0x2066022d, 0x000000d5, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x000000d0, 0x00002000 }, + { 0x02600005, 0x20001d20, 0x02000066, 0x00000001 }, + { 0x00000006, 0x20c81c21, 0x000000c8, 0x00200000 }, + { 0x00200001, 0x20c40129, 0x00450064, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00800041, 0x24002528, 0x00000066, 0x00000044 }, + { 0x00800040, 0x24002508, 0x008d0400, 0x00000064 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d00c0, 0x00000000 }, + { 0x00802001, 0x20c00061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000001e }, + { 0x02600005, 0x20000c20, 0x000000d0, 0x00004000 }, + { 0x00210002, 0x20700421, 0x02450038, 0x00450030 }, + { 0x00000001, 0x20680129, 0x000000dc, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x02600005, 0x20001d20, 0x000000dc, 0x00000010 }, + { 0x00210002, 0x20700421, 0x02450028, 0x00450020 }, + { 0x01600005, 0x20001d20, 0x020000dc, 0x00000001 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x02610005, 0x20001c20, 0x020000d0, 0x00008000 }, + { 0x02610005, 0x20001d20, 0x020000dc, 0x00000010 }, + { 0x00010006, 0x20681d29, 0x020000dc, 0x00000010 }, + { 0x02800005, 0x2000452c, 0x02000068, 0x000d0070 }, + { 0x00000009, 0x20c43d09, 0x00000602, 0x000c000c }, + { 0x00000005, 0x20c62d09, 0x00000602, 0xf000f000 }, + { 0x00200001, 0x40c40231, 0x00660064, 0x00000000 }, + { 0x00200001, 0x20640229, 0x00450114, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x02000110, 0x01000000 }, + { 0x02600005, 0x20000c20, 0x00000110, 0x00004000 }, + { 0x00600041, 0x24003e2c, 0x00000115, 0x00020002 }, + { 0x00110001, 0x2066018d, 0x02000400, 0x00000000 }, + { 0x00010040, 0x20663d8d, 0x02000400, 0x00010001 }, + { 0x00110001, 0x2066022d, 0x00000115, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x00000110, 0x00002000 }, + { 0x02600005, 0x20001d20, 0x02000066, 0x00000001 }, + { 0x00000006, 0x21081c21, 0x00000108, 0x00200000 }, + { 0x00200001, 0x21040129, 0x00450064, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00800041, 0x24002528, 0x00000066, 0x00000044 }, + { 0x00800040, 0x24002508, 0x008d0400, 0x00000064 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d0100, 0x00000000 }, + { 0x00802001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000001e }, + { 0x02600005, 0x20000c20, 0x00000110, 0x00004000 }, + { 0x00210002, 0x20700421, 0x02450038, 0x00450030 }, + { 0x00000001, 0x20680129, 0x0000011c, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x02600005, 0x20001d20, 0x0000011c, 0x00000010 }, + { 0x00210002, 0x20700421, 0x02450028, 0x00450020 }, + { 0x01600005, 0x20001d20, 0x0200011c, 0x00000001 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x02610005, 0x20001c20, 0x02000110, 0x00008000 }, + { 0x02610005, 0x20001d20, 0x0200011c, 0x00000010 }, + { 0x00010006, 0x20681d29, 0x0200011c, 0x00000010 }, + { 0x02800005, 0x2000452c, 0x02000068, 0x000d0070 }, + { 0x00000009, 0x21043d09, 0x00000602, 0x000c000c }, + { 0x00000005, 0x21062d09, 0x00000602, 0xf000f000 }, + { 0x00200001, 0x41040231, 0x00660064, 0x00000000 }, + { 0x00200001, 0x20640229, 0x00450154, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x02000150, 0x01000000 }, + { 0x02600005, 0x20000c20, 0x00000150, 0x00004000 }, + { 0x00600041, 0x24003e2c, 0x00000155, 0x00020002 }, + { 0x00110001, 0x2066018d, 0x02000400, 0x00000000 }, + { 0x00010040, 0x20663d8d, 0x02000400, 0x00010001 }, + { 0x00110001, 0x2066022d, 0x00000155, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x00000150, 0x00002000 }, + { 0x02600005, 0x20001d20, 0x02000066, 0x00000001 }, + { 0x00000006, 0x21481c21, 0x00000148, 0x00200000 }, + { 0x00200001, 0x21440129, 0x00450064, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00800041, 0x24002528, 0x00000066, 0x00000044 }, + { 0x00800040, 0x24002508, 0x008d0400, 0x00000064 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d0140, 0x00000000 }, + { 0x00802001, 0x21400061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000001e }, + { 0x02600005, 0x20000c20, 0x00000150, 0x00004000 }, + { 0x00210002, 0x20700421, 0x02450038, 0x00450030 }, + { 0x00000001, 0x20680129, 0x0000015c, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x02600005, 0x20001d20, 0x0000015c, 0x00000010 }, + { 0x00210002, 0x20700421, 0x02450028, 0x00450020 }, + { 0x01600005, 0x20001d20, 0x0200015c, 0x00000001 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x02610005, 0x20001c20, 0x02000150, 0x00008000 }, + { 0x02610005, 0x20001d20, 0x0200015c, 0x00000010 }, + { 0x00010006, 0x20681d29, 0x0200015c, 0x00000010 }, + { 0x02800005, 0x2000452c, 0x02000068, 0x000d0070 }, + { 0x00000009, 0x21443d09, 0x00000602, 0x000c000c }, + { 0x00000005, 0x21462d09, 0x00000602, 0xf000f000 }, + { 0x00200001, 0x41440231, 0x00660064, 0x00000000 }, + { 0x00200001, 0x20640229, 0x00450194, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x02000190, 0x01000000 }, + { 0x02600005, 0x20000c20, 0x00000190, 0x00004000 }, + { 0x00600041, 0x24003e2c, 0x00000195, 0x00020002 }, + { 0x00110001, 0x2066018d, 0x02000400, 0x00000000 }, + { 0x00010040, 0x20663d8d, 0x02000400, 0x00010001 }, + { 0x00110001, 0x2066022d, 0x00000195, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x00000190, 0x00002000 }, + { 0x02600005, 0x20001d20, 0x02000066, 0x00000001 }, + { 0x00000006, 0x21881c21, 0x00000188, 0x00200000 }, + { 0x00200001, 0x21840129, 0x00450064, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00800041, 0x24002528, 0x00000066, 0x00000044 }, + { 0x00800040, 0x24002508, 0x008d0400, 0x00000064 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d0180, 0x00000000 }, + { 0x00802001, 0x21800061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000001e }, + { 0x02600005, 0x20000c20, 0x00000190, 0x00004000 }, + { 0x00210002, 0x20700421, 0x02450038, 0x00450030 }, + { 0x00000001, 0x20680129, 0x0000019c, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x02600005, 0x20001d20, 0x0000019c, 0x00000010 }, + { 0x00210002, 0x20700421, 0x02450028, 0x00450020 }, + { 0x01600005, 0x20001d20, 0x0200019c, 0x00000001 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x02610005, 0x20001c20, 0x02000190, 0x00008000 }, + { 0x02610005, 0x20001d20, 0x0200019c, 0x00000010 }, + { 0x00010006, 0x20681d29, 0x0200019c, 0x00000010 }, + { 0x02800005, 0x2000452c, 0x02000068, 0x000d0070 }, + { 0x00000009, 0x21843d09, 0x00000602, 0x000c000c }, + { 0x00000005, 0x21862d09, 0x00000602, 0xf000f000 }, + { 0x00200001, 0x41840231, 0x00660064, 0x00000000 }, + { 0x00200001, 0x20640229, 0x004501d4, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x020001d0, 0x01000000 }, + { 0x02600005, 0x20000c20, 0x000001d0, 0x00004000 }, + { 0x00600041, 0x24003e2c, 0x000001d5, 0x00020002 }, + { 0x00110001, 0x2066018d, 0x02000400, 0x00000000 }, + { 0x00010040, 0x20663d8d, 0x02000400, 0x00010001 }, + { 0x00110001, 0x2066022d, 0x000001d5, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x000001d0, 0x00002000 }, + { 0x02600005, 0x20001d20, 0x02000066, 0x00000001 }, + { 0x00000006, 0x21c81c21, 0x000001c8, 0x00200000 }, + { 0x00200001, 0x21c40129, 0x00450064, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00800041, 0x24002528, 0x00000066, 0x00000044 }, + { 0x00800040, 0x24002508, 0x008d0400, 0x00000064 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d01c0, 0x00000000 }, + { 0x00802001, 0x21c00061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000001e }, + { 0x02600005, 0x20000c20, 0x000001d0, 0x00004000 }, + { 0x00210002, 0x20700421, 0x02450038, 0x00450030 }, + { 0x00000001, 0x20680129, 0x000001dc, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x02600005, 0x20001d20, 0x000001dc, 0x00000010 }, + { 0x00210002, 0x20700421, 0x02450028, 0x00450020 }, + { 0x01600005, 0x20001d20, 0x020001dc, 0x00000001 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x02610005, 0x20001c20, 0x020001d0, 0x00008000 }, + { 0x02610005, 0x20001d20, 0x020001dc, 0x00000010 }, + { 0x00010006, 0x20681d29, 0x020001dc, 0x00000010 }, + { 0x02800005, 0x2000452c, 0x02000068, 0x000d0070 }, + { 0x00000009, 0x21c43d09, 0x00000602, 0x000c000c }, + { 0x00000005, 0x21c62d09, 0x00000602, 0xf000f000 }, + { 0x00200001, 0x41c40231, 0x00660064, 0x00000000 }, + { 0x00200001, 0x20640229, 0x00450214, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x02000210, 0x01000000 }, + { 0x02600005, 0x20000c20, 0x00000210, 0x00004000 }, + { 0x00600041, 0x24003e2c, 0x00000215, 0x00020002 }, + { 0x00110001, 0x2066018d, 0x02000400, 0x00000000 }, + { 0x00010040, 0x20663d8d, 0x02000400, 0x00010001 }, + { 0x00110001, 0x2066022d, 0x00000215, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x00000210, 0x00002000 }, + { 0x02600005, 0x20001d20, 0x02000066, 0x00000001 }, + { 0x00000006, 0x22081c21, 0x00000208, 0x00200000 }, + { 0x00200001, 0x22040129, 0x00450064, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00800041, 0x24002528, 0x00000066, 0x00000044 }, + { 0x00800040, 0x24002508, 0x008d0400, 0x00000064 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d0200, 0x00000000 }, + { 0x00802001, 0x22000061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000001e }, + { 0x02600005, 0x20000c20, 0x00000210, 0x00004000 }, + { 0x00210002, 0x20700421, 0x02450038, 0x00450030 }, + { 0x00000001, 0x20680129, 0x0000021c, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x02600005, 0x20001d20, 0x0000021c, 0x00000010 }, + { 0x00210002, 0x20700421, 0x02450028, 0x00450020 }, + { 0x01600005, 0x20001d20, 0x0200021c, 0x00000001 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x02610005, 0x20001c20, 0x02000210, 0x00008000 }, + { 0x02610005, 0x20001d20, 0x0200021c, 0x00000010 }, + { 0x00010006, 0x20681d29, 0x0200021c, 0x00000010 }, + { 0x02800005, 0x2000452c, 0x02000068, 0x000d0070 }, + { 0x00000009, 0x22043d09, 0x00000602, 0x000c000c }, + { 0x00000005, 0x22062d09, 0x00000602, 0xf000f000 }, + { 0x00200001, 0x42040231, 0x00660064, 0x00000000 }, + { 0x00200001, 0x20640229, 0x00450254, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x02000250, 0x01000000 }, + { 0x02600005, 0x20000c20, 0x00000250, 0x00004000 }, + { 0x00600041, 0x24003e2c, 0x00000255, 0x00020002 }, + { 0x00110001, 0x2066018d, 0x02000400, 0x00000000 }, + { 0x00010040, 0x20663d8d, 0x02000400, 0x00010001 }, + { 0x00110001, 0x2066022d, 0x00000255, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x00000250, 0x00002000 }, + { 0x02600005, 0x20001d20, 0x02000066, 0x00000001 }, + { 0x00000006, 0x22481c21, 0x00000248, 0x00200000 }, + { 0x00200001, 0x22440129, 0x00450064, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00800041, 0x24002528, 0x00000066, 0x00000044 }, + { 0x00800040, 0x24002508, 0x008d0400, 0x00000064 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d0240, 0x00000000 }, + { 0x00802001, 0x22400061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000001e }, + { 0x02600005, 0x20000c20, 0x00000250, 0x00004000 }, + { 0x00210002, 0x20700421, 0x02450038, 0x00450030 }, + { 0x00000001, 0x20680129, 0x0000025c, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x02600005, 0x20001d20, 0x0000025c, 0x00000010 }, + { 0x00210002, 0x20700421, 0x02450028, 0x00450020 }, + { 0x01600005, 0x20001d20, 0x0200025c, 0x00000001 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x02610005, 0x20001c20, 0x02000250, 0x00008000 }, + { 0x02610005, 0x20001d20, 0x0200025c, 0x00000010 }, + { 0x00010006, 0x20681d29, 0x0200025c, 0x00000010 }, + { 0x02800005, 0x2000452c, 0x02000068, 0x000d0070 }, + { 0x00000009, 0x22443d09, 0x00000602, 0x000c000c }, + { 0x00000005, 0x22462d09, 0x00000602, 0xf000f000 }, + { 0x00200001, 0x42440231, 0x00660064, 0x00000000 }, + { 0x01000040, 0x20423dad, 0x00000042, 0xfff8fff8 }, + { 0x00600001, 0x21600022, 0x008d07e0, 0x00000000 }, + { 0x00802001, 0x21800022, 0x008d0080, 0x00000000 }, + { 0x00802001, 0x21c00022, 0x008d00c0, 0x00000000 }, + { 0x0b800031, 0x20001d0c, 0x508d0000, 0x0a080400 }, + { 0x00600001, 0x20200022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20280c22, 0x000007e8, 0x00000080 }, + { 0x00802001, 0x20400022, 0x008d0100, 0x00000000 }, + { 0x00802001, 0x20800022, 0x008d0140, 0x00000000 }, + { 0x01800031, 0x20001d0c, 0x508d0000, 0x0a080400 }, + { 0x00000040, 0x21680c22, 0x000007e8, 0x00000100 }, + { 0x00802001, 0x21800022, 0x008d0180, 0x00000000 }, + { 0x00802001, 0x21c00022, 0x008d01c0, 0x00000000 }, + { 0x0b800031, 0x20001d0c, 0x508d0000, 0x0a080400 }, + { 0x00000040, 0x20280c22, 0x000007e8, 0x00000180 }, + { 0x00802001, 0x20400022, 0x008d0200, 0x00000000 }, + { 0x00802001, 0x20800022, 0x008d0240, 0x00000000 }, + { 0x01800031, 0x20001d0c, 0x508d0000, 0x0a080400 }, + { 0x00000040, 0x27e80c21, 0x000007e8, 0x00000200 }, + { 0x01000010, 0x20002da0, 0x02000060, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x00001400, 0xfffffda0 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000006e }, + { 0x00600001, 0x20200022, 0x008d07e0, 0x00000000 }, + { 0x01800031, 0x20801d09, 0x408d0000, 0x02488400 }, + { 0x00600001, 0x20400022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20480c22, 0x000007e8, 0x00000080 }, + { 0x02800031, 0x21001d09, 0x408d0000, 0x02488400 }, + { 0x00600001, 0x20600022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20680c22, 0x000007e8, 0x00000100 }, + { 0x03800031, 0x21801d09, 0x408d0000, 0x02488400 }, + { 0x00600001, 0x20800022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20880c22, 0x000007e8, 0x00000180 }, + { 0x04800031, 0x22001d09, 0x408d0000, 0x02488400 }, + { 0x00000001, 0x220400e0, 0x00000000, 0x00a00080 }, + { 0x00600001, 0x20a00022, 0x008d0000, 0x00000000 }, + { 0x00200001, 0x20640229, 0x00458814, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x02008810, 0x01000000 }, + { 0x02600005, 0x20000c20, 0x00008810, 0x00004000 }, + { 0x00600041, 0x24003e2c, 0x00008815, 0x00020002 }, + { 0x00110001, 0x2066018d, 0x02000400, 0x00000000 }, + { 0x00010040, 0x20663d8d, 0x02000400, 0x00010001 }, + { 0x00110001, 0x2066022d, 0x00008815, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x00008810, 0x00002000 }, + { 0x01000040, 0x20603dad, 0x02000060, 0xffffffff }, + { 0x00000006, 0xa8080c21, 0x00008808, 0x00200000 }, + { 0x00200001, 0xa8040129, 0x00450064, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00800041, 0x24002528, 0x00000066, 0x00000044 }, + { 0x00800040, 0x24002508, 0x008d0400, 0x00000064 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d8800, 0x00000000 }, + { 0x00802001, 0xa8000061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000022 }, + { 0x02600005, 0x20000d20, 0x02000066, 0x00000001 }, + { 0x02600005, 0x20000c20, 0x00008810, 0x00004000 }, + { 0x00000001, 0x20680129, 0x0000881c, 0x00000000 }, + { 0x00210002, 0x20700421, 0x02450038, 0x00450030 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x02600005, 0x20001d20, 0x0000881c, 0x00000010 }, + { 0x00210002, 0x20700421, 0x02450028, 0x00450020 }, + { 0x01600005, 0x20001d20, 0x0200881c, 0x00000001 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x02610005, 0x20001c20, 0x02008810, 0x00008000 }, + { 0x02610005, 0x20001d20, 0x0200881c, 0x00000010 }, + { 0x00010006, 0x20681d29, 0x0200881c, 0x00000010 }, + { 0x02800005, 0x2000452c, 0x00000068, 0x000d0070 }, + { 0x01000040, 0x20603dad, 0x02000060, 0x00000000 }, + { 0x00000009, 0xa8043d09, 0x00000600, 0x000c000c }, + { 0x00000005, 0xa8062d09, 0x00000600, 0xf000f000 }, + { 0x00200001, 0xc8040231, 0x00660064, 0x00000000 }, + { 0x00600001, 0x21600022, 0x008d07e0, 0x00000000 }, + { 0x00802001, 0x21800022, 0x008d8800, 0x00000000 }, + { 0x0b800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x00000040, 0x27e80c21, 0x000007e8, 0x00000040 }, + { 0x00000040, 0x22040c00, 0x00000204, 0x00400040 }, + { 0x00110220, 0x34001c00, 0x02001400, 0xffffffac }, + { 0x01600031, 0x20001c20, 0x708d0000, 0x82000010 }, + { 0x01600031, 0x20001c20, 0x708d0000, 0x82000010 }, + { 0x01600031, 0x20001c20, 0x708d0000, 0x82000010 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, + { 0x00a02001, 0x20400169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x206601ed, 0x00000000, 0x00030003 }, + { 0x00000009, 0x20663dad, 0x00000066, 0x000a000a }, + { 0x00000008, 0x22403dad, 0x00000026, 0x00010001 }, + { 0x00000041, 0x224235ad, 0x00000020, 0x00000022 }, + { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 }, + { 0x00000001, 0x203c0022, 0x00000018, 0x00000000 }, + { 0x00000001, 0x203f01f2, 0x00000000, 0x00000000 }, + { 0x00000001, 0x202c00e2, 0x00000000, 0x00000000 }, + { 0x00000001, 0x202c010a, 0x00000e00, 0x00000000 }, + { 0x00600001, 0x20400021, 0x008d0020, 0x00000000 }, + { 0x00400001, 0x205401ed, 0x00000000, 0x00000000 }, + { 0x00200040, 0x20583dad, 0x00450020, 0xffffffff }, + { 0x00000001, 0x22000060, 0x00000000, 0x06080000 }, + { 0x00600001, 0x26000021, 0x008d0000, 0x00000000 }, + { 0x00000001, 0x26140061, 0x00000000, 0x00c00400 }, + { 0x00000001, 0x26100169, 0x00000000, 0x12121212 }, + { 0x07600031, 0x26201c21, 0x308d0600, 0x02000000 }, + { 0x00000001, 0x22a00169, 0x00000000, 0x01400140 }, + { 0x00000040, 0x20283c22, 0x00000008, 0x00200020 }, + { 0x00000001, 0x203801e2, 0x00000000, 0x00010001 }, + { 0x00800001, 0x204001ae, 0x00b10020, 0x00000000 }, + { 0x00000008, 0x27e03d29, 0x000002a0, 0x00010001 }, + { 0x00800031, 0x20000128, 0x608d07e0, 0x00000200 }, + { 0x00000006, 0x203025a2, 0x00000066, 0x000002a0 }, + { 0x01600031, 0x20001c00, 0x708d0000, 0x02000001 }, + { 0x00000001, 0x20300022, 0x00000010, 0x00000000 }, + { 0x00000001, 0x22a00169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22600169, 0x00000000, 0x00020002 }, + { 0x00200401, 0x208000e5, 0x00000000, 0x00000000 }, + { 0x00000c01, 0x208800e5, 0x00000000, 0xffffffc6 }, + { 0x00000801, 0x208c00e5, 0x00000000, 0xffffffca }, + { 0x00200001, 0x260001ec, 0x00000000, 0x00000000 }, + { 0x00600001, 0x20000022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20283c22, 0x00000008, 0x00100010 }, + { 0x00000001, 0x206001ed, 0x00000000, 0x00020002 }, + { 0x00000001, 0x206201ad, 0x0000005a, 0x00000000 }, + { 0x00000001, 0x20a001ed, 0x00000000, 0x00000000 }, + { 0x00200001, 0x228001ed, 0x00000000, 0x00000000 }, + { 0x00802001, 0x20c00061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21000061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21400061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21800061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21c00061, 0x00000000, 0x00ff00ff }, + { 0x00000041, 0x22083dac, 0x00000056, 0x00040004 }, + { 0x05000010, 0x200035ac, 0x02000280, 0x00000240 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000004 }, + { 0x00000040, 0x22803dad, 0x00000280, 0xffffffff }, + { 0x00000030, 0x32000084, 0x00001200, 0x00000000 }, + { 0x01000010, 0x20002d28, 0x000090c2, 0x00000000 }, + { 0x03000010, 0x200035ac, 0x02000054, 0x00000058 }, + { 0x00000041, 0x22a03dad, 0x00000056, 0x00040004 }, + { 0x00010220, 0x34001c00, 0x00001400, 0xfffffff4 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000014 }, + { 0x00200001, 0xb0c00229, 0x00450054, 0x00000000 }, + { 0x00200040, 0x22803dad, 0x00450280, 0x00010001 }, + { 0x00000001, 0x20300022, 0x00000010, 0x00000000 }, + { 0x00000001, 0x20380122, 0x00000260, 0x00000000 }, + { 0x00800001, 0x204001ae, 0x00b10040, 0x00000000 }, + { 0x00000008, 0x20003d2a, 0x000002a0, 0x00010001 }, + { 0x00000040, 0x22602d29, 0x00000260, 0x00020002 }, + { 0x00800031, 0x20000008, 0x608d0000, 0x00000200 }, + { 0x00000006, 0x203025a2, 0x00000066, 0x000002a0 }, + { 0x01600031, 0x20001c00, 0x708d0000, 0x02000001 }, + { 0x04200010, 0x200035ac, 0x00450054, 0x00450060 }, + { 0x00010040, 0x20a03dad, 0x02000056, 0x00010001 }, + { 0x05200010, 0x200035ac, 0x02450280, 0x00450240 }, + { 0x00000001, 0x240001ec, 0x00000000, 0x00040004 }, + { 0x00000048, 0x22083dac, 0x00000056, 0x00040004 }, + { 0x00200040, 0x205455ad, 0x00450054, 0x00450034 }, + { 0x02000010, 0x20003d8c, 0x00000600, 0x00010001 }, + { 0x00000041, 0x220e3d8c, 0x00000602, 0x00040004 }, + { 0x00010041, 0x22083dac, 0x000000a0, 0x00040004 }, + { 0x00010401, 0x205601ad, 0x000000a0, 0x00000000 }, + { 0x00010840, 0x20543d2d, 0x000090c0, 0x00010001 }, + { 0x00000220, 0x34001400, 0x00001400, 0x00009c80 }, + { 0x01000010, 0x20003dac, 0x02000280, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000006 }, + { 0x00000030, 0x32000084, 0x00001200, 0x00000000 }, + { 0x00000040, 0x22803dad, 0x00000280, 0xffffffff }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffff6 }, + { 0x05000010, 0x200035ac, 0x00000240, 0x00000026 }, + { 0x00010220, 0x34001c00, 0x00001400, 0xfffffffc }, + { 0x07600031, 0x20001c20, 0x30000000, 0x02000001 }, + { 0x01600031, 0x20001c24, 0x708d0000, 0x82000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, + { 0x00600009, 0x25c03dad, 0x00050034, 0x00040004 }, + { 0x00000001, 0x220801ec, 0x00000000, 0x02400240 }, + { 0x00000041, 0x20263d29, 0x00000036, 0x00040004 }, + { 0x00000041, 0x25e435a1, 0x00000020, 0x00000036 }, + { 0x00000040, 0x25e43421, 0x000005e4, 0x00000034 }, + { 0x00000041, 0x27e82c21, 0x000005e4, 0x00400040 }, + { 0x01600031, 0x22401c21, 0x408d07e0, 0x02885800 }, + { 0x01800005, 0x20002d28, 0x02b19040, 0xffffffff }, + { 0x02000005, 0x20003e2c, 0x00009030, 0x00010001 }, + { 0x00000040, 0x25c43dad, 0x000005c4, 0xfffcfffc }, + { 0x00000001, 0x25e20129, 0x00000036, 0x00000000 }, + { 0x000b0220, 0x34001c00, 0x02001400, 0x00000178 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000176 }, + { 0x00000040, 0x25ca3dad, 0x000005ca, 0xfffcfffc }, + { 0x00200401, 0x27e001a1, 0x004505c0, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x000f000f }, + { 0x00000001, 0x22000060, 0x00000000, 0x0288a001 }, + { 0x01600031, 0x20c00021, 0x408d07e0, 0x00000200 }, + { 0x00200401, 0x27e001a1, 0x004505c8, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0003000f }, + { 0x00000001, 0x22000060, 0x00000000, 0x02286003 }, + { 0x03600031, 0x20800021, 0x408d07e0, 0x00000200 }, + { 0x00800401, 0x23800231, 0x00a900c0, 0x00000000 }, + { 0x00800801, 0x23900231, 0x00a90100, 0x00000000 }, + { 0x00800401, 0x23a00231, 0x00a90140, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00a90180, 0x00000000 }, + { 0x00800401, 0x23c00231, 0x00a900c4, 0x00000000 }, + { 0x00800801, 0x23d00231, 0x00a90104, 0x00000000 }, + { 0x00800401, 0x23e00231, 0x00a90144, 0x00000000 }, + { 0x00800801, 0x23f00231, 0x00a90184, 0x00000000 }, + { 0x00800401, 0x24000231, 0x00a900c8, 0x00000000 }, + { 0x00800801, 0x24100231, 0x00a90108, 0x00000000 }, + { 0x00800401, 0x24200231, 0x00a90148, 0x00000000 }, + { 0x00800801, 0x24300231, 0x00a90188, 0x00000000 }, + { 0x00800401, 0x24400231, 0x00a900cc, 0x00000000 }, + { 0x00800801, 0x24500231, 0x00a9010c, 0x00000000 }, + { 0x00800401, 0x24600231, 0x00a9014c, 0x00000000 }, + { 0x00800801, 0x24700231, 0x00a9018c, 0x00000000 }, + { 0x00800401, 0x20c00231, 0x00cf0380, 0x00000000 }, + { 0x00800801, 0x20d00231, 0x00cf0381, 0x00000000 }, + { 0x00800401, 0x20e00231, 0x00cf0382, 0x00000000 }, + { 0x00800801, 0x20f00231, 0x00cf0383, 0x00000000 }, + { 0x00800401, 0x21000231, 0x00cf03c0, 0x00000000 }, + { 0x00800801, 0x21100231, 0x00cf03c1, 0x00000000 }, + { 0x00800401, 0x21200231, 0x00cf03c2, 0x00000000 }, + { 0x00800801, 0x21300231, 0x00cf03c3, 0x00000000 }, + { 0x00800401, 0x21400231, 0x00cf0400, 0x00000000 }, + { 0x00800801, 0x21500231, 0x00cf0401, 0x00000000 }, + { 0x00800401, 0x21600231, 0x00cf0402, 0x00000000 }, + { 0x00800801, 0x21700231, 0x00cf0403, 0x00000000 }, + { 0x00800401, 0x21800231, 0x00cf0440, 0x00000000 }, + { 0x00800801, 0x21900231, 0x00cf0441, 0x00000000 }, + { 0x00800401, 0x21a00231, 0x00cf0442, 0x00000000 }, + { 0x00800801, 0x21b00231, 0x00cf0443, 0x00000000 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00400040 }, + { 0x00000008, 0x25e83e2d, 0x00009080, 0x00020002 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00400040 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c000c0 }, + { 0x00200401, 0x25d0022d, 0x00459080, 0x00000000 }, + { 0x00200c01, 0x25d80129, 0x00459050, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x00699060, 0x00000000 }, + { 0x00000040, 0x25e83dad, 0x000005e8, 0x00020002 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000134 }, + { 0x00000008, 0x25e83e2d, 0x00009084, 0x00020002 }, + { 0x00200401, 0x25d0022d, 0x00459084, 0x00000000 }, + { 0x00000801, 0x25da01e9, 0x00000000, 0x00000000 }, + { 0x00000040, 0x25e83dad, 0x000005e8, 0x00020002 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00200020 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00c000c0 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01000100 }, + { 0x00000401, 0x25d80129, 0x00009040, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x00699064, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000011e }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00100010 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x01000100 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01400140 }, + { 0x00000401, 0x25d80129, 0x00009042, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x00699068, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000110 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00200020 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x01400140 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01800180 }, + { 0x00000401, 0x25d80129, 0x00009044, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x0069906c, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000102 }, + { 0x00200401, 0x27e001a1, 0x004505c4, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x000f0003 }, + { 0x00800401, 0x23400231, 0x00a90040, 0x00000000 }, + { 0x00800801, 0x23500231, 0x00a90044, 0x00000000 }, + { 0x00800401, 0x23600231, 0x00a90048, 0x00000000 }, + { 0x00800801, 0x23700231, 0x00a9004c, 0x00000000 }, + { 0x00800001, 0x20400232, 0x002b0340, 0x00000000 }, + { 0x00800001, 0x20500232, 0x002b0350, 0x00000000 }, + { 0x00800001, 0x20600232, 0x002b0360, 0x00000000 }, + { 0x00800001, 0x20700232, 0x002b0370, 0x00000000 }, + { 0x00000001, 0x22000060, 0x00000000, 0x06082003 }, + { 0x01600031, 0x20000020, 0x508d07e0, 0x00000200 }, + { 0x00800401, 0x23800231, 0x00a900c0, 0x00000000 }, + { 0x00800801, 0x23900231, 0x00a90100, 0x00000000 }, + { 0x00800401, 0x23a00231, 0x00a90140, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00a90180, 0x00000000 }, + { 0x00800401, 0x23c00231, 0x00a900c4, 0x00000000 }, + { 0x00800801, 0x23d00231, 0x00a90104, 0x00000000 }, + { 0x00800401, 0x23e00231, 0x00a90144, 0x00000000 }, + { 0x00800801, 0x23f00231, 0x00a90184, 0x00000000 }, + { 0x00800401, 0x24000231, 0x00a900c8, 0x00000000 }, + { 0x00800801, 0x24100231, 0x00a90108, 0x00000000 }, + { 0x00800401, 0x24200231, 0x00a90148, 0x00000000 }, + { 0x00800801, 0x24300231, 0x00a90188, 0x00000000 }, + { 0x00800401, 0x24400231, 0x00a900cc, 0x00000000 }, + { 0x00800801, 0x24500231, 0x00a9010c, 0x00000000 }, + { 0x00800401, 0x24600231, 0x00a9014c, 0x00000000 }, + { 0x00800801, 0x24700231, 0x00a9018c, 0x00000000 }, + { 0x00800401, 0x20c00231, 0x00cf0380, 0x00000000 }, + { 0x00800801, 0x20d00231, 0x00cf0381, 0x00000000 }, + { 0x00800401, 0x20e00231, 0x00cf0382, 0x00000000 }, + { 0x00800801, 0x20f00231, 0x00cf0383, 0x00000000 }, + { 0x00800401, 0x21000231, 0x00cf03c0, 0x00000000 }, + { 0x00800801, 0x21100231, 0x00cf03c1, 0x00000000 }, + { 0x00800401, 0x21200231, 0x00cf03c2, 0x00000000 }, + { 0x00800801, 0x21300231, 0x00cf03c3, 0x00000000 }, + { 0x00800401, 0x21400231, 0x00cf0400, 0x00000000 }, + { 0x00800801, 0x21500231, 0x00cf0401, 0x00000000 }, + { 0x00800401, 0x21600231, 0x00cf0402, 0x00000000 }, + { 0x00800801, 0x21700231, 0x00cf0403, 0x00000000 }, + { 0x00800401, 0x21800231, 0x00cf0440, 0x00000000 }, + { 0x00800801, 0x21900231, 0x00cf0441, 0x00000000 }, + { 0x00800401, 0x21a00231, 0x00cf0442, 0x00000000 }, + { 0x00800801, 0x21b00231, 0x00cf0443, 0x00000000 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00800080 }, + { 0x00000008, 0x25e83e2d, 0x00009082, 0x00020002 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00800080 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c000c0 }, + { 0x00200401, 0x25d0022d, 0x00459082, 0x00000000 }, + { 0x00200c01, 0x25d80129, 0x00459054, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x00699070, 0x00000000 }, + { 0x00000040, 0x25e83dad, 0x000005e8, 0x00020002 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000096 }, + { 0x00000008, 0x25e83e2d, 0x00009084, 0x00020002 }, + { 0x00200401, 0x25d0022d, 0x00459084, 0x00000000 }, + { 0x00000801, 0x25da01e9, 0x00000000, 0x00000000 }, + { 0x00000040, 0x25e83dad, 0x000005e8, 0x00020002 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00200020 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00c000c0 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01000100 }, + { 0x00000401, 0x25d80129, 0x00009046, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x00699074, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000080 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00100010 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x01000100 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01400140 }, + { 0x00000401, 0x25d80129, 0x00009048, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x00699078, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000072 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00200020 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x01400140 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01800180 }, + { 0x00000401, 0x25d80129, 0x0000904a, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x0069907c, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000064 }, + { 0x00200401, 0x27e001a1, 0x004505c0, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x000f000f }, + { 0x00802001, 0x20400022, 0x008d00c0, 0x00000000 }, + { 0x00802001, 0x20800022, 0x008d0100, 0x00000000 }, + { 0x00802001, 0x20c00022, 0x008d0140, 0x00000000 }, + { 0x00802001, 0x21000022, 0x008d0180, 0x00000000 }, + { 0x00000001, 0x22000060, 0x00000000, 0x12082003 }, + { 0x01600031, 0x20000020, 0x508d07e0, 0x00000200 }, + { 0x00200401, 0x27e001a1, 0x004505c8, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0003000f }, + { 0x00802001, 0x20400022, 0x008d0080, 0x00000000 }, + { 0x00000001, 0x22000060, 0x00000000, 0x0618a003 }, + { 0x01600031, 0x26400021, 0x508d07e0, 0x00000200 }, + { 0x00800401, 0x23400231, 0x00a900cc, 0x00000000 }, + { 0x00800801, 0x23500231, 0x00a9010c, 0x00000000 }, + { 0x00800401, 0x23600231, 0x00a9014c, 0x00000000 }, + { 0x00800801, 0x23700231, 0x00a9018c, 0x00000000 }, + { 0x00800401, 0x23800231, 0x00cf0340, 0x00000000 }, + { 0x00800801, 0x23900231, 0x00cf0341, 0x00000000 }, + { 0x00800401, 0x23a00231, 0x00cf0342, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00cf0343, 0x00000000 }, + { 0x00802001, 0x202000a2, 0x008d0380, 0x00000000 }, + { 0x00000008, 0x27e03d29, 0x00000026, 0x00010001 }, + { 0x00800031, 0x20001d28, 0x608d07e0, 0x06080020 }, + { 0x00600001, 0x26400021, 0x008d0640, 0x00000000 }, + { 0x00600001, 0x260001e1, 0x00000000, 0x00000000 }, + { 0x00000009, 0x26143da1, 0x000005e2, 0x00120012 }, + { 0x00000440, 0x26141c21, 0x00000614, 0x00020000 }, + { 0x00000c01, 0x26120129, 0x0000000c, 0x00000000 }, + { 0x00000c01, 0x26100169, 0x00000000, 0x12121212 }, + { 0x00400801, 0x26000171, 0x00000000, 0xffffffff }, + { 0x00600031, 0x20001c20, 0x308d0600, 0x82008002 }, + { 0x00000440, 0x27e03da1, 0x000005c0, 0x000c000c }, + { 0x00000c01, 0x27e401a1, 0x000005c2, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x000f0003 }, + { 0x02600031, 0x23401c25, 0x408d07e0, 0x02286003 }, + { 0x00800401, 0x23800231, 0x00cf0340, 0x00000000 }, + { 0x00800801, 0x23900231, 0x00cf0341, 0x00000000 }, + { 0x00800401, 0x23a00231, 0x00cf0342, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00cf0343, 0x00000000 }, + { 0x00802001, 0x202000a2, 0x008d0380, 0x00000000 }, + { 0x00000008, 0x27e03d29, 0x00000026, 0x00010001 }, + { 0x00800031, 0x20001d28, 0x608d07e0, 0x06080020 }, + { 0x00600001, 0x260001e1, 0x00000000, 0x00000000 }, + { 0x00000009, 0x26143da1, 0x000005e2, 0x00120012 }, + { 0x00000440, 0x26141c21, 0x00000614, 0x00020000 }, + { 0x00000c01, 0x26120129, 0x0000000c, 0x00000000 }, + { 0x00000c01, 0x26100169, 0x00000000, 0x12121212 }, + { 0x00400801, 0x26000171, 0x00000000, 0xffffffff }, + { 0x00600031, 0x20001c20, 0x308d0600, 0x82008002 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00800040, 0x2400462d, 0x00b19c00, 0x00b1d830 }, + { 0x00800040, 0x2340462d, 0x00b19820, 0x00b1d830 }, + { 0x00800040, 0x2360462d, 0x00b19c10, 0x00b1dc00 }, + { 0x05810010, 0x200035ac, 0x008d2400, 0x000005d0 }, + { 0x05810010, 0x200035ac, 0x008d2340, 0x000005d2 }, + { 0x05810010, 0x200035ac, 0x008d2360, 0x000005d2 }, + { 0x00818022, 0x34001c00, 0x00001400, 0x000000ca }, + { 0x00800040, 0x2440462d, 0x00b19810, 0x00b1d830 }, + { 0x00800040, 0x2460462d, 0x00b19c20, 0x00b1dc00 }, + { 0x00800201, 0x24a00129, 0x00b19820, 0x00000000 }, + { 0x00818022, 0x34001c00, 0x02001400, 0x00000066 }, + { 0x05800010, 0x200035ac, 0x028d2400, 0x000005e8 }, + { 0x00800040, 0x2520462d, 0x00b19830, 0x00b19820 }, + { 0x00800040, 0x2540462d, 0x00b19c00, 0x00b19c10 }, + { 0x00000201, 0x26000108, 0x00000602, 0x00000000 }, + { 0x05810010, 0x200035ac, 0x028d2440, 0x000005d2 }, + { 0x05810010, 0x200035ac, 0x008d2460, 0x000005d2 }, + { 0x00818022, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x00800040, 0x2560462d, 0x00b19810, 0x00b19800 }, + { 0x00800040, 0x238045ad, 0x008d0520, 0x00b19c00 }, + { 0x00800040, 0x24003d8c, 0x00b10400, 0x00040004 }, + { 0x00800040, 0x23a0458d, 0x00b10400, 0x00b19810 }, + { 0x00800048, 0x24003dac, 0x008d0560, 0x00020002 }, + { 0x80800008, 0x43c03d91, 0x00b10400, 0x00030003 }, + { 0x00800040, 0x24003dac, 0x00b103a0, 0xfffefffe }, + { 0x80800008, 0x43603d91, 0x00b10400, 0x00020002 }, + { 0x00800040, 0x2400362c, 0x00b19c10, 0x00b10380 }, + { 0x00800040, 0x2400358c, 0x00b10400, 0x00b103a0 }, + { 0x80800008, 0x43403d91, 0x00b10400, 0x00030003 }, + { 0x00800001, 0xb8100231, 0x00ae03c0, 0x00000000 }, + { 0x00800001, 0xb8200231, 0x00ae0360, 0x00000000 }, + { 0x00800001, 0xb8300231, 0x00ae0340, 0x00000000 }, + { 0x00808024, 0x34001c00, 0x00001400, 0x0001000e }, + { 0x00800040, 0x2400362c, 0x00b19820, 0x008d0520 }, + { 0x00800040, 0x2400458c, 0x00b10400, 0x00b19c10 }, + { 0x00800040, 0x24003d8c, 0x00b10400, 0x00020002 }, + { 0x80800008, 0x43403d91, 0x00b10400, 0x00020002 }, + { 0x00800001, 0xb8300231, 0x00ae0340, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00818022, 0x34001c00, 0x00001400, 0x0000001e }, + { 0x00800040, 0x2580462d, 0x00b19c20, 0x00b19c30 }, + { 0x00800040, 0x238045ad, 0x008d0540, 0x008d04b0 }, + { 0x00800040, 0x24003d8c, 0x00b10400, 0x00040004 }, + { 0x00800040, 0x23a0458d, 0x00b10400, 0x00b19c20 }, + { 0x00800048, 0x24003dac, 0x008d0580, 0x00020002 }, + { 0x80800008, 0x43c03d91, 0x00b10400, 0x00030003 }, + { 0x00800040, 0x24003dac, 0x00b103a0, 0xfffefffe }, + { 0x80800008, 0x43603d91, 0x00b10400, 0x00020002 }, + { 0x00800040, 0x2400362c, 0x008d04a0, 0x00b10380 }, + { 0x00800040, 0x2400358c, 0x00b10400, 0x00b103a0 }, + { 0x80800008, 0x43403d91, 0x00b10400, 0x00030003 }, + { 0x00800001, 0xbc200231, 0x00ae03c0, 0x00000000 }, + { 0x00800001, 0xbc100231, 0x00ae0360, 0x00000000 }, + { 0x00800001, 0xbc000231, 0x00ae0340, 0x00000000 }, + { 0x00808024, 0x34001c00, 0x00001400, 0x0001000e }, + { 0x00800040, 0x2400362c, 0x008d04a0, 0x008d0540 }, + { 0x00800040, 0x2400458c, 0x00b10400, 0x00b19c10 }, + { 0x00800040, 0x24003d8c, 0x00b10400, 0x00020002 }, + { 0x80800008, 0x43403d91, 0x00b10400, 0x00020002 }, + { 0x00800001, 0xbc000231, 0x00ae0340, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00808024, 0x34001c00, 0x00001400, 0x0001005c }, + { 0x00800201, 0x23e0022d, 0x002805d4, 0x00000000 }, + { 0x00800201, 0x23c0022d, 0x002805d4, 0x00000000 }, + { 0x05800010, 0x200035ac, 0x008d2440, 0x000005d2 }, + { 0x05800010, 0x200035ac, 0x028d2460, 0x000005d2 }, + { 0x00800040, 0x24003e2c, 0x00b19820, 0x00040004 }, + { 0x00800048, 0x24003dac, 0x008d0400, 0x00040004 }, + { 0x00800040, 0x2400458c, 0x00b10400, 0x00b1dc10 }, + { 0x00800008, 0x23403d8d, 0x00b10400, 0x00030003 }, + { 0x00810040, 0x23e03dad, 0x008d03e0, 0x00010001 }, + { 0x00200201, 0x25ec018d, 0x00450600, 0x00000000 }, + { 0x00810040, 0x23e03dad, 0x028d03e0, 0x00010001 }, + { 0x03800010, 0x200035ac, 0x008d0340, 0x008d03e0 }, + { 0x05800010, 0x200035ac, 0x028d0340, 0x008d43e0 }, + { 0x00800042, 0x24c0462d, 0x00b19830, 0x00b19c00 }, + { 0x00810001, 0x234001ad, 0x008d03e0, 0x00000000 }, + { 0x00810001, 0x234001ad, 0x028d43e0, 0x00000000 }, + { 0x00200201, 0x260001ac, 0x004505ec, 0x00000000 }, + { 0x80800040, 0x43603631, 0x00b19830, 0x008d0340 }, + { 0x80800040, 0x43403631, 0x00b19c00, 0x008d4340 }, + { 0x00800001, 0xb8300231, 0x00ae0360, 0x00000000 }, + { 0x00800001, 0xbc000231, 0x00ae0340, 0x00000000 }, + { 0x00818022, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00800040, 0x2400362c, 0x00b19810, 0x008d04c0 }, + { 0x00800048, 0x24003e2c, 0x00b19820, 0xfffefffe }, + { 0x00800008, 0x23603d8d, 0x00b10400, 0x00010001 }, + { 0x03800010, 0x200035ac, 0x008d0360, 0x008d03c0 }, + { 0x05800010, 0x200035ac, 0x028d0360, 0x008d43c0 }, + { 0x00810001, 0x236001ad, 0x008d03c0, 0x00000000 }, + { 0x00810001, 0x236001ad, 0x028d43c0, 0x00000000 }, + { 0x00000201, 0x260201ac, 0x000005ee, 0x00000000 }, + { 0x80800040, 0x43603631, 0x00b19820, 0x008d0360 }, + { 0x00800001, 0xb8200231, 0x00ae0360, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00818022, 0x34001c00, 0x02001400, 0x00000014 }, + { 0x00800040, 0x2400362c, 0x00b19c20, 0x008d04c0 }, + { 0x00800048, 0x24003e2c, 0x00b19c10, 0xfffefffe }, + { 0x00800008, 0x23603d8d, 0x00b10400, 0x00010001 }, + { 0x03800010, 0x200035ac, 0x008d0360, 0x008d03c0 }, + { 0x05800010, 0x200035ac, 0x028d0360, 0x008d43c0 }, + { 0x00810001, 0x236001ad, 0x008d03c0, 0x00000000 }, + { 0x00810001, 0x236001ad, 0x028d43c0, 0x00000000 }, + { 0x80800040, 0x43603631, 0x00b19c10, 0x008d0360 }, + { 0x00800001, 0xbc100231, 0x00ae0360, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x34000020, 0x000007c0, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, + { 0x00a02001, 0x20400169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x206601ed, 0x00000000, 0x00030003 }, + { 0x00000009, 0x20663dad, 0x00000066, 0x000a000a }, + { 0x00000001, 0x206801ed, 0x00000000, 0x01400140 }, + { 0x00000001, 0x22600169, 0x00000000, 0x00030003 }, + { 0x00000008, 0x22403dad, 0x00000026, 0x00010001 }, + { 0x00000041, 0x224235ad, 0x00000020, 0x00000022 }, + { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 }, + { 0x00000001, 0x203c0022, 0x00000018, 0x00000000 }, + { 0x00000001, 0x203f01f2, 0x00000000, 0x00000000 }, + { 0x00000001, 0x202c00e2, 0x00000000, 0x00000000 }, + { 0x00000001, 0x202c010a, 0x00000e00, 0x00000000 }, + { 0x00600001, 0x20400021, 0x008d0020, 0x00000000 }, + { 0x00400001, 0x205401ed, 0x00000000, 0x00000000 }, + { 0x00200040, 0x20583dad, 0x00450020, 0xffffffff }, + { 0x00000001, 0x22000060, 0x00000000, 0x06080000 }, + { 0x00600001, 0x26000021, 0x008d0000, 0x00000000 }, + { 0x00000001, 0x26140061, 0x00000000, 0x00c00400 }, + { 0x00000001, 0x26100169, 0x00000000, 0x12121212 }, + { 0x07600031, 0x26201c21, 0x308d0600, 0x02000000 }, + { 0x00200401, 0x208000e5, 0x00000000, 0x00000000 }, + { 0x00000c01, 0x208800e5, 0x00000000, 0xffffffc4 }, + { 0x00000801, 0x208c00e5, 0x00000000, 0xffffffc8 }, + { 0x00200001, 0x260001ec, 0x00000000, 0x00000000 }, + { 0x00600001, 0x20000022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20283c22, 0x00000008, 0x00100010 }, + { 0x00000001, 0x206001ed, 0x00000000, 0x00020002 }, + { 0x00000001, 0x206201ad, 0x0000005a, 0x00000000 }, + { 0x00000001, 0x20a001ed, 0x00000000, 0x00000000 }, + { 0x00200001, 0x228001ed, 0x00000000, 0x00000000 }, + { 0x00802001, 0x20c00061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21000061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21400061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21800061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21c00061, 0x00000000, 0x00ff00ff }, + { 0x00000041, 0x22083dac, 0x00000056, 0x00040004 }, + { 0x05000010, 0x200035ac, 0x02000280, 0x00000240 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000004 }, + { 0x00000040, 0x22803dad, 0x00000280, 0xffffffff }, + { 0x00000030, 0x32000084, 0x00001200, 0x00000000 }, + { 0x01000010, 0x20002d28, 0x000090c2, 0x00000000 }, + { 0x03000010, 0x200035ac, 0x02000054, 0x00000058 }, + { 0x00800001, 0x240001ac, 0x00000068, 0x00000000 }, + { 0x00000048, 0x22a03dad, 0x00000056, 0x00040004 }, + { 0x00010220, 0x34001c00, 0x00001400, 0xfffffff2 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000014 }, + { 0x00200001, 0xb0c00229, 0x00450054, 0x00000000 }, + { 0x00200040, 0x22803dad, 0x00450280, 0x00010001 }, + { 0x00000001, 0x20300022, 0x00000010, 0x00000000 }, + { 0x00000001, 0x20380122, 0x00000260, 0x00000000 }, + { 0x00800001, 0x204001ae, 0x00b10040, 0x00000000 }, + { 0x00000008, 0x20003d2a, 0x000002a0, 0x00010001 }, + { 0x00000040, 0x22602d29, 0x00000260, 0x00020002 }, + { 0x00800031, 0x20000008, 0x608d0000, 0x00000200 }, + { 0x00000006, 0x203025a2, 0x00000066, 0x000002a0 }, + { 0x01600031, 0x20001c00, 0x708d0000, 0x02000001 }, + { 0x04200010, 0x200035ac, 0x00450054, 0x00450060 }, + { 0x00010040, 0x20a03dad, 0x02000056, 0x00010001 }, + { 0x05200010, 0x200035ac, 0x02450280, 0x00450240 }, + { 0x00000001, 0x240001ec, 0x00000000, 0x00040004 }, + { 0x00000048, 0x22083dac, 0x00000056, 0x00040004 }, + { 0x00200040, 0x205455ad, 0x00450054, 0x00450034 }, + { 0x02000010, 0x20003d8c, 0x00000600, 0x00010001 }, + { 0x00000041, 0x220e3d8c, 0x00000602, 0x00040004 }, + { 0x00010041, 0x22083dac, 0x000000a0, 0x00040004 }, + { 0x00010401, 0x205601ad, 0x000000a0, 0x00000000 }, + { 0x00010840, 0x20543d2d, 0x000090c0, 0x00010001 }, + { 0x00000220, 0x34001400, 0x00001400, 0x00009c80 }, + { 0x01000010, 0x20003dac, 0x02000280, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000014 }, + { 0x00000030, 0x32000084, 0x00001200, 0x00000000 }, + { 0x00000040, 0x22803dad, 0x00000280, 0xffffffff }, + { 0x00600401, 0x260001e1, 0x00000000, 0x00000000 }, + { 0x00000c01, 0x26140061, 0x00000000, 0x01800000 }, + { 0x00000c01, 0x26120129, 0x0000000c, 0x00000000 }, + { 0x00000801, 0x26100169, 0x00000000, 0x12121212 }, + { 0x00000040, 0x2078252d, 0x00000026, 0x00004280 }, + { 0x00400001, 0x26000231, 0x00000078, 0x00000000 }, + { 0x00600031, 0x26201c21, 0x308d0600, 0x02000002 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffffe8 }, + { 0x07600031, 0x20001c20, 0x30000000, 0x02000001 }, + { 0x01600031, 0x20001c24, 0x708d0000, 0x82000012 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, + { 0x00600009, 0x25c03dad, 0x00050034, 0x00040004 }, + { 0x00000001, 0x220801ec, 0x00000000, 0x02400240 }, + { 0x00000041, 0x25e435a1, 0x00000020, 0x00000036 }, + { 0x00000040, 0x25e43421, 0x000005e4, 0x00000034 }, + { 0x00000041, 0x27e82c21, 0x000005e4, 0x00400040 }, + { 0x00000001, 0x240001ec, 0x00000000, 0x01400140 }, + { 0x00000048, 0x20263dad, 0x00000036, 0x00040004 }, + { 0x00000040, 0x25c43dad, 0x000005c4, 0xfffcfffc }, + { 0x00000040, 0x25ca3dad, 0x000005ca, 0xfffcfffc }, + { 0x00800001, 0x2220022d, 0x000d002c, 0x00000000 }, + { 0x00600040, 0x22303dad, 0x008d0230, 0x00080008 }, + { 0x01600031, 0x22401c21, 0x408d07e0, 0x02885800 }, + { 0x01800005, 0x20002d28, 0x02b19040, 0xffffffff }, + { 0x02000005, 0x20003e2c, 0x00009030, 0x00010001 }, + { 0x00000001, 0x25e20129, 0x00000036, 0x00000000 }, + { 0x000b0220, 0x34001c00, 0x02001400, 0x00000126 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000124 }, + { 0x00000401, 0x27e001a1, 0x000005c0, 0x00000000 }, + { 0x00000c0c, 0x27e43da1, 0x000005c2, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0007000f }, + { 0x00000001, 0x22000060, 0x00000000, 0x0248a002 }, + { 0x02600031, 0x20c00021, 0x408d07e0, 0x00000200 }, + { 0x00000401, 0x27e001a1, 0x000005c8, 0x00000000 }, + { 0x00000c0c, 0x27e43da1, 0x000005ca, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0001000f }, + { 0x00000001, 0x22000060, 0x00000000, 0x02186004 }, + { 0x02600031, 0x20800021, 0x408d07e0, 0x00000200 }, + { 0x00800001, 0x2380012d, 0x008900c0, 0x00000000 }, + { 0x00800001, 0x23a0012d, 0x00890100, 0x00000000 }, + { 0x00800001, 0x23c0012d, 0x008900c8, 0x00000000 }, + { 0x00800001, 0x23e0012d, 0x00890108, 0x00000000 }, + { 0x00600401, 0x20c001a9, 0x00ab0380, 0x00000000 }, + { 0x00600801, 0x20d001a9, 0x00ab0382, 0x00000000 }, + { 0x00600401, 0x20e001a9, 0x00ab0384, 0x00000000 }, + { 0x00600801, 0x20f001a9, 0x00ab0386, 0x00000000 }, + { 0x00600401, 0x210001a9, 0x00ab03c0, 0x00000000 }, + { 0x00600801, 0x211001a9, 0x00ab03c2, 0x00000000 }, + { 0x00600401, 0x212001a9, 0x00ab03c4, 0x00000000 }, + { 0x00600801, 0x213001a9, 0x00ab03c6, 0x00000000 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00400040 }, + { 0x00800008, 0x2340352d, 0x00009050, 0x008d0220 }, + { 0x00800008, 0x2360352d, 0x00009052, 0x008d0220 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x02600005, 0x20003dac, 0x00ae0340, 0x00010001 }, + { 0x02600005, 0x20003dac, 0x02ae0360, 0x00010001 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00400040 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c000c0 }, + { 0x00200401, 0x25d0022d, 0x004590c0, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990a0, 0x00000000 }, + { 0x00200001, 0x25d80109, 0x00450600, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000000fc }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00410041 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c100c1 }, + { 0x00200401, 0x25d0022d, 0x004590c8, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990b0, 0x00000000 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000000ee }, + { 0x00800008, 0x2340352d, 0x00009042, 0x008d0220 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00e000e0 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01000100 }, + { 0x00200401, 0x25d0022d, 0x004590c4, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990a4, 0x00000000 }, + { 0x02600005, 0x20003dac, 0x00ae0340, 0x00010001 }, + { 0x00000001, 0x260201e8, 0x00000000, 0x00000000 }, + { 0x00000401, 0x25da01e9, 0x00000000, 0x00000000 }, + { 0x00000801, 0x25d80109, 0x00000600, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000000d8 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00e100e1 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01010101 }, + { 0x00200401, 0x25d0022d, 0x004590cc, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990b4, 0x00000000 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000000ca }, + { 0x00000401, 0x27e001a1, 0x000005c4, 0x00000000 }, + { 0x00000c0c, 0x27e43da1, 0x000005c6, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x00070003 }, + { 0x00600401, 0x2340012d, 0x00890040, 0x00000000 }, + { 0x00600801, 0x2350012d, 0x00890048, 0x00000000 }, + { 0x00600001, 0x204001aa, 0x00270340, 0x00000000 }, + { 0x00600001, 0x205001aa, 0x00270350, 0x00000000 }, + { 0x00000001, 0x22000060, 0x00000000, 0x04082004 }, + { 0x01600031, 0x20000020, 0x508d07e0, 0x00000200 }, + { 0x00800001, 0x2380012d, 0x008900c0, 0x00000000 }, + { 0x00800001, 0x23a0012d, 0x00890100, 0x00000000 }, + { 0x00800001, 0x23c0012d, 0x008900c8, 0x00000000 }, + { 0x00800001, 0x23e0012d, 0x00890108, 0x00000000 }, + { 0x00600401, 0x20c001a9, 0x00ab0380, 0x00000000 }, + { 0x00600801, 0x20d001a9, 0x00ab0382, 0x00000000 }, + { 0x00600401, 0x20e001a9, 0x00ab0384, 0x00000000 }, + { 0x00600801, 0x20f001a9, 0x00ab0386, 0x00000000 }, + { 0x00600401, 0x210001a9, 0x00ab03c0, 0x00000000 }, + { 0x00600801, 0x211001a9, 0x00ab03c2, 0x00000000 }, + { 0x00600401, 0x212001a9, 0x00ab03c4, 0x00000000 }, + { 0x00600801, 0x213001a9, 0x00ab03c6, 0x00000000 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00800080 }, + { 0x00800008, 0x2340352d, 0x00009054, 0x008d0220 }, + { 0x00800008, 0x2360352d, 0x00009056, 0x008d0220 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x02600005, 0x20003dac, 0x00ae0340, 0x00010001 }, + { 0x02600005, 0x20003dac, 0x02ae0360, 0x00010001 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00800080 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c000c0 }, + { 0x00200401, 0x25d0022d, 0x004590c2, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990a8, 0x00000000 }, + { 0x00200001, 0x25d80109, 0x00450600, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000086 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00810081 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c100c1 }, + { 0x00200401, 0x25d0022d, 0x004590ca, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990b8, 0x00000000 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000078 }, + { 0x00800008, 0x2340352d, 0x00009048, 0x008d0220 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00e000e0 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01000100 }, + { 0x00200401, 0x25d0022d, 0x004590c4, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990ac, 0x00000000 }, + { 0x02600005, 0x20003dac, 0x00ae0340, 0x00010001 }, + { 0x00000001, 0x260201e8, 0x00000000, 0x00000000 }, + { 0x00000401, 0x25da01e9, 0x00000000, 0x00000000 }, + { 0x00000801, 0x25d80109, 0x00000600, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000062 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00e100e1 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01010101 }, + { 0x00200401, 0x25d0022d, 0x004590cc, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990bc, 0x00000000 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000054 }, + { 0x00000401, 0x27e001a1, 0x000005c0, 0x00000000 }, + { 0x00000c0c, 0x27e43da1, 0x000005c2, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0007000f }, + { 0x00802001, 0x20400022, 0x008d00c0, 0x00000000 }, + { 0x00802001, 0x20800022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x22000060, 0x00000000, 0x0a082004 }, + { 0x01600031, 0x20000020, 0x508d07e0, 0x00000200 }, + { 0x00000401, 0x27e001a1, 0x000005c8, 0x00000000 }, + { 0x00000c0c, 0x27e43da1, 0x000005ca, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0001000f }, + { 0x00600001, 0x20400022, 0x008d0080, 0x00000000 }, + { 0x00000001, 0x22000060, 0x00000000, 0x0418a004 }, + { 0x01600031, 0x26400021, 0x508d07e0, 0x00000200 }, + { 0x00600401, 0x2340012d, 0x008500cc, 0x00000000 }, + { 0x00600801, 0x2350012d, 0x0085010c, 0x00000000 }, + { 0x00800001, 0x236001ad, 0x002e0340, 0x00000000 }, + { 0x00600001, 0x202000a2, 0x008d0360, 0x00000000 }, + { 0x00000008, 0x27e03d29, 0x00000026, 0x00010001 }, + { 0x00800031, 0x20001d28, 0x608d07e0, 0x04080020 }, + { 0x00600001, 0x26400021, 0x008d0640, 0x00000000 }, + { 0x00600001, 0x260001e1, 0x00000000, 0x00000000 }, + { 0x00000009, 0x26143da1, 0x000005e2, 0x00120012 }, + { 0x00000440, 0x26141c21, 0x00000614, 0x00020000 }, + { 0x00000c01, 0x26120129, 0x0000000c, 0x00000000 }, + { 0x00000c01, 0x26100169, 0x00000000, 0x12121212 }, + { 0x00400801, 0x26000171, 0x00000000, 0xffffffff }, + { 0x00600031, 0x20001c20, 0x308d0600, 0x82008002 }, + { 0x00000440, 0x27e03da1, 0x000005c0, 0x000c000c }, + { 0x00000c0c, 0x27e43da1, 0x000005c2, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x00070003 }, + { 0x02600031, 0x23401c25, 0x408d07e0, 0x02186004 }, + { 0x00800001, 0x236001ad, 0x002e0340, 0x00000000 }, + { 0x00600001, 0x202000a2, 0x008d0360, 0x00000000 }, + { 0x00000008, 0x27e03d29, 0x00000026, 0x00010001 }, + { 0x00800031, 0x20001d28, 0x608d07e0, 0x04080020 }, + { 0x00600001, 0x260001e1, 0x00000000, 0x00000000 }, + { 0x00000009, 0x26143da1, 0x000005e2, 0x00120012 }, + { 0x00000440, 0x26141c21, 0x00000614, 0x00020000 }, + { 0x00000c01, 0x26120129, 0x0000000c, 0x00000000 }, + { 0x00000c01, 0x26100169, 0x00000000, 0x12121212 }, + { 0x00400801, 0x26000171, 0x00000000, 0xffffffff }, + { 0x00600031, 0x20001c20, 0x308d0600, 0x82008002 }, + { 0x00600040, 0x2400462d, 0x00ae9c00, 0x00aed810 }, + { 0x00600040, 0x2340462d, 0x00ae9800, 0x00aed810 }, + { 0x00600040, 0x2360462d, 0x00ae9c10, 0x00aedc00 }, + { 0x05810010, 0x200035ac, 0x008d2400, 0x000005d0 }, + { 0x05810010, 0x200035ac, 0x008d2340, 0x000005d2 }, + { 0x05810010, 0x200035ac, 0x008d2360, 0x000005d2 }, + { 0x00618022, 0x34001c00, 0x00001400, 0x00000038 }, + { 0x00618022, 0x34001c00, 0x02001400, 0x00000016 }, + { 0x00600040, 0x24003e2c, 0x00ae9c10, 0x00020002 }, + { 0x00600048, 0x24003e2c, 0x00ae9800, 0x00020002 }, + { 0x00600040, 0x2400458c, 0x008d0400, 0x00ae9810 }, + { 0x80600008, 0x43403d91, 0x008d0400, 0x00020002 }, + { 0x00600040, 0x24003e2c, 0x00ae9800, 0x00020002 }, + { 0x00600048, 0x24003e2c, 0x00ae9c10, 0x00020002 }, + { 0x00600040, 0x2400458c, 0x008d0400, 0x00ae9c00 }, + { 0x80600008, 0x43603d91, 0x008d0400, 0x00020002 }, + { 0x00600001, 0xd8100231, 0x00ae0340, 0x00000000 }, + { 0x00600001, 0xdc000231, 0x00ae0360, 0x00000000 }, + { 0x00608024, 0x34001c00, 0x00001400, 0x00010020 }, + { 0x00600201, 0x2400022c, 0x002405d4, 0x00000000 }, + { 0x00600040, 0x23e03d8d, 0x008d0400, 0x00010001 }, + { 0x00600040, 0x24003e2c, 0x00ae9800, 0x00040004 }, + { 0x00600048, 0x24003dac, 0x008d0400, 0x00040004 }, + { 0x00600040, 0x2400458c, 0x008d0400, 0x00aedc10 }, + { 0x00600008, 0x23403d8d, 0x008d0400, 0x00030003 }, + { 0x03600010, 0x200035ac, 0x008d0340, 0x008d03e0 }, + { 0x05600010, 0x200035ac, 0x028d0340, 0x008d43e0 }, + { 0x00610001, 0x234001ad, 0x008d03e0, 0x00000000 }, + { 0x00610001, 0x234001ad, 0x028d43e0, 0x00000000 }, + { 0x80600040, 0x43603631, 0x00ae9810, 0x008d0340 }, + { 0x80600040, 0x43403631, 0x00ae9c00, 0x008d4340 }, + { 0x00600001, 0xd8100231, 0x00ae0360, 0x00000000 }, + { 0x00600001, 0xdc000231, 0x00ae0340, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x34000020, 0x000007c0, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, + { 0x00a02001, 0x20400169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x206601ed, 0x00000000, 0x00030003 }, + { 0x00000009, 0x20663dad, 0x00000066, 0x000a000a }, + { 0x00000008, 0x22403dad, 0x00000026, 0x00010001 }, + { 0x00000041, 0x224235ad, 0x00000020, 0x00000022 }, + { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 }, + { 0x00000001, 0x203c0022, 0x00000018, 0x00000000 }, + { 0x00000001, 0x203f01f2, 0x00000000, 0x00000000 }, + { 0x00000001, 0x202c00e2, 0x00000000, 0x00000000 }, + { 0x00000001, 0x202c010a, 0x00000e00, 0x00000000 }, + { 0x00600001, 0x20400021, 0x008d0020, 0x00000000 }, + { 0x00400001, 0x205401ed, 0x00000000, 0x00000000 }, + { 0x00200040, 0x20583dad, 0x00450020, 0xffffffff }, + { 0x00000001, 0x22000060, 0x00000000, 0x06080000 }, + { 0x00600001, 0x26000021, 0x008d0000, 0x00000000 }, + { 0x00000001, 0x26140061, 0x00000000, 0x00c00400 }, + { 0x00000001, 0x26100169, 0x00000000, 0x12121212 }, + { 0x07600031, 0x26201c21, 0x308d0600, 0x02000000 }, + { 0x00000001, 0x22a00169, 0x00000000, 0x01400140 }, + { 0x00000040, 0x20283c22, 0x00000008, 0x00200020 }, + { 0x00000001, 0x203801e2, 0x00000000, 0x00010001 }, + { 0x00800001, 0x204001ae, 0x00b10020, 0x00000000 }, + { 0x00000008, 0x27e03d29, 0x000002a0, 0x00010001 }, + { 0x00800031, 0x20000128, 0x608d07e0, 0x00000200 }, + { 0x00000006, 0x203025a2, 0x00000066, 0x000002a0 }, + { 0x01600031, 0x20001c00, 0x708d0000, 0x02000001 }, + { 0x00000001, 0x20300022, 0x00000010, 0x00000000 }, + { 0x00000001, 0x22a00169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22600169, 0x00000000, 0x00020002 }, + { 0x00200401, 0x208000e5, 0x00000000, 0x00000000 }, + { 0x00000c01, 0x208800e5, 0x00000000, 0xffffffc6 }, + { 0x00000801, 0x208c00e5, 0x00000000, 0xffffffca }, + { 0x00200001, 0x260001ec, 0x00000000, 0x00000000 }, + { 0x00600001, 0x20000022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20283c22, 0x00000008, 0x00100010 }, + { 0x00000001, 0x206001ed, 0x00000000, 0x00020002 }, + { 0x00000001, 0x206201ad, 0x0000005a, 0x00000000 }, + { 0x00000001, 0x20a001ed, 0x00000000, 0x00000000 }, + { 0x00200001, 0x228001ed, 0x00000000, 0x00000000 }, + { 0x00802001, 0x20c00061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21000061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21400061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21800061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21c00061, 0x00000000, 0x00ff00ff }, + { 0x00000041, 0x22083dac, 0x00000056, 0x00040004 }, + { 0x05000010, 0x200035ac, 0x02000280, 0x00000240 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000004 }, + { 0x00000040, 0x22803dad, 0x00000280, 0xffffffff }, + { 0x00000030, 0x32000084, 0x00001200, 0x00000000 }, + { 0x01000010, 0x20002d28, 0x000090c2, 0x00000000 }, + { 0x03000010, 0x200035ac, 0x02000054, 0x00000058 }, + { 0x00000041, 0x22a03dad, 0x00000056, 0x00040004 }, + { 0x00010220, 0x34001c00, 0x00001400, 0xfffffff4 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000014 }, + { 0x00200001, 0xb0c00229, 0x00450054, 0x00000000 }, + { 0x00200040, 0x22803dad, 0x00450280, 0x00010001 }, + { 0x00000001, 0x20300022, 0x00000010, 0x00000000 }, + { 0x00000001, 0x20380122, 0x00000260, 0x00000000 }, + { 0x00800001, 0x204001ae, 0x00b10040, 0x00000000 }, + { 0x00000008, 0x20003d2a, 0x000002a0, 0x00010001 }, + { 0x00000040, 0x22602d29, 0x00000260, 0x00020002 }, + { 0x00800031, 0x20000008, 0x608d0000, 0x00000200 }, + { 0x00000006, 0x203025a2, 0x00000066, 0x000002a0 }, + { 0x01600031, 0x20001c00, 0x708d0000, 0x02000001 }, + { 0x04200010, 0x200035ac, 0x00450054, 0x00450060 }, + { 0x00010040, 0x20a03dad, 0x02000056, 0x00010001 }, + { 0x05200010, 0x200035ac, 0x02450280, 0x00450240 }, + { 0x00000001, 0x240001ec, 0x00000000, 0x00040004 }, + { 0x00000048, 0x22083dac, 0x00000056, 0x00040004 }, + { 0x00200040, 0x205455ad, 0x00450054, 0x00450034 }, + { 0x02000010, 0x20003d8c, 0x00000600, 0x00010001 }, + { 0x00000041, 0x220e3d8c, 0x00000602, 0x00040004 }, + { 0x00010041, 0x22083dac, 0x000000a0, 0x00040004 }, + { 0x00010401, 0x205601ad, 0x000000a0, 0x00000000 }, + { 0x00010840, 0x20543d2d, 0x000090c0, 0x00010001 }, + { 0x00000220, 0x34001400, 0x00001400, 0x00009c80 }, + { 0x01000010, 0x20003dac, 0x02000280, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000006 }, + { 0x00000030, 0x32000084, 0x00001200, 0x00000000 }, + { 0x00000040, 0x22803dad, 0x00000280, 0xffffffff }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffff6 }, + { 0x05000010, 0x200035ac, 0x00000240, 0x00000026 }, + { 0x00010220, 0x34001c00, 0x00001400, 0xfffffffc }, + { 0x07600031, 0x20001c20, 0x30000000, 0x02000001 }, + { 0x01600031, 0x20001c24, 0x708d0000, 0x82000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, + { 0x00600009, 0x25c03dad, 0x00050034, 0x00040004 }, + { 0x00000001, 0x220801ec, 0x00000000, 0x02400240 }, + { 0x00000041, 0x20263d29, 0x00000036, 0x00040004 }, + { 0x00000041, 0x25e435a1, 0x00000020, 0x00000036 }, + { 0x00000040, 0x25e43421, 0x000005e4, 0x00000034 }, + { 0x00000041, 0x27e82c21, 0x000005e4, 0x00400040 }, + { 0x01600031, 0x22401c21, 0x408d07e0, 0x02885800 }, + { 0x01800005, 0x20002d28, 0x02b19040, 0xffffffff }, + { 0x02000005, 0x20003e2c, 0x00009030, 0x00010001 }, + { 0x00000040, 0x25c43dad, 0x000005c4, 0xfffcfffc }, + { 0x00000001, 0x25e20129, 0x00000036, 0x00000000 }, + { 0x000b0220, 0x34001c00, 0x02001400, 0x0000018c }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000018a }, + { 0x00000040, 0x25ca3dad, 0x000005ca, 0xfffcfffc }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00200401, 0x27e001a1, 0x004505c0, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x000f000f }, + { 0x00010001, 0x22000060, 0x02000000, 0x0288e701 }, + { 0x00110001, 0x22000060, 0x02000000, 0x0288e601 }, + { 0x01600031, 0x20c00021, 0x408d07e0, 0x00000200 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00200401, 0x27e001a1, 0x004505c8, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0003000f }, + { 0x00010001, 0x22000060, 0x02000000, 0x02286703 }, + { 0x00110001, 0x22000060, 0x02000000, 0x02286603 }, + { 0x03600031, 0x20800021, 0x408d07e0, 0x00000200 }, + { 0x00800401, 0x23800231, 0x00a900c0, 0x00000000 }, + { 0x00800801, 0x23900231, 0x00a90100, 0x00000000 }, + { 0x00800401, 0x23a00231, 0x00a90140, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00a90180, 0x00000000 }, + { 0x00800401, 0x23c00231, 0x00a900c4, 0x00000000 }, + { 0x00800801, 0x23d00231, 0x00a90104, 0x00000000 }, + { 0x00800401, 0x23e00231, 0x00a90144, 0x00000000 }, + { 0x00800801, 0x23f00231, 0x00a90184, 0x00000000 }, + { 0x00800401, 0x24000231, 0x00a900c8, 0x00000000 }, + { 0x00800801, 0x24100231, 0x00a90108, 0x00000000 }, + { 0x00800401, 0x24200231, 0x00a90148, 0x00000000 }, + { 0x00800801, 0x24300231, 0x00a90188, 0x00000000 }, + { 0x00800401, 0x24400231, 0x00a900cc, 0x00000000 }, + { 0x00800801, 0x24500231, 0x00a9010c, 0x00000000 }, + { 0x00800401, 0x24600231, 0x00a9014c, 0x00000000 }, + { 0x00800801, 0x24700231, 0x00a9018c, 0x00000000 }, + { 0x00800401, 0x20c00231, 0x00cf0380, 0x00000000 }, + { 0x00800801, 0x20d00231, 0x00cf0381, 0x00000000 }, + { 0x00800401, 0x20e00231, 0x00cf0382, 0x00000000 }, + { 0x00800801, 0x20f00231, 0x00cf0383, 0x00000000 }, + { 0x00800401, 0x21000231, 0x00cf03c0, 0x00000000 }, + { 0x00800801, 0x21100231, 0x00cf03c1, 0x00000000 }, + { 0x00800401, 0x21200231, 0x00cf03c2, 0x00000000 }, + { 0x00800801, 0x21300231, 0x00cf03c3, 0x00000000 }, + { 0x00800401, 0x21400231, 0x00cf0400, 0x00000000 }, + { 0x00800801, 0x21500231, 0x00cf0401, 0x00000000 }, + { 0x00800401, 0x21600231, 0x00cf0402, 0x00000000 }, + { 0x00800801, 0x21700231, 0x00cf0403, 0x00000000 }, + { 0x00800401, 0x21800231, 0x00cf0440, 0x00000000 }, + { 0x00800801, 0x21900231, 0x00cf0441, 0x00000000 }, + { 0x00800401, 0x21a00231, 0x00cf0442, 0x00000000 }, + { 0x00800801, 0x21b00231, 0x00cf0443, 0x00000000 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00400040 }, + { 0x00000008, 0x25e83e2d, 0x00009080, 0x00020002 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00400040 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c000c0 }, + { 0x00200401, 0x25d0022d, 0x00459080, 0x00000000 }, + { 0x00200c01, 0x25d80129, 0x00459050, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x00699060, 0x00000000 }, + { 0x00000040, 0x25e83dad, 0x000005e8, 0x00020002 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0xfffffb8c }, + { 0x00000008, 0x25e83e2d, 0x00009084, 0x00020002 }, + { 0x00200401, 0x25d0022d, 0x00459084, 0x00000000 }, + { 0x00000801, 0x25da01e9, 0x00000000, 0x00000000 }, + { 0x00000040, 0x25e83dad, 0x000005e8, 0x00020002 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00200020 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00c000c0 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01000100 }, + { 0x00000401, 0x25d80129, 0x00009040, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x00699064, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0xfffffb76 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00100010 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x01000100 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01400140 }, + { 0x00000401, 0x25d80129, 0x00009042, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x00699068, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0xfffffb68 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00200020 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x01400140 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01800180 }, + { 0x00000401, 0x25d80129, 0x00009044, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x0069906c, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0xfffffb5a }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00200401, 0x27e001a1, 0x004505c4, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x000f0003 }, + { 0x00800401, 0x23400231, 0x00a90040, 0x00000000 }, + { 0x00800801, 0x23500231, 0x00a90044, 0x00000000 }, + { 0x00800401, 0x23600231, 0x00a90048, 0x00000000 }, + { 0x00800801, 0x23700231, 0x00a9004c, 0x00000000 }, + { 0x00800001, 0x20400232, 0x002b0340, 0x00000000 }, + { 0x00800001, 0x20500232, 0x002b0350, 0x00000000 }, + { 0x00800001, 0x20600232, 0x002b0360, 0x00000000 }, + { 0x00800001, 0x20700232, 0x002b0370, 0x00000000 }, + { 0x00010001, 0x22000060, 0x02000000, 0x06082703 }, + { 0x00110001, 0x22000060, 0x02000000, 0x06082603 }, + { 0x01600031, 0x20000020, 0x508d07e0, 0x00000200 }, + { 0x00800401, 0x23800231, 0x00a900c0, 0x00000000 }, + { 0x00800801, 0x23900231, 0x00a90100, 0x00000000 }, + { 0x00800401, 0x23a00231, 0x00a90140, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00a90180, 0x00000000 }, + { 0x00800401, 0x23c00231, 0x00a900c4, 0x00000000 }, + { 0x00800801, 0x23d00231, 0x00a90104, 0x00000000 }, + { 0x00800401, 0x23e00231, 0x00a90144, 0x00000000 }, + { 0x00800801, 0x23f00231, 0x00a90184, 0x00000000 }, + { 0x00800401, 0x24000231, 0x00a900c8, 0x00000000 }, + { 0x00800801, 0x24100231, 0x00a90108, 0x00000000 }, + { 0x00800401, 0x24200231, 0x00a90148, 0x00000000 }, + { 0x00800801, 0x24300231, 0x00a90188, 0x00000000 }, + { 0x00800401, 0x24400231, 0x00a900cc, 0x00000000 }, + { 0x00800801, 0x24500231, 0x00a9010c, 0x00000000 }, + { 0x00800401, 0x24600231, 0x00a9014c, 0x00000000 }, + { 0x00800801, 0x24700231, 0x00a9018c, 0x00000000 }, + { 0x00800401, 0x20c00231, 0x00cf0380, 0x00000000 }, + { 0x00800801, 0x20d00231, 0x00cf0381, 0x00000000 }, + { 0x00800401, 0x20e00231, 0x00cf0382, 0x00000000 }, + { 0x00800801, 0x20f00231, 0x00cf0383, 0x00000000 }, + { 0x00800401, 0x21000231, 0x00cf03c0, 0x00000000 }, + { 0x00800801, 0x21100231, 0x00cf03c1, 0x00000000 }, + { 0x00800401, 0x21200231, 0x00cf03c2, 0x00000000 }, + { 0x00800801, 0x21300231, 0x00cf03c3, 0x00000000 }, + { 0x00800401, 0x21400231, 0x00cf0400, 0x00000000 }, + { 0x00800801, 0x21500231, 0x00cf0401, 0x00000000 }, + { 0x00800401, 0x21600231, 0x00cf0402, 0x00000000 }, + { 0x00800801, 0x21700231, 0x00cf0403, 0x00000000 }, + { 0x00800401, 0x21800231, 0x00cf0440, 0x00000000 }, + { 0x00800801, 0x21900231, 0x00cf0441, 0x00000000 }, + { 0x00800401, 0x21a00231, 0x00cf0442, 0x00000000 }, + { 0x00800801, 0x21b00231, 0x00cf0443, 0x00000000 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00800080 }, + { 0x00000008, 0x25e83e2d, 0x00009082, 0x00020002 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00800080 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c000c0 }, + { 0x00200401, 0x25d0022d, 0x00459082, 0x00000000 }, + { 0x00200c01, 0x25d80129, 0x00459054, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x00699070, 0x00000000 }, + { 0x00000040, 0x25e83dad, 0x000005e8, 0x00020002 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0xfffffaea }, + { 0x00000008, 0x25e83e2d, 0x00009084, 0x00020002 }, + { 0x00200401, 0x25d0022d, 0x00459084, 0x00000000 }, + { 0x00000801, 0x25da01e9, 0x00000000, 0x00000000 }, + { 0x00000040, 0x25e83dad, 0x000005e8, 0x00020002 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00200020 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00c000c0 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01000100 }, + { 0x00000401, 0x25d80129, 0x00009046, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x00699074, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0xfffffad4 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00100010 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x01000100 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01400140 }, + { 0x00000401, 0x25d80129, 0x00009048, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x00699078, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0xfffffac6 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00200020 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x01400140 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01800180 }, + { 0x00000401, 0x25d80129, 0x0000904a, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x0069907c, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0xfffffab8 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00200401, 0x27e001a1, 0x004505c0, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x000f000f }, + { 0x00802001, 0x20400022, 0x008d00c0, 0x00000000 }, + { 0x00802001, 0x20800022, 0x008d0100, 0x00000000 }, + { 0x00802001, 0x20c00022, 0x008d0140, 0x00000000 }, + { 0x00802001, 0x21000022, 0x008d0180, 0x00000000 }, + { 0x00010001, 0x22000060, 0x02000000, 0x12082703 }, + { 0x00110001, 0x22000060, 0x02000000, 0x12082603 }, + { 0x01600031, 0x20000020, 0x508d07e0, 0x00000200 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00200401, 0x27e001a1, 0x004505c8, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0003000f }, + { 0x00802001, 0x20400022, 0x008d0080, 0x00000000 }, + { 0x00010001, 0x22000060, 0x02000000, 0x0618a703 }, + { 0x00110001, 0x22000060, 0x02000000, 0x0618a603 }, + { 0x01600031, 0x26400021, 0x508d07e0, 0x00000200 }, + { 0x00800401, 0x23400231, 0x00a900cc, 0x00000000 }, + { 0x00800801, 0x23500231, 0x00a9010c, 0x00000000 }, + { 0x00800401, 0x23600231, 0x00a9014c, 0x00000000 }, + { 0x00800801, 0x23700231, 0x00a9018c, 0x00000000 }, + { 0x00800401, 0x23800231, 0x00cf0340, 0x00000000 }, + { 0x00800801, 0x23900231, 0x00cf0341, 0x00000000 }, + { 0x00800401, 0x23a00231, 0x00cf0342, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00cf0343, 0x00000000 }, + { 0x00802001, 0x202000a2, 0x008d0380, 0x00000000 }, + { 0x00000008, 0x27e03d29, 0x00000026, 0x00010001 }, + { 0x00800031, 0x20001d28, 0x608d07e0, 0x06080020 }, + { 0x00600001, 0x26400021, 0x008d0640, 0x00000000 }, + { 0x00600001, 0x260001e1, 0x00000000, 0x00000000 }, + { 0x00000009, 0x26143da1, 0x000005e2, 0x00120012 }, + { 0x00000440, 0x26141c21, 0x00000614, 0x00020000 }, + { 0x00000c01, 0x26120129, 0x0000000c, 0x00000000 }, + { 0x00000c01, 0x26100169, 0x00000000, 0x12121212 }, + { 0x00400801, 0x26000171, 0x00000000, 0xffffffff }, + { 0x00600031, 0x20001c20, 0x308d0600, 0x82008002 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00020002 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00000440, 0x27e03da1, 0x000005c0, 0x000c000c }, + { 0x00000c01, 0x27e401a1, 0x000005c2, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x000f0003 }, + { 0x00018022, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x22000060, 0x00000000, 0x02286003 }, + { 0x00010040, 0x27e43ca5, 0x020007e4, 0x00100010 }, + { 0x00008024, 0x34001c00, 0x00001400, 0x00010008 }, + { 0x00010001, 0x22000060, 0x02000000, 0x02286703 }, + { 0x00110001, 0x22000060, 0x02000000, 0x02286603 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x02600031, 0x23400025, 0x408d07e0, 0x00000200 }, + { 0x00800401, 0x23800231, 0x00cf0340, 0x00000000 }, + { 0x00800801, 0x23900231, 0x00cf0341, 0x00000000 }, + { 0x00800401, 0x23a00231, 0x00cf0342, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00cf0343, 0x00000000 }, + { 0x00802001, 0x202000a2, 0x008d0380, 0x00000000 }, + { 0x00000008, 0x27e03d29, 0x00000026, 0x00010001 }, + { 0x00800031, 0x20001d28, 0x608d07e0, 0x06080020 }, + { 0x00600001, 0x260001e1, 0x00000000, 0x00000000 }, + { 0x00000009, 0x26143da1, 0x000005e2, 0x00120012 }, + { 0x00000440, 0x26141c21, 0x00000614, 0x00020000 }, + { 0x00000c01, 0x26120129, 0x0000000c, 0x00000000 }, + { 0x00000c01, 0x26100169, 0x00000000, 0x12121212 }, + { 0x00400801, 0x26000171, 0x00000000, 0xffffffff }, + { 0x00600031, 0x20001c20, 0x308d0600, 0x82008002 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, + { 0x00a02001, 0x20400169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x206601ed, 0x00000000, 0x00030003 }, + { 0x00000009, 0x20663dad, 0x00000066, 0x000a000a }, + { 0x00000001, 0x206801ed, 0x00000000, 0x01400140 }, + { 0x00000001, 0x22600169, 0x00000000, 0x00030003 }, + { 0x00000008, 0x22403dad, 0x00000026, 0x00010001 }, + { 0x00000041, 0x224235ad, 0x00000020, 0x00000022 }, + { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 }, + { 0x00000001, 0x203c0022, 0x00000018, 0x00000000 }, + { 0x00000001, 0x203f01f2, 0x00000000, 0x00000000 }, + { 0x00000001, 0x202c00e2, 0x00000000, 0x00000000 }, + { 0x00000001, 0x202c010a, 0x00000e00, 0x00000000 }, + { 0x00600001, 0x20400021, 0x008d0020, 0x00000000 }, + { 0x00400001, 0x205401ed, 0x00000000, 0x00000000 }, + { 0x00200040, 0x20583dad, 0x00450020, 0xffffffff }, + { 0x00000001, 0x22000060, 0x00000000, 0x06080000 }, + { 0x00600001, 0x26000021, 0x008d0000, 0x00000000 }, + { 0x00000001, 0x26140061, 0x00000000, 0x00c00400 }, + { 0x00000001, 0x26100169, 0x00000000, 0x12121212 }, + { 0x07600031, 0x26201c21, 0x308d0600, 0x02000000 }, + { 0x00200401, 0x208000e5, 0x00000000, 0x00000000 }, + { 0x00000c01, 0x208800e5, 0x00000000, 0xffffffc4 }, + { 0x00000801, 0x208c00e5, 0x00000000, 0xffffffc8 }, + { 0x00200001, 0x260001ec, 0x00000000, 0x00000000 }, + { 0x00600001, 0x20000022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20283c22, 0x00000008, 0x00100010 }, + { 0x00000001, 0x206001ed, 0x00000000, 0x00020002 }, + { 0x00000001, 0x206201ad, 0x0000005a, 0x00000000 }, + { 0x00000001, 0x20a001ed, 0x00000000, 0x00000000 }, + { 0x00200001, 0x228001ed, 0x00000000, 0x00000000 }, + { 0x00802001, 0x20c00061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21000061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21400061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21800061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21c00061, 0x00000000, 0x00ff00ff }, + { 0x00000041, 0x22083dac, 0x00000056, 0x00040004 }, + { 0x05000010, 0x200035ac, 0x02000280, 0x00000240 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000004 }, + { 0x00000040, 0x22803dad, 0x00000280, 0xffffffff }, + { 0x00000030, 0x32000084, 0x00001200, 0x00000000 }, + { 0x01000010, 0x20002d28, 0x000090c2, 0x00000000 }, + { 0x03000010, 0x200035ac, 0x02000054, 0x00000058 }, + { 0x00800001, 0x240001ac, 0x00000068, 0x00000000 }, + { 0x00000048, 0x22a03dad, 0x00000056, 0x00040004 }, + { 0x00010220, 0x34001c00, 0x00001400, 0xfffffff2 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000014 }, + { 0x00200001, 0xb0c00229, 0x00450054, 0x00000000 }, + { 0x00200040, 0x22803dad, 0x00450280, 0x00010001 }, + { 0x00000001, 0x20300022, 0x00000010, 0x00000000 }, + { 0x00000001, 0x20380122, 0x00000260, 0x00000000 }, + { 0x00800001, 0x204001ae, 0x00b10040, 0x00000000 }, + { 0x00000008, 0x20003d2a, 0x000002a0, 0x00010001 }, + { 0x00000040, 0x22602d29, 0x00000260, 0x00020002 }, + { 0x00800031, 0x20000008, 0x608d0000, 0x00000200 }, + { 0x00000006, 0x203025a2, 0x00000066, 0x000002a0 }, + { 0x01600031, 0x20001c00, 0x708d0000, 0x02000001 }, + { 0x04200010, 0x200035ac, 0x00450054, 0x00450060 }, + { 0x00010040, 0x20a03dad, 0x02000056, 0x00010001 }, + { 0x05200010, 0x200035ac, 0x02450280, 0x00450240 }, + { 0x00000001, 0x240001ec, 0x00000000, 0x00040004 }, + { 0x00000048, 0x22083dac, 0x00000056, 0x00040004 }, + { 0x00200040, 0x205455ad, 0x00450054, 0x00450034 }, + { 0x02000010, 0x20003d8c, 0x00000600, 0x00010001 }, + { 0x00000041, 0x220e3d8c, 0x00000602, 0x00040004 }, + { 0x00010041, 0x22083dac, 0x000000a0, 0x00040004 }, + { 0x00010401, 0x205601ad, 0x000000a0, 0x00000000 }, + { 0x00010840, 0x20543d2d, 0x000090c0, 0x00010001 }, + { 0x00000220, 0x34001400, 0x00001400, 0x00009c80 }, + { 0x01000010, 0x20003dac, 0x02000280, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000014 }, + { 0x00000030, 0x32000084, 0x00001200, 0x00000000 }, + { 0x00000040, 0x22803dad, 0x00000280, 0xffffffff }, + { 0x00600401, 0x260001e1, 0x00000000, 0x00000000 }, + { 0x00000c01, 0x26140061, 0x00000000, 0x01800000 }, + { 0x00000c01, 0x26120129, 0x0000000c, 0x00000000 }, + { 0x00000801, 0x26100169, 0x00000000, 0x12121212 }, + { 0x00000040, 0x2078252d, 0x00000026, 0x00004280 }, + { 0x00400001, 0x26000231, 0x00000078, 0x00000000 }, + { 0x00600031, 0x26201c21, 0x308d0600, 0x02000002 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffffe8 }, + { 0x07600031, 0x20001c20, 0x30000000, 0x02000001 }, + { 0x01600031, 0x20001c24, 0x708d0000, 0x82000012 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, + { 0x00600009, 0x25c03dad, 0x00050034, 0x00040004 }, + { 0x00000001, 0x220801ec, 0x00000000, 0x02400240 }, + { 0x00000041, 0x25e435a1, 0x00000020, 0x00000036 }, + { 0x00000040, 0x25e43421, 0x000005e4, 0x00000034 }, + { 0x00000041, 0x27e82c21, 0x000005e4, 0x00400040 }, + { 0x00000001, 0x240001ec, 0x00000000, 0x01400140 }, + { 0x00000048, 0x20263dad, 0x00000036, 0x00040004 }, + { 0x00000040, 0x25c43dad, 0x000005c4, 0xfffcfffc }, + { 0x00000040, 0x25ca3dad, 0x000005ca, 0xfffcfffc }, + { 0x00800001, 0x2220022d, 0x000d002c, 0x00000000 }, + { 0x00600040, 0x22303dad, 0x008d0230, 0x00080008 }, + { 0x01600031, 0x22401c21, 0x408d07e0, 0x02885800 }, + { 0x01800005, 0x20002d28, 0x02b19040, 0xffffffff }, + { 0x02000005, 0x20003e2c, 0x00009030, 0x00010001 }, + { 0x00000001, 0x25e20129, 0x00000036, 0x00000000 }, + { 0x000b0220, 0x34001c00, 0x02001400, 0x0000013a }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000138 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00000401, 0x27e001a1, 0x000005c0, 0x00000000 }, + { 0x00000c0c, 0x27e43da1, 0x000005c2, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0007000f }, + { 0x00010001, 0x22000060, 0x02000000, 0x0248e702 }, + { 0x00110001, 0x22000060, 0x02000000, 0x0248e602 }, + { 0x02600031, 0x20c00021, 0x408d07e0, 0x00000200 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00000401, 0x27e001a1, 0x000005c8, 0x00000000 }, + { 0x00000c0c, 0x27e43da1, 0x000005ca, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0001000f }, + { 0x00010001, 0x22000060, 0x02000000, 0x02186704 }, + { 0x00110001, 0x22000060, 0x02000000, 0x02186604 }, + { 0x02600031, 0x20800021, 0x408d07e0, 0x00000200 }, + { 0x00800001, 0x2380012d, 0x008900c0, 0x00000000 }, + { 0x00800001, 0x23a0012d, 0x00890100, 0x00000000 }, + { 0x00800001, 0x23c0012d, 0x008900c8, 0x00000000 }, + { 0x00800001, 0x23e0012d, 0x00890108, 0x00000000 }, + { 0x00600401, 0x20c001a9, 0x00ab0380, 0x00000000 }, + { 0x00600801, 0x20d001a9, 0x00ab0382, 0x00000000 }, + { 0x00600401, 0x20e001a9, 0x00ab0384, 0x00000000 }, + { 0x00600801, 0x20f001a9, 0x00ab0386, 0x00000000 }, + { 0x00600401, 0x210001a9, 0x00ab03c0, 0x00000000 }, + { 0x00600801, 0x211001a9, 0x00ab03c2, 0x00000000 }, + { 0x00600401, 0x212001a9, 0x00ab03c4, 0x00000000 }, + { 0x00600801, 0x213001a9, 0x00ab03c6, 0x00000000 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00400040 }, + { 0x00800008, 0x2340352d, 0x00009050, 0x008d0220 }, + { 0x00800008, 0x2360352d, 0x00009052, 0x008d0220 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x02600005, 0x20003dac, 0x00ae0340, 0x00010001 }, + { 0x02600005, 0x20003dac, 0x02ae0360, 0x00010001 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00400040 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c000c0 }, + { 0x00200401, 0x25d0022d, 0x004590c0, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990a0, 0x00000000 }, + { 0x00200001, 0x25d80109, 0x00450600, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffc0c }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00410041 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c100c1 }, + { 0x00200401, 0x25d0022d, 0x004590c8, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990b0, 0x00000000 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffbfe }, + { 0x00800008, 0x2340352d, 0x00009042, 0x008d0220 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00e000e0 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01000100 }, + { 0x00200401, 0x25d0022d, 0x004590c4, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990a4, 0x00000000 }, + { 0x02600005, 0x20003dac, 0x00ae0340, 0x00010001 }, + { 0x00000001, 0x260201e8, 0x00000000, 0x00000000 }, + { 0x00000401, 0x25da01e9, 0x00000000, 0x00000000 }, + { 0x00000801, 0x25d80109, 0x00000600, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffbe8 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00e100e1 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01010101 }, + { 0x00200401, 0x25d0022d, 0x004590cc, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990b4, 0x00000000 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffbda }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00000401, 0x27e001a1, 0x000005c4, 0x00000000 }, + { 0x00000c0c, 0x27e43da1, 0x000005c6, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x00070003 }, + { 0x00600401, 0x2340012d, 0x00890040, 0x00000000 }, + { 0x00600801, 0x2350012d, 0x00890048, 0x00000000 }, + { 0x00600001, 0x204001aa, 0x00270340, 0x00000000 }, + { 0x00600001, 0x205001aa, 0x00270350, 0x00000000 }, + { 0x00010001, 0x22000060, 0x02000000, 0x04082704 }, + { 0x00110001, 0x22000060, 0x02000000, 0x04082604 }, + { 0x01600031, 0x20000020, 0x508d07e0, 0x00000200 }, + { 0x00800001, 0x2380012d, 0x008900c0, 0x00000000 }, + { 0x00800001, 0x23a0012d, 0x00890100, 0x00000000 }, + { 0x00800001, 0x23c0012d, 0x008900c8, 0x00000000 }, + { 0x00800001, 0x23e0012d, 0x00890108, 0x00000000 }, + { 0x00600401, 0x20c001a9, 0x00ab0380, 0x00000000 }, + { 0x00600801, 0x20d001a9, 0x00ab0382, 0x00000000 }, + { 0x00600401, 0x20e001a9, 0x00ab0384, 0x00000000 }, + { 0x00600801, 0x20f001a9, 0x00ab0386, 0x00000000 }, + { 0x00600401, 0x210001a9, 0x00ab03c0, 0x00000000 }, + { 0x00600801, 0x211001a9, 0x00ab03c2, 0x00000000 }, + { 0x00600401, 0x212001a9, 0x00ab03c4, 0x00000000 }, + { 0x00600801, 0x213001a9, 0x00ab03c6, 0x00000000 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00800080 }, + { 0x00800008, 0x2340352d, 0x00009054, 0x008d0220 }, + { 0x00800008, 0x2360352d, 0x00009056, 0x008d0220 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x02600005, 0x20003dac, 0x00ae0340, 0x00010001 }, + { 0x02600005, 0x20003dac, 0x02ae0360, 0x00010001 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00800080 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c000c0 }, + { 0x00200401, 0x25d0022d, 0x004590c2, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990a8, 0x00000000 }, + { 0x00200001, 0x25d80109, 0x00450600, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffb92 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00810081 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c100c1 }, + { 0x00200401, 0x25d0022d, 0x004590ca, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990b8, 0x00000000 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffb84 }, + { 0x00800008, 0x2340352d, 0x00009048, 0x008d0220 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00e000e0 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01000100 }, + { 0x00200401, 0x25d0022d, 0x004590c4, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990ac, 0x00000000 }, + { 0x02600005, 0x20003dac, 0x00ae0340, 0x00010001 }, + { 0x00000001, 0x260201e8, 0x00000000, 0x00000000 }, + { 0x00000401, 0x25da01e9, 0x00000000, 0x00000000 }, + { 0x00000801, 0x25d80109, 0x00000600, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffb6e }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00e100e1 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01010101 }, + { 0x00200401, 0x25d0022d, 0x004590cc, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990bc, 0x00000000 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffb60 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00000401, 0x27e001a1, 0x000005c0, 0x00000000 }, + { 0x00000c0c, 0x27e43da1, 0x000005c2, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0007000f }, + { 0x00802001, 0x20400022, 0x008d00c0, 0x00000000 }, + { 0x00802001, 0x20800022, 0x008d0100, 0x00000000 }, + { 0x00010001, 0x22000060, 0x02000000, 0x0a082704 }, + { 0x00110001, 0x22000060, 0x02000000, 0x0a082604 }, + { 0x01600031, 0x20000020, 0x508d07e0, 0x00000200 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00000401, 0x27e001a1, 0x000005c8, 0x00000000 }, + { 0x00000c0c, 0x27e43da1, 0x000005ca, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0001000f }, + { 0x00600001, 0x20400022, 0x008d0080, 0x00000000 }, + { 0x00010001, 0x22000060, 0x02000000, 0x0418a704 }, + { 0x00110001, 0x22000060, 0x02000000, 0x0418a604 }, + { 0x01600031, 0x26400021, 0x508d07e0, 0x00000200 }, + { 0x00600401, 0x2340012d, 0x008500cc, 0x00000000 }, + { 0x00600801, 0x2350012d, 0x0085010c, 0x00000000 }, + { 0x00800001, 0x236001ad, 0x002e0340, 0x00000000 }, + { 0x00600001, 0x202000a2, 0x008d0360, 0x00000000 }, + { 0x00000008, 0x27e03d29, 0x00000026, 0x00010001 }, + { 0x00800031, 0x20001d28, 0x608d07e0, 0x04080020 }, + { 0x00600001, 0x26400021, 0x008d0640, 0x00000000 }, + { 0x00600001, 0x260001e1, 0x00000000, 0x00000000 }, + { 0x00000009, 0x26143da1, 0x000005e2, 0x00120012 }, + { 0x00000440, 0x26141c21, 0x00000614, 0x00020000 }, + { 0x00000c01, 0x26120129, 0x0000000c, 0x00000000 }, + { 0x00000c01, 0x26100169, 0x00000000, 0x12121212 }, + { 0x00400801, 0x26000171, 0x00000000, 0xffffffff }, + { 0x00600031, 0x20001c20, 0x308d0600, 0x82008002 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00020002 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00000440, 0x27e03da1, 0x000005c0, 0x000c000c }, + { 0x00000c0c, 0x27e43da1, 0x000005c2, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x00070003 }, + { 0x00018022, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x22000060, 0x00000000, 0x02186004 }, + { 0x00010040, 0x27e43ca5, 0x020007e4, 0x00080008 }, + { 0x00008024, 0x34001c00, 0x00001400, 0x00010008 }, + { 0x00010001, 0x22000060, 0x02000000, 0x02186704 }, + { 0x00110001, 0x22000060, 0x02000000, 0x02186604 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x02600031, 0x23400025, 0x408d07e0, 0x00000200 }, + { 0x00800001, 0x236001ad, 0x002e0340, 0x00000000 }, + { 0x00600001, 0x202000a2, 0x008d0360, 0x00000000 }, + { 0x00000008, 0x27e03d29, 0x00000026, 0x00010001 }, + { 0x00800031, 0x20001d28, 0x608d07e0, 0x04080020 }, + { 0x00600001, 0x260001e1, 0x00000000, 0x00000000 }, + { 0x00000009, 0x26143da1, 0x000005e2, 0x00120012 }, + { 0x00000440, 0x26141c21, 0x00000614, 0x00020000 }, + { 0x00000c01, 0x26120129, 0x0000000c, 0x00000000 }, + { 0x00000c01, 0x26100169, 0x00000000, 0x12121212 }, + { 0x00400801, 0x26000171, 0x00000000, 0xffffffff }, + { 0x00600031, 0x20001c20, 0x308d0600, 0x82008002 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, + { 0x00a02001, 0x20400169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x206601ed, 0x00000000, 0x00010001 }, + { 0x00000009, 0x20663dad, 0x00000066, 0x000a000a }, + { 0x00000001, 0x22600169, 0x00000000, 0x00010001 }, + { 0x00000008, 0x22403dad, 0x00000026, 0x00010001 }, + { 0x00000041, 0x224235ad, 0x00000020, 0x00000022 }, + { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 }, + { 0x00000001, 0x203c0022, 0x00000018, 0x00000000 }, + { 0x00000001, 0x203f01f2, 0x00000000, 0x00000000 }, + { 0x00000001, 0x202c00e2, 0x00000000, 0x00000000 }, + { 0x00000001, 0x202c010a, 0x00000e00, 0x00000000 }, + { 0x00600001, 0x20400021, 0x008d0020, 0x00000000 }, + { 0x00400001, 0x205401ed, 0x00000000, 0x00000000 }, + { 0x00200040, 0x20583dad, 0x00450020, 0xffffffff }, + { 0x00000001, 0x22000060, 0x00000000, 0x06080000 }, + { 0x00600001, 0x26000021, 0x008d0000, 0x00000000 }, + { 0x00000001, 0x26140061, 0x00000000, 0x00c00400 }, + { 0x00000001, 0x26100169, 0x00000000, 0x12121212 }, + { 0x07600031, 0x26201c21, 0x308d0600, 0x02000000 }, + { 0x00000001, 0x22a00169, 0x00000000, 0x01400140 }, + { 0x00000040, 0x20283c22, 0x00000008, 0x00200020 }, + { 0x00000001, 0x203801e2, 0x00000000, 0x00010001 }, + { 0x00800001, 0x204001ae, 0x00b10020, 0x00000000 }, + { 0x00000008, 0x27e03d29, 0x000002a0, 0x00010001 }, + { 0x00800031, 0x20000128, 0x608d07e0, 0x00000200 }, + { 0x00000006, 0x203025a2, 0x00000066, 0x000002a0 }, + { 0x01600031, 0x20001c00, 0x708d0000, 0x02000001 }, + { 0x00000001, 0x20300022, 0x00000010, 0x00000000 }, + { 0x00000001, 0x22a00169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22600169, 0x00000000, 0x00020002 }, + { 0x00200401, 0x208000e5, 0x00000000, 0x00000000 }, + { 0x00000c01, 0x208800e5, 0x00000000, 0xffffffc6 }, + { 0x00000801, 0x208c00e5, 0x00000000, 0xffffffca }, + { 0x00200001, 0x260001ec, 0x00000000, 0x00000000 }, + { 0x00600001, 0x20000022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20283c22, 0x00000008, 0x00100010 }, + { 0x00000001, 0x206001ed, 0x00000000, 0x00020002 }, + { 0x00000001, 0x206201ad, 0x0000005a, 0x00000000 }, + { 0x00000001, 0x20a001ed, 0x00000000, 0x00000000 }, + { 0x00200001, 0x228001ed, 0x00000000, 0x00000000 }, + { 0x00802001, 0x20c00061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21000061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21400061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21800061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21c00061, 0x00000000, 0x00ff00ff }, + { 0x00000041, 0x22083dac, 0x00000056, 0x00040004 }, + { 0x05000010, 0x200035ac, 0x02000280, 0x00000240 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000004 }, + { 0x00000040, 0x22803dad, 0x00000280, 0xffffffff }, + { 0x00000030, 0x32000084, 0x00001200, 0x00000000 }, + { 0x01000010, 0x20002d28, 0x000090c2, 0x00000000 }, + { 0x03000010, 0x200035ac, 0x02000054, 0x00000058 }, + { 0x00000041, 0x22a03dad, 0x00000056, 0x00040004 }, + { 0x00010220, 0x34001c00, 0x00001400, 0xfffffff4 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000014 }, + { 0x00200001, 0xb0c00229, 0x00450054, 0x00000000 }, + { 0x00200040, 0x22803dad, 0x00450280, 0x00010001 }, + { 0x00000001, 0x20300022, 0x00000010, 0x00000000 }, + { 0x00000001, 0x20380122, 0x00000260, 0x00000000 }, + { 0x00800001, 0x204001ae, 0x00b10040, 0x00000000 }, + { 0x00000008, 0x20003d2a, 0x000002a0, 0x00010001 }, + { 0x00000040, 0x22602d29, 0x00000260, 0x00020002 }, + { 0x00800031, 0x20000008, 0x608d0000, 0x00000200 }, + { 0x00000006, 0x203025a2, 0x00000066, 0x000002a0 }, + { 0x01600031, 0x20001c00, 0x708d0000, 0x02000001 }, + { 0x04200010, 0x200035ac, 0x00450054, 0x00450060 }, + { 0x00010040, 0x20a03dad, 0x02000056, 0x00010001 }, + { 0x05200010, 0x200035ac, 0x02450280, 0x00450240 }, + { 0x00000001, 0x240001ec, 0x00000000, 0x00040004 }, + { 0x00000048, 0x22083dac, 0x00000056, 0x00040004 }, + { 0x00200040, 0x205455ad, 0x00450054, 0x00450034 }, + { 0x02000010, 0x20003d8c, 0x00000600, 0x00010001 }, + { 0x00000041, 0x220e3d8c, 0x00000602, 0x00040004 }, + { 0x00010041, 0x22083dac, 0x000000a0, 0x00040004 }, + { 0x00010401, 0x205601ad, 0x000000a0, 0x00000000 }, + { 0x00010840, 0x20543d2d, 0x000090c0, 0x00010001 }, + { 0x00000220, 0x34001400, 0x00001400, 0x00009c80 }, + { 0x01000010, 0x20003dac, 0x02000280, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000006 }, + { 0x00000030, 0x32000084, 0x00001200, 0x00000000 }, + { 0x00000040, 0x22803dad, 0x00000280, 0xffffffff }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffff6 }, + { 0x05000010, 0x200035ac, 0x00000240, 0x00000026 }, + { 0x00010220, 0x34001c00, 0x00001400, 0xfffffffc }, + { 0x07600031, 0x20001c20, 0x30000000, 0x02000001 }, + { 0x01600031, 0x20001c24, 0x708d0000, 0x82000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, + { 0x00400441, 0x45c03dad, 0x00000034, 0x00100010 }, + { 0x00400841, 0x45c23dad, 0x00000036, 0x00200020 }, + { 0x00200001, 0x260001ec, 0x00000000, 0x00000000 }, + { 0x00000001, 0x25e20129, 0x00000036, 0x00000000 }, + { 0x00000041, 0x25e435a1, 0x00000020, 0x00000036 }, + { 0x00000040, 0x25e43421, 0x000005e4, 0x00000034 }, + { 0x00000041, 0x25e42c21, 0x000005e4, 0x00800080 }, + { 0x00000040, 0x25c43dad, 0x000005c4, 0xfffcfffc }, + { 0x00000040, 0x25ca3dad, 0x000005ca, 0xfffcfffc }, + { 0x00000005, 0x202a3dad, 0x0000002a, 0xfffdfffd }, + { 0x02000005, 0x20002d2c, 0x0200002a, 0x00020002 }, + { 0x00000001, 0x27e80021, 0x000005e4, 0x00000000 }, + { 0x00010040, 0x27e83c21, 0x020007e8, 0x00400040 }, + { 0x01600031, 0x22401c21, 0x408d07e0, 0x02885800 }, + { 0x00000001, 0x220801ec, 0x00000000, 0x02400240 }, + { 0x01800005, 0x20002d28, 0x02b19040, 0xffffffff }, + { 0x02000005, 0x20003e2c, 0x00009030, 0x00010001 }, + { 0x00000005, 0x25ec2e29, 0x00009002, 0x000a000a }, + { 0x00000005, 0x25ea2e29, 0x00009002, 0x00060006 }, + { 0x000b0220, 0x34001c00, 0x02001400, 0x00000252 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000250 }, + { 0x01000010, 0x20003d2c, 0x000005ec, 0x00080008 }, + { 0x00000005, 0x25e03d8d, 0x00000600, 0x00010001 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00020002 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00200401, 0x27e001a5, 0x004505c0, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x000f000f }, + { 0x00018022, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x22000060, 0x00000000, 0x0288a001 }, + { 0x00010040, 0x27e43ca5, 0x020007e4, 0x00100010 }, + { 0x00008024, 0x34001c00, 0x00001400, 0x0001000a }, + { 0x00010001, 0x22000060, 0x02000000, 0x0288e701 }, + { 0x00110001, 0x22000060, 0x02000000, 0x0288e601 }, + { 0x0000000c, 0x27e43ca5, 0x000007e4, 0x00010001 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x01600031, 0x20c00021, 0x408d07e0, 0x00000200 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00020002 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00200401, 0x27e001a1, 0x004505c4, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x000f0003 }, + { 0x00018022, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x22000060, 0x00000000, 0x02286003 }, + { 0x00010040, 0x27e43ca5, 0x020007e4, 0x00100010 }, + { 0x00008024, 0x34001c00, 0x00001400, 0x0001000a }, + { 0x00010001, 0x22000060, 0x02000000, 0x02286703 }, + { 0x00110001, 0x22000060, 0x02000000, 0x02286603 }, + { 0x0000000c, 0x27e43ca5, 0x000007e4, 0x00010001 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x02600031, 0x23400025, 0x408d07e0, 0x00000200 }, + { 0x00800401, 0x23800231, 0x00a900c0, 0x00000000 }, + { 0x00800801, 0x23900231, 0x00a90100, 0x00000000 }, + { 0x00800401, 0x23a00231, 0x00a90140, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00a90180, 0x00000000 }, + { 0x00800401, 0x23c00231, 0x00a900c4, 0x00000000 }, + { 0x00800801, 0x23d00231, 0x00a90104, 0x00000000 }, + { 0x00800401, 0x23e00231, 0x00a90144, 0x00000000 }, + { 0x00800801, 0x23f00231, 0x00a90184, 0x00000000 }, + { 0x00800401, 0x24000231, 0x00a900c8, 0x00000000 }, + { 0x00800801, 0x24100231, 0x00a90108, 0x00000000 }, + { 0x00800401, 0x24200231, 0x00a90148, 0x00000000 }, + { 0x00800801, 0x24300231, 0x00a90188, 0x00000000 }, + { 0x00800401, 0x24400231, 0x00a900cc, 0x00000000 }, + { 0x00800801, 0x24500231, 0x00a9010c, 0x00000000 }, + { 0x00800401, 0x24600231, 0x00a9014c, 0x00000000 }, + { 0x00800801, 0x24700231, 0x00a9018c, 0x00000000 }, + { 0x00800401, 0x20c00231, 0x00cf0380, 0x00000000 }, + { 0x00800801, 0x20d00231, 0x00cf0381, 0x00000000 }, + { 0x00800401, 0x20e00231, 0x00cf0382, 0x00000000 }, + { 0x00800801, 0x20f00231, 0x00cf0383, 0x00000000 }, + { 0x00800401, 0x21000231, 0x00cf03c0, 0x00000000 }, + { 0x00800801, 0x21100231, 0x00cf03c1, 0x00000000 }, + { 0x00800401, 0x21200231, 0x00cf03c2, 0x00000000 }, + { 0x00800801, 0x21300231, 0x00cf03c3, 0x00000000 }, + { 0x00800401, 0x21400231, 0x00cf0400, 0x00000000 }, + { 0x00800801, 0x21500231, 0x00cf0401, 0x00000000 }, + { 0x00800401, 0x21600231, 0x00cf0402, 0x00000000 }, + { 0x00800801, 0x21700231, 0x00cf0403, 0x00000000 }, + { 0x00800401, 0x21800231, 0x00cf0440, 0x00000000 }, + { 0x00800801, 0x21900231, 0x00cf0441, 0x00000000 }, + { 0x00800401, 0x21a00231, 0x00cf0442, 0x00000000 }, + { 0x00800801, 0x21b00231, 0x00cf0443, 0x00000000 }, + { 0x00800401, 0x20400231, 0x00cf0340, 0x00000000 }, + { 0x00800801, 0x20500231, 0x00cf0341, 0x00000000 }, + { 0x00800401, 0x20600231, 0x00cf0342, 0x00000000 }, + { 0x00800801, 0x20700231, 0x00cf0343, 0x00000000 }, + { 0x01600010, 0x20003d2c, 0x000005ea, 0x00040004 }, + { 0x01600010, 0x20003d2c, 0x020005ea, 0x00020002 }, + { 0x00800001, 0x21c00229, 0x00009080, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00009081, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00289060, 0x00000000 }, + { 0x00610401, 0x41c00229, 0x00009080, 0x00000000 }, + { 0x00610801, 0x41c20229, 0x00009090, 0x00000000 }, + { 0x00610401, 0x41e00229, 0x00009081, 0x00000000 }, + { 0x00610801, 0x41e20229, 0x00009091, 0x00000000 }, + { 0x00610401, 0x42000229, 0x00249060, 0x00000000 }, + { 0x00610801, 0x42020229, 0x00249098, 0x00000000 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00400040 }, + { 0x00610401, 0x21c00229, 0x02009080, 0x00000000 }, + { 0x00610801, 0x21d00229, 0x02009090, 0x00000000 }, + { 0x00610401, 0x21e00229, 0x02009081, 0x00000000 }, + { 0x00610801, 0x21f00229, 0x02009091, 0x00000000 }, + { 0x00610401, 0x22000229, 0x02249060, 0x00000000 }, + { 0x00610801, 0x22100229, 0x02249098, 0x00000000 }, + { 0x00800008, 0x25a03d29, 0x008d01c0, 0x00020002 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00400040 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c000c0 }, + { 0x00200001, 0x25d80129, 0x00459050, 0x00000000 }, + { 0x00800040, 0x25a03d29, 0x00b105a0, 0x00020002 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001b4 }, + { 0x00800008, 0x25a03e29, 0x00009084, 0x00020002 }, + { 0x00800001, 0x21c00229, 0x00009084, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00009085, 0x00000000 }, + { 0x00000001, 0x25da01e9, 0x00000000, 0x00000000 }, + { 0x00800040, 0x25a03d29, 0x00b105a0, 0x00020002 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00200020 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00c000c0 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01000100 }, + { 0x00000001, 0x25d80129, 0x00009040, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00289064, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000019c }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00100010 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x01000100 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01400140 }, + { 0x00000001, 0x25d80129, 0x00009042, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00289068, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000018e }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00200020 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x01400140 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01800180 }, + { 0x00000001, 0x25d80129, 0x00009044, 0x00000000 }, + { 0x00800001, 0x22000229, 0x0028906c, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000180 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00020002 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00200401, 0x27e001a1, 0x004505c4, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x000f0003 }, + { 0x00800401, 0x23400231, 0x00a90040, 0x00000000 }, + { 0x00800801, 0x23500231, 0x00a90044, 0x00000000 }, + { 0x00800401, 0x23600231, 0x00a90048, 0x00000000 }, + { 0x00800801, 0x23700231, 0x00a9004c, 0x00000000 }, + { 0x00800001, 0x20400232, 0x002b0340, 0x00000000 }, + { 0x00800001, 0x20500232, 0x002b0350, 0x00000000 }, + { 0x00800001, 0x20600232, 0x002b0360, 0x00000000 }, + { 0x00800001, 0x20700232, 0x002b0370, 0x00000000 }, + { 0x00018022, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x22000060, 0x00000000, 0x06082003 }, + { 0x00010040, 0x27e43ca5, 0x020007e4, 0x00100010 }, + { 0x00008024, 0x34001c00, 0x00001400, 0x0001000a }, + { 0x00010001, 0x22000060, 0x02000000, 0x06082703 }, + { 0x00110001, 0x22000060, 0x02000000, 0x06082603 }, + { 0x0000000c, 0x27e43ca5, 0x000007e4, 0x00010001 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x01600031, 0x20000020, 0x508d07e0, 0x00000200 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00020002 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00200401, 0x27e001a1, 0x004505c8, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0003000f }, + { 0x00018022, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x22000060, 0x00000000, 0x02286003 }, + { 0x00010040, 0x27e43ca5, 0x020007e4, 0x00100010 }, + { 0x01000005, 0x20003dac, 0x020005e0, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000006 }, + { 0x00000440, 0x27e43ca5, 0x000007e4, 0xfffcfffc }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0007000f }, + { 0x00000040, 0x22000c00, 0x00000200, 0x00200000 }, + { 0x00008024, 0x34001c00, 0x00001400, 0x0001000c }, + { 0x0000000c, 0x27e43da5, 0x000005c2, 0x00010001 }, + { 0x00010001, 0x22000060, 0x02000000, 0x02286703 }, + { 0x00110001, 0x22000060, 0x02000000, 0x02286603 }, + { 0x00000040, 0x27e43ca5, 0x000007e4, 0xfffcfffc }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x01600031, 0x20400021, 0x408d07e0, 0x00000200 }, + { 0x00800401, 0x23800231, 0x00a900c0, 0x00000000 }, + { 0x00800801, 0x23900231, 0x00a90100, 0x00000000 }, + { 0x00800401, 0x23a00231, 0x00a90140, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00a90180, 0x00000000 }, + { 0x00800401, 0x23c00231, 0x00a900c4, 0x00000000 }, + { 0x00800801, 0x23d00231, 0x00a90104, 0x00000000 }, + { 0x00800401, 0x23e00231, 0x00a90144, 0x00000000 }, + { 0x00800801, 0x23f00231, 0x00a90184, 0x00000000 }, + { 0x00800401, 0x24000231, 0x00a900c8, 0x00000000 }, + { 0x00800801, 0x24100231, 0x00a90108, 0x00000000 }, + { 0x00800401, 0x24200231, 0x00a90148, 0x00000000 }, + { 0x00800801, 0x24300231, 0x00a90188, 0x00000000 }, + { 0x00800401, 0x24400231, 0x00a900cc, 0x00000000 }, + { 0x00800801, 0x24500231, 0x00a9010c, 0x00000000 }, + { 0x00800401, 0x24600231, 0x00a9014c, 0x00000000 }, + { 0x00800801, 0x24700231, 0x00a9018c, 0x00000000 }, + { 0x00800401, 0x20c00231, 0x00cf0380, 0x00000000 }, + { 0x00800801, 0x20d00231, 0x00cf0381, 0x00000000 }, + { 0x00800401, 0x20e00231, 0x00cf0382, 0x00000000 }, + { 0x00800801, 0x20f00231, 0x00cf0383, 0x00000000 }, + { 0x00800401, 0x21000231, 0x00cf03c0, 0x00000000 }, + { 0x00800801, 0x21100231, 0x00cf03c1, 0x00000000 }, + { 0x00800401, 0x21200231, 0x00cf03c2, 0x00000000 }, + { 0x00800801, 0x21300231, 0x00cf03c3, 0x00000000 }, + { 0x00800401, 0x21400231, 0x00cf0400, 0x00000000 }, + { 0x00800801, 0x21500231, 0x00cf0401, 0x00000000 }, + { 0x00800401, 0x21600231, 0x00cf0402, 0x00000000 }, + { 0x00800801, 0x21700231, 0x00cf0403, 0x00000000 }, + { 0x00800401, 0x21800231, 0x00cf0440, 0x00000000 }, + { 0x00800801, 0x21900231, 0x00cf0441, 0x00000000 }, + { 0x00800401, 0x21a00231, 0x00cf0442, 0x00000000 }, + { 0x00800801, 0x21b00231, 0x00cf0443, 0x00000000 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00800080 }, + { 0x00000001, 0x260201ac, 0x000005e0, 0x00000000 }, + { 0x00800008, 0x25a03e29, 0x00009082, 0x00020002 }, + { 0x00200001, 0x25d80129, 0x00459054, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00009082, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00009083, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00289070, 0x00000000 }, + { 0x00800040, 0x25a03d29, 0x00b105a0, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000050 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000a }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00400040 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c000c0 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000000d4 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000044 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x05000500 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x05400540 }, + { 0x00800001, 0x25000129, 0x00ad0040, 0x00000000 }, + { 0x00800001, 0x25200129, 0x00ad0080, 0x00000000 }, + { 0x00800001, 0x25400129, 0x00ad00c0, 0x00000000 }, + { 0x00800001, 0x25600129, 0x00ad0100, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000000c2 }, + { 0x00600001, 0x20600129, 0x008d0510, 0x00000000 }, + { 0x00600001, 0x20800129, 0x008d0520, 0x00000000 }, + { 0x00600001, 0x20a00129, 0x008d0530, 0x00000000 }, + { 0x00600001, 0x20c00129, 0x008d0540, 0x00000000 }, + { 0x00600001, 0x20e00129, 0x008d0550, 0x00000000 }, + { 0x00600001, 0x21000129, 0x008d0560, 0x00000000 }, + { 0x00800008, 0x25a03e29, 0x00009092, 0x00020002 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x05000500 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x05400540 }, + { 0x00800001, 0x25000129, 0x00ad0050, 0x00000000 }, + { 0x00800001, 0x25200129, 0x00ad0090, 0x00000000 }, + { 0x00800001, 0x25400129, 0x00ad00d0, 0x00000000 }, + { 0x00800001, 0x25600129, 0x00ad0110, 0x00000000 }, + { 0x00200001, 0x25d80129, 0x0045905c, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00009092, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00009093, 0x00000000 }, + { 0x00800001, 0x22000229, 0x0028909c, 0x00000000 }, + { 0x00800040, 0x25a03d29, 0x00b105a0, 0x00020002 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000009a }, + { 0x00600001, 0x20700129, 0x008d0510, 0x00000000 }, + { 0x00600001, 0x20900129, 0x008d0520, 0x00000000 }, + { 0x00600001, 0x20b00129, 0x008d0530, 0x00000000 }, + { 0x00600001, 0x20d00129, 0x008d0540, 0x00000000 }, + { 0x00600001, 0x20f00129, 0x008d0550, 0x00000000 }, + { 0x00600001, 0x21100129, 0x008d0560, 0x00000000 }, + { 0x00800008, 0x25a03e29, 0x00009084, 0x00020002 }, + { 0x00800001, 0x21c00229, 0x00009084, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00009085, 0x00000000 }, + { 0x00000001, 0x25da01e9, 0x00000000, 0x00000000 }, + { 0x00800040, 0x25a03d29, 0x00b105a0, 0x00020002 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00200020 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00c000c0 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01000100 }, + { 0x00000001, 0x25d80129, 0x00009046, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00289074, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000076 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00100010 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x01000100 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01400140 }, + { 0x00000001, 0x25d80129, 0x00009048, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00289078, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000068 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00200020 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x01400140 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01800180 }, + { 0x00000001, 0x25d80129, 0x0000904a, 0x00000000 }, + { 0x00800001, 0x22000229, 0x0028907c, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000005a }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00020002 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00200401, 0x27e001a1, 0x004505c0, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x000f000f }, + { 0x00802001, 0x20400022, 0x008d00c0, 0x00000000 }, + { 0x00802001, 0x20800022, 0x008d0100, 0x00000000 }, + { 0x00802001, 0x20c00022, 0x008d0140, 0x00000000 }, + { 0x00802001, 0x21000022, 0x008d0180, 0x00000000 }, + { 0x00018022, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x22000060, 0x00000000, 0x12082003 }, + { 0x00010040, 0x27e43ca5, 0x020007e4, 0x00100010 }, + { 0x00008024, 0x34001c00, 0x00001400, 0x0001000a }, + { 0x00010001, 0x22000060, 0x02000000, 0x12082703 }, + { 0x00110001, 0x22000060, 0x02000000, 0x12082603 }, + { 0x0000000c, 0x27e43ca5, 0x000007e4, 0x00010001 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x01600031, 0x20000020, 0x508d07e0, 0x00000200 }, + { 0x01800005, 0x20003dac, 0x020005e0, 0x00010001 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00020002 }, + { 0x00200401, 0x27e001a1, 0x004505c8, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0003000f }, + { 0x00812001, 0x20400022, 0x028d0040, 0x00000000 }, + { 0x00912001, 0x20400022, 0x028d0080, 0x00000000 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00018022, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x22000060, 0x00000000, 0x0618a003 }, + { 0x00010040, 0x27e43ca5, 0x020007e4, 0x00100010 }, + { 0x00008024, 0x34001c00, 0x00001400, 0x0001000c }, + { 0x0000000c, 0x27e43da5, 0x000005c2, 0x00010001 }, + { 0x00010001, 0x22000060, 0x02000000, 0x0618a703 }, + { 0x00110001, 0x22000060, 0x02000000, 0x0618a603 }, + { 0x00000040, 0x27e43ca5, 0x000007e4, 0xfffcfffc }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x01600031, 0x26400021, 0x508d07e0, 0x00000200 }, + { 0x01000005, 0x20003dac, 0x0000002a, 0x00020002 }, + { 0x00000006, 0x202a3dad, 0x0000002a, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x00001400, 0xfffffd94 }, + { 0x00600001, 0x26400021, 0x008d0640, 0x00000000 }, + { 0x00600001, 0x260001e1, 0x00000000, 0x00000000 }, + { 0x00000009, 0x26143da1, 0x000005e2, 0x00120012 }, + { 0x00000440, 0x26141c21, 0x00000614, 0x00020000 }, + { 0x00000c01, 0x26120129, 0x0000000c, 0x00000000 }, + { 0x00000c01, 0x26100169, 0x00000000, 0x12121212 }, + { 0x00400801, 0x26000171, 0x00000000, 0xffffffff }, + { 0x00600031, 0x20001c20, 0x308d0600, 0x82008002 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00800040, 0x2400462d, 0x00b19c00, 0x00b1d830 }, + { 0x00800040, 0x2340462d, 0x00b19820, 0x00b1d830 }, + { 0x00800040, 0x2360462d, 0x00b19c10, 0x00b1dc00 }, + { 0x05810010, 0x200025ac, 0x008d2400, 0x008d01c0 }, + { 0x05810010, 0x200025ac, 0x008d2340, 0x008d01e0 }, + { 0x05810010, 0x200025ac, 0x008d2360, 0x008d01e0 }, + { 0x00818022, 0x34001c00, 0x00001400, 0x000000c8 }, + { 0x00800040, 0x2440462d, 0x00b19810, 0x00b1d830 }, + { 0x00800040, 0x2460462d, 0x00b19c20, 0x00b1dc00 }, + { 0x00800201, 0x24a00129, 0x00b19820, 0x00000000 }, + { 0x00818022, 0x34001c00, 0x02001400, 0x00000066 }, + { 0x05800010, 0x200025ac, 0x028d2400, 0x008d05a0 }, + { 0x00800040, 0x2520462d, 0x00b19830, 0x00b19820 }, + { 0x00800040, 0x2540462d, 0x00b19c00, 0x00b19c10 }, + { 0x00000201, 0x26000108, 0x00000602, 0x00000000 }, + { 0x05810010, 0x200025ac, 0x028d2440, 0x008d01e0 }, + { 0x05810010, 0x200025ac, 0x008d2460, 0x008d01e0 }, + { 0x00818022, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x00800040, 0x2560462d, 0x00b19810, 0x00b19800 }, + { 0x00800040, 0x238045ad, 0x008d0520, 0x00b19c00 }, + { 0x00800040, 0x24003d8c, 0x00b10400, 0x00040004 }, + { 0x00800040, 0x23a0458d, 0x00b10400, 0x00b19810 }, + { 0x00800048, 0x24003dac, 0x008d0560, 0x00020002 }, + { 0x80800008, 0x43c03d91, 0x00b10400, 0x00030003 }, + { 0x00800040, 0x24003dac, 0x00b103a0, 0xfffefffe }, + { 0x80800008, 0x43603d91, 0x00b10400, 0x00020002 }, + { 0x00800040, 0x2400362c, 0x00b19c10, 0x00b10380 }, + { 0x00800040, 0x2400358c, 0x00b10400, 0x00b103a0 }, + { 0x80800008, 0x43403d91, 0x00b10400, 0x00030003 }, + { 0x00800001, 0xb8100231, 0x00ae03c0, 0x00000000 }, + { 0x00800001, 0xb8200231, 0x00ae0360, 0x00000000 }, + { 0x00800001, 0xb8300231, 0x00ae0340, 0x00000000 }, + { 0x00808024, 0x34001c00, 0x00001400, 0x0001000e }, + { 0x00800040, 0x2400362c, 0x00b19820, 0x008d0520 }, + { 0x00800040, 0x2400458c, 0x00b10400, 0x00b19c10 }, + { 0x00800040, 0x24003d8c, 0x00b10400, 0x00020002 }, + { 0x80800008, 0x43403d91, 0x00b10400, 0x00020002 }, + { 0x00800001, 0xb8300231, 0x00ae0340, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00818022, 0x34001c00, 0x00001400, 0x0000001e }, + { 0x00800040, 0x2580462d, 0x00b19c20, 0x00b19c30 }, + { 0x00800040, 0x238045ad, 0x008d0540, 0x008d04b0 }, + { 0x00800040, 0x24003d8c, 0x00b10400, 0x00040004 }, + { 0x00800040, 0x23a0458d, 0x00b10400, 0x00b19c20 }, + { 0x00800048, 0x24003dac, 0x008d0580, 0x00020002 }, + { 0x80800008, 0x43c03d91, 0x00b10400, 0x00030003 }, + { 0x00800040, 0x24003dac, 0x00b103a0, 0xfffefffe }, + { 0x80800008, 0x43603d91, 0x00b10400, 0x00020002 }, + { 0x00800040, 0x2400362c, 0x008d04a0, 0x00b10380 }, + { 0x00800040, 0x2400358c, 0x00b10400, 0x00b103a0 }, + { 0x80800008, 0x43403d91, 0x00b10400, 0x00030003 }, + { 0x00800001, 0xbc200231, 0x00ae03c0, 0x00000000 }, + { 0x00800001, 0xbc100231, 0x00ae0360, 0x00000000 }, + { 0x00800001, 0xbc000231, 0x00ae0340, 0x00000000 }, + { 0x00808024, 0x34001c00, 0x00001400, 0x0001000e }, + { 0x00800040, 0x2400362c, 0x008d04a0, 0x008d0540 }, + { 0x00800040, 0x2400458c, 0x00b10400, 0x00b19c10 }, + { 0x00800040, 0x24003d8c, 0x00b10400, 0x00020002 }, + { 0x80800008, 0x43403d91, 0x00b10400, 0x00020002 }, + { 0x00800001, 0xbc000231, 0x00ae0340, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00808024, 0x34001c00, 0x00001400, 0x0001005a }, + { 0x00800001, 0x23e0012d, 0x008d0200, 0x00000000 }, + { 0x05800010, 0x200025ac, 0x008d2440, 0x008d01e0 }, + { 0x05800010, 0x200025ac, 0x028d2460, 0x008d01e0 }, + { 0x00800040, 0x24003e2c, 0x00b19820, 0x00040004 }, + { 0x00800048, 0x24003dac, 0x008d0400, 0x00040004 }, + { 0x00800040, 0x2400458c, 0x00b10400, 0x00b1dc10 }, + { 0x00800008, 0x23403d8d, 0x00b10400, 0x00030003 }, + { 0x00810040, 0x23e03dad, 0x008d03e0, 0x00010001 }, + { 0x00200201, 0x25ec018d, 0x00450600, 0x00000000 }, + { 0x00810040, 0x23e03dad, 0x028d03e0, 0x00010001 }, + { 0x03800010, 0x200035ac, 0x008d0340, 0x008d03e0 }, + { 0x05800010, 0x200035ac, 0x028d0340, 0x008d43e0 }, + { 0x00800042, 0x24c0462d, 0x00b19830, 0x00b19c00 }, + { 0x00810001, 0x234001ad, 0x008d03e0, 0x00000000 }, + { 0x00810001, 0x234001ad, 0x028d43e0, 0x00000000 }, + { 0x00200201, 0x260001ac, 0x004505ec, 0x00000000 }, + { 0x80800040, 0x43603631, 0x00b19830, 0x008d0340 }, + { 0x80800040, 0x43403631, 0x00b19c00, 0x008d4340 }, + { 0x00800001, 0xb8300231, 0x00ae0360, 0x00000000 }, + { 0x00800001, 0xbc000231, 0x00ae0340, 0x00000000 }, + { 0x00818022, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00800040, 0x2400362c, 0x00b19810, 0x008d04c0 }, + { 0x00800048, 0x24003e2c, 0x00b19820, 0xfffefffe }, + { 0x00800008, 0x23603d8d, 0x00b10400, 0x00010001 }, + { 0x03800010, 0x200025ac, 0x008d0360, 0x008d0200 }, + { 0x05800010, 0x200025ac, 0x028d0360, 0x008d4200 }, + { 0x00810001, 0x2360012d, 0x008d0200, 0x00000000 }, + { 0x00810001, 0x2360012d, 0x028d4200, 0x00000000 }, + { 0x00000201, 0x260201ac, 0x000005ee, 0x00000000 }, + { 0x80800040, 0x43603631, 0x00b19820, 0x008d0360 }, + { 0x00800001, 0xb8200231, 0x00ae0360, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00818022, 0x34001c00, 0x02001400, 0x00000014 }, + { 0x00800040, 0x2400362c, 0x00b19c20, 0x008d04c0 }, + { 0x00800048, 0x24003e2c, 0x00b19c10, 0xfffefffe }, + { 0x00800008, 0x23603d8d, 0x00b10400, 0x00010001 }, + { 0x03800010, 0x200025ac, 0x008d0360, 0x008d0200 }, + { 0x05800010, 0x200025ac, 0x028d0360, 0x008d4200 }, + { 0x00810001, 0x2360012d, 0x008d0200, 0x00000000 }, + { 0x00810001, 0x2360012d, 0x028d4200, 0x00000000 }, + { 0x80800040, 0x43603631, 0x00b19c10, 0x008d0360 }, + { 0x00800001, 0xbc100231, 0x00ae0360, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x34000020, 0x000007c0, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, + { 0x00a02001, 0x20400169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x206601ed, 0x00000000, 0x00010001 }, + { 0x00000009, 0x20663dad, 0x00000066, 0x000a000a }, + { 0x00000001, 0x206801ed, 0x00000000, 0x01400140 }, + { 0x00000001, 0x22600169, 0x00000000, 0x00030003 }, + { 0x00000008, 0x22403dad, 0x00000026, 0x00010001 }, + { 0x00000041, 0x224235ad, 0x00000020, 0x00000022 }, + { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 }, + { 0x00000001, 0x203c0022, 0x00000018, 0x00000000 }, + { 0x00000001, 0x203f01f2, 0x00000000, 0x00000000 }, + { 0x00000001, 0x202c00e2, 0x00000000, 0x00000000 }, + { 0x00000001, 0x202c010a, 0x00000e00, 0x00000000 }, + { 0x00600001, 0x20400021, 0x008d0020, 0x00000000 }, + { 0x00400001, 0x205401ed, 0x00000000, 0x00000000 }, + { 0x00200040, 0x20583dad, 0x00450020, 0xffffffff }, + { 0x00000001, 0x22000060, 0x00000000, 0x06080000 }, + { 0x00600001, 0x26000021, 0x008d0000, 0x00000000 }, + { 0x00000001, 0x26140061, 0x00000000, 0x00c00400 }, + { 0x00000001, 0x26100169, 0x00000000, 0x12121212 }, + { 0x07600031, 0x26201c21, 0x308d0600, 0x02000000 }, + { 0x00200401, 0x208000e5, 0x00000000, 0x00000000 }, + { 0x00000c01, 0x208800e5, 0x00000000, 0xffffffc4 }, + { 0x00000801, 0x208c00e5, 0x00000000, 0xffffffc8 }, + { 0x00200001, 0x260001ec, 0x00000000, 0x00000000 }, + { 0x00600001, 0x20000022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20283c22, 0x00000008, 0x00100010 }, + { 0x00000001, 0x206001ed, 0x00000000, 0x00020002 }, + { 0x00000001, 0x206201ad, 0x0000005a, 0x00000000 }, + { 0x00000001, 0x20a001ed, 0x00000000, 0x00000000 }, + { 0x00200001, 0x228001ed, 0x00000000, 0x00000000 }, + { 0x00802001, 0x20c00061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21000061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21400061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21800061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21c00061, 0x00000000, 0x00ff00ff }, + { 0x00000041, 0x22083dac, 0x00000056, 0x00040004 }, + { 0x05000010, 0x200035ac, 0x02000280, 0x00000240 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000004 }, + { 0x00000040, 0x22803dad, 0x00000280, 0xffffffff }, + { 0x00000030, 0x32000084, 0x00001200, 0x00000000 }, + { 0x01000010, 0x20002d28, 0x000090c2, 0x00000000 }, + { 0x03000010, 0x200035ac, 0x02000054, 0x00000058 }, + { 0x00800001, 0x240001ac, 0x00000068, 0x00000000 }, + { 0x00000048, 0x22a03dad, 0x00000056, 0x00040004 }, + { 0x00010220, 0x34001c00, 0x00001400, 0xfffffff2 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000014 }, + { 0x00200001, 0xb0c00229, 0x00450054, 0x00000000 }, + { 0x00200040, 0x22803dad, 0x00450280, 0x00010001 }, + { 0x00000001, 0x20300022, 0x00000010, 0x00000000 }, + { 0x00000001, 0x20380122, 0x00000260, 0x00000000 }, + { 0x00800001, 0x204001ae, 0x00b10040, 0x00000000 }, + { 0x00000008, 0x20003d2a, 0x000002a0, 0x00010001 }, + { 0x00000040, 0x22602d29, 0x00000260, 0x00020002 }, + { 0x00800031, 0x20000008, 0x608d0000, 0x00000200 }, + { 0x00000006, 0x203025a2, 0x00000066, 0x000002a0 }, + { 0x01600031, 0x20001c00, 0x708d0000, 0x02000001 }, + { 0x04200010, 0x200035ac, 0x00450054, 0x00450060 }, + { 0x00010040, 0x20a03dad, 0x02000056, 0x00010001 }, + { 0x05200010, 0x200035ac, 0x02450280, 0x00450240 }, + { 0x00000001, 0x240001ec, 0x00000000, 0x00040004 }, + { 0x00000048, 0x22083dac, 0x00000056, 0x00040004 }, + { 0x00200040, 0x205455ad, 0x00450054, 0x00450034 }, + { 0x02000010, 0x20003d8c, 0x00000600, 0x00010001 }, + { 0x00000041, 0x220e3d8c, 0x00000602, 0x00040004 }, + { 0x00010041, 0x22083dac, 0x000000a0, 0x00040004 }, + { 0x00010401, 0x205601ad, 0x000000a0, 0x00000000 }, + { 0x00010840, 0x20543d2d, 0x000090c0, 0x00010001 }, + { 0x00000220, 0x34001400, 0x00001400, 0x00009c80 }, + { 0x01000010, 0x20003dac, 0x02000280, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000014 }, + { 0x00000030, 0x32000084, 0x00001200, 0x00000000 }, + { 0x00000040, 0x22803dad, 0x00000280, 0xffffffff }, + { 0x00600401, 0x260001e1, 0x00000000, 0x00000000 }, + { 0x00000c01, 0x26140061, 0x00000000, 0x01800000 }, + { 0x00000c01, 0x26120129, 0x0000000c, 0x00000000 }, + { 0x00000801, 0x26100169, 0x00000000, 0x12121212 }, + { 0x00000040, 0x2078252d, 0x00000026, 0x00004280 }, + { 0x00400001, 0x26000231, 0x00000078, 0x00000000 }, + { 0x00600031, 0x26201c21, 0x308d0600, 0x02000002 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffffe8 }, + { 0x07600031, 0x20001c20, 0x30000000, 0x02000001 }, + { 0x01600031, 0x20001c24, 0x708d0000, 0x82000012 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, + { 0x00400441, 0x45c03dad, 0x00000034, 0x00100010 }, + { 0x00400841, 0x45c23dad, 0x00000036, 0x00200020 }, + { 0x00200001, 0x260001ec, 0x00000000, 0x00000000 }, + { 0x00000001, 0x25e20129, 0x00000036, 0x00000000 }, + { 0x00000041, 0x25e435a1, 0x00000020, 0x00000036 }, + { 0x00000040, 0x25e43421, 0x000005e4, 0x00000034 }, + { 0x00000041, 0x25e42c21, 0x000005e4, 0x00800080 }, + { 0x00000040, 0x25c43dad, 0x000005c4, 0xfffcfffc }, + { 0x00000040, 0x25ca3dad, 0x000005ca, 0xfffcfffc }, + { 0x00000005, 0x202a3dad, 0x0000002a, 0xfffdfffd }, + { 0x00800001, 0x2220022d, 0x000d002c, 0x00000000 }, + { 0x00600040, 0x22303dad, 0x008d0230, 0x00080008 }, + { 0x02000005, 0x20002d2c, 0x0200002a, 0x00020002 }, + { 0x00000001, 0x27e80021, 0x000005e4, 0x00000000 }, + { 0x00010040, 0x27e83c21, 0x020007e8, 0x00400040 }, + { 0x01600031, 0x22401c21, 0x408d07e0, 0x02885800 }, + { 0x00000001, 0x220801ec, 0x00000000, 0x02400240 }, + { 0x01800005, 0x20002d28, 0x02b19040, 0xffffffff }, + { 0x02000005, 0x20003e2c, 0x00009030, 0x00010001 }, + { 0x00000005, 0x25ec2e29, 0x00009002, 0x000a000a }, + { 0x00000005, 0x25ea2e29, 0x00009002, 0x00060006 }, + { 0x000b0220, 0x34001c00, 0x02001400, 0x00000252 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000250 }, + { 0x01000010, 0x20003d2c, 0x000005ec, 0x00080008 }, + { 0x00000005, 0x25e03d8d, 0x00000600, 0x00010001 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00020002 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00000401, 0x27e001a1, 0x000005c0, 0x00000000 }, + { 0x00000c0c, 0x27e43da1, 0x000005c2, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0007000f }, + { 0x00018022, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x22000060, 0x00000000, 0x0248a002 }, + { 0x00010040, 0x27e43ca5, 0x020007e4, 0x00080008 }, + { 0x00008024, 0x34001c00, 0x00001400, 0x0001000a }, + { 0x00010001, 0x22000060, 0x02000000, 0x0248e702 }, + { 0x00110001, 0x22000060, 0x02000000, 0x0248e602 }, + { 0x0000000c, 0x27e43ca5, 0x000007e4, 0x00010001 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x02600031, 0x20c00021, 0x408d07e0, 0x00000200 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00020002 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00000401, 0x27e001a1, 0x000005c4, 0x00000000 }, + { 0x00000c0c, 0x27e43da1, 0x000005c6, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x00070003 }, + { 0x00018022, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x22000060, 0x00000000, 0x02186004 }, + { 0x00010040, 0x27e43ca5, 0x020007e4, 0x00080008 }, + { 0x00008024, 0x34001c00, 0x00001400, 0x0001000a }, + { 0x00010001, 0x22000060, 0x02000000, 0x02186704 }, + { 0x00110001, 0x22000060, 0x02000000, 0x02186604 }, + { 0x0000000c, 0x27e43ca5, 0x000007e4, 0x00010001 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x02600031, 0x23400025, 0x408d07e0, 0x00000200 }, + { 0x00800001, 0x2380012d, 0x008900c0, 0x00000000 }, + { 0x00800001, 0x23a0012d, 0x00890100, 0x00000000 }, + { 0x00800001, 0x23c0012d, 0x008900c8, 0x00000000 }, + { 0x00800001, 0x23e0012d, 0x00890108, 0x00000000 }, + { 0x00600401, 0x20c001a9, 0x00ab0380, 0x00000000 }, + { 0x00600801, 0x20d001a9, 0x00ab0382, 0x00000000 }, + { 0x00600401, 0x20e001a9, 0x00ab0384, 0x00000000 }, + { 0x00600801, 0x20f001a9, 0x00ab0386, 0x00000000 }, + { 0x00600401, 0x210001a9, 0x00ab03c0, 0x00000000 }, + { 0x00600801, 0x211001a9, 0x00ab03c2, 0x00000000 }, + { 0x00600401, 0x212001a9, 0x00ab03c4, 0x00000000 }, + { 0x00600801, 0x213001a9, 0x00ab03c6, 0x00000000 }, + { 0x00800001, 0x204001a9, 0x002e0340, 0x00000000 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00400040 }, + { 0x01000010, 0x20003d2c, 0x020005ea, 0x00040004 }, + { 0x00800008, 0x2340352d, 0x00009050, 0x008d0220 }, + { 0x00800008, 0x2360352d, 0x00009052, 0x008d0220 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000006a }, + { 0x01000010, 0x20003d2c, 0x000005ea, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x02600005, 0x20003dac, 0x00650340, 0x00010001 }, + { 0x02600005, 0x20003dac, 0x02650360, 0x00010001 }, + { 0x00400401, 0x41c00229, 0x000090c0, 0x00000000 }, + { 0x00400801, 0x41c20229, 0x000090e0, 0x00000000 }, + { 0x00400401, 0x41e00229, 0x000090c1, 0x00000000 }, + { 0x00400801, 0x41e20229, 0x000090e1, 0x00000000 }, + { 0x00400401, 0x42000229, 0x006990a0, 0x00000000 }, + { 0x00400801, 0x42020229, 0x006990e8, 0x00000000 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000001e }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000012 }, + { 0x02600005, 0x20003dac, 0x00ae0340, 0x00010001 }, + { 0x02600005, 0x20003dac, 0x02ae0360, 0x00010001 }, + { 0x00400401, 0x21c00229, 0x000090c0, 0x00000000 }, + { 0x00400801, 0x21c80229, 0x000090e0, 0x00000000 }, + { 0x00400401, 0x21e00229, 0x000090c1, 0x00000000 }, + { 0x00400801, 0x21e80229, 0x000090e1, 0x00000000 }, + { 0x00400401, 0x22000229, 0x006990a0, 0x00000000 }, + { 0x00400801, 0x22080229, 0x006990e8, 0x00000000 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000a }, + { 0x02600005, 0x20003dac, 0x00ae0340, 0x00010001 }, + { 0x02600005, 0x20003dac, 0x02ae0360, 0x00010001 }, + { 0x00600001, 0x21c00229, 0x000090c0, 0x00000000 }, + { 0x00600001, 0x21e00229, 0x000090c1, 0x00000000 }, + { 0x00600001, 0x22000229, 0x002490a0, 0x00000000 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00400040 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c000c0 }, + { 0x00200001, 0x25d80109, 0x00450600, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001c8 }, + { 0x01400010, 0x20003d2c, 0x000005ea, 0x00040004 }, + { 0x01400010, 0x20003d2c, 0x020005ea, 0x00020002 }, + { 0x00600001, 0x21c00229, 0x000090c8, 0x00000000 }, + { 0x00600001, 0x21e00229, 0x000090c9, 0x00000000 }, + { 0x00600001, 0x22000229, 0x002490b0, 0x00000000 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00410041 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c100c1 }, + { 0x00410401, 0x41c00229, 0x000090c8, 0x00000000 }, + { 0x00410801, 0x41c20229, 0x000090f0, 0x00000000 }, + { 0x00410401, 0x41e00229, 0x000090c9, 0x00000000 }, + { 0x00410801, 0x41e20229, 0x000090f1, 0x00000000 }, + { 0x00410401, 0x42000229, 0x006990b0, 0x00000000 }, + { 0x00410801, 0x42020229, 0x006990f8, 0x00000000 }, + { 0x00410401, 0x21c00229, 0x020090c8, 0x00000000 }, + { 0x00410801, 0x21c80229, 0x020090f0, 0x00000000 }, + { 0x00410401, 0x21e00229, 0x020090c9, 0x00000000 }, + { 0x00410801, 0x21e80229, 0x020090f1, 0x00000000 }, + { 0x00410401, 0x22000229, 0x026990b0, 0x00000000 }, + { 0x00410801, 0x22080229, 0x026990f8, 0x00000000 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000019c }, + { 0x00800008, 0x2340352d, 0x00009042, 0x008d0220 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00e000e0 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01000100 }, + { 0x00600001, 0x21c00229, 0x000090c4, 0x00000000 }, + { 0x00600001, 0x21e00229, 0x000090c5, 0x00000000 }, + { 0x00600001, 0x22000229, 0x002490a4, 0x00000000 }, + { 0x02600005, 0x20003dac, 0x00ae0340, 0x00010001 }, + { 0x00000001, 0x260201e8, 0x00000000, 0x00000000 }, + { 0x00000401, 0x25da01e9, 0x00000000, 0x00000000 }, + { 0x00000801, 0x25d80109, 0x00000600, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000184 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00e100e1 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01010101 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00600001, 0x21c00229, 0x000090cc, 0x00000000 }, + { 0x00600001, 0x21e00229, 0x000090cd, 0x00000000 }, + { 0x00600001, 0x22000229, 0x002490b4, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000174 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00020002 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00000401, 0x27e001a1, 0x000005c4, 0x00000000 }, + { 0x00000c0c, 0x27e43da1, 0x000005c6, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x00070003 }, + { 0x00600401, 0x2340012d, 0x00890040, 0x00000000 }, + { 0x00600801, 0x2350012d, 0x00890048, 0x00000000 }, + { 0x00600001, 0x204001aa, 0x00270340, 0x00000000 }, + { 0x00600001, 0x205001aa, 0x00270350, 0x00000000 }, + { 0x00018022, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x22000060, 0x00000000, 0x04082004 }, + { 0x00010040, 0x27e43ca5, 0x020007e4, 0x00080008 }, + { 0x00008024, 0x34001c00, 0x00001400, 0x0001000a }, + { 0x00010001, 0x22000060, 0x02000000, 0x04082704 }, + { 0x00110001, 0x22000060, 0x02000000, 0x04082604 }, + { 0x0000000c, 0x27e43ca5, 0x000007e4, 0x00010001 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x01600031, 0x20000020, 0x508d07e0, 0x00000200 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00020002 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00000401, 0x27e001a1, 0x000005c8, 0x00000000 }, + { 0x00000c0c, 0x27e43da5, 0x000005ca, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0001000f }, + { 0x00018022, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x22000060, 0x00000000, 0x02186004 }, + { 0x00010040, 0x27e43ca5, 0x020007e4, 0x00080008 }, + { 0x01000005, 0x20003dac, 0x020005e0, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000006 }, + { 0x00000440, 0x27e43ca5, 0x000007e4, 0xfffefffe }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0003000f }, + { 0x00000040, 0x22000c00, 0x00000200, 0x00100000 }, + { 0x00008024, 0x34001c00, 0x00001400, 0x0001000c }, + { 0x0000000c, 0x27e43da5, 0x000005c2, 0x00020002 }, + { 0x00010001, 0x22000060, 0x02000000, 0x02186704 }, + { 0x00110001, 0x22000060, 0x02000000, 0x02186604 }, + { 0x00000040, 0x27e43ca5, 0x000007e4, 0xfffefffe }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x02600031, 0x20400021, 0x408d07e0, 0x00000200 }, + { 0x00800001, 0x2380012d, 0x008900c0, 0x00000000 }, + { 0x00800001, 0x23a0012d, 0x00890100, 0x00000000 }, + { 0x00800001, 0x23c0012d, 0x008900c8, 0x00000000 }, + { 0x00800001, 0x23e0012d, 0x00890108, 0x00000000 }, + { 0x00600401, 0x20c001a9, 0x00ab0380, 0x00000000 }, + { 0x00600801, 0x20d001a9, 0x00ab0382, 0x00000000 }, + { 0x00600401, 0x20e001a9, 0x00ab0384, 0x00000000 }, + { 0x00600801, 0x20f001a9, 0x00ab0386, 0x00000000 }, + { 0x00600401, 0x210001a9, 0x00ab03c0, 0x00000000 }, + { 0x00600801, 0x211001a9, 0x00ab03c2, 0x00000000 }, + { 0x00600401, 0x212001a9, 0x00ab03c4, 0x00000000 }, + { 0x00600801, 0x213001a9, 0x00ab03c6, 0x00000000 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00800080 }, + { 0x00000001, 0x260201ac, 0x000005e0, 0x00000000 }, + { 0x00800008, 0x2340352d, 0x00009054, 0x008d0220 }, + { 0x00800008, 0x2360352d, 0x00009056, 0x008d0220 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000026 }, + { 0x02600005, 0x20003dac, 0x00ae0340, 0x00010001 }, + { 0x02600005, 0x20003dac, 0x02ae0360, 0x00010001 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00400040 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c000c0 }, + { 0x00600001, 0x21c00229, 0x000090c2, 0x00000000 }, + { 0x00600001, 0x21e00229, 0x000090c3, 0x00000000 }, + { 0x00600001, 0x22000229, 0x002490a8, 0x00000000 }, + { 0x00200001, 0x25d80109, 0x00450600, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000000f0 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00410041 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c100c1 }, + { 0x00600001, 0x21c00229, 0x000090ca, 0x00000000 }, + { 0x00600001, 0x21e00229, 0x000090cb, 0x00000000 }, + { 0x00600001, 0x22000229, 0x002490b8, 0x00000000 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000000e0 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000005c }, + { 0x02600005, 0x20003dac, 0x00ae0340, 0x00010001 }, + { 0x02600005, 0x20003dac, 0x02ae0360, 0x00010001 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x05000500 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x05200520 }, + { 0x00800001, 0x25000129, 0x00ad0040, 0x00000000 }, + { 0x00800001, 0x25200129, 0x00ad00c0, 0x00000000 }, + { 0x00600001, 0x21c00229, 0x000090c2, 0x00000000 }, + { 0x00600001, 0x21e00229, 0x000090c3, 0x00000000 }, + { 0x00600001, 0x22000229, 0x002490a8, 0x00000000 }, + { 0x00200001, 0x25d80109, 0x00450600, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000000c6 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x05010501 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x05210521 }, + { 0x00600001, 0x21c00229, 0x000090ca, 0x00000000 }, + { 0x00600001, 0x21e00229, 0x000090cb, 0x00000000 }, + { 0x00600001, 0x22000229, 0x002490b8, 0x00000000 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000000b6 }, + { 0x00800008, 0x2340352d, 0x0000905c, 0x008d0220 }, + { 0x00800008, 0x2360352d, 0x0000905e, 0x008d0220 }, + { 0x00600001, 0x20600129, 0x008d0510, 0x00000000 }, + { 0x00600001, 0x20c00129, 0x008d0520, 0x00000000 }, + { 0x02600005, 0x20003dac, 0x00ae0340, 0x00010001 }, + { 0x02600005, 0x20003dac, 0x02ae0360, 0x00010001 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x05000500 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x05200520 }, + { 0x00800001, 0x25000129, 0x00ad0050, 0x00000000 }, + { 0x00800001, 0x25200129, 0x00ad00d0, 0x00000000 }, + { 0x00600001, 0x21c00229, 0x000090e2, 0x00000000 }, + { 0x00600001, 0x21e00229, 0x000090e3, 0x00000000 }, + { 0x00600001, 0x22000229, 0x002490ec, 0x00000000 }, + { 0x00200001, 0x25d80109, 0x00450600, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000096 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x05010501 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x05210521 }, + { 0x00600001, 0x21c00229, 0x000090f2, 0x00000000 }, + { 0x00600001, 0x21e00229, 0x000090f3, 0x00000000 }, + { 0x00600001, 0x22000229, 0x002490fc, 0x00000000 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000086 }, + { 0x00600001, 0x20700129, 0x008d0510, 0x00000000 }, + { 0x00600001, 0x20d00129, 0x008d0520, 0x00000000 }, + { 0x00800008, 0x2340352d, 0x00009048, 0x008d0220 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00e000e0 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01000100 }, + { 0x00600001, 0x21c00229, 0x000090c4, 0x00000000 }, + { 0x00600001, 0x21e00229, 0x000090c5, 0x00000000 }, + { 0x00600001, 0x22000229, 0x002490ac, 0x00000000 }, + { 0x02600005, 0x20003dac, 0x00ae0340, 0x00010001 }, + { 0x00000001, 0x260201e8, 0x00000000, 0x00000000 }, + { 0x00000401, 0x25da01e9, 0x00000000, 0x00000000 }, + { 0x00000801, 0x25d80109, 0x00000600, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000006a }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00e100e1 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01010101 }, + { 0x00600001, 0x21c00229, 0x000090cc, 0x00000000 }, + { 0x00600001, 0x21e00229, 0x000090cd, 0x00000000 }, + { 0x00600001, 0x22000229, 0x002490bc, 0x00000000 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000005a }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00020002 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00000401, 0x27e001a1, 0x000005c0, 0x00000000 }, + { 0x00000c0c, 0x27e43da1, 0x000005c2, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0007000f }, + { 0x00802001, 0x20400022, 0x008d00c0, 0x00000000 }, + { 0x00802001, 0x20800022, 0x008d0100, 0x00000000 }, + { 0x00018022, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x22000060, 0x00000000, 0x0a082004 }, + { 0x00010040, 0x27e43ca5, 0x020007e4, 0x00080008 }, + { 0x00008024, 0x34001c00, 0x00001400, 0x0001000a }, + { 0x00010001, 0x22000060, 0x02000000, 0x0a082704 }, + { 0x00110001, 0x22000060, 0x02000000, 0x0a082604 }, + { 0x0000000c, 0x27e43ca5, 0x000007e4, 0x00010001 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x01600031, 0x20000020, 0x508d07e0, 0x00000200 }, + { 0x01600005, 0x20003dac, 0x020005e0, 0x00010001 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00020002 }, + { 0x00000401, 0x27e001a1, 0x000005c8, 0x00000000 }, + { 0x00000c0c, 0x27e43da1, 0x000005ca, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0001000f }, + { 0x00610001, 0x20400022, 0x028d0040, 0x00000000 }, + { 0x00710001, 0x20400022, 0x028d0060, 0x00000000 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00018022, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x22000060, 0x00000000, 0x0418a004 }, + { 0x00010040, 0x27e43ca5, 0x020007e4, 0x00080008 }, + { 0x00008024, 0x34001c00, 0x00001400, 0x0001000c }, + { 0x0000000c, 0x27e43da5, 0x000005c2, 0x00020002 }, + { 0x00010001, 0x22000060, 0x02000000, 0x0418a704 }, + { 0x00110001, 0x22000060, 0x02000000, 0x0418a604 }, + { 0x00000040, 0x27e43ca5, 0x000007e4, 0xfffefffe }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x01600031, 0x26400021, 0x508d07e0, 0x00000200 }, + { 0x01000005, 0x20003dac, 0x0000002a, 0x00020002 }, + { 0x00000006, 0x202a3dad, 0x0000002a, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x00001400, 0xfffffd94 }, + { 0x00600001, 0x26400021, 0x008d0640, 0x00000000 }, + { 0x00600001, 0x260001e1, 0x00000000, 0x00000000 }, + { 0x00000009, 0x26143da1, 0x000005e2, 0x00120012 }, + { 0x00000440, 0x26141c21, 0x00000614, 0x00020000 }, + { 0x00000c01, 0x26120129, 0x0000000c, 0x00000000 }, + { 0x00000c01, 0x26100169, 0x00000000, 0x12121212 }, + { 0x00400801, 0x26000171, 0x00000000, 0xffffffff }, + { 0x00600031, 0x20001c20, 0x308d0600, 0x82008002 }, + { 0x00600040, 0x2400462d, 0x00ae9c00, 0x00aed810 }, + { 0x00600040, 0x2340462d, 0x00ae9800, 0x00aed810 }, + { 0x00600040, 0x2360462d, 0x00ae9c10, 0x00aedc00 }, + { 0x05810010, 0x200025ac, 0x008d2400, 0x008d01c0 }, + { 0x05810010, 0x200025ac, 0x008d2340, 0x008d01e0 }, + { 0x05810010, 0x200025ac, 0x008d2360, 0x008d01e0 }, + { 0x00618022, 0x34001c00, 0x00001400, 0x00000036 }, + { 0x00618022, 0x34001c00, 0x02001400, 0x00000016 }, + { 0x00600040, 0x24003e2c, 0x00ae9c10, 0x00020002 }, + { 0x00600048, 0x24003e2c, 0x00ae9800, 0x00020002 }, + { 0x00600040, 0x2400458c, 0x008d0400, 0x00ae9810 }, + { 0x80600008, 0x43403d91, 0x008d0400, 0x00020002 }, + { 0x00600040, 0x24003e2c, 0x00ae9800, 0x00020002 }, + { 0x00600048, 0x24003e2c, 0x00ae9c10, 0x00020002 }, + { 0x00600040, 0x2400458c, 0x008d0400, 0x00ae9c00 }, + { 0x80600008, 0x43603d91, 0x008d0400, 0x00020002 }, + { 0x00600001, 0xd8100231, 0x00ae0340, 0x00000000 }, + { 0x00600001, 0xdc000231, 0x00ae0360, 0x00000000 }, + { 0x00608024, 0x34001c00, 0x00001400, 0x0001001e }, + { 0x00600040, 0x23e03d2d, 0x008d0200, 0x00010001 }, + { 0x00600040, 0x24003e2c, 0x00ae9800, 0x00040004 }, + { 0x00600048, 0x24003dac, 0x008d0400, 0x00040004 }, + { 0x00600040, 0x2400458c, 0x008d0400, 0x00aedc10 }, + { 0x00600008, 0x23403d8d, 0x008d0400, 0x00030003 }, + { 0x03600010, 0x200035ac, 0x008d0340, 0x008d03e0 }, + { 0x05600010, 0x200035ac, 0x028d0340, 0x008d43e0 }, + { 0x00610001, 0x234001ad, 0x008d03e0, 0x00000000 }, + { 0x00610001, 0x234001ad, 0x028d43e0, 0x00000000 }, + { 0x80600040, 0x43603631, 0x00ae9810, 0x008d0340 }, + { 0x80600040, 0x43403631, 0x00ae9c00, 0x008d4340 }, + { 0x00600001, 0xd8100231, 0x00ae0360, 0x00000000 }, + { 0x00600001, 0xdc000231, 0x00ae0340, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x34000020, 0x000007c0, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, diff --git a/src/shaders/h264/mc/avc_mc.g4b.gen5 b/src/shaders/h264/mc/avc_mc.g4b.gen5 new file mode 100644 index 00000000..cdee6ac3 --- /dev/null +++ b/src/shaders/h264/mc/avc_mc.g4b.gen5 @@ -0,0 +1,5251 @@ + { 0x00600001, 0x27c00021, 0x008d0000, 0x00000000 }, + { 0x00200009, 0x27fa3e29, 0x00450064, 0x00040004 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000000d4 }, + { 0x00000005, 0x220e3e2c, 0x00000070, 0x000f000f }, + { 0x00000001, 0x26a00221, 0x00009c38, 0x00000000 }, + { 0x00000220, 0x34001400, 0x00001400, 0x000006a0 }, + { 0x00a02001, 0x24000229, 0x00b10624, 0x00000000 }, + { 0x00a02001, 0x24400229, 0x00b10624, 0x00000000 }, + { 0x00a02001, 0x24800229, 0x00b10624, 0x00000000 }, + { 0x00a02001, 0x24c00229, 0x00b10624, 0x00000000 }, + { 0x00a02001, 0x25000229, 0x00b10624, 0x00000000 }, + { 0x00a02001, 0x25400229, 0x00b10624, 0x00000000 }, + { 0x00a02001, 0x25800229, 0x00b10624, 0x00000000 }, + { 0x00a02001, 0x25c00229, 0x00b10624, 0x00000000 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000086 }, + { 0x00000001, 0x22080060, 0x00000000, 0x06440640 }, + { 0x00a02001, 0x24000229, 0x00009003, 0x00000000 }, + { 0x00a02001, 0x24400229, 0x0000900b, 0x00000000 }, + { 0x00a02001, 0x24800229, 0x00009013, 0x00000000 }, + { 0x00a02001, 0x24c00229, 0x0000901b, 0x00000000 }, + { 0x00a02001, 0x25000229, 0x00009023, 0x00000000 }, + { 0x00a02001, 0x25400229, 0x0000902b, 0x00000000 }, + { 0x00a02001, 0x25800229, 0x00009033, 0x00000000 }, + { 0x00a02001, 0x25c00229, 0x0000903b, 0x00000000 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000072 }, + { 0x02600005, 0x20000c20, 0x0000006c, 0x00000002 }, + { 0x00600005, 0x24000c20, 0x0000006c, 0x00000011 }, + { 0x01600007, 0x20000c00, 0x028d0400, 0x00000011 }, + { 0x00780001, 0x26240169, 0x00000000, 0x80808080 }, + { 0x00780001, 0x66430231, 0x028d0624, 0x00000000 }, + { 0x00780001, 0x66630231, 0x028d062c, 0x00000000 }, + { 0x00780001, 0x26240231, 0x00cf0643, 0x00000000 }, + { 0x00780001, 0x262c0231, 0x00cf0663, 0x00000000 }, + { 0x00800040, 0x25e04629, 0x00cf0643, 0x00b10624 }, + { 0x00600040, 0x25e02529, 0x008d05e0, 0x008d05f0 }, + { 0x00400040, 0x25e02529, 0x006905e0, 0x006905e8 }, + { 0x00200040, 0x25e02529, 0x004505e0, 0x004505e4 }, + { 0x00a02040, 0x2400252c, 0x000005e0, 0x000005e2 }, + { 0x00a02040, 0x24003d8c, 0x00b10400, 0x00100010 }, + { 0x00a02008, 0x24003d89, 0x00b10400, 0x00050005 }, + { 0x00a02008, 0x24403d89, 0x00b10400, 0x00050005 }, + { 0x00a02008, 0x24803d89, 0x00b10400, 0x00050005 }, + { 0x00a02008, 0x24c03d89, 0x00b10400, 0x00050005 }, + { 0x00a02008, 0x25003d89, 0x00b10400, 0x00050005 }, + { 0x00a02008, 0x25403d89, 0x00b10400, 0x00050005 }, + { 0x00a02008, 0x25803d89, 0x00b10400, 0x00050005 }, + { 0x00a02008, 0x25c03d89, 0x00b10400, 0x00050005 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000044 }, + { 0x00600041, 0x26806e2d, 0x008d062c, 0x89abcdef }, + { 0x00600041, 0x26906e2d, 0x008d0623, 0xfedcba98 }, + { 0x00600041, 0x26a06e2d, 0x00cf0663, 0x89abcdef }, + { 0x00600041, 0x26b06e2d, 0x00cf0643, 0x0fedcba9 }, + { 0x00000041, 0x26be3e2d, 0x00000623, 0xfff8fff8 }, + { 0x00802040, 0x268035ad, 0x008d4680, 0x008d0690 }, + { 0x00802040, 0x268035ad, 0x008d0680, 0x008d0688 }, + { 0x00802040, 0x268035ad, 0x008d0680, 0x008d0684 }, + { 0x00802040, 0x268035ad, 0x008d0680, 0x008d0682 }, + { 0x00800001, 0x240001ec, 0x00000000, 0x00200020 }, + { 0x00200048, 0x24003dac, 0x00a00680, 0x00050005 }, + { 0x00200008, 0x26e03d8d, 0x00450400, 0x00060006 }, + { 0x00800001, 0x240001ec, 0x00000000, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x00000633, 0x00100010 }, + { 0x00800048, 0x26c03e2d, 0x0000067f, 0x00100010 }, + { 0x00800048, 0x272055ad, 0x000006e0, 0x00b10040 }, + { 0x00600041, 0x268055ad, 0x000006e2, 0x00ae0040 }, + { 0x00600041, 0x26a055ad, 0x000006e2, 0x00ae0041 }, + { 0x00a02040, 0x240035ac, 0x00b10720, 0x00b00680 }, + { 0x80a02008, 0x44003d91, 0x00b10400, 0x00050005 }, + { 0x00a02040, 0x240035ac, 0x00b10720, 0x00b00682 }, + { 0x80a02008, 0x44403d91, 0x00b10400, 0x00050005 }, + { 0x00a02040, 0x240035ac, 0x00b10720, 0x00b00684 }, + { 0x80a02008, 0x44803d91, 0x00b10400, 0x00050005 }, + { 0x00a02040, 0x240035ac, 0x00b10720, 0x00b00686 }, + { 0x80a02008, 0x44c03d91, 0x00b10400, 0x00050005 }, + { 0x00a02040, 0x240035ac, 0x00b10720, 0x00b00688 }, + { 0x80a02008, 0x45003d91, 0x00b10400, 0x00050005 }, + { 0x00a02040, 0x240035ac, 0x00b10720, 0x00b0068a }, + { 0x80a02008, 0x45403d91, 0x00b10400, 0x00050005 }, + { 0x00a02040, 0x240035ac, 0x00b10720, 0x00b0068c }, + { 0x80a02008, 0x45803d91, 0x00b10400, 0x00050005 }, + { 0x00a02040, 0x240035ac, 0x00b10720, 0x00b0068e }, + { 0x80a02008, 0x45c03d91, 0x00b10400, 0x00050005 }, + { 0x00000001, 0x22040060, 0x00000000, 0x00900080 }, + { 0x01000005, 0x20000c20, 0x02000068, 0x00003c00 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000020 }, + { 0x80802040, 0x440045b1, 0x008d8800, 0x00ae0400 }, + { 0x80802040, 0x444045b1, 0x008d8820, 0x00ae0440 }, + { 0x80802040, 0x448045b1, 0x008d8840, 0x00ae0480 }, + { 0x80802040, 0x44c045b1, 0x008d8860, 0x00ae04c0 }, + { 0x80802040, 0x441045b1, 0x008d8880, 0x00ae0410 }, + { 0x80802040, 0x445045b1, 0x008d88a0, 0x00ae0450 }, + { 0x80802040, 0x449045b1, 0x008d88c0, 0x00ae0490 }, + { 0x80802040, 0x44d045b1, 0x008d88e0, 0x00ae04d0 }, + { 0x80802040, 0x450045b1, 0x008d8900, 0x00ae0500 }, + { 0x80802040, 0x454045b1, 0x008d8920, 0x00ae0540 }, + { 0x80802040, 0x458045b1, 0x008d8940, 0x00ae0580 }, + { 0x80802040, 0x45c045b1, 0x008d8960, 0x00ae05c0 }, + { 0x80802040, 0x451045b1, 0x008d8980, 0x00ae0510 }, + { 0x80802040, 0x455045b1, 0x008d89a0, 0x00ae0550 }, + { 0x80802040, 0x459045b1, 0x008d89c0, 0x00ae0590 }, + { 0x80802040, 0x45d045b1, 0x008d89e0, 0x00ae05d0 }, + { 0x00000040, 0x22040c00, 0x00000204, 0x01800180 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000000e2 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000018 }, + { 0x00000001, 0x27800021, 0x00000780, 0x00000000 }, + { 0x00000001, 0x27a00021, 0x000007a0, 0x00000000 }, + { 0x01600031, 0x20001c20, 0x708d0000, 0x82000010 }, + { 0x00200440, 0x27c055a5, 0x004507fa, 0x0045002a }, + { 0x00000801, 0x27c80061, 0x00000000, 0x0000001b }, + { 0x00000040, 0x22000d20, 0x00000062, 0x02186000 }, + { 0x01600031, 0x26200021, 0x408d07c0, 0x00000200 }, + { 0x00000440, 0x27c43ca5, 0x000007c4, 0x00010001 }, + { 0x00000801, 0x27c80061, 0x00000000, 0x000f0003 }, + { 0x00000040, 0x22000c00, 0x00000200, 0x00100000 }, + { 0x02600031, 0x26400021, 0x408d07c0, 0x00000200 }, + { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, + { 0x00000008, 0x27fc3dad, 0x000007fc, 0x00010001 }, + { 0x00200440, 0x27c055a5, 0x004507fa, 0x0045002a }, + { 0x00000801, 0x27c80061, 0x00000000, 0x00000013 }, + { 0x00000040, 0x22000c00, 0x00000200, 0xefffc001 }, + { 0x01600031, 0x26200021, 0x408d07c0, 0x00000200 }, + { 0x00000440, 0x27c43ca5, 0x000007c4, 0x00010001 }, + { 0x00000801, 0x27c80061, 0x00000000, 0x00070003 }, + { 0x05600031, 0x26400021, 0x408d07c0, 0x00000200 }, + { 0x00000008, 0x220e3e2c, 0x0000006c, 0x00060006 }, + { 0x00000001, 0x26a002a5, 0x00009c3c, 0x00000000 }, + { 0x00000220, 0x34001400, 0x00001400, 0x000006a0 }, + { 0x02600005, 0x20000c20, 0x0000006c, 0x00000002 }, + { 0x00780001, 0x26240169, 0x00000000, 0x80808080 }, + { 0x02400005, 0x20000c20, 0x0200006c, 0x00000001 }, + { 0x00560001, 0x46420129, 0x02690624, 0x00000000 }, + { 0x02400005, 0x20000c20, 0x0200006c, 0x00000010 }, + { 0x00560001, 0x46520129, 0x0269062c, 0x00000000 }, + { 0x00780001, 0x26240129, 0x00ae0642, 0x00000000 }, + { 0x00800040, 0x24004629, 0x00b10624, 0x00650642 }, + { 0x00600040, 0x24002529, 0x00650400, 0x00650404 }, + { 0x00600040, 0x25202529, 0x00050400, 0x00050404 }, + { 0x00600040, 0x25702529, 0x00050408, 0x0005040c }, + { 0x00560001, 0x26240169, 0x00000000, 0x80808080 }, + { 0x00460001, 0x26240129, 0x028a0652, 0x00000000 }, + { 0x00560001, 0x46520129, 0x02690624, 0x00000000 }, + { 0x02400005, 0x20000c20, 0x0200006c, 0x00000001 }, + { 0x00560001, 0x46420169, 0x02000000, 0x80808080 }, + { 0x00460001, 0x46420129, 0x0069062c, 0x00000000 }, + { 0x00560001, 0x262c0129, 0x008a0642, 0x00000000 }, + { 0x00600040, 0x24004629, 0x008d0624, 0x00650652 }, + { 0x00600040, 0x24104629, 0x00650642, 0x008d062c }, + { 0x00600040, 0x24002529, 0x00650400, 0x00650404 }, + { 0x00600040, 0x25302529, 0x00050408, 0x0005040c }, + { 0x00600040, 0x25602529, 0x00050400, 0x00050404 }, + { 0x00a02040, 0x24003d2c, 0x00b10520, 0x00040004 }, + { 0x00a02008, 0x24003d89, 0x00b10400, 0x00030003 }, + { 0x00a02008, 0x24403d89, 0x00b10400, 0x00030003 }, + { 0x00a02040, 0x24003d2c, 0x00b10560, 0x00040004 }, + { 0x00a02008, 0x24803d89, 0x00b10400, 0x00030003 }, + { 0x00a02008, 0x24c03d89, 0x00b10400, 0x00030003 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000048 }, + { 0x00000001, 0x22080060, 0x00000000, 0x06440640 }, + { 0x00a02001, 0x24000229, 0x00059002, 0x00000000 }, + { 0x00a02001, 0x24400229, 0x0005900a, 0x00000000 }, + { 0x00a02001, 0x24800229, 0x00059012, 0x00000000 }, + { 0x00a02001, 0x24c00229, 0x0005901a, 0x00000000 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000003c }, + { 0x00a02001, 0x24000229, 0x00b10624, 0x00000000 }, + { 0x00a02001, 0x24400229, 0x00b10624, 0x00000000 }, + { 0x00a02001, 0x24800229, 0x00b10624, 0x00000000 }, + { 0x00a02001, 0x24c00229, 0x00b10624, 0x00000000 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000032 }, + { 0x00600041, 0x26806e2d, 0x008d062c, 0x44332211 }, + { 0x00600041, 0x26906e2d, 0x008d0622, 0xffeeddcc }, + { 0x00600041, 0x26a06e2d, 0x00650652, 0x44332211 }, + { 0x00600041, 0x26b06e2d, 0x00650642, 0x00ffeedd }, + { 0x00200041, 0x26bc3e2d, 0x00450622, 0xfffcfffc }, + { 0x00802040, 0x268035ad, 0x008d0680, 0x008d0690 }, + { 0x00802040, 0x268035ad, 0x008d0680, 0x008d0688 }, + { 0x00802040, 0x268035ad, 0x008d0680, 0x008d0684 }, + { 0x00800001, 0x240001ec, 0x00000000, 0x00200020 }, + { 0x00400048, 0x24003dac, 0x00a50680, 0x00220022 }, + { 0x00400008, 0x26e03d8d, 0x00690400, 0x00060006 }, + { 0x00800001, 0x240001ec, 0x00000000, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x00050632, 0x00100010 }, + { 0x00800048, 0x26c03e2d, 0x0005065e, 0x00100010 }, + { 0x00800048, 0x272055ad, 0x000506e0, 0x00240044 }, + { 0x00600041, 0x268055ad, 0x000506e4, 0x00440044 }, + { 0x00600041, 0x26a055ad, 0x000506e4, 0x00440045 }, + { 0x00a02040, 0x240035ac, 0x00b10720, 0x00050680 }, + { 0x80a02008, 0x44003d91, 0x00b10400, 0x00050005 }, + { 0x00a02040, 0x240035ac, 0x00b10720, 0x00050684 }, + { 0x80a02008, 0x44403d91, 0x00b10400, 0x00050005 }, + { 0x00a02040, 0x240035ac, 0x00b10720, 0x00050688 }, + { 0x80a02008, 0x44803d91, 0x00b10400, 0x00050005 }, + { 0x00a02040, 0x240035ac, 0x00b10720, 0x0005068c }, + { 0x80a02008, 0x44c03d91, 0x00b10400, 0x00050005 }, + { 0x00000040, 0x22063d8c, 0x00000204, 0x00100010 }, + { 0x80802040, 0x640045b1, 0x008d8880, 0x00cf0400 }, + { 0x80802040, 0x644045b1, 0x008d88a0, 0x00cf0440 }, + { 0x80802040, 0x648045b1, 0x008d88c0, 0x00cf0480 }, + { 0x80802040, 0x64c045b1, 0x008d88e0, 0x00cf04c0 }, + { 0x80802040, 0x640245b1, 0x008d8900, 0x00cf0402 }, + { 0x80802040, 0x644245b1, 0x008d8920, 0x00cf0442 }, + { 0x80802040, 0x648245b1, 0x008d8940, 0x00cf0482 }, + { 0x80802040, 0x64c245b1, 0x008d8960, 0x00cf04c2 }, + { 0x00000401, 0x27c80061, 0x00000000, 0x0007000f }, + { 0x00200801, 0x27c001a1, 0x004507fa, 0x00000000 }, + { 0x00000040, 0x22000c00, 0x00000200, 0x08004000 }, + { 0x00800001, 0x20400232, 0x00d20400, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20420, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00d20440, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00d20460, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00d20480, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00d204a0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00d204c0, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00d204e0, 0x00000000 }, + { 0x01600031, 0x27a00021, 0x508d07c0, 0x00000200 }, + { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, + { 0x00000401, 0x27c80061, 0x00000000, 0x000f000f }, + { 0x00200801, 0x27c001a1, 0x004507fa, 0x00000000 }, + { 0x00000040, 0x22000c00, 0x00000200, 0x0ff04000 }, + { 0x00000001, 0x22080060, 0x00000000, 0x04400400 }, + { 0x00a02001, 0x20400232, 0x00d29000, 0x00000000 }, + { 0x00a02001, 0x20500232, 0x00d29020, 0x00000000 }, + { 0x00a02001, 0x20800232, 0x00d29080, 0x00000000 }, + { 0x00a02001, 0x20900232, 0x00d290a0, 0x00000000 }, + { 0x00a02001, 0x20c00232, 0x00d29100, 0x00000000 }, + { 0x00a02001, 0x20d00232, 0x00d29120, 0x00000000 }, + { 0x00a02001, 0x21000232, 0x00d29180, 0x00000000 }, + { 0x00a02001, 0x21100232, 0x00d291a0, 0x00000000 }, + { 0x01600031, 0x27800021, 0x508d07c0, 0x00000200 }, + { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, + { 0x00600001, 0x27c00021, 0x008d0000, 0x00000000 }, + { 0x00200009, 0x27fa3e29, 0x00450064, 0x00040004 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffff04 }, + { 0x00000001, 0x220401ec, 0x00000000, 0x00800080 }, + { 0x00000001, 0x22080060, 0x00000000, 0x04100400 }, + { 0x00200008, 0x27006e2d, 0x0000006c, 0x00000040 }, + { 0x00400001, 0x27400061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x272001a9, 0x00b10620, 0x00000000 }, + { 0x02600005, 0x20001c20, 0x0000006c, 0x00000008 }, + { 0x00110001, 0x27230231, 0x00000624, 0x00000000 }, + { 0x00600001, 0x27420231, 0x00cf0643, 0x00000000 }, + { 0x00110001, 0x27410231, 0x00000643, 0x00000000 }, + { 0x00240001, 0x27400231, 0x00000623, 0x00000000 }, + { 0x02000005, 0x20001c20, 0x0200006c, 0x00000002 }, + { 0x00010001, 0x27400231, 0x02000624, 0x00000000 }, + { 0x02000005, 0x20001c20, 0x0200006c, 0x00000001 }, + { 0x00110001, 0x27420231, 0x02000623, 0x00000000 }, + { 0x00000005, 0x26803e2d, 0x00000070, 0x000f000f }, + { 0x00000001, 0x270801ad, 0x00000700, 0x00000000 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000084 }, + { 0x00000040, 0x22043d8c, 0x00000204, 0x00800080 }, + { 0x00800001, 0x27200231, 0x00b10628, 0x00000000 }, + { 0x02600005, 0x20001c20, 0x0200006c, 0x00000004 }, + { 0x00680001, 0x272c0231, 0x028d0634, 0x00000000 }, + { 0x00780001, 0x272c0231, 0x02000633, 0x00000000 }, + { 0x00400001, 0x27420231, 0x00a0040e, 0x00000000 }, + { 0x00400001, 0x27460231, 0x00a0044e, 0x00000000 }, + { 0x00200001, 0x27400231, 0x0000062b, 0x00000000 }, + { 0x02000005, 0x20001c20, 0x0200006c, 0x00000002 }, + { 0x00010001, 0x27400231, 0x0200062c, 0x00000000 }, + { 0x00110001, 0x27410231, 0x0200040e, 0x00000000 }, + { 0x00000008, 0x26803e2d, 0x00000070, 0x00040004 }, + { 0x00200040, 0x22083d8c, 0x00450208, 0x00800080 }, + { 0x00000006, 0x27083dad, 0x00000700, 0x00010001 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000064 }, + { 0x00000040, 0x22043d8c, 0x00000204, 0x00800080 }, + { 0x00a02001, 0xb3800231, 0x00d20400, 0x00000000 }, + { 0x00a02001, 0xb3a00231, 0x00d20480, 0x00000000 }, + { 0x00a02001, 0xb3c00231, 0x00d20440, 0x00000000 }, + { 0x00a02001, 0xb3e00231, 0x00d204c0, 0x00000000 }, + { 0x02000005, 0x20001c20, 0x00000060, 0x00000002 }, + { 0x01000005, 0x20001c20, 0x0200006c, 0x00000001 }, + { 0x01010005, 0x20001c20, 0x00000060, 0x00004000 }, + { 0x02010005, 0x20001c20, 0x02000060, 0x00000010 }, + { 0x00030001, 0x27230231, 0x0000065f, 0x00000000 }, + { 0x00030220, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x02600005, 0x20001c20, 0x0000006c, 0x00000001 }, + { 0x00460001, 0x27200231, 0x0069065c, 0x00000000 }, + { 0x00110001, 0x27230231, 0x00000458, 0x00000000 }, + { 0x00600001, 0x27240231, 0x008d0458, 0x00000000 }, + { 0x00600001, 0x272c0231, 0x008d0478, 0x00000000 }, + { 0x00600001, 0x27420231, 0x00cf0663, 0x00000000 }, + { 0x00000001, 0x27400231, 0x00000458, 0x00000000 }, + { 0x00010001, 0x27410231, 0x0000065f, 0x00000000 }, + { 0x00110001, 0x27410231, 0x00000663, 0x00000000 }, + { 0x02000005, 0x20001c20, 0x0200006c, 0x00000010 }, + { 0x00110001, 0x27420231, 0x0200065f, 0x00000000 }, + { 0x00000005, 0x26803e2d, 0x00000071, 0x000f000f }, + { 0x00000006, 0x27083dad, 0x00000702, 0x00020002 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000030 }, + { 0x00000040, 0x22043d8c, 0x00000204, 0x00800080 }, + { 0x00400001, 0x27200231, 0x0069045c, 0x00000000 }, + { 0x00600001, 0x27240231, 0x008d0478, 0x00000000 }, + { 0x00800001, 0x272c0231, 0x0000047f, 0x00000000 }, + { 0x00400001, 0x27420231, 0x00a0048e, 0x00000000 }, + { 0x00400001, 0x27460231, 0x00a004ce, 0x00000000 }, + { 0x00000001, 0x27400231, 0x00000478, 0x00000000 }, + { 0x00000001, 0x27410231, 0x0000045f, 0x00000000 }, + { 0x00000008, 0x26803e2d, 0x00000071, 0x00040004 }, + { 0x00200040, 0x22083d8c, 0x00450208, 0x00800080 }, + { 0x00000006, 0x27083dad, 0x00000700, 0x00030003 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00a02001, 0xb3800231, 0x00d20480, 0x00000000 }, + { 0x00a02001, 0xb3a00231, 0x00d20500, 0x00000000 }, + { 0x00a02001, 0xb3c00231, 0x00d204c0, 0x00000000 }, + { 0x00a02001, 0xb3e00231, 0x00d20540, 0x00000000 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000100 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffe74 }, + { 0x00000001, 0x27800021, 0x00000780, 0x00000000 }, + { 0x00000001, 0x27a00021, 0x000007a0, 0x00000000 }, + { 0x01600031, 0x20001c20, 0x708d0000, 0x82000010 }, + { 0x00000001, 0x27340231, 0x00000733, 0x00000000 }, + { 0x00600001, 0x274a0231, 0x00000749, 0x00000000 }, + { 0x00800040, 0x24003e2c, 0x00b10723, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b10724, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b10725, 0x00010001 }, + { 0x00800008, 0x26c03d8d, 0x008d0400, 0x00020002 }, + { 0x00800040, 0x24003e2c, 0x00b10740, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b10741, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b10742, 0x00010001 }, + { 0x00800008, 0x26a03d8d, 0x008d0400, 0x00020002 }, + { 0x00800001, 0x27240231, 0x00d206c0, 0x00000000 }, + { 0x00600001, 0x27400231, 0x00ae06a2, 0x00000000 }, + { 0x00000001, 0x27230231, 0x000006a0, 0x00000000 }, + { 0x00000005, 0x220e3dac, 0x00000680, 0x000f000f }, + { 0x00000001, 0x26a00221, 0x00009c2c, 0x00000000 }, + { 0x00000220, 0x34001400, 0x00001400, 0x000006a0 }, + { 0x80800040, 0xd00045b1, 0x00b18800, 0x000d0724 }, + { 0x80800040, 0xd02045b1, 0x00b18820, 0x000d0724 }, + { 0x80800040, 0xd04045b1, 0x00b18840, 0x000d0724 }, + { 0x80800040, 0xd06045b1, 0x00b18860, 0x000d0724 }, + { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, + { 0x80800040, 0xd00045b1, 0x00b18800, 0x002c0740 }, + { 0x80800040, 0xd02045b1, 0x00b18820, 0x002c0742 }, + { 0x80800040, 0xd04045b1, 0x00b18840, 0x002c0744 }, + { 0x80800040, 0xd06045b1, 0x00b18860, 0x002c0746 }, + { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, + { 0x02802005, 0x20003da0, 0x00000708, 0x00020002 }, + { 0x02600005, 0x20003da0, 0x02000708, 0x00010001 }, + { 0x009a0001, 0x27200169, 0x00000000, 0x80808080 }, + { 0x00780001, 0x27400231, 0x028d0724, 0x00000000 }, + { 0x00780001, 0x27240231, 0x008d0740, 0x00000000 }, + { 0x00600040, 0x25e04629, 0x008d0724, 0x008d0740 }, + { 0x00400040, 0x25e02529, 0x006905e0, 0x006905e8 }, + { 0x00200040, 0x25e02529, 0x004505e0, 0x004505e4 }, + { 0x00800040, 0x2400252c, 0x000005e0, 0x000005e2 }, + { 0x00800040, 0x24003d8c, 0x008d0400, 0x00080008 }, + { 0x00800008, 0x26803d8d, 0x008d0400, 0x00040004 }, + { 0x80800040, 0xd00035b1, 0x00b18800, 0x00b10680 }, + { 0x80800040, 0xd02035b1, 0x00b18820, 0x00b10680 }, + { 0x80800040, 0xd04035b1, 0x00b18840, 0x00b10680 }, + { 0x80800040, 0xd06035b1, 0x00b18860, 0x00b10680 }, + { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, + { 0x00600001, 0x27340231, 0x008d0733, 0x00000000 }, + { 0x00800040, 0x24003e2c, 0x00b10726, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b10725, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b10724, 0x00010001 }, + { 0x00800008, 0x26803d8d, 0x00b10400, 0x00020002 }, + { 0x80800040, 0xd00035b1, 0x00b18800, 0x002d0680 }, + { 0x80800040, 0xd02035b1, 0x00b18820, 0x002d0684 }, + { 0x80800040, 0xd04035b1, 0x00b18840, 0x002d0688 }, + { 0x80800040, 0xd06035b1, 0x00b18860, 0x002d068c }, + { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, + { 0x00400009, 0x26c05421, 0x00000744, 0x00690050 }, + { 0x00400009, 0x26d05421, 0x00000740, 0x00690050 }, + { 0x00600001, 0x26a00231, 0x00cf06c3, 0x00000000 }, + { 0x00800001, 0x26a80231, 0x00b10723, 0x00000000 }, + { 0x00800040, 0x24003e2c, 0x00b106a2, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b106a1, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b106a0, 0x00010001 }, + { 0x00800008, 0x26a03d8d, 0x00b10400, 0x00020002 }, + { 0x00200040, 0x220c3eac, 0x00450056, 0x06a006a0 }, + { 0x80800040, 0xd06035b1, 0x01ed9800, 0x00b18860 }, + { 0x80800040, 0xd04035b1, 0x01ed9804, 0x00b18840 }, + { 0x80800040, 0xd02035b1, 0x01ed9808, 0x00b18820 }, + { 0x80800040, 0xd00035b1, 0x01ed980c, 0x00b18800 }, + { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, + { 0x00400009, 0x26c05421, 0x00000744, 0x00690050 }, + { 0x00400009, 0x26d05421, 0x00000740, 0x00690050 }, + { 0x00600001, 0x26a00231, 0x00cf06c3, 0x00000000 }, + { 0x00800001, 0x26a80231, 0x00b10723, 0x00000000 }, + { 0x00800042, 0x25c04629, 0x00b106a8, 0x00b106a9 }, + { 0x00800040, 0x24003e2c, 0x00b106a3, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b106a2, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b106a1, 0x00010001 }, + { 0x00800008, 0x26c03d8d, 0x008d0400, 0x00020002 }, + { 0x00600001, 0x26a00231, 0x00ae06c0, 0x00000000 }, + { 0x00600001, 0x46a60231, 0x00ae06cc, 0x00000000 }, + { 0x00600001, 0x46a70231, 0x00ae05c0, 0x00000000 }, + { 0x00200040, 0x220c3eac, 0x00450036, 0x06a006a0 }, + { 0x80800040, 0xd0603631, 0x01ee9800, 0x00b18860 }, + { 0x80800040, 0xd0403631, 0x01ee9802, 0x00b18840 }, + { 0x80800040, 0xd0203631, 0x01ee9804, 0x00b18820 }, + { 0x80800040, 0xd0003631, 0x01ee9806, 0x00b18800 }, + { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, + { 0x00400009, 0x26c05421, 0x00000744, 0x00690050 }, + { 0x00400009, 0x26d05421, 0x00000740, 0x00690050 }, + { 0x00600001, 0x26a00231, 0x00ab06c3, 0x00000000 }, + { 0x00800001, 0x26a80231, 0x00b10723, 0x00000000 }, + { 0x00800040, 0x24003e2c, 0x00b106a2, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b106a1, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b106a0, 0x00010001 }, + { 0x00800008, 0x25c03d89, 0x008d0400, 0x00020002 }, + { 0x00800042, 0x26a0462d, 0x00b106a0, 0x00b106a1 }, + { 0x00600001, 0x46a10231, 0x00ae05c0, 0x00000000 }, + { 0x00600001, 0x26b00231, 0x00ae05d0, 0x00000000 }, + { 0x00200040, 0x220c3eac, 0x00450056, 0x06a006a0 }, + { 0x80800040, 0xd0603631, 0x01ed9800, 0x00b18860 }, + { 0x80800040, 0xd0403631, 0x01ed9804, 0x00b18840 }, + { 0x80800040, 0xd0203631, 0x01ed9808, 0x00b18820 }, + { 0x80800040, 0xd0003631, 0x01ed980c, 0x00b18800 }, + { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, + { 0x00800042, 0x25c04629, 0x00b10724, 0x00b10725 }, + { 0x00800040, 0x24003e2c, 0x00b10726, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b10725, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b10724, 0x00010001 }, + { 0x00800008, 0x25e03d89, 0x002d0400, 0x00020002 }, + { 0x80800040, 0xd0003531, 0x00ad05c0, 0x00b18800 }, + { 0x80800040, 0xd0203531, 0x00ad05c2, 0x00b18820 }, + { 0x80800040, 0xd0403531, 0x00ad05c4, 0x00b18840 }, + { 0x80800040, 0xd0603531, 0x00ad05c6, 0x00b18860 }, + { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, + { 0x00600001, 0x27480231, 0x00000747, 0x00000000 }, + { 0x00800042, 0x25c04629, 0x00b10740, 0x00b10741 }, + { 0x00800040, 0x24003e2c, 0x00b10742, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b10741, 0x00020002 }, + { 0x00800048, 0x24003e2c, 0x00b10740, 0x00010001 }, + { 0x00800008, 0x25e03d89, 0x002d0400, 0x00020002 }, + { 0x00800001, 0x45c10231, 0x00d205e0, 0x00000000 }, + { 0x80800040, 0xd0003631, 0x004d05c0, 0x00b18800 }, + { 0x80800040, 0xd0203631, 0x004d05c4, 0x00b18820 }, + { 0x80800040, 0xd0403631, 0x004d05c8, 0x00b18840 }, + { 0x80800040, 0xd0603631, 0x004d05cc, 0x00b18860 }, + { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, + { 0x00000401, 0x27c80061, 0x00000000, 0x000f000f }, + { 0x00200801, 0x27c001a1, 0x004507fa, 0x00000000 }, + { 0x00000040, 0x22000c00, 0x00000200, 0x0ff04000 }, + { 0x00800001, 0x20400232, 0x00cd0400, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00cd0408, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00cd0410, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00cd0418, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00cd0440, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00cd0448, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00cd0450, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00cd0458, 0x00000000 }, + { 0x00800001, 0x20c00232, 0x00cd0480, 0x00000000 }, + { 0x00800001, 0x20d00232, 0x00cd0488, 0x00000000 }, + { 0x00800001, 0x20e00232, 0x00cd0490, 0x00000000 }, + { 0x00800001, 0x20f00232, 0x00cd0498, 0x00000000 }, + { 0x00800001, 0x21000232, 0x00cd04c0, 0x00000000 }, + { 0x00800001, 0x21100232, 0x00cd04c8, 0x00000000 }, + { 0x00800001, 0x21200232, 0x00cd04d0, 0x00000000 }, + { 0x00800001, 0x21300232, 0x00cd04d8, 0x00000000 }, + { 0x01600031, 0x27800021, 0x508d07c0, 0x00000200 }, + { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, + { 0x00600001, 0x27c00021, 0x008d0000, 0x00000000 }, + { 0x00200009, 0x27fa3e29, 0x00450064, 0x00040004 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffd34 }, + { 0x00000001, 0x220401ec, 0x00000000, 0x00800080 }, + { 0x00000001, 0x220601ec, 0x00000000, 0x04000400 }, + { 0x00200008, 0x27006e2d, 0x0000006c, 0x00000040 }, + { 0x02600005, 0x20003e20, 0x0000006c, 0x00040004 }, + { 0x00780001, 0x26340231, 0x00000633, 0x00000000 }, + { 0x00800001, 0x27200231, 0x00b10620, 0x00000000 }, + { 0x00600001, 0x27400231, 0x00cf0643, 0x00000000 }, + { 0x00400008, 0x26806e2d, 0x00240070, 0x00004040 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000006a }, + { 0x00000040, 0x22043d8c, 0x00000204, 0x00800080 }, + { 0x00000006, 0x27003dad, 0x00000700, 0x00010001 }, + { 0x00800001, 0x27200231, 0x00b10628, 0x00000000 }, + { 0x00400001, 0x27400231, 0x00808c26, 0x00000000 }, + { 0x00400001, 0x27440231, 0x00808c66, 0x00000000 }, + { 0x00400008, 0x26806e2d, 0x00240072, 0x00004040 }, + { 0x00000040, 0x22063d8c, 0x00000206, 0x00800080 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000058 }, + { 0x00000040, 0x22043d8c, 0x00000204, 0x00800080 }, + { 0x00000006, 0x27003dad, 0x00000702, 0x00020002 }, + { 0x00800001, 0xaf800231, 0x00d28f80, 0x00000000 }, + { 0x00800001, 0xaf900231, 0x00d28fa0, 0x00000000 }, + { 0x00800001, 0xafc00231, 0x00d28fc0, 0x00000000 }, + { 0x00800001, 0xafd00231, 0x00d28fe0, 0x00000000 }, + { 0x00800001, 0xafa00231, 0x00d28c00, 0x00000000 }, + { 0x00800001, 0xafb00231, 0x00d28c20, 0x00000000 }, + { 0x00800001, 0xafe00231, 0x00d28c40, 0x00000000 }, + { 0x00800001, 0xaff00231, 0x00d28c60, 0x00000000 }, + { 0x00400001, 0x27200231, 0x0069065c, 0x00000000 }, + { 0x00600001, 0x27240231, 0x00a98fcc, 0x00000000 }, + { 0x00600001, 0x272c0231, 0x00a98fec, 0x00000000 }, + { 0x00600001, 0x27340231, 0x00008fff, 0x00000000 }, + { 0x00800001, 0x2620012d, 0x00b10720, 0x00000000 }, + { 0x00600001, 0x27400231, 0x00cf0663, 0x00000000 }, + { 0x00400008, 0x26806e2d, 0x00240074, 0x00004040 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000032 }, + { 0x00000040, 0x22043d8c, 0x00000204, 0x00800080 }, + { 0x00000006, 0x27003dad, 0x00000700, 0x00010001 }, + { 0x00800001, 0x27200231, 0x00b10628, 0x00000000 }, + { 0x00600001, 0x27300231, 0x008d0638, 0x00000000 }, + { 0x00400001, 0x27400231, 0x00808c26, 0x00000000 }, + { 0x00400001, 0x27440231, 0x00808c66, 0x00000000 }, + { 0x00400008, 0x26806e2d, 0x00240076, 0x00004040 }, + { 0x00000040, 0x22063d8c, 0x00000206, 0x00800080 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000001e }, + { 0x00800001, 0xaf800231, 0x00d28f80, 0x00000000 }, + { 0x00800001, 0xaf900231, 0x00d28fa0, 0x00000000 }, + { 0x00800001, 0xafc00231, 0x00d28fc0, 0x00000000 }, + { 0x00800001, 0xafd00231, 0x00d28fe0, 0x00000000 }, + { 0x00800001, 0xafa00231, 0x00d28c00, 0x00000000 }, + { 0x00800001, 0xafb00231, 0x00d28c20, 0x00000000 }, + { 0x00800001, 0xafe00231, 0x00d28c40, 0x00000000 }, + { 0x00800001, 0xaff00231, 0x00d28c60, 0x00000000 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000000e0 }, + { 0x00000040, 0x27e01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffcce }, + { 0x00000001, 0x27800021, 0x00000780, 0x00000000 }, + { 0x00000001, 0x27a00021, 0x000007a0, 0x00000000 }, + { 0x01600031, 0x20001c20, 0x708d0000, 0x82000010 }, + { 0x00600001, 0x27800231, 0x008d0740, 0x00000000 }, + { 0x00400005, 0x22083dac, 0x00690680, 0x000f000f }, + { 0x00400040, 0x26a04625, 0x01e09020, 0x00690058 }, + { 0x00000001, 0x26d001ad, 0x00000700, 0x00000000 }, + { 0x00000040, 0x27e41c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001400, 0x00001400, 0x000006a0 }, + { 0x80600040, 0xcc0035b1, 0x00898800, 0x008d0760 }, + { 0x80600040, 0xcc1035b1, 0x00898820, 0x008d0770 }, + { 0x00800001, 0x27200231, 0x008d0724, 0x00000000 }, + { 0x00400001, 0x27400231, 0x00808c06, 0x00000000 }, + { 0x00000006, 0x26d03dad, 0x00000700, 0x00010001 }, + { 0x00000040, 0x27e41c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001400, 0x00001400, 0x000006a4 }, + { 0x80600040, 0xcc2035b1, 0x00898808, 0x008d0760 }, + { 0x80600040, 0xcc3035b1, 0x00898828, 0x008d0770 }, + { 0x00000001, 0x27230231, 0x00000783, 0x00000000 }, + { 0x00400001, 0x27240231, 0x008a8c18, 0x00000000 }, + { 0x00400001, 0x27280231, 0x008a8c38, 0x00000000 }, + { 0x00400001, 0x272c0231, 0x00008c3e, 0x00000000 }, + { 0x00400001, 0x27400231, 0x00690784, 0x00000000 }, + { 0x00000006, 0x26d03dad, 0x00000700, 0x00020002 }, + { 0x00000040, 0x27e41c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001400, 0x00001400, 0x000006a8 }, + { 0x80600040, 0xcc4035b1, 0x00898840, 0x008d0760 }, + { 0x80600040, 0xcc5035b1, 0x00898860, 0x008d0770 }, + { 0x00800001, 0x27200231, 0x008d0724, 0x00000000 }, + { 0x00600001, 0x27280231, 0x00000727, 0x00000000 }, + { 0x00400001, 0x27400231, 0x00808c46, 0x00000000 }, + { 0x00000006, 0x26d03dad, 0x00000700, 0x00030003 }, + { 0x00000040, 0x27e41c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001400, 0x00001400, 0x000006ac }, + { 0x80600040, 0xcc6035b1, 0x00898848, 0x008d0760 }, + { 0x80600040, 0xcc7035b1, 0x00898868, 0x008d0770 }, + { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, + { 0x00800001, 0x2760022d, 0x00090724, 0x00000000 }, + { 0x00000001, 0x34000020, 0x000007e4, 0x00000000 }, + { 0x00800001, 0x2760022d, 0x00280740, 0x00000000 }, + { 0x00000001, 0x34000020, 0x000007e4, 0x00000000 }, + { 0x02802005, 0x20003da0, 0x000006d0, 0x00020002 }, + { 0x02802005, 0x20003da0, 0x020006d0, 0x00010001 }, + { 0x009a0001, 0x27200169, 0x00000000, 0x80808080 }, + { 0x00780001, 0x27400231, 0x028d0724, 0x00000000 }, + { 0x00780001, 0x27240231, 0x008d0740, 0x00000000 }, + { 0x00400040, 0x25e04629, 0x00690724, 0x00690740 }, + { 0x00200040, 0x25e02529, 0x004505e0, 0x004505e4 }, + { 0x00800040, 0x2400252c, 0x000005e0, 0x000005e2 }, + { 0x00800040, 0x24003d8c, 0x008d0400, 0x00040004 }, + { 0x00800008, 0x27603d8d, 0x008d0400, 0x00030003 }, + { 0x00000001, 0x34000020, 0x000007e4, 0x00000000 }, + { 0x00600001, 0x26c00231, 0x008d0724, 0x00000000 }, + { 0x00400001, 0x26c80231, 0x0069072b, 0x00000000 }, + { 0x00600040, 0x24003e2c, 0x008d06c2, 0x00020002 }, + { 0x00600048, 0x24003e2c, 0x008d06c1, 0x00020002 }, + { 0x00600048, 0x25e03e29, 0x008d06c0, 0x00010001 }, + { 0x00800008, 0x27603d2d, 0x002905e0, 0x00020002 }, + { 0x00000001, 0x34000020, 0x000007e4, 0x00000000 }, + { 0x00400009, 0x26e05421, 0x00000740, 0x00690050 }, + { 0x00600001, 0x26c40231, 0x008d0723, 0x00000000 }, + { 0x00400001, 0x26c00231, 0x00ab06e3, 0x00000000 }, + { 0x00600040, 0x24003e2c, 0x008d06c2, 0x00020002 }, + { 0x00600048, 0x24003e2c, 0x008d06c1, 0x00020002 }, + { 0x00600048, 0x26c03e2d, 0x008d06c0, 0x00010001 }, + { 0x00400040, 0x22083eac, 0x00690054, 0x06c006c0 }, + { 0x00800008, 0x27603dad, 0x01e99000, 0x00020002 }, + { 0x00000001, 0x34000020, 0x000007e4, 0x00000000 }, + { 0x00400009, 0x26e05421, 0x00000740, 0x00690050 }, + { 0x00600001, 0x26c40231, 0x008d0723, 0x00000000 }, + { 0x00400001, 0x26c00231, 0x00ab06e3, 0x00000000 }, + { 0x00600042, 0x25c04629, 0x008d06c4, 0x008d06c5 }, + { 0x00600040, 0x24003e2c, 0x008d06c3, 0x00020002 }, + { 0x00600048, 0x24003e2c, 0x008d06c2, 0x00020002 }, + { 0x00600048, 0x24003e2c, 0x008d06c1, 0x00010001 }, + { 0x00600008, 0x26c03d8d, 0x008d0400, 0x00020002 }, + { 0x00400001, 0x46c401ad, 0x006906c4, 0x00000000 }, + { 0x00400001, 0x46c6012d, 0x006905c0, 0x00000000 }, + { 0x00400040, 0x22083eac, 0x00690054, 0x06c006c0 }, + { 0x00800001, 0x276001ad, 0x01ea9000, 0x00000000 }, + { 0x00000001, 0x34000020, 0x000007e4, 0x00000000 }, + { 0x00400009, 0x26e05421, 0x00000740, 0x00690050 }, + { 0x00600001, 0x26c40231, 0x008d0723, 0x00000000 }, + { 0x00400001, 0x26c00231, 0x00ab06e3, 0x00000000 }, + { 0x00600042, 0x25c04629, 0x008d06c0, 0x008d06c1 }, + { 0x00600040, 0x24003e2c, 0x008d06c2, 0x00020002 }, + { 0x00600048, 0x24003e2c, 0x008d06c1, 0x00020002 }, + { 0x00600048, 0x26e03e2d, 0x008d06c0, 0x00010001 }, + { 0x00400008, 0x46c23dad, 0x006906e0, 0x00020002 }, + { 0x00200008, 0x26d03dad, 0x004506e8, 0x00020002 }, + { 0x00400001, 0x46c0012d, 0x006905c0, 0x00000000 }, + { 0x00400009, 0x22083eac, 0x00690054, 0x00010001 }, + { 0x00400040, 0x22083d8c, 0x00690208, 0x06c006c0 }, + { 0x00800001, 0x276001ad, 0x01e99000, 0x00000000 }, + { 0x00000001, 0x34000020, 0x000007e4, 0x00000000 }, + { 0x00600042, 0x45c04629, 0x008d0724, 0x008d0725 }, + { 0x00600040, 0x24003e2c, 0x008d0726, 0x00020002 }, + { 0x00600048, 0x24003e2c, 0x008d0725, 0x00020002 }, + { 0x00600048, 0x25e03e29, 0x008d0724, 0x00010001 }, + { 0x00600008, 0x45c23d29, 0x008d05e0, 0x00020002 }, + { 0x00800001, 0x2760012d, 0x002a05c0, 0x00000000 }, + { 0x00000001, 0x34000020, 0x000007e4, 0x00000000 }, + { 0x00600001, 0x27440231, 0x00000743, 0x00000000 }, + { 0x00600042, 0x45c04629, 0x008d0740, 0x008d0741 }, + { 0x00600040, 0x24003e2c, 0x008d0742, 0x00020002 }, + { 0x00600048, 0x24003e2c, 0x008d0741, 0x00020002 }, + { 0x00600048, 0x25e03e29, 0x008d0740, 0x00010001 }, + { 0x00600008, 0x45c23d29, 0x008d05e0, 0x00020002 }, + { 0x00800001, 0x2760012d, 0x004905c0, 0x00000000 }, + { 0x00000001, 0x34000020, 0x000007e4, 0x00000000 }, + { 0x00000401, 0x27c80061, 0x00000000, 0x000f000f }, + { 0x00200801, 0x27c001a1, 0x004507fa, 0x00000000 }, + { 0x00000040, 0x22000c00, 0x00000200, 0x0ff04000 }, + { 0x00800001, 0x20400232, 0x00a90400, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00a90404, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00a90408, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00a9040c, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00a90440, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00a90444, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00a90448, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00a9044c, 0x00000000 }, + { 0x00800001, 0x20c00232, 0x00a90480, 0x00000000 }, + { 0x00800001, 0x20d00232, 0x00a90484, 0x00000000 }, + { 0x00800001, 0x20e00232, 0x00a90488, 0x00000000 }, + { 0x00800001, 0x20f00232, 0x00a9048c, 0x00000000 }, + { 0x00800001, 0x21000232, 0x00a904c0, 0x00000000 }, + { 0x00800001, 0x21100232, 0x00a904c4, 0x00000000 }, + { 0x00800001, 0x21200232, 0x00a904c8, 0x00000000 }, + { 0x00800001, 0x21300232, 0x00a904cc, 0x00000000 }, + { 0x01600031, 0x27800021, 0x508d07c0, 0x00000200 }, + { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27c00021, 0x008d0000, 0x00000000 }, + { 0x00200009, 0x27fa3e29, 0x00450064, 0x00040004 }, + { 0x00000401, 0x27c80061, 0x00000000, 0x000f000f }, + { 0x00200809, 0x27c03e21, 0x00450064, 0x00040004 }, + { 0x00000040, 0x22000d20, 0x00000062, 0x1218a000 }, + { 0x00a02401, 0x20400232, 0x00b10080, 0x00000000 }, + { 0x00a02801, 0x20500232, 0x00b10090, 0x00000000 }, + { 0x00a02401, 0x20800232, 0x00b100c0, 0x00000000 }, + { 0x00a02801, 0x20900232, 0x00b100d0, 0x00000000 }, + { 0x00a02401, 0x20c00232, 0x00b10100, 0x00000000 }, + { 0x00a02801, 0x20d00232, 0x00b10110, 0x00000000 }, + { 0x00a02401, 0x21000232, 0x00b10140, 0x00000000 }, + { 0x00a02801, 0x21100232, 0x00b10150, 0x00000000 }, + { 0x01600031, 0x27800021, 0x508d07c0, 0x00000200 }, + { 0x00000401, 0x20280062, 0x00000000, 0x0007000f }, + { 0x0000080c, 0x20243c22, 0x000007c4, 0x00010001 }, + { 0x00000040, 0x22001c00, 0x00000200, 0xf8000001 }, + { 0x00800001, 0x40400232, 0x00b10180, 0x00000000 }, + { 0x00800001, 0x40410232, 0x00b101c0, 0x00000000 }, + { 0x00800001, 0x40600232, 0x00b10190, 0x00000000 }, + { 0x00800001, 0x40610232, 0x00b101d0, 0x00000000 }, + { 0x00800001, 0x40800232, 0x00b101a0, 0x00000000 }, + { 0x00800001, 0x40810232, 0x00b101e0, 0x00000000 }, + { 0x00800001, 0x40a00232, 0x00b101b0, 0x00000000 }, + { 0x00800001, 0x40a10232, 0x00b101f0, 0x00000000 }, + { 0x01600031, 0x27a00001, 0x508d0000, 0x00000200 }, + { 0x00000001, 0x27800021, 0x00000780, 0x00000000 }, + { 0x00000001, 0x27a00021, 0x000007a0, 0x00000000 }, + { 0x01600031, 0x20001c20, 0x708d0000, 0x82000010 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x20400021, 0x008d0000, 0x00000000 }, + { 0x00000005, 0x20203e2d, 0x00000061, 0x001f001f }, + { 0x00200009, 0x20643e2d, 0x00450064, 0x00040004 }, + { 0x00000001, 0x203a01ed, 0x00000000, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000020, 0x00160016 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000001e }, + { 0x01200010, 0x20003e2c, 0x0200006c, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000024 }, + { 0x00800009, 0x25403dad, 0x00050064, 0x00020002 }, + { 0x00000001, 0x203a01ed, 0x00000000, 0x00180018 }, + { 0x00200040, 0x45483dad, 0x00660548, 0x00100010 }, + { 0x00200040, 0x45523dad, 0x00660552, 0x00100010 }, + { 0x00400040, 0x25583dad, 0x00690558, 0x00100010 }, + { 0x00800040, 0x208035ad, 0x00b10080, 0x00b10540 }, + { 0x00600040, 0x45403dad, 0x00ae0540, 0x00200020 }, + { 0x00800040, 0x20a035ad, 0x00b100a0, 0x00b10540 }, + { 0x00600040, 0x45423dad, 0x00ae0542, 0x00200020 }, + { 0x00800040, 0x20e035ad, 0x00b100e0, 0x00b10540 }, + { 0x00600040, 0x45403dad, 0x00ae0540, 0xffe0ffe0 }, + { 0x00800040, 0x20c035ad, 0x00b100c0, 0x00b10540 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000014 }, + { 0x06600010, 0x20003dac, 0x02000020, 0x00030003 }, + { 0x00000001, 0x206c0171, 0x00000000, 0x00000000 }, + { 0x00610001, 0x208000a5, 0x02050080, 0x00000000 }, + { 0x00610001, 0x212000a5, 0x02090100, 0x00000000 }, + { 0x00410001, 0x211000a5, 0x02690100, 0x00000000 }, + { 0x00200009, 0x25403dad, 0x00450064, 0x00020002 }, + { 0x00800040, 0x208035ad, 0x00b10080, 0x00050540 }, + { 0x00200040, 0x40883dad, 0x00660088, 0x00200020 }, + { 0x00200040, 0x40923dad, 0x00660092, 0x00200020 }, + { 0x00400040, 0x20983dad, 0x00690098, 0x00200020 }, + { 0x00200401, 0x22080060, 0x00000000, 0x03400140 }, + { 0x00000c01, 0x220c0060, 0x00000000, 0x04400080 }, + { 0x00000801, 0x22040060, 0x00000000, 0x01000070 }, + { 0x00000001, 0x20200169, 0x00000000, 0x00000000 }, + { 0x0000000c, 0x2458262d, 0x0000006d, 0x00000020 }, + { 0x00000001, 0x210e0169, 0x00000000, 0x00010001 }, + { 0x00000005, 0x24583dad, 0x00000458, 0x00030003 }, + { 0x01000010, 0x200035ac, 0x0000010e, 0x00000458 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x000002fe }, + { 0x01000010, 0x20003dac, 0x0200010e, 0x00010001 }, + { 0x00010401, 0x24540061, 0x02000000, 0x06c00640 }, + { 0x00010805, 0x245a3e2d, 0x02008800, 0x007f007f }, + { 0x00110401, 0x24540061, 0x02000000, 0x04800780 }, + { 0x00110805, 0x245a3e2d, 0x02008804, 0x007f007f }, + { 0x0000000c, 0x211e362d, 0x0000006c, 0x00000020 }, + { 0x00000040, 0x20780d21, 0x0000045a, 0x0208a002 }, + { 0x02000005, 0x20003dac, 0x0200011e, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000001be }, + { 0x01000005, 0x20003dac, 0x00009800, 0x00030003 }, + { 0x00200005, 0x24443dad, 0x00459800, 0x00030003 }, + { 0x0020000c, 0x24403dad, 0x00459800, 0x00020002 }, + { 0x01600006, 0x20003dac, 0x02000446, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000012 }, + { 0x00010040, 0x22000c20, 0x02000078, 0x00400000 }, + { 0x00110040, 0x22000c20, 0x02000078, 0x00700000 }, + { 0x00310040, 0x20401da5, 0x02450440, 0xfffffffe }, + { 0x00110001, 0x20480061, 0x02000000, 0x000c000c }, + { 0x00010040, 0x20401da5, 0x02000440, 0xfffffffe }, + { 0x00010001, 0x204401a5, 0x02000442, 0x00000000 }, + { 0x00010001, 0x20480061, 0x02000000, 0x0007000c }, + { 0x01600031, 0x25600021, 0x408d0040, 0x00000200 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00010040, 0x22000c20, 0x02000078, 0x00200000 }, + { 0x00110040, 0x22000c20, 0x02000078, 0x00400000 }, + { 0x00200001, 0x204001a5, 0x00450440, 0x00000000 }, + { 0x00110040, 0x20441da5, 0x02000442, 0xfffffffe }, + { 0x00110001, 0x20480061, 0x02000000, 0x000c0007 }, + { 0x00010001, 0x20480061, 0x02000000, 0x00070007 }, + { 0x01600031, 0x25600021, 0x408d0040, 0x00000200 }, + { 0x0020040c, 0x24403dad, 0x00459800, 0x00030003 }, + { 0x00200805, 0x24483dad, 0x00459800, 0x00070007 }, + { 0x01600006, 0x20003dac, 0x0000044a, 0x00000000 }, + { 0x00200001, 0x204001a5, 0x00450440, 0x00000000 }, + { 0x00000009, 0x20403ca5, 0x00000040, 0x00010001 }, + { 0x00010040, 0x22000c20, 0x00000078, 0x00200010 }, + { 0x00110040, 0x22000c20, 0x00000078, 0x00300010 }, + { 0x00010001, 0x20480061, 0x00000000, 0x00030009 }, + { 0x00110001, 0x20480061, 0x00000000, 0x00040009 }, + { 0x02600031, 0x27000021, 0x408d0040, 0x00000200 }, + { 0x01000005, 0x20003dac, 0x00009800, 0x00030003 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000001a }, + { 0x00600001, 0x26220231, 0x008d05c0, 0x00000000 }, + { 0x00600401, 0x26120231, 0x008d05b8, 0x00000000 }, + { 0x00600801, 0x26020231, 0x008d05b0, 0x00000000 }, + { 0x00600401, 0x25f20231, 0x008d05a8, 0x00000000 }, + { 0x00600801, 0x25e20231, 0x008d05a0, 0x00000000 }, + { 0x00600401, 0x25d20231, 0x008d0598, 0x00000000 }, + { 0x00600801, 0x25c20231, 0x008d0590, 0x00000000 }, + { 0x00600401, 0x25b20231, 0x008d0588, 0x00000000 }, + { 0x00600801, 0x25a20231, 0x008d0580, 0x00000000 }, + { 0x00600401, 0x25920231, 0x008d0578, 0x00000000 }, + { 0x00600801, 0x25820231, 0x008d0570, 0x00000000 }, + { 0x00600001, 0x25720231, 0x008d0568, 0x00000000 }, + { 0x00600001, 0x25620231, 0x008d0560, 0x00000000 }, + { 0x00110001, 0x220001ec, 0x02000000, 0x05820582 }, + { 0x00010001, 0x220001ec, 0x02000000, 0x05620562 }, + { 0x00000001, 0x220e0128, 0x00000454, 0x00000000 }, + { 0x01800006, 0x200035ac, 0x02000446, 0x00000444 }, + { 0x00810001, 0xbc000229, 0x02ad8000, 0x00000000 }, + { 0x00810001, 0xbc200229, 0x02ad8020, 0x00000000 }, + { 0x00810001, 0xbc400229, 0x02ad8040, 0x00000000 }, + { 0x00810001, 0xbc600229, 0x02ad8060, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000012a }, + { 0x00600001, 0x2024018d, 0x008d0200, 0x00000000 }, + { 0x01000041, 0x245e35ad, 0x00000446, 0x00000444 }, + { 0x00000040, 0x22022d08, 0x00000200, 0x00100010 }, + { 0x02000005, 0x20003db0, 0x0200045e, 0x00010001 }, + { 0x00200040, 0x22042d08, 0x00450200, 0x00200020 }, + { 0x00400001, 0x244c0109, 0x00690200, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000066 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000064 }, + { 0x00000040, 0x22003d08, 0x00000200, 0xffdeffde }, + { 0x00000440, 0x22023d08, 0x00000202, 0xffeeffee }, + { 0x00000801, 0x220c0060, 0x00000000, 0x04a00480 }, + { 0x01000010, 0x20003db0, 0x0000045e, 0x00040004 }, + { 0x00a02040, 0x2400462c, 0x00ad8000, 0x00ad8005 }, + { 0x00a02048, 0x24003e2c, 0x00ad8001, 0xfffbfffb }, + { 0x00a02048, 0x24003e2c, 0x00ad8002, 0x00140014 }, + { 0x00a02048, 0x24003e2c, 0x00ad8003, 0x00140014 }, + { 0x00a02048, 0xb8003e2d, 0x00ad8004, 0xfffbfffb }, + { 0x00a02040, 0x2400462c, 0x00ad8040, 0x00ad8045 }, + { 0x00a02048, 0x24003e2c, 0x00ad8041, 0xfffbfffb }, + { 0x00a02048, 0x24003e2c, 0x00ad8042, 0x00140014 }, + { 0x00a02048, 0x24003e2c, 0x00ad8043, 0x00140014 }, + { 0x00a02048, 0xb8403e2d, 0x00ad8044, 0xfffbfffb }, + { 0x00a02040, 0x2400462c, 0x00ad8080, 0x00ad8085 }, + { 0x00a02048, 0x24003e2c, 0x00ad8081, 0xfffbfffb }, + { 0x00a02048, 0x24003e2c, 0x00ad8082, 0x00140014 }, + { 0x00a02048, 0x24003e2c, 0x00ad8083, 0x00140014 }, + { 0x00a02048, 0xb8803e2d, 0x00ad8084, 0xfffbfffb }, + { 0x00600040, 0x2400462c, 0x008d80c0, 0x008d80c5 }, + { 0x00600048, 0x24003e2c, 0x008d80c1, 0xfffbfffb }, + { 0x00600048, 0x24003e2c, 0x008d80c2, 0x00140014 }, + { 0x00600048, 0x24003e2c, 0x008d80c3, 0x00140014 }, + { 0x00600048, 0xb8c03e2d, 0x008d80c4, 0xfffbfffb }, + { 0x00000401, 0x22000060, 0x00000000, 0x04a00480 }, + { 0x00000c01, 0x22040060, 0x00000000, 0x04a00490 }, + { 0x00010802, 0x220c2d28, 0x00000454, 0x04800480 }, + { 0x00a02040, 0x24003dac, 0x00b18000, 0x02000200 }, + { 0x00800048, 0x24003dac, 0x01ed8800, 0xfffbfffb }, + { 0x00800048, 0x24203dac, 0x01ed8820, 0xfffbfffb }, + { 0x00a02048, 0x24003dac, 0x00b18020, 0x00140014 }, + { 0x00800048, 0x24003dac, 0x01ed8820, 0x00140014 }, + { 0x00800048, 0x24203dac, 0x01ed8840, 0x00140014 }, + { 0x00a02048, 0x24003dac, 0x00b18040, 0xfffbfffb }, + { 0x00800048, 0x24003dac, 0x01ed8840, 0x00010001 }, + { 0x00800048, 0x24203dac, 0x01ed8860, 0x00010001 }, + { 0x8080000c, 0xd8003d91, 0x00b10400, 0x000a000a }, + { 0x8080100c, 0xd8203d91, 0x00b10420, 0x000a000a }, + { 0x00a02040, 0x24003dac, 0x00b18040, 0x02000200 }, + { 0x00800048, 0x24003dac, 0x01ed8840, 0xfffbfffb }, + { 0x00800048, 0x24203dac, 0x01ed8860, 0xfffbfffb }, + { 0x00a02048, 0x24003dac, 0x00b18060, 0x00140014 }, + { 0x00800048, 0x24003dac, 0x01ed8860, 0x00140014 }, + { 0x00800048, 0x24203dac, 0x01ed8880, 0x00140014 }, + { 0x00a02048, 0x24003dac, 0x00b18080, 0xfffbfffb }, + { 0x00800048, 0x24003dac, 0x01ed8880, 0x00010001 }, + { 0x00800048, 0x24203dac, 0x01ed88a0, 0x00010001 }, + { 0x8080000c, 0xd8403d91, 0x00b10400, 0x000a000a }, + { 0x8080100c, 0xd8603d91, 0x00b10420, 0x000a000a }, + { 0x00010220, 0x34001c00, 0x00001400, 0x000000b4 }, + { 0x01000010, 0x20003db0, 0x00000444, 0x00000000 }, + { 0x01000010, 0x20003db0, 0x02000446, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000004c }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000004a }, + { 0x00400040, 0x22003d28, 0x0069044c, 0xfffefffe }, + { 0x03400010, 0x20003dac, 0x00000446, 0x00020002 }, + { 0x01000010, 0x20003db0, 0x02000444, 0x00020002 }, + { 0x00410040, 0x22002d08, 0x00690200, 0x00100010 }, + { 0x01000010, 0x20003dac, 0x00000446, 0x00000000 }, + { 0x00010002, 0x220c2d28, 0x02000454, 0x04800480 }, + { 0x00800040, 0x24003e2c, 0x01ed8000, 0x00100010 }, + { 0x00800040, 0x24203e2c, 0x01ed8020, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01ed8001, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8021, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8002, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8022, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8003, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8023, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8004, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8024, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8005, 0x00010001 }, + { 0x00800048, 0x24203e2c, 0x01ed8025, 0x00010001 }, + { 0x8080000c, 0xd8003d91, 0x00b10400, 0x00050005 }, + { 0x8080100c, 0xd8203d91, 0x00b10420, 0x00050005 }, + { 0x00800040, 0x24003e2c, 0x01ed8040, 0x00100010 }, + { 0x00800040, 0x24203e2c, 0x01ed8060, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01ed8041, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8061, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8042, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8062, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8043, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8063, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8044, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8064, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8045, 0x00010001 }, + { 0x00800048, 0x24203e2c, 0x01ed8065, 0x00010001 }, + { 0x8080000c, 0xd8403d91, 0x00b10400, 0x00050005 }, + { 0x8080100c, 0xd8603d91, 0x00b10420, 0x00050005 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000004 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000005c }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000062 }, + { 0x01000010, 0x20003db0, 0x00000446, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000042 }, + { 0x00200401, 0x22000128, 0x0066044c, 0x00000000 }, + { 0x00200c01, 0x22040128, 0x0045044e, 0x00000000 }, + { 0x00000801, 0x220c0128, 0x00000454, 0x00000000 }, + { 0x03400010, 0x20003dac, 0x02000444, 0x00020002 }, + { 0x01000010, 0x20003dac, 0x00000444, 0x00000000 }, + { 0x00410040, 0x22002d08, 0x02690200, 0x00010001 }, + { 0x01000010, 0x20003db0, 0x02000446, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000002 }, + { 0x00110001, 0x220c0168, 0x02000000, 0x04800480 }, + { 0x00a02040, 0x24003e2c, 0x00ad83e0, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01ed8be0, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8800, 0xfffbfffb }, + { 0x00a02048, 0x24003e2c, 0x00ad8000, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8800, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8820, 0x00140014 }, + { 0x00a02048, 0x24003e2c, 0x00ad8020, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8820, 0x00010001 }, + { 0x00800048, 0x24203e2c, 0x01ed8840, 0x00010001 }, + { 0x8080000c, 0xd8003d91, 0x00b10400, 0x00050005 }, + { 0x8080100c, 0xd8203d91, 0x00b10420, 0x00050005 }, + { 0x00a02040, 0x24003e2c, 0x00ad8020, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01ed8820, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8840, 0xfffbfffb }, + { 0x00a02048, 0x24003e2c, 0x00ad8040, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8840, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8860, 0x00140014 }, + { 0x00a02048, 0x24003e2c, 0x00ad8060, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8860, 0x00010001 }, + { 0x00800048, 0x24203e2c, 0x01ed8880, 0x00010001 }, + { 0x8080000c, 0xd8403d91, 0x00b10400, 0x00050005 }, + { 0x8080100c, 0xd8603d91, 0x00b10420, 0x00050005 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001c }, + { 0x00200401, 0x22000128, 0x0045044c, 0x00000000 }, + { 0x00000801, 0x220c0128, 0x00000454, 0x00000000 }, + { 0x01200010, 0x20003dac, 0x00000444, 0x00030003 }, + { 0x01200010, 0x20003dac, 0x02000446, 0x00030003 }, + { 0x00210040, 0x22002d08, 0x00450200, 0x00010001 }, + { 0x00210040, 0x22002d08, 0x02450200, 0x00100010 }, + { 0x00800001, 0xb8000229, 0x01ed8000, 0x00000000 }, + { 0x00800001, 0xb8200229, 0x01ed8020, 0x00000000 }, + { 0x00800001, 0xb8400229, 0x01ed8040, 0x00000000 }, + { 0x00800001, 0xb8600229, 0x01ed8060, 0x00000000 }, + { 0x80800042, 0xd8004631, 0x00d29800, 0x00d20480 }, + { 0x80800042, 0xd8204631, 0x00d29820, 0x00d204a0 }, + { 0x80800042, 0xd8404631, 0x00d29840, 0x00d204c0 }, + { 0x80800042, 0xd8604631, 0x00d29860, 0x00d204e0 }, + { 0x00600001, 0x220001ac, 0x008d0024, 0x00000000 }, + { 0x00200040, 0x244c3dad, 0x00450448, 0xfff8fff8 }, + { 0x00000401, 0x220001ec, 0x00000000, 0x07000700 }, + { 0x00000c01, 0x220201e8, 0x00000000, 0x07100710 }, + { 0x00000801, 0x220e0128, 0x00000456, 0x00000000 }, + { 0x00000441, 0x254635ad, 0x00000448, 0x0000044a }, + { 0x00000c41, 0x254025ad, 0x0000444c, 0x0000444e }, + { 0x00000c41, 0x254225ad, 0x00000448, 0x0000444e }, + { 0x00000841, 0x254435ad, 0x0000444c, 0x0000044a }, + { 0x00200040, 0x244c3d09, 0x00450200, 0x00100010 }, + { 0x00800041, 0x24002628, 0x00ad8000, 0x00000540 }, + { 0x00800041, 0x24202628, 0x00ad8020, 0x00000540 }, + { 0x00800048, 0x24002628, 0x00ad8002, 0x00000542 }, + { 0x00800048, 0x24202628, 0x00ad8022, 0x00000542 }, + { 0x00200001, 0x22000128, 0x0045044c, 0x00000000 }, + { 0x00800048, 0x24002628, 0x01ed8000, 0x00000544 }, + { 0x00800048, 0x24202628, 0x01ed8020, 0x00000544 }, + { 0x00800048, 0xbc002629, 0x01ed8002, 0x00000546 }, + { 0x00801048, 0xbc202629, 0x01ed8022, 0x00000546 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000126 }, + { 0x00000001, 0x20220169, 0x00000000, 0x00040004 }, + { 0x00200005, 0x24443dad, 0x00459800, 0x00030003 }, + { 0x0020000c, 0x24403dad, 0x00459800, 0x00020002 }, + { 0x01600006, 0x20003dac, 0x02000446, 0x00000000 }, + { 0x00010040, 0x22000c20, 0x02000078, 0x00200000 }, + { 0x00110040, 0x22000c20, 0x02000078, 0x00500000 }, + { 0x00310040, 0x20401da5, 0x02450440, 0xfffffffe }, + { 0x00110001, 0x20480061, 0x02000000, 0x00080008 }, + { 0x00010040, 0x20401da5, 0x02000440, 0xfffffffe }, + { 0x00010001, 0x204401a5, 0x02000442, 0x00000000 }, + { 0x00010001, 0x20480061, 0x02000000, 0x00030008 }, + { 0x01600031, 0x25600021, 0x408d0040, 0x00000200 }, + { 0x00000040, 0x22000c20, 0x00000078, 0x00100010 }, + { 0x0020040c, 0x24403dad, 0x00459800, 0x00030003 }, + { 0x00200805, 0x24483dad, 0x00459800, 0x00070007 }, + { 0x00200001, 0x204001a5, 0x00450440, 0x00000000 }, + { 0x00000009, 0x20403ca5, 0x00000040, 0x00010001 }, + { 0x00000001, 0x20480061, 0x00000000, 0x00020005 }, + { 0x02600031, 0x27000021, 0x408d0040, 0x00000200 }, + { 0x00110001, 0x220001ec, 0x02000000, 0x05820582 }, + { 0x00010001, 0x220001ec, 0x02000000, 0x05620562 }, + { 0x00000001, 0x220e0128, 0x00000454, 0x00000000 }, + { 0x01800006, 0x200035ac, 0x02000446, 0x00000444 }, + { 0x00410001, 0xbc000229, 0x02698000, 0x00000000 }, + { 0x00410001, 0xbc100229, 0x02698010, 0x00000000 }, + { 0x00410001, 0xbc200229, 0x02698020, 0x00000000 }, + { 0x00410001, 0xbc300229, 0x02698030, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000be }, + { 0x00600001, 0x2024018d, 0x008d0200, 0x00000000 }, + { 0x01000041, 0x245e35ad, 0x00000446, 0x00000444 }, + { 0x02000005, 0x20003db0, 0x0200045e, 0x00010001 }, + { 0x00000040, 0x22022d08, 0x00000200, 0x00100010 }, + { 0x00200040, 0x22042d08, 0x00450200, 0x00200020 }, + { 0x00400001, 0x244c0109, 0x00690200, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000044 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000042 }, + { 0x00000040, 0x22003d08, 0x00000200, 0xffdeffde }, + { 0x00000440, 0x22023d08, 0x00000202, 0xffeeffee }, + { 0x00000801, 0x220c0060, 0x00000000, 0x04d004c0 }, + { 0x01000010, 0x20003db0, 0x0000045e, 0x00040004 }, + { 0x00802040, 0x2400462c, 0x00a98000, 0x00a98005 }, + { 0x00802048, 0x24003e2c, 0x00a98001, 0xfffbfffb }, + { 0x00802048, 0x24003e2c, 0x00a98002, 0x00140014 }, + { 0x00802048, 0x24003e2c, 0x00a98003, 0x00140014 }, + { 0x00802048, 0xb8003e2d, 0x00a98004, 0xfffbfffb }, + { 0x00802040, 0x2400462c, 0x00a98040, 0x00a98045 }, + { 0x00802048, 0x24003e2c, 0x00a98041, 0xfffbfffb }, + { 0x00802048, 0x24003e2c, 0x00a98042, 0x00140014 }, + { 0x00802048, 0x24003e2c, 0x00a98043, 0x00140014 }, + { 0x00802048, 0xb8203e2d, 0x00a98044, 0xfffbfffb }, + { 0x00400040, 0x2400462c, 0x00698080, 0x00698085 }, + { 0x00400048, 0x24003e2c, 0x00698081, 0xfffbfffb }, + { 0x00400048, 0x24003e2c, 0x00698082, 0x00140014 }, + { 0x00400048, 0x24003e2c, 0x00698083, 0x00140014 }, + { 0x00400048, 0xb8403e2d, 0x00698084, 0xfffbfffb }, + { 0x00000401, 0x220c0060, 0x00000000, 0x04e004d0 }, + { 0x00000c01, 0x22000060, 0x00000000, 0x04d004c8 }, + { 0x00000c01, 0x22040060, 0x00000000, 0x04e004d8 }, + { 0x00000801, 0x22080060, 0x00000000, 0x04f004e8 }, + { 0x00800040, 0x24003dac, 0x00b104c0, 0x02000200 }, + { 0x00800048, 0x24003dac, 0x00b104e0, 0xfffbfffb }, + { 0x00800048, 0x24003dac, 0x01ed9800, 0x00140014 }, + { 0x00010001, 0x220c0168, 0x00000000, 0x05400540 }, + { 0x00110001, 0x220c0168, 0x00000000, 0x04c004c0 }, + { 0x00800048, 0x24003dac, 0x01e98000, 0xfffbfffb }, + { 0x00800048, 0x24003dac, 0x01e98020, 0x00010001 }, + { 0x00800048, 0x24003dac, 0x01e98800, 0x00140014 }, + { 0x8080000c, 0xd8003d91, 0x00b10400, 0x000a000a }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000060 }, + { 0x01000010, 0x20003db0, 0x00000444, 0x00000000 }, + { 0x01000010, 0x20003db0, 0x02000446, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000022 }, + { 0x00400040, 0x22003d28, 0x0069044c, 0xfffefffe }, + { 0x03400010, 0x20003dac, 0x00000446, 0x00020002 }, + { 0x01000010, 0x20003db0, 0x02000444, 0x00020002 }, + { 0x00410040, 0x22002d08, 0x00690200, 0x00100010 }, + { 0x01000010, 0x20003dac, 0x00000446, 0x00000000 }, + { 0x00010001, 0x220e0168, 0x02000000, 0x05400540 }, + { 0x00110001, 0x220e0168, 0x02000000, 0x04c004c0 }, + { 0x00800040, 0x24003e2c, 0x01e98000, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01e98001, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01e98002, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01e98003, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01e98004, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01e98005, 0x00010001 }, + { 0x8080000c, 0xdc003d91, 0x00b10400, 0x00050005 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000004 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000036 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000036 }, + { 0x01000010, 0x20003db0, 0x00000446, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x03600010, 0x20003dac, 0x02000444, 0x00020002 }, + { 0x00400401, 0x22000128, 0x0069044c, 0x00000000 }, + { 0x00400840, 0x22083d2c, 0x0069044c, 0x00100010 }, + { 0x00610040, 0x22002d08, 0x02690200, 0x00010001 }, + { 0x01000010, 0x20003dac, 0x00000444, 0x00000000 }, + { 0x01000010, 0x20003db0, 0x02000446, 0x00020002 }, + { 0x00800040, 0x24003e2c, 0x01e983e0, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01e98000, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01e98020, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01e993e0, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01e99000, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01e99020, 0x00010001 }, + { 0x00000001, 0x220e0168, 0x00000000, 0x05400540 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000002 }, + { 0x00110001, 0x220e0168, 0x02000000, 0x04c004c0 }, + { 0x8080000c, 0xdc003d91, 0x00b10400, 0x00050005 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000e }, + { 0x00400001, 0x22000128, 0x0069044c, 0x00000000 }, + { 0x01400010, 0x20003dac, 0x00000444, 0x00030003 }, + { 0x01400010, 0x20003dac, 0x02000446, 0x00030003 }, + { 0x00410040, 0x22002d08, 0x00690200, 0x00010001 }, + { 0x00410040, 0x22002d08, 0x02690200, 0x00100010 }, + { 0x00800001, 0x25400229, 0x01e98000, 0x00000000 }, + { 0x80800042, 0x45404631, 0x00d20540, 0x00d204c0 }, + { 0x00000001, 0x220c0128, 0x00000454, 0x00000000 }, + { 0x00400001, 0xd8000231, 0x008a0540, 0x00000000 }, + { 0x00400001, 0xd8100231, 0x008a0548, 0x00000000 }, + { 0x00400001, 0xd8200231, 0x008a0550, 0x00000000 }, + { 0x00400001, 0xd8300231, 0x008a0558, 0x00000000 }, + { 0x00600001, 0x220001ac, 0x008d0024, 0x00000000 }, + { 0x00200040, 0x244c3dad, 0x00450448, 0xfff8fff8 }, + { 0x00000401, 0x220001ec, 0x00000000, 0x07000700 }, + { 0x00000801, 0x220e0128, 0x00000456, 0x00000000 }, + { 0x00000441, 0x254635ad, 0x00000448, 0x0000044a }, + { 0x00000c41, 0x254025ad, 0x0000444c, 0x0000444e }, + { 0x00000c41, 0x254225ad, 0x00000448, 0x0000444e }, + { 0x00000841, 0x254435ad, 0x0000444c, 0x0000044a }, + { 0x00600041, 0x24002628, 0x00898000, 0x00000540 }, + { 0x00600048, 0x24002628, 0x00898002, 0x00000542 }, + { 0x00600048, 0x24002628, 0x00898008, 0x00000544 }, + { 0x00600048, 0x2540262d, 0x0089800a, 0x00000546 }, + { 0x00400401, 0xbc0001a9, 0x00690540, 0x00000000 }, + { 0x00400801, 0xbc1001a9, 0x00690548, 0x00000000 }, + { 0x01000010, 0x20003d2c, 0x00000022, 0x00030003 }, + { 0x01000040, 0x20223d29, 0x02000022, 0xffffffff }, + { 0x00000040, 0x220c3d8c, 0x0000020c, 0x00080008 }, + { 0x00110040, 0x24540c21, 0x00000454, 0x00080008 }, + { 0x00010040, 0x24540c21, 0x00000454, 0x00180038 }, + { 0x00110220, 0x34001c00, 0x02001400, 0xfffffee6 }, + { 0x01800010, 0x20003dac, 0x0200010e, 0x00010001 }, + { 0x00000040, 0x220c3d8c, 0x0000020c, 0xffe0ffe0 }, + { 0x00010001, 0x24540061, 0x02000000, 0x06c00640 }, + { 0x00110001, 0x24540061, 0x02000000, 0x04800780 }, + { 0x00000001, 0x220e0128, 0x00000456, 0x00000000 }, + { 0x00800040, 0x24003dac, 0x00b19c00, 0x00200020 }, + { 0x00800040, 0x24203dac, 0x00b19c20, 0x00200020 }, + { 0x8080000c, 0xdc003d91, 0x00b10400, 0x00060006 }, + { 0x8080000c, 0xdc203d91, 0x00b10420, 0x00060006 }, + { 0x02000040, 0x210e3d29, 0x0200010e, 0xffffffff }, + { 0x00000040, 0x220c3d8c, 0x0000020c, 0x00040004 }, + { 0x00110220, 0x34001c00, 0x02001400, 0xfffffcf8 }, + { 0x01000005, 0x25643e2d, 0x00000060, 0x00c000c0 }, + { 0x01000010, 0x20003dac, 0x02000458, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000c }, + { 0x01000010, 0x20003dac, 0x00000458, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000086 }, + { 0x00a02001, 0x46400231, 0x00d20780, 0x00000000 }, + { 0x00a02001, 0x46800231, 0x00d207c0, 0x00000000 }, + { 0x00a02001, 0x46c00231, 0x00d20480, 0x00000000 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000007e }, + { 0x80a02042, 0x46404631, 0x00d20640, 0x00d20780 }, + { 0x80a02042, 0x46804631, 0x00d20680, 0x00d207c0 }, + { 0x80a02042, 0x46c04631, 0x00d206c0, 0x00d20480 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000076 }, + { 0x01000010, 0x20003dac, 0x02000564, 0x00800080 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x0000000e }, + { 0x01000010, 0x20003dac, 0x00000458, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0xffffffe4 }, + { 0x00200401, 0x256801ed, 0x00000000, 0x00200020 }, + { 0x00200801, 0x256c01ed, 0x00000000, 0x00060006 }, + { 0x00400001, 0x258001ed, 0x00000000, 0x00000000 }, + { 0x00600001, 0x45a001ad, 0x00058c00, 0x00000000 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000028 }, + { 0x02600005, 0x20006e28, 0x02008c0c, 0x88848421 }, + { 0x0220000c, 0x25663dad, 0x00000458, 0x00010001 }, + { 0x0000000c, 0x25643dad, 0x00000564, 0x00060006 }, + { 0x00310001, 0x25c401ad, 0x00000458, 0x00000000 }, + { 0x00210001, 0x25c00061, 0x00000000, 0x00010001 }, + { 0x00310040, 0x25c03dad, 0x004545c4, 0x00010001 }, + { 0x00610001, 0x25a00061, 0x02000000, 0x00000080 }, + { 0x00710001, 0x45a002ad, 0x02ae8c00, 0x00000000 }, + { 0x00710001, 0x45a202ad, 0x02ae8c01, 0x00000000 }, + { 0x00800041, 0x25a035ad, 0x00b105a0, 0x000905c0 }, + { 0x01200010, 0x20003e2c, 0x0245006e, 0x00000000 }, + { 0x00310009, 0x244c45ad, 0x02000564, 0x0045006e }, + { 0x00210001, 0x244c01ed, 0x02000000, 0x00000000 }, + { 0x0031000c, 0x244c3dad, 0x0245044c, 0x00010001 }, + { 0x00200009, 0x256835ad, 0x0045044c, 0x00000566 }, + { 0x00210040, 0x256835ad, 0x02450568, 0x00000566 }, + { 0x00200040, 0x256c362d, 0x0045006e, 0x00000566 }, + { 0x00400040, 0x240035ac, 0x00ab05a2, 0x00ab05a6 }, + { 0x00400040, 0x2400358c, 0x00690400, 0x00000566 }, + { 0x0040000c, 0x2580358d, 0x00690400, 0x00000566 }, + { 0x00800041, 0x2400362c, 0x00d20640, 0x000005a0 }, + { 0x00800041, 0x2420362c, 0x00d20660, 0x000005a0 }, + { 0x00800048, 0x2400362c, 0x00d20780, 0x000005a4 }, + { 0x00800048, 0x2420362c, 0x00d207a0, 0x000005a4 }, + { 0x00800040, 0x2400358c, 0x00b10400, 0x00000568 }, + { 0x00800040, 0x2420358c, 0x00b10420, 0x00000568 }, + { 0x0080000c, 0x24c0358d, 0x00b10400, 0x0000056c }, + { 0x0080000c, 0x24e0358d, 0x00b10420, 0x0000056c }, + { 0x80800040, 0x464035b1, 0x00b104c0, 0x00000580 }, + { 0x80800040, 0x466035b1, 0x00b104e0, 0x00000580 }, + { 0x00800041, 0x2400362c, 0x00d20680, 0x000005a0 }, + { 0x00800041, 0x2420362c, 0x00d206a0, 0x000005a0 }, + { 0x00800048, 0x2400362c, 0x00d207c0, 0x000005a4 }, + { 0x00800048, 0x2420362c, 0x00d207e0, 0x000005a4 }, + { 0x00800040, 0x2400358c, 0x00b10400, 0x00000568 }, + { 0x00800040, 0x2420358c, 0x00b10420, 0x00000568 }, + { 0x0080000c, 0x24c0358d, 0x00b10400, 0x0000056c }, + { 0x0080000c, 0x24e0358d, 0x00b10420, 0x0000056c }, + { 0x80800040, 0x468035b1, 0x00b104c0, 0x00000580 }, + { 0x80800040, 0x46a035b1, 0x00b104e0, 0x00000580 }, + { 0x00800041, 0x2400362c, 0x00d206c0, 0x000705a8 }, + { 0x00800041, 0x2420362c, 0x00d206e0, 0x000705a8 }, + { 0x00800048, 0x2400362c, 0x00d20480, 0x000705ac }, + { 0x00800048, 0x2420362c, 0x00d204a0, 0x000705ac }, + { 0x00800040, 0x2400358c, 0x00b10400, 0x0000056a }, + { 0x00800040, 0x2420358c, 0x00b10420, 0x0000056a }, + { 0x0080000c, 0x24c0358d, 0x00b10400, 0x0000056e }, + { 0x0080000c, 0x24e0358d, 0x00b10420, 0x0000056e }, + { 0x80800040, 0x46c035b1, 0x00b104c0, 0x00050582 }, + { 0x80800040, 0x46e035b1, 0x00b104e0, 0x00050582 }, + { 0x01800005, 0x20003d2c, 0x02000020, 0x00020002 }, + { 0x80800040, 0xd00045b1, 0x00b19000, 0x00d20640 }, + { 0x80800040, 0xd02045b1, 0x00b19020, 0x00d20660 }, + { 0x80800040, 0xd04045b1, 0x00b19040, 0x00d20680 }, + { 0x80800040, 0xd06045b1, 0x00b19060, 0x00d206a0 }, + { 0x00000040, 0x22083d8c, 0x00000208, 0x00800080 }, + { 0x80400040, 0xd40045b1, 0x00699400, 0x00ab06c0 }, + { 0x80400040, 0xd48045b1, 0x00699480, 0x00ab06c2 }, + { 0x80400040, 0xd42045b1, 0x00699420, 0x00ab06e0 }, + { 0x80400040, 0xd4a045b1, 0x006994a0, 0x00ab06e2 }, + { 0x80400040, 0xd41045b1, 0x00699410, 0x00ab06d0 }, + { 0x80400040, 0xd49045b1, 0x00699490, 0x00ab06d2 }, + { 0x80400040, 0xd43045b1, 0x00699430, 0x00ab06f0 }, + { 0x80400040, 0xd4b045b1, 0x006994b0, 0x00ab06f2 }, + { 0x00000040, 0x220a3d8c, 0x0000020a, 0x00080008 }, + { 0x00110040, 0x220a3d8c, 0x0200020a, 0x00300030 }, + { 0x01000010, 0x20003d2c, 0x02000020, 0x00060006 }, + { 0x00000040, 0x20203d29, 0x00000020, 0x00020002 }, + { 0x00000040, 0x22040c00, 0x00000204, 0x00100001 }, + { 0x00000040, 0x220c358c, 0x0000020c, 0x0000003a }, + { 0x00110220, 0x34001c00, 0x02001400, 0xfffffc36 }, + { 0x00000001, 0x220001ec, 0x00000000, 0x01400140 }, + { 0x00000001, 0x220201ec, 0x00000000, 0x01c001c0 }, + { 0x00800401, 0x20400236, 0x01ee8000, 0x00000000 }, + { 0x00800801, 0x20500236, 0x01ee8010, 0x00000000 }, + { 0x00800401, 0x20600236, 0x01ee8020, 0x00000000 }, + { 0x00800801, 0x20700236, 0x01ee8030, 0x00000000 }, + { 0x00800401, 0x20800236, 0x01ee8040, 0x00000000 }, + { 0x00800801, 0x20900236, 0x01ee8050, 0x00000000 }, + { 0x00800401, 0x20a00236, 0x01ee8060, 0x00000000 }, + { 0x00800801, 0x20b00236, 0x01ee8070, 0x00000000 }, + { 0x00800401, 0x20c00236, 0x01ee8100, 0x00000000 }, + { 0x00800801, 0x20d00236, 0x01ee8110, 0x00000000 }, + { 0x00800401, 0x20e00236, 0x01ee8120, 0x00000000 }, + { 0x00800801, 0x20f00236, 0x01ee8130, 0x00000000 }, + { 0x00800401, 0x21000236, 0x01ee8140, 0x00000000 }, + { 0x00800801, 0x21100236, 0x01ee8150, 0x00000000 }, + { 0x00800401, 0x21200236, 0x01ee8160, 0x00000000 }, + { 0x00800801, 0x21300236, 0x01ee8170, 0x00000000 }, + { 0x00200401, 0x204001a5, 0x00450064, 0x00000000 }, + { 0x00000801, 0x20480061, 0x00000000, 0x000f000f }, + { 0x01600031, 0x21401c21, 0x508d0040, 0x1218a000 }, + { 0x00000001, 0x220001ec, 0x00000000, 0x03400340 }, + { 0x00800401, 0x41600236, 0x00d28000, 0x00000000 }, + { 0x00800801, 0x41610236, 0x00d28080, 0x00000000 }, + { 0x00800401, 0x41800236, 0x00d28020, 0x00000000 }, + { 0x00800801, 0x41810236, 0x00d280a0, 0x00000000 }, + { 0x00800401, 0x41a00236, 0x00d28040, 0x00000000 }, + { 0x00800801, 0x41a10236, 0x00d280c0, 0x00000000 }, + { 0x00800401, 0x41c00236, 0x00d28060, 0x00000000 }, + { 0x00800801, 0x41c10236, 0x00d280e0, 0x00000000 }, + { 0x0000040c, 0x20443ca5, 0x00000044, 0x00010001 }, + { 0x00000801, 0x20480061, 0x00000000, 0x0007000f }, + { 0x0a600031, 0x21601c21, 0x508d0040, 0x0a18a001 }, + { 0x00000001, 0x21400021, 0x00000140, 0x00000000 }, + { 0x00000001, 0x21600021, 0x00000160, 0x00000000 }, + { 0x01600031, 0x20001c20, 0x708d0000, 0x82000010 }, + { 0x00600001, 0x20400021, 0x008d0000, 0x00000000 }, + { 0x00000005, 0x20203e2d, 0x00000061, 0x001f001f }, + { 0x00200009, 0x20643e2d, 0x00450064, 0x00040004 }, + { 0x00000001, 0x203a01ed, 0x00000000, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000020, 0x00160016 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000001e }, + { 0x01200010, 0x20003e2c, 0x0200006c, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000024 }, + { 0x00800009, 0x25403dad, 0x00050064, 0x00020002 }, + { 0x00000001, 0x203a01ed, 0x00000000, 0x00180018 }, + { 0x00200040, 0x45483dad, 0x00660548, 0x00100010 }, + { 0x00200040, 0x45523dad, 0x00660552, 0x00100010 }, + { 0x00400040, 0x25583dad, 0x00690558, 0x00100010 }, + { 0x00800040, 0x208035ad, 0x00b10080, 0x00b10540 }, + { 0x00600040, 0x45403dad, 0x00ae0540, 0x00200020 }, + { 0x00800040, 0x20a035ad, 0x00b100a0, 0x00b10540 }, + { 0x00600040, 0x45423dad, 0x00ae0542, 0x00200020 }, + { 0x00800040, 0x20e035ad, 0x00b100e0, 0x00b10540 }, + { 0x00600040, 0x45403dad, 0x00ae0540, 0xffe0ffe0 }, + { 0x00800040, 0x20c035ad, 0x00b100c0, 0x00b10540 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000014 }, + { 0x06600010, 0x20003dac, 0x02000020, 0x00030003 }, + { 0x00000001, 0x206c0171, 0x00000000, 0x00000000 }, + { 0x00610001, 0x208000a5, 0x02050080, 0x00000000 }, + { 0x00610001, 0x212000a5, 0x02090100, 0x00000000 }, + { 0x00410001, 0x211000a5, 0x02690100, 0x00000000 }, + { 0x00200009, 0x25403dad, 0x00450064, 0x00020002 }, + { 0x00800040, 0x208035ad, 0x00b10080, 0x00050540 }, + { 0x00200040, 0x40883dad, 0x00660088, 0x00200020 }, + { 0x00200040, 0x40923dad, 0x00660092, 0x00200020 }, + { 0x00400040, 0x20983dad, 0x00690098, 0x00200020 }, + { 0x00200401, 0x22080060, 0x00000000, 0x03400140 }, + { 0x00000c01, 0x220c0060, 0x00000000, 0x04400080 }, + { 0x00000801, 0x22040060, 0x00000000, 0x01000070 }, + { 0x00000005, 0x203e2e29, 0x00000063, 0x00010001 }, + { 0x00000001, 0x20200169, 0x00000000, 0x00000000 }, + { 0x0000000c, 0x2458262d, 0x0000006d, 0x00000020 }, + { 0x00000001, 0x210e0169, 0x00000000, 0x00010001 }, + { 0x00000005, 0x24583dad, 0x00000458, 0x00030003 }, + { 0x01000010, 0x200035ac, 0x0000010e, 0x00000458 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000316 }, + { 0x01000010, 0x20003dac, 0x0200010e, 0x00010001 }, + { 0x00010401, 0x24540061, 0x02000000, 0x06c00640 }, + { 0x00010805, 0x245a3e2d, 0x02008800, 0x007f007f }, + { 0x00110401, 0x24540061, 0x02000000, 0x04800780 }, + { 0x00110805, 0x245a3e2d, 0x02008804, 0x007f007f }, + { 0x00010005, 0x245c3e2d, 0x02008800, 0x00800080 }, + { 0x00110005, 0x245c3e2d, 0x02008804, 0x00800080 }, + { 0x00000009, 0x245c3dad, 0x0000045c, 0x00010001 }, + { 0x0000000c, 0x211e362d, 0x0000006c, 0x00000020 }, + { 0x00000040, 0x240035ac, 0x0000003e, 0x0000045c }, + { 0x01000010, 0x20003d8c, 0x00210400, 0x00010001 }, + { 0x01000010, 0x20003d8c, 0x02210400, 0x01000100 }, + { 0x00000001, 0x203c01ed, 0x00000000, 0x00000000 }, + { 0x00010001, 0x203c01ed, 0x00000000, 0x00020002 }, + { 0x00010001, 0x203c01ed, 0x02000000, 0xfffefffe }, + { 0x00000040, 0x20780d21, 0x0000045a, 0x0208e602 }, + { 0x00000040, 0x20782421, 0x00000078, 0x0000045c }, + { 0x02000005, 0x20003dac, 0x0200011e, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000001c0 }, + { 0x01000005, 0x20003dac, 0x00009800, 0x00030003 }, + { 0x00200005, 0x24443dad, 0x00459800, 0x00030003 }, + { 0x0020000c, 0x24403dad, 0x00459800, 0x00020002 }, + { 0x01600006, 0x20003dac, 0x02000446, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000012 }, + { 0x00010040, 0x22000c20, 0x02000078, 0x00400000 }, + { 0x00110040, 0x22000c20, 0x02000078, 0x00700000 }, + { 0x00310040, 0x20401da5, 0x02450440, 0xfffffffe }, + { 0x00110001, 0x20480061, 0x02000000, 0x000c000c }, + { 0x00010040, 0x20401da5, 0x02000440, 0xfffffffe }, + { 0x00010001, 0x204401a5, 0x02000442, 0x00000000 }, + { 0x00010001, 0x20480061, 0x02000000, 0x0007000c }, + { 0x01600031, 0x25600021, 0x408d0040, 0x00000200 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00010040, 0x22000c20, 0x02000078, 0x00200000 }, + { 0x00110040, 0x22000c20, 0x02000078, 0x00400000 }, + { 0x00200001, 0x204001a5, 0x00450440, 0x00000000 }, + { 0x00110040, 0x20441da5, 0x02000442, 0xfffffffe }, + { 0x00110001, 0x20480061, 0x02000000, 0x000c0007 }, + { 0x00010001, 0x20480061, 0x02000000, 0x00070007 }, + { 0x01600031, 0x25600021, 0x408d0040, 0x00000200 }, + { 0x00000040, 0xb80235ad, 0x00009802, 0x0000003c }, + { 0x0020040c, 0x24403dad, 0x00459800, 0x00030003 }, + { 0x00200805, 0x24483dad, 0x00459800, 0x00070007 }, + { 0x01600006, 0x20003dac, 0x0000044a, 0x00000000 }, + { 0x00200001, 0x204001a5, 0x00450440, 0x00000000 }, + { 0x00000009, 0x20403ca5, 0x00000040, 0x00010001 }, + { 0x00010040, 0x22000c20, 0x00000078, 0x00200010 }, + { 0x00110040, 0x22000c20, 0x00000078, 0x00300010 }, + { 0x00010001, 0x20480061, 0x00000000, 0x00030009 }, + { 0x00110001, 0x20480061, 0x00000000, 0x00040009 }, + { 0x02600031, 0x27000021, 0x408d0040, 0x00000200 }, + { 0x01000005, 0x20003dac, 0x00009800, 0x00030003 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000001a }, + { 0x00600001, 0x26220231, 0x008d05c0, 0x00000000 }, + { 0x00600401, 0x26120231, 0x008d05b8, 0x00000000 }, + { 0x00600801, 0x26020231, 0x008d05b0, 0x00000000 }, + { 0x00600401, 0x25f20231, 0x008d05a8, 0x00000000 }, + { 0x00600801, 0x25e20231, 0x008d05a0, 0x00000000 }, + { 0x00600401, 0x25d20231, 0x008d0598, 0x00000000 }, + { 0x00600801, 0x25c20231, 0x008d0590, 0x00000000 }, + { 0x00600401, 0x25b20231, 0x008d0588, 0x00000000 }, + { 0x00600801, 0x25a20231, 0x008d0580, 0x00000000 }, + { 0x00600401, 0x25920231, 0x008d0578, 0x00000000 }, + { 0x00600801, 0x25820231, 0x008d0570, 0x00000000 }, + { 0x00600001, 0x25720231, 0x008d0568, 0x00000000 }, + { 0x00600001, 0x25620231, 0x008d0560, 0x00000000 }, + { 0x00110001, 0x220001ec, 0x02000000, 0x05820582 }, + { 0x00010001, 0x220001ec, 0x02000000, 0x05620562 }, + { 0x00000001, 0x220e0128, 0x00000454, 0x00000000 }, + { 0x01800006, 0x200035ac, 0x02000446, 0x00000444 }, + { 0x00810001, 0xbc000229, 0x02ad8000, 0x00000000 }, + { 0x00810001, 0xbc200229, 0x02ad8020, 0x00000000 }, + { 0x00810001, 0xbc400229, 0x02ad8040, 0x00000000 }, + { 0x00810001, 0xbc600229, 0x02ad8060, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000012a }, + { 0x00600001, 0x2024018d, 0x008d0200, 0x00000000 }, + { 0x01000041, 0x245e35ad, 0x00000446, 0x00000444 }, + { 0x00000040, 0x22022d08, 0x00000200, 0x00100010 }, + { 0x02000005, 0x20003db0, 0x0200045e, 0x00010001 }, + { 0x00200040, 0x22042d08, 0x00450200, 0x00200020 }, + { 0x00400001, 0x244c0109, 0x00690200, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000066 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000064 }, + { 0x00000040, 0x22003d08, 0x00000200, 0xffdeffde }, + { 0x00000440, 0x22023d08, 0x00000202, 0xffeeffee }, + { 0x00000801, 0x220c0060, 0x00000000, 0x04a00480 }, + { 0x01000010, 0x20003db0, 0x0000045e, 0x00040004 }, + { 0x00a02040, 0x2400462c, 0x00ad8000, 0x00ad8005 }, + { 0x00a02048, 0x24003e2c, 0x00ad8001, 0xfffbfffb }, + { 0x00a02048, 0x24003e2c, 0x00ad8002, 0x00140014 }, + { 0x00a02048, 0x24003e2c, 0x00ad8003, 0x00140014 }, + { 0x00a02048, 0xb8003e2d, 0x00ad8004, 0xfffbfffb }, + { 0x00a02040, 0x2400462c, 0x00ad8040, 0x00ad8045 }, + { 0x00a02048, 0x24003e2c, 0x00ad8041, 0xfffbfffb }, + { 0x00a02048, 0x24003e2c, 0x00ad8042, 0x00140014 }, + { 0x00a02048, 0x24003e2c, 0x00ad8043, 0x00140014 }, + { 0x00a02048, 0xb8403e2d, 0x00ad8044, 0xfffbfffb }, + { 0x00a02040, 0x2400462c, 0x00ad8080, 0x00ad8085 }, + { 0x00a02048, 0x24003e2c, 0x00ad8081, 0xfffbfffb }, + { 0x00a02048, 0x24003e2c, 0x00ad8082, 0x00140014 }, + { 0x00a02048, 0x24003e2c, 0x00ad8083, 0x00140014 }, + { 0x00a02048, 0xb8803e2d, 0x00ad8084, 0xfffbfffb }, + { 0x00600040, 0x2400462c, 0x008d80c0, 0x008d80c5 }, + { 0x00600048, 0x24003e2c, 0x008d80c1, 0xfffbfffb }, + { 0x00600048, 0x24003e2c, 0x008d80c2, 0x00140014 }, + { 0x00600048, 0x24003e2c, 0x008d80c3, 0x00140014 }, + { 0x00600048, 0xb8c03e2d, 0x008d80c4, 0xfffbfffb }, + { 0x00000401, 0x22000060, 0x00000000, 0x04a00480 }, + { 0x00000c01, 0x22040060, 0x00000000, 0x04a00490 }, + { 0x00010802, 0x220c2d28, 0x00000454, 0x04800480 }, + { 0x00a02040, 0x24003dac, 0x00b18000, 0x02000200 }, + { 0x00800048, 0x24003dac, 0x01ed8800, 0xfffbfffb }, + { 0x00800048, 0x24203dac, 0x01ed8820, 0xfffbfffb }, + { 0x00a02048, 0x24003dac, 0x00b18020, 0x00140014 }, + { 0x00800048, 0x24003dac, 0x01ed8820, 0x00140014 }, + { 0x00800048, 0x24203dac, 0x01ed8840, 0x00140014 }, + { 0x00a02048, 0x24003dac, 0x00b18040, 0xfffbfffb }, + { 0x00800048, 0x24003dac, 0x01ed8840, 0x00010001 }, + { 0x00800048, 0x24203dac, 0x01ed8860, 0x00010001 }, + { 0x8080000c, 0xd8003d91, 0x00b10400, 0x000a000a }, + { 0x8080100c, 0xd8203d91, 0x00b10420, 0x000a000a }, + { 0x00a02040, 0x24003dac, 0x00b18040, 0x02000200 }, + { 0x00800048, 0x24003dac, 0x01ed8840, 0xfffbfffb }, + { 0x00800048, 0x24203dac, 0x01ed8860, 0xfffbfffb }, + { 0x00a02048, 0x24003dac, 0x00b18060, 0x00140014 }, + { 0x00800048, 0x24003dac, 0x01ed8860, 0x00140014 }, + { 0x00800048, 0x24203dac, 0x01ed8880, 0x00140014 }, + { 0x00a02048, 0x24003dac, 0x00b18080, 0xfffbfffb }, + { 0x00800048, 0x24003dac, 0x01ed8880, 0x00010001 }, + { 0x00800048, 0x24203dac, 0x01ed88a0, 0x00010001 }, + { 0x8080000c, 0xd8403d91, 0x00b10400, 0x000a000a }, + { 0x8080100c, 0xd8603d91, 0x00b10420, 0x000a000a }, + { 0x00010220, 0x34001c00, 0x00001400, 0x000000b4 }, + { 0x01000010, 0x20003db0, 0x00000444, 0x00000000 }, + { 0x01000010, 0x20003db0, 0x02000446, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000004c }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000004a }, + { 0x00400040, 0x22003d28, 0x0069044c, 0xfffefffe }, + { 0x03400010, 0x20003dac, 0x00000446, 0x00020002 }, + { 0x01000010, 0x20003db0, 0x02000444, 0x00020002 }, + { 0x00410040, 0x22002d08, 0x00690200, 0x00100010 }, + { 0x01000010, 0x20003dac, 0x00000446, 0x00000000 }, + { 0x00010002, 0x220c2d28, 0x02000454, 0x04800480 }, + { 0x00800040, 0x24003e2c, 0x01ed8000, 0x00100010 }, + { 0x00800040, 0x24203e2c, 0x01ed8020, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01ed8001, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8021, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8002, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8022, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8003, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8023, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8004, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8024, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8005, 0x00010001 }, + { 0x00800048, 0x24203e2c, 0x01ed8025, 0x00010001 }, + { 0x8080000c, 0xd8003d91, 0x00b10400, 0x00050005 }, + { 0x8080100c, 0xd8203d91, 0x00b10420, 0x00050005 }, + { 0x00800040, 0x24003e2c, 0x01ed8040, 0x00100010 }, + { 0x00800040, 0x24203e2c, 0x01ed8060, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01ed8041, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8061, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8042, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8062, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8043, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8063, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8044, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8064, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8045, 0x00010001 }, + { 0x00800048, 0x24203e2c, 0x01ed8065, 0x00010001 }, + { 0x8080000c, 0xd8403d91, 0x00b10400, 0x00050005 }, + { 0x8080100c, 0xd8603d91, 0x00b10420, 0x00050005 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000004 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000005c }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000062 }, + { 0x01000010, 0x20003db0, 0x00000446, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000042 }, + { 0x00200401, 0x22000128, 0x0066044c, 0x00000000 }, + { 0x00200c01, 0x22040128, 0x0045044e, 0x00000000 }, + { 0x00000801, 0x220c0128, 0x00000454, 0x00000000 }, + { 0x03400010, 0x20003dac, 0x02000444, 0x00020002 }, + { 0x01000010, 0x20003dac, 0x00000444, 0x00000000 }, + { 0x00410040, 0x22002d08, 0x02690200, 0x00010001 }, + { 0x01000010, 0x20003db0, 0x02000446, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000002 }, + { 0x00110001, 0x220c0168, 0x02000000, 0x04800480 }, + { 0x00a02040, 0x24003e2c, 0x00ad83e0, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01ed8be0, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8800, 0xfffbfffb }, + { 0x00a02048, 0x24003e2c, 0x00ad8000, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8800, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8820, 0x00140014 }, + { 0x00a02048, 0x24003e2c, 0x00ad8020, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8820, 0x00010001 }, + { 0x00800048, 0x24203e2c, 0x01ed8840, 0x00010001 }, + { 0x8080000c, 0xd8003d91, 0x00b10400, 0x00050005 }, + { 0x8080100c, 0xd8203d91, 0x00b10420, 0x00050005 }, + { 0x00a02040, 0x24003e2c, 0x00ad8020, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01ed8820, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8840, 0xfffbfffb }, + { 0x00a02048, 0x24003e2c, 0x00ad8040, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8840, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8860, 0x00140014 }, + { 0x00a02048, 0x24003e2c, 0x00ad8060, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8860, 0x00010001 }, + { 0x00800048, 0x24203e2c, 0x01ed8880, 0x00010001 }, + { 0x8080000c, 0xd8403d91, 0x00b10400, 0x00050005 }, + { 0x8080100c, 0xd8603d91, 0x00b10420, 0x00050005 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001c }, + { 0x00200401, 0x22000128, 0x0045044c, 0x00000000 }, + { 0x00000801, 0x220c0128, 0x00000454, 0x00000000 }, + { 0x01200010, 0x20003dac, 0x00000444, 0x00030003 }, + { 0x01200010, 0x20003dac, 0x02000446, 0x00030003 }, + { 0x00210040, 0x22002d08, 0x00450200, 0x00010001 }, + { 0x00210040, 0x22002d08, 0x02450200, 0x00100010 }, + { 0x00800001, 0xb8000229, 0x01ed8000, 0x00000000 }, + { 0x00800001, 0xb8200229, 0x01ed8020, 0x00000000 }, + { 0x00800001, 0xb8400229, 0x01ed8040, 0x00000000 }, + { 0x00800001, 0xb8600229, 0x01ed8060, 0x00000000 }, + { 0x80800042, 0xd8004631, 0x00d29800, 0x00d20480 }, + { 0x80800042, 0xd8204631, 0x00d29820, 0x00d204a0 }, + { 0x80800042, 0xd8404631, 0x00d29840, 0x00d204c0 }, + { 0x80800042, 0xd8604631, 0x00d29860, 0x00d204e0 }, + { 0x00600001, 0x220001ac, 0x008d0024, 0x00000000 }, + { 0x00200040, 0x244c3dad, 0x00450448, 0xfff8fff8 }, + { 0x00000401, 0x220001ec, 0x00000000, 0x07000700 }, + { 0x00000c01, 0x220201e8, 0x00000000, 0x07100710 }, + { 0x00000801, 0x220e0128, 0x00000456, 0x00000000 }, + { 0x00000441, 0x254635ad, 0x00000448, 0x0000044a }, + { 0x00000c41, 0x254025ad, 0x0000444c, 0x0000444e }, + { 0x00000c41, 0x254225ad, 0x00000448, 0x0000444e }, + { 0x00000841, 0x254435ad, 0x0000444c, 0x0000044a }, + { 0x00200040, 0x244c3d09, 0x00450200, 0x00100010 }, + { 0x00800041, 0x24002628, 0x00ad8000, 0x00000540 }, + { 0x00800041, 0x24202628, 0x00ad8020, 0x00000540 }, + { 0x00800048, 0x24002628, 0x00ad8002, 0x00000542 }, + { 0x00800048, 0x24202628, 0x00ad8022, 0x00000542 }, + { 0x00200001, 0x22000128, 0x0045044c, 0x00000000 }, + { 0x00800048, 0x24002628, 0x01ed8000, 0x00000544 }, + { 0x00800048, 0x24202628, 0x01ed8020, 0x00000544 }, + { 0x00800048, 0xbc002629, 0x01ed8002, 0x00000546 }, + { 0x00801048, 0xbc202629, 0x01ed8022, 0x00000546 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000128 }, + { 0x00000001, 0x20220169, 0x00000000, 0x00040004 }, + { 0x00200005, 0x24443dad, 0x00459800, 0x00030003 }, + { 0x0020000c, 0x24403dad, 0x00459800, 0x00020002 }, + { 0x01600006, 0x20003dac, 0x02000446, 0x00000000 }, + { 0x00010040, 0x22000c20, 0x02000078, 0x00200000 }, + { 0x00110040, 0x22000c20, 0x02000078, 0x00500000 }, + { 0x00310040, 0x20401da5, 0x02450440, 0xfffffffe }, + { 0x00110001, 0x20480061, 0x02000000, 0x00080008 }, + { 0x00010040, 0x20401da5, 0x02000440, 0xfffffffe }, + { 0x00010001, 0x204401a5, 0x02000442, 0x00000000 }, + { 0x00010001, 0x20480061, 0x02000000, 0x00030008 }, + { 0x01600031, 0x25600021, 0x408d0040, 0x00000200 }, + { 0x00000040, 0xb80235ad, 0x00009802, 0x0000003c }, + { 0x00000040, 0x22000c20, 0x00000078, 0x00100010 }, + { 0x0020040c, 0x24403dad, 0x00459800, 0x00030003 }, + { 0x00200805, 0x24483dad, 0x00459800, 0x00070007 }, + { 0x00200001, 0x204001a5, 0x00450440, 0x00000000 }, + { 0x00000009, 0x20403ca5, 0x00000040, 0x00010001 }, + { 0x00000001, 0x20480061, 0x00000000, 0x00020005 }, + { 0x02600031, 0x27000021, 0x408d0040, 0x00000200 }, + { 0x00110001, 0x220001ec, 0x02000000, 0x05820582 }, + { 0x00010001, 0x220001ec, 0x02000000, 0x05620562 }, + { 0x00000001, 0x220e0128, 0x00000454, 0x00000000 }, + { 0x01800006, 0x200035ac, 0x02000446, 0x00000444 }, + { 0x00410001, 0xbc000229, 0x02698000, 0x00000000 }, + { 0x00410001, 0xbc100229, 0x02698010, 0x00000000 }, + { 0x00410001, 0xbc200229, 0x02698020, 0x00000000 }, + { 0x00410001, 0xbc300229, 0x02698030, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000be }, + { 0x00600001, 0x2024018d, 0x008d0200, 0x00000000 }, + { 0x01000041, 0x245e35ad, 0x00000446, 0x00000444 }, + { 0x02000005, 0x20003db0, 0x0200045e, 0x00010001 }, + { 0x00000040, 0x22022d08, 0x00000200, 0x00100010 }, + { 0x00200040, 0x22042d08, 0x00450200, 0x00200020 }, + { 0x00400001, 0x244c0109, 0x00690200, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000044 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000042 }, + { 0x00000040, 0x22003d08, 0x00000200, 0xffdeffde }, + { 0x00000440, 0x22023d08, 0x00000202, 0xffeeffee }, + { 0x00000801, 0x220c0060, 0x00000000, 0x04d004c0 }, + { 0x01000010, 0x20003db0, 0x0000045e, 0x00040004 }, + { 0x00802040, 0x2400462c, 0x00a98000, 0x00a98005 }, + { 0x00802048, 0x24003e2c, 0x00a98001, 0xfffbfffb }, + { 0x00802048, 0x24003e2c, 0x00a98002, 0x00140014 }, + { 0x00802048, 0x24003e2c, 0x00a98003, 0x00140014 }, + { 0x00802048, 0xb8003e2d, 0x00a98004, 0xfffbfffb }, + { 0x00802040, 0x2400462c, 0x00a98040, 0x00a98045 }, + { 0x00802048, 0x24003e2c, 0x00a98041, 0xfffbfffb }, + { 0x00802048, 0x24003e2c, 0x00a98042, 0x00140014 }, + { 0x00802048, 0x24003e2c, 0x00a98043, 0x00140014 }, + { 0x00802048, 0xb8203e2d, 0x00a98044, 0xfffbfffb }, + { 0x00400040, 0x2400462c, 0x00698080, 0x00698085 }, + { 0x00400048, 0x24003e2c, 0x00698081, 0xfffbfffb }, + { 0x00400048, 0x24003e2c, 0x00698082, 0x00140014 }, + { 0x00400048, 0x24003e2c, 0x00698083, 0x00140014 }, + { 0x00400048, 0xb8403e2d, 0x00698084, 0xfffbfffb }, + { 0x00000401, 0x220c0060, 0x00000000, 0x04e004d0 }, + { 0x00000c01, 0x22000060, 0x00000000, 0x04d004c8 }, + { 0x00000c01, 0x22040060, 0x00000000, 0x04e004d8 }, + { 0x00000801, 0x22080060, 0x00000000, 0x04f004e8 }, + { 0x00800040, 0x24003dac, 0x00b104c0, 0x02000200 }, + { 0x00800048, 0x24003dac, 0x00b104e0, 0xfffbfffb }, + { 0x00800048, 0x24003dac, 0x01ed9800, 0x00140014 }, + { 0x00010001, 0x220c0168, 0x00000000, 0x05400540 }, + { 0x00110001, 0x220c0168, 0x00000000, 0x04c004c0 }, + { 0x00800048, 0x24003dac, 0x01e98000, 0xfffbfffb }, + { 0x00800048, 0x24003dac, 0x01e98020, 0x00010001 }, + { 0x00800048, 0x24003dac, 0x01e98800, 0x00140014 }, + { 0x8080000c, 0xd8003d91, 0x00b10400, 0x000a000a }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000060 }, + { 0x01000010, 0x20003db0, 0x00000444, 0x00000000 }, + { 0x01000010, 0x20003db0, 0x02000446, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000022 }, + { 0x00400040, 0x22003d28, 0x0069044c, 0xfffefffe }, + { 0x03400010, 0x20003dac, 0x00000446, 0x00020002 }, + { 0x01000010, 0x20003db0, 0x02000444, 0x00020002 }, + { 0x00410040, 0x22002d08, 0x00690200, 0x00100010 }, + { 0x01000010, 0x20003dac, 0x00000446, 0x00000000 }, + { 0x00010001, 0x220e0168, 0x02000000, 0x05400540 }, + { 0x00110001, 0x220e0168, 0x02000000, 0x04c004c0 }, + { 0x00800040, 0x24003e2c, 0x01e98000, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01e98001, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01e98002, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01e98003, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01e98004, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01e98005, 0x00010001 }, + { 0x8080000c, 0xdc003d91, 0x00b10400, 0x00050005 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000004 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000036 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000036 }, + { 0x01000010, 0x20003db0, 0x00000446, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x03600010, 0x20003dac, 0x02000444, 0x00020002 }, + { 0x00400401, 0x22000128, 0x0069044c, 0x00000000 }, + { 0x00400840, 0x22083d2c, 0x0069044c, 0x00100010 }, + { 0x00610040, 0x22002d08, 0x02690200, 0x00010001 }, + { 0x01000010, 0x20003dac, 0x00000444, 0x00000000 }, + { 0x01000010, 0x20003db0, 0x02000446, 0x00020002 }, + { 0x00800040, 0x24003e2c, 0x01e983e0, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01e98000, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01e98020, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01e993e0, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01e99000, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01e99020, 0x00010001 }, + { 0x00000001, 0x220e0168, 0x00000000, 0x05400540 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000002 }, + { 0x00110001, 0x220e0168, 0x02000000, 0x04c004c0 }, + { 0x8080000c, 0xdc003d91, 0x00b10400, 0x00050005 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000e }, + { 0x00400001, 0x22000128, 0x0069044c, 0x00000000 }, + { 0x01400010, 0x20003dac, 0x00000444, 0x00030003 }, + { 0x01400010, 0x20003dac, 0x02000446, 0x00030003 }, + { 0x00410040, 0x22002d08, 0x00690200, 0x00010001 }, + { 0x00410040, 0x22002d08, 0x02690200, 0x00100010 }, + { 0x00800001, 0x25400229, 0x01e98000, 0x00000000 }, + { 0x80800042, 0x45404631, 0x00d20540, 0x00d204c0 }, + { 0x00000001, 0x220c0128, 0x00000454, 0x00000000 }, + { 0x00400001, 0xd8000231, 0x008a0540, 0x00000000 }, + { 0x00400001, 0xd8100231, 0x008a0548, 0x00000000 }, + { 0x00400001, 0xd8200231, 0x008a0550, 0x00000000 }, + { 0x00400001, 0xd8300231, 0x008a0558, 0x00000000 }, + { 0x00600001, 0x220001ac, 0x008d0024, 0x00000000 }, + { 0x00200040, 0x244c3dad, 0x00450448, 0xfff8fff8 }, + { 0x00000401, 0x220001ec, 0x00000000, 0x07000700 }, + { 0x00000801, 0x220e0128, 0x00000456, 0x00000000 }, + { 0x00000441, 0x254635ad, 0x00000448, 0x0000044a }, + { 0x00000c41, 0x254025ad, 0x0000444c, 0x0000444e }, + { 0x00000c41, 0x254225ad, 0x00000448, 0x0000444e }, + { 0x00000841, 0x254435ad, 0x0000444c, 0x0000044a }, + { 0x00600041, 0x24002628, 0x00898000, 0x00000540 }, + { 0x00600048, 0x24002628, 0x00898002, 0x00000542 }, + { 0x00600048, 0x24002628, 0x00898008, 0x00000544 }, + { 0x00600048, 0x2540262d, 0x0089800a, 0x00000546 }, + { 0x00400401, 0xbc0001a9, 0x00690540, 0x00000000 }, + { 0x00400801, 0xbc1001a9, 0x00690548, 0x00000000 }, + { 0x01000010, 0x20003d2c, 0x00000022, 0x00030003 }, + { 0x01000040, 0x20223d29, 0x02000022, 0xffffffff }, + { 0x00000040, 0x220c3d8c, 0x0000020c, 0x00080008 }, + { 0x00110040, 0x24540c21, 0x00000454, 0x00080008 }, + { 0x00010040, 0x24540c21, 0x00000454, 0x00180038 }, + { 0x00110220, 0x34001c00, 0x02001400, 0xfffffee4 }, + { 0x01800010, 0x20003dac, 0x0200010e, 0x00010001 }, + { 0x00000040, 0x220c3d8c, 0x0000020c, 0xffe0ffe0 }, + { 0x00010001, 0x24540061, 0x02000000, 0x06c00640 }, + { 0x00110001, 0x24540061, 0x02000000, 0x04800780 }, + { 0x00000001, 0x220e0128, 0x00000456, 0x00000000 }, + { 0x00800040, 0x24003dac, 0x00b19c00, 0x00200020 }, + { 0x00800040, 0x24203dac, 0x00b19c20, 0x00200020 }, + { 0x8080000c, 0xdc003d91, 0x00b10400, 0x00060006 }, + { 0x8080000c, 0xdc203d91, 0x00b10420, 0x00060006 }, + { 0x02000040, 0x210e3d29, 0x0200010e, 0xffffffff }, + { 0x00000040, 0x220c3d8c, 0x0000020c, 0x00040004 }, + { 0x00110220, 0x34001c00, 0x02001400, 0xfffffce0 }, + { 0x01000005, 0x25643e2d, 0x00000060, 0x00c000c0 }, + { 0x01000010, 0x20003dac, 0x02000458, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000c }, + { 0x01000010, 0x20003dac, 0x00000458, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000086 }, + { 0x00a02001, 0x46400231, 0x00d20780, 0x00000000 }, + { 0x00a02001, 0x46800231, 0x00d207c0, 0x00000000 }, + { 0x00a02001, 0x46c00231, 0x00d20480, 0x00000000 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000007e }, + { 0x80a02042, 0x46404631, 0x00d20640, 0x00d20780 }, + { 0x80a02042, 0x46804631, 0x00d20680, 0x00d207c0 }, + { 0x80a02042, 0x46c04631, 0x00d206c0, 0x00d20480 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000076 }, + { 0x01000010, 0x20003dac, 0x02000564, 0x00800080 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x0000000e }, + { 0x01000010, 0x20003dac, 0x00000458, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0xffffffe4 }, + { 0x00200401, 0x256801ed, 0x00000000, 0x00200020 }, + { 0x00200801, 0x256c01ed, 0x00000000, 0x00060006 }, + { 0x00400001, 0x258001ed, 0x00000000, 0x00000000 }, + { 0x00600001, 0x45a001ad, 0x00058c00, 0x00000000 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000028 }, + { 0x02600005, 0x20006e28, 0x02008c0c, 0x88848421 }, + { 0x0220000c, 0x25663dad, 0x00000458, 0x00010001 }, + { 0x0000000c, 0x25643dad, 0x00000564, 0x00060006 }, + { 0x00310001, 0x25c401ad, 0x00000458, 0x00000000 }, + { 0x00210001, 0x25c00061, 0x00000000, 0x00010001 }, + { 0x00310040, 0x25c03dad, 0x004545c4, 0x00010001 }, + { 0x00610001, 0x25a00061, 0x02000000, 0x00000080 }, + { 0x00710001, 0x45a002ad, 0x02ae8c00, 0x00000000 }, + { 0x00710001, 0x45a202ad, 0x02ae8c01, 0x00000000 }, + { 0x00800041, 0x25a035ad, 0x00b105a0, 0x000905c0 }, + { 0x01200010, 0x20003e2c, 0x0245006e, 0x00000000 }, + { 0x00310009, 0x244c45ad, 0x02000564, 0x0045006e }, + { 0x00210001, 0x244c01ed, 0x02000000, 0x00000000 }, + { 0x0031000c, 0x244c3dad, 0x0245044c, 0x00010001 }, + { 0x00200009, 0x256835ad, 0x0045044c, 0x00000566 }, + { 0x00210040, 0x256835ad, 0x02450568, 0x00000566 }, + { 0x00200040, 0x256c362d, 0x0045006e, 0x00000566 }, + { 0x00400040, 0x240035ac, 0x00ab05a2, 0x00ab05a6 }, + { 0x00400040, 0x2400358c, 0x00690400, 0x00000566 }, + { 0x0040000c, 0x2580358d, 0x00690400, 0x00000566 }, + { 0x00800041, 0x2400362c, 0x00d20640, 0x000005a0 }, + { 0x00800041, 0x2420362c, 0x00d20660, 0x000005a0 }, + { 0x00800048, 0x2400362c, 0x00d20780, 0x000005a4 }, + { 0x00800048, 0x2420362c, 0x00d207a0, 0x000005a4 }, + { 0x00800040, 0x2400358c, 0x00b10400, 0x00000568 }, + { 0x00800040, 0x2420358c, 0x00b10420, 0x00000568 }, + { 0x0080000c, 0x24c0358d, 0x00b10400, 0x0000056c }, + { 0x0080000c, 0x24e0358d, 0x00b10420, 0x0000056c }, + { 0x80800040, 0x464035b1, 0x00b104c0, 0x00000580 }, + { 0x80800040, 0x466035b1, 0x00b104e0, 0x00000580 }, + { 0x00800041, 0x2400362c, 0x00d20680, 0x000005a0 }, + { 0x00800041, 0x2420362c, 0x00d206a0, 0x000005a0 }, + { 0x00800048, 0x2400362c, 0x00d207c0, 0x000005a4 }, + { 0x00800048, 0x2420362c, 0x00d207e0, 0x000005a4 }, + { 0x00800040, 0x2400358c, 0x00b10400, 0x00000568 }, + { 0x00800040, 0x2420358c, 0x00b10420, 0x00000568 }, + { 0x0080000c, 0x24c0358d, 0x00b10400, 0x0000056c }, + { 0x0080000c, 0x24e0358d, 0x00b10420, 0x0000056c }, + { 0x80800040, 0x468035b1, 0x00b104c0, 0x00000580 }, + { 0x80800040, 0x46a035b1, 0x00b104e0, 0x00000580 }, + { 0x00800041, 0x2400362c, 0x00d206c0, 0x000705a8 }, + { 0x00800041, 0x2420362c, 0x00d206e0, 0x000705a8 }, + { 0x00800048, 0x2400362c, 0x00d20480, 0x000705ac }, + { 0x00800048, 0x2420362c, 0x00d204a0, 0x000705ac }, + { 0x00800040, 0x2400358c, 0x00b10400, 0x0000056a }, + { 0x00800040, 0x2420358c, 0x00b10420, 0x0000056a }, + { 0x0080000c, 0x24c0358d, 0x00b10400, 0x0000056e }, + { 0x0080000c, 0x24e0358d, 0x00b10420, 0x0000056e }, + { 0x80800040, 0x46c035b1, 0x00b104c0, 0x00050582 }, + { 0x80800040, 0x46e035b1, 0x00b104e0, 0x00050582 }, + { 0x01800005, 0x20003d2c, 0x02000020, 0x00020002 }, + { 0x80800040, 0xd00045b1, 0x00b19000, 0x00d20640 }, + { 0x80800040, 0xd02045b1, 0x00b19020, 0x00d20660 }, + { 0x80800040, 0xd04045b1, 0x00b19040, 0x00d20680 }, + { 0x80800040, 0xd06045b1, 0x00b19060, 0x00d206a0 }, + { 0x00000040, 0x22083d8c, 0x00000208, 0x00800080 }, + { 0x80400040, 0xd40045b1, 0x00699400, 0x00ab06c0 }, + { 0x80400040, 0xd48045b1, 0x00699480, 0x00ab06c2 }, + { 0x80400040, 0xd42045b1, 0x00699420, 0x00ab06e0 }, + { 0x80400040, 0xd4a045b1, 0x006994a0, 0x00ab06e2 }, + { 0x80400040, 0xd41045b1, 0x00699410, 0x00ab06d0 }, + { 0x80400040, 0xd49045b1, 0x00699490, 0x00ab06d2 }, + { 0x80400040, 0xd43045b1, 0x00699430, 0x00ab06f0 }, + { 0x80400040, 0xd4b045b1, 0x006994b0, 0x00ab06f2 }, + { 0x00000040, 0x220a3d8c, 0x0000020a, 0x00080008 }, + { 0x00110040, 0x220a3d8c, 0x0200020a, 0x00300030 }, + { 0x01000010, 0x20003d2c, 0x02000020, 0x00060006 }, + { 0x00000040, 0x20203d29, 0x00000020, 0x00020002 }, + { 0x00000040, 0x22040c00, 0x00000204, 0x00100001 }, + { 0x00000040, 0x220c358c, 0x0000020c, 0x0000003a }, + { 0x00110220, 0x34001c00, 0x02001400, 0xfffffc1e }, + { 0x00000001, 0x220001ec, 0x00000000, 0x01400140 }, + { 0x00000001, 0x220201ec, 0x00000000, 0x01c001c0 }, + { 0x00800401, 0x20400236, 0x01ee8000, 0x00000000 }, + { 0x00800801, 0x20500236, 0x01ee8010, 0x00000000 }, + { 0x00800401, 0x20600236, 0x01ee8020, 0x00000000 }, + { 0x00800801, 0x20700236, 0x01ee8030, 0x00000000 }, + { 0x00800401, 0x20800236, 0x01ee8040, 0x00000000 }, + { 0x00800801, 0x20900236, 0x01ee8050, 0x00000000 }, + { 0x00800401, 0x20a00236, 0x01ee8060, 0x00000000 }, + { 0x00800801, 0x20b00236, 0x01ee8070, 0x00000000 }, + { 0x00800401, 0x20c00236, 0x01ee8100, 0x00000000 }, + { 0x00800801, 0x20d00236, 0x01ee8110, 0x00000000 }, + { 0x00800401, 0x20e00236, 0x01ee8120, 0x00000000 }, + { 0x00800801, 0x20f00236, 0x01ee8130, 0x00000000 }, + { 0x00800401, 0x21000236, 0x01ee8140, 0x00000000 }, + { 0x00800801, 0x21100236, 0x01ee8150, 0x00000000 }, + { 0x00800401, 0x21200236, 0x01ee8160, 0x00000000 }, + { 0x00800801, 0x21300236, 0x01ee8170, 0x00000000 }, + { 0x00000040, 0x22000d20, 0x00000062, 0x1218a600 }, + { 0x00200401, 0x204001a5, 0x00450064, 0x00000000 }, + { 0x00000801, 0x20480061, 0x00000000, 0x000f000f }, + { 0x01600031, 0x21400021, 0x508d0040, 0x00000200 }, + { 0x00000001, 0x220001ec, 0x00000000, 0x03400340 }, + { 0x00800401, 0x41600236, 0x00d28000, 0x00000000 }, + { 0x00800801, 0x41610236, 0x00d28080, 0x00000000 }, + { 0x00800401, 0x41800236, 0x00d28020, 0x00000000 }, + { 0x00800801, 0x41810236, 0x00d280a0, 0x00000000 }, + { 0x00800401, 0x41a00236, 0x00d28040, 0x00000000 }, + { 0x00800801, 0x41a10236, 0x00d280c0, 0x00000000 }, + { 0x00800401, 0x41c00236, 0x00d28060, 0x00000000 }, + { 0x00800801, 0x41c10236, 0x00d280e0, 0x00000000 }, + { 0x00000040, 0x22000d20, 0x00000062, 0x0a18a601 }, + { 0x0000040c, 0x20443ca5, 0x00000044, 0x00010001 }, + { 0x00000801, 0x20480061, 0x00000000, 0x0007000f }, + { 0x0a600031, 0x21600021, 0x508d0040, 0x00000200 }, + { 0x00000001, 0x21400021, 0x00000140, 0x00000000 }, + { 0x00000001, 0x21600021, 0x00000160, 0x00000000 }, + { 0x01600031, 0x20001c20, 0x708d0000, 0x82000010 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x20400021, 0x008d0000, 0x00000000 }, + { 0x00000005, 0x20203e2d, 0x00000061, 0x001f001f }, + { 0x00200009, 0x20643e2d, 0x00450064, 0x00040004 }, + { 0x00000001, 0x203a01ed, 0x00000000, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000020, 0x00160016 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000001e }, + { 0x01200010, 0x20003e2c, 0x0200006c, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000024 }, + { 0x00800009, 0x25403dad, 0x00050064, 0x00020002 }, + { 0x00000001, 0x203a01ed, 0x00000000, 0x00180018 }, + { 0x00200040, 0x45483dad, 0x00660548, 0x00100010 }, + { 0x00200040, 0x45523dad, 0x00660552, 0x00100010 }, + { 0x00400040, 0x25583dad, 0x00690558, 0x00100010 }, + { 0x00800040, 0x208035ad, 0x00b10080, 0x00b10540 }, + { 0x00600040, 0x45403dad, 0x00ae0540, 0x00200020 }, + { 0x00800040, 0x20a035ad, 0x00b100a0, 0x00b10540 }, + { 0x00600040, 0x45423dad, 0x00ae0542, 0x00200020 }, + { 0x00800040, 0x20e035ad, 0x00b100e0, 0x00b10540 }, + { 0x00600040, 0x45403dad, 0x00ae0540, 0xffe0ffe0 }, + { 0x00800040, 0x20c035ad, 0x00b100c0, 0x00b10540 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000014 }, + { 0x06600010, 0x20003dac, 0x02000020, 0x00030003 }, + { 0x00000001, 0x206c0171, 0x00000000, 0x00000000 }, + { 0x00610001, 0x208000a5, 0x02050080, 0x00000000 }, + { 0x00610001, 0x212000a5, 0x02090100, 0x00000000 }, + { 0x00410001, 0x211000a5, 0x02690100, 0x00000000 }, + { 0x00200009, 0x25403dad, 0x00450064, 0x00020002 }, + { 0x00800040, 0x208035ad, 0x00b10080, 0x00050540 }, + { 0x00200040, 0x40883dad, 0x00660088, 0x00200020 }, + { 0x00200040, 0x40923dad, 0x00660092, 0x00200020 }, + { 0x00400040, 0x20983dad, 0x00690098, 0x00200020 }, + { 0x00200401, 0x22080060, 0x00000000, 0x03400140 }, + { 0x00000c01, 0x220c0060, 0x00000000, 0x04400080 }, + { 0x00000801, 0x22040060, 0x00000000, 0x01000070 }, + { 0x02000005, 0x20002e28, 0x00000061, 0x00400040 }, + { 0x00010005, 0x203e2e29, 0x00000063, 0x00010001 }, + { 0x00110001, 0x203e0169, 0x00000000, 0x00030003 }, + { 0x00000001, 0x20200169, 0x00000000, 0x00000000 }, + { 0x0000000c, 0x2458262d, 0x0000006d, 0x00000020 }, + { 0x00000001, 0x210e0169, 0x00000000, 0x00010001 }, + { 0x00000005, 0x24583dad, 0x00000458, 0x00030003 }, + { 0x01000010, 0x200035ac, 0x0000010e, 0x00000458 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000031a }, + { 0x01000010, 0x20003dac, 0x0200010e, 0x00010001 }, + { 0x00010401, 0x24540061, 0x02000000, 0x06c00640 }, + { 0x00010805, 0x245a3e2d, 0x02008800, 0x007f007f }, + { 0x00110401, 0x24540061, 0x02000000, 0x04800780 }, + { 0x00110805, 0x245a3e2d, 0x02008804, 0x007f007f }, + { 0x00010005, 0x245c3e2d, 0x02008800, 0x00800080 }, + { 0x00110005, 0x245c3e2d, 0x02008804, 0x00800080 }, + { 0x00000009, 0x245c3dad, 0x0000045c, 0x00010001 }, + { 0x0000000c, 0x211e362d, 0x0000006c, 0x00000020 }, + { 0x00000040, 0x240035ac, 0x0000003e, 0x0000045c }, + { 0x01000010, 0x20003d8c, 0x00210400, 0x00010001 }, + { 0x01000010, 0x20003d8c, 0x02210400, 0x01000100 }, + { 0x00000001, 0x203c01ed, 0x00000000, 0x00000000 }, + { 0x00010001, 0x203c01ed, 0x00000000, 0x00020002 }, + { 0x00010001, 0x203c01ed, 0x02000000, 0xfffefffe }, + { 0x02000005, 0x20002e28, 0x00000061, 0x00400040 }, + { 0x00010040, 0x244c0d21, 0x0000045a, 0x0208e602 }, + { 0x00110040, 0x20780d21, 0x0000045a, 0x0208a002 }, + { 0x00010040, 0x20782421, 0x0000044c, 0x0000045c }, + { 0x02000005, 0x20003dac, 0x0200011e, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000001c0 }, + { 0x01000005, 0x20003dac, 0x00009800, 0x00030003 }, + { 0x00200005, 0x24443dad, 0x00459800, 0x00030003 }, + { 0x0020000c, 0x24403dad, 0x00459800, 0x00020002 }, + { 0x01600006, 0x20003dac, 0x02000446, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000012 }, + { 0x00010040, 0x22000c20, 0x02000078, 0x00400000 }, + { 0x00110040, 0x22000c20, 0x02000078, 0x00700000 }, + { 0x00310040, 0x20401da5, 0x02450440, 0xfffffffe }, + { 0x00110001, 0x20480061, 0x02000000, 0x000c000c }, + { 0x00010040, 0x20401da5, 0x02000440, 0xfffffffe }, + { 0x00010001, 0x204401a5, 0x02000442, 0x00000000 }, + { 0x00010001, 0x20480061, 0x02000000, 0x0007000c }, + { 0x01600031, 0x25600021, 0x408d0040, 0x00000200 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00010040, 0x22000c20, 0x02000078, 0x00200000 }, + { 0x00110040, 0x22000c20, 0x02000078, 0x00400000 }, + { 0x00200001, 0x204001a5, 0x00450440, 0x00000000 }, + { 0x00110040, 0x20441da5, 0x02000442, 0xfffffffe }, + { 0x00110001, 0x20480061, 0x02000000, 0x000c0007 }, + { 0x00010001, 0x20480061, 0x02000000, 0x00070007 }, + { 0x01600031, 0x25600021, 0x408d0040, 0x00000200 }, + { 0x00000040, 0xb80235ad, 0x00009802, 0x0000003c }, + { 0x0020040c, 0x24403dad, 0x00459800, 0x00030003 }, + { 0x00200805, 0x24483dad, 0x00459800, 0x00070007 }, + { 0x01600006, 0x20003dac, 0x0000044a, 0x00000000 }, + { 0x00200001, 0x204001a5, 0x00450440, 0x00000000 }, + { 0x00000009, 0x20403ca5, 0x00000040, 0x00010001 }, + { 0x00010040, 0x22000c20, 0x00000078, 0x00200010 }, + { 0x00110040, 0x22000c20, 0x00000078, 0x00300010 }, + { 0x00010001, 0x20480061, 0x00000000, 0x00030009 }, + { 0x00110001, 0x20480061, 0x00000000, 0x00040009 }, + { 0x02600031, 0x27000021, 0x408d0040, 0x00000200 }, + { 0x01000005, 0x20003dac, 0x00009800, 0x00030003 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000001a }, + { 0x00600001, 0x26220231, 0x008d05c0, 0x00000000 }, + { 0x00600401, 0x26120231, 0x008d05b8, 0x00000000 }, + { 0x00600801, 0x26020231, 0x008d05b0, 0x00000000 }, + { 0x00600401, 0x25f20231, 0x008d05a8, 0x00000000 }, + { 0x00600801, 0x25e20231, 0x008d05a0, 0x00000000 }, + { 0x00600401, 0x25d20231, 0x008d0598, 0x00000000 }, + { 0x00600801, 0x25c20231, 0x008d0590, 0x00000000 }, + { 0x00600401, 0x25b20231, 0x008d0588, 0x00000000 }, + { 0x00600801, 0x25a20231, 0x008d0580, 0x00000000 }, + { 0x00600401, 0x25920231, 0x008d0578, 0x00000000 }, + { 0x00600801, 0x25820231, 0x008d0570, 0x00000000 }, + { 0x00600001, 0x25720231, 0x008d0568, 0x00000000 }, + { 0x00600001, 0x25620231, 0x008d0560, 0x00000000 }, + { 0x00110001, 0x220001ec, 0x02000000, 0x05820582 }, + { 0x00010001, 0x220001ec, 0x02000000, 0x05620562 }, + { 0x00000001, 0x220e0128, 0x00000454, 0x00000000 }, + { 0x01800006, 0x200035ac, 0x02000446, 0x00000444 }, + { 0x00810001, 0xbc000229, 0x02ad8000, 0x00000000 }, + { 0x00810001, 0xbc200229, 0x02ad8020, 0x00000000 }, + { 0x00810001, 0xbc400229, 0x02ad8040, 0x00000000 }, + { 0x00810001, 0xbc600229, 0x02ad8060, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000012a }, + { 0x00600001, 0x2024018d, 0x008d0200, 0x00000000 }, + { 0x01000041, 0x245e35ad, 0x00000446, 0x00000444 }, + { 0x00000040, 0x22022d08, 0x00000200, 0x00100010 }, + { 0x02000005, 0x20003db0, 0x0200045e, 0x00010001 }, + { 0x00200040, 0x22042d08, 0x00450200, 0x00200020 }, + { 0x00400001, 0x244c0109, 0x00690200, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000066 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000064 }, + { 0x00000040, 0x22003d08, 0x00000200, 0xffdeffde }, + { 0x00000440, 0x22023d08, 0x00000202, 0xffeeffee }, + { 0x00000801, 0x220c0060, 0x00000000, 0x04a00480 }, + { 0x01000010, 0x20003db0, 0x0000045e, 0x00040004 }, + { 0x00a02040, 0x2400462c, 0x00ad8000, 0x00ad8005 }, + { 0x00a02048, 0x24003e2c, 0x00ad8001, 0xfffbfffb }, + { 0x00a02048, 0x24003e2c, 0x00ad8002, 0x00140014 }, + { 0x00a02048, 0x24003e2c, 0x00ad8003, 0x00140014 }, + { 0x00a02048, 0xb8003e2d, 0x00ad8004, 0xfffbfffb }, + { 0x00a02040, 0x2400462c, 0x00ad8040, 0x00ad8045 }, + { 0x00a02048, 0x24003e2c, 0x00ad8041, 0xfffbfffb }, + { 0x00a02048, 0x24003e2c, 0x00ad8042, 0x00140014 }, + { 0x00a02048, 0x24003e2c, 0x00ad8043, 0x00140014 }, + { 0x00a02048, 0xb8403e2d, 0x00ad8044, 0xfffbfffb }, + { 0x00a02040, 0x2400462c, 0x00ad8080, 0x00ad8085 }, + { 0x00a02048, 0x24003e2c, 0x00ad8081, 0xfffbfffb }, + { 0x00a02048, 0x24003e2c, 0x00ad8082, 0x00140014 }, + { 0x00a02048, 0x24003e2c, 0x00ad8083, 0x00140014 }, + { 0x00a02048, 0xb8803e2d, 0x00ad8084, 0xfffbfffb }, + { 0x00600040, 0x2400462c, 0x008d80c0, 0x008d80c5 }, + { 0x00600048, 0x24003e2c, 0x008d80c1, 0xfffbfffb }, + { 0x00600048, 0x24003e2c, 0x008d80c2, 0x00140014 }, + { 0x00600048, 0x24003e2c, 0x008d80c3, 0x00140014 }, + { 0x00600048, 0xb8c03e2d, 0x008d80c4, 0xfffbfffb }, + { 0x00000401, 0x22000060, 0x00000000, 0x04a00480 }, + { 0x00000c01, 0x22040060, 0x00000000, 0x04a00490 }, + { 0x00010802, 0x220c2d28, 0x00000454, 0x04800480 }, + { 0x00a02040, 0x24003dac, 0x00b18000, 0x02000200 }, + { 0x00800048, 0x24003dac, 0x01ed8800, 0xfffbfffb }, + { 0x00800048, 0x24203dac, 0x01ed8820, 0xfffbfffb }, + { 0x00a02048, 0x24003dac, 0x00b18020, 0x00140014 }, + { 0x00800048, 0x24003dac, 0x01ed8820, 0x00140014 }, + { 0x00800048, 0x24203dac, 0x01ed8840, 0x00140014 }, + { 0x00a02048, 0x24003dac, 0x00b18040, 0xfffbfffb }, + { 0x00800048, 0x24003dac, 0x01ed8840, 0x00010001 }, + { 0x00800048, 0x24203dac, 0x01ed8860, 0x00010001 }, + { 0x8080000c, 0xd8003d91, 0x00b10400, 0x000a000a }, + { 0x8080100c, 0xd8203d91, 0x00b10420, 0x000a000a }, + { 0x00a02040, 0x24003dac, 0x00b18040, 0x02000200 }, + { 0x00800048, 0x24003dac, 0x01ed8840, 0xfffbfffb }, + { 0x00800048, 0x24203dac, 0x01ed8860, 0xfffbfffb }, + { 0x00a02048, 0x24003dac, 0x00b18060, 0x00140014 }, + { 0x00800048, 0x24003dac, 0x01ed8860, 0x00140014 }, + { 0x00800048, 0x24203dac, 0x01ed8880, 0x00140014 }, + { 0x00a02048, 0x24003dac, 0x00b18080, 0xfffbfffb }, + { 0x00800048, 0x24003dac, 0x01ed8880, 0x00010001 }, + { 0x00800048, 0x24203dac, 0x01ed88a0, 0x00010001 }, + { 0x8080000c, 0xd8403d91, 0x00b10400, 0x000a000a }, + { 0x8080100c, 0xd8603d91, 0x00b10420, 0x000a000a }, + { 0x00010220, 0x34001c00, 0x00001400, 0x000000b4 }, + { 0x01000010, 0x20003db0, 0x00000444, 0x00000000 }, + { 0x01000010, 0x20003db0, 0x02000446, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000004c }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000004a }, + { 0x00400040, 0x22003d28, 0x0069044c, 0xfffefffe }, + { 0x03400010, 0x20003dac, 0x00000446, 0x00020002 }, + { 0x01000010, 0x20003db0, 0x02000444, 0x00020002 }, + { 0x00410040, 0x22002d08, 0x00690200, 0x00100010 }, + { 0x01000010, 0x20003dac, 0x00000446, 0x00000000 }, + { 0x00010002, 0x220c2d28, 0x02000454, 0x04800480 }, + { 0x00800040, 0x24003e2c, 0x01ed8000, 0x00100010 }, + { 0x00800040, 0x24203e2c, 0x01ed8020, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01ed8001, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8021, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8002, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8022, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8003, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8023, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8004, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8024, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8005, 0x00010001 }, + { 0x00800048, 0x24203e2c, 0x01ed8025, 0x00010001 }, + { 0x8080000c, 0xd8003d91, 0x00b10400, 0x00050005 }, + { 0x8080100c, 0xd8203d91, 0x00b10420, 0x00050005 }, + { 0x00800040, 0x24003e2c, 0x01ed8040, 0x00100010 }, + { 0x00800040, 0x24203e2c, 0x01ed8060, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01ed8041, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8061, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8042, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8062, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8043, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8063, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8044, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8064, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8045, 0x00010001 }, + { 0x00800048, 0x24203e2c, 0x01ed8065, 0x00010001 }, + { 0x8080000c, 0xd8403d91, 0x00b10400, 0x00050005 }, + { 0x8080100c, 0xd8603d91, 0x00b10420, 0x00050005 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000004 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000005c }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000062 }, + { 0x01000010, 0x20003db0, 0x00000446, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000042 }, + { 0x00200401, 0x22000128, 0x0066044c, 0x00000000 }, + { 0x00200c01, 0x22040128, 0x0045044e, 0x00000000 }, + { 0x00000801, 0x220c0128, 0x00000454, 0x00000000 }, + { 0x03400010, 0x20003dac, 0x02000444, 0x00020002 }, + { 0x01000010, 0x20003dac, 0x00000444, 0x00000000 }, + { 0x00410040, 0x22002d08, 0x02690200, 0x00010001 }, + { 0x01000010, 0x20003db0, 0x02000446, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000002 }, + { 0x00110001, 0x220c0168, 0x02000000, 0x04800480 }, + { 0x00a02040, 0x24003e2c, 0x00ad83e0, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01ed8be0, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8800, 0xfffbfffb }, + { 0x00a02048, 0x24003e2c, 0x00ad8000, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8800, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8820, 0x00140014 }, + { 0x00a02048, 0x24003e2c, 0x00ad8020, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8820, 0x00010001 }, + { 0x00800048, 0x24203e2c, 0x01ed8840, 0x00010001 }, + { 0x8080000c, 0xd8003d91, 0x00b10400, 0x00050005 }, + { 0x8080100c, 0xd8203d91, 0x00b10420, 0x00050005 }, + { 0x00a02040, 0x24003e2c, 0x00ad8020, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01ed8820, 0xfffbfffb }, + { 0x00800048, 0x24203e2c, 0x01ed8840, 0xfffbfffb }, + { 0x00a02048, 0x24003e2c, 0x00ad8040, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01ed8840, 0x00140014 }, + { 0x00800048, 0x24203e2c, 0x01ed8860, 0x00140014 }, + { 0x00a02048, 0x24003e2c, 0x00ad8060, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01ed8860, 0x00010001 }, + { 0x00800048, 0x24203e2c, 0x01ed8880, 0x00010001 }, + { 0x8080000c, 0xd8403d91, 0x00b10400, 0x00050005 }, + { 0x8080100c, 0xd8603d91, 0x00b10420, 0x00050005 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001c }, + { 0x00200401, 0x22000128, 0x0045044c, 0x00000000 }, + { 0x00000801, 0x220c0128, 0x00000454, 0x00000000 }, + { 0x01200010, 0x20003dac, 0x00000444, 0x00030003 }, + { 0x01200010, 0x20003dac, 0x02000446, 0x00030003 }, + { 0x00210040, 0x22002d08, 0x00450200, 0x00010001 }, + { 0x00210040, 0x22002d08, 0x02450200, 0x00100010 }, + { 0x00800001, 0xb8000229, 0x01ed8000, 0x00000000 }, + { 0x00800001, 0xb8200229, 0x01ed8020, 0x00000000 }, + { 0x00800001, 0xb8400229, 0x01ed8040, 0x00000000 }, + { 0x00800001, 0xb8600229, 0x01ed8060, 0x00000000 }, + { 0x80800042, 0xd8004631, 0x00d29800, 0x00d20480 }, + { 0x80800042, 0xd8204631, 0x00d29820, 0x00d204a0 }, + { 0x80800042, 0xd8404631, 0x00d29840, 0x00d204c0 }, + { 0x80800042, 0xd8604631, 0x00d29860, 0x00d204e0 }, + { 0x00600001, 0x220001ac, 0x008d0024, 0x00000000 }, + { 0x00200040, 0x244c3dad, 0x00450448, 0xfff8fff8 }, + { 0x00000401, 0x220001ec, 0x00000000, 0x07000700 }, + { 0x00000c01, 0x220201e8, 0x00000000, 0x07100710 }, + { 0x00000801, 0x220e0128, 0x00000456, 0x00000000 }, + { 0x00000441, 0x254635ad, 0x00000448, 0x0000044a }, + { 0x00000c41, 0x254025ad, 0x0000444c, 0x0000444e }, + { 0x00000c41, 0x254225ad, 0x00000448, 0x0000444e }, + { 0x00000841, 0x254435ad, 0x0000444c, 0x0000044a }, + { 0x00200040, 0x244c3d09, 0x00450200, 0x00100010 }, + { 0x00800041, 0x24002628, 0x00ad8000, 0x00000540 }, + { 0x00800041, 0x24202628, 0x00ad8020, 0x00000540 }, + { 0x00800048, 0x24002628, 0x00ad8002, 0x00000542 }, + { 0x00800048, 0x24202628, 0x00ad8022, 0x00000542 }, + { 0x00200001, 0x22000128, 0x0045044c, 0x00000000 }, + { 0x00800048, 0x24002628, 0x01ed8000, 0x00000544 }, + { 0x00800048, 0x24202628, 0x01ed8020, 0x00000544 }, + { 0x00800048, 0xbc002629, 0x01ed8002, 0x00000546 }, + { 0x00801048, 0xbc202629, 0x01ed8022, 0x00000546 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000128 }, + { 0x00000001, 0x20220169, 0x00000000, 0x00040004 }, + { 0x00200005, 0x24443dad, 0x00459800, 0x00030003 }, + { 0x0020000c, 0x24403dad, 0x00459800, 0x00020002 }, + { 0x01600006, 0x20003dac, 0x02000446, 0x00000000 }, + { 0x00010040, 0x22000c20, 0x02000078, 0x00200000 }, + { 0x00110040, 0x22000c20, 0x02000078, 0x00500000 }, + { 0x00310040, 0x20401da5, 0x02450440, 0xfffffffe }, + { 0x00110001, 0x20480061, 0x02000000, 0x00080008 }, + { 0x00010040, 0x20401da5, 0x02000440, 0xfffffffe }, + { 0x00010001, 0x204401a5, 0x02000442, 0x00000000 }, + { 0x00010001, 0x20480061, 0x02000000, 0x00030008 }, + { 0x01600031, 0x25600021, 0x408d0040, 0x00000200 }, + { 0x00000040, 0xb80235ad, 0x00009802, 0x0000003c }, + { 0x00000040, 0x22000c20, 0x00000078, 0x00100010 }, + { 0x0020040c, 0x24403dad, 0x00459800, 0x00030003 }, + { 0x00200805, 0x24483dad, 0x00459800, 0x00070007 }, + { 0x00200001, 0x204001a5, 0x00450440, 0x00000000 }, + { 0x00000009, 0x20403ca5, 0x00000040, 0x00010001 }, + { 0x00000001, 0x20480061, 0x00000000, 0x00020005 }, + { 0x02600031, 0x27000021, 0x408d0040, 0x00000200 }, + { 0x00110001, 0x220001ec, 0x02000000, 0x05820582 }, + { 0x00010001, 0x220001ec, 0x02000000, 0x05620562 }, + { 0x00000001, 0x220e0128, 0x00000454, 0x00000000 }, + { 0x01800006, 0x200035ac, 0x02000446, 0x00000444 }, + { 0x00410001, 0xbc000229, 0x02698000, 0x00000000 }, + { 0x00410001, 0xbc100229, 0x02698010, 0x00000000 }, + { 0x00410001, 0xbc200229, 0x02698020, 0x00000000 }, + { 0x00410001, 0xbc300229, 0x02698030, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000be }, + { 0x00600001, 0x2024018d, 0x008d0200, 0x00000000 }, + { 0x01000041, 0x245e35ad, 0x00000446, 0x00000444 }, + { 0x02000005, 0x20003db0, 0x0200045e, 0x00010001 }, + { 0x00000040, 0x22022d08, 0x00000200, 0x00100010 }, + { 0x00200040, 0x22042d08, 0x00450200, 0x00200020 }, + { 0x00400001, 0x244c0109, 0x00690200, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000044 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000042 }, + { 0x00000040, 0x22003d08, 0x00000200, 0xffdeffde }, + { 0x00000440, 0x22023d08, 0x00000202, 0xffeeffee }, + { 0x00000801, 0x220c0060, 0x00000000, 0x04d004c0 }, + { 0x01000010, 0x20003db0, 0x0000045e, 0x00040004 }, + { 0x00802040, 0x2400462c, 0x00a98000, 0x00a98005 }, + { 0x00802048, 0x24003e2c, 0x00a98001, 0xfffbfffb }, + { 0x00802048, 0x24003e2c, 0x00a98002, 0x00140014 }, + { 0x00802048, 0x24003e2c, 0x00a98003, 0x00140014 }, + { 0x00802048, 0xb8003e2d, 0x00a98004, 0xfffbfffb }, + { 0x00802040, 0x2400462c, 0x00a98040, 0x00a98045 }, + { 0x00802048, 0x24003e2c, 0x00a98041, 0xfffbfffb }, + { 0x00802048, 0x24003e2c, 0x00a98042, 0x00140014 }, + { 0x00802048, 0x24003e2c, 0x00a98043, 0x00140014 }, + { 0x00802048, 0xb8203e2d, 0x00a98044, 0xfffbfffb }, + { 0x00400040, 0x2400462c, 0x00698080, 0x00698085 }, + { 0x00400048, 0x24003e2c, 0x00698081, 0xfffbfffb }, + { 0x00400048, 0x24003e2c, 0x00698082, 0x00140014 }, + { 0x00400048, 0x24003e2c, 0x00698083, 0x00140014 }, + { 0x00400048, 0xb8403e2d, 0x00698084, 0xfffbfffb }, + { 0x00000401, 0x220c0060, 0x00000000, 0x04e004d0 }, + { 0x00000c01, 0x22000060, 0x00000000, 0x04d004c8 }, + { 0x00000c01, 0x22040060, 0x00000000, 0x04e004d8 }, + { 0x00000801, 0x22080060, 0x00000000, 0x04f004e8 }, + { 0x00800040, 0x24003dac, 0x00b104c0, 0x02000200 }, + { 0x00800048, 0x24003dac, 0x00b104e0, 0xfffbfffb }, + { 0x00800048, 0x24003dac, 0x01ed9800, 0x00140014 }, + { 0x00010001, 0x220c0168, 0x00000000, 0x05400540 }, + { 0x00110001, 0x220c0168, 0x00000000, 0x04c004c0 }, + { 0x00800048, 0x24003dac, 0x01e98000, 0xfffbfffb }, + { 0x00800048, 0x24003dac, 0x01e98020, 0x00010001 }, + { 0x00800048, 0x24003dac, 0x01e98800, 0x00140014 }, + { 0x8080000c, 0xd8003d91, 0x00b10400, 0x000a000a }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000060 }, + { 0x01000010, 0x20003db0, 0x00000444, 0x00000000 }, + { 0x01000010, 0x20003db0, 0x02000446, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000022 }, + { 0x00400040, 0x22003d28, 0x0069044c, 0xfffefffe }, + { 0x03400010, 0x20003dac, 0x00000446, 0x00020002 }, + { 0x01000010, 0x20003db0, 0x02000444, 0x00020002 }, + { 0x00410040, 0x22002d08, 0x00690200, 0x00100010 }, + { 0x01000010, 0x20003dac, 0x00000446, 0x00000000 }, + { 0x00010001, 0x220e0168, 0x02000000, 0x05400540 }, + { 0x00110001, 0x220e0168, 0x02000000, 0x04c004c0 }, + { 0x00800040, 0x24003e2c, 0x01e98000, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01e98001, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01e98002, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01e98003, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01e98004, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01e98005, 0x00010001 }, + { 0x8080000c, 0xdc003d91, 0x00b10400, 0x00050005 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000004 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000036 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000036 }, + { 0x01000010, 0x20003db0, 0x00000446, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x03600010, 0x20003dac, 0x02000444, 0x00020002 }, + { 0x00400401, 0x22000128, 0x0069044c, 0x00000000 }, + { 0x00400840, 0x22083d2c, 0x0069044c, 0x00100010 }, + { 0x00610040, 0x22002d08, 0x02690200, 0x00010001 }, + { 0x01000010, 0x20003dac, 0x00000444, 0x00000000 }, + { 0x01000010, 0x20003db0, 0x02000446, 0x00020002 }, + { 0x00800040, 0x24003e2c, 0x01e983e0, 0x00100010 }, + { 0x00800048, 0x24003e2c, 0x01e98000, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01e98020, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01e993e0, 0xfffbfffb }, + { 0x00800048, 0x24003e2c, 0x01e99000, 0x00140014 }, + { 0x00800048, 0x24003e2c, 0x01e99020, 0x00010001 }, + { 0x00000001, 0x220e0168, 0x00000000, 0x05400540 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000002 }, + { 0x00110001, 0x220e0168, 0x02000000, 0x04c004c0 }, + { 0x8080000c, 0xdc003d91, 0x00b10400, 0x00050005 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000e }, + { 0x00400001, 0x22000128, 0x0069044c, 0x00000000 }, + { 0x01400010, 0x20003dac, 0x00000444, 0x00030003 }, + { 0x01400010, 0x20003dac, 0x02000446, 0x00030003 }, + { 0x00410040, 0x22002d08, 0x00690200, 0x00010001 }, + { 0x00410040, 0x22002d08, 0x02690200, 0x00100010 }, + { 0x00800001, 0x25400229, 0x01e98000, 0x00000000 }, + { 0x80800042, 0x45404631, 0x00d20540, 0x00d204c0 }, + { 0x00000001, 0x220c0128, 0x00000454, 0x00000000 }, + { 0x00400001, 0xd8000231, 0x008a0540, 0x00000000 }, + { 0x00400001, 0xd8100231, 0x008a0548, 0x00000000 }, + { 0x00400001, 0xd8200231, 0x008a0550, 0x00000000 }, + { 0x00400001, 0xd8300231, 0x008a0558, 0x00000000 }, + { 0x00600001, 0x220001ac, 0x008d0024, 0x00000000 }, + { 0x00200040, 0x244c3dad, 0x00450448, 0xfff8fff8 }, + { 0x00000401, 0x220001ec, 0x00000000, 0x07000700 }, + { 0x00000801, 0x220e0128, 0x00000456, 0x00000000 }, + { 0x00000441, 0x254635ad, 0x00000448, 0x0000044a }, + { 0x00000c41, 0x254025ad, 0x0000444c, 0x0000444e }, + { 0x00000c41, 0x254225ad, 0x00000448, 0x0000444e }, + { 0x00000841, 0x254435ad, 0x0000444c, 0x0000044a }, + { 0x00600041, 0x24002628, 0x00898000, 0x00000540 }, + { 0x00600048, 0x24002628, 0x00898002, 0x00000542 }, + { 0x00600048, 0x24002628, 0x00898008, 0x00000544 }, + { 0x00600048, 0x2540262d, 0x0089800a, 0x00000546 }, + { 0x00400401, 0xbc0001a9, 0x00690540, 0x00000000 }, + { 0x00400801, 0xbc1001a9, 0x00690548, 0x00000000 }, + { 0x01000010, 0x20003d2c, 0x00000022, 0x00030003 }, + { 0x01000040, 0x20223d29, 0x02000022, 0xffffffff }, + { 0x00000040, 0x220c3d8c, 0x0000020c, 0x00080008 }, + { 0x00110040, 0x24540c21, 0x00000454, 0x00080008 }, + { 0x00010040, 0x24540c21, 0x00000454, 0x00180038 }, + { 0x00110220, 0x34001c00, 0x02001400, 0xfffffee4 }, + { 0x01800010, 0x20003dac, 0x0200010e, 0x00010001 }, + { 0x00000040, 0x220c3d8c, 0x0000020c, 0xffe0ffe0 }, + { 0x00010001, 0x24540061, 0x02000000, 0x06c00640 }, + { 0x00110001, 0x24540061, 0x02000000, 0x04800780 }, + { 0x00000001, 0x220e0128, 0x00000456, 0x00000000 }, + { 0x00800040, 0x24003dac, 0x00b19c00, 0x00200020 }, + { 0x00800040, 0x24203dac, 0x00b19c20, 0x00200020 }, + { 0x8080000c, 0xdc003d91, 0x00b10400, 0x00060006 }, + { 0x8080000c, 0xdc203d91, 0x00b10420, 0x00060006 }, + { 0x02000040, 0x210e3d29, 0x0200010e, 0xffffffff }, + { 0x00000040, 0x220c3d8c, 0x0000020c, 0x00040004 }, + { 0x00110220, 0x34001c00, 0x02001400, 0xfffffcdc }, + { 0x01000005, 0x25643e2d, 0x00000060, 0x00c000c0 }, + { 0x01000010, 0x20003dac, 0x02000458, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000c }, + { 0x01000010, 0x20003dac, 0x00000458, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000086 }, + { 0x00a02001, 0x46400231, 0x00d20780, 0x00000000 }, + { 0x00a02001, 0x46800231, 0x00d207c0, 0x00000000 }, + { 0x00a02001, 0x46c00231, 0x00d20480, 0x00000000 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000007e }, + { 0x80a02042, 0x46404631, 0x00d20640, 0x00d20780 }, + { 0x80a02042, 0x46804631, 0x00d20680, 0x00d207c0 }, + { 0x80a02042, 0x46c04631, 0x00d206c0, 0x00d20480 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000076 }, + { 0x01000010, 0x20003dac, 0x02000564, 0x00800080 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x0000000e }, + { 0x01000010, 0x20003dac, 0x00000458, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0xffffffe4 }, + { 0x00200401, 0x256801ed, 0x00000000, 0x00200020 }, + { 0x00200801, 0x256c01ed, 0x00000000, 0x00060006 }, + { 0x00400001, 0x258001ed, 0x00000000, 0x00000000 }, + { 0x00600001, 0x45a001ad, 0x00058c00, 0x00000000 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000028 }, + { 0x02600005, 0x20006e28, 0x02008c0c, 0x88848421 }, + { 0x0220000c, 0x25663dad, 0x00000458, 0x00010001 }, + { 0x0000000c, 0x25643dad, 0x00000564, 0x00060006 }, + { 0x00310001, 0x25c401ad, 0x00000458, 0x00000000 }, + { 0x00210001, 0x25c00061, 0x00000000, 0x00010001 }, + { 0x00310040, 0x25c03dad, 0x004545c4, 0x00010001 }, + { 0x00610001, 0x25a00061, 0x02000000, 0x00000080 }, + { 0x00710001, 0x45a002ad, 0x02ae8c00, 0x00000000 }, + { 0x00710001, 0x45a202ad, 0x02ae8c01, 0x00000000 }, + { 0x00800041, 0x25a035ad, 0x00b105a0, 0x000905c0 }, + { 0x01200010, 0x20003e2c, 0x0245006e, 0x00000000 }, + { 0x00310009, 0x244c45ad, 0x02000564, 0x0045006e }, + { 0x00210001, 0x244c01ed, 0x02000000, 0x00000000 }, + { 0x0031000c, 0x244c3dad, 0x0245044c, 0x00010001 }, + { 0x00200009, 0x256835ad, 0x0045044c, 0x00000566 }, + { 0x00210040, 0x256835ad, 0x02450568, 0x00000566 }, + { 0x00200040, 0x256c362d, 0x0045006e, 0x00000566 }, + { 0x00400040, 0x240035ac, 0x00ab05a2, 0x00ab05a6 }, + { 0x00400040, 0x2400358c, 0x00690400, 0x00000566 }, + { 0x0040000c, 0x2580358d, 0x00690400, 0x00000566 }, + { 0x00800041, 0x2400362c, 0x00d20640, 0x000005a0 }, + { 0x00800041, 0x2420362c, 0x00d20660, 0x000005a0 }, + { 0x00800048, 0x2400362c, 0x00d20780, 0x000005a4 }, + { 0x00800048, 0x2420362c, 0x00d207a0, 0x000005a4 }, + { 0x00800040, 0x2400358c, 0x00b10400, 0x00000568 }, + { 0x00800040, 0x2420358c, 0x00b10420, 0x00000568 }, + { 0x0080000c, 0x24c0358d, 0x00b10400, 0x0000056c }, + { 0x0080000c, 0x24e0358d, 0x00b10420, 0x0000056c }, + { 0x80800040, 0x464035b1, 0x00b104c0, 0x00000580 }, + { 0x80800040, 0x466035b1, 0x00b104e0, 0x00000580 }, + { 0x00800041, 0x2400362c, 0x00d20680, 0x000005a0 }, + { 0x00800041, 0x2420362c, 0x00d206a0, 0x000005a0 }, + { 0x00800048, 0x2400362c, 0x00d207c0, 0x000005a4 }, + { 0x00800048, 0x2420362c, 0x00d207e0, 0x000005a4 }, + { 0x00800040, 0x2400358c, 0x00b10400, 0x00000568 }, + { 0x00800040, 0x2420358c, 0x00b10420, 0x00000568 }, + { 0x0080000c, 0x24c0358d, 0x00b10400, 0x0000056c }, + { 0x0080000c, 0x24e0358d, 0x00b10420, 0x0000056c }, + { 0x80800040, 0x468035b1, 0x00b104c0, 0x00000580 }, + { 0x80800040, 0x46a035b1, 0x00b104e0, 0x00000580 }, + { 0x00800041, 0x2400362c, 0x00d206c0, 0x000705a8 }, + { 0x00800041, 0x2420362c, 0x00d206e0, 0x000705a8 }, + { 0x00800048, 0x2400362c, 0x00d20480, 0x000705ac }, + { 0x00800048, 0x2420362c, 0x00d204a0, 0x000705ac }, + { 0x00800040, 0x2400358c, 0x00b10400, 0x0000056a }, + { 0x00800040, 0x2420358c, 0x00b10420, 0x0000056a }, + { 0x0080000c, 0x24c0358d, 0x00b10400, 0x0000056e }, + { 0x0080000c, 0x24e0358d, 0x00b10420, 0x0000056e }, + { 0x80800040, 0x46c035b1, 0x00b104c0, 0x00050582 }, + { 0x80800040, 0x46e035b1, 0x00b104e0, 0x00050582 }, + { 0x01800005, 0x20003d2c, 0x02000020, 0x00020002 }, + { 0x80800040, 0xd00045b1, 0x00b19000, 0x00d20640 }, + { 0x80800040, 0xd02045b1, 0x00b19020, 0x00d20660 }, + { 0x80800040, 0xd04045b1, 0x00b19040, 0x00d20680 }, + { 0x80800040, 0xd06045b1, 0x00b19060, 0x00d206a0 }, + { 0x00000040, 0x22083d8c, 0x00000208, 0x00800080 }, + { 0x80400040, 0xd40045b1, 0x00699400, 0x00ab06c0 }, + { 0x80400040, 0xd48045b1, 0x00699480, 0x00ab06c2 }, + { 0x80400040, 0xd42045b1, 0x00699420, 0x00ab06e0 }, + { 0x80400040, 0xd4a045b1, 0x006994a0, 0x00ab06e2 }, + { 0x80400040, 0xd41045b1, 0x00699410, 0x00ab06d0 }, + { 0x80400040, 0xd49045b1, 0x00699490, 0x00ab06d2 }, + { 0x80400040, 0xd43045b1, 0x00699430, 0x00ab06f0 }, + { 0x80400040, 0xd4b045b1, 0x006994b0, 0x00ab06f2 }, + { 0x00000040, 0x220a3d8c, 0x0000020a, 0x00080008 }, + { 0x00110040, 0x220a3d8c, 0x0200020a, 0x00300030 }, + { 0x01000010, 0x20003d2c, 0x02000020, 0x00060006 }, + { 0x00000040, 0x20203d29, 0x00000020, 0x00020002 }, + { 0x00000040, 0x22040c00, 0x00000204, 0x00100001 }, + { 0x00000040, 0x220c358c, 0x0000020c, 0x0000003a }, + { 0x00110220, 0x34001c00, 0x02001400, 0xfffffc1a }, + { 0x00000001, 0x220001ec, 0x00000000, 0x01400140 }, + { 0x00000001, 0x220201ec, 0x00000000, 0x01c001c0 }, + { 0x00800401, 0x20400236, 0x01ee8000, 0x00000000 }, + { 0x00800801, 0x20500236, 0x01ee8010, 0x00000000 }, + { 0x00800401, 0x20600236, 0x01ee8020, 0x00000000 }, + { 0x00800801, 0x20700236, 0x01ee8030, 0x00000000 }, + { 0x00800401, 0x20800236, 0x01ee8040, 0x00000000 }, + { 0x00800801, 0x20900236, 0x01ee8050, 0x00000000 }, + { 0x00800401, 0x20a00236, 0x01ee8060, 0x00000000 }, + { 0x00800801, 0x20b00236, 0x01ee8070, 0x00000000 }, + { 0x00800401, 0x20c00236, 0x01ee8100, 0x00000000 }, + { 0x00800801, 0x20d00236, 0x01ee8110, 0x00000000 }, + { 0x00800401, 0x20e00236, 0x01ee8120, 0x00000000 }, + { 0x00800801, 0x20f00236, 0x01ee8130, 0x00000000 }, + { 0x00800401, 0x21000236, 0x01ee8140, 0x00000000 }, + { 0x00800801, 0x21100236, 0x01ee8150, 0x00000000 }, + { 0x00800401, 0x21200236, 0x01ee8160, 0x00000000 }, + { 0x00800801, 0x21300236, 0x01ee8170, 0x00000000 }, + { 0x00000040, 0x22000d20, 0x00000062, 0x1218a000 }, + { 0x00200401, 0x204001a5, 0x00450064, 0x00000000 }, + { 0x00000801, 0x20480061, 0x00000000, 0x000f000f }, + { 0x01600031, 0x21400021, 0x508d0040, 0x00000200 }, + { 0x00000001, 0x220001ec, 0x00000000, 0x03400340 }, + { 0x00800401, 0x41600236, 0x00d28000, 0x00000000 }, + { 0x00800801, 0x41610236, 0x00d28080, 0x00000000 }, + { 0x00800401, 0x41800236, 0x00d28020, 0x00000000 }, + { 0x00800801, 0x41810236, 0x00d280a0, 0x00000000 }, + { 0x00800401, 0x41a00236, 0x00d28040, 0x00000000 }, + { 0x00800801, 0x41a10236, 0x00d280c0, 0x00000000 }, + { 0x00800401, 0x41c00236, 0x00d28060, 0x00000000 }, + { 0x00800801, 0x41c10236, 0x00d280e0, 0x00000000 }, + { 0x00000040, 0x22000d20, 0x00000062, 0x0a18a001 }, + { 0x0000040c, 0x20443ca5, 0x00000044, 0x00010001 }, + { 0x00000801, 0x20480061, 0x00000000, 0x0007000f }, + { 0x0a600031, 0x21600021, 0x508d0040, 0x00000200 }, + { 0x00000001, 0x21400021, 0x00000140, 0x00000000 }, + { 0x00000001, 0x21600021, 0x00000160, 0x00000000 }, + { 0x01600031, 0x20001c20, 0x708d0000, 0x82000010 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20602d29, 0x02000042, 0x00070007 }, + { 0x01000005, 0x20422d29, 0x00000042, 0xfff8fff8 }, + { 0x00000001, 0x202001e9, 0x00000000, 0x100c100c }, + { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, + { 0x00000009, 0x27e82d21, 0x00000040, 0x00060006 }, + { 0x00600001, 0x20a00022, 0x008d0000, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000100 }, + { 0x00600001, 0x20200022, 0x008d07e0, 0x00000000 }, + { 0x01800031, 0x20801d09, 0x408d0000, 0x02488400 }, + { 0x00600001, 0x20400022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20480c22, 0x000007e8, 0x00000080 }, + { 0x02800031, 0x21001d09, 0x408d0000, 0x02488400 }, + { 0x00600001, 0x20600022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20680c22, 0x000007e8, 0x00000100 }, + { 0x03800031, 0x21801d09, 0x408d0000, 0x02488400 }, + { 0x00600001, 0x20800022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20880c22, 0x000007e8, 0x00000180 }, + { 0x04800031, 0x22001d09, 0x408d0000, 0x02488400 }, + { 0x02600005, 0x20000c20, 0x02000090, 0x00002000 }, + { 0x00000006, 0x20880c21, 0x00000088, 0x00200000 }, + { 0x00200009, 0x20845529, 0x0000009c, 0x00450020 }, + { 0x00200001, 0x40840231, 0x00450094, 0x00000000 }, + { 0x00310001, 0x20840229, 0x02450094, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000c }, + { 0x00800041, 0x24002628, 0x00000095, 0x00000044 }, + { 0x00800040, 0x24004508, 0x008d0400, 0x00000094 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d0080, 0x00000000 }, + { 0x00802001, 0x20800061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x02600005, 0x20000c20, 0x020000d0, 0x00002000 }, + { 0x00000006, 0x20c80c21, 0x000000c8, 0x00200000 }, + { 0x00200009, 0x20c45529, 0x000000dc, 0x00450020 }, + { 0x00200001, 0x40c40231, 0x004500d4, 0x00000000 }, + { 0x00310001, 0x20c40229, 0x024500d4, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000c }, + { 0x00800041, 0x24002628, 0x000000d5, 0x00000044 }, + { 0x00800040, 0x24004508, 0x008d0400, 0x000000d4 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d00c0, 0x00000000 }, + { 0x00802001, 0x20c00061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x02600005, 0x20000c20, 0x02000110, 0x00002000 }, + { 0x00000006, 0x21080c21, 0x00000108, 0x00200000 }, + { 0x00200009, 0x21045529, 0x0000011c, 0x00450020 }, + { 0x00200001, 0x41040231, 0x00450114, 0x00000000 }, + { 0x00310001, 0x21040229, 0x02450114, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000c }, + { 0x00800041, 0x24002628, 0x00000115, 0x00000044 }, + { 0x00800040, 0x24004508, 0x008d0400, 0x00000114 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d0100, 0x00000000 }, + { 0x00802001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x02600005, 0x20000c20, 0x02000150, 0x00002000 }, + { 0x00000006, 0x21480c21, 0x00000148, 0x00200000 }, + { 0x00200009, 0x21445529, 0x0000015c, 0x00450020 }, + { 0x00200001, 0x41440231, 0x00450154, 0x00000000 }, + { 0x00310001, 0x21440229, 0x02450154, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000c }, + { 0x00800041, 0x24002628, 0x00000155, 0x00000044 }, + { 0x00800040, 0x24004508, 0x008d0400, 0x00000154 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d0140, 0x00000000 }, + { 0x00802001, 0x21400061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x02600005, 0x20000c20, 0x02000190, 0x00002000 }, + { 0x00000006, 0x21880c21, 0x00000188, 0x00200000 }, + { 0x00200009, 0x21845529, 0x0000019c, 0x00450020 }, + { 0x00200001, 0x41840231, 0x00450194, 0x00000000 }, + { 0x00310001, 0x21840229, 0x02450194, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000c }, + { 0x00800041, 0x24002628, 0x00000195, 0x00000044 }, + { 0x00800040, 0x24004508, 0x008d0400, 0x00000194 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d0180, 0x00000000 }, + { 0x00802001, 0x21800061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x02600005, 0x20000c20, 0x020001d0, 0x00002000 }, + { 0x00000006, 0x21c80c21, 0x000001c8, 0x00200000 }, + { 0x00200009, 0x21c45529, 0x000001dc, 0x00450020 }, + { 0x00200001, 0x41c40231, 0x004501d4, 0x00000000 }, + { 0x00310001, 0x21c40229, 0x024501d4, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000c }, + { 0x00800041, 0x24002628, 0x000001d5, 0x00000044 }, + { 0x00800040, 0x24004508, 0x008d0400, 0x000001d4 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d01c0, 0x00000000 }, + { 0x00802001, 0x21c00061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x02600005, 0x20000c20, 0x02000210, 0x00002000 }, + { 0x00000006, 0x22080c21, 0x00000208, 0x00200000 }, + { 0x00200009, 0x22045529, 0x0000021c, 0x00450020 }, + { 0x00200001, 0x42040231, 0x00450214, 0x00000000 }, + { 0x00310001, 0x22040229, 0x02450214, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000c }, + { 0x00800041, 0x24002628, 0x00000215, 0x00000044 }, + { 0x00800040, 0x24004508, 0x008d0400, 0x00000214 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d0200, 0x00000000 }, + { 0x00802001, 0x22000061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x02600005, 0x20000c20, 0x02000250, 0x00002000 }, + { 0x00000006, 0x22480c21, 0x00000248, 0x00200000 }, + { 0x00200009, 0x22445529, 0x0000025c, 0x00450020 }, + { 0x00200001, 0x42440231, 0x00450254, 0x00000000 }, + { 0x00310001, 0x22440229, 0x02450254, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000c }, + { 0x00800041, 0x24002628, 0x00000255, 0x00000044 }, + { 0x00800040, 0x24004508, 0x008d0400, 0x00000254 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d0240, 0x00000000 }, + { 0x00802001, 0x22400061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x01000040, 0x20423dad, 0x00000042, 0xfff8fff8 }, + { 0x00600001, 0x21600022, 0x008d07e0, 0x00000000 }, + { 0x00802001, 0x21800022, 0x008d0080, 0x00000000 }, + { 0x00802001, 0x21c00022, 0x008d00c0, 0x00000000 }, + { 0x0b800031, 0x20001d0c, 0x508d0000, 0x0a080400 }, + { 0x00600001, 0x20200022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20280c22, 0x000007e8, 0x00000080 }, + { 0x00802001, 0x20400022, 0x008d0100, 0x00000000 }, + { 0x00802001, 0x20800022, 0x008d0140, 0x00000000 }, + { 0x01800031, 0x20001d0c, 0x508d0000, 0x0a080400 }, + { 0x00000040, 0x21680c22, 0x000007e8, 0x00000100 }, + { 0x00802001, 0x21800022, 0x008d0180, 0x00000000 }, + { 0x00802001, 0x21c00022, 0x008d01c0, 0x00000000 }, + { 0x0b800031, 0x20001d0c, 0x508d0000, 0x0a080400 }, + { 0x00000040, 0x20280c22, 0x000007e8, 0x00000180 }, + { 0x00802001, 0x20400022, 0x008d0200, 0x00000000 }, + { 0x00802001, 0x20800022, 0x008d0240, 0x00000000 }, + { 0x01800031, 0x20001d0c, 0x508d0000, 0x0a080400 }, + { 0x00000040, 0x27e80c21, 0x000007e8, 0x00000200 }, + { 0x01000010, 0x20002da0, 0x02000060, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x00001400, 0xffffff00 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000040 }, + { 0x00600001, 0x20200022, 0x008d07e0, 0x00000000 }, + { 0x01800031, 0x20801d09, 0x408d0000, 0x02488400 }, + { 0x00600001, 0x20400022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20480c22, 0x000007e8, 0x00000080 }, + { 0x02800031, 0x21001d09, 0x408d0000, 0x02488400 }, + { 0x00600001, 0x20600022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20680c22, 0x000007e8, 0x00000100 }, + { 0x03800031, 0x21801d09, 0x408d0000, 0x02488400 }, + { 0x00600001, 0x20800022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20880c22, 0x000007e8, 0x00000180 }, + { 0x04800031, 0x22001d09, 0x408d0000, 0x02488400 }, + { 0x00000001, 0x220400e0, 0x00000000, 0x00a00080 }, + { 0x00600001, 0x20a00022, 0x008d0000, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x02008810, 0x00002000 }, + { 0x01000040, 0x20603dad, 0x00000060, 0xffffffff }, + { 0x00000006, 0xa8080c21, 0x00008808, 0x00200000 }, + { 0x00200009, 0xa8045529, 0x0000881c, 0x00450020 }, + { 0x00200001, 0xc8040231, 0x00458814, 0x00000000 }, + { 0x00310001, 0xa8040229, 0x02458814, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000c }, + { 0x00800041, 0x24002628, 0x00008815, 0x00000044 }, + { 0x00800040, 0x24004508, 0x008d0400, 0x00008814 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d8800, 0x00000000 }, + { 0x00802001, 0xa8000061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x00600001, 0x21600022, 0x008d07e0, 0x00000000 }, + { 0x00802001, 0x21800022, 0x008d8800, 0x00000000 }, + { 0x0b800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x00000040, 0x27e80c21, 0x000007e8, 0x00000040 }, + { 0x00000040, 0x22040c00, 0x00000204, 0x00400040 }, + { 0x00110220, 0x34001c00, 0x00001400, 0xffffffda }, + { 0x01600031, 0x20001c20, 0x708d0000, 0x82000010 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20602d29, 0x02000042, 0x00070007 }, + { 0x01000005, 0x20422d29, 0x00000042, 0xfff8fff8 }, + { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, + { 0x00000009, 0x27e82d21, 0x00000040, 0x00060006 }, + { 0x00600001, 0x20a00022, 0x008d0000, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000260 }, + { 0x00600001, 0x20200022, 0x008d07e0, 0x00000000 }, + { 0x01800031, 0x20801d09, 0x408d0000, 0x02488400 }, + { 0x00600001, 0x20400022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20480c22, 0x000007e8, 0x00000080 }, + { 0x02800031, 0x21001d09, 0x408d0000, 0x02488400 }, + { 0x00600001, 0x20600022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20680c22, 0x000007e8, 0x00000100 }, + { 0x03800031, 0x21801d09, 0x408d0000, 0x02488400 }, + { 0x00600001, 0x20800022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20880c22, 0x000007e8, 0x00000180 }, + { 0x04800031, 0x22001d09, 0x408d0000, 0x02488400 }, + { 0x00200001, 0x20640229, 0x00450094, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x02000090, 0x01000000 }, + { 0x02600005, 0x20000c20, 0x00000090, 0x00004000 }, + { 0x00600041, 0x24003e2c, 0x00000095, 0x00020002 }, + { 0x00110001, 0x2066018d, 0x02000400, 0x00000000 }, + { 0x00010040, 0x20663d8d, 0x02000400, 0x00010001 }, + { 0x00110001, 0x2066022d, 0x00000095, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x00000090, 0x00002000 }, + { 0x02600005, 0x20001d20, 0x02000066, 0x00000001 }, + { 0x00000006, 0x20881c21, 0x00000088, 0x00200000 }, + { 0x00200001, 0x20840129, 0x00450064, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00800041, 0x24002528, 0x00000066, 0x00000044 }, + { 0x00800040, 0x24002508, 0x008d0400, 0x00000064 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d0080, 0x00000000 }, + { 0x00802001, 0x20800061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000001e }, + { 0x02600005, 0x20000c20, 0x00000090, 0x00004000 }, + { 0x00210002, 0x20700421, 0x02450038, 0x00450030 }, + { 0x00000001, 0x20680129, 0x0000009c, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x02600005, 0x20001d20, 0x0000009c, 0x00000010 }, + { 0x00210002, 0x20700421, 0x02450028, 0x00450020 }, + { 0x01600005, 0x20001d20, 0x0200009c, 0x00000001 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x02610005, 0x20001c20, 0x02000090, 0x00008000 }, + { 0x02610005, 0x20001d20, 0x0200009c, 0x00000010 }, + { 0x00010006, 0x20681d29, 0x0200009c, 0x00000010 }, + { 0x02800005, 0x2000452c, 0x02000068, 0x000d0070 }, + { 0x00000009, 0x20843d09, 0x00000602, 0x000c000c }, + { 0x00000005, 0x20862d09, 0x00000602, 0xf000f000 }, + { 0x00200001, 0x40840231, 0x00660064, 0x00000000 }, + { 0x00200001, 0x20640229, 0x004500d4, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x020000d0, 0x01000000 }, + { 0x02600005, 0x20000c20, 0x000000d0, 0x00004000 }, + { 0x00600041, 0x24003e2c, 0x000000d5, 0x00020002 }, + { 0x00110001, 0x2066018d, 0x02000400, 0x00000000 }, + { 0x00010040, 0x20663d8d, 0x02000400, 0x00010001 }, + { 0x00110001, 0x2066022d, 0x000000d5, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x000000d0, 0x00002000 }, + { 0x02600005, 0x20001d20, 0x02000066, 0x00000001 }, + { 0x00000006, 0x20c81c21, 0x000000c8, 0x00200000 }, + { 0x00200001, 0x20c40129, 0x00450064, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00800041, 0x24002528, 0x00000066, 0x00000044 }, + { 0x00800040, 0x24002508, 0x008d0400, 0x00000064 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d00c0, 0x00000000 }, + { 0x00802001, 0x20c00061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000001e }, + { 0x02600005, 0x20000c20, 0x000000d0, 0x00004000 }, + { 0x00210002, 0x20700421, 0x02450038, 0x00450030 }, + { 0x00000001, 0x20680129, 0x000000dc, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x02600005, 0x20001d20, 0x000000dc, 0x00000010 }, + { 0x00210002, 0x20700421, 0x02450028, 0x00450020 }, + { 0x01600005, 0x20001d20, 0x020000dc, 0x00000001 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x02610005, 0x20001c20, 0x020000d0, 0x00008000 }, + { 0x02610005, 0x20001d20, 0x020000dc, 0x00000010 }, + { 0x00010006, 0x20681d29, 0x020000dc, 0x00000010 }, + { 0x02800005, 0x2000452c, 0x02000068, 0x000d0070 }, + { 0x00000009, 0x20c43d09, 0x00000602, 0x000c000c }, + { 0x00000005, 0x20c62d09, 0x00000602, 0xf000f000 }, + { 0x00200001, 0x40c40231, 0x00660064, 0x00000000 }, + { 0x00200001, 0x20640229, 0x00450114, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x02000110, 0x01000000 }, + { 0x02600005, 0x20000c20, 0x00000110, 0x00004000 }, + { 0x00600041, 0x24003e2c, 0x00000115, 0x00020002 }, + { 0x00110001, 0x2066018d, 0x02000400, 0x00000000 }, + { 0x00010040, 0x20663d8d, 0x02000400, 0x00010001 }, + { 0x00110001, 0x2066022d, 0x00000115, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x00000110, 0x00002000 }, + { 0x02600005, 0x20001d20, 0x02000066, 0x00000001 }, + { 0x00000006, 0x21081c21, 0x00000108, 0x00200000 }, + { 0x00200001, 0x21040129, 0x00450064, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00800041, 0x24002528, 0x00000066, 0x00000044 }, + { 0x00800040, 0x24002508, 0x008d0400, 0x00000064 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d0100, 0x00000000 }, + { 0x00802001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000001e }, + { 0x02600005, 0x20000c20, 0x00000110, 0x00004000 }, + { 0x00210002, 0x20700421, 0x02450038, 0x00450030 }, + { 0x00000001, 0x20680129, 0x0000011c, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x02600005, 0x20001d20, 0x0000011c, 0x00000010 }, + { 0x00210002, 0x20700421, 0x02450028, 0x00450020 }, + { 0x01600005, 0x20001d20, 0x0200011c, 0x00000001 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x02610005, 0x20001c20, 0x02000110, 0x00008000 }, + { 0x02610005, 0x20001d20, 0x0200011c, 0x00000010 }, + { 0x00010006, 0x20681d29, 0x0200011c, 0x00000010 }, + { 0x02800005, 0x2000452c, 0x02000068, 0x000d0070 }, + { 0x00000009, 0x21043d09, 0x00000602, 0x000c000c }, + { 0x00000005, 0x21062d09, 0x00000602, 0xf000f000 }, + { 0x00200001, 0x41040231, 0x00660064, 0x00000000 }, + { 0x00200001, 0x20640229, 0x00450154, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x02000150, 0x01000000 }, + { 0x02600005, 0x20000c20, 0x00000150, 0x00004000 }, + { 0x00600041, 0x24003e2c, 0x00000155, 0x00020002 }, + { 0x00110001, 0x2066018d, 0x02000400, 0x00000000 }, + { 0x00010040, 0x20663d8d, 0x02000400, 0x00010001 }, + { 0x00110001, 0x2066022d, 0x00000155, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x00000150, 0x00002000 }, + { 0x02600005, 0x20001d20, 0x02000066, 0x00000001 }, + { 0x00000006, 0x21481c21, 0x00000148, 0x00200000 }, + { 0x00200001, 0x21440129, 0x00450064, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00800041, 0x24002528, 0x00000066, 0x00000044 }, + { 0x00800040, 0x24002508, 0x008d0400, 0x00000064 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d0140, 0x00000000 }, + { 0x00802001, 0x21400061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000001e }, + { 0x02600005, 0x20000c20, 0x00000150, 0x00004000 }, + { 0x00210002, 0x20700421, 0x02450038, 0x00450030 }, + { 0x00000001, 0x20680129, 0x0000015c, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x02600005, 0x20001d20, 0x0000015c, 0x00000010 }, + { 0x00210002, 0x20700421, 0x02450028, 0x00450020 }, + { 0x01600005, 0x20001d20, 0x0200015c, 0x00000001 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x02610005, 0x20001c20, 0x02000150, 0x00008000 }, + { 0x02610005, 0x20001d20, 0x0200015c, 0x00000010 }, + { 0x00010006, 0x20681d29, 0x0200015c, 0x00000010 }, + { 0x02800005, 0x2000452c, 0x02000068, 0x000d0070 }, + { 0x00000009, 0x21443d09, 0x00000602, 0x000c000c }, + { 0x00000005, 0x21462d09, 0x00000602, 0xf000f000 }, + { 0x00200001, 0x41440231, 0x00660064, 0x00000000 }, + { 0x00200001, 0x20640229, 0x00450194, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x02000190, 0x01000000 }, + { 0x02600005, 0x20000c20, 0x00000190, 0x00004000 }, + { 0x00600041, 0x24003e2c, 0x00000195, 0x00020002 }, + { 0x00110001, 0x2066018d, 0x02000400, 0x00000000 }, + { 0x00010040, 0x20663d8d, 0x02000400, 0x00010001 }, + { 0x00110001, 0x2066022d, 0x00000195, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x00000190, 0x00002000 }, + { 0x02600005, 0x20001d20, 0x02000066, 0x00000001 }, + { 0x00000006, 0x21881c21, 0x00000188, 0x00200000 }, + { 0x00200001, 0x21840129, 0x00450064, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00800041, 0x24002528, 0x00000066, 0x00000044 }, + { 0x00800040, 0x24002508, 0x008d0400, 0x00000064 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d0180, 0x00000000 }, + { 0x00802001, 0x21800061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000001e }, + { 0x02600005, 0x20000c20, 0x00000190, 0x00004000 }, + { 0x00210002, 0x20700421, 0x02450038, 0x00450030 }, + { 0x00000001, 0x20680129, 0x0000019c, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x02600005, 0x20001d20, 0x0000019c, 0x00000010 }, + { 0x00210002, 0x20700421, 0x02450028, 0x00450020 }, + { 0x01600005, 0x20001d20, 0x0200019c, 0x00000001 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x02610005, 0x20001c20, 0x02000190, 0x00008000 }, + { 0x02610005, 0x20001d20, 0x0200019c, 0x00000010 }, + { 0x00010006, 0x20681d29, 0x0200019c, 0x00000010 }, + { 0x02800005, 0x2000452c, 0x02000068, 0x000d0070 }, + { 0x00000009, 0x21843d09, 0x00000602, 0x000c000c }, + { 0x00000005, 0x21862d09, 0x00000602, 0xf000f000 }, + { 0x00200001, 0x41840231, 0x00660064, 0x00000000 }, + { 0x00200001, 0x20640229, 0x004501d4, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x020001d0, 0x01000000 }, + { 0x02600005, 0x20000c20, 0x000001d0, 0x00004000 }, + { 0x00600041, 0x24003e2c, 0x000001d5, 0x00020002 }, + { 0x00110001, 0x2066018d, 0x02000400, 0x00000000 }, + { 0x00010040, 0x20663d8d, 0x02000400, 0x00010001 }, + { 0x00110001, 0x2066022d, 0x000001d5, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x000001d0, 0x00002000 }, + { 0x02600005, 0x20001d20, 0x02000066, 0x00000001 }, + { 0x00000006, 0x21c81c21, 0x000001c8, 0x00200000 }, + { 0x00200001, 0x21c40129, 0x00450064, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00800041, 0x24002528, 0x00000066, 0x00000044 }, + { 0x00800040, 0x24002508, 0x008d0400, 0x00000064 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d01c0, 0x00000000 }, + { 0x00802001, 0x21c00061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000001e }, + { 0x02600005, 0x20000c20, 0x000001d0, 0x00004000 }, + { 0x00210002, 0x20700421, 0x02450038, 0x00450030 }, + { 0x00000001, 0x20680129, 0x000001dc, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x02600005, 0x20001d20, 0x000001dc, 0x00000010 }, + { 0x00210002, 0x20700421, 0x02450028, 0x00450020 }, + { 0x01600005, 0x20001d20, 0x020001dc, 0x00000001 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x02610005, 0x20001c20, 0x020001d0, 0x00008000 }, + { 0x02610005, 0x20001d20, 0x020001dc, 0x00000010 }, + { 0x00010006, 0x20681d29, 0x020001dc, 0x00000010 }, + { 0x02800005, 0x2000452c, 0x02000068, 0x000d0070 }, + { 0x00000009, 0x21c43d09, 0x00000602, 0x000c000c }, + { 0x00000005, 0x21c62d09, 0x00000602, 0xf000f000 }, + { 0x00200001, 0x41c40231, 0x00660064, 0x00000000 }, + { 0x00200001, 0x20640229, 0x00450214, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x02000210, 0x01000000 }, + { 0x02600005, 0x20000c20, 0x00000210, 0x00004000 }, + { 0x00600041, 0x24003e2c, 0x00000215, 0x00020002 }, + { 0x00110001, 0x2066018d, 0x02000400, 0x00000000 }, + { 0x00010040, 0x20663d8d, 0x02000400, 0x00010001 }, + { 0x00110001, 0x2066022d, 0x00000215, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x00000210, 0x00002000 }, + { 0x02600005, 0x20001d20, 0x02000066, 0x00000001 }, + { 0x00000006, 0x22081c21, 0x00000208, 0x00200000 }, + { 0x00200001, 0x22040129, 0x00450064, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00800041, 0x24002528, 0x00000066, 0x00000044 }, + { 0x00800040, 0x24002508, 0x008d0400, 0x00000064 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d0200, 0x00000000 }, + { 0x00802001, 0x22000061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000001e }, + { 0x02600005, 0x20000c20, 0x00000210, 0x00004000 }, + { 0x00210002, 0x20700421, 0x02450038, 0x00450030 }, + { 0x00000001, 0x20680129, 0x0000021c, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x02600005, 0x20001d20, 0x0000021c, 0x00000010 }, + { 0x00210002, 0x20700421, 0x02450028, 0x00450020 }, + { 0x01600005, 0x20001d20, 0x0200021c, 0x00000001 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x02610005, 0x20001c20, 0x02000210, 0x00008000 }, + { 0x02610005, 0x20001d20, 0x0200021c, 0x00000010 }, + { 0x00010006, 0x20681d29, 0x0200021c, 0x00000010 }, + { 0x02800005, 0x2000452c, 0x02000068, 0x000d0070 }, + { 0x00000009, 0x22043d09, 0x00000602, 0x000c000c }, + { 0x00000005, 0x22062d09, 0x00000602, 0xf000f000 }, + { 0x00200001, 0x42040231, 0x00660064, 0x00000000 }, + { 0x00200001, 0x20640229, 0x00450254, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x02000250, 0x01000000 }, + { 0x02600005, 0x20000c20, 0x00000250, 0x00004000 }, + { 0x00600041, 0x24003e2c, 0x00000255, 0x00020002 }, + { 0x00110001, 0x2066018d, 0x02000400, 0x00000000 }, + { 0x00010040, 0x20663d8d, 0x02000400, 0x00010001 }, + { 0x00110001, 0x2066022d, 0x00000255, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x00000250, 0x00002000 }, + { 0x02600005, 0x20001d20, 0x02000066, 0x00000001 }, + { 0x00000006, 0x22481c21, 0x00000248, 0x00200000 }, + { 0x00200001, 0x22440129, 0x00450064, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00800041, 0x24002528, 0x00000066, 0x00000044 }, + { 0x00800040, 0x24002508, 0x008d0400, 0x00000064 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d0240, 0x00000000 }, + { 0x00802001, 0x22400061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000001e }, + { 0x02600005, 0x20000c20, 0x00000250, 0x00004000 }, + { 0x00210002, 0x20700421, 0x02450038, 0x00450030 }, + { 0x00000001, 0x20680129, 0x0000025c, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x02600005, 0x20001d20, 0x0000025c, 0x00000010 }, + { 0x00210002, 0x20700421, 0x02450028, 0x00450020 }, + { 0x01600005, 0x20001d20, 0x0200025c, 0x00000001 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x02610005, 0x20001c20, 0x02000250, 0x00008000 }, + { 0x02610005, 0x20001d20, 0x0200025c, 0x00000010 }, + { 0x00010006, 0x20681d29, 0x0200025c, 0x00000010 }, + { 0x02800005, 0x2000452c, 0x02000068, 0x000d0070 }, + { 0x00000009, 0x22443d09, 0x00000602, 0x000c000c }, + { 0x00000005, 0x22462d09, 0x00000602, 0xf000f000 }, + { 0x00200001, 0x42440231, 0x00660064, 0x00000000 }, + { 0x01000040, 0x20423dad, 0x00000042, 0xfff8fff8 }, + { 0x00600001, 0x21600022, 0x008d07e0, 0x00000000 }, + { 0x00802001, 0x21800022, 0x008d0080, 0x00000000 }, + { 0x00802001, 0x21c00022, 0x008d00c0, 0x00000000 }, + { 0x0b800031, 0x20001d0c, 0x508d0000, 0x0a080400 }, + { 0x00600001, 0x20200022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20280c22, 0x000007e8, 0x00000080 }, + { 0x00802001, 0x20400022, 0x008d0100, 0x00000000 }, + { 0x00802001, 0x20800022, 0x008d0140, 0x00000000 }, + { 0x01800031, 0x20001d0c, 0x508d0000, 0x0a080400 }, + { 0x00000040, 0x21680c22, 0x000007e8, 0x00000100 }, + { 0x00802001, 0x21800022, 0x008d0180, 0x00000000 }, + { 0x00802001, 0x21c00022, 0x008d01c0, 0x00000000 }, + { 0x0b800031, 0x20001d0c, 0x508d0000, 0x0a080400 }, + { 0x00000040, 0x20280c22, 0x000007e8, 0x00000180 }, + { 0x00802001, 0x20400022, 0x008d0200, 0x00000000 }, + { 0x00802001, 0x20800022, 0x008d0240, 0x00000000 }, + { 0x01800031, 0x20001d0c, 0x508d0000, 0x0a080400 }, + { 0x00000040, 0x27e80c21, 0x000007e8, 0x00000200 }, + { 0x01000010, 0x20002da0, 0x02000060, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x00001400, 0xfffffda0 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000006e }, + { 0x00600001, 0x20200022, 0x008d07e0, 0x00000000 }, + { 0x01800031, 0x20801d09, 0x408d0000, 0x02488400 }, + { 0x00600001, 0x20400022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20480c22, 0x000007e8, 0x00000080 }, + { 0x02800031, 0x21001d09, 0x408d0000, 0x02488400 }, + { 0x00600001, 0x20600022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20680c22, 0x000007e8, 0x00000100 }, + { 0x03800031, 0x21801d09, 0x408d0000, 0x02488400 }, + { 0x00600001, 0x20800022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20880c22, 0x000007e8, 0x00000180 }, + { 0x04800031, 0x22001d09, 0x408d0000, 0x02488400 }, + { 0x00000001, 0x220400e0, 0x00000000, 0x00a00080 }, + { 0x00600001, 0x20a00022, 0x008d0000, 0x00000000 }, + { 0x00200001, 0x20640229, 0x00458814, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x02008810, 0x01000000 }, + { 0x02600005, 0x20000c20, 0x00008810, 0x00004000 }, + { 0x00600041, 0x24003e2c, 0x00008815, 0x00020002 }, + { 0x00110001, 0x2066018d, 0x02000400, 0x00000000 }, + { 0x00010040, 0x20663d8d, 0x02000400, 0x00010001 }, + { 0x00110001, 0x2066022d, 0x00008815, 0x00000000 }, + { 0x02600005, 0x20000c20, 0x00008810, 0x00002000 }, + { 0x01000040, 0x20603dad, 0x02000060, 0xffffffff }, + { 0x00000006, 0xa8080c21, 0x00008808, 0x00200000 }, + { 0x00200001, 0xa8040129, 0x00450064, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00800041, 0x24002528, 0x00000066, 0x00000044 }, + { 0x00800040, 0x24002508, 0x008d0400, 0x00000064 }, + { 0x00000009, 0x20a82d02, 0x00000404, 0x00060006 }, + { 0x00802001, 0x20c00022, 0x008d8800, 0x00000000 }, + { 0x00802001, 0xa8000061, 0x00000000, 0x00000000 }, + { 0x05800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000022 }, + { 0x02600005, 0x20000d20, 0x02000066, 0x00000001 }, + { 0x02600005, 0x20000c20, 0x00008810, 0x00004000 }, + { 0x00000001, 0x20680129, 0x0000881c, 0x00000000 }, + { 0x00210002, 0x20700421, 0x02450038, 0x00450030 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x02600005, 0x20001d20, 0x0000881c, 0x00000010 }, + { 0x00210002, 0x20700421, 0x02450028, 0x00450020 }, + { 0x01600005, 0x20001d20, 0x0200881c, 0x00000001 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x02610005, 0x20001c20, 0x02008810, 0x00008000 }, + { 0x02610005, 0x20001d20, 0x0200881c, 0x00000010 }, + { 0x00010006, 0x20681d29, 0x0200881c, 0x00000010 }, + { 0x02800005, 0x2000452c, 0x00000068, 0x000d0070 }, + { 0x01000040, 0x20603dad, 0x02000060, 0x00000000 }, + { 0x00000009, 0xa8043d09, 0x00000600, 0x000c000c }, + { 0x00000005, 0xa8062d09, 0x00000600, 0xf000f000 }, + { 0x00200001, 0xc8040231, 0x00660064, 0x00000000 }, + { 0x00600001, 0x21600022, 0x008d07e0, 0x00000000 }, + { 0x00802001, 0x21800022, 0x008d8800, 0x00000000 }, + { 0x0b800031, 0x20001d0c, 0x508d0000, 0x06080300 }, + { 0x00000040, 0x27e80c21, 0x000007e8, 0x00000040 }, + { 0x00000040, 0x22040c00, 0x00000204, 0x00400040 }, + { 0x00110220, 0x34001c00, 0x02001400, 0xffffffac }, + { 0x01600031, 0x20001c20, 0x708d0000, 0x82000010 }, + { 0x01600031, 0x20001c20, 0x708d0000, 0x82000010 }, + { 0x01600031, 0x20001c20, 0x708d0000, 0x82000010 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, + { 0x00a02001, 0x20400169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x206601ed, 0x00000000, 0x00030003 }, + { 0x00000009, 0x20663dad, 0x00000066, 0x000a000a }, + { 0x00000008, 0x22403dad, 0x00000026, 0x00010001 }, + { 0x00000041, 0x224235ad, 0x00000020, 0x00000022 }, + { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 }, + { 0x00000001, 0x203c0022, 0x00000018, 0x00000000 }, + { 0x00000001, 0x203f01f2, 0x00000000, 0x00000000 }, + { 0x00000001, 0x202c00e2, 0x00000000, 0x00000000 }, + { 0x00000001, 0x202c010a, 0x00000e00, 0x00000000 }, + { 0x00600001, 0x20400021, 0x008d0020, 0x00000000 }, + { 0x00400001, 0x205401ed, 0x00000000, 0x00000000 }, + { 0x00200040, 0x20583dad, 0x00450020, 0xffffffff }, + { 0x00000001, 0x22000060, 0x00000000, 0x06080000 }, + { 0x00600001, 0x26000021, 0x008d0000, 0x00000000 }, + { 0x00000001, 0x26140061, 0x00000000, 0x00c00400 }, + { 0x00000001, 0x26100169, 0x00000000, 0x12121212 }, + { 0x07600031, 0x26201c21, 0x308d0600, 0x02000000 }, + { 0x00000001, 0x22a00169, 0x00000000, 0x01400140 }, + { 0x00000040, 0x20283c22, 0x00000008, 0x00200020 }, + { 0x00000001, 0x203801e2, 0x00000000, 0x00010001 }, + { 0x00800001, 0x204001ae, 0x00b10020, 0x00000000 }, + { 0x00000008, 0x27e03d29, 0x000002a0, 0x00010001 }, + { 0x00800031, 0x20000128, 0x608d07e0, 0x00000200 }, + { 0x00000006, 0x203025a2, 0x00000066, 0x000002a0 }, + { 0x01600031, 0x20001c00, 0x708d0000, 0x02000001 }, + { 0x00000001, 0x20300022, 0x00000010, 0x00000000 }, + { 0x00000001, 0x22a00169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22600169, 0x00000000, 0x00020002 }, + { 0x00200401, 0x208000e5, 0x00000000, 0x00000000 }, + { 0x00000c01, 0x208800e5, 0x00000000, 0xffffffc6 }, + { 0x00000801, 0x208c00e5, 0x00000000, 0xffffffca }, + { 0x00200001, 0x260001ec, 0x00000000, 0x00000000 }, + { 0x00600001, 0x20000022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20283c22, 0x00000008, 0x00100010 }, + { 0x00000001, 0x206001ed, 0x00000000, 0x00020002 }, + { 0x00000001, 0x206201ad, 0x0000005a, 0x00000000 }, + { 0x00000001, 0x20a001ed, 0x00000000, 0x00000000 }, + { 0x00200001, 0x228001ed, 0x00000000, 0x00000000 }, + { 0x00802001, 0x20c00061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21000061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21400061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21800061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21c00061, 0x00000000, 0x00ff00ff }, + { 0x00000041, 0x22083dac, 0x00000056, 0x00040004 }, + { 0x05000010, 0x200035ac, 0x02000280, 0x00000240 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000004 }, + { 0x00000040, 0x22803dad, 0x00000280, 0xffffffff }, + { 0x00000030, 0x32000084, 0x00001200, 0x00000000 }, + { 0x01000010, 0x20002d28, 0x000090c2, 0x00000000 }, + { 0x03000010, 0x200035ac, 0x02000054, 0x00000058 }, + { 0x00000041, 0x22a03dad, 0x00000056, 0x00040004 }, + { 0x00010220, 0x34001c00, 0x00001400, 0xfffffff4 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000014 }, + { 0x00200001, 0xb0c00229, 0x00450054, 0x00000000 }, + { 0x00200040, 0x22803dad, 0x00450280, 0x00010001 }, + { 0x00000001, 0x20300022, 0x00000010, 0x00000000 }, + { 0x00000001, 0x20380122, 0x00000260, 0x00000000 }, + { 0x00800001, 0x204001ae, 0x00b10040, 0x00000000 }, + { 0x00000008, 0x20003d2a, 0x000002a0, 0x00010001 }, + { 0x00000040, 0x22602d29, 0x00000260, 0x00020002 }, + { 0x00800031, 0x20000008, 0x608d0000, 0x00000200 }, + { 0x00000006, 0x203025a2, 0x00000066, 0x000002a0 }, + { 0x01600031, 0x20001c00, 0x708d0000, 0x02000001 }, + { 0x04200010, 0x200035ac, 0x00450054, 0x00450060 }, + { 0x00010040, 0x20a03dad, 0x02000056, 0x00010001 }, + { 0x05200010, 0x200035ac, 0x02450280, 0x00450240 }, + { 0x00000001, 0x240001ec, 0x00000000, 0x00040004 }, + { 0x00000048, 0x22083dac, 0x00000056, 0x00040004 }, + { 0x00200040, 0x205455ad, 0x00450054, 0x00450034 }, + { 0x02000010, 0x20003d8c, 0x00000600, 0x00010001 }, + { 0x00000041, 0x220e3d8c, 0x00000602, 0x00040004 }, + { 0x00010041, 0x22083dac, 0x000000a0, 0x00040004 }, + { 0x00010401, 0x205601ad, 0x000000a0, 0x00000000 }, + { 0x00010840, 0x20543d2d, 0x000090c0, 0x00010001 }, + { 0x00000220, 0x34001400, 0x00001400, 0x00009c80 }, + { 0x01000010, 0x20003dac, 0x02000280, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000006 }, + { 0x00000030, 0x32000084, 0x00001200, 0x00000000 }, + { 0x00000040, 0x22803dad, 0x00000280, 0xffffffff }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffff6 }, + { 0x05000010, 0x200035ac, 0x00000240, 0x00000026 }, + { 0x00010220, 0x34001c00, 0x00001400, 0xfffffffc }, + { 0x07600031, 0x20001c20, 0x30000000, 0x02000001 }, + { 0x01600031, 0x20001c24, 0x708d0000, 0x82000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, + { 0x00600009, 0x25c03dad, 0x00050034, 0x00040004 }, + { 0x00000001, 0x220801ec, 0x00000000, 0x02400240 }, + { 0x00000041, 0x20263d29, 0x00000036, 0x00040004 }, + { 0x00000041, 0x25e435a1, 0x00000020, 0x00000036 }, + { 0x00000040, 0x25e43421, 0x000005e4, 0x00000034 }, + { 0x00000041, 0x27e82c21, 0x000005e4, 0x00400040 }, + { 0x01600031, 0x22401c21, 0x408d07e0, 0x02885800 }, + { 0x01800005, 0x20002d28, 0x02b19040, 0xffffffff }, + { 0x02000005, 0x20003e2c, 0x00009030, 0x00010001 }, + { 0x00000040, 0x25c43dad, 0x000005c4, 0xfffcfffc }, + { 0x00000001, 0x25e20129, 0x00000036, 0x00000000 }, + { 0x000b0220, 0x34001c00, 0x02001400, 0x00000178 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000176 }, + { 0x00000040, 0x25ca3dad, 0x000005ca, 0xfffcfffc }, + { 0x00200401, 0x27e001a1, 0x004505c0, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x000f000f }, + { 0x00000001, 0x22000060, 0x00000000, 0x0288a001 }, + { 0x01600031, 0x20c00021, 0x408d07e0, 0x00000200 }, + { 0x00200401, 0x27e001a1, 0x004505c8, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0003000f }, + { 0x00000001, 0x22000060, 0x00000000, 0x02286003 }, + { 0x03600031, 0x20800021, 0x408d07e0, 0x00000200 }, + { 0x00800401, 0x23800231, 0x00a900c0, 0x00000000 }, + { 0x00800801, 0x23900231, 0x00a90100, 0x00000000 }, + { 0x00800401, 0x23a00231, 0x00a90140, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00a90180, 0x00000000 }, + { 0x00800401, 0x23c00231, 0x00a900c4, 0x00000000 }, + { 0x00800801, 0x23d00231, 0x00a90104, 0x00000000 }, + { 0x00800401, 0x23e00231, 0x00a90144, 0x00000000 }, + { 0x00800801, 0x23f00231, 0x00a90184, 0x00000000 }, + { 0x00800401, 0x24000231, 0x00a900c8, 0x00000000 }, + { 0x00800801, 0x24100231, 0x00a90108, 0x00000000 }, + { 0x00800401, 0x24200231, 0x00a90148, 0x00000000 }, + { 0x00800801, 0x24300231, 0x00a90188, 0x00000000 }, + { 0x00800401, 0x24400231, 0x00a900cc, 0x00000000 }, + { 0x00800801, 0x24500231, 0x00a9010c, 0x00000000 }, + { 0x00800401, 0x24600231, 0x00a9014c, 0x00000000 }, + { 0x00800801, 0x24700231, 0x00a9018c, 0x00000000 }, + { 0x00800401, 0x20c00231, 0x00cf0380, 0x00000000 }, + { 0x00800801, 0x20d00231, 0x00cf0381, 0x00000000 }, + { 0x00800401, 0x20e00231, 0x00cf0382, 0x00000000 }, + { 0x00800801, 0x20f00231, 0x00cf0383, 0x00000000 }, + { 0x00800401, 0x21000231, 0x00cf03c0, 0x00000000 }, + { 0x00800801, 0x21100231, 0x00cf03c1, 0x00000000 }, + { 0x00800401, 0x21200231, 0x00cf03c2, 0x00000000 }, + { 0x00800801, 0x21300231, 0x00cf03c3, 0x00000000 }, + { 0x00800401, 0x21400231, 0x00cf0400, 0x00000000 }, + { 0x00800801, 0x21500231, 0x00cf0401, 0x00000000 }, + { 0x00800401, 0x21600231, 0x00cf0402, 0x00000000 }, + { 0x00800801, 0x21700231, 0x00cf0403, 0x00000000 }, + { 0x00800401, 0x21800231, 0x00cf0440, 0x00000000 }, + { 0x00800801, 0x21900231, 0x00cf0441, 0x00000000 }, + { 0x00800401, 0x21a00231, 0x00cf0442, 0x00000000 }, + { 0x00800801, 0x21b00231, 0x00cf0443, 0x00000000 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00400040 }, + { 0x00000008, 0x25e83e2d, 0x00009080, 0x00020002 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00400040 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c000c0 }, + { 0x00200401, 0x25d0022d, 0x00459080, 0x00000000 }, + { 0x00200c01, 0x25d80129, 0x00459050, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x00699060, 0x00000000 }, + { 0x00000040, 0x25e83dad, 0x000005e8, 0x00020002 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000134 }, + { 0x00000008, 0x25e83e2d, 0x00009084, 0x00020002 }, + { 0x00200401, 0x25d0022d, 0x00459084, 0x00000000 }, + { 0x00000801, 0x25da01e9, 0x00000000, 0x00000000 }, + { 0x00000040, 0x25e83dad, 0x000005e8, 0x00020002 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00200020 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00c000c0 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01000100 }, + { 0x00000401, 0x25d80129, 0x00009040, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x00699064, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000011e }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00100010 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x01000100 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01400140 }, + { 0x00000401, 0x25d80129, 0x00009042, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x00699068, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000110 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00200020 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x01400140 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01800180 }, + { 0x00000401, 0x25d80129, 0x00009044, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x0069906c, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000102 }, + { 0x00200401, 0x27e001a1, 0x004505c4, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x000f0003 }, + { 0x00800401, 0x23400231, 0x00a90040, 0x00000000 }, + { 0x00800801, 0x23500231, 0x00a90044, 0x00000000 }, + { 0x00800401, 0x23600231, 0x00a90048, 0x00000000 }, + { 0x00800801, 0x23700231, 0x00a9004c, 0x00000000 }, + { 0x00800001, 0x20400232, 0x002b0340, 0x00000000 }, + { 0x00800001, 0x20500232, 0x002b0350, 0x00000000 }, + { 0x00800001, 0x20600232, 0x002b0360, 0x00000000 }, + { 0x00800001, 0x20700232, 0x002b0370, 0x00000000 }, + { 0x00000001, 0x22000060, 0x00000000, 0x06082003 }, + { 0x01600031, 0x20000020, 0x508d07e0, 0x00000200 }, + { 0x00800401, 0x23800231, 0x00a900c0, 0x00000000 }, + { 0x00800801, 0x23900231, 0x00a90100, 0x00000000 }, + { 0x00800401, 0x23a00231, 0x00a90140, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00a90180, 0x00000000 }, + { 0x00800401, 0x23c00231, 0x00a900c4, 0x00000000 }, + { 0x00800801, 0x23d00231, 0x00a90104, 0x00000000 }, + { 0x00800401, 0x23e00231, 0x00a90144, 0x00000000 }, + { 0x00800801, 0x23f00231, 0x00a90184, 0x00000000 }, + { 0x00800401, 0x24000231, 0x00a900c8, 0x00000000 }, + { 0x00800801, 0x24100231, 0x00a90108, 0x00000000 }, + { 0x00800401, 0x24200231, 0x00a90148, 0x00000000 }, + { 0x00800801, 0x24300231, 0x00a90188, 0x00000000 }, + { 0x00800401, 0x24400231, 0x00a900cc, 0x00000000 }, + { 0x00800801, 0x24500231, 0x00a9010c, 0x00000000 }, + { 0x00800401, 0x24600231, 0x00a9014c, 0x00000000 }, + { 0x00800801, 0x24700231, 0x00a9018c, 0x00000000 }, + { 0x00800401, 0x20c00231, 0x00cf0380, 0x00000000 }, + { 0x00800801, 0x20d00231, 0x00cf0381, 0x00000000 }, + { 0x00800401, 0x20e00231, 0x00cf0382, 0x00000000 }, + { 0x00800801, 0x20f00231, 0x00cf0383, 0x00000000 }, + { 0x00800401, 0x21000231, 0x00cf03c0, 0x00000000 }, + { 0x00800801, 0x21100231, 0x00cf03c1, 0x00000000 }, + { 0x00800401, 0x21200231, 0x00cf03c2, 0x00000000 }, + { 0x00800801, 0x21300231, 0x00cf03c3, 0x00000000 }, + { 0x00800401, 0x21400231, 0x00cf0400, 0x00000000 }, + { 0x00800801, 0x21500231, 0x00cf0401, 0x00000000 }, + { 0x00800401, 0x21600231, 0x00cf0402, 0x00000000 }, + { 0x00800801, 0x21700231, 0x00cf0403, 0x00000000 }, + { 0x00800401, 0x21800231, 0x00cf0440, 0x00000000 }, + { 0x00800801, 0x21900231, 0x00cf0441, 0x00000000 }, + { 0x00800401, 0x21a00231, 0x00cf0442, 0x00000000 }, + { 0x00800801, 0x21b00231, 0x00cf0443, 0x00000000 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00800080 }, + { 0x00000008, 0x25e83e2d, 0x00009082, 0x00020002 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00800080 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c000c0 }, + { 0x00200401, 0x25d0022d, 0x00459082, 0x00000000 }, + { 0x00200c01, 0x25d80129, 0x00459054, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x00699070, 0x00000000 }, + { 0x00000040, 0x25e83dad, 0x000005e8, 0x00020002 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000096 }, + { 0x00000008, 0x25e83e2d, 0x00009084, 0x00020002 }, + { 0x00200401, 0x25d0022d, 0x00459084, 0x00000000 }, + { 0x00000801, 0x25da01e9, 0x00000000, 0x00000000 }, + { 0x00000040, 0x25e83dad, 0x000005e8, 0x00020002 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00200020 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00c000c0 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01000100 }, + { 0x00000401, 0x25d80129, 0x00009046, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x00699074, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000080 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00100010 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x01000100 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01400140 }, + { 0x00000401, 0x25d80129, 0x00009048, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x00699078, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000072 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00200020 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x01400140 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01800180 }, + { 0x00000401, 0x25d80129, 0x0000904a, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x0069907c, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000064 }, + { 0x00200401, 0x27e001a1, 0x004505c0, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x000f000f }, + { 0x00802001, 0x20400022, 0x008d00c0, 0x00000000 }, + { 0x00802001, 0x20800022, 0x008d0100, 0x00000000 }, + { 0x00802001, 0x20c00022, 0x008d0140, 0x00000000 }, + { 0x00802001, 0x21000022, 0x008d0180, 0x00000000 }, + { 0x00000001, 0x22000060, 0x00000000, 0x12082003 }, + { 0x01600031, 0x20000020, 0x508d07e0, 0x00000200 }, + { 0x00200401, 0x27e001a1, 0x004505c8, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0003000f }, + { 0x00802001, 0x20400022, 0x008d0080, 0x00000000 }, + { 0x00000001, 0x22000060, 0x00000000, 0x0618a003 }, + { 0x01600031, 0x26400021, 0x508d07e0, 0x00000200 }, + { 0x00800401, 0x23400231, 0x00a900cc, 0x00000000 }, + { 0x00800801, 0x23500231, 0x00a9010c, 0x00000000 }, + { 0x00800401, 0x23600231, 0x00a9014c, 0x00000000 }, + { 0x00800801, 0x23700231, 0x00a9018c, 0x00000000 }, + { 0x00800401, 0x23800231, 0x00cf0340, 0x00000000 }, + { 0x00800801, 0x23900231, 0x00cf0341, 0x00000000 }, + { 0x00800401, 0x23a00231, 0x00cf0342, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00cf0343, 0x00000000 }, + { 0x00802001, 0x202000a2, 0x008d0380, 0x00000000 }, + { 0x00000008, 0x27e03d29, 0x00000026, 0x00010001 }, + { 0x00800031, 0x20001d28, 0x608d07e0, 0x06080020 }, + { 0x00600001, 0x26400021, 0x008d0640, 0x00000000 }, + { 0x00600001, 0x260001e1, 0x00000000, 0x00000000 }, + { 0x00000009, 0x26143da1, 0x000005e2, 0x00120012 }, + { 0x00000440, 0x26141c21, 0x00000614, 0x00020000 }, + { 0x00000c01, 0x26120129, 0x0000000c, 0x00000000 }, + { 0x00000c01, 0x26100169, 0x00000000, 0x12121212 }, + { 0x00400801, 0x26000171, 0x00000000, 0xffffffff }, + { 0x00600031, 0x20001c20, 0x308d0600, 0x82008002 }, + { 0x00000440, 0x27e03da1, 0x000005c0, 0x000c000c }, + { 0x00000c01, 0x27e401a1, 0x000005c2, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x000f0003 }, + { 0x02600031, 0x23401c25, 0x408d07e0, 0x02286003 }, + { 0x00800401, 0x23800231, 0x00cf0340, 0x00000000 }, + { 0x00800801, 0x23900231, 0x00cf0341, 0x00000000 }, + { 0x00800401, 0x23a00231, 0x00cf0342, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00cf0343, 0x00000000 }, + { 0x00802001, 0x202000a2, 0x008d0380, 0x00000000 }, + { 0x00000008, 0x27e03d29, 0x00000026, 0x00010001 }, + { 0x00800031, 0x20001d28, 0x608d07e0, 0x06080020 }, + { 0x00600001, 0x260001e1, 0x00000000, 0x00000000 }, + { 0x00000009, 0x26143da1, 0x000005e2, 0x00120012 }, + { 0x00000440, 0x26141c21, 0x00000614, 0x00020000 }, + { 0x00000c01, 0x26120129, 0x0000000c, 0x00000000 }, + { 0x00000c01, 0x26100169, 0x00000000, 0x12121212 }, + { 0x00400801, 0x26000171, 0x00000000, 0xffffffff }, + { 0x00600031, 0x20001c20, 0x308d0600, 0x82008002 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00800040, 0x2400462d, 0x00b19c00, 0x00b1d830 }, + { 0x00800040, 0x2340462d, 0x00b19820, 0x00b1d830 }, + { 0x00800040, 0x2360462d, 0x00b19c10, 0x00b1dc00 }, + { 0x05810010, 0x200035ac, 0x008d2400, 0x000005d0 }, + { 0x05810010, 0x200035ac, 0x008d2340, 0x000005d2 }, + { 0x05810010, 0x200035ac, 0x008d2360, 0x000005d2 }, + { 0x00818022, 0x34001c00, 0x00001400, 0x000000ca }, + { 0x00800040, 0x2440462d, 0x00b19810, 0x00b1d830 }, + { 0x00800040, 0x2460462d, 0x00b19c20, 0x00b1dc00 }, + { 0x00800201, 0x24a00129, 0x00b19820, 0x00000000 }, + { 0x00818022, 0x34001c00, 0x02001400, 0x00000066 }, + { 0x05800010, 0x200035ac, 0x028d2400, 0x000005e8 }, + { 0x00800040, 0x2520462d, 0x00b19830, 0x00b19820 }, + { 0x00800040, 0x2540462d, 0x00b19c00, 0x00b19c10 }, + { 0x00000201, 0x26000108, 0x00000602, 0x00000000 }, + { 0x05810010, 0x200035ac, 0x028d2440, 0x000005d2 }, + { 0x05810010, 0x200035ac, 0x008d2460, 0x000005d2 }, + { 0x00818022, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x00800040, 0x2560462d, 0x00b19810, 0x00b19800 }, + { 0x00800040, 0x238045ad, 0x008d0520, 0x00b19c00 }, + { 0x00800040, 0x24003d8c, 0x00b10400, 0x00040004 }, + { 0x00800040, 0x23a0458d, 0x00b10400, 0x00b19810 }, + { 0x00800048, 0x24003dac, 0x008d0560, 0x00020002 }, + { 0x80800008, 0x43c03d91, 0x00b10400, 0x00030003 }, + { 0x00800040, 0x24003dac, 0x00b103a0, 0xfffefffe }, + { 0x80800008, 0x43603d91, 0x00b10400, 0x00020002 }, + { 0x00800040, 0x2400362c, 0x00b19c10, 0x00b10380 }, + { 0x00800040, 0x2400358c, 0x00b10400, 0x00b103a0 }, + { 0x80800008, 0x43403d91, 0x00b10400, 0x00030003 }, + { 0x00800001, 0xb8100231, 0x00ae03c0, 0x00000000 }, + { 0x00800001, 0xb8200231, 0x00ae0360, 0x00000000 }, + { 0x00800001, 0xb8300231, 0x00ae0340, 0x00000000 }, + { 0x00808024, 0x34001c00, 0x00001400, 0x0001000e }, + { 0x00800040, 0x2400362c, 0x00b19820, 0x008d0520 }, + { 0x00800040, 0x2400458c, 0x00b10400, 0x00b19c10 }, + { 0x00800040, 0x24003d8c, 0x00b10400, 0x00020002 }, + { 0x80800008, 0x43403d91, 0x00b10400, 0x00020002 }, + { 0x00800001, 0xb8300231, 0x00ae0340, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00818022, 0x34001c00, 0x00001400, 0x0000001e }, + { 0x00800040, 0x2580462d, 0x00b19c20, 0x00b19c30 }, + { 0x00800040, 0x238045ad, 0x008d0540, 0x008d04b0 }, + { 0x00800040, 0x24003d8c, 0x00b10400, 0x00040004 }, + { 0x00800040, 0x23a0458d, 0x00b10400, 0x00b19c20 }, + { 0x00800048, 0x24003dac, 0x008d0580, 0x00020002 }, + { 0x80800008, 0x43c03d91, 0x00b10400, 0x00030003 }, + { 0x00800040, 0x24003dac, 0x00b103a0, 0xfffefffe }, + { 0x80800008, 0x43603d91, 0x00b10400, 0x00020002 }, + { 0x00800040, 0x2400362c, 0x008d04a0, 0x00b10380 }, + { 0x00800040, 0x2400358c, 0x00b10400, 0x00b103a0 }, + { 0x80800008, 0x43403d91, 0x00b10400, 0x00030003 }, + { 0x00800001, 0xbc200231, 0x00ae03c0, 0x00000000 }, + { 0x00800001, 0xbc100231, 0x00ae0360, 0x00000000 }, + { 0x00800001, 0xbc000231, 0x00ae0340, 0x00000000 }, + { 0x00808024, 0x34001c00, 0x00001400, 0x0001000e }, + { 0x00800040, 0x2400362c, 0x008d04a0, 0x008d0540 }, + { 0x00800040, 0x2400458c, 0x00b10400, 0x00b19c10 }, + { 0x00800040, 0x24003d8c, 0x00b10400, 0x00020002 }, + { 0x80800008, 0x43403d91, 0x00b10400, 0x00020002 }, + { 0x00800001, 0xbc000231, 0x00ae0340, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00808024, 0x34001c00, 0x00001400, 0x0001005c }, + { 0x00800201, 0x23e0022d, 0x002805d4, 0x00000000 }, + { 0x00800201, 0x23c0022d, 0x002805d4, 0x00000000 }, + { 0x05800010, 0x200035ac, 0x008d2440, 0x000005d2 }, + { 0x05800010, 0x200035ac, 0x028d2460, 0x000005d2 }, + { 0x00800040, 0x24003e2c, 0x00b19820, 0x00040004 }, + { 0x00800048, 0x24003dac, 0x008d0400, 0x00040004 }, + { 0x00800040, 0x2400458c, 0x00b10400, 0x00b1dc10 }, + { 0x00800008, 0x23403d8d, 0x00b10400, 0x00030003 }, + { 0x00810040, 0x23e03dad, 0x008d03e0, 0x00010001 }, + { 0x00200201, 0x25ec018d, 0x00450600, 0x00000000 }, + { 0x00810040, 0x23e03dad, 0x028d03e0, 0x00010001 }, + { 0x03800010, 0x200035ac, 0x008d0340, 0x008d03e0 }, + { 0x05800010, 0x200035ac, 0x028d0340, 0x008d43e0 }, + { 0x00800042, 0x24c0462d, 0x00b19830, 0x00b19c00 }, + { 0x00810001, 0x234001ad, 0x008d03e0, 0x00000000 }, + { 0x00810001, 0x234001ad, 0x028d43e0, 0x00000000 }, + { 0x00200201, 0x260001ac, 0x004505ec, 0x00000000 }, + { 0x80800040, 0x43603631, 0x00b19830, 0x008d0340 }, + { 0x80800040, 0x43403631, 0x00b19c00, 0x008d4340 }, + { 0x00800001, 0xb8300231, 0x00ae0360, 0x00000000 }, + { 0x00800001, 0xbc000231, 0x00ae0340, 0x00000000 }, + { 0x00818022, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00800040, 0x2400362c, 0x00b19810, 0x008d04c0 }, + { 0x00800048, 0x24003e2c, 0x00b19820, 0xfffefffe }, + { 0x00800008, 0x23603d8d, 0x00b10400, 0x00010001 }, + { 0x03800010, 0x200035ac, 0x008d0360, 0x008d03c0 }, + { 0x05800010, 0x200035ac, 0x028d0360, 0x008d43c0 }, + { 0x00810001, 0x236001ad, 0x008d03c0, 0x00000000 }, + { 0x00810001, 0x236001ad, 0x028d43c0, 0x00000000 }, + { 0x00000201, 0x260201ac, 0x000005ee, 0x00000000 }, + { 0x80800040, 0x43603631, 0x00b19820, 0x008d0360 }, + { 0x00800001, 0xb8200231, 0x00ae0360, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00818022, 0x34001c00, 0x02001400, 0x00000014 }, + { 0x00800040, 0x2400362c, 0x00b19c20, 0x008d04c0 }, + { 0x00800048, 0x24003e2c, 0x00b19c10, 0xfffefffe }, + { 0x00800008, 0x23603d8d, 0x00b10400, 0x00010001 }, + { 0x03800010, 0x200035ac, 0x008d0360, 0x008d03c0 }, + { 0x05800010, 0x200035ac, 0x028d0360, 0x008d43c0 }, + { 0x00810001, 0x236001ad, 0x008d03c0, 0x00000000 }, + { 0x00810001, 0x236001ad, 0x028d43c0, 0x00000000 }, + { 0x80800040, 0x43603631, 0x00b19c10, 0x008d0360 }, + { 0x00800001, 0xbc100231, 0x00ae0360, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x34000020, 0x000007c0, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, + { 0x00a02001, 0x20400169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x206601ed, 0x00000000, 0x00030003 }, + { 0x00000009, 0x20663dad, 0x00000066, 0x000a000a }, + { 0x00000001, 0x206801ed, 0x00000000, 0x01400140 }, + { 0x00000001, 0x22600169, 0x00000000, 0x00030003 }, + { 0x00000008, 0x22403dad, 0x00000026, 0x00010001 }, + { 0x00000041, 0x224235ad, 0x00000020, 0x00000022 }, + { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 }, + { 0x00000001, 0x203c0022, 0x00000018, 0x00000000 }, + { 0x00000001, 0x203f01f2, 0x00000000, 0x00000000 }, + { 0x00000001, 0x202c00e2, 0x00000000, 0x00000000 }, + { 0x00000001, 0x202c010a, 0x00000e00, 0x00000000 }, + { 0x00600001, 0x20400021, 0x008d0020, 0x00000000 }, + { 0x00400001, 0x205401ed, 0x00000000, 0x00000000 }, + { 0x00200040, 0x20583dad, 0x00450020, 0xffffffff }, + { 0x00000001, 0x22000060, 0x00000000, 0x06080000 }, + { 0x00600001, 0x26000021, 0x008d0000, 0x00000000 }, + { 0x00000001, 0x26140061, 0x00000000, 0x00c00400 }, + { 0x00000001, 0x26100169, 0x00000000, 0x12121212 }, + { 0x07600031, 0x26201c21, 0x308d0600, 0x02000000 }, + { 0x00200401, 0x208000e5, 0x00000000, 0x00000000 }, + { 0x00000c01, 0x208800e5, 0x00000000, 0xffffffc4 }, + { 0x00000801, 0x208c00e5, 0x00000000, 0xffffffc8 }, + { 0x00200001, 0x260001ec, 0x00000000, 0x00000000 }, + { 0x00600001, 0x20000022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20283c22, 0x00000008, 0x00100010 }, + { 0x00000001, 0x206001ed, 0x00000000, 0x00020002 }, + { 0x00000001, 0x206201ad, 0x0000005a, 0x00000000 }, + { 0x00000001, 0x20a001ed, 0x00000000, 0x00000000 }, + { 0x00200001, 0x228001ed, 0x00000000, 0x00000000 }, + { 0x00802001, 0x20c00061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21000061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21400061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21800061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21c00061, 0x00000000, 0x00ff00ff }, + { 0x00000041, 0x22083dac, 0x00000056, 0x00040004 }, + { 0x05000010, 0x200035ac, 0x02000280, 0x00000240 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000004 }, + { 0x00000040, 0x22803dad, 0x00000280, 0xffffffff }, + { 0x00000030, 0x32000084, 0x00001200, 0x00000000 }, + { 0x01000010, 0x20002d28, 0x000090c2, 0x00000000 }, + { 0x03000010, 0x200035ac, 0x02000054, 0x00000058 }, + { 0x00800001, 0x240001ac, 0x00000068, 0x00000000 }, + { 0x00000048, 0x22a03dad, 0x00000056, 0x00040004 }, + { 0x00010220, 0x34001c00, 0x00001400, 0xfffffff2 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000014 }, + { 0x00200001, 0xb0c00229, 0x00450054, 0x00000000 }, + { 0x00200040, 0x22803dad, 0x00450280, 0x00010001 }, + { 0x00000001, 0x20300022, 0x00000010, 0x00000000 }, + { 0x00000001, 0x20380122, 0x00000260, 0x00000000 }, + { 0x00800001, 0x204001ae, 0x00b10040, 0x00000000 }, + { 0x00000008, 0x20003d2a, 0x000002a0, 0x00010001 }, + { 0x00000040, 0x22602d29, 0x00000260, 0x00020002 }, + { 0x00800031, 0x20000008, 0x608d0000, 0x00000200 }, + { 0x00000006, 0x203025a2, 0x00000066, 0x000002a0 }, + { 0x01600031, 0x20001c00, 0x708d0000, 0x02000001 }, + { 0x04200010, 0x200035ac, 0x00450054, 0x00450060 }, + { 0x00010040, 0x20a03dad, 0x02000056, 0x00010001 }, + { 0x05200010, 0x200035ac, 0x02450280, 0x00450240 }, + { 0x00000001, 0x240001ec, 0x00000000, 0x00040004 }, + { 0x00000048, 0x22083dac, 0x00000056, 0x00040004 }, + { 0x00200040, 0x205455ad, 0x00450054, 0x00450034 }, + { 0x02000010, 0x20003d8c, 0x00000600, 0x00010001 }, + { 0x00000041, 0x220e3d8c, 0x00000602, 0x00040004 }, + { 0x00010041, 0x22083dac, 0x000000a0, 0x00040004 }, + { 0x00010401, 0x205601ad, 0x000000a0, 0x00000000 }, + { 0x00010840, 0x20543d2d, 0x000090c0, 0x00010001 }, + { 0x00000220, 0x34001400, 0x00001400, 0x00009c80 }, + { 0x01000010, 0x20003dac, 0x02000280, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000014 }, + { 0x00000030, 0x32000084, 0x00001200, 0x00000000 }, + { 0x00000040, 0x22803dad, 0x00000280, 0xffffffff }, + { 0x00600401, 0x260001e1, 0x00000000, 0x00000000 }, + { 0x00000c01, 0x26140061, 0x00000000, 0x01800000 }, + { 0x00000c01, 0x26120129, 0x0000000c, 0x00000000 }, + { 0x00000801, 0x26100169, 0x00000000, 0x12121212 }, + { 0x00000040, 0x2078252d, 0x00000026, 0x00004280 }, + { 0x00400001, 0x26000231, 0x00000078, 0x00000000 }, + { 0x00600031, 0x26201c21, 0x308d0600, 0x02000002 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffffe8 }, + { 0x07600031, 0x20001c20, 0x30000000, 0x02000001 }, + { 0x01600031, 0x20001c24, 0x708d0000, 0x82000012 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, + { 0x00600009, 0x25c03dad, 0x00050034, 0x00040004 }, + { 0x00000001, 0x220801ec, 0x00000000, 0x02400240 }, + { 0x00000041, 0x25e435a1, 0x00000020, 0x00000036 }, + { 0x00000040, 0x25e43421, 0x000005e4, 0x00000034 }, + { 0x00000041, 0x27e82c21, 0x000005e4, 0x00400040 }, + { 0x00000001, 0x240001ec, 0x00000000, 0x01400140 }, + { 0x00000048, 0x20263dad, 0x00000036, 0x00040004 }, + { 0x00000040, 0x25c43dad, 0x000005c4, 0xfffcfffc }, + { 0x00000040, 0x25ca3dad, 0x000005ca, 0xfffcfffc }, + { 0x00800001, 0x2220022d, 0x000d002c, 0x00000000 }, + { 0x00600040, 0x22303dad, 0x008d0230, 0x00080008 }, + { 0x01600031, 0x22401c21, 0x408d07e0, 0x02885800 }, + { 0x01800005, 0x20002d28, 0x02b19040, 0xffffffff }, + { 0x02000005, 0x20003e2c, 0x00009030, 0x00010001 }, + { 0x00000001, 0x25e20129, 0x00000036, 0x00000000 }, + { 0x000b0220, 0x34001c00, 0x02001400, 0x00000126 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000124 }, + { 0x00000401, 0x27e001a1, 0x000005c0, 0x00000000 }, + { 0x00000c0c, 0x27e43da1, 0x000005c2, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0007000f }, + { 0x00000001, 0x22000060, 0x00000000, 0x0248a002 }, + { 0x02600031, 0x20c00021, 0x408d07e0, 0x00000200 }, + { 0x00000401, 0x27e001a1, 0x000005c8, 0x00000000 }, + { 0x00000c0c, 0x27e43da1, 0x000005ca, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0001000f }, + { 0x00000001, 0x22000060, 0x00000000, 0x02186004 }, + { 0x02600031, 0x20800021, 0x408d07e0, 0x00000200 }, + { 0x00800001, 0x2380012d, 0x008900c0, 0x00000000 }, + { 0x00800001, 0x23a0012d, 0x00890100, 0x00000000 }, + { 0x00800001, 0x23c0012d, 0x008900c8, 0x00000000 }, + { 0x00800001, 0x23e0012d, 0x00890108, 0x00000000 }, + { 0x00600401, 0x20c001a9, 0x00ab0380, 0x00000000 }, + { 0x00600801, 0x20d001a9, 0x00ab0382, 0x00000000 }, + { 0x00600401, 0x20e001a9, 0x00ab0384, 0x00000000 }, + { 0x00600801, 0x20f001a9, 0x00ab0386, 0x00000000 }, + { 0x00600401, 0x210001a9, 0x00ab03c0, 0x00000000 }, + { 0x00600801, 0x211001a9, 0x00ab03c2, 0x00000000 }, + { 0x00600401, 0x212001a9, 0x00ab03c4, 0x00000000 }, + { 0x00600801, 0x213001a9, 0x00ab03c6, 0x00000000 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00400040 }, + { 0x00800008, 0x2340352d, 0x00009050, 0x008d0220 }, + { 0x00800008, 0x2360352d, 0x00009052, 0x008d0220 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x02600005, 0x20003dac, 0x00ae0340, 0x00010001 }, + { 0x02600005, 0x20003dac, 0x02ae0360, 0x00010001 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00400040 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c000c0 }, + { 0x00200401, 0x25d0022d, 0x004590c0, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990a0, 0x00000000 }, + { 0x00200001, 0x25d80109, 0x00450600, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000000fc }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00410041 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c100c1 }, + { 0x00200401, 0x25d0022d, 0x004590c8, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990b0, 0x00000000 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000000ee }, + { 0x00800008, 0x2340352d, 0x00009042, 0x008d0220 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00e000e0 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01000100 }, + { 0x00200401, 0x25d0022d, 0x004590c4, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990a4, 0x00000000 }, + { 0x02600005, 0x20003dac, 0x00ae0340, 0x00010001 }, + { 0x00000001, 0x260201e8, 0x00000000, 0x00000000 }, + { 0x00000401, 0x25da01e9, 0x00000000, 0x00000000 }, + { 0x00000801, 0x25d80109, 0x00000600, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000000d8 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00e100e1 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01010101 }, + { 0x00200401, 0x25d0022d, 0x004590cc, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990b4, 0x00000000 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000000ca }, + { 0x00000401, 0x27e001a1, 0x000005c4, 0x00000000 }, + { 0x00000c0c, 0x27e43da1, 0x000005c6, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x00070003 }, + { 0x00600401, 0x2340012d, 0x00890040, 0x00000000 }, + { 0x00600801, 0x2350012d, 0x00890048, 0x00000000 }, + { 0x00600001, 0x204001aa, 0x00270340, 0x00000000 }, + { 0x00600001, 0x205001aa, 0x00270350, 0x00000000 }, + { 0x00000001, 0x22000060, 0x00000000, 0x04082004 }, + { 0x01600031, 0x20000020, 0x508d07e0, 0x00000200 }, + { 0x00800001, 0x2380012d, 0x008900c0, 0x00000000 }, + { 0x00800001, 0x23a0012d, 0x00890100, 0x00000000 }, + { 0x00800001, 0x23c0012d, 0x008900c8, 0x00000000 }, + { 0x00800001, 0x23e0012d, 0x00890108, 0x00000000 }, + { 0x00600401, 0x20c001a9, 0x00ab0380, 0x00000000 }, + { 0x00600801, 0x20d001a9, 0x00ab0382, 0x00000000 }, + { 0x00600401, 0x20e001a9, 0x00ab0384, 0x00000000 }, + { 0x00600801, 0x20f001a9, 0x00ab0386, 0x00000000 }, + { 0x00600401, 0x210001a9, 0x00ab03c0, 0x00000000 }, + { 0x00600801, 0x211001a9, 0x00ab03c2, 0x00000000 }, + { 0x00600401, 0x212001a9, 0x00ab03c4, 0x00000000 }, + { 0x00600801, 0x213001a9, 0x00ab03c6, 0x00000000 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00800080 }, + { 0x00800008, 0x2340352d, 0x00009054, 0x008d0220 }, + { 0x00800008, 0x2360352d, 0x00009056, 0x008d0220 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x02600005, 0x20003dac, 0x00ae0340, 0x00010001 }, + { 0x02600005, 0x20003dac, 0x02ae0360, 0x00010001 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00800080 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c000c0 }, + { 0x00200401, 0x25d0022d, 0x004590c2, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990a8, 0x00000000 }, + { 0x00200001, 0x25d80109, 0x00450600, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000086 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00810081 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c100c1 }, + { 0x00200401, 0x25d0022d, 0x004590ca, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990b8, 0x00000000 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000078 }, + { 0x00800008, 0x2340352d, 0x00009048, 0x008d0220 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00e000e0 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01000100 }, + { 0x00200401, 0x25d0022d, 0x004590c4, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990ac, 0x00000000 }, + { 0x02600005, 0x20003dac, 0x00ae0340, 0x00010001 }, + { 0x00000001, 0x260201e8, 0x00000000, 0x00000000 }, + { 0x00000401, 0x25da01e9, 0x00000000, 0x00000000 }, + { 0x00000801, 0x25d80109, 0x00000600, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000062 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00e100e1 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01010101 }, + { 0x00200401, 0x25d0022d, 0x004590cc, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990bc, 0x00000000 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000054 }, + { 0x00000401, 0x27e001a1, 0x000005c0, 0x00000000 }, + { 0x00000c0c, 0x27e43da1, 0x000005c2, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0007000f }, + { 0x00802001, 0x20400022, 0x008d00c0, 0x00000000 }, + { 0x00802001, 0x20800022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x22000060, 0x00000000, 0x0a082004 }, + { 0x01600031, 0x20000020, 0x508d07e0, 0x00000200 }, + { 0x00000401, 0x27e001a1, 0x000005c8, 0x00000000 }, + { 0x00000c0c, 0x27e43da1, 0x000005ca, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0001000f }, + { 0x00600001, 0x20400022, 0x008d0080, 0x00000000 }, + { 0x00000001, 0x22000060, 0x00000000, 0x0418a004 }, + { 0x01600031, 0x26400021, 0x508d07e0, 0x00000200 }, + { 0x00600401, 0x2340012d, 0x008500cc, 0x00000000 }, + { 0x00600801, 0x2350012d, 0x0085010c, 0x00000000 }, + { 0x00800001, 0x236001ad, 0x002e0340, 0x00000000 }, + { 0x00600001, 0x202000a2, 0x008d0360, 0x00000000 }, + { 0x00000008, 0x27e03d29, 0x00000026, 0x00010001 }, + { 0x00800031, 0x20001d28, 0x608d07e0, 0x04080020 }, + { 0x00600001, 0x26400021, 0x008d0640, 0x00000000 }, + { 0x00600001, 0x260001e1, 0x00000000, 0x00000000 }, + { 0x00000009, 0x26143da1, 0x000005e2, 0x00120012 }, + { 0x00000440, 0x26141c21, 0x00000614, 0x00020000 }, + { 0x00000c01, 0x26120129, 0x0000000c, 0x00000000 }, + { 0x00000c01, 0x26100169, 0x00000000, 0x12121212 }, + { 0x00400801, 0x26000171, 0x00000000, 0xffffffff }, + { 0x00600031, 0x20001c20, 0x308d0600, 0x82008002 }, + { 0x00000440, 0x27e03da1, 0x000005c0, 0x000c000c }, + { 0x00000c0c, 0x27e43da1, 0x000005c2, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x00070003 }, + { 0x02600031, 0x23401c25, 0x408d07e0, 0x02186004 }, + { 0x00800001, 0x236001ad, 0x002e0340, 0x00000000 }, + { 0x00600001, 0x202000a2, 0x008d0360, 0x00000000 }, + { 0x00000008, 0x27e03d29, 0x00000026, 0x00010001 }, + { 0x00800031, 0x20001d28, 0x608d07e0, 0x04080020 }, + { 0x00600001, 0x260001e1, 0x00000000, 0x00000000 }, + { 0x00000009, 0x26143da1, 0x000005e2, 0x00120012 }, + { 0x00000440, 0x26141c21, 0x00000614, 0x00020000 }, + { 0x00000c01, 0x26120129, 0x0000000c, 0x00000000 }, + { 0x00000c01, 0x26100169, 0x00000000, 0x12121212 }, + { 0x00400801, 0x26000171, 0x00000000, 0xffffffff }, + { 0x00600031, 0x20001c20, 0x308d0600, 0x82008002 }, + { 0x00600040, 0x2400462d, 0x00ae9c00, 0x00aed810 }, + { 0x00600040, 0x2340462d, 0x00ae9800, 0x00aed810 }, + { 0x00600040, 0x2360462d, 0x00ae9c10, 0x00aedc00 }, + { 0x05810010, 0x200035ac, 0x008d2400, 0x000005d0 }, + { 0x05810010, 0x200035ac, 0x008d2340, 0x000005d2 }, + { 0x05810010, 0x200035ac, 0x008d2360, 0x000005d2 }, + { 0x00618022, 0x34001c00, 0x00001400, 0x00000038 }, + { 0x00618022, 0x34001c00, 0x02001400, 0x00000016 }, + { 0x00600040, 0x24003e2c, 0x00ae9c10, 0x00020002 }, + { 0x00600048, 0x24003e2c, 0x00ae9800, 0x00020002 }, + { 0x00600040, 0x2400458c, 0x008d0400, 0x00ae9810 }, + { 0x80600008, 0x43403d91, 0x008d0400, 0x00020002 }, + { 0x00600040, 0x24003e2c, 0x00ae9800, 0x00020002 }, + { 0x00600048, 0x24003e2c, 0x00ae9c10, 0x00020002 }, + { 0x00600040, 0x2400458c, 0x008d0400, 0x00ae9c00 }, + { 0x80600008, 0x43603d91, 0x008d0400, 0x00020002 }, + { 0x00600001, 0xd8100231, 0x00ae0340, 0x00000000 }, + { 0x00600001, 0xdc000231, 0x00ae0360, 0x00000000 }, + { 0x00608024, 0x34001c00, 0x00001400, 0x00010020 }, + { 0x00600201, 0x2400022c, 0x002405d4, 0x00000000 }, + { 0x00600040, 0x23e03d8d, 0x008d0400, 0x00010001 }, + { 0x00600040, 0x24003e2c, 0x00ae9800, 0x00040004 }, + { 0x00600048, 0x24003dac, 0x008d0400, 0x00040004 }, + { 0x00600040, 0x2400458c, 0x008d0400, 0x00aedc10 }, + { 0x00600008, 0x23403d8d, 0x008d0400, 0x00030003 }, + { 0x03600010, 0x200035ac, 0x008d0340, 0x008d03e0 }, + { 0x05600010, 0x200035ac, 0x028d0340, 0x008d43e0 }, + { 0x00610001, 0x234001ad, 0x008d03e0, 0x00000000 }, + { 0x00610001, 0x234001ad, 0x028d43e0, 0x00000000 }, + { 0x80600040, 0x43603631, 0x00ae9810, 0x008d0340 }, + { 0x80600040, 0x43403631, 0x00ae9c00, 0x008d4340 }, + { 0x00600001, 0xd8100231, 0x00ae0360, 0x00000000 }, + { 0x00600001, 0xdc000231, 0x00ae0340, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x34000020, 0x000007c0, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, + { 0x00a02001, 0x20400169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x206601ed, 0x00000000, 0x00030003 }, + { 0x00000009, 0x20663dad, 0x00000066, 0x000a000a }, + { 0x00000008, 0x22403dad, 0x00000026, 0x00010001 }, + { 0x00000041, 0x224235ad, 0x00000020, 0x00000022 }, + { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 }, + { 0x00000001, 0x203c0022, 0x00000018, 0x00000000 }, + { 0x00000001, 0x203f01f2, 0x00000000, 0x00000000 }, + { 0x00000001, 0x202c00e2, 0x00000000, 0x00000000 }, + { 0x00000001, 0x202c010a, 0x00000e00, 0x00000000 }, + { 0x00600001, 0x20400021, 0x008d0020, 0x00000000 }, + { 0x00400001, 0x205401ed, 0x00000000, 0x00000000 }, + { 0x00200040, 0x20583dad, 0x00450020, 0xffffffff }, + { 0x00000001, 0x22000060, 0x00000000, 0x06080000 }, + { 0x00600001, 0x26000021, 0x008d0000, 0x00000000 }, + { 0x00000001, 0x26140061, 0x00000000, 0x00c00400 }, + { 0x00000001, 0x26100169, 0x00000000, 0x12121212 }, + { 0x07600031, 0x26201c21, 0x308d0600, 0x02000000 }, + { 0x00000001, 0x22a00169, 0x00000000, 0x01400140 }, + { 0x00000040, 0x20283c22, 0x00000008, 0x00200020 }, + { 0x00000001, 0x203801e2, 0x00000000, 0x00010001 }, + { 0x00800001, 0x204001ae, 0x00b10020, 0x00000000 }, + { 0x00000008, 0x27e03d29, 0x000002a0, 0x00010001 }, + { 0x00800031, 0x20000128, 0x608d07e0, 0x00000200 }, + { 0x00000006, 0x203025a2, 0x00000066, 0x000002a0 }, + { 0x01600031, 0x20001c00, 0x708d0000, 0x02000001 }, + { 0x00000001, 0x20300022, 0x00000010, 0x00000000 }, + { 0x00000001, 0x22a00169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22600169, 0x00000000, 0x00020002 }, + { 0x00200401, 0x208000e5, 0x00000000, 0x00000000 }, + { 0x00000c01, 0x208800e5, 0x00000000, 0xffffffc6 }, + { 0x00000801, 0x208c00e5, 0x00000000, 0xffffffca }, + { 0x00200001, 0x260001ec, 0x00000000, 0x00000000 }, + { 0x00600001, 0x20000022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20283c22, 0x00000008, 0x00100010 }, + { 0x00000001, 0x206001ed, 0x00000000, 0x00020002 }, + { 0x00000001, 0x206201ad, 0x0000005a, 0x00000000 }, + { 0x00000001, 0x20a001ed, 0x00000000, 0x00000000 }, + { 0x00200001, 0x228001ed, 0x00000000, 0x00000000 }, + { 0x00802001, 0x20c00061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21000061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21400061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21800061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21c00061, 0x00000000, 0x00ff00ff }, + { 0x00000041, 0x22083dac, 0x00000056, 0x00040004 }, + { 0x05000010, 0x200035ac, 0x02000280, 0x00000240 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000004 }, + { 0x00000040, 0x22803dad, 0x00000280, 0xffffffff }, + { 0x00000030, 0x32000084, 0x00001200, 0x00000000 }, + { 0x01000010, 0x20002d28, 0x000090c2, 0x00000000 }, + { 0x03000010, 0x200035ac, 0x02000054, 0x00000058 }, + { 0x00000041, 0x22a03dad, 0x00000056, 0x00040004 }, + { 0x00010220, 0x34001c00, 0x00001400, 0xfffffff4 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000014 }, + { 0x00200001, 0xb0c00229, 0x00450054, 0x00000000 }, + { 0x00200040, 0x22803dad, 0x00450280, 0x00010001 }, + { 0x00000001, 0x20300022, 0x00000010, 0x00000000 }, + { 0x00000001, 0x20380122, 0x00000260, 0x00000000 }, + { 0x00800001, 0x204001ae, 0x00b10040, 0x00000000 }, + { 0x00000008, 0x20003d2a, 0x000002a0, 0x00010001 }, + { 0x00000040, 0x22602d29, 0x00000260, 0x00020002 }, + { 0x00800031, 0x20000008, 0x608d0000, 0x00000200 }, + { 0x00000006, 0x203025a2, 0x00000066, 0x000002a0 }, + { 0x01600031, 0x20001c00, 0x708d0000, 0x02000001 }, + { 0x04200010, 0x200035ac, 0x00450054, 0x00450060 }, + { 0x00010040, 0x20a03dad, 0x02000056, 0x00010001 }, + { 0x05200010, 0x200035ac, 0x02450280, 0x00450240 }, + { 0x00000001, 0x240001ec, 0x00000000, 0x00040004 }, + { 0x00000048, 0x22083dac, 0x00000056, 0x00040004 }, + { 0x00200040, 0x205455ad, 0x00450054, 0x00450034 }, + { 0x02000010, 0x20003d8c, 0x00000600, 0x00010001 }, + { 0x00000041, 0x220e3d8c, 0x00000602, 0x00040004 }, + { 0x00010041, 0x22083dac, 0x000000a0, 0x00040004 }, + { 0x00010401, 0x205601ad, 0x000000a0, 0x00000000 }, + { 0x00010840, 0x20543d2d, 0x000090c0, 0x00010001 }, + { 0x00000220, 0x34001400, 0x00001400, 0x00009c80 }, + { 0x01000010, 0x20003dac, 0x02000280, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000006 }, + { 0x00000030, 0x32000084, 0x00001200, 0x00000000 }, + { 0x00000040, 0x22803dad, 0x00000280, 0xffffffff }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffff6 }, + { 0x05000010, 0x200035ac, 0x00000240, 0x00000026 }, + { 0x00010220, 0x34001c00, 0x00001400, 0xfffffffc }, + { 0x07600031, 0x20001c20, 0x30000000, 0x02000001 }, + { 0x01600031, 0x20001c24, 0x708d0000, 0x82000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, + { 0x00600009, 0x25c03dad, 0x00050034, 0x00040004 }, + { 0x00000001, 0x220801ec, 0x00000000, 0x02400240 }, + { 0x00000041, 0x20263d29, 0x00000036, 0x00040004 }, + { 0x00000041, 0x25e435a1, 0x00000020, 0x00000036 }, + { 0x00000040, 0x25e43421, 0x000005e4, 0x00000034 }, + { 0x00000041, 0x27e82c21, 0x000005e4, 0x00400040 }, + { 0x01600031, 0x22401c21, 0x408d07e0, 0x02885800 }, + { 0x01800005, 0x20002d28, 0x02b19040, 0xffffffff }, + { 0x02000005, 0x20003e2c, 0x00009030, 0x00010001 }, + { 0x00000040, 0x25c43dad, 0x000005c4, 0xfffcfffc }, + { 0x00000001, 0x25e20129, 0x00000036, 0x00000000 }, + { 0x000b0220, 0x34001c00, 0x02001400, 0x0000018c }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000018a }, + { 0x00000040, 0x25ca3dad, 0x000005ca, 0xfffcfffc }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00200401, 0x27e001a1, 0x004505c0, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x000f000f }, + { 0x00010001, 0x22000060, 0x02000000, 0x0288e701 }, + { 0x00110001, 0x22000060, 0x02000000, 0x0288e601 }, + { 0x01600031, 0x20c00021, 0x408d07e0, 0x00000200 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00200401, 0x27e001a1, 0x004505c8, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0003000f }, + { 0x00010001, 0x22000060, 0x02000000, 0x02286703 }, + { 0x00110001, 0x22000060, 0x02000000, 0x02286603 }, + { 0x03600031, 0x20800021, 0x408d07e0, 0x00000200 }, + { 0x00800401, 0x23800231, 0x00a900c0, 0x00000000 }, + { 0x00800801, 0x23900231, 0x00a90100, 0x00000000 }, + { 0x00800401, 0x23a00231, 0x00a90140, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00a90180, 0x00000000 }, + { 0x00800401, 0x23c00231, 0x00a900c4, 0x00000000 }, + { 0x00800801, 0x23d00231, 0x00a90104, 0x00000000 }, + { 0x00800401, 0x23e00231, 0x00a90144, 0x00000000 }, + { 0x00800801, 0x23f00231, 0x00a90184, 0x00000000 }, + { 0x00800401, 0x24000231, 0x00a900c8, 0x00000000 }, + { 0x00800801, 0x24100231, 0x00a90108, 0x00000000 }, + { 0x00800401, 0x24200231, 0x00a90148, 0x00000000 }, + { 0x00800801, 0x24300231, 0x00a90188, 0x00000000 }, + { 0x00800401, 0x24400231, 0x00a900cc, 0x00000000 }, + { 0x00800801, 0x24500231, 0x00a9010c, 0x00000000 }, + { 0x00800401, 0x24600231, 0x00a9014c, 0x00000000 }, + { 0x00800801, 0x24700231, 0x00a9018c, 0x00000000 }, + { 0x00800401, 0x20c00231, 0x00cf0380, 0x00000000 }, + { 0x00800801, 0x20d00231, 0x00cf0381, 0x00000000 }, + { 0x00800401, 0x20e00231, 0x00cf0382, 0x00000000 }, + { 0x00800801, 0x20f00231, 0x00cf0383, 0x00000000 }, + { 0x00800401, 0x21000231, 0x00cf03c0, 0x00000000 }, + { 0x00800801, 0x21100231, 0x00cf03c1, 0x00000000 }, + { 0x00800401, 0x21200231, 0x00cf03c2, 0x00000000 }, + { 0x00800801, 0x21300231, 0x00cf03c3, 0x00000000 }, + { 0x00800401, 0x21400231, 0x00cf0400, 0x00000000 }, + { 0x00800801, 0x21500231, 0x00cf0401, 0x00000000 }, + { 0x00800401, 0x21600231, 0x00cf0402, 0x00000000 }, + { 0x00800801, 0x21700231, 0x00cf0403, 0x00000000 }, + { 0x00800401, 0x21800231, 0x00cf0440, 0x00000000 }, + { 0x00800801, 0x21900231, 0x00cf0441, 0x00000000 }, + { 0x00800401, 0x21a00231, 0x00cf0442, 0x00000000 }, + { 0x00800801, 0x21b00231, 0x00cf0443, 0x00000000 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00400040 }, + { 0x00000008, 0x25e83e2d, 0x00009080, 0x00020002 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00400040 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c000c0 }, + { 0x00200401, 0x25d0022d, 0x00459080, 0x00000000 }, + { 0x00200c01, 0x25d80129, 0x00459050, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x00699060, 0x00000000 }, + { 0x00000040, 0x25e83dad, 0x000005e8, 0x00020002 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0xfffffb8c }, + { 0x00000008, 0x25e83e2d, 0x00009084, 0x00020002 }, + { 0x00200401, 0x25d0022d, 0x00459084, 0x00000000 }, + { 0x00000801, 0x25da01e9, 0x00000000, 0x00000000 }, + { 0x00000040, 0x25e83dad, 0x000005e8, 0x00020002 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00200020 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00c000c0 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01000100 }, + { 0x00000401, 0x25d80129, 0x00009040, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x00699064, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0xfffffb76 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00100010 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x01000100 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01400140 }, + { 0x00000401, 0x25d80129, 0x00009042, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x00699068, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0xfffffb68 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00200020 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x01400140 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01800180 }, + { 0x00000401, 0x25d80129, 0x00009044, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x0069906c, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0xfffffb5a }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00200401, 0x27e001a1, 0x004505c4, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x000f0003 }, + { 0x00800401, 0x23400231, 0x00a90040, 0x00000000 }, + { 0x00800801, 0x23500231, 0x00a90044, 0x00000000 }, + { 0x00800401, 0x23600231, 0x00a90048, 0x00000000 }, + { 0x00800801, 0x23700231, 0x00a9004c, 0x00000000 }, + { 0x00800001, 0x20400232, 0x002b0340, 0x00000000 }, + { 0x00800001, 0x20500232, 0x002b0350, 0x00000000 }, + { 0x00800001, 0x20600232, 0x002b0360, 0x00000000 }, + { 0x00800001, 0x20700232, 0x002b0370, 0x00000000 }, + { 0x00010001, 0x22000060, 0x02000000, 0x06082703 }, + { 0x00110001, 0x22000060, 0x02000000, 0x06082603 }, + { 0x01600031, 0x20000020, 0x508d07e0, 0x00000200 }, + { 0x00800401, 0x23800231, 0x00a900c0, 0x00000000 }, + { 0x00800801, 0x23900231, 0x00a90100, 0x00000000 }, + { 0x00800401, 0x23a00231, 0x00a90140, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00a90180, 0x00000000 }, + { 0x00800401, 0x23c00231, 0x00a900c4, 0x00000000 }, + { 0x00800801, 0x23d00231, 0x00a90104, 0x00000000 }, + { 0x00800401, 0x23e00231, 0x00a90144, 0x00000000 }, + { 0x00800801, 0x23f00231, 0x00a90184, 0x00000000 }, + { 0x00800401, 0x24000231, 0x00a900c8, 0x00000000 }, + { 0x00800801, 0x24100231, 0x00a90108, 0x00000000 }, + { 0x00800401, 0x24200231, 0x00a90148, 0x00000000 }, + { 0x00800801, 0x24300231, 0x00a90188, 0x00000000 }, + { 0x00800401, 0x24400231, 0x00a900cc, 0x00000000 }, + { 0x00800801, 0x24500231, 0x00a9010c, 0x00000000 }, + { 0x00800401, 0x24600231, 0x00a9014c, 0x00000000 }, + { 0x00800801, 0x24700231, 0x00a9018c, 0x00000000 }, + { 0x00800401, 0x20c00231, 0x00cf0380, 0x00000000 }, + { 0x00800801, 0x20d00231, 0x00cf0381, 0x00000000 }, + { 0x00800401, 0x20e00231, 0x00cf0382, 0x00000000 }, + { 0x00800801, 0x20f00231, 0x00cf0383, 0x00000000 }, + { 0x00800401, 0x21000231, 0x00cf03c0, 0x00000000 }, + { 0x00800801, 0x21100231, 0x00cf03c1, 0x00000000 }, + { 0x00800401, 0x21200231, 0x00cf03c2, 0x00000000 }, + { 0x00800801, 0x21300231, 0x00cf03c3, 0x00000000 }, + { 0x00800401, 0x21400231, 0x00cf0400, 0x00000000 }, + { 0x00800801, 0x21500231, 0x00cf0401, 0x00000000 }, + { 0x00800401, 0x21600231, 0x00cf0402, 0x00000000 }, + { 0x00800801, 0x21700231, 0x00cf0403, 0x00000000 }, + { 0x00800401, 0x21800231, 0x00cf0440, 0x00000000 }, + { 0x00800801, 0x21900231, 0x00cf0441, 0x00000000 }, + { 0x00800401, 0x21a00231, 0x00cf0442, 0x00000000 }, + { 0x00800801, 0x21b00231, 0x00cf0443, 0x00000000 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00800080 }, + { 0x00000008, 0x25e83e2d, 0x00009082, 0x00020002 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00800080 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c000c0 }, + { 0x00200401, 0x25d0022d, 0x00459082, 0x00000000 }, + { 0x00200c01, 0x25d80129, 0x00459054, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x00699070, 0x00000000 }, + { 0x00000040, 0x25e83dad, 0x000005e8, 0x00020002 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0xfffffaea }, + { 0x00000008, 0x25e83e2d, 0x00009084, 0x00020002 }, + { 0x00200401, 0x25d0022d, 0x00459084, 0x00000000 }, + { 0x00000801, 0x25da01e9, 0x00000000, 0x00000000 }, + { 0x00000040, 0x25e83dad, 0x000005e8, 0x00020002 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00200020 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00c000c0 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01000100 }, + { 0x00000401, 0x25d80129, 0x00009046, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x00699074, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0xfffffad4 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00100010 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x01000100 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01400140 }, + { 0x00000401, 0x25d80129, 0x00009048, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x00699078, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0xfffffac6 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00200020 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x01400140 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01800180 }, + { 0x00000401, 0x25d80129, 0x0000904a, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x0069907c, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0xfffffab8 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00200401, 0x27e001a1, 0x004505c0, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x000f000f }, + { 0x00802001, 0x20400022, 0x008d00c0, 0x00000000 }, + { 0x00802001, 0x20800022, 0x008d0100, 0x00000000 }, + { 0x00802001, 0x20c00022, 0x008d0140, 0x00000000 }, + { 0x00802001, 0x21000022, 0x008d0180, 0x00000000 }, + { 0x00010001, 0x22000060, 0x02000000, 0x12082703 }, + { 0x00110001, 0x22000060, 0x02000000, 0x12082603 }, + { 0x01600031, 0x20000020, 0x508d07e0, 0x00000200 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00200401, 0x27e001a1, 0x004505c8, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0003000f }, + { 0x00802001, 0x20400022, 0x008d0080, 0x00000000 }, + { 0x00010001, 0x22000060, 0x02000000, 0x0618a703 }, + { 0x00110001, 0x22000060, 0x02000000, 0x0618a603 }, + { 0x01600031, 0x26400021, 0x508d07e0, 0x00000200 }, + { 0x00800401, 0x23400231, 0x00a900cc, 0x00000000 }, + { 0x00800801, 0x23500231, 0x00a9010c, 0x00000000 }, + { 0x00800401, 0x23600231, 0x00a9014c, 0x00000000 }, + { 0x00800801, 0x23700231, 0x00a9018c, 0x00000000 }, + { 0x00800401, 0x23800231, 0x00cf0340, 0x00000000 }, + { 0x00800801, 0x23900231, 0x00cf0341, 0x00000000 }, + { 0x00800401, 0x23a00231, 0x00cf0342, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00cf0343, 0x00000000 }, + { 0x00802001, 0x202000a2, 0x008d0380, 0x00000000 }, + { 0x00000008, 0x27e03d29, 0x00000026, 0x00010001 }, + { 0x00800031, 0x20001d28, 0x608d07e0, 0x06080020 }, + { 0x00600001, 0x26400021, 0x008d0640, 0x00000000 }, + { 0x00600001, 0x260001e1, 0x00000000, 0x00000000 }, + { 0x00000009, 0x26143da1, 0x000005e2, 0x00120012 }, + { 0x00000440, 0x26141c21, 0x00000614, 0x00020000 }, + { 0x00000c01, 0x26120129, 0x0000000c, 0x00000000 }, + { 0x00000c01, 0x26100169, 0x00000000, 0x12121212 }, + { 0x00400801, 0x26000171, 0x00000000, 0xffffffff }, + { 0x00600031, 0x20001c20, 0x308d0600, 0x82008002 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00020002 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00000440, 0x27e03da1, 0x000005c0, 0x000c000c }, + { 0x00000c01, 0x27e401a1, 0x000005c2, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x000f0003 }, + { 0x00018022, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x22000060, 0x00000000, 0x02286003 }, + { 0x00010040, 0x27e43ca5, 0x020007e4, 0x00100010 }, + { 0x00008024, 0x34001c00, 0x00001400, 0x00010008 }, + { 0x00010001, 0x22000060, 0x02000000, 0x02286703 }, + { 0x00110001, 0x22000060, 0x02000000, 0x02286603 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x02600031, 0x23400025, 0x408d07e0, 0x00000200 }, + { 0x00800401, 0x23800231, 0x00cf0340, 0x00000000 }, + { 0x00800801, 0x23900231, 0x00cf0341, 0x00000000 }, + { 0x00800401, 0x23a00231, 0x00cf0342, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00cf0343, 0x00000000 }, + { 0x00802001, 0x202000a2, 0x008d0380, 0x00000000 }, + { 0x00000008, 0x27e03d29, 0x00000026, 0x00010001 }, + { 0x00800031, 0x20001d28, 0x608d07e0, 0x06080020 }, + { 0x00600001, 0x260001e1, 0x00000000, 0x00000000 }, + { 0x00000009, 0x26143da1, 0x000005e2, 0x00120012 }, + { 0x00000440, 0x26141c21, 0x00000614, 0x00020000 }, + { 0x00000c01, 0x26120129, 0x0000000c, 0x00000000 }, + { 0x00000c01, 0x26100169, 0x00000000, 0x12121212 }, + { 0x00400801, 0x26000171, 0x00000000, 0xffffffff }, + { 0x00600031, 0x20001c20, 0x308d0600, 0x82008002 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, + { 0x00a02001, 0x20400169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x206601ed, 0x00000000, 0x00030003 }, + { 0x00000009, 0x20663dad, 0x00000066, 0x000a000a }, + { 0x00000001, 0x206801ed, 0x00000000, 0x01400140 }, + { 0x00000001, 0x22600169, 0x00000000, 0x00030003 }, + { 0x00000008, 0x22403dad, 0x00000026, 0x00010001 }, + { 0x00000041, 0x224235ad, 0x00000020, 0x00000022 }, + { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 }, + { 0x00000001, 0x203c0022, 0x00000018, 0x00000000 }, + { 0x00000001, 0x203f01f2, 0x00000000, 0x00000000 }, + { 0x00000001, 0x202c00e2, 0x00000000, 0x00000000 }, + { 0x00000001, 0x202c010a, 0x00000e00, 0x00000000 }, + { 0x00600001, 0x20400021, 0x008d0020, 0x00000000 }, + { 0x00400001, 0x205401ed, 0x00000000, 0x00000000 }, + { 0x00200040, 0x20583dad, 0x00450020, 0xffffffff }, + { 0x00000001, 0x22000060, 0x00000000, 0x06080000 }, + { 0x00600001, 0x26000021, 0x008d0000, 0x00000000 }, + { 0x00000001, 0x26140061, 0x00000000, 0x00c00400 }, + { 0x00000001, 0x26100169, 0x00000000, 0x12121212 }, + { 0x07600031, 0x26201c21, 0x308d0600, 0x02000000 }, + { 0x00200401, 0x208000e5, 0x00000000, 0x00000000 }, + { 0x00000c01, 0x208800e5, 0x00000000, 0xffffffc4 }, + { 0x00000801, 0x208c00e5, 0x00000000, 0xffffffc8 }, + { 0x00200001, 0x260001ec, 0x00000000, 0x00000000 }, + { 0x00600001, 0x20000022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20283c22, 0x00000008, 0x00100010 }, + { 0x00000001, 0x206001ed, 0x00000000, 0x00020002 }, + { 0x00000001, 0x206201ad, 0x0000005a, 0x00000000 }, + { 0x00000001, 0x20a001ed, 0x00000000, 0x00000000 }, + { 0x00200001, 0x228001ed, 0x00000000, 0x00000000 }, + { 0x00802001, 0x20c00061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21000061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21400061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21800061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21c00061, 0x00000000, 0x00ff00ff }, + { 0x00000041, 0x22083dac, 0x00000056, 0x00040004 }, + { 0x05000010, 0x200035ac, 0x02000280, 0x00000240 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000004 }, + { 0x00000040, 0x22803dad, 0x00000280, 0xffffffff }, + { 0x00000030, 0x32000084, 0x00001200, 0x00000000 }, + { 0x01000010, 0x20002d28, 0x000090c2, 0x00000000 }, + { 0x03000010, 0x200035ac, 0x02000054, 0x00000058 }, + { 0x00800001, 0x240001ac, 0x00000068, 0x00000000 }, + { 0x00000048, 0x22a03dad, 0x00000056, 0x00040004 }, + { 0x00010220, 0x34001c00, 0x00001400, 0xfffffff2 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000014 }, + { 0x00200001, 0xb0c00229, 0x00450054, 0x00000000 }, + { 0x00200040, 0x22803dad, 0x00450280, 0x00010001 }, + { 0x00000001, 0x20300022, 0x00000010, 0x00000000 }, + { 0x00000001, 0x20380122, 0x00000260, 0x00000000 }, + { 0x00800001, 0x204001ae, 0x00b10040, 0x00000000 }, + { 0x00000008, 0x20003d2a, 0x000002a0, 0x00010001 }, + { 0x00000040, 0x22602d29, 0x00000260, 0x00020002 }, + { 0x00800031, 0x20000008, 0x608d0000, 0x00000200 }, + { 0x00000006, 0x203025a2, 0x00000066, 0x000002a0 }, + { 0x01600031, 0x20001c00, 0x708d0000, 0x02000001 }, + { 0x04200010, 0x200035ac, 0x00450054, 0x00450060 }, + { 0x00010040, 0x20a03dad, 0x02000056, 0x00010001 }, + { 0x05200010, 0x200035ac, 0x02450280, 0x00450240 }, + { 0x00000001, 0x240001ec, 0x00000000, 0x00040004 }, + { 0x00000048, 0x22083dac, 0x00000056, 0x00040004 }, + { 0x00200040, 0x205455ad, 0x00450054, 0x00450034 }, + { 0x02000010, 0x20003d8c, 0x00000600, 0x00010001 }, + { 0x00000041, 0x220e3d8c, 0x00000602, 0x00040004 }, + { 0x00010041, 0x22083dac, 0x000000a0, 0x00040004 }, + { 0x00010401, 0x205601ad, 0x000000a0, 0x00000000 }, + { 0x00010840, 0x20543d2d, 0x000090c0, 0x00010001 }, + { 0x00000220, 0x34001400, 0x00001400, 0x00009c80 }, + { 0x01000010, 0x20003dac, 0x02000280, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000014 }, + { 0x00000030, 0x32000084, 0x00001200, 0x00000000 }, + { 0x00000040, 0x22803dad, 0x00000280, 0xffffffff }, + { 0x00600401, 0x260001e1, 0x00000000, 0x00000000 }, + { 0x00000c01, 0x26140061, 0x00000000, 0x01800000 }, + { 0x00000c01, 0x26120129, 0x0000000c, 0x00000000 }, + { 0x00000801, 0x26100169, 0x00000000, 0x12121212 }, + { 0x00000040, 0x2078252d, 0x00000026, 0x00004280 }, + { 0x00400001, 0x26000231, 0x00000078, 0x00000000 }, + { 0x00600031, 0x26201c21, 0x308d0600, 0x02000002 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffffe8 }, + { 0x07600031, 0x20001c20, 0x30000000, 0x02000001 }, + { 0x01600031, 0x20001c24, 0x708d0000, 0x82000012 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, + { 0x00600009, 0x25c03dad, 0x00050034, 0x00040004 }, + { 0x00000001, 0x220801ec, 0x00000000, 0x02400240 }, + { 0x00000041, 0x25e435a1, 0x00000020, 0x00000036 }, + { 0x00000040, 0x25e43421, 0x000005e4, 0x00000034 }, + { 0x00000041, 0x27e82c21, 0x000005e4, 0x00400040 }, + { 0x00000001, 0x240001ec, 0x00000000, 0x01400140 }, + { 0x00000048, 0x20263dad, 0x00000036, 0x00040004 }, + { 0x00000040, 0x25c43dad, 0x000005c4, 0xfffcfffc }, + { 0x00000040, 0x25ca3dad, 0x000005ca, 0xfffcfffc }, + { 0x00800001, 0x2220022d, 0x000d002c, 0x00000000 }, + { 0x00600040, 0x22303dad, 0x008d0230, 0x00080008 }, + { 0x01600031, 0x22401c21, 0x408d07e0, 0x02885800 }, + { 0x01800005, 0x20002d28, 0x02b19040, 0xffffffff }, + { 0x02000005, 0x20003e2c, 0x00009030, 0x00010001 }, + { 0x00000001, 0x25e20129, 0x00000036, 0x00000000 }, + { 0x000b0220, 0x34001c00, 0x02001400, 0x0000013a }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000138 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00000401, 0x27e001a1, 0x000005c0, 0x00000000 }, + { 0x00000c0c, 0x27e43da1, 0x000005c2, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0007000f }, + { 0x00010001, 0x22000060, 0x02000000, 0x0248e702 }, + { 0x00110001, 0x22000060, 0x02000000, 0x0248e602 }, + { 0x02600031, 0x20c00021, 0x408d07e0, 0x00000200 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00000401, 0x27e001a1, 0x000005c8, 0x00000000 }, + { 0x00000c0c, 0x27e43da1, 0x000005ca, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0001000f }, + { 0x00010001, 0x22000060, 0x02000000, 0x02186704 }, + { 0x00110001, 0x22000060, 0x02000000, 0x02186604 }, + { 0x02600031, 0x20800021, 0x408d07e0, 0x00000200 }, + { 0x00800001, 0x2380012d, 0x008900c0, 0x00000000 }, + { 0x00800001, 0x23a0012d, 0x00890100, 0x00000000 }, + { 0x00800001, 0x23c0012d, 0x008900c8, 0x00000000 }, + { 0x00800001, 0x23e0012d, 0x00890108, 0x00000000 }, + { 0x00600401, 0x20c001a9, 0x00ab0380, 0x00000000 }, + { 0x00600801, 0x20d001a9, 0x00ab0382, 0x00000000 }, + { 0x00600401, 0x20e001a9, 0x00ab0384, 0x00000000 }, + { 0x00600801, 0x20f001a9, 0x00ab0386, 0x00000000 }, + { 0x00600401, 0x210001a9, 0x00ab03c0, 0x00000000 }, + { 0x00600801, 0x211001a9, 0x00ab03c2, 0x00000000 }, + { 0x00600401, 0x212001a9, 0x00ab03c4, 0x00000000 }, + { 0x00600801, 0x213001a9, 0x00ab03c6, 0x00000000 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00400040 }, + { 0x00800008, 0x2340352d, 0x00009050, 0x008d0220 }, + { 0x00800008, 0x2360352d, 0x00009052, 0x008d0220 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x02600005, 0x20003dac, 0x00ae0340, 0x00010001 }, + { 0x02600005, 0x20003dac, 0x02ae0360, 0x00010001 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00400040 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c000c0 }, + { 0x00200401, 0x25d0022d, 0x004590c0, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990a0, 0x00000000 }, + { 0x00200001, 0x25d80109, 0x00450600, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffc0c }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00410041 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c100c1 }, + { 0x00200401, 0x25d0022d, 0x004590c8, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990b0, 0x00000000 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffbfe }, + { 0x00800008, 0x2340352d, 0x00009042, 0x008d0220 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00e000e0 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01000100 }, + { 0x00200401, 0x25d0022d, 0x004590c4, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990a4, 0x00000000 }, + { 0x02600005, 0x20003dac, 0x00ae0340, 0x00010001 }, + { 0x00000001, 0x260201e8, 0x00000000, 0x00000000 }, + { 0x00000401, 0x25da01e9, 0x00000000, 0x00000000 }, + { 0x00000801, 0x25d80109, 0x00000600, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffbe8 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00e100e1 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01010101 }, + { 0x00200401, 0x25d0022d, 0x004590cc, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990b4, 0x00000000 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffbda }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00000401, 0x27e001a1, 0x000005c4, 0x00000000 }, + { 0x00000c0c, 0x27e43da1, 0x000005c6, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x00070003 }, + { 0x00600401, 0x2340012d, 0x00890040, 0x00000000 }, + { 0x00600801, 0x2350012d, 0x00890048, 0x00000000 }, + { 0x00600001, 0x204001aa, 0x00270340, 0x00000000 }, + { 0x00600001, 0x205001aa, 0x00270350, 0x00000000 }, + { 0x00010001, 0x22000060, 0x02000000, 0x04082704 }, + { 0x00110001, 0x22000060, 0x02000000, 0x04082604 }, + { 0x01600031, 0x20000020, 0x508d07e0, 0x00000200 }, + { 0x00800001, 0x2380012d, 0x008900c0, 0x00000000 }, + { 0x00800001, 0x23a0012d, 0x00890100, 0x00000000 }, + { 0x00800001, 0x23c0012d, 0x008900c8, 0x00000000 }, + { 0x00800001, 0x23e0012d, 0x00890108, 0x00000000 }, + { 0x00600401, 0x20c001a9, 0x00ab0380, 0x00000000 }, + { 0x00600801, 0x20d001a9, 0x00ab0382, 0x00000000 }, + { 0x00600401, 0x20e001a9, 0x00ab0384, 0x00000000 }, + { 0x00600801, 0x20f001a9, 0x00ab0386, 0x00000000 }, + { 0x00600401, 0x210001a9, 0x00ab03c0, 0x00000000 }, + { 0x00600801, 0x211001a9, 0x00ab03c2, 0x00000000 }, + { 0x00600401, 0x212001a9, 0x00ab03c4, 0x00000000 }, + { 0x00600801, 0x213001a9, 0x00ab03c6, 0x00000000 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00800080 }, + { 0x00800008, 0x2340352d, 0x00009054, 0x008d0220 }, + { 0x00800008, 0x2360352d, 0x00009056, 0x008d0220 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x02600005, 0x20003dac, 0x00ae0340, 0x00010001 }, + { 0x02600005, 0x20003dac, 0x02ae0360, 0x00010001 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00800080 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c000c0 }, + { 0x00200401, 0x25d0022d, 0x004590c2, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990a8, 0x00000000 }, + { 0x00200001, 0x25d80109, 0x00450600, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffb92 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00810081 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c100c1 }, + { 0x00200401, 0x25d0022d, 0x004590ca, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990b8, 0x00000000 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffb84 }, + { 0x00800008, 0x2340352d, 0x00009048, 0x008d0220 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00e000e0 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01000100 }, + { 0x00200401, 0x25d0022d, 0x004590c4, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990ac, 0x00000000 }, + { 0x02600005, 0x20003dac, 0x00ae0340, 0x00010001 }, + { 0x00000001, 0x260201e8, 0x00000000, 0x00000000 }, + { 0x00000401, 0x25da01e9, 0x00000000, 0x00000000 }, + { 0x00000801, 0x25d80109, 0x00000600, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffb6e }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00e100e1 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01010101 }, + { 0x00200401, 0x25d0022d, 0x004590cc, 0x00000000 }, + { 0x00400801, 0x25d40231, 0x006990bc, 0x00000000 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffb60 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00000401, 0x27e001a1, 0x000005c0, 0x00000000 }, + { 0x00000c0c, 0x27e43da1, 0x000005c2, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0007000f }, + { 0x00802001, 0x20400022, 0x008d00c0, 0x00000000 }, + { 0x00802001, 0x20800022, 0x008d0100, 0x00000000 }, + { 0x00010001, 0x22000060, 0x02000000, 0x0a082704 }, + { 0x00110001, 0x22000060, 0x02000000, 0x0a082604 }, + { 0x01600031, 0x20000020, 0x508d07e0, 0x00000200 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00000401, 0x27e001a1, 0x000005c8, 0x00000000 }, + { 0x00000c0c, 0x27e43da1, 0x000005ca, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0001000f }, + { 0x00600001, 0x20400022, 0x008d0080, 0x00000000 }, + { 0x00010001, 0x22000060, 0x02000000, 0x0418a704 }, + { 0x00110001, 0x22000060, 0x02000000, 0x0418a604 }, + { 0x01600031, 0x26400021, 0x508d07e0, 0x00000200 }, + { 0x00600401, 0x2340012d, 0x008500cc, 0x00000000 }, + { 0x00600801, 0x2350012d, 0x0085010c, 0x00000000 }, + { 0x00800001, 0x236001ad, 0x002e0340, 0x00000000 }, + { 0x00600001, 0x202000a2, 0x008d0360, 0x00000000 }, + { 0x00000008, 0x27e03d29, 0x00000026, 0x00010001 }, + { 0x00800031, 0x20001d28, 0x608d07e0, 0x04080020 }, + { 0x00600001, 0x26400021, 0x008d0640, 0x00000000 }, + { 0x00600001, 0x260001e1, 0x00000000, 0x00000000 }, + { 0x00000009, 0x26143da1, 0x000005e2, 0x00120012 }, + { 0x00000440, 0x26141c21, 0x00000614, 0x00020000 }, + { 0x00000c01, 0x26120129, 0x0000000c, 0x00000000 }, + { 0x00000c01, 0x26100169, 0x00000000, 0x12121212 }, + { 0x00400801, 0x26000171, 0x00000000, 0xffffffff }, + { 0x00600031, 0x20001c20, 0x308d0600, 0x82008002 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00020002 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00000440, 0x27e03da1, 0x000005c0, 0x000c000c }, + { 0x00000c0c, 0x27e43da1, 0x000005c2, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x00070003 }, + { 0x00018022, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x22000060, 0x00000000, 0x02186004 }, + { 0x00010040, 0x27e43ca5, 0x020007e4, 0x00080008 }, + { 0x00008024, 0x34001c00, 0x00001400, 0x00010008 }, + { 0x00010001, 0x22000060, 0x02000000, 0x02186704 }, + { 0x00110001, 0x22000060, 0x02000000, 0x02186604 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x02600031, 0x23400025, 0x408d07e0, 0x00000200 }, + { 0x00800001, 0x236001ad, 0x002e0340, 0x00000000 }, + { 0x00600001, 0x202000a2, 0x008d0360, 0x00000000 }, + { 0x00000008, 0x27e03d29, 0x00000026, 0x00010001 }, + { 0x00800031, 0x20001d28, 0x608d07e0, 0x04080020 }, + { 0x00600001, 0x260001e1, 0x00000000, 0x00000000 }, + { 0x00000009, 0x26143da1, 0x000005e2, 0x00120012 }, + { 0x00000440, 0x26141c21, 0x00000614, 0x00020000 }, + { 0x00000c01, 0x26120129, 0x0000000c, 0x00000000 }, + { 0x00000c01, 0x26100169, 0x00000000, 0x12121212 }, + { 0x00400801, 0x26000171, 0x00000000, 0xffffffff }, + { 0x00600031, 0x20001c20, 0x308d0600, 0x82008002 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, + { 0x00a02001, 0x20400169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x206601ed, 0x00000000, 0x00010001 }, + { 0x00000009, 0x20663dad, 0x00000066, 0x000a000a }, + { 0x00000001, 0x22600169, 0x00000000, 0x00010001 }, + { 0x00000008, 0x22403dad, 0x00000026, 0x00010001 }, + { 0x00000041, 0x224235ad, 0x00000020, 0x00000022 }, + { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 }, + { 0x00000001, 0x203c0022, 0x00000018, 0x00000000 }, + { 0x00000001, 0x203f01f2, 0x00000000, 0x00000000 }, + { 0x00000001, 0x202c00e2, 0x00000000, 0x00000000 }, + { 0x00000001, 0x202c010a, 0x00000e00, 0x00000000 }, + { 0x00600001, 0x20400021, 0x008d0020, 0x00000000 }, + { 0x00400001, 0x205401ed, 0x00000000, 0x00000000 }, + { 0x00200040, 0x20583dad, 0x00450020, 0xffffffff }, + { 0x00000001, 0x22000060, 0x00000000, 0x06080000 }, + { 0x00600001, 0x26000021, 0x008d0000, 0x00000000 }, + { 0x00000001, 0x26140061, 0x00000000, 0x00c00400 }, + { 0x00000001, 0x26100169, 0x00000000, 0x12121212 }, + { 0x07600031, 0x26201c21, 0x308d0600, 0x02000000 }, + { 0x00000001, 0x22a00169, 0x00000000, 0x01400140 }, + { 0x00000040, 0x20283c22, 0x00000008, 0x00200020 }, + { 0x00000001, 0x203801e2, 0x00000000, 0x00010001 }, + { 0x00800001, 0x204001ae, 0x00b10020, 0x00000000 }, + { 0x00000008, 0x27e03d29, 0x000002a0, 0x00010001 }, + { 0x00800031, 0x20000128, 0x608d07e0, 0x00000200 }, + { 0x00000006, 0x203025a2, 0x00000066, 0x000002a0 }, + { 0x01600031, 0x20001c00, 0x708d0000, 0x02000001 }, + { 0x00000001, 0x20300022, 0x00000010, 0x00000000 }, + { 0x00000001, 0x22a00169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22600169, 0x00000000, 0x00020002 }, + { 0x00200401, 0x208000e5, 0x00000000, 0x00000000 }, + { 0x00000c01, 0x208800e5, 0x00000000, 0xffffffc6 }, + { 0x00000801, 0x208c00e5, 0x00000000, 0xffffffca }, + { 0x00200001, 0x260001ec, 0x00000000, 0x00000000 }, + { 0x00600001, 0x20000022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20283c22, 0x00000008, 0x00100010 }, + { 0x00000001, 0x206001ed, 0x00000000, 0x00020002 }, + { 0x00000001, 0x206201ad, 0x0000005a, 0x00000000 }, + { 0x00000001, 0x20a001ed, 0x00000000, 0x00000000 }, + { 0x00200001, 0x228001ed, 0x00000000, 0x00000000 }, + { 0x00802001, 0x20c00061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21000061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21400061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21800061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21c00061, 0x00000000, 0x00ff00ff }, + { 0x00000041, 0x22083dac, 0x00000056, 0x00040004 }, + { 0x05000010, 0x200035ac, 0x02000280, 0x00000240 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000004 }, + { 0x00000040, 0x22803dad, 0x00000280, 0xffffffff }, + { 0x00000030, 0x32000084, 0x00001200, 0x00000000 }, + { 0x01000010, 0x20002d28, 0x000090c2, 0x00000000 }, + { 0x03000010, 0x200035ac, 0x02000054, 0x00000058 }, + { 0x00000041, 0x22a03dad, 0x00000056, 0x00040004 }, + { 0x00010220, 0x34001c00, 0x00001400, 0xfffffff4 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000014 }, + { 0x00200001, 0xb0c00229, 0x00450054, 0x00000000 }, + { 0x00200040, 0x22803dad, 0x00450280, 0x00010001 }, + { 0x00000001, 0x20300022, 0x00000010, 0x00000000 }, + { 0x00000001, 0x20380122, 0x00000260, 0x00000000 }, + { 0x00800001, 0x204001ae, 0x00b10040, 0x00000000 }, + { 0x00000008, 0x20003d2a, 0x000002a0, 0x00010001 }, + { 0x00000040, 0x22602d29, 0x00000260, 0x00020002 }, + { 0x00800031, 0x20000008, 0x608d0000, 0x00000200 }, + { 0x00000006, 0x203025a2, 0x00000066, 0x000002a0 }, + { 0x01600031, 0x20001c00, 0x708d0000, 0x02000001 }, + { 0x04200010, 0x200035ac, 0x00450054, 0x00450060 }, + { 0x00010040, 0x20a03dad, 0x02000056, 0x00010001 }, + { 0x05200010, 0x200035ac, 0x02450280, 0x00450240 }, + { 0x00000001, 0x240001ec, 0x00000000, 0x00040004 }, + { 0x00000048, 0x22083dac, 0x00000056, 0x00040004 }, + { 0x00200040, 0x205455ad, 0x00450054, 0x00450034 }, + { 0x02000010, 0x20003d8c, 0x00000600, 0x00010001 }, + { 0x00000041, 0x220e3d8c, 0x00000602, 0x00040004 }, + { 0x00010041, 0x22083dac, 0x000000a0, 0x00040004 }, + { 0x00010401, 0x205601ad, 0x000000a0, 0x00000000 }, + { 0x00010840, 0x20543d2d, 0x000090c0, 0x00010001 }, + { 0x00000220, 0x34001400, 0x00001400, 0x00009c80 }, + { 0x01000010, 0x20003dac, 0x02000280, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000006 }, + { 0x00000030, 0x32000084, 0x00001200, 0x00000000 }, + { 0x00000040, 0x22803dad, 0x00000280, 0xffffffff }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffff6 }, + { 0x05000010, 0x200035ac, 0x00000240, 0x00000026 }, + { 0x00010220, 0x34001c00, 0x00001400, 0xfffffffc }, + { 0x07600031, 0x20001c20, 0x30000000, 0x02000001 }, + { 0x01600031, 0x20001c24, 0x708d0000, 0x82000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, + { 0x00400441, 0x45c03dad, 0x00000034, 0x00100010 }, + { 0x00400841, 0x45c23dad, 0x00000036, 0x00200020 }, + { 0x00200001, 0x260001ec, 0x00000000, 0x00000000 }, + { 0x00000001, 0x25e20129, 0x00000036, 0x00000000 }, + { 0x00000041, 0x25e435a1, 0x00000020, 0x00000036 }, + { 0x00000040, 0x25e43421, 0x000005e4, 0x00000034 }, + { 0x00000041, 0x25e42c21, 0x000005e4, 0x00800080 }, + { 0x00000040, 0x25c43dad, 0x000005c4, 0xfffcfffc }, + { 0x00000040, 0x25ca3dad, 0x000005ca, 0xfffcfffc }, + { 0x00000005, 0x202a3dad, 0x0000002a, 0xfffdfffd }, + { 0x02000005, 0x20002d2c, 0x0200002a, 0x00020002 }, + { 0x00000001, 0x27e80021, 0x000005e4, 0x00000000 }, + { 0x00010040, 0x27e83c21, 0x020007e8, 0x00400040 }, + { 0x01600031, 0x22401c21, 0x408d07e0, 0x02885800 }, + { 0x00000001, 0x220801ec, 0x00000000, 0x02400240 }, + { 0x01800005, 0x20002d28, 0x02b19040, 0xffffffff }, + { 0x02000005, 0x20003e2c, 0x00009030, 0x00010001 }, + { 0x00000005, 0x25ec2e29, 0x00009002, 0x000a000a }, + { 0x00000005, 0x25ea2e29, 0x00009002, 0x00060006 }, + { 0x000b0220, 0x34001c00, 0x02001400, 0x00000252 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000250 }, + { 0x01000010, 0x20003d2c, 0x000005ec, 0x00080008 }, + { 0x00000005, 0x25e03d8d, 0x00000600, 0x00010001 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00020002 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00200401, 0x27e001a5, 0x004505c0, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x000f000f }, + { 0x00018022, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x22000060, 0x00000000, 0x0288a001 }, + { 0x00010040, 0x27e43ca5, 0x020007e4, 0x00100010 }, + { 0x00008024, 0x34001c00, 0x00001400, 0x0001000a }, + { 0x00010001, 0x22000060, 0x02000000, 0x0288e701 }, + { 0x00110001, 0x22000060, 0x02000000, 0x0288e601 }, + { 0x0000000c, 0x27e43ca5, 0x000007e4, 0x00010001 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x01600031, 0x20c00021, 0x408d07e0, 0x00000200 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00020002 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00200401, 0x27e001a1, 0x004505c4, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x000f0003 }, + { 0x00018022, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x22000060, 0x00000000, 0x02286003 }, + { 0x00010040, 0x27e43ca5, 0x020007e4, 0x00100010 }, + { 0x00008024, 0x34001c00, 0x00001400, 0x0001000a }, + { 0x00010001, 0x22000060, 0x02000000, 0x02286703 }, + { 0x00110001, 0x22000060, 0x02000000, 0x02286603 }, + { 0x0000000c, 0x27e43ca5, 0x000007e4, 0x00010001 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x02600031, 0x23400025, 0x408d07e0, 0x00000200 }, + { 0x00800401, 0x23800231, 0x00a900c0, 0x00000000 }, + { 0x00800801, 0x23900231, 0x00a90100, 0x00000000 }, + { 0x00800401, 0x23a00231, 0x00a90140, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00a90180, 0x00000000 }, + { 0x00800401, 0x23c00231, 0x00a900c4, 0x00000000 }, + { 0x00800801, 0x23d00231, 0x00a90104, 0x00000000 }, + { 0x00800401, 0x23e00231, 0x00a90144, 0x00000000 }, + { 0x00800801, 0x23f00231, 0x00a90184, 0x00000000 }, + { 0x00800401, 0x24000231, 0x00a900c8, 0x00000000 }, + { 0x00800801, 0x24100231, 0x00a90108, 0x00000000 }, + { 0x00800401, 0x24200231, 0x00a90148, 0x00000000 }, + { 0x00800801, 0x24300231, 0x00a90188, 0x00000000 }, + { 0x00800401, 0x24400231, 0x00a900cc, 0x00000000 }, + { 0x00800801, 0x24500231, 0x00a9010c, 0x00000000 }, + { 0x00800401, 0x24600231, 0x00a9014c, 0x00000000 }, + { 0x00800801, 0x24700231, 0x00a9018c, 0x00000000 }, + { 0x00800401, 0x20c00231, 0x00cf0380, 0x00000000 }, + { 0x00800801, 0x20d00231, 0x00cf0381, 0x00000000 }, + { 0x00800401, 0x20e00231, 0x00cf0382, 0x00000000 }, + { 0x00800801, 0x20f00231, 0x00cf0383, 0x00000000 }, + { 0x00800401, 0x21000231, 0x00cf03c0, 0x00000000 }, + { 0x00800801, 0x21100231, 0x00cf03c1, 0x00000000 }, + { 0x00800401, 0x21200231, 0x00cf03c2, 0x00000000 }, + { 0x00800801, 0x21300231, 0x00cf03c3, 0x00000000 }, + { 0x00800401, 0x21400231, 0x00cf0400, 0x00000000 }, + { 0x00800801, 0x21500231, 0x00cf0401, 0x00000000 }, + { 0x00800401, 0x21600231, 0x00cf0402, 0x00000000 }, + { 0x00800801, 0x21700231, 0x00cf0403, 0x00000000 }, + { 0x00800401, 0x21800231, 0x00cf0440, 0x00000000 }, + { 0x00800801, 0x21900231, 0x00cf0441, 0x00000000 }, + { 0x00800401, 0x21a00231, 0x00cf0442, 0x00000000 }, + { 0x00800801, 0x21b00231, 0x00cf0443, 0x00000000 }, + { 0x00800401, 0x20400231, 0x00cf0340, 0x00000000 }, + { 0x00800801, 0x20500231, 0x00cf0341, 0x00000000 }, + { 0x00800401, 0x20600231, 0x00cf0342, 0x00000000 }, + { 0x00800801, 0x20700231, 0x00cf0343, 0x00000000 }, + { 0x01600010, 0x20003d2c, 0x000005ea, 0x00040004 }, + { 0x01600010, 0x20003d2c, 0x020005ea, 0x00020002 }, + { 0x00800001, 0x21c00229, 0x00009080, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00009081, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00289060, 0x00000000 }, + { 0x00610401, 0x41c00229, 0x00009080, 0x00000000 }, + { 0x00610801, 0x41c20229, 0x00009090, 0x00000000 }, + { 0x00610401, 0x41e00229, 0x00009081, 0x00000000 }, + { 0x00610801, 0x41e20229, 0x00009091, 0x00000000 }, + { 0x00610401, 0x42000229, 0x00249060, 0x00000000 }, + { 0x00610801, 0x42020229, 0x00249098, 0x00000000 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00400040 }, + { 0x00610401, 0x21c00229, 0x02009080, 0x00000000 }, + { 0x00610801, 0x21d00229, 0x02009090, 0x00000000 }, + { 0x00610401, 0x21e00229, 0x02009081, 0x00000000 }, + { 0x00610801, 0x21f00229, 0x02009091, 0x00000000 }, + { 0x00610401, 0x22000229, 0x02249060, 0x00000000 }, + { 0x00610801, 0x22100229, 0x02249098, 0x00000000 }, + { 0x00800008, 0x25a03d29, 0x008d01c0, 0x00020002 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00400040 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c000c0 }, + { 0x00200001, 0x25d80129, 0x00459050, 0x00000000 }, + { 0x00800040, 0x25a03d29, 0x00b105a0, 0x00020002 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001b4 }, + { 0x00800008, 0x25a03e29, 0x00009084, 0x00020002 }, + { 0x00800001, 0x21c00229, 0x00009084, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00009085, 0x00000000 }, + { 0x00000001, 0x25da01e9, 0x00000000, 0x00000000 }, + { 0x00800040, 0x25a03d29, 0x00b105a0, 0x00020002 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00200020 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00c000c0 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01000100 }, + { 0x00000001, 0x25d80129, 0x00009040, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00289064, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000019c }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00100010 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x01000100 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01400140 }, + { 0x00000001, 0x25d80129, 0x00009042, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00289068, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000018e }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00200020 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x01400140 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01800180 }, + { 0x00000001, 0x25d80129, 0x00009044, 0x00000000 }, + { 0x00800001, 0x22000229, 0x0028906c, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000180 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00020002 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00200401, 0x27e001a1, 0x004505c4, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x000f0003 }, + { 0x00800401, 0x23400231, 0x00a90040, 0x00000000 }, + { 0x00800801, 0x23500231, 0x00a90044, 0x00000000 }, + { 0x00800401, 0x23600231, 0x00a90048, 0x00000000 }, + { 0x00800801, 0x23700231, 0x00a9004c, 0x00000000 }, + { 0x00800001, 0x20400232, 0x002b0340, 0x00000000 }, + { 0x00800001, 0x20500232, 0x002b0350, 0x00000000 }, + { 0x00800001, 0x20600232, 0x002b0360, 0x00000000 }, + { 0x00800001, 0x20700232, 0x002b0370, 0x00000000 }, + { 0x00018022, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x22000060, 0x00000000, 0x06082003 }, + { 0x00010040, 0x27e43ca5, 0x020007e4, 0x00100010 }, + { 0x00008024, 0x34001c00, 0x00001400, 0x0001000a }, + { 0x00010001, 0x22000060, 0x02000000, 0x06082703 }, + { 0x00110001, 0x22000060, 0x02000000, 0x06082603 }, + { 0x0000000c, 0x27e43ca5, 0x000007e4, 0x00010001 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x01600031, 0x20000020, 0x508d07e0, 0x00000200 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00020002 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00200401, 0x27e001a1, 0x004505c8, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0003000f }, + { 0x00018022, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x22000060, 0x00000000, 0x02286003 }, + { 0x00010040, 0x27e43ca5, 0x020007e4, 0x00100010 }, + { 0x01000005, 0x20003dac, 0x020005e0, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000006 }, + { 0x00000440, 0x27e43ca5, 0x000007e4, 0xfffcfffc }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0007000f }, + { 0x00000040, 0x22000c00, 0x00000200, 0x00200000 }, + { 0x00008024, 0x34001c00, 0x00001400, 0x0001000c }, + { 0x0000000c, 0x27e43da5, 0x000005c2, 0x00010001 }, + { 0x00010001, 0x22000060, 0x02000000, 0x02286703 }, + { 0x00110001, 0x22000060, 0x02000000, 0x02286603 }, + { 0x00000040, 0x27e43ca5, 0x000007e4, 0xfffcfffc }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x01600031, 0x20400021, 0x408d07e0, 0x00000200 }, + { 0x00800401, 0x23800231, 0x00a900c0, 0x00000000 }, + { 0x00800801, 0x23900231, 0x00a90100, 0x00000000 }, + { 0x00800401, 0x23a00231, 0x00a90140, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00a90180, 0x00000000 }, + { 0x00800401, 0x23c00231, 0x00a900c4, 0x00000000 }, + { 0x00800801, 0x23d00231, 0x00a90104, 0x00000000 }, + { 0x00800401, 0x23e00231, 0x00a90144, 0x00000000 }, + { 0x00800801, 0x23f00231, 0x00a90184, 0x00000000 }, + { 0x00800401, 0x24000231, 0x00a900c8, 0x00000000 }, + { 0x00800801, 0x24100231, 0x00a90108, 0x00000000 }, + { 0x00800401, 0x24200231, 0x00a90148, 0x00000000 }, + { 0x00800801, 0x24300231, 0x00a90188, 0x00000000 }, + { 0x00800401, 0x24400231, 0x00a900cc, 0x00000000 }, + { 0x00800801, 0x24500231, 0x00a9010c, 0x00000000 }, + { 0x00800401, 0x24600231, 0x00a9014c, 0x00000000 }, + { 0x00800801, 0x24700231, 0x00a9018c, 0x00000000 }, + { 0x00800401, 0x20c00231, 0x00cf0380, 0x00000000 }, + { 0x00800801, 0x20d00231, 0x00cf0381, 0x00000000 }, + { 0x00800401, 0x20e00231, 0x00cf0382, 0x00000000 }, + { 0x00800801, 0x20f00231, 0x00cf0383, 0x00000000 }, + { 0x00800401, 0x21000231, 0x00cf03c0, 0x00000000 }, + { 0x00800801, 0x21100231, 0x00cf03c1, 0x00000000 }, + { 0x00800401, 0x21200231, 0x00cf03c2, 0x00000000 }, + { 0x00800801, 0x21300231, 0x00cf03c3, 0x00000000 }, + { 0x00800401, 0x21400231, 0x00cf0400, 0x00000000 }, + { 0x00800801, 0x21500231, 0x00cf0401, 0x00000000 }, + { 0x00800401, 0x21600231, 0x00cf0402, 0x00000000 }, + { 0x00800801, 0x21700231, 0x00cf0403, 0x00000000 }, + { 0x00800401, 0x21800231, 0x00cf0440, 0x00000000 }, + { 0x00800801, 0x21900231, 0x00cf0441, 0x00000000 }, + { 0x00800401, 0x21a00231, 0x00cf0442, 0x00000000 }, + { 0x00800801, 0x21b00231, 0x00cf0443, 0x00000000 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00800080 }, + { 0x00000001, 0x260201ac, 0x000005e0, 0x00000000 }, + { 0x00800008, 0x25a03e29, 0x00009082, 0x00020002 }, + { 0x00200001, 0x25d80129, 0x00459054, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00009082, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00009083, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00289070, 0x00000000 }, + { 0x00800040, 0x25a03d29, 0x00b105a0, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000050 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000000a }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00400040 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c000c0 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000000d4 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000044 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x05000500 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x05400540 }, + { 0x00800001, 0x25000129, 0x00ad0040, 0x00000000 }, + { 0x00800001, 0x25200129, 0x00ad0080, 0x00000000 }, + { 0x00800001, 0x25400129, 0x00ad00c0, 0x00000000 }, + { 0x00800001, 0x25600129, 0x00ad0100, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000000c2 }, + { 0x00600001, 0x20600129, 0x008d0510, 0x00000000 }, + { 0x00600001, 0x20800129, 0x008d0520, 0x00000000 }, + { 0x00600001, 0x20a00129, 0x008d0530, 0x00000000 }, + { 0x00600001, 0x20c00129, 0x008d0540, 0x00000000 }, + { 0x00600001, 0x20e00129, 0x008d0550, 0x00000000 }, + { 0x00600001, 0x21000129, 0x008d0560, 0x00000000 }, + { 0x00800008, 0x25a03e29, 0x00009092, 0x00020002 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x05000500 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x05400540 }, + { 0x00800001, 0x25000129, 0x00ad0050, 0x00000000 }, + { 0x00800001, 0x25200129, 0x00ad0090, 0x00000000 }, + { 0x00800001, 0x25400129, 0x00ad00d0, 0x00000000 }, + { 0x00800001, 0x25600129, 0x00ad0110, 0x00000000 }, + { 0x00200001, 0x25d80129, 0x0045905c, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00009092, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00009093, 0x00000000 }, + { 0x00800001, 0x22000229, 0x0028909c, 0x00000000 }, + { 0x00800040, 0x25a03d29, 0x00b105a0, 0x00020002 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000009a }, + { 0x00600001, 0x20700129, 0x008d0510, 0x00000000 }, + { 0x00600001, 0x20900129, 0x008d0520, 0x00000000 }, + { 0x00600001, 0x20b00129, 0x008d0530, 0x00000000 }, + { 0x00600001, 0x20d00129, 0x008d0540, 0x00000000 }, + { 0x00600001, 0x20f00129, 0x008d0550, 0x00000000 }, + { 0x00600001, 0x21100129, 0x008d0560, 0x00000000 }, + { 0x00800008, 0x25a03e29, 0x00009084, 0x00020002 }, + { 0x00800001, 0x21c00229, 0x00009084, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00009085, 0x00000000 }, + { 0x00000001, 0x25da01e9, 0x00000000, 0x00000000 }, + { 0x00800040, 0x25a03d29, 0x00b105a0, 0x00020002 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00200020 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00c000c0 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01000100 }, + { 0x00000001, 0x25d80129, 0x00009046, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00289074, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000076 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00100010 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x01000100 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01400140 }, + { 0x00000001, 0x25d80129, 0x00009048, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00289078, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000068 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00200020 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x01400140 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01800180 }, + { 0x00000001, 0x25d80129, 0x0000904a, 0x00000000 }, + { 0x00800001, 0x22000229, 0x0028907c, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x0000005a }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00020002 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00200401, 0x27e001a1, 0x004505c0, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x000f000f }, + { 0x00802001, 0x20400022, 0x008d00c0, 0x00000000 }, + { 0x00802001, 0x20800022, 0x008d0100, 0x00000000 }, + { 0x00802001, 0x20c00022, 0x008d0140, 0x00000000 }, + { 0x00802001, 0x21000022, 0x008d0180, 0x00000000 }, + { 0x00018022, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x22000060, 0x00000000, 0x12082003 }, + { 0x00010040, 0x27e43ca5, 0x020007e4, 0x00100010 }, + { 0x00008024, 0x34001c00, 0x00001400, 0x0001000a }, + { 0x00010001, 0x22000060, 0x02000000, 0x12082703 }, + { 0x00110001, 0x22000060, 0x02000000, 0x12082603 }, + { 0x0000000c, 0x27e43ca5, 0x000007e4, 0x00010001 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x01600031, 0x20000020, 0x508d07e0, 0x00000200 }, + { 0x01800005, 0x20003dac, 0x020005e0, 0x00010001 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00020002 }, + { 0x00200401, 0x27e001a1, 0x004505c8, 0x00000000 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0003000f }, + { 0x00812001, 0x20400022, 0x028d0040, 0x00000000 }, + { 0x00912001, 0x20400022, 0x028d0080, 0x00000000 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00018022, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x22000060, 0x00000000, 0x0618a003 }, + { 0x00010040, 0x27e43ca5, 0x020007e4, 0x00100010 }, + { 0x00008024, 0x34001c00, 0x00001400, 0x0001000c }, + { 0x0000000c, 0x27e43da5, 0x000005c2, 0x00010001 }, + { 0x00010001, 0x22000060, 0x02000000, 0x0618a703 }, + { 0x00110001, 0x22000060, 0x02000000, 0x0618a603 }, + { 0x00000040, 0x27e43ca5, 0x000007e4, 0xfffcfffc }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x01600031, 0x26400021, 0x508d07e0, 0x00000200 }, + { 0x01000005, 0x20003dac, 0x0000002a, 0x00020002 }, + { 0x00000006, 0x202a3dad, 0x0000002a, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x00001400, 0xfffffd94 }, + { 0x00600001, 0x26400021, 0x008d0640, 0x00000000 }, + { 0x00600001, 0x260001e1, 0x00000000, 0x00000000 }, + { 0x00000009, 0x26143da1, 0x000005e2, 0x00120012 }, + { 0x00000440, 0x26141c21, 0x00000614, 0x00020000 }, + { 0x00000c01, 0x26120129, 0x0000000c, 0x00000000 }, + { 0x00000c01, 0x26100169, 0x00000000, 0x12121212 }, + { 0x00400801, 0x26000171, 0x00000000, 0xffffffff }, + { 0x00600031, 0x20001c20, 0x308d0600, 0x82008002 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00800040, 0x2400462d, 0x00b19c00, 0x00b1d830 }, + { 0x00800040, 0x2340462d, 0x00b19820, 0x00b1d830 }, + { 0x00800040, 0x2360462d, 0x00b19c10, 0x00b1dc00 }, + { 0x05810010, 0x200025ac, 0x008d2400, 0x008d01c0 }, + { 0x05810010, 0x200025ac, 0x008d2340, 0x008d01e0 }, + { 0x05810010, 0x200025ac, 0x008d2360, 0x008d01e0 }, + { 0x00818022, 0x34001c00, 0x00001400, 0x000000c8 }, + { 0x00800040, 0x2440462d, 0x00b19810, 0x00b1d830 }, + { 0x00800040, 0x2460462d, 0x00b19c20, 0x00b1dc00 }, + { 0x00800201, 0x24a00129, 0x00b19820, 0x00000000 }, + { 0x00818022, 0x34001c00, 0x02001400, 0x00000066 }, + { 0x05800010, 0x200025ac, 0x028d2400, 0x008d05a0 }, + { 0x00800040, 0x2520462d, 0x00b19830, 0x00b19820 }, + { 0x00800040, 0x2540462d, 0x00b19c00, 0x00b19c10 }, + { 0x00000201, 0x26000108, 0x00000602, 0x00000000 }, + { 0x05810010, 0x200025ac, 0x028d2440, 0x008d01e0 }, + { 0x05810010, 0x200025ac, 0x008d2460, 0x008d01e0 }, + { 0x00818022, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x00800040, 0x2560462d, 0x00b19810, 0x00b19800 }, + { 0x00800040, 0x238045ad, 0x008d0520, 0x00b19c00 }, + { 0x00800040, 0x24003d8c, 0x00b10400, 0x00040004 }, + { 0x00800040, 0x23a0458d, 0x00b10400, 0x00b19810 }, + { 0x00800048, 0x24003dac, 0x008d0560, 0x00020002 }, + { 0x80800008, 0x43c03d91, 0x00b10400, 0x00030003 }, + { 0x00800040, 0x24003dac, 0x00b103a0, 0xfffefffe }, + { 0x80800008, 0x43603d91, 0x00b10400, 0x00020002 }, + { 0x00800040, 0x2400362c, 0x00b19c10, 0x00b10380 }, + { 0x00800040, 0x2400358c, 0x00b10400, 0x00b103a0 }, + { 0x80800008, 0x43403d91, 0x00b10400, 0x00030003 }, + { 0x00800001, 0xb8100231, 0x00ae03c0, 0x00000000 }, + { 0x00800001, 0xb8200231, 0x00ae0360, 0x00000000 }, + { 0x00800001, 0xb8300231, 0x00ae0340, 0x00000000 }, + { 0x00808024, 0x34001c00, 0x00001400, 0x0001000e }, + { 0x00800040, 0x2400362c, 0x00b19820, 0x008d0520 }, + { 0x00800040, 0x2400458c, 0x00b10400, 0x00b19c10 }, + { 0x00800040, 0x24003d8c, 0x00b10400, 0x00020002 }, + { 0x80800008, 0x43403d91, 0x00b10400, 0x00020002 }, + { 0x00800001, 0xb8300231, 0x00ae0340, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00818022, 0x34001c00, 0x00001400, 0x0000001e }, + { 0x00800040, 0x2580462d, 0x00b19c20, 0x00b19c30 }, + { 0x00800040, 0x238045ad, 0x008d0540, 0x008d04b0 }, + { 0x00800040, 0x24003d8c, 0x00b10400, 0x00040004 }, + { 0x00800040, 0x23a0458d, 0x00b10400, 0x00b19c20 }, + { 0x00800048, 0x24003dac, 0x008d0580, 0x00020002 }, + { 0x80800008, 0x43c03d91, 0x00b10400, 0x00030003 }, + { 0x00800040, 0x24003dac, 0x00b103a0, 0xfffefffe }, + { 0x80800008, 0x43603d91, 0x00b10400, 0x00020002 }, + { 0x00800040, 0x2400362c, 0x008d04a0, 0x00b10380 }, + { 0x00800040, 0x2400358c, 0x00b10400, 0x00b103a0 }, + { 0x80800008, 0x43403d91, 0x00b10400, 0x00030003 }, + { 0x00800001, 0xbc200231, 0x00ae03c0, 0x00000000 }, + { 0x00800001, 0xbc100231, 0x00ae0360, 0x00000000 }, + { 0x00800001, 0xbc000231, 0x00ae0340, 0x00000000 }, + { 0x00808024, 0x34001c00, 0x00001400, 0x0001000e }, + { 0x00800040, 0x2400362c, 0x008d04a0, 0x008d0540 }, + { 0x00800040, 0x2400458c, 0x00b10400, 0x00b19c10 }, + { 0x00800040, 0x24003d8c, 0x00b10400, 0x00020002 }, + { 0x80800008, 0x43403d91, 0x00b10400, 0x00020002 }, + { 0x00800001, 0xbc000231, 0x00ae0340, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00808024, 0x34001c00, 0x00001400, 0x0001005a }, + { 0x00800001, 0x23e0012d, 0x008d0200, 0x00000000 }, + { 0x05800010, 0x200025ac, 0x008d2440, 0x008d01e0 }, + { 0x05800010, 0x200025ac, 0x028d2460, 0x008d01e0 }, + { 0x00800040, 0x24003e2c, 0x00b19820, 0x00040004 }, + { 0x00800048, 0x24003dac, 0x008d0400, 0x00040004 }, + { 0x00800040, 0x2400458c, 0x00b10400, 0x00b1dc10 }, + { 0x00800008, 0x23403d8d, 0x00b10400, 0x00030003 }, + { 0x00810040, 0x23e03dad, 0x008d03e0, 0x00010001 }, + { 0x00200201, 0x25ec018d, 0x00450600, 0x00000000 }, + { 0x00810040, 0x23e03dad, 0x028d03e0, 0x00010001 }, + { 0x03800010, 0x200035ac, 0x008d0340, 0x008d03e0 }, + { 0x05800010, 0x200035ac, 0x028d0340, 0x008d43e0 }, + { 0x00800042, 0x24c0462d, 0x00b19830, 0x00b19c00 }, + { 0x00810001, 0x234001ad, 0x008d03e0, 0x00000000 }, + { 0x00810001, 0x234001ad, 0x028d43e0, 0x00000000 }, + { 0x00200201, 0x260001ac, 0x004505ec, 0x00000000 }, + { 0x80800040, 0x43603631, 0x00b19830, 0x008d0340 }, + { 0x80800040, 0x43403631, 0x00b19c00, 0x008d4340 }, + { 0x00800001, 0xb8300231, 0x00ae0360, 0x00000000 }, + { 0x00800001, 0xbc000231, 0x00ae0340, 0x00000000 }, + { 0x00818022, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00800040, 0x2400362c, 0x00b19810, 0x008d04c0 }, + { 0x00800048, 0x24003e2c, 0x00b19820, 0xfffefffe }, + { 0x00800008, 0x23603d8d, 0x00b10400, 0x00010001 }, + { 0x03800010, 0x200025ac, 0x008d0360, 0x008d0200 }, + { 0x05800010, 0x200025ac, 0x028d0360, 0x008d4200 }, + { 0x00810001, 0x2360012d, 0x008d0200, 0x00000000 }, + { 0x00810001, 0x2360012d, 0x028d4200, 0x00000000 }, + { 0x00000201, 0x260201ac, 0x000005ee, 0x00000000 }, + { 0x80800040, 0x43603631, 0x00b19820, 0x008d0360 }, + { 0x00800001, 0xb8200231, 0x00ae0360, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00818022, 0x34001c00, 0x02001400, 0x00000014 }, + { 0x00800040, 0x2400362c, 0x00b19c20, 0x008d04c0 }, + { 0x00800048, 0x24003e2c, 0x00b19c10, 0xfffefffe }, + { 0x00800008, 0x23603d8d, 0x00b10400, 0x00010001 }, + { 0x03800010, 0x200025ac, 0x008d0360, 0x008d0200 }, + { 0x05800010, 0x200025ac, 0x028d0360, 0x008d4200 }, + { 0x00810001, 0x2360012d, 0x008d0200, 0x00000000 }, + { 0x00810001, 0x2360012d, 0x028d4200, 0x00000000 }, + { 0x80800040, 0x43603631, 0x00b19c10, 0x008d0360 }, + { 0x00800001, 0xbc100231, 0x00ae0360, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x34000020, 0x000007c0, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, + { 0x00a02001, 0x20400169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x206601ed, 0x00000000, 0x00010001 }, + { 0x00000009, 0x20663dad, 0x00000066, 0x000a000a }, + { 0x00000001, 0x206801ed, 0x00000000, 0x01400140 }, + { 0x00000001, 0x22600169, 0x00000000, 0x00030003 }, + { 0x00000008, 0x22403dad, 0x00000026, 0x00010001 }, + { 0x00000041, 0x224235ad, 0x00000020, 0x00000022 }, + { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 }, + { 0x00000001, 0x203c0022, 0x00000018, 0x00000000 }, + { 0x00000001, 0x203f01f2, 0x00000000, 0x00000000 }, + { 0x00000001, 0x202c00e2, 0x00000000, 0x00000000 }, + { 0x00000001, 0x202c010a, 0x00000e00, 0x00000000 }, + { 0x00600001, 0x20400021, 0x008d0020, 0x00000000 }, + { 0x00400001, 0x205401ed, 0x00000000, 0x00000000 }, + { 0x00200040, 0x20583dad, 0x00450020, 0xffffffff }, + { 0x00000001, 0x22000060, 0x00000000, 0x06080000 }, + { 0x00600001, 0x26000021, 0x008d0000, 0x00000000 }, + { 0x00000001, 0x26140061, 0x00000000, 0x00c00400 }, + { 0x00000001, 0x26100169, 0x00000000, 0x12121212 }, + { 0x07600031, 0x26201c21, 0x308d0600, 0x02000000 }, + { 0x00200401, 0x208000e5, 0x00000000, 0x00000000 }, + { 0x00000c01, 0x208800e5, 0x00000000, 0xffffffc4 }, + { 0x00000801, 0x208c00e5, 0x00000000, 0xffffffc8 }, + { 0x00200001, 0x260001ec, 0x00000000, 0x00000000 }, + { 0x00600001, 0x20000022, 0x008d07e0, 0x00000000 }, + { 0x00000040, 0x20283c22, 0x00000008, 0x00100010 }, + { 0x00000001, 0x206001ed, 0x00000000, 0x00020002 }, + { 0x00000001, 0x206201ad, 0x0000005a, 0x00000000 }, + { 0x00000001, 0x20a001ed, 0x00000000, 0x00000000 }, + { 0x00200001, 0x228001ed, 0x00000000, 0x00000000 }, + { 0x00802001, 0x20c00061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21000061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21400061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21800061, 0x00000000, 0x00ff00ff }, + { 0x00802001, 0x21c00061, 0x00000000, 0x00ff00ff }, + { 0x00000041, 0x22083dac, 0x00000056, 0x00040004 }, + { 0x05000010, 0x200035ac, 0x02000280, 0x00000240 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000004 }, + { 0x00000040, 0x22803dad, 0x00000280, 0xffffffff }, + { 0x00000030, 0x32000084, 0x00001200, 0x00000000 }, + { 0x01000010, 0x20002d28, 0x000090c2, 0x00000000 }, + { 0x03000010, 0x200035ac, 0x02000054, 0x00000058 }, + { 0x00800001, 0x240001ac, 0x00000068, 0x00000000 }, + { 0x00000048, 0x22a03dad, 0x00000056, 0x00040004 }, + { 0x00010220, 0x34001c00, 0x00001400, 0xfffffff2 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000014 }, + { 0x00200001, 0xb0c00229, 0x00450054, 0x00000000 }, + { 0x00200040, 0x22803dad, 0x00450280, 0x00010001 }, + { 0x00000001, 0x20300022, 0x00000010, 0x00000000 }, + { 0x00000001, 0x20380122, 0x00000260, 0x00000000 }, + { 0x00800001, 0x204001ae, 0x00b10040, 0x00000000 }, + { 0x00000008, 0x20003d2a, 0x000002a0, 0x00010001 }, + { 0x00000040, 0x22602d29, 0x00000260, 0x00020002 }, + { 0x00800031, 0x20000008, 0x608d0000, 0x00000200 }, + { 0x00000006, 0x203025a2, 0x00000066, 0x000002a0 }, + { 0x01600031, 0x20001c00, 0x708d0000, 0x02000001 }, + { 0x04200010, 0x200035ac, 0x00450054, 0x00450060 }, + { 0x00010040, 0x20a03dad, 0x02000056, 0x00010001 }, + { 0x05200010, 0x200035ac, 0x02450280, 0x00450240 }, + { 0x00000001, 0x240001ec, 0x00000000, 0x00040004 }, + { 0x00000048, 0x22083dac, 0x00000056, 0x00040004 }, + { 0x00200040, 0x205455ad, 0x00450054, 0x00450034 }, + { 0x02000010, 0x20003d8c, 0x00000600, 0x00010001 }, + { 0x00000041, 0x220e3d8c, 0x00000602, 0x00040004 }, + { 0x00010041, 0x22083dac, 0x000000a0, 0x00040004 }, + { 0x00010401, 0x205601ad, 0x000000a0, 0x00000000 }, + { 0x00010840, 0x20543d2d, 0x000090c0, 0x00010001 }, + { 0x00000220, 0x34001400, 0x00001400, 0x00009c80 }, + { 0x01000010, 0x20003dac, 0x02000280, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000014 }, + { 0x00000030, 0x32000084, 0x00001200, 0x00000000 }, + { 0x00000040, 0x22803dad, 0x00000280, 0xffffffff }, + { 0x00600401, 0x260001e1, 0x00000000, 0x00000000 }, + { 0x00000c01, 0x26140061, 0x00000000, 0x01800000 }, + { 0x00000c01, 0x26120129, 0x0000000c, 0x00000000 }, + { 0x00000801, 0x26100169, 0x00000000, 0x12121212 }, + { 0x00000040, 0x2078252d, 0x00000026, 0x00004280 }, + { 0x00400001, 0x26000231, 0x00000078, 0x00000000 }, + { 0x00600031, 0x26201c21, 0x308d0600, 0x02000002 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffffe8 }, + { 0x07600031, 0x20001c20, 0x30000000, 0x02000001 }, + { 0x01600031, 0x20001c24, 0x708d0000, 0x82000012 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, + { 0x00400441, 0x45c03dad, 0x00000034, 0x00100010 }, + { 0x00400841, 0x45c23dad, 0x00000036, 0x00200020 }, + { 0x00200001, 0x260001ec, 0x00000000, 0x00000000 }, + { 0x00000001, 0x25e20129, 0x00000036, 0x00000000 }, + { 0x00000041, 0x25e435a1, 0x00000020, 0x00000036 }, + { 0x00000040, 0x25e43421, 0x000005e4, 0x00000034 }, + { 0x00000041, 0x25e42c21, 0x000005e4, 0x00800080 }, + { 0x00000040, 0x25c43dad, 0x000005c4, 0xfffcfffc }, + { 0x00000040, 0x25ca3dad, 0x000005ca, 0xfffcfffc }, + { 0x00000005, 0x202a3dad, 0x0000002a, 0xfffdfffd }, + { 0x00800001, 0x2220022d, 0x000d002c, 0x00000000 }, + { 0x00600040, 0x22303dad, 0x008d0230, 0x00080008 }, + { 0x02000005, 0x20002d2c, 0x0200002a, 0x00020002 }, + { 0x00000001, 0x27e80021, 0x000005e4, 0x00000000 }, + { 0x00010040, 0x27e83c21, 0x020007e8, 0x00400040 }, + { 0x01600031, 0x22401c21, 0x408d07e0, 0x02885800 }, + { 0x00000001, 0x220801ec, 0x00000000, 0x02400240 }, + { 0x01800005, 0x20002d28, 0x02b19040, 0xffffffff }, + { 0x02000005, 0x20003e2c, 0x00009030, 0x00010001 }, + { 0x00000005, 0x25ec2e29, 0x00009002, 0x000a000a }, + { 0x00000005, 0x25ea2e29, 0x00009002, 0x00060006 }, + { 0x000b0220, 0x34001c00, 0x02001400, 0x00000252 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000250 }, + { 0x01000010, 0x20003d2c, 0x000005ec, 0x00080008 }, + { 0x00000005, 0x25e03d8d, 0x00000600, 0x00010001 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00020002 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00000401, 0x27e001a1, 0x000005c0, 0x00000000 }, + { 0x00000c0c, 0x27e43da1, 0x000005c2, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0007000f }, + { 0x00018022, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x22000060, 0x00000000, 0x0248a002 }, + { 0x00010040, 0x27e43ca5, 0x020007e4, 0x00080008 }, + { 0x00008024, 0x34001c00, 0x00001400, 0x0001000a }, + { 0x00010001, 0x22000060, 0x02000000, 0x0248e702 }, + { 0x00110001, 0x22000060, 0x02000000, 0x0248e602 }, + { 0x0000000c, 0x27e43ca5, 0x000007e4, 0x00010001 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x02600031, 0x20c00021, 0x408d07e0, 0x00000200 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00020002 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00000401, 0x27e001a1, 0x000005c4, 0x00000000 }, + { 0x00000c0c, 0x27e43da1, 0x000005c6, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x00070003 }, + { 0x00018022, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x22000060, 0x00000000, 0x02186004 }, + { 0x00010040, 0x27e43ca5, 0x020007e4, 0x00080008 }, + { 0x00008024, 0x34001c00, 0x00001400, 0x0001000a }, + { 0x00010001, 0x22000060, 0x02000000, 0x02186704 }, + { 0x00110001, 0x22000060, 0x02000000, 0x02186604 }, + { 0x0000000c, 0x27e43ca5, 0x000007e4, 0x00010001 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x02600031, 0x23400025, 0x408d07e0, 0x00000200 }, + { 0x00800001, 0x2380012d, 0x008900c0, 0x00000000 }, + { 0x00800001, 0x23a0012d, 0x00890100, 0x00000000 }, + { 0x00800001, 0x23c0012d, 0x008900c8, 0x00000000 }, + { 0x00800001, 0x23e0012d, 0x00890108, 0x00000000 }, + { 0x00600401, 0x20c001a9, 0x00ab0380, 0x00000000 }, + { 0x00600801, 0x20d001a9, 0x00ab0382, 0x00000000 }, + { 0x00600401, 0x20e001a9, 0x00ab0384, 0x00000000 }, + { 0x00600801, 0x20f001a9, 0x00ab0386, 0x00000000 }, + { 0x00600401, 0x210001a9, 0x00ab03c0, 0x00000000 }, + { 0x00600801, 0x211001a9, 0x00ab03c2, 0x00000000 }, + { 0x00600401, 0x212001a9, 0x00ab03c4, 0x00000000 }, + { 0x00600801, 0x213001a9, 0x00ab03c6, 0x00000000 }, + { 0x00800001, 0x204001a9, 0x002e0340, 0x00000000 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00400040 }, + { 0x01000010, 0x20003d2c, 0x020005ea, 0x00040004 }, + { 0x00800008, 0x2340352d, 0x00009050, 0x008d0220 }, + { 0x00800008, 0x2360352d, 0x00009052, 0x008d0220 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000006a }, + { 0x01000010, 0x20003d2c, 0x000005ea, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x02600005, 0x20003dac, 0x00650340, 0x00010001 }, + { 0x02600005, 0x20003dac, 0x02650360, 0x00010001 }, + { 0x00400401, 0x41c00229, 0x000090c0, 0x00000000 }, + { 0x00400801, 0x41c20229, 0x000090e0, 0x00000000 }, + { 0x00400401, 0x41e00229, 0x000090c1, 0x00000000 }, + { 0x00400801, 0x41e20229, 0x000090e1, 0x00000000 }, + { 0x00400401, 0x42000229, 0x006990a0, 0x00000000 }, + { 0x00400801, 0x42020229, 0x006990e8, 0x00000000 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000001e }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000012 }, + { 0x02600005, 0x20003dac, 0x00ae0340, 0x00010001 }, + { 0x02600005, 0x20003dac, 0x02ae0360, 0x00010001 }, + { 0x00400401, 0x21c00229, 0x000090c0, 0x00000000 }, + { 0x00400801, 0x21c80229, 0x000090e0, 0x00000000 }, + { 0x00400401, 0x21e00229, 0x000090c1, 0x00000000 }, + { 0x00400801, 0x21e80229, 0x000090e1, 0x00000000 }, + { 0x00400401, 0x22000229, 0x006990a0, 0x00000000 }, + { 0x00400801, 0x22080229, 0x006990e8, 0x00000000 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000a }, + { 0x02600005, 0x20003dac, 0x00ae0340, 0x00010001 }, + { 0x02600005, 0x20003dac, 0x02ae0360, 0x00010001 }, + { 0x00600001, 0x21c00229, 0x000090c0, 0x00000000 }, + { 0x00600001, 0x21e00229, 0x000090c1, 0x00000000 }, + { 0x00600001, 0x22000229, 0x002490a0, 0x00000000 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00400040 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c000c0 }, + { 0x00200001, 0x25d80109, 0x00450600, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001c8 }, + { 0x01400010, 0x20003d2c, 0x000005ea, 0x00040004 }, + { 0x01400010, 0x20003d2c, 0x020005ea, 0x00020002 }, + { 0x00600001, 0x21c00229, 0x000090c8, 0x00000000 }, + { 0x00600001, 0x21e00229, 0x000090c9, 0x00000000 }, + { 0x00600001, 0x22000229, 0x002490b0, 0x00000000 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00410041 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c100c1 }, + { 0x00410401, 0x41c00229, 0x000090c8, 0x00000000 }, + { 0x00410801, 0x41c20229, 0x000090f0, 0x00000000 }, + { 0x00410401, 0x41e00229, 0x000090c9, 0x00000000 }, + { 0x00410801, 0x41e20229, 0x000090f1, 0x00000000 }, + { 0x00410401, 0x42000229, 0x006990b0, 0x00000000 }, + { 0x00410801, 0x42020229, 0x006990f8, 0x00000000 }, + { 0x00410401, 0x21c00229, 0x020090c8, 0x00000000 }, + { 0x00410801, 0x21c80229, 0x020090f0, 0x00000000 }, + { 0x00410401, 0x21e00229, 0x020090c9, 0x00000000 }, + { 0x00410801, 0x21e80229, 0x020090f1, 0x00000000 }, + { 0x00410401, 0x22000229, 0x026990b0, 0x00000000 }, + { 0x00410801, 0x22080229, 0x026990f8, 0x00000000 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000019c }, + { 0x00800008, 0x2340352d, 0x00009042, 0x008d0220 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00e000e0 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01000100 }, + { 0x00600001, 0x21c00229, 0x000090c4, 0x00000000 }, + { 0x00600001, 0x21e00229, 0x000090c5, 0x00000000 }, + { 0x00600001, 0x22000229, 0x002490a4, 0x00000000 }, + { 0x02600005, 0x20003dac, 0x00ae0340, 0x00010001 }, + { 0x00000001, 0x260201e8, 0x00000000, 0x00000000 }, + { 0x00000401, 0x25da01e9, 0x00000000, 0x00000000 }, + { 0x00000801, 0x25d80109, 0x00000600, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000184 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00e100e1 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01010101 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00600001, 0x21c00229, 0x000090cc, 0x00000000 }, + { 0x00600001, 0x21e00229, 0x000090cd, 0x00000000 }, + { 0x00600001, 0x22000229, 0x002490b4, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000174 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00020002 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00000401, 0x27e001a1, 0x000005c4, 0x00000000 }, + { 0x00000c0c, 0x27e43da1, 0x000005c6, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x00070003 }, + { 0x00600401, 0x2340012d, 0x00890040, 0x00000000 }, + { 0x00600801, 0x2350012d, 0x00890048, 0x00000000 }, + { 0x00600001, 0x204001aa, 0x00270340, 0x00000000 }, + { 0x00600001, 0x205001aa, 0x00270350, 0x00000000 }, + { 0x00018022, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x22000060, 0x00000000, 0x04082004 }, + { 0x00010040, 0x27e43ca5, 0x020007e4, 0x00080008 }, + { 0x00008024, 0x34001c00, 0x00001400, 0x0001000a }, + { 0x00010001, 0x22000060, 0x02000000, 0x04082704 }, + { 0x00110001, 0x22000060, 0x02000000, 0x04082604 }, + { 0x0000000c, 0x27e43ca5, 0x000007e4, 0x00010001 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x01600031, 0x20000020, 0x508d07e0, 0x00000200 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00020002 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00000401, 0x27e001a1, 0x000005c8, 0x00000000 }, + { 0x00000c0c, 0x27e43da5, 0x000005ca, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0001000f }, + { 0x00018022, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x22000060, 0x00000000, 0x02186004 }, + { 0x00010040, 0x27e43ca5, 0x020007e4, 0x00080008 }, + { 0x01000005, 0x20003dac, 0x020005e0, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000006 }, + { 0x00000440, 0x27e43ca5, 0x000007e4, 0xfffefffe }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0003000f }, + { 0x00000040, 0x22000c00, 0x00000200, 0x00100000 }, + { 0x00008024, 0x34001c00, 0x00001400, 0x0001000c }, + { 0x0000000c, 0x27e43da5, 0x000005c2, 0x00020002 }, + { 0x00010001, 0x22000060, 0x02000000, 0x02186704 }, + { 0x00110001, 0x22000060, 0x02000000, 0x02186604 }, + { 0x00000040, 0x27e43ca5, 0x000007e4, 0xfffefffe }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x02600031, 0x20400021, 0x408d07e0, 0x00000200 }, + { 0x00800001, 0x2380012d, 0x008900c0, 0x00000000 }, + { 0x00800001, 0x23a0012d, 0x00890100, 0x00000000 }, + { 0x00800001, 0x23c0012d, 0x008900c8, 0x00000000 }, + { 0x00800001, 0x23e0012d, 0x00890108, 0x00000000 }, + { 0x00600401, 0x20c001a9, 0x00ab0380, 0x00000000 }, + { 0x00600801, 0x20d001a9, 0x00ab0382, 0x00000000 }, + { 0x00600401, 0x20e001a9, 0x00ab0384, 0x00000000 }, + { 0x00600801, 0x20f001a9, 0x00ab0386, 0x00000000 }, + { 0x00600401, 0x210001a9, 0x00ab03c0, 0x00000000 }, + { 0x00600801, 0x211001a9, 0x00ab03c2, 0x00000000 }, + { 0x00600401, 0x212001a9, 0x00ab03c4, 0x00000000 }, + { 0x00600801, 0x213001a9, 0x00ab03c6, 0x00000000 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00800080 }, + { 0x00000001, 0x260201ac, 0x000005e0, 0x00000000 }, + { 0x00800008, 0x2340352d, 0x00009054, 0x008d0220 }, + { 0x00800008, 0x2360352d, 0x00009056, 0x008d0220 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000026 }, + { 0x02600005, 0x20003dac, 0x00ae0340, 0x00010001 }, + { 0x02600005, 0x20003dac, 0x02ae0360, 0x00010001 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00400040 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c000c0 }, + { 0x00600001, 0x21c00229, 0x000090c2, 0x00000000 }, + { 0x00600001, 0x21e00229, 0x000090c3, 0x00000000 }, + { 0x00600001, 0x22000229, 0x002490a8, 0x00000000 }, + { 0x00200001, 0x25d80109, 0x00450600, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000000f0 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00410041 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x00c100c1 }, + { 0x00600001, 0x21c00229, 0x000090ca, 0x00000000 }, + { 0x00600001, 0x21e00229, 0x000090cb, 0x00000000 }, + { 0x00600001, 0x22000229, 0x002490b8, 0x00000000 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000000e0 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000005c }, + { 0x02600005, 0x20003dac, 0x00ae0340, 0x00010001 }, + { 0x02600005, 0x20003dac, 0x02ae0360, 0x00010001 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x05000500 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x05200520 }, + { 0x00800001, 0x25000129, 0x00ad0040, 0x00000000 }, + { 0x00800001, 0x25200129, 0x00ad00c0, 0x00000000 }, + { 0x00600001, 0x21c00229, 0x000090c2, 0x00000000 }, + { 0x00600001, 0x21e00229, 0x000090c3, 0x00000000 }, + { 0x00600001, 0x22000229, 0x002490a8, 0x00000000 }, + { 0x00200001, 0x25d80109, 0x00450600, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000000c6 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x05010501 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x05210521 }, + { 0x00600001, 0x21c00229, 0x000090ca, 0x00000000 }, + { 0x00600001, 0x21e00229, 0x000090cb, 0x00000000 }, + { 0x00600001, 0x22000229, 0x002490b8, 0x00000000 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000000b6 }, + { 0x00800008, 0x2340352d, 0x0000905c, 0x008d0220 }, + { 0x00800008, 0x2360352d, 0x0000905e, 0x008d0220 }, + { 0x00600001, 0x20600129, 0x008d0510, 0x00000000 }, + { 0x00600001, 0x20c00129, 0x008d0520, 0x00000000 }, + { 0x02600005, 0x20003dac, 0x00ae0340, 0x00010001 }, + { 0x02600005, 0x20003dac, 0x02ae0360, 0x00010001 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x05000500 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x05200520 }, + { 0x00800001, 0x25000129, 0x00ad0050, 0x00000000 }, + { 0x00800001, 0x25200129, 0x00ad00d0, 0x00000000 }, + { 0x00600001, 0x21c00229, 0x000090e2, 0x00000000 }, + { 0x00600001, 0x21e00229, 0x000090e3, 0x00000000 }, + { 0x00600001, 0x22000229, 0x002490ec, 0x00000000 }, + { 0x00200001, 0x25d80109, 0x00450600, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000096 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x05010501 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x05210521 }, + { 0x00600001, 0x21c00229, 0x000090f2, 0x00000000 }, + { 0x00600001, 0x21e00229, 0x000090f3, 0x00000000 }, + { 0x00600001, 0x22000229, 0x002490fc, 0x00000000 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000086 }, + { 0x00600001, 0x20700129, 0x008d0510, 0x00000000 }, + { 0x00600001, 0x20d00129, 0x008d0520, 0x00000000 }, + { 0x00800008, 0x2340352d, 0x00009048, 0x008d0220 }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00e000e0 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01000100 }, + { 0x00600001, 0x21c00229, 0x000090c4, 0x00000000 }, + { 0x00600001, 0x21e00229, 0x000090c5, 0x00000000 }, + { 0x00600001, 0x22000229, 0x002490ac, 0x00000000 }, + { 0x02600005, 0x20003dac, 0x00ae0340, 0x00010001 }, + { 0x00000001, 0x260201e8, 0x00000000, 0x00000000 }, + { 0x00000401, 0x25da01e9, 0x00000000, 0x00000000 }, + { 0x00000801, 0x25d80109, 0x00000600, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000006a }, + { 0x00000401, 0x220c01ec, 0x00000000, 0x00e100e1 }, + { 0x00000801, 0x220e01ec, 0x00000000, 0x01010101 }, + { 0x00600001, 0x21c00229, 0x000090cc, 0x00000000 }, + { 0x00600001, 0x21e00229, 0x000090cd, 0x00000000 }, + { 0x00600001, 0x22000229, 0x002490bc, 0x00000000 }, + { 0x00200001, 0x26000128, 0x004505d8, 0x00000000 }, + { 0x00000040, 0x27c01c01, 0x00001400, 0x00000020 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000005a }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00020002 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00000401, 0x27e001a1, 0x000005c0, 0x00000000 }, + { 0x00000c0c, 0x27e43da1, 0x000005c2, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0007000f }, + { 0x00802001, 0x20400022, 0x008d00c0, 0x00000000 }, + { 0x00802001, 0x20800022, 0x008d0100, 0x00000000 }, + { 0x00018022, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x22000060, 0x00000000, 0x0a082004 }, + { 0x00010040, 0x27e43ca5, 0x020007e4, 0x00080008 }, + { 0x00008024, 0x34001c00, 0x00001400, 0x0001000a }, + { 0x00010001, 0x22000060, 0x02000000, 0x0a082704 }, + { 0x00110001, 0x22000060, 0x02000000, 0x0a082604 }, + { 0x0000000c, 0x27e43ca5, 0x000007e4, 0x00010001 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x01600031, 0x20000020, 0x508d07e0, 0x00000200 }, + { 0x01600005, 0x20003dac, 0x020005e0, 0x00010001 }, + { 0x01000005, 0x20003e2c, 0x00009002, 0x00020002 }, + { 0x00000401, 0x27e001a1, 0x000005c8, 0x00000000 }, + { 0x00000c0c, 0x27e43da1, 0x000005ca, 0x00010001 }, + { 0x00000801, 0x27e80061, 0x00000000, 0x0001000f }, + { 0x00610001, 0x20400022, 0x028d0040, 0x00000000 }, + { 0x00710001, 0x20400022, 0x028d0060, 0x00000000 }, + { 0x02000005, 0x20003dac, 0x0200002a, 0x00020002 }, + { 0x00018022, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x22000060, 0x00000000, 0x0418a004 }, + { 0x00010040, 0x27e43ca5, 0x020007e4, 0x00080008 }, + { 0x00008024, 0x34001c00, 0x00001400, 0x0001000c }, + { 0x0000000c, 0x27e43da5, 0x000005c2, 0x00020002 }, + { 0x00010001, 0x22000060, 0x02000000, 0x0418a704 }, + { 0x00110001, 0x22000060, 0x02000000, 0x0418a604 }, + { 0x00000040, 0x27e43ca5, 0x000007e4, 0xfffefffe }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x01600031, 0x26400021, 0x508d07e0, 0x00000200 }, + { 0x01000005, 0x20003dac, 0x0000002a, 0x00020002 }, + { 0x00000006, 0x202a3dad, 0x0000002a, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x00001400, 0xfffffd94 }, + { 0x00600001, 0x26400021, 0x008d0640, 0x00000000 }, + { 0x00600001, 0x260001e1, 0x00000000, 0x00000000 }, + { 0x00000009, 0x26143da1, 0x000005e2, 0x00120012 }, + { 0x00000440, 0x26141c21, 0x00000614, 0x00020000 }, + { 0x00000c01, 0x26120129, 0x0000000c, 0x00000000 }, + { 0x00000c01, 0x26100169, 0x00000000, 0x12121212 }, + { 0x00400801, 0x26000171, 0x00000000, 0xffffffff }, + { 0x00600031, 0x20001c20, 0x308d0600, 0x82008002 }, + { 0x00600040, 0x2400462d, 0x00ae9c00, 0x00aed810 }, + { 0x00600040, 0x2340462d, 0x00ae9800, 0x00aed810 }, + { 0x00600040, 0x2360462d, 0x00ae9c10, 0x00aedc00 }, + { 0x05810010, 0x200025ac, 0x008d2400, 0x008d01c0 }, + { 0x05810010, 0x200025ac, 0x008d2340, 0x008d01e0 }, + { 0x05810010, 0x200025ac, 0x008d2360, 0x008d01e0 }, + { 0x00618022, 0x34001c00, 0x00001400, 0x00000036 }, + { 0x00618022, 0x34001c00, 0x02001400, 0x00000016 }, + { 0x00600040, 0x24003e2c, 0x00ae9c10, 0x00020002 }, + { 0x00600048, 0x24003e2c, 0x00ae9800, 0x00020002 }, + { 0x00600040, 0x2400458c, 0x008d0400, 0x00ae9810 }, + { 0x80600008, 0x43403d91, 0x008d0400, 0x00020002 }, + { 0x00600040, 0x24003e2c, 0x00ae9800, 0x00020002 }, + { 0x00600048, 0x24003e2c, 0x00ae9c10, 0x00020002 }, + { 0x00600040, 0x2400458c, 0x008d0400, 0x00ae9c00 }, + { 0x80600008, 0x43603d91, 0x008d0400, 0x00020002 }, + { 0x00600001, 0xd8100231, 0x00ae0340, 0x00000000 }, + { 0x00600001, 0xdc000231, 0x00ae0360, 0x00000000 }, + { 0x00608024, 0x34001c00, 0x00001400, 0x0001001e }, + { 0x00600040, 0x23e03d2d, 0x008d0200, 0x00010001 }, + { 0x00600040, 0x24003e2c, 0x00ae9800, 0x00040004 }, + { 0x00600048, 0x24003dac, 0x008d0400, 0x00040004 }, + { 0x00600040, 0x2400458c, 0x008d0400, 0x00aedc10 }, + { 0x00600008, 0x23403d8d, 0x008d0400, 0x00030003 }, + { 0x03600010, 0x200035ac, 0x008d0340, 0x008d03e0 }, + { 0x05600010, 0x200035ac, 0x028d0340, 0x008d43e0 }, + { 0x00610001, 0x234001ad, 0x008d03e0, 0x00000000 }, + { 0x00610001, 0x234001ad, 0x028d43e0, 0x00000000 }, + { 0x80600040, 0x43603631, 0x00ae9810, 0x008d0340 }, + { 0x80600040, 0x43403631, 0x00ae9c00, 0x008d4340 }, + { 0x00600001, 0xd8100231, 0x00ae0360, 0x00000000 }, + { 0x00600001, 0xdc000231, 0x00ae0340, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x34000020, 0x000007c0, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, diff --git a/src/shaders/h264/mc/chromaMVAdjust.asm b/src/shaders/h264/mc/chromaMVAdjust.asm new file mode 100644 index 00000000..063f554f --- /dev/null +++ b/src/shaders/h264/mc/chromaMVAdjust.asm @@ -0,0 +1,27 @@ +/*
+ * Adjust chrom MV
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: ChromaMVAdjust.asm
+//
+//
+
+
+//#if !defined(__ChromaMVAdjust__) // Make sure this is only included once
+//#define __ChromaMVAdjust__
+
+
+ // Chroma MV adjustment
+ add (1) acc0:w gPARITY:w gREFPARITY:w
+ cmp.e.f0.0 (1) null:w acc0:w 0x1:w
+ cmp.e.f0.1 (1) null:w acc0:w 0x100:w
+ mov (1) gCHRMVADJ:w 0:w
+ (f0.0) mov (1) gCHRMVADJ:w 2:w
+ (f0.1) mov (1) gCHRMVADJ:w -2:w
+
+//#endif // !defined(__ChromaMVAdjust__)
diff --git a/src/shaders/h264/mc/export.inc b/src/shaders/h264/mc/export.inc new file mode 100644 index 00000000..5b81219a --- /dev/null +++ b/src/shaders/h264/mc/export.inc @@ -0,0 +1,345 @@ +#define INTRA_16x16_IP 0 +#define INTRA_16x16_VERTICAL_IP 14 +#define INTRA_16x16_HORIZONTAL_IP 32 +#define INTRA_16x16_DC_IP 52 +#define INTRA_16x16_PLANE_IP 98 +#define End_intra_Pred_16x16_Y_IP 166 +#define End_add_Error_16x16_Y_IP 204 +#define load_Intra_Ref_Y_IP 220 +#define decode_Chroma_Intra_IP 238 +#define INTRA_CHROMA_DC_IP 260 +#define INTRA_CHROMA_HORIZONTAL_IP 320 +#define INTRA_CHROMA_VERTICAL_IP 332 +#define INTRA_Chroma_PLANE_IP 342 +#define End_of_intra_Pred_Chroma_IP 392 +#define save_16x16_Y_IP 436 +#define INTRA_8x8_IP 464 +#define INTRA_8x8_BLK2_IP 568 +#define intra_Pred_8x8_Y_IP 640 +#define INTRA_8X8_VERTICAL_IP 672 +#define INTRA_8X8_HORIZONTAL_IP 682 +#define INTRA_8X8_DC_IP 692 +#define INTRA_8X8_DIAG_DOWN_LEFT_IP 724 +#define INTRA_8X8_DIAG_DOWN_RIGHT_IP 744 +#define INTRA_8X8_VERT_RIGHT_IP 772 +#define INTRA_8X8_HOR_DOWN_IP 808 +#define INTRA_8X8_VERT_LEFT_IP 842 +#define INTRA_8X8_HOR_UP_IP 862 +#define save_8x8_Y_IP 886 +#define INTRA_4x4_IP 928 +#define intra_Pred_4x4_Y_4_IP 1062 +#define ADD_ERROR_SB0_IP 1074 +#define ADD_ERROR_SB1_IP 1088 +#define ADD_ERROR_SB2_IP 1108 +#define ADD_ERROR_SB3_IP 1124 +#define intra_Pred_4x4_Y_IP 1130 +#define INTRA_4X4_VERTICAL_IP 1130 +#define INTRA_4X4_HORIZONTAL_IP 1134 +#define INTRA_4X4_DC_IP 1138 +#define INTRA_4X4_DIAG_DOWN_LEFT_IP 1160 +#define INTRA_4X4_DIAG_DOWN_RIGHT_IP 1174 +#define INTRA_4X4_VERT_RIGHT_IP 1192 +#define INTRA_4X4_HOR_DOWN_IP 1218 +#define INTRA_4X4_VERT_LEFT_IP 1246 +#define INTRA_4X4_HOR_UP_IP 1260 +#define save_4x4_Y_IP 1276 +#define INTRA_PCM_IP 1320 +#define FRAME_MB_IP 1384 +#define INIT_MBPARA_FRM_IP 1390 +#define NOT_8x8_MODE_FRM_IP 1426 +#define CONVERT_MVS_FRM_IP 1436 +#define INIT_ADDRESS_REGS_FRM_IP 1446 +#define LOOP_SUBMB_FRM_IP 1454 +#define LOOP_DIR_FRM_IP 1460 +#define LOADREF_MVXZERO_FRM_IP 1510 +#define EXIT_LOADREF_Y_16x13_FRM_IP 1524 +#define Interpolate_Y_8x8_Func_FRM_IP 1544 +#define Interpolate_Y_8x8_Func2_FRM_IP 1574 +#define Interpolate_Y_H_8x8_FRM_IP 1708 +#define Interpolate_Y_V_8x8_FRM_IP 1790 +#define VFILTER_8x8_FRM_IP 1812 +#define Interpolate_Y_I_8x8_FRM_IP 1860 +#define Average_8x8_FRM_IP 1880 +#define Return_Interpolate_Y_8x8_FRM_IP 1888 +#define Exit_Interpolate_Y_8x8_FRM_IP 1890 +#define Interpolate_C_4x4_Func_FRM_IP 1890 +#define PROCESS4x4_FRM_IP 1928 +#define LOOP_SUBMBPT_FRM_IP 1930 +#define Interpolate_Y_H_4x4_FRM_IP 2066 +#define Interpolate_Y_V_4x4_FRM_IP 2108 +#define VFILTER_4x4_FRM_IP 2142 +#define Interpolate_Y_I_4x4_FRM_IP 2148 +#define Average_4x4_FRM_IP 2160 +#define Return_Interpolate_Y_4x4_FRM_IP 2162 +#define Exit_Interpolate_Y_4x4_FRM_IP 2174 +#define ROUND_SHIFT_C_FRM_IP 2222 +#define LOOP_DIR_CONTINUE_FRM_IP 2230 +#define Weighted_Prediction_FRM_IP 2236 +#define DefaultWeightedPred_UniPred_FRM_IP 2244 +#define DefaultWeightedPred_BiPred_FRM_IP 2256 +#define WeightedPred_FRM_IP 2264 +#define WeightedPred_Explicit_FRM_IP 2282 +#define WeightedPred_LOOP_FRM_IP 2322 +#define Return_WeightedPred_FRM_IP 2382 +#define EXIT_LOOP_FRM_IP 2424 +#define FIELD_MB_IP 2496 +#define INIT_MBPARA_FLD_IP 2502 +#define NOT_8x8_MODE_FLD_IP 2538 +#define CONVERT_MVS_FLD_IP 2548 +#define INIT_ADDRESS_REGS_FLD_IP 2558 +#define LOOP_SUBMB_FLD_IP 2568 +#define LOOP_DIR_FLD_IP 2574 +#define LOADREF_MVXZERO_FLD_IP 2644 +#define EXIT_LOADREF_Y_16x13_FLD_IP 2658 +#define Interpolate_Y_8x8_Func_FLD_IP 2680 +#define Interpolate_Y_8x8_Func2_FLD_IP 2710 +#define Interpolate_Y_H_8x8_FLD_IP 2844 +#define Interpolate_Y_V_8x8_FLD_IP 2926 +#define VFILTER_8x8_FLD_IP 2948 +#define Interpolate_Y_I_8x8_FLD_IP 2996 +#define Average_8x8_FLD_IP 3016 +#define Return_Interpolate_Y_8x8_FLD_IP 3024 +#define Exit_Interpolate_Y_8x8_FLD_IP 3026 +#define Interpolate_C_4x4_Func_FLD_IP 3026 +#define PROCESS4x4_FLD_IP 3064 +#define LOOP_SUBMBPT_FLD_IP 3066 +#define Interpolate_Y_H_4x4_FLD_IP 3204 +#define Interpolate_Y_V_4x4_FLD_IP 3246 +#define VFILTER_4x4_FLD_IP 3280 +#define Interpolate_Y_I_4x4_FLD_IP 3286 +#define Average_4x4_FLD_IP 3298 +#define Return_Interpolate_Y_4x4_FLD_IP 3300 +#define Exit_Interpolate_Y_4x4_FLD_IP 3312 +#define ROUND_SHIFT_C_FLD_IP 3360 +#define LOOP_DIR_CONTINUE_FLD_IP 3368 +#define Weighted_Prediction_FLD_IP 3374 +#define DefaultWeightedPred_UniPred_FLD_IP 3382 +#define DefaultWeightedPred_BiPred_FLD_IP 3394 +#define WeightedPred_FLD_IP 3402 +#define WeightedPred_Explicit_FLD_IP 3420 +#define WeightedPred_LOOP_FLD_IP 3460 +#define Return_WeightedPred_FLD_IP 3520 +#define EXIT_LOOP_FLD_IP 3562 +#define MBAFF_MB_IP 3640 +#define INIT_MBPARA_MBF_IP 3646 +#define NOT_8x8_MODE_MBF_IP 3682 +#define CONVERT_MVS_MBF_IP 3692 +#define INIT_ADDRESS_REGS_MBF_IP 3702 +#define LOOP_SUBMB_MBF_IP 3716 +#define LOOP_DIR_MBF_IP 3722 +#define LOADREF_MVXZERO_MBF_IP 3796 +#define EXIT_LOADREF_Y_16x13_MBF_IP 3810 +#define Interpolate_Y_8x8_Func_MBF_IP 3832 +#define Interpolate_Y_8x8_Func2_MBF_IP 3862 +#define Interpolate_Y_H_8x8_MBF_IP 3996 +#define Interpolate_Y_V_8x8_MBF_IP 4078 +#define VFILTER_8x8_MBF_IP 4100 +#define Interpolate_Y_I_8x8_MBF_IP 4148 +#define Average_8x8_MBF_IP 4168 +#define Return_Interpolate_Y_8x8_MBF_IP 4176 +#define Exit_Interpolate_Y_8x8_MBF_IP 4178 +#define Interpolate_C_4x4_Func_MBF_IP 4178 +#define PROCESS4x4_MBF_IP 4216 +#define LOOP_SUBMBPT_MBF_IP 4218 +#define Interpolate_Y_H_4x4_MBF_IP 4356 +#define Interpolate_Y_V_4x4_MBF_IP 4398 +#define VFILTER_4x4_MBF_IP 4432 +#define Interpolate_Y_I_4x4_MBF_IP 4438 +#define Average_4x4_MBF_IP 4450 +#define Return_Interpolate_Y_4x4_MBF_IP 4452 +#define Exit_Interpolate_Y_4x4_MBF_IP 4464 +#define ROUND_SHIFT_C_MBF_IP 4512 +#define LOOP_DIR_CONTINUE_MBF_IP 4520 +#define Weighted_Prediction_MBF_IP 4526 +#define DefaultWeightedPred_UniPred_MBF_IP 4534 +#define DefaultWeightedPred_BiPred_MBF_IP 4546 +#define WeightedPred_MBF_IP 4554 +#define WeightedPred_Explicit_MBF_IP 4572 +#define WeightedPred_LOOP_MBF_IP 4612 +#define Return_WeightedPred_MBF_IP 4672 +#define EXIT_LOOP_MBF_IP 4714 +#define SETHWSCOREBOARD_IP 4792 +#define SetHWScoreboard_Loop_IP 4806 +#define Parse_8_Loop_0_IP 4852 +#define Parse_8_Loop_2_IP 4876 +#define Parse_8_Loop_4_IP 4900 +#define Parse_8_Loop_6_IP 4924 +#define Parse_8_Loop_8_IP 4948 +#define Parse_8_Loop_10_IP 4972 +#define Parse_8_Loop_12_IP 4996 +#define Parse_8_Loop_14_IP 5020 +#define SetHWScoreboard_Remainder_IP 5062 +#define SetHWScoreboard_Remainder_Loop_IP 5090 +#define Output_Remainder_Intra_IP 5116 +#define SetHWScoreboard_Done_IP 5128 +#define SETHWSCOREBOARD_MBAFF_IP 5136 +#define SetHWScoreboard_MBAFF_Loop_IP 5148 +#define SET_SB_MBAFF_INTRA_0_IP 5208 +#define SET_SB_MBAFF_0_IP 5230 +#define NEXT_MB_MBAFF_0_IP 5238 +#define SET_SB_MBAFF_INTRA_2_IP 5276 +#define SET_SB_MBAFF_2_IP 5298 +#define NEXT_MB_MBAFF_2_IP 5306 +#define SET_SB_MBAFF_INTRA_4_IP 5344 +#define SET_SB_MBAFF_4_IP 5366 +#define NEXT_MB_MBAFF_4_IP 5374 +#define SET_SB_MBAFF_INTRA_6_IP 5412 +#define SET_SB_MBAFF_6_IP 5434 +#define NEXT_MB_MBAFF_6_IP 5442 +#define SET_SB_MBAFF_INTRA_8_IP 5480 +#define SET_SB_MBAFF_8_IP 5502 +#define NEXT_MB_MBAFF_8_IP 5510 +#define SET_SB_MBAFF_INTRA_10_IP 5548 +#define SET_SB_MBAFF_10_IP 5570 +#define NEXT_MB_MBAFF_10_IP 5578 +#define SET_SB_MBAFF_INTRA_12_IP 5616 +#define SET_SB_MBAFF_12_IP 5638 +#define NEXT_MB_MBAFF_12_IP 5646 +#define SET_SB_MBAFF_INTRA_14_IP 5684 +#define SET_SB_MBAFF_14_IP 5706 +#define NEXT_MB_MBAFF_14_IP 5714 +#define SetHWScoreboard_MBAFF_Remainder_IP 5756 +#define SetHWScoreboard_MBAFF_Remainder_Loop_IP 5784 +#define SET_SB_MBAFF_REM_INTRA_IP 5822 +#define SET_SB_MBAFF_REM_IP 5846 +#define Output_MBAFF_Remainder_Intra_IP 5856 +#define SetHWScoreboard_MBAFF_Done_IP 5868 +#define BSDRESET_IP 5870 +#define DCRESETDUMMY_IP 5872 +#define AVC_ILDB_ROOT_Y_ILDB_FRAME_IP 5880 +#define SLEEP_ENTRY_Y_ILDB_FRAME_IP 5976 +#define POST_SLEEP_Y_ILDB_FRAME_IP 5980 +#define NEXT_MB_Y_ILDB_FRAME_IP 6010 +#define ALL_SPAWNED_Y_ILDB_FRAME_IP 6034 +#define ALL_DONE_Y_ILDB_FRAME_IP 6044 +#define WAIT_FOR_UV_ILDB_FRAME_IP 6044 +#define AVC_ILDB_CHILD_Y_ILDB_FRAME_IP 6056 +#define WRITE_URB_Y_ILDB_FRAME_IP 6436 +#define POST_ILDB_Y_ILDB_FRAME_IP 6444 +#define READ_FOR_URB_Y_ILDB_FRAME_IP 6458 +#define FILTER_Y_IP 6494 +#define Y_ELSE3_IP 6560 +#define Y_ENDIF3_IP 6574 +#define Y_ELSE4_IP 6604 +#define Y_ENDIF4_IP 6618 +#define Y_ELSE2_IP 6618 +#define Y_ENDIF6_IP 6684 +#define Y_ENDIF7_IP 6706 +#define Y_ENDIF2_IP 6710 +#define Y_ENDIF1_IP 6710 +#define AVC_ILDB_ROOT_UV_ILDB_FRAME_IP 6720 +#define SLEEP_ENTRY_UV_ILDB_FRAME_IP 6798 +#define POST_SLEEP_UV_ILDB_FRAME_IP 6802 +#define NEXT_MB_UV_ILDB_FRAME_IP 6834 +#define ALL_SPAWNED_UV_ILDB_FRAME_IP 6858 +#define ALL_DONE_UV_ILDB_FRAME_IP 6882 +#define AVC_ILDB_CHILD_UV_ILDB_FRAME_IP 6888 +#define BYPASS_EXT_LEFT_EDGE_UV_ILDB_FRAME_IP 7008 +#define BYPASS_EXT_TOP_EDGE_UV_ILDB_FRAME_IP 7126 +#define WRITE_URB_UV_ILDB_FRAME_IP 7194 +#define POST_ILDB_UV_ILDB_FRAME_IP 7202 +#define READ_FOR_URB_UV_ILDB_FRAME_IP 7216 +#define FILTER_UV_IP 7246 +#define UV_ELSE2_IP 7282 +#define UV_ENDIF2_IP 7314 +#define UV_ENDIF1_IP 7314 +#define AVC_ILDB_ROOT_Y_ILDB_FIELD_IP 7320 +#define SLEEP_ENTRY_Y_ILDB_FIELD_IP 7416 +#define POST_SLEEP_Y_ILDB_FIELD_IP 7420 +#define NEXT_MB_Y_ILDB_FIELD_IP 7450 +#define ALL_SPAWNED_Y_ILDB_FIELD_IP 7474 +#define ALL_DONE_Y_ILDB_FIELD_IP 7484 +#define WAIT_FOR_UV_ILDB_FIELD_IP 7484 +#define AVC_ILDB_CHILD_Y_ILDB_FIELD_IP 7496 +#define WRITE_URB_Y_ILDB_FIELD_IP 7896 +#define POST_ILDB_Y_ILDB_FIELD_IP 7904 +#define READ_FOR_URB_Y_ILDB_FIELD_IP 7918 +#define ELSE_Y_4x16T_ILDB_FIELD_IP 7934 +#define ENDIF_Y_4x16T_ILDB_FIELD_IP 7942 +#define AVC_ILDB_ROOT_UV_ILDB_FIELD_IP 7976 +#define SLEEP_ENTRY_UV_ILDB_FIELD_IP 8054 +#define POST_SLEEP_UV_ILDB_FIELD_IP 8058 +#define NEXT_MB_UV_ILDB_FIELD_IP 8090 +#define ALL_SPAWNED_UV_ILDB_FIELD_IP 8114 +#define ALL_DONE_UV_ILDB_FIELD_IP 8138 +#define AVC_ILDB_CHILD_UV_ILDB_FIELD_IP 8144 +#define BYPASS_EXT_LEFT_EDGE_UV_ILDB_FIELD_IP 8272 +#define BYPASS_EXT_TOP_EDGE_UV_ILDB_FIELD_IP 8394 +#define WRITE_URB_UV_ILDB_FIELD_IP 8470 +#define POST_ILDB_UV_ILDB_FIELD_IP 8478 +#define READ_FOR_URB_UV_ILDB_FIELD_IP 8492 +#define ELSE_Y_2x8T_ILDB_FIELD_IP 8508 +#define ENDIF_Y_2x8T_ILDB_FIELD_IP 8516 +#define AVC_ILDB_ROOT_Y_ILDB_MBAFF_IP 8544 +#define SLEEP_ENTRY_Y_ILDB_MBAFF_IP 8642 +#define POST_SLEEP_Y_ILDB_MBAFF_IP 8646 +#define NEXT_MB_Y_ILDB_MBAFF_IP 8676 +#define ALL_SPAWNED_Y_ILDB_MBAFF_IP 8700 +#define ALL_DONE_Y_ILDB_MBAFF_IP 8710 +#define WAIT_FOR_UV_ILDB_MBAFF_IP 8710 +#define AVC_ILDB_CHILD_Y_ILDB_MBAFF_IP 8720 +#define RE_ENTRY_IP 8742 +#define ELSE_Y_16x16T_ILDB_MBAFF_IP 8782 +#define ENDIF_Y_16x16T_ILDB_MBAFF_IP 8792 +#define ELSE_Y_4x16T_IP 8808 +#define ENDIF_Y_4x16T_IP 8818 +#define BYPASS_V1_Y_IP 8966 +#define BYPASS_V2_Y_IP 8980 +#define BYPASS_V3_Y_IP 8994 +#define ELSE_Y_16x4T_IP 9024 +#define ENDIF_Y_16x4T_IP 9034 +#define NOT_DUAL_FIELD_IP 9060 +#define ELSE_Y_16x4_IP 9060 +#define ENDIF_Y_16x4_IP 9072 +#define DUAL_FIELD_Y_IP 9168 +#define H0_Y_DONE_IP 9236 +#define ELSE_Y_16x16_IP 9310 +#define ENDIF_Y_16x16_IP 9320 +#define ELSE_Y_16x4_SAVE_IP 9342 +#define ENDIF_Y_16x4_SAVE_IP 9354 +#define SKIP_ILDB_IP 9356 +#define POST_ILDB_IP 9364 +#define FILTER_Y_MBAFF_IP 9378 +#define MBAFF_Y_ELSE3_IP 9444 +#define MBAFF_Y_ENDIF3_IP 9458 +#define MBAFF_Y_ELSE4_IP 9488 +#define MBAFF_Y_ENDIF4_IP 9502 +#define MBAFF_Y_ELSE2_IP 9502 +#define MBAFF_Y_ENDIF6_IP 9566 +#define MBAFF_Y_ENDIF7_IP 9588 +#define MBAFF_Y_ENDIF2_IP 9592 +#define MBAFF_Y_ENDIF1_IP 9592 +#define AVC_ILDB_ROOT_UV_ILDB_MBAFF_IP 9600 +#define SLEEP_ENTRY_UV_ILDB_MBAFF_IP 9678 +#define POST_SLEEP_UV_ILDB_MBAFF_IP 9682 +#define NEXT_MB_UV_ILDB_MBAFF_IP 9714 +#define ALL_SPAWNED_UV_ILDB_MBAFF_IP 9738 +#define ALL_DONE_UV_ILDB_MBAFF_IP 9762 +#define AVC_ILDB_CHILD_UV_ILDB_MBAFF_IP 9768 +#define RE_ENTRY_UV_ILDB_MBAFF_IP 9794 +#define ELSE_UV_8X8T_ILDB_MBAFF_IP 9836 +#define ENDIF_UV_8X8T_ILDB_MBAFF_IP 9846 +#define ELSE_Y_2x8T_ILDB_MBAFF_IP 9864 +#define ENDIF_Y_2x8T_ILDB_MBAFF_IP 9874 +#define V0_U_NEXT1_IP 9934 +#define V0_U_NEXT2_IP 9954 +#define V0_U_NEXT3_IP 9964 +#define BYPASS_V0_UV_IP 10018 +#define ELSE_UV_8X2T_IP 10082 +#define ENDIF_UV_8X2T_IP 10092 +#define NOT_DUAL_FIELD_UV_IP 10120 +#define ELSE_UV_8X2_IP 10120 +#define ENDIF_UV_8X2_IP 10132 +#define DUAL_FIELD_UV_IP 10208 +#define H0_UV_DONE_IP 10300 +#define ELSE_UV_8X8_IP 10360 +#define ENDIF_UV_8X8_IP 10370 +#define ELSE_UV_8X2_SAVE_IP 10394 +#define ENDIF_UV_8X2_SAVE_IP 10406 +#define SKIP_ILDB_UV_ILDB_MBAFF_IP 10408 +#define POST_ILDB_UV_ILDB_MBAFF_IP 10416 +#define FILTER_UV_MBAFF_IP 10430 +#define MBAFF_UV_ELSE2_IP 10466 +#define MBAFF_UV_ENDIF2_IP 10496 +#define MBAFF_UV_ENDIF1_IP 10496 +#define AllAVC_END_IP 10500 diff --git a/src/shaders/h264/mc/export.inc.gen5 b/src/shaders/h264/mc/export.inc.gen5 new file mode 100644 index 00000000..0179192b --- /dev/null +++ b/src/shaders/h264/mc/export.inc.gen5 @@ -0,0 +1,345 @@ +#define INTRA_16x16_IP_GEN5 0 +#define INTRA_16x16_VERTICAL_IP_GEN5 14 +#define INTRA_16x16_HORIZONTAL_IP_GEN5 32 +#define INTRA_16x16_DC_IP_GEN5 52 +#define INTRA_16x16_PLANE_IP_GEN5 98 +#define End_intra_Pred_16x16_Y_IP_GEN5 166 +#define End_add_Error_16x16_Y_IP_GEN5 204 +#define load_Intra_Ref_Y_IP_GEN5 220 +#define decode_Chroma_Intra_IP_GEN5 238 +#define INTRA_CHROMA_DC_IP_GEN5 260 +#define INTRA_CHROMA_HORIZONTAL_IP_GEN5 320 +#define INTRA_CHROMA_VERTICAL_IP_GEN5 332 +#define INTRA_Chroma_PLANE_IP_GEN5 342 +#define End_of_intra_Pred_Chroma_IP_GEN5 392 +#define save_16x16_Y_IP_GEN5 436 +#define INTRA_8x8_IP_GEN5 464 +#define INTRA_8x8_BLK2_IP_GEN5 568 +#define intra_Pred_8x8_Y_IP_GEN5 640 +#define INTRA_8X8_VERTICAL_IP_GEN5 672 +#define INTRA_8X8_HORIZONTAL_IP_GEN5 682 +#define INTRA_8X8_DC_IP_GEN5 692 +#define INTRA_8X8_DIAG_DOWN_LEFT_IP_GEN5 724 +#define INTRA_8X8_DIAG_DOWN_RIGHT_IP_GEN5 744 +#define INTRA_8X8_VERT_RIGHT_IP_GEN5 772 +#define INTRA_8X8_HOR_DOWN_IP_GEN5 808 +#define INTRA_8X8_VERT_LEFT_IP_GEN5 842 +#define INTRA_8X8_HOR_UP_IP_GEN5 862 +#define save_8x8_Y_IP_GEN5 886 +#define INTRA_4x4_IP_GEN5 928 +#define intra_Pred_4x4_Y_4_IP_GEN5 1062 +#define ADD_ERROR_SB0_IP_GEN5 1074 +#define ADD_ERROR_SB1_IP_GEN5 1088 +#define ADD_ERROR_SB2_IP_GEN5 1108 +#define ADD_ERROR_SB3_IP_GEN5 1124 +#define intra_Pred_4x4_Y_IP_GEN5 1130 +#define INTRA_4X4_VERTICAL_IP_GEN5 1130 +#define INTRA_4X4_HORIZONTAL_IP_GEN5 1134 +#define INTRA_4X4_DC_IP_GEN5 1138 +#define INTRA_4X4_DIAG_DOWN_LEFT_IP_GEN5 1160 +#define INTRA_4X4_DIAG_DOWN_RIGHT_IP_GEN5 1174 +#define INTRA_4X4_VERT_RIGHT_IP_GEN5 1192 +#define INTRA_4X4_HOR_DOWN_IP_GEN5 1218 +#define INTRA_4X4_VERT_LEFT_IP_GEN5 1246 +#define INTRA_4X4_HOR_UP_IP_GEN5 1260 +#define save_4x4_Y_IP_GEN5 1276 +#define INTRA_PCM_IP_GEN5 1320 +#define FRAME_MB_IP_GEN5 1384 +#define INIT_MBPARA_FRM_IP_GEN5 1390 +#define NOT_8x8_MODE_FRM_IP_GEN5 1426 +#define CONVERT_MVS_FRM_IP_GEN5 1436 +#define INIT_ADDRESS_REGS_FRM_IP_GEN5 1446 +#define LOOP_SUBMB_FRM_IP_GEN5 1454 +#define LOOP_DIR_FRM_IP_GEN5 1460 +#define LOADREF_MVXZERO_FRM_IP_GEN5 1510 +#define EXIT_LOADREF_Y_16x13_FRM_IP_GEN5 1524 +#define Interpolate_Y_8x8_Func_FRM_IP_GEN5 1544 +#define Interpolate_Y_8x8_Func2_FRM_IP_GEN5 1574 +#define Interpolate_Y_H_8x8_FRM_IP_GEN5 1708 +#define Interpolate_Y_V_8x8_FRM_IP_GEN5 1790 +#define VFILTER_8x8_FRM_IP_GEN5 1812 +#define Interpolate_Y_I_8x8_FRM_IP_GEN5 1860 +#define Average_8x8_FRM_IP_GEN5 1880 +#define Return_Interpolate_Y_8x8_FRM_IP_GEN5 1888 +#define Exit_Interpolate_Y_8x8_FRM_IP_GEN5 1890 +#define Interpolate_C_4x4_Func_FRM_IP_GEN5 1890 +#define PROCESS4x4_FRM_IP_GEN5 1928 +#define LOOP_SUBMBPT_FRM_IP_GEN5 1930 +#define Interpolate_Y_H_4x4_FRM_IP_GEN5 2066 +#define Interpolate_Y_V_4x4_FRM_IP_GEN5 2108 +#define VFILTER_4x4_FRM_IP_GEN5 2142 +#define Interpolate_Y_I_4x4_FRM_IP_GEN5 2148 +#define Average_4x4_FRM_IP_GEN5 2160 +#define Return_Interpolate_Y_4x4_FRM_IP_GEN5 2162 +#define Exit_Interpolate_Y_4x4_FRM_IP_GEN5 2174 +#define ROUND_SHIFT_C_FRM_IP_GEN5 2222 +#define LOOP_DIR_CONTINUE_FRM_IP_GEN5 2230 +#define Weighted_Prediction_FRM_IP_GEN5 2236 +#define DefaultWeightedPred_UniPred_FRM_IP_GEN5 2244 +#define DefaultWeightedPred_BiPred_FRM_IP_GEN5 2256 +#define WeightedPred_FRM_IP_GEN5 2264 +#define WeightedPred_Explicit_FRM_IP_GEN5 2282 +#define WeightedPred_LOOP_FRM_IP_GEN5 2322 +#define Return_WeightedPred_FRM_IP_GEN5 2382 +#define EXIT_LOOP_FRM_IP_GEN5 2424 +#define FIELD_MB_IP_GEN5 2496 +#define INIT_MBPARA_FLD_IP_GEN5 2502 +#define NOT_8x8_MODE_FLD_IP_GEN5 2538 +#define CONVERT_MVS_FLD_IP_GEN5 2548 +#define INIT_ADDRESS_REGS_FLD_IP_GEN5 2558 +#define LOOP_SUBMB_FLD_IP_GEN5 2568 +#define LOOP_DIR_FLD_IP_GEN5 2574 +#define LOADREF_MVXZERO_FLD_IP_GEN5 2644 +#define EXIT_LOADREF_Y_16x13_FLD_IP_GEN5 2658 +#define Interpolate_Y_8x8_Func_FLD_IP_GEN5 2680 +#define Interpolate_Y_8x8_Func2_FLD_IP_GEN5 2710 +#define Interpolate_Y_H_8x8_FLD_IP_GEN5 2844 +#define Interpolate_Y_V_8x8_FLD_IP_GEN5 2926 +#define VFILTER_8x8_FLD_IP_GEN5 2948 +#define Interpolate_Y_I_8x8_FLD_IP_GEN5 2996 +#define Average_8x8_FLD_IP_GEN5 3016 +#define Return_Interpolate_Y_8x8_FLD_IP_GEN5 3024 +#define Exit_Interpolate_Y_8x8_FLD_IP_GEN5 3026 +#define Interpolate_C_4x4_Func_FLD_IP_GEN5 3026 +#define PROCESS4x4_FLD_IP_GEN5 3064 +#define LOOP_SUBMBPT_FLD_IP_GEN5 3066 +#define Interpolate_Y_H_4x4_FLD_IP_GEN5 3204 +#define Interpolate_Y_V_4x4_FLD_IP_GEN5 3246 +#define VFILTER_4x4_FLD_IP_GEN5 3280 +#define Interpolate_Y_I_4x4_FLD_IP_GEN5 3286 +#define Average_4x4_FLD_IP_GEN5 3298 +#define Return_Interpolate_Y_4x4_FLD_IP_GEN5 3300 +#define Exit_Interpolate_Y_4x4_FLD_IP_GEN5 3312 +#define ROUND_SHIFT_C_FLD_IP_GEN5 3360 +#define LOOP_DIR_CONTINUE_FLD_IP_GEN5 3368 +#define Weighted_Prediction_FLD_IP_GEN5 3374 +#define DefaultWeightedPred_UniPred_FLD_IP_GEN5 3382 +#define DefaultWeightedPred_BiPred_FLD_IP_GEN5 3394 +#define WeightedPred_FLD_IP_GEN5 3402 +#define WeightedPred_Explicit_FLD_IP_GEN5 3420 +#define WeightedPred_LOOP_FLD_IP_GEN5 3460 +#define Return_WeightedPred_FLD_IP_GEN5 3520 +#define EXIT_LOOP_FLD_IP_GEN5 3562 +#define MBAFF_MB_IP_GEN5 3640 +#define INIT_MBPARA_MBF_IP_GEN5 3646 +#define NOT_8x8_MODE_MBF_IP_GEN5 3682 +#define CONVERT_MVS_MBF_IP_GEN5 3692 +#define INIT_ADDRESS_REGS_MBF_IP_GEN5 3702 +#define LOOP_SUBMB_MBF_IP_GEN5 3716 +#define LOOP_DIR_MBF_IP_GEN5 3722 +#define LOADREF_MVXZERO_MBF_IP_GEN5 3796 +#define EXIT_LOADREF_Y_16x13_MBF_IP_GEN5 3810 +#define Interpolate_Y_8x8_Func_MBF_IP_GEN5 3832 +#define Interpolate_Y_8x8_Func2_MBF_IP_GEN5 3862 +#define Interpolate_Y_H_8x8_MBF_IP_GEN5 3996 +#define Interpolate_Y_V_8x8_MBF_IP_GEN5 4078 +#define VFILTER_8x8_MBF_IP_GEN5 4100 +#define Interpolate_Y_I_8x8_MBF_IP_GEN5 4148 +#define Average_8x8_MBF_IP_GEN5 4168 +#define Return_Interpolate_Y_8x8_MBF_IP_GEN5 4176 +#define Exit_Interpolate_Y_8x8_MBF_IP_GEN5 4178 +#define Interpolate_C_4x4_Func_MBF_IP_GEN5 4178 +#define PROCESS4x4_MBF_IP_GEN5 4216 +#define LOOP_SUBMBPT_MBF_IP_GEN5 4218 +#define Interpolate_Y_H_4x4_MBF_IP_GEN5 4356 +#define Interpolate_Y_V_4x4_MBF_IP_GEN5 4398 +#define VFILTER_4x4_MBF_IP_GEN5 4432 +#define Interpolate_Y_I_4x4_MBF_IP_GEN5 4438 +#define Average_4x4_MBF_IP_GEN5 4450 +#define Return_Interpolate_Y_4x4_MBF_IP_GEN5 4452 +#define Exit_Interpolate_Y_4x4_MBF_IP_GEN5 4464 +#define ROUND_SHIFT_C_MBF_IP_GEN5 4512 +#define LOOP_DIR_CONTINUE_MBF_IP_GEN5 4520 +#define Weighted_Prediction_MBF_IP_GEN5 4526 +#define DefaultWeightedPred_UniPred_MBF_IP_GEN5 4534 +#define DefaultWeightedPred_BiPred_MBF_IP_GEN5 4546 +#define WeightedPred_MBF_IP_GEN5 4554 +#define WeightedPred_Explicit_MBF_IP_GEN5 4572 +#define WeightedPred_LOOP_MBF_IP_GEN5 4612 +#define Return_WeightedPred_MBF_IP_GEN5 4672 +#define EXIT_LOOP_MBF_IP_GEN5 4714 +#define SETHWSCOREBOARD_IP_GEN5 4792 +#define SetHWScoreboard_Loop_IP_GEN5 4806 +#define Parse_8_Loop_0_IP_GEN5 4852 +#define Parse_8_Loop_2_IP_GEN5 4876 +#define Parse_8_Loop_4_IP_GEN5 4900 +#define Parse_8_Loop_6_IP_GEN5 4924 +#define Parse_8_Loop_8_IP_GEN5 4948 +#define Parse_8_Loop_10_IP_GEN5 4972 +#define Parse_8_Loop_12_IP_GEN5 4996 +#define Parse_8_Loop_14_IP_GEN5 5020 +#define SetHWScoreboard_Remainder_IP_GEN5 5062 +#define SetHWScoreboard_Remainder_Loop_IP_GEN5 5090 +#define Output_Remainder_Intra_IP_GEN5 5116 +#define SetHWScoreboard_Done_IP_GEN5 5128 +#define SETHWSCOREBOARD_MBAFF_IP_GEN5 5136 +#define SetHWScoreboard_MBAFF_Loop_IP_GEN5 5148 +#define SET_SB_MBAFF_INTRA_0_IP_GEN5 5208 +#define SET_SB_MBAFF_0_IP_GEN5 5230 +#define NEXT_MB_MBAFF_0_IP_GEN5 5238 +#define SET_SB_MBAFF_INTRA_2_IP_GEN5 5276 +#define SET_SB_MBAFF_2_IP_GEN5 5298 +#define NEXT_MB_MBAFF_2_IP_GEN5 5306 +#define SET_SB_MBAFF_INTRA_4_IP_GEN5 5344 +#define SET_SB_MBAFF_4_IP_GEN5 5366 +#define NEXT_MB_MBAFF_4_IP_GEN5 5374 +#define SET_SB_MBAFF_INTRA_6_IP_GEN5 5412 +#define SET_SB_MBAFF_6_IP_GEN5 5434 +#define NEXT_MB_MBAFF_6_IP_GEN5 5442 +#define SET_SB_MBAFF_INTRA_8_IP_GEN5 5480 +#define SET_SB_MBAFF_8_IP_GEN5 5502 +#define NEXT_MB_MBAFF_8_IP_GEN5 5510 +#define SET_SB_MBAFF_INTRA_10_IP_GEN5 5548 +#define SET_SB_MBAFF_10_IP_GEN5 5570 +#define NEXT_MB_MBAFF_10_IP_GEN5 5578 +#define SET_SB_MBAFF_INTRA_12_IP_GEN5 5616 +#define SET_SB_MBAFF_12_IP_GEN5 5638 +#define NEXT_MB_MBAFF_12_IP_GEN5 5646 +#define SET_SB_MBAFF_INTRA_14_IP_GEN5 5684 +#define SET_SB_MBAFF_14_IP_GEN5 5706 +#define NEXT_MB_MBAFF_14_IP_GEN5 5714 +#define SetHWScoreboard_MBAFF_Remainder_IP_GEN5 5756 +#define SetHWScoreboard_MBAFF_Remainder_Loop_IP_GEN5 5784 +#define SET_SB_MBAFF_REM_INTRA_IP_GEN5 5822 +#define SET_SB_MBAFF_REM_IP_GEN5 5846 +#define Output_MBAFF_Remainder_Intra_IP_GEN5 5856 +#define SetHWScoreboard_MBAFF_Done_IP_GEN5 5868 +#define BSDRESET_IP_GEN5 5870 +#define DCRESETDUMMY_IP_GEN5 5872 +#define AVC_ILDB_ROOT_Y_ILDB_FRAME_IP_GEN5 5880 +#define SLEEP_ENTRY_Y_ILDB_FRAME_IP_GEN5 5976 +#define POST_SLEEP_Y_ILDB_FRAME_IP_GEN5 5980 +#define NEXT_MB_Y_ILDB_FRAME_IP_GEN5 6010 +#define ALL_SPAWNED_Y_ILDB_FRAME_IP_GEN5 6034 +#define ALL_DONE_Y_ILDB_FRAME_IP_GEN5 6044 +#define WAIT_FOR_UV_ILDB_FRAME_IP_GEN5 6044 +#define AVC_ILDB_CHILD_Y_ILDB_FRAME_IP_GEN5 6056 +#define WRITE_URB_Y_ILDB_FRAME_IP_GEN5 6436 +#define POST_ILDB_Y_ILDB_FRAME_IP_GEN5 6444 +#define READ_FOR_URB_Y_ILDB_FRAME_IP_GEN5 6458 +#define FILTER_Y_IP_GEN5 6494 +#define Y_ELSE3_IP_GEN5 6560 +#define Y_ENDIF3_IP_GEN5 6574 +#define Y_ELSE4_IP_GEN5 6604 +#define Y_ENDIF4_IP_GEN5 6618 +#define Y_ELSE2_IP_GEN5 6618 +#define Y_ENDIF6_IP_GEN5 6684 +#define Y_ENDIF7_IP_GEN5 6706 +#define Y_ENDIF2_IP_GEN5 6710 +#define Y_ENDIF1_IP_GEN5 6710 +#define AVC_ILDB_ROOT_UV_ILDB_FRAME_IP_GEN5 6720 +#define SLEEP_ENTRY_UV_ILDB_FRAME_IP_GEN5 6798 +#define POST_SLEEP_UV_ILDB_FRAME_IP_GEN5 6802 +#define NEXT_MB_UV_ILDB_FRAME_IP_GEN5 6834 +#define ALL_SPAWNED_UV_ILDB_FRAME_IP_GEN5 6858 +#define ALL_DONE_UV_ILDB_FRAME_IP_GEN5 6882 +#define AVC_ILDB_CHILD_UV_ILDB_FRAME_IP_GEN5 6888 +#define BYPASS_EXT_LEFT_EDGE_UV_ILDB_FRAME_IP_GEN5 7008 +#define BYPASS_EXT_TOP_EDGE_UV_ILDB_FRAME_IP_GEN5 7126 +#define WRITE_URB_UV_ILDB_FRAME_IP_GEN5 7194 +#define POST_ILDB_UV_ILDB_FRAME_IP_GEN5 7202 +#define READ_FOR_URB_UV_ILDB_FRAME_IP_GEN5 7216 +#define FILTER_UV_IP_GEN5 7246 +#define UV_ELSE2_IP_GEN5 7282 +#define UV_ENDIF2_IP_GEN5 7314 +#define UV_ENDIF1_IP_GEN5 7314 +#define AVC_ILDB_ROOT_Y_ILDB_FIELD_IP_GEN5 7320 +#define SLEEP_ENTRY_Y_ILDB_FIELD_IP_GEN5 7416 +#define POST_SLEEP_Y_ILDB_FIELD_IP_GEN5 7420 +#define NEXT_MB_Y_ILDB_FIELD_IP_GEN5 7450 +#define ALL_SPAWNED_Y_ILDB_FIELD_IP_GEN5 7474 +#define ALL_DONE_Y_ILDB_FIELD_IP_GEN5 7484 +#define WAIT_FOR_UV_ILDB_FIELD_IP_GEN5 7484 +#define AVC_ILDB_CHILD_Y_ILDB_FIELD_IP_GEN5 7496 +#define WRITE_URB_Y_ILDB_FIELD_IP_GEN5 7896 +#define POST_ILDB_Y_ILDB_FIELD_IP_GEN5 7904 +#define READ_FOR_URB_Y_ILDB_FIELD_IP_GEN5 7918 +#define ELSE_Y_4x16T_ILDB_FIELD_IP_GEN5 7934 +#define ENDIF_Y_4x16T_ILDB_FIELD_IP_GEN5 7942 +#define AVC_ILDB_ROOT_UV_ILDB_FIELD_IP_GEN5 7976 +#define SLEEP_ENTRY_UV_ILDB_FIELD_IP_GEN5 8054 +#define POST_SLEEP_UV_ILDB_FIELD_IP_GEN5 8058 +#define NEXT_MB_UV_ILDB_FIELD_IP_GEN5 8090 +#define ALL_SPAWNED_UV_ILDB_FIELD_IP_GEN5 8114 +#define ALL_DONE_UV_ILDB_FIELD_IP_GEN5 8138 +#define AVC_ILDB_CHILD_UV_ILDB_FIELD_IP_GEN5 8144 +#define BYPASS_EXT_LEFT_EDGE_UV_ILDB_FIELD_IP_GEN5 8272 +#define BYPASS_EXT_TOP_EDGE_UV_ILDB_FIELD_IP_GEN5 8394 +#define WRITE_URB_UV_ILDB_FIELD_IP_GEN5 8470 +#define POST_ILDB_UV_ILDB_FIELD_IP_GEN5 8478 +#define READ_FOR_URB_UV_ILDB_FIELD_IP_GEN5 8492 +#define ELSE_Y_2x8T_ILDB_FIELD_IP_GEN5 8508 +#define ENDIF_Y_2x8T_ILDB_FIELD_IP_GEN5 8516 +#define AVC_ILDB_ROOT_Y_ILDB_MBAFF_IP_GEN5 8544 +#define SLEEP_ENTRY_Y_ILDB_MBAFF_IP_GEN5 8642 +#define POST_SLEEP_Y_ILDB_MBAFF_IP_GEN5 8646 +#define NEXT_MB_Y_ILDB_MBAFF_IP_GEN5 8676 +#define ALL_SPAWNED_Y_ILDB_MBAFF_IP_GEN5 8700 +#define ALL_DONE_Y_ILDB_MBAFF_IP_GEN5 8710 +#define WAIT_FOR_UV_ILDB_MBAFF_IP_GEN5 8710 +#define AVC_ILDB_CHILD_Y_ILDB_MBAFF_IP_GEN5 8720 +#define RE_ENTRY_IP_GEN5 8742 +#define ELSE_Y_16x16T_ILDB_MBAFF_IP_GEN5 8782 +#define ENDIF_Y_16x16T_ILDB_MBAFF_IP_GEN5 8792 +#define ELSE_Y_4x16T_IP_GEN5 8808 +#define ENDIF_Y_4x16T_IP_GEN5 8818 +#define BYPASS_V1_Y_IP_GEN5 8966 +#define BYPASS_V2_Y_IP_GEN5 8980 +#define BYPASS_V3_Y_IP_GEN5 8994 +#define ELSE_Y_16x4T_IP_GEN5 9024 +#define ENDIF_Y_16x4T_IP_GEN5 9034 +#define NOT_DUAL_FIELD_IP_GEN5 9060 +#define ELSE_Y_16x4_IP_GEN5 9060 +#define ENDIF_Y_16x4_IP_GEN5 9072 +#define DUAL_FIELD_Y_IP_GEN5 9168 +#define H0_Y_DONE_IP_GEN5 9236 +#define ELSE_Y_16x16_IP_GEN5 9310 +#define ENDIF_Y_16x16_IP_GEN5 9320 +#define ELSE_Y_16x4_SAVE_IP_GEN5 9342 +#define ENDIF_Y_16x4_SAVE_IP_GEN5 9354 +#define SKIP_ILDB_IP_GEN5 9356 +#define POST_ILDB_IP_GEN5 9364 +#define FILTER_Y_MBAFF_IP_GEN5 9378 +#define MBAFF_Y_ELSE3_IP_GEN5 9444 +#define MBAFF_Y_ENDIF3_IP_GEN5 9458 +#define MBAFF_Y_ELSE4_IP_GEN5 9488 +#define MBAFF_Y_ENDIF4_IP_GEN5 9502 +#define MBAFF_Y_ELSE2_IP_GEN5 9502 +#define MBAFF_Y_ENDIF6_IP_GEN5 9566 +#define MBAFF_Y_ENDIF7_IP_GEN5 9588 +#define MBAFF_Y_ENDIF2_IP_GEN5 9592 +#define MBAFF_Y_ENDIF1_IP_GEN5 9592 +#define AVC_ILDB_ROOT_UV_ILDB_MBAFF_IP_GEN5 9600 +#define SLEEP_ENTRY_UV_ILDB_MBAFF_IP_GEN5 9678 +#define POST_SLEEP_UV_ILDB_MBAFF_IP_GEN5 9682 +#define NEXT_MB_UV_ILDB_MBAFF_IP_GEN5 9714 +#define ALL_SPAWNED_UV_ILDB_MBAFF_IP_GEN5 9738 +#define ALL_DONE_UV_ILDB_MBAFF_IP_GEN5 9762 +#define AVC_ILDB_CHILD_UV_ILDB_MBAFF_IP_GEN5 9768 +#define RE_ENTRY_UV_ILDB_MBAFF_IP_GEN5 9794 +#define ELSE_UV_8X8T_ILDB_MBAFF_IP_GEN5 9836 +#define ENDIF_UV_8X8T_ILDB_MBAFF_IP_GEN5 9846 +#define ELSE_Y_2x8T_ILDB_MBAFF_IP_GEN5 9864 +#define ENDIF_Y_2x8T_ILDB_MBAFF_IP_GEN5 9874 +#define V0_U_NEXT1_IP_GEN5 9934 +#define V0_U_NEXT2_IP_GEN5 9954 +#define V0_U_NEXT3_IP_GEN5 9964 +#define BYPASS_V0_UV_IP_GEN5 10018 +#define ELSE_UV_8X2T_IP_GEN5 10082 +#define ENDIF_UV_8X2T_IP_GEN5 10092 +#define NOT_DUAL_FIELD_UV_IP_GEN5 10120 +#define ELSE_UV_8X2_IP_GEN5 10120 +#define ENDIF_UV_8X2_IP_GEN5 10132 +#define DUAL_FIELD_UV_IP_GEN5 10208 +#define H0_UV_DONE_IP_GEN5 10300 +#define ELSE_UV_8X8_IP_GEN5 10360 +#define ENDIF_UV_8X8_IP_GEN5 10370 +#define ELSE_UV_8X2_SAVE_IP_GEN5 10394 +#define ENDIF_UV_8X2_SAVE_IP_GEN5 10406 +#define SKIP_ILDB_UV_ILDB_MBAFF_IP_GEN5 10408 +#define POST_ILDB_UV_ILDB_MBAFF_IP_GEN5 10416 +#define FILTER_UV_MBAFF_IP_GEN5 10430 +#define MBAFF_UV_ELSE2_IP_GEN5 10466 +#define MBAFF_UV_ENDIF2_IP_GEN5 10496 +#define MBAFF_UV_ENDIF1_IP_GEN5 10496 +#define AllAVC_END_IP_GEN5 10500 diff --git a/src/shaders/h264/mc/header.inc b/src/shaders/h264/mc/header.inc new file mode 100644 index 00000000..4a0eecf7 --- /dev/null +++ b/src/shaders/h264/mc/header.inc @@ -0,0 +1,303 @@ +/*
+ * Common header file for all AVC MC kernels
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+#if !defined(__HEADER__) // Make sure this file is only included once
+#define __HEADER__
+
+// Module name: header.inc
+//
+// Common header file for all AVC MC kernels
+//
+
+#ifndef COMBINED_KERNEL
+#ifdef DEV_CTG
+ #define SW_SCOREBOARD // SW Scoreboard should be enabled for CTG and earlier
+ #undef HW_SCOREBOARD // HW Scoreboard should be disabled for CTG and earlier
+#else
+ #define HW_SCOREBOARD // HW Scoreboard should be enabled for ILK and beyond
+ #undef SW_SCOREBOARD // SW Scoreboard should be disabled for ILK and beyond
+#endif // DEV_CTG
+#endif // COMBINED_KERNEL
+
+//#define MONO // Build Monochrome kernels
+
+// Surface state definition
+//
+#define DESTY 0
+#define DESTUV 1
+#define REFYFM0 2
+#define REFYFM1 3
+#define REFYFM2 4
+#define REFYFM3 5
+#define REFYFM4 6
+#define REFYFM5 7
+#define REFYFM6 8
+#define REFYFM7 9
+#define REFYFM8 10
+#define REFYFM9 11
+#define REFYFM10 12
+#define REFYFM11 13
+#define REFYFM12 14
+#define REFYFM13 15
+#define REFYFM14 16
+#define REFYFM15 17
+#define REFUVFM0 18
+#define REFUVFM1 19
+#define REFUVFM2 20
+#define REFUVFM3 21
+#define REFUVFM4 22
+#define REFUVFM5 23
+#define REFUVFM6 24
+#define REFUVFM7 25
+#define REFUVFM8 26
+#define REFUVFM9 27
+#define REFUVFM10 28
+#define REFUVFM11 29
+#define REFUVFM12 30
+#define REFUVFM13 31
+#define REFUVFM14 32
+#define REFUVFM15 33
+
+.default_execution_size (16)
+.default_register_type :ub
+
+// ----------- Common constant definitions ------------
+//
+// Bit position constants
+//
+#define BIT0 0x01
+#define BIT1 0x02
+#define BIT2 0x04
+#define BIT3 0x08
+#define BIT4 0x10
+#define BIT5 0x20
+#define BIT6 0x40
+#define BIT7 0x80
+#define BIT8 0x0100
+#define BIT9 0x0200
+#define BIT10 0x0400
+#define BIT11 0x0800
+#define BIT12 0x1000
+#define BIT13 0x2000
+#define BIT14 0x4000
+#define BIT15 0x8000
+#define BIT16 0x00010000
+#define BIT17 0x00020000
+#define BIT18 0x00040000
+#define BIT19 0x00080000
+#define BIT20 0x00100000
+#define BIT21 0x00200000
+#define BIT22 0x00400000
+#define BIT23 0x00800000
+#define BIT24 0x01000000
+#define BIT25 0x02000000
+#define BIT26 0x04000000
+#define BIT27 0x08000000
+#define BIT28 0x10000000
+#define BIT29 0x20000000
+#define BIT30 0x40000000
+#define BIT31 0x80000000
+
+#define GRFWIB 32 // GRF register width in byte
+#define GRFWIW 16 // GRF register width in word
+#define GRFWID 8 // GRF register width in dword
+
+#define INST_SIZE 16 // Instruction size = 128b = 16 Bytes
+
+#define REGION(Width,HStride) <Width*HStride;Width,HStride>
+
+#define NULLREG null<1>:ud
+#define NULLREGW null<1>:w
+
+#define TOP_FIELD 0
+#define BOTTOM_FIELD 1
+
+// M2 - M9 for date writing message payload
+.declare MSGPAYLOAD Base=m2 ElementSize=1 SrcRegion=REGION(16,1) Type=ub
+.declare MSGPAYLOADB Base=m2 ElementSize=1 SrcRegion=REGION(16,1) Type=ub
+.declare MSGPAYLOADW Base=m2 ElementSize=2 SrcRegion=REGION(16,1) Type=uw
+.declare MSGPAYLOADD Base=m2 ElementSize=4 SrcRegion=REGION(8,1) Type=ud
+
+// ----------- Common Message Descriptor ------------
+//
+#ifdef DEV_ILK
+#define MSG_GW 0x03 // Message Gateway Extended Message Descriptor,
+#define DAPREAD 0x04 // Data Port Read Extended Message Descriptor,
+#define DAPWRITE 0x05 // Data Port Write Extended Message Descriptor,
+#define TS 0x07 // Thread Spawner Extended Message Descriptor
+#define TS_EOT 0x27 // End of Thread Extended Message Descriptor
+
+#define EOTMSGDSC 0x02000010 // End of Thread Message Descriptor, don't deference URB handle
+
+// Data Port Message Descriptor
+#define DWBRMSGDSC_RC 0x02086000 // DWORD Block Read Message Descriptor, reading from render cache = 6.
+#define DWBRMSGDSC_RC_TF 0x02086600 // DWORD Block Read Message Descriptor, reading from render cache = 6.
+#define DWBRMSGDSC_RC_BF 0x02086700 // DWORD Block Read Message Descriptor, reading from render cache = 6.
+#define DWBRMSGDSC_SC 0x0208A000 // DWORD Block Read Message Descriptor, reading from sampler cache = A.
+#define DWBRMSGDSC_SC_TF 0x0208E600 // DWORD Block Read Message Descriptor, reading top field from field mode sampler cache.
+#define DWBRMSGDSC_SC_BF 0x0208E700 // DWORD Block Read Message Descriptor, reading bottom field from field mode sampler cache.
+
+#define DWBWMSGDSC 0x02082000 // DWORD Block Write Message Descriptor
+#define DWBWMSGDSC_WC 0x0218A000 // DWORD Block Write Message Descriptor + write commit
+
+// Enable Write Commit writeback mesage
+#define ENWRCOM 0x00108000 // Enable "write commit" and set response length = 1
+
+// Thread Spawner Message Descriptor
+#define TSMSGDSC 0x02000011
+
+// Message Gateway Message Descriptors
+#define OGWMSGDSC 0x02000000 // OpenGateway Message Descriptor
+#define CGWMSGDSC 0x02000001 // CloseGateway Message Descriptor
+#define FWDMSGDSC 0x02000002 // ForwardMsg Message Descriptor
+
+#define NOTIFYMSG 0x00008000 // Send notification with ForwardMsg message
+
+#define RESP_LEN(len) 0x100000*len
+#define MSG_LEN(len) 0x2000000*len
+
+#else // Pre DEV_ILK
+
+#define MSG_GW
+#define DAPREAD
+#define DAPWRITE
+#define TS
+#define TS_EOT
+
+#define EOTMSGDSC 0x87100010 // End of Thread Message Descriptor, don't deference URB handle
+
+// Data Port Message Descriptor
+#define DWBRMSGDSC_RC 0x04106000 // DWORD Block Read Message Descriptor, reading from render cache = 6.
+#define DWBRMSGDSC_RC_TF 0x04106600 // DWORD Block Read Message Descriptor, reading from render cache = 6.
+#define DWBRMSGDSC_RC_BF 0x04106700 // DWORD Block Read Message Descriptor, reading from render cache = 6.
+#define DWBRMSGDSC_SC 0x0410A000 // DWORD Block Read Message Descriptor, reading from sampler cache = A.
+#define DWBRMSGDSC_SC_TF 0x0410A600 // DWORD Block Read Message Descriptor, reading top field from field mode sampler cache.
+#define DWBRMSGDSC_SC_BF 0x0410A700 // DWORD Block Read Message Descriptor, reading bottom field from field mode sampler cache.
+
+#define DWBWMSGDSC 0x05102000 // DWORD Block Write Message Descriptor
+#define DWBWMSGDSC_WC 0x0511A000 // DWORD Block Write Message Descriptor + write commit
+
+// Enable Write Commit writeback mesage
+#define ENWRCOM 0x00018000 // Enable "write commit" and set response length = 1
+
+// Thread Spawner Message Descriptor
+#define TSMSGDSC 0x07100011
+
+// Message Gateway Message Descriptors
+#define OGWMSGDSC 0x03100000 // OpenGateway Message Descriptor
+#define CGWMSGDSC 0x03100001 // CloseGateway Message Descriptor
+#define FWDMSGDSC 0x03100002 // ForwardMsg Message Descriptor
+
+#define NOTIFYMSG 0x00008000 // Send notification with ForwardMsg message
+#define ACKREQMSG 0x00014000 // Acknowledgement required so response length should be 1
+
+#define RESP_LEN(len) 0x10000*len
+#define MSG_LEN(len) 0x100000*len
+
+#endif // DEV_ILK
+
+// Enable frame/field selection in message descriptor
+#define ENMSGDSCFM 0x400 // Enable MSGDSC to select frame surface
+#define ENMSGDSCTF 0x600 // Enable MSGDSC to select top field surface
+#define ENMSGDSCBF 0x700 // Enable MSGDSC to select bottom field surface
+
+// ----------- Message related register ------------
+//
+#define MSGHDR m1 // Message Payload Header
+#define MSGHDRY m1 // Message Payload Header register for Y data
+#define MSGHDRY0 m1 // Message Payload Header register for Y data
+#define MSGHDRY1 m2 // Message Payload Header register for Y data
+#define MSGHDRY2 m3 // Message Payload Header register for Y data
+#define MSGHDRY3 m4 // Message Payload Header register for Y data
+#define MSGHDRUV m5 // Message Payload Header register for U/V data
+#define MSGSRC r62 // Message source register, should never be used for other purposes
+#define MSGDSC a0.0:ud // Message Descriptor register (type DWORD)
+
+#define MH_ORI MSGSRC.0 // DWORD block R/W message header block offset
+#define MH_ORIX MSGSRC.0 // DWORD block R/W message header X offset
+#define MH_ORIY MSGSRC.1 // DWORD block R/W message header Y offset
+#define MH_SIZE MSGSRC.2 // DWORD block R/W message header block width & height
+
+// Data necessary for kernel operations
+//
+// Address registers used as pointers
+//
+// Note: Please keep the register order as is since they are used in compressed instructions
+//
+#define PPREDBUF_Y a0.4 // Pointer to predicted Y picture
+#define PPREDBUF_Y1 a0.5 // Pointer to predicted Y picture for extended instruction
+
+#define PPREDBUF_UV a0.4 // Pointer to predicted U/V picture
+#define PPREDBUF_UV1 a0.5 // Pointer to predicted U/V picture for extended instruction
+
+#define PDECBUF a0.4 // Pointer to decoded picture data
+#define PDECBUF_UD a0.2 // Pointer to decoded picture data in DWORD unit
+
+// ----------- R63 is reserved for global variables ------------
+//
+// Note: Don't program it with values other than what are defined here.
+
+#define G_REG r63
+
+#define RETURN_REG G_REG.0 // Return pointer for all sub-routine calls (type DWORD)
+#define RETURN_REG1 G_REG.1 // Return pointer for second-level calls
+
+#define I_ORIX G_REG.13 // :uw, H. origin of the macroblock in pixel unit, don't overwrite in-line data
+#define I_ORIY G_REG.14 // :uw, V. origin of the macroblock in pixel unit, don't overwrite in-line data
+
+// Macros
+//
+// Note: For macros that require multiple line expansion, insert "\n" at the end of each line.
+//
+#define GRF(reg) r##reg
+#ifdef DEV_ILK
+#define END_THREAD send (8) NULLREG MSGHDR r0:ud TS_EOT EOTMSGDSC
+#else
+#define END_THREAD send (8) NULLREG MSGHDR r0:ud EOTMSGDSC
+#endif // DEV_ILK
+
+#define CALL(subFunc, skipInst) add (1) RETURN_REG<1>:ud ip:ud (1+skipInst)*INST_SIZE \n\
+ jmpi (1) subFunc
+
+#define CALL_1(subFunc, skipInst) add (1) RETURN_REG1<1>:ud ip:ud (1+skipInst)*INST_SIZE \n\
+ jmpi (1) subFunc
+
+#define RETURN mov (1) ip:ud RETURN_REG<0;1,0>:ud // Return to calling module
+#define RETURN_1 mov (1) ip:ud RETURN_REG1<0;1,0>:ud // Return to second-level calling module
+ // To support iterative calling
+#ifdef SW_SCOREBOARD
+
+#ifdef DEV_CTG_A
+ #define LEADING_THREAD 1 // For CTG A, no SRT is needed. Only PRT is necessary
+#else
+ #define LEADING_THREAD 0 // For CTG B0 and beyond, PRT doesn't take into debug count
+ #define DOUBLE_SB // Scoreboard size needs to be doubled
+#endif
+
+#ifdef DOUBLE_SB // Scoreboard size needs to be doubled
+ #define SB_MASK 0x1ff // Scoreboard wrap-around mask (for 512 entries)
+#else
+ #define SB_MASK 0xff // Scoreboard wrap-around mask (for 256 entries)
+#endif // defined(DOUBLE_SB)
+
+// Scoreboard related definitions
+
+#define TEMPX r50
+#define TEMPY r51
+#define DELTA r52
+
+#define M05_STORE r0.13 // :uw, reuse r0.6:ud upper-word to store M0.5 header information for scoreboard
+
+
+#endif // SW_SCOREBOARD
+
+// End of header.inc
+
+#endif // !defined(__HEADER__)
+
diff --git a/src/shaders/h264/mc/initialize_MBPara.asm b/src/shaders/h264/mc/initialize_MBPara.asm new file mode 100644 index 00000000..bd651cff --- /dev/null +++ b/src/shaders/h264/mc/initialize_MBPara.asm @@ -0,0 +1,125 @@ +/*
+ * Initialize parameters
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: Initialize_MBPara.asm
+//
+
+
+//#if !defined(__INITIALIZE_MBPARA__) // Make sure this is only included once
+//#define __INITIALIZE_MBPARA__
+
+
+// WA for weighted prediction - 2007/09/06 // shlee
+// mov (1) guwW128(0)<1> guwR1(0)<0;1,0> // Copy the unique number indicating weight/offset=(128,0)
+
+
+
+// MB Type Category
+// 1 B_L0_16x16
+// 2 B_L1_16x16
+// 3 B_Bi_16x16
+// 4 B_L0_L0_16x8
+// 5 B_L0_L0_8x16
+// 6 B_L1_L1_16x8
+// 7 B_L1_L1_8x16
+// 8 B_L0_L1_16x8
+// 9 B_L0_L1_8x16
+// 10 B_L1_L0_16x8
+// 11 B_L1_L0_8x16
+// 12 B_L0_Bi_16x8
+// 13 B_L0_Bi_8x16
+// 14 B_L1_Bi_16x8
+// 15 B_L1_Bi_8x16
+// 16 B_Bi_L0_16x8
+// 17 B_Bi_L0_8x16
+// 18 B_Bi_L1_16x8
+// 19 B_Bi_L1_8x16
+// 20 B_Bi_Bi_16x8
+// 21 B_Bi_Bi_8x16
+// 22 B_8x8
+
+ // TODO:
+ // Initialize interpolation area to eliminate uninitialized registers making the results of mac instructions XX.
+ // This issue was reported by Sharath on 5/25/2006, and why multiplication by zero still yields XX has not been understood yet.
+#if 0
+ mov (16) gudINTPY0(0)<1> 0:ud {Compr}
+ mov (16) gudINTPY0(2)<1> 0:ud {Compr}
+ mov (16) gudINTPY1(0)<1> 0:ud {Compr}
+ mov (16) gudINTPY1(2)<1> 0:ud {Compr}
+ mov (16) gudINTPC0(0)<1> 0:ud {Compr}
+ mov (16) gudINTPC1(0)<1> 0:ud {Compr}
+#endif
+
+ mov (1) gMVSTEP:w 0:w // Address increament for MV read
+
+ cmp.e.f0.0 (1) null:w gwMBTYPE<0;1,0> 22:w
+ (-f0.0) jmpi INTERLABEL(NOT_8x8_MODE)
+
+ //--- 8x8 mode
+
+ // Starting address of error data blocks
+ cmp.e.f0.1 (2) null<1>:w gSUBMB_SHAPE<0;1,0>:ub 0:w
+ (f0.1) jmpi INTERLABEL(CONVERT_MVS)
+
+ // Note: MVs and Weights/Offsets are already expanded by HW or driver
+
+ // MV conversion - Convert each MV to absolute coord. (= MV + MB org. + block offset)
+ shl (16) gwTEMP(0)<1> gX<0;2,1>:w 2:w // Convert MB origin to 1/4-pel unit
+ mov (1) gMVSTEP:w 24:w // Address increament for MV read
+ add (2) gwTEMP(0,4)<2> gwTEMP(0,4)<4;2,2> 16:w
+ add (2) gwTEMP(0,9)<2> gwTEMP(0,9)<4;2,2> 16:w
+ add (4) gwTEMP(0,12)<1> gwTEMP(0,12)<4;4,1> 16:w
+
+ add (16) gMV<1>:w gMV<16;16,1>:w gwTEMP(0)<16;16,1>
+ add (8) gwTEMP(0)<2> gwTEMP(0)<16;8,2> 32:w
+ add (16) gwMV(1,0)<1> gwMV(1,0)<16;16,1> gwTEMP(0)<16;16,1>
+ add (8) gwTEMP(0,1)<2> gwTEMP(0,1)<16;8,2> 32:w
+ add (16) gwMV(3,0)<1> gwMV(3,0)<16;16,1> gwTEMP(0)<16;16,1>
+ add (8) gwTEMP(0)<2> gwTEMP(0)<16;8,2> -32:w
+ add (16) gwMV(2,0)<1> gwMV(2,0)<16;16,1> gwTEMP(0)<16;16,1>
+
+ jmpi INTERLABEL(INIT_ADDRESS_REGS)
+
+INTERLABEL(NOT_8x8_MODE):
+
+ //--- !8x8 mode (16x16, 16x8, 8x16)
+
+ // MVs and Weights/Offsets are expanded
+ cmp.le.f0.1 (8) null<1>:w gwMBTYPE<0;1,0> 3:w // Check 16x16
+ mov (1) gSUBMB_SHAPE:ub 0:uw // subMB shape
+ (f0.1) mov (8) gMV<1>:d gMV<0;2,1>:d
+ (f0.1) mov (8) gdWGT(1,0)<1> gWGT<0;4,1>:d
+ (f0.1) mov (4) gdWGT(0,4)<1> gWGT<4;4,1>:d
+
+INTERLABEL(CONVERT_MVS):
+ // MV conversion - Convert each MV to absolute coord. (= MV + MB org. + block offset)
+ shl (2) gwTEMP(0)<1> gX<2;2,1>:w 2:w // Convert MB origin to 1/4-pel unit
+ add (16) gMV<1>:w gMV<16;16,1>:w gwTEMP(0)<0;2,1>
+ add (2) gwMV(0,4)<2> gwMV(0,4)<4;2,2> 32:w //{NoDDClr}
+ add (2) gwMV(0,9)<2> gwMV(0,9)<4;2,2> 32:w //{NoDDChk,NoDDClr}
+ add (4) gwMV(0,12)<1> gwMV(0,12)<4;4,1> 32:w //{NoDDChk}
+
+INTERLABEL(INIT_ADDRESS_REGS):
+ // Initialize the address registers
+ mov (2) pERRORYC:ud nOFFSET_ERROR:ud {NoDDClr} // Address of Y and C error blocks
+ mov (1) pRECON_MV:ud nOFFSET_RECON_MV:ud {NoDDChk,NoDDClr} // Address of recon area and motion vectors
+ mov (1) pWGT_BIDX:ud nOFFSET_WGT_BIDX:ud {NoDDChk} // Address of weights/offsets and binding tbl idx
+
+ // Read the parity of the current field (gPARITY - 0:top, 1:bottom, 3:frame)
+ // and set message descriptor for frame/field write
+#if defined(MBAFF)
+ and.nz.f0.0 (1) null:uw gFIELDMBFLAG:ub nFIELDMB_MASK:uw
+ (f0.0) and (1) gPARITY:uw gMBPARITY:ub nMBPARITY_MASK:uw
+ (-f0.0) mov (1) gPARITY:uw 3:uw
+#elif defined(FIELD)
+ and (1) gPARITY:uw gMBPARITY:ub nMBPARITY_MASK:uw
+#endif
+
+
+//#endif // !defined(__INITIALIZE_MBPARA__)
diff --git a/src/shaders/h264/mc/inter_Header.inc b/src/shaders/h264/mc/inter_Header.inc new file mode 100644 index 00000000..bd10c22c --- /dev/null +++ b/src/shaders/h264/mc/inter_Header.inc @@ -0,0 +1,371 @@ +/*
+ * Header file for all AVC INTER prediction kernels
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+#if !defined(__INTER_HEADER__) // Make sure this file is only included once
+#define __INTER_HEADER__
+
+// Module name: inter_header.inc
+//
+// Header file for all AVC INTER prediction kernels
+//
+
+#define INTER_KERNEL
+
+//-------------------------------------------------------------------------------------------
+// TODO: The followings will be merged with the above definitions later
+//-------------------------------------------------------------------------------------------
+
+
+//------------ Input parameters & bit masks
+
+// SW WA for weighted prediction - 2007/09/06
+//.declare guwR1 Base=r1 ElementSize=2 Type=uw
+//.declare guwW128 Base=r63.13 ElementSize=2 Type=uw
+
+#ifdef DEV_ILK
+// #define SW_W_128 // Enable SW WA for special Weight=128 case. Can be commented to disable it
+#else // Pre DEV_ILK
+#define SW_W_128 // Enable SW WA for special Weight=128 case.
+#endif // DEV_ILK
+
+#ifdef SW_W_128
+.declare gudW128 Base=r1.0 ElementSize=4 Type=ud
+#else
+#endif // SW_W_128
+
+#define gORIX r3.4 // :ub, X origin
+#define gORIY r3.5 // :ub, Y origin
+
+#define gCBP r3.9 // :ub, CBP (0, 0, Y0, Y1, Y2, Y3, Cb, Cr)
+#define nCBPY_MASK 0x3c
+#define nCBPU_MASK 0x2
+#define nCBPV_MASK 0x1
+
+#define gFIELDFLAGS r3.1 // :uw - To compute message descriptor for write
+
+#define gMBTYPE r3.1 // :ub, MB type
+#define nMBTYPE_MASK 0x1f
+#define gFIELDMBFLAG r3.1 // :ub, Field MB flag
+#define nFIELDMB_MASK 0x40
+#define gMBPARITY r3.3 // :ub, Bottom field flag
+#define nMBPARITY_MASK 0x01
+
+#define gWPREDFLAG r3.0 // :ub, Weighted pred flag
+#define nWBIDIR_MASK 0xc0
+
+#define gSUBMB_SHAPE r3.12 // :ub, Sub-MB shape
+#define gSUBMB_MODE r3.13 // :ub, Sub-MB prediction mode
+.declare guwSUBMB_SHAPE_MODE Base=r3.6 ElementSize=2 Type=uw
+
+#define gYWDENOM r3.14 // :ub, Luma log2 weight denom
+#define gCWDENOM r3.15 // :ub, Chroma log2 weight denom
+
+#define gADDR r3.24 // :ub, Register addresses of error data / MV
+
+.declare gubBIDX Base=r3.16 ElementSize=1 Type=ub
+
+#define gWGT r8 // Weights/offsets
+.declare gdWGT Base=r8 ElementSize=4 Type=d
+.declare gwWGT Base=r8 ElementSize=2 Type=w
+#define gMV r4 // MVs
+.declare gwMV Base=r4 ElementSize=2 Type=w
+.declare gdMV Base=r4 ElementSize=4 Type=d
+
+.declare gwERRORY Base=r10 ElementSize=2 Type=w // 16 GRFs
+.declare gubERRORY Base=r10 ElementSize=1 Type=ub
+.declare gwERRORC Base=r26 ElementSize=2 Type=w // 8 GRFs
+.declare gubERRORC Base=r26 ElementSize=2 Type=ub
+
+//------------ Address registers
+#define pMSGDSC a0.0 // ud: Must be the leading dword of the address register
+#define pREF a0.0
+
+#define pBIDX a0.2
+#define pWGT a0.3
+#define pERRORYC a0.2 // :ud
+#define pERRORY a0.4
+#define pERRORC a0.5
+#define pMV a0.6
+
+#define pWGT_BIDX a0.1 // :ud, WGT & BIDX
+#define pRECON_MV a0.3 // :ud, RECON & MV
+
+#define pREF0 a0.0 // :uw
+#define pREF0D a0.0 // :ud
+#define pREF1 a0.1
+#define pREF2 a0.2
+#define pREF2D a0.1 // :ud
+#define pREF3 a0.3
+#define pREF4 a0.4
+#define pREF4D a0.2 // :ud
+#define pREF5 a0.5
+#define pREF6 a0.6
+#define pREF6D a0.3 // :ud
+#define pREF7 a0.7
+
+#define pRES a0.6
+#define pRESD a0.3 // :ud
+#define pRESULT a0.7
+
+#define p0 a0.0
+#define p1 a0.1
+
+//------------ Constants for static/inline/indirect
+#define nOFFSET_BIDX 112 // = 32*3+4*4
+
+#define nOFFSET_WGT 256 // = 32*8
+#define nOFFSET_WGT_BIDX 0x01000070 // = (256<<16)+112
+#define nOFFSET_ERROR 0x03400140 // = (320+128*4)<<16+320=0x03400140
+#define nOFFSET_ERRORY 0x0140
+#define nOFFSET_ERRORC 0x0340
+#define nOFFSET_MV 128 // = 32*4
+#define nOFFSET_RECON_MV 0x04400080 // = (1088<<16)+128 // TODO: OFFSET_RECON is obsolete
+
+//------------ Constants for kernel internal variables
+#define nOFFSET_INTPY0 0x0640 // = 32*50
+#define nOFFSET_INTPY1 0x0780 // = 32*60
+#define nOFFSET_INTPC0 0x06c0 // = 32*54
+#define nOFFSET_INTPC1 0x0480 // = 32*36
+#define nOFFSET_INTP0 0x06c00640
+#define nOFFSET_INTP1 0x04800780
+
+#define nOFFSET_INTERIM 0x0480 // = 32*36
+#define nOFFSET_INTERIM2 0x04A00480 // = ((32*37)<<16)|(32*36)
+#define nOFFSET_INTERIM3 0x04A00480 // = ((32*36+32)<<16)|(32*36)
+#define nOFFSET_INTERIM4 0x04A00490 // = ((32*37)<<16)|(32*36+16)
+
+#define nOFFSET_INTERIM4x4 0x04C0 // = 32*38
+#define nOFFSET_INTERIM4x4_4 0x04E004D0 // = ((32*38+32)<<16)|(32*38+16)
+#define nOFFSET_INTERIM4x4_5 0x04D004C0 // = ((32*38+16)<<16)|(32*38)
+#define nOFFSET_INTERIM4x4_6 0x04E004C0 // = ((32*38+32)<<16)|(32*38)
+#define nOFFSET_INTERIM4x4_7 0x04D004C8 // = ((32*38+16)<<16)|(32*38+8)
+#define nOFFSET_INTERIM4x4_8 0x04E004D8 // = ((32*38+32)<<16)|(32*38+24)
+#define nOFFSET_INTERIM4x4_9 0x04F004E8 // = ((32*38+48)<<16)|(32*38+40)
+
+#define nOFFSET_RES 0x540 // = 32*42
+#define nOFFSET_REF 0x560 // = 32*43
+#define nOFFSET_REFC 0x700 // = 32*56
+
+ // Binding table index
+#define nBDIX_DESTY 0
+#define nBDIX_DESTC 1
+#define nBI_LC_DIFF 0x10 // Binding table index diff between luma and chroma
+
+#define nGRFWIB 32
+#define nGRFHWIB 16
+
+//------------ Regions
+
+.declare gudREF Base=r43 ElementSize=4 SrcRegion=<16;16,1> Type=ud
+.declare gubREF Base=r43 ElementSize=1 Type=ub
+.declare gudREFC Base=r56 ElementSize=4 SrcRegion=<16;16,1> Type=ud
+
+// 16x16 handling
+.declare gudREF21x21 Base=r58 ElementSize=4 SrcRegion=<16;16,1> Type=ud
+.declare gudREF18x10 Base=r66 ElementSize=4 SrcRegion=<16;16,1> Type=ud
+.declare gubREF18x10 Base=r66 ElementSize=1 SrcRegion=<16;16,1> Type=ub
+
+
+
+.declare gudREF16x16 Base=r38 ElementSize=4 Type=ud // 8 GRFs
+.declare gubREF16x16 Base=r38 ElementSize=1 Type=ub
+.declare gudREFC16x8 Base=r46 ElementSize=4 Type=ud // 4 GRFs
+.declare gubREFC16x8 Base=r46 ElementSize=1 Type=ub
+
+// TODO
+.declare gubAVG Base=r56 ElementSize=1 Type=ub
+.declare gubREFY_BWD Base=r64 ElementSize=1 Type=ub
+.declare gubREFC_BWD Base=r72 ElementSize=1 Type=ub
+
+
+.declare guwINTPY0 Base=r50 ElementSize=2 SrcRegion=<16;16,1> Type=uw
+.declare gudINTPY0 Base=r50 ElementSize=4 Type=ud
+.declare gubINTPY0 Base=r50 ElementSize=1 SrcRegion=<32;16,2> Type=ub
+.declare guwINTPY1 Base=r60 ElementSize=2 SrcRegion=<16;16,1> Type=uw
+.declare gudINTPY1 Base=r60 ElementSize=4 Type=ud
+.declare gubINTPY1 Base=r60 ElementSize=1 SrcRegion=<32;16,2> Type=ub
+.declare guwYPRED Base=r50 ElementSize=2 SrcRegion=<8;8,1> Type=uw
+.declare gubYPRED Base=r50 ElementSize=1 SrcRegion=<32;16,2> Type=ub
+
+.declare guwINTPC0 Base=r54 ElementSize=2 SrcRegion=<16;16,1> Type=uw
+.declare gwINTPC0 Base=r54 ElementSize=2 SrcRegion=<16;16,1> Type=w
+.declare gudINTPC0 Base=r54 ElementSize=4 Type=ud
+.declare gubINTPC0 Base=r54 ElementSize=1 SrcRegion=<32;16,2> Type=ub
+.declare guwINTPC1 Base=r36 ElementSize=2 SrcRegion=<16;16,1> Type=uw
+.declare gudINTPC1 Base=r36 ElementSize=4 Type=ud
+.declare gubINTPC1 Base=r36 ElementSize=1 SrcRegion=<32;16,2> Type=ub
+.declare guwCPRED Base=r54 ElementSize=2 SrcRegion=<16;8,2> Type=uw
+.declare gubCPRED Base=r54 ElementSize=1 SrcRegion=<32;8,4> Type=ub
+
+#define gINTERIM r36
+.declare gubINTERIM_BUF Base=r36 ElementSize=1 SrcRegion=<32;16,2> Type=ub
+#define gINTERIM4x4 r38
+.declare gubINTERIM4x4_BUF Base=r38 ElementSize=1 SrcRegion=<32;16,2> Type=ub
+.declare gwINTERIM4x4_BUF Base=r38 ElementSize=2 Type=w
+
+.declare gubINTERIM_BUF2 Base=r42 ElementSize=1 SrcRegion=<8;4,2> Type=ub
+.declare gwINTERIM_BUF2 Base=r42 ElementSize=2 SrcRegion=<16;16,1> Type=w
+.declare guwINTERIM_BUF2 Base=r42 ElementSize=2 Type=uw
+
+.declare gwINTERIM_BUF3 Base=r38 ElementSize=2 SrcRegion=<16;16,1> Type=w // 2 GRFs
+.declare gubINTERIM_BUF3 Base=r38 ElementSize=1 Type=ub
+
+.declare gwTEMP Base=r42 ElementSize=2 SrcRegion=<16;16,1> Type=w
+
+//------------ General registers
+
+#define gX r3.2 // w
+#define gY r3.3 // w
+
+#define gMSGDSC_R r3.6 // ud
+#define gMSGDSC_W r3.7 // ud
+
+#ifdef SW_W_128
+.declare gwMBTYPE Base=r8.6 ElementSize=2 Type=w // Shared with gLOOP_SUBMB
+
+// TODO
+#define gLOOP_SUBMB r8.6
+#define gLOOP_SUBMBPT r8.7
+#define gLOOP_DIR r9.6
+#define gLOOPCNT r9.7 // Loop counter for submodules
+#else
+.declare gwMBTYPE Base=r1.0 ElementSize=2 Type=w // Shared with gLOOP_SUBMB
+
+// TODO
+#define gLOOP_SUBMB r1.0
+#define gLOOP_SUBMBPT r1.1
+#define gLOOP_DIR r8.7
+#define gLOOPCNT r9.7 // Loop counter for submodules
+#endif // SW_W_128
+
+#define gW0 r34.6 // Temporary WORD
+#define gW1 r34.7 // Temporary WORD
+#define gW2 r34.8 // Temporary WORD
+#define gW3 r34.9 // Temporary WORD
+#define gD0 r34.3 // Temporary DWORD
+
+#define gW4 r34.15
+
+//
+
+#define gMVX_INT r34.0 // :w
+#define gMVY_INT r34.1 // :w
+#define gMVX_FRAC r34.2 // :w
+#define gMVY_FRAC r34.3 // :w
+#define gMVX_FRACC r34.4 // :w
+#define gMVY_FRACC r34.5 // :w
+
+#define gpINTPY r34.10
+#define gpINTPC r34.11
+#define gpINTP r34.5 // DW
+
+#define gPREDFLAG r34.12
+#define gBIDX r34.13
+#define gREFPARITY r34.14
+#define gCHRMVADJ r1.14
+#define gPARITY r1.15
+#define gCBP_MASK r1.1
+
+#define gMVSTEP r1.13
+
+#define gpADDR r1.2 // :uw (8 words)
+
+#define gSHAPETEMP r8.15 // :uw
+
+#define gCOEFA r42.0
+#define gCOEFB r42.1
+#define gCOEFC r42.2
+#define gCOEFD r42.3
+
+// Weighted prediction
+#define gPREDFLAG0 r46.0
+#define gPREDFLAG1 r46.2
+
+#define gWEIGHTFLAG r43.2
+#define gBIPRED r43.3
+#define gYADD r43.4
+#define gCADD r43.5
+#define gYSHIFT r43.6
+#define gCSHIFT r43.7
+
+#define gOFFSET r44.0
+#define gUOFFSET r44.1
+#define gVOFFSET r44.2
+
+#define gWT0 r45.0
+#define gO0 r45.1
+#define gWT1 r45.2
+#define gO1 r45.3
+#define gUW0 r45.4
+#define gUO0 r45.5
+#define gUW1 r45.6
+#define gUO1 r45.7
+#define gVW0 r45.8
+#define gVO0 r45.9
+#define gVW1 r45.10
+#define gVO1 r45.11
+
+#define gWT0_D r45.0
+#define gUW0_D r45.2
+
+//------------ Message-related Registers & constants
+#define gMSGSRC r2 // Message Source
+
+#define mMSGHDR m1
+#define mMSGHDRY m1
+#define mMSGHDRC m2
+#define mMSGHDR1 m1
+#define mMSGHDR2 m2
+#define mMSGHDR3 m3
+#define mMSGHDR4 m4
+#define mMSGHDRYW m1
+#define mMSGHDRCW m10
+
+#ifdef DEV_ILK
+ // 0000 0100(read) 0001(msg len) xxxx(resp len) 1010 (sampler cache) xxxx (field/frame) xxxx xxxx (bidx)
+#define nDWBRMSGDSC_SC 0x0208A002 // DWORD Block Read Message Descriptor through Data Port, Sampler Cache
+#define nDWBRMSGDSC_SC_TF 0x0208E602 // DWORD Block Read Message Descriptor through Data Port, Sampler Cache
+#define nDWBRMSGDSC_SC_BF 0x0208E702 // DWORD Block Read Message Descriptor through Data Port, Sampler Cache
+ // 0000 0101(write) 0001(msg len) xxxx(resp len) 0010 (render cache) xxxx (field/frame) xxxx xxxx (bidx)
+#define nDWBWMSGDSC 0x02082000 // DWORD Block Write Message Descriptor through Data Port, Render Cache
+#define nDWBWMSGDSC_TF 0x02082600 // DWORD Block Write Message Descriptor through Data Port, Render Cache
+#define nDWBWMSGDSC_BF 0x02082700 // DWORD Block Write Message Descriptor through Data Port, Render Cache
+
+#else // Pre DEV_ILK
+ // 0000 0100(read) 0001(msg len) xxxx(resp len) 1010 (sampler cache) xxxx (field/frame) xxxx xxxx (bidx)
+#define nDWBRMSGDSC_SC 0x0410A002 // DWORD Block Read Message Descriptor through Data Port, Sampler Cache
+#define nDWBRMSGDSC_SC_TF 0x0410A602 // DWORD Block Read Message Descriptor through Data Port, Sampler Cache
+#define nDWBRMSGDSC_SC_BF 0x0410A702 // DWORD Block Read Message Descriptor through Data Port, Sampler Cache
+ // 0000 0101(write) 0001(msg len) xxxx(resp len) 0010 (render cache) xxxx (field/frame) xxxx xxxx (bidx)
+#define nDWBWMSGDSC 0x05102000 // DWORD Block Write Message Descriptor through Data Port, Render Cache
+#define nDWBWMSGDSC_TF 0x05102600 // DWORD Block Write Message Descriptor through Data Port, Render Cache
+#define nDWBWMSGDSC_BF 0x05102700 // DWORD Block Write Message Descriptor through Data Port, Render Cache
+#endif // DEV_ILK
+
+#define nDWB_FIELD_MASK 0x0600
+
+// message data payload
+.declare mbMSGPAYLOADY Base=m2 ElementSize=1 SrcRegion=REGION(16,1) Type=b
+.declare mbMSGPAYLOADC Base=m11 ElementSize=1 SrcRegion=REGION(16,1) Type=b
+
+// Destination registers for write commit
+#define gREG_WRITE_COMMIT_Y r10.0
+#define gREG_WRITE_COMMIT_UV r11.0
+
+#define RETURN_REG_INTER r1.5 // Return pointer for all sub-routine calls (type DWORD)
+
+#define CALL_INTER(subFunc, skipInst) add (1) RETURN_REG_INTER<1>:ud ip:ud 1+skipInst*INST_SIZE \n\
+ jmpi (1) subFunc
+#define RETURN_INTER mov (1) ip:ud RETURN_REG_INTER<0;1,0>:ud // Return to calling module
+
+
+// End of inter_header.inc
+
+#endif // !defined(__INTER_HEADER__)
+
diff --git a/src/shaders/h264/mc/interpolate_C_2x2.asm b/src/shaders/h264/mc/interpolate_C_2x2.asm new file mode 100644 index 00000000..ffa65cf3 --- /dev/null +++ b/src/shaders/h264/mc/interpolate_C_2x2.asm @@ -0,0 +1,57 @@ +/*
+ * Interpolation kernel for chrominance 2x2 motion compensation
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: Interpolate_C_2x2.asm
+//
+// Interpolation kernel for chrominance 2x2 motion compensation
+//
+// $Revision: 8 $
+// $Date: 10/09/06 4:00p $
+//
+
+
+//#if !defined(__Interpolate_C_2x2__) // Make sure this is only included once
+//#define __Interpolate_C_2x2__
+
+
+ // (8-xFrac) and (8-yFrac)
+ add (2) gW0<1>:w gMVX_FRACC<2;2,1>:w -0x08:w
+
+ // Compute the GRF address of the starting position of the reference area
+ mov (1) pREF0:w nOFFSET_REFC:w {NoDDClr}
+ mov (1) pRESULT:uw gpINTPC:uw {NoDDChk}
+
+ // gCOEFA = (8-xFrac)*(8-yFrac)
+ // gCOEFB = xFrac*(8-yFrac)
+ // gCOEFC = (8-xFrac)*yFrac
+ // gCOEFD = xFrac*yFrac
+ mul (1) gCOEFD:w gMVX_FRACC:w gMVY_FRACC:w {NoDDClr}
+ mul (1) gCOEFA:w -gW0:w -gW1:uw {NoDDClr,NoDDChk}
+ mul (1) gCOEFB:w gMVX_FRACC:w -gW1:uw {NoDDClr,NoDDChk}
+ mul (1) gCOEFC:w -gW0:w gMVY_FRACC:w {NoDDChk}
+
+ // (8-xFrac)*(8-yFrac)*A
+ // ---------------------
+ mul (8) acc0<1>:uw r[pREF0,0]<8;4,1>:ub gCOEFA:uw
+
+ // xFrac*(8-yFrac)*B
+ // -------------------
+ mac (8) acc0<1>:uw r[pREF0,2]<8;4,1>:ub gCOEFB:uw
+
+ // (8-xFrac)*yFrac*C
+ // -------------------
+ mac (8) acc0<1>:uw r[pREF0,8]<8;4,1>:ub gCOEFC:uw
+
+ // xFrac*yFrac*D
+ // -----------------
+ mac (8) gwINTERIM_BUF2(0)<1> r[pREF0,10]<8;4,1>:ub gCOEFD:uw
+ mov (4) r[pRESULT]<1>:uw gwINTERIM_BUF2(0)<4;4,1> {NoDDClr}
+ mov (4) r[pRESULT,16]<1>:uw gwINTERIM_BUF2(0,4)<4;4,1> {NoDDChk}
+
+//#endif // !defined(__Interpolate_C_2x2__)
diff --git a/src/shaders/h264/mc/interpolate_C_4x4.asm b/src/shaders/h264/mc/interpolate_C_4x4.asm new file mode 100644 index 00000000..ea23b119 --- /dev/null +++ b/src/shaders/h264/mc/interpolate_C_4x4.asm @@ -0,0 +1,67 @@ +/*
+ * Interpolation kernel for chrominance 4x4 motion compensation
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: Interpolate_C_4x4_Func.asm
+//
+// Interpolation kernel for chrominance 4x4 motion compensation
+//
+// $Revision: 8 $
+// $Date: 10/09/06 4:00p $
+//
+
+
+//#if !defined(__Interpolate_C_4x4_Func__) // Make sure this is only included once
+//#define __Interpolate_C_4x4_Func__
+
+
+INTERLABEL(Interpolate_C_4x4_Func):
+
+
+ // (8-xFrac) and (8-yFrac)
+ add (2) gW0<1>:w gMVX_FRACC<2;2,1>:w -0x08:w
+
+ // Compute the GRF address of the starting position of the reference area
+ mov (1) pREF0:w nOFFSET_REFC:w {NoDDClr}
+ mov (1) pREF1:uw nOFFSET_REFC+16:w {NoDDChk,NoDDClr}
+ mov (1) pRESULT:uw gpINTPC:uw {NoDDChk}
+
+ // gCOEFA = (8-xFrac)*(8-yFrac)
+ // gCOEFB = xFrac*(8-yFrac)
+ // gCOEFC = (8-xFrac)*yFrac
+ // gCOEFD = xFrac*yFrac
+ mul (1) gCOEFD:w gMVX_FRACC:w gMVY_FRACC:w {NoDDClr}
+ mul (1) gCOEFA:w -gW0:w -gW1:uw {NoDDClr,NoDDChk}
+ mul (1) gCOEFB:w gMVX_FRACC:w -gW1:uw {NoDDClr,NoDDChk}
+ mul (1) gCOEFC:w -gW0:w gMVY_FRACC:w {NoDDChk}
+
+ add (2) gW0<1>:uw pREF0<2;2,1>:uw 16:w
+
+ // (8-xFrac)*(8-yFrac)*A
+ // ---------------------
+ mul (16) acc0<1>:uw r[pREF0,0]<16;8,1>:ub gCOEFA:uw
+ mul (16) acc1<1>:uw r[pREF0,nGRFWIB]<16;8,1>:ub gCOEFA:uw
+
+ // xFrac*(8-yFrac)*B
+ // -------------------
+ mac (16) acc0<1>:uw r[pREF0,2]<16;8,1>:ub gCOEFB:uw
+ mac (16) acc1<1>:uw r[pREF0,nGRFWIB+2]<16;8,1>:ub gCOEFB:uw
+
+ // (8-xFrac)*yFrac*C
+ // -------------------
+ mov (2) pREF0<1>:uw gW0<2;2,1>:uw
+ mac (16) acc0<1>:uw r[pREF0,0]<8,1>:ub gCOEFC:uw
+ mac (16) acc1<1>:uw r[pREF0,nGRFWIB]<8,1>:ub gCOEFC:uw
+
+ // xFrac*yFrac*D
+ // -----------------
+ mac (16) r[pRESULT]<1>:uw r[pREF0,2]<8,1>:ub gCOEFD:uw
+ mac (16) r[pRESULT,GRFWIB]<1>:uw r[pREF0,nGRFWIB+2]<8,1>:ub gCOEFD:uw {SecHalf}
+
+
+//#endif // !defined(__Interpolate_C_4x4_Func__)
diff --git a/src/shaders/h264/mc/interpolate_Y_4x4.asm b/src/shaders/h264/mc/interpolate_Y_4x4.asm new file mode 100644 index 00000000..dbb5733c --- /dev/null +++ b/src/shaders/h264/mc/interpolate_Y_4x4.asm @@ -0,0 +1,217 @@ +/*
+ * Interpolation kernel for luminance motion compensation
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: Interpolate_Y_4x4.asm
+//
+// Interpolation kernel for luminance motion compensation
+//
+// $Revision: 10 $
+// $Date: 10/09/06 4:00p $
+//
+
+
+ // Compute the GRF address of the starting position of the reference area
+#if 1
+ (-f0.1) mov (1) pREF:w nOFFSET_REF+2+nGRFWIB:w
+ (f0.1) mov (1) pREF:w nOFFSET_REF+2:w
+ mov (1) pRESULT:uw gpINTPY:uw
+#else
+ mov (1) pREF:w nOFFSET_REF+2+nGRFWIB:w {NoDDClr}
+ mov (1) pRESULT:uw gpINTPY:uw {NoDDChk}
+#endif
+
+ /*
+ * | |
+ * - - 0 1 2 3 + -
+ * 4 5 6 7
+ * 8 9 A B
+ * C D E F
+ * - - + - - - + -
+ * | |
+ */
+
+ // Case 0
+ or.z.f0.1 (16) null:w gMVY_FRAC<0;1,0>:w gMVX_FRAC<0;1,0>:w
+ (f0.1) mov (4) r[pRESULT]<1>:uw r[pREF0]<4;4,1>:ub
+ (f0.1) mov (4) r[pRESULT,16]<1>:uw r[pREF0,16]<4;4,1>:ub
+ (f0.1) mov (4) r[pRESULT,32]<1>:uw r[pREF0,32]<4;4,1>:ub
+ (f0.1) mov (4) r[pRESULT,48]<1>:uw r[pREF0,48]<4;4,1>:ub
+ (f0.1) jmpi INTERLABEL(Exit_Interpolate_Y_4x4)
+
+ // Store all address registers
+ mov (8) gpADDR<1>:w a0<8;8,1>:w
+
+ mul.z.f0.0 (1) gW4:w gMVY_FRAC:w gMVX_FRAC:w
+ and.nz.f0.1 (1) null gW4:w 1:w
+
+ add (1) pREF1:uw pREF0:uw nGRFWIB/2:uw
+ add (2) pREF2<1>:uw pREF0<2;2,1>:uw nGRFWIB:uw
+ mov (4) gW0<1>:uw pREF0<4;4,1>:uw
+
+ (f0.0) jmpi INTERLABEL(Interpolate_Y_H_4x4)
+ (f0.1) jmpi INTERLABEL(Interpolate_Y_H_4x4)
+
+ //-----------------------------------------------------------------------
+ // CASE: A69BE (H/V interpolation)
+ //-----------------------------------------------------------------------
+
+ // Compute interim horizontal intepolation
+ add (1) pREF0<1>:uw pREF0<0;1,0>:uw -34:w
+ add (1) pREF1<1>:uw pREF1<0;1,0>:uw -18:w {NoDDClr}
+ mov (1) pRESD:ud nOFFSET_INTERIM4x4_5:ud {NoDDChk} // Case 69be
+
+ // Check whether this position is 'A'
+ cmp.e.f0.0 (1) null gW4:w 4:w
+
+ $for(0;<2;1) {
+ add (16) acc0<1>:w r[pREF0,nGRFWIB*2*%1]<16;4,1>:ub r[pREF0,nGRFWIB*2*%1+5]<16;4,1>:ub {Compr}
+ mac (16) acc0<1>:w r[pREF0,nGRFWIB*2*%1+1]<16;4,1>:ub -5:w {Compr}
+ mac (16) acc0<1>:w r[pREF0,nGRFWIB*2*%1+2]<16;4,1>:ub 20:w {Compr}
+ mac (16) acc0<1>:w r[pREF0,nGRFWIB*2*%1+3]<16;4,1>:ub 20:w {Compr}
+ mac (16) r[pRES,nGRFWIB*%1]<1>:w r[pREF0,nGRFWIB*2*%1+4]<16;4,1>:ub -5:w {Compr}
+ }
+ // last line
+ add (4) acc0<1>:w r[pREF0,nGRFWIB*2*2]<4;4,1>:ub r[pREF0,nGRFWIB*2*2+5]<4;4,1>:ub
+ mac (4) acc0<1>:w r[pREF0,nGRFWIB*2*2+1]<4;4,1>:ub -5:w
+ mac (4) acc0<1>:w r[pREF0,nGRFWIB*2*2+2]<4;4,1>:ub 20:w
+ mac (4) acc0<1>:w r[pREF0,nGRFWIB*2*2+3]<4;4,1>:ub 20:w
+ mac (4) r[pRES,nGRFWIB*2]<1>:w r[pREF0,nGRFWIB*2*2+4]<4;4,1>:ub -5:w
+
+ // Compute interim/output vertical interpolation
+ mov (1) pREF6D:ud nOFFSET_INTERIM4x4_4:ud {NoDDClr}
+ mov (1) pREF0D:ud nOFFSET_INTERIM4x4_7:ud {NoDDChk,NoDDClr}
+ mov (1) pREF2D:ud nOFFSET_INTERIM4x4_8:ud {NoDDChk,NoDDClr}
+ mov (1) pREF4D:ud nOFFSET_INTERIM4x4_9:ud {NoDDChk}
+
+ add (16) acc0<1>:w gwINTERIM4x4_BUF(0)<16;16,1> 512:w
+ mac (16) acc0<1>:w gwINTERIM4x4_BUF(1)<16;16,1> -5:w
+ mac (16) acc0<1>:w r[pREF6,0]<8,1>:w 20:w
+
+ (f0.0) mov (1) pRES:uw nOFFSET_RES:uw // Case a
+ (-f0.0) mov (1) pRES:uw nOFFSET_INTERIM4x4:uw // Case 69be
+
+ mac (16) acc0<1>:w r[pREF0,0]<4,1>:w -5:w
+ mac (16) acc0<1>:w r[pREF0,nGRFWIB]<4,1>:w 1:w
+ mac (16) acc0<1>:w r[pREF2,0]<4,1>:w 20:w
+ asr.sat (16) r[pRES]<2>:ub acc0<16;16,1>:w 10:w
+
+ (f0.0) jmpi INTERLABEL(Return_Interpolate_Y_4x4)
+
+INTERLABEL(Interpolate_Y_H_4x4):
+
+ cmp.e.f0.0 (1) null gMVX_FRAC:w 0:w
+ cmp.e.f0.1 (1) null gMVY_FRAC:w 2:w
+ (f0.0) jmpi INTERLABEL(Interpolate_Y_V_4x4)
+ (f0.1) jmpi INTERLABEL(Interpolate_Y_V_4x4)
+
+ //-----------------------------------------------------------------------
+ // CASE: 123567DEF (H interpolation)
+ //-----------------------------------------------------------------------
+
+ add (4) pREF0<1>:uw gW0<4;4,1>:uw -2:w
+ cmp.g.f0.0 (4) null:w gMVY_FRAC<0;1,0>:w 2:w
+ cmp.e.f0.1 (1) null gMVX_FRAC:w 2:w
+ (f0.0) add (4) pREF0<1>:uw pREF0<4;4,1>:uw nGRFWIB/2:uw
+
+ cmp.e.f0.0 (1) null:w gMVY_FRAC<0;1,0>:w 0:w
+
+ (f0.1) mov (1) pRESULT:uw nOFFSET_RES:uw // Case 26E
+ (-f0.1) mov (1) pRESULT:uw nOFFSET_INTERIM4x4:uw // Case 1357DF
+
+ // Compute interim/output horizontal interpolation
+ add (16) acc0<1>:w r[pREF0]<4,1>:ub 16:w
+ mac (16) acc0<1>:w r[pREF0,1]<4,1>:ub -5:w
+ mac (16) acc0<1>:w r[pREF0,2]<4,1>:ub 20:w
+ mac (16) acc0<1>:w r[pREF0,3]<4,1>:ub 20:w
+ mac (16) acc0<1>:w r[pREF0,4]<4,1>:ub -5:w
+ mac (16) acc0<1>:w r[pREF0,5]<4,1>:ub 1:w
+ asr.sat (16) r[pRESULT]<2>:ub acc0<16;16,1>:w 5:w
+
+ (-f0.1) jmpi INTERLABEL(Interpolate_Y_V_4x4)
+ (-f0.0) jmpi INTERLABEL(Average_4x4)
+
+ jmpi INTERLABEL(Return_Interpolate_Y_4x4)
+
+INTERLABEL(Interpolate_Y_V_4x4):
+
+ cmp.e.f0.0 (1) null gMVY_FRAC:w 0:w
+ (f0.0) jmpi INTERLABEL(Interpolate_Y_I_4x4)
+
+ //-----------------------------------------------------------------------
+ // CASE: 48C59D7BF (V interpolation)
+ //-----------------------------------------------------------------------
+
+ cmp.g.f0.1 (8) null:w gMVX_FRAC<0;1,0>:w 2:w
+
+ mov (4) pREF0<1>:uw gW0<4;4,1>:uw {NoDDClr}
+ add (4) pREF4<1>:w gW0<4;4,1>:uw 16:w {NoDDChk}
+
+ (f0.1) add (8) pREF0<1>:uw pREF0<4;4,1>:uw 1:uw
+
+ cmp.e.f0.0 (1) null:w gMVX_FRAC<0;1,0>:w 0:w
+ cmp.e.f0.1 (1) null gMVY_FRAC:w 2:w
+
+ // Compute interim/output vertical interpolation
+ add (16) acc0<1>:w r[pREF0,-nGRFWIB]<4,1>:ub 16:w
+ mac (16) acc0<1>:w r[pREF0]<4,1>:ub 20:w
+ mac (16) acc0<1>:w r[pREF0,nGRFWIB]<4,1>:ub -5:w
+ mac (16) acc0<1>:w r[pREF4,-nGRFWIB]<4,1>:ub -5:w
+ mac (16) acc0<1>:w r[pREF4]<4,1>:ub 20:w
+ mac (16) acc0<1>:w r[pREF4,nGRFWIB]<4,1>:ub 1:w
+
+ mov (1) pRESULT:uw nOFFSET_RES:uw
+ (-f0.0) jmpi INTERLABEL(VFILTER_4x4)
+ (-f0.1) mov (1) pRESULT:uw nOFFSET_INTERIM4x4:uw
+
+ INTERLABEL(VFILTER_4x4):
+
+ asr.sat (16) r[pRESULT]<2>:ub acc0<16;16,1>:w 5:w
+
+ (-f0.0) jmpi INTERLABEL(Average_4x4)
+ (f0.1) jmpi INTERLABEL(Return_Interpolate_Y_4x4 )
+
+INTERLABEL(Interpolate_Y_I_4x4):
+
+ //-----------------------------------------------------------------------
+ // CASE: 134C (Integer position)
+ //-----------------------------------------------------------------------
+
+ mov (4) pREF0<1>:uw gW0<4;4,1>:uw
+
+ cmp.e.f0.0 (4) null:w gMVX_FRAC<0;1,0>:w 3:w
+ cmp.e.f0.1 (4) null:w gMVY_FRAC<0;1,0>:w 3:w
+ (f0.0) add (4) pREF0<1>:uw pREF0<4;4,1>:uw 1:uw
+ (f0.1) add (4) pREF0<1>:uw pREF0<4;4,1>:uw nGRFWIB/2:uw
+
+ mov (16) guwINTERIM_BUF2(0)<1> r[pREF0]<4,1>:ub
+
+INTERLABEL(Average_4x4):
+
+ //-----------------------------------------------------------------------
+ // CASE: 13456789BCDEF (Average)
+ //-----------------------------------------------------------------------
+
+ // Average two interim results
+ avg.sat (16) gubINTERIM_BUF2(0)<2> gubINTERIM_BUF2(0)<32;16,2> gINTERIM4x4<32;16,2>:ub
+
+INTERLABEL(Return_Interpolate_Y_4x4):
+ // Move result
+ mov (1) pRES:uw gpINTPY:uw
+ mov (4) r[pRES,0]<2>:ub gubINTERIM_BUF2(0,0)
+ mov (4) r[pRES,16]<2>:ub gubINTERIM_BUF2(0,8)
+ mov (4) r[pRES,32]<2>:ub gubINTERIM_BUF2(0,16)
+ mov (4) r[pRES,48]<2>:ub gubINTERIM_BUF2(0,24)
+
+ // Restore all address registers
+ mov (8) a0<1>:w gpADDR<8;8,1>:w
+
+INTERLABEL(Exit_Interpolate_Y_4x4):
+
+
+// end of file
diff --git a/src/shaders/h264/mc/interpolate_Y_8x8.asm b/src/shaders/h264/mc/interpolate_Y_8x8.asm new file mode 100644 index 00000000..e7e3ff9e --- /dev/null +++ b/src/shaders/h264/mc/interpolate_Y_8x8.asm @@ -0,0 +1,262 @@ +/*
+ * Interpolation kernel for luminance motion compensation
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: Interpolate_Y_8x8.asm
+//
+// Interpolation kernel for luminance motion compensation
+//
+// $Revision: 13 $
+// $Date: 10/09/06 4:00p $
+//
+
+
+//---------------------------------------------------------------
+// In: pMV => Source address of MV
+// In: gMVX_FRAC<2;2,1>:w => MV fractional components
+// In: f0.1 (1) => If 1, vertical MV is integer
+// In: gpINTPY:uw => Destination address for interpolated result
+// In: Reference area staring from R43
+// If horizontal/vertical MVs are all integer, 8x8 pixels are on R43~R44 (2 GRFs)
+// If only horz MV is integer, 8x13 pixels are on R43~R46 (4 GRFs)
+// If only vert MV is integer, 13x8 pixels are on R43~R46 (4 GRFs)
+// If no MVs are integer, 13x13 pixels are on R43~R49 (7 GRFs)
+//---------------------------------------------------------------
+
+
+INTERLABEL(Interpolate_Y_8x8_Func):
+
+
+
+ // Check whether MVX is integer MV
+ and.z.f0.0 (1) null:w r[pMV,0]<0;1,0>:w 0x3:w
+ (-f0.0) jmpi (1) INTERLABEL(Interpolate_Y_8x8_Func2)
+
+ // TODO: remove this back-to-back read - huge latency..
+ mov (8) gubREF(6,2)<1> gubREF(3,0)<8;8,1>
+ mov (8) gubREF(5,18)<1> gubREF(2,24)<8;8,1> {NoDDClr}
+ mov (8) gubREF(5,2)<1> gubREF(2,16)<8;8,1> {NoDDChk}
+ mov (8) gubREF(4,18)<1> gubREF(2,8)<8;8,1> {NoDDClr}
+ mov (8) gubREF(4,2)<1> gubREF(2,0)<8;8,1> {NoDDChk}
+ mov (8) gubREF(3,18)<1> gubREF(1,24)<8;8,1> {NoDDClr}
+ mov (8) gubREF(3,2)<1> gubREF(1,16)<8;8,1> {NoDDChk}
+ mov (8) gubREF(2,18)<1> gubREF(1,8)<8;8,1> {NoDDClr}
+ mov (8) gubREF(2,2)<1> gubREF(1,0)<8;8,1> {NoDDChk}
+ mov (8) gubREF(1,18)<1> gubREF(0,24)<8;8,1> {NoDDClr}
+ mov (8) gubREF(1,2)<1> gubREF(0,16)<8;8,1> {NoDDChk}
+ mov (8) gubREF(0,18)<1> gubREF(0,8)<8;8,1>
+ mov (8) gubREF(0,2)<1> gubREF(0,0)<8;8,1>
+
+INTERLABEL(Interpolate_Y_8x8_Func2):
+
+ // Compute the GRF address of the starting position of the reference area
+ (-f0.1) mov (1) pREF:w nOFFSET_REF+2+nGRFWIB:w
+ (f0.1) mov (1) pREF:w nOFFSET_REF+2:w
+ mov (1) pRESULT:uw gpINTPY:uw
+
+ /*
+ * | |
+ * - - 0 1 2 3 + -
+ * 4 5 6 7
+ * 8 9 A B
+ * C D E F
+ * - - + - - - + -
+ * | |
+ */
+
+ // Case 0
+ or.z.f0.1 (16) null:w gMVY_FRAC<0;1,0>:w gMVX_FRAC<0;1,0>:w
+ (f0.1) mov (16) r[pRESULT]<1>:uw r[pREF]<16;8,1>:ub
+ (f0.1) mov (16) r[pRESULT,nGRFWIB]<1>:uw r[pREF,nGRFWIB]<16;8,1>:ub
+ (f0.1) mov (16) r[pRESULT,nGRFWIB*2]<1>:uw r[pREF,nGRFWIB*2]<16;8,1>:ub
+ (f0.1) mov (16) r[pRESULT,nGRFWIB*3]<1>:uw r[pREF,nGRFWIB*3]<16;8,1>:ub
+ (f0.1) jmpi INTERLABEL(Exit_Interpolate_Y_8x8)
+
+ // Store all address registers
+ mov (8) gpADDR<1>:w a0<8;8,1>:w
+
+ mul.z.f0.0 (1) gW4:w gMVY_FRAC:w gMVX_FRAC:w
+ add (1) pREF1:uw pREF0:uw nGRFWIB/2:uw
+ and.nz.f0.1 (1) null gW4:w 1:w
+ add (2) pREF2<1>:uw pREF0<2;2,1>:uw nGRFWIB:uw
+ mov (4) gW0<1>:uw pREF0<4;4,1>:uw
+
+ (f0.0) jmpi INTERLABEL(Interpolate_Y_H_8x8)
+ (f0.1) jmpi INTERLABEL(Interpolate_Y_H_8x8)
+
+ //-----------------------------------------------------------------------
+ // CASE: A69BE (H/V interpolation)
+ //-----------------------------------------------------------------------
+
+ // Compute interim horizontal intepolation of 12 lines (not 9 lines)
+// add (1) pREF0<1>:ud pREF0<0;1,0>:ud 0xffeeffde:ud // (-18<<16)|(-34)
+ add (1) pREF0<1>:uw pREF0<0;1,0>:uw -34:w
+ add (1) pREF1<1>:uw pREF1<0;1,0>:uw -18:w {NoDDClr}
+ mov (1) pRESD:ud nOFFSET_INTERIM3:ud {NoDDChk}
+
+ // Check whether this position is 'A'
+ cmp.e.f0.0 (1) null gW4:w 4:w
+
+ $for(0;<6;2) {
+ add (32) acc0<1>:w r[pREF,nGRFWIB*%1]<16;8,1>:ub r[pREF0,nGRFWIB*%1+5]<16;8,1>:ub {Compr}
+ mac (32) acc0<1>:w r[pREF,nGRFWIB*%1+1]<16;8,1>:ub -5:w {Compr}
+ mac (32) acc0<1>:w r[pREF,nGRFWIB*%1+2]<16;8,1>:ub 20:w {Compr}
+ mac (32) acc0<1>:w r[pREF,nGRFWIB*%1+3]<16;8,1>:ub 20:w {Compr}
+ mac (32) r[pRES,nGRFWIB*%1]<1>:w r[pREF,nGRFWIB*%1+4]<16;8,1>:ub -5:w {Compr}
+ }
+ // last line
+ add (8) acc0<1>:w r[pREF,nGRFWIB*6]<8;8,1>:ub r[pREF,nGRFWIB*6+5]<8;8,1>:ub
+ mac (8) acc0<1>:w r[pREF,nGRFWIB*6+1]<8;8,1>:ub -5:w
+ mac (8) acc0<1>:w r[pREF,nGRFWIB*6+2]<8;8,1>:ub 20:w
+ mac (8) acc0<1>:w r[pREF,nGRFWIB*6+3]<8;8,1>:ub 20:w
+ mac (8) r[pRES,nGRFWIB*6]<1>:w r[pREF,nGRFWIB*6+4]<8;8,1>:ub -5:w
+
+ // Compute interim/output vertical interpolation
+ mov (1) pREF0:ud nOFFSET_INTERIM2:ud {NoDDClr} // set pREF0 and pREF1 at the same time
+ mov (1) pREF2D:ud nOFFSET_INTERIM4:ud {NoDDChk,NoDDClr} // set pREF2 and pREF3 at the same time
+ (f0.0) sel (1) pRES:uw gpINTPY:uw nOFFSET_INTERIM:uw {NoDDChk} // Case A vs. 69BE
+
+ $for(0;<4;2) {
+ add (32) acc0<1>:w r[pREF0,nGRFWIB*%1]<16;16,1>:w 512:w {Compr}
+ mac (16) acc0<1>:w r[pREF2,nGRFWIB*%1]<8,1>:w -5:w
+ mac (16) acc1<1>:w r[pREF2,nGRFWIB*%1+nGRFWIB]<8,1>:w -5:w
+ mac (32) acc0<1>:w r[pREF0,nGRFWIB*%1+nGRFWIB]<16;16,1>:w 20:w {Compr}
+ mac (16) acc0<1>:w r[pREF2,nGRFWIB*%1+nGRFWIB]<8,1>:w 20:w
+ mac (16) acc1<1>:w r[pREF2,nGRFWIB*%1+nGRFWIB+nGRFWIB]<8,1>:w 20:w
+ mac (32) acc0<1>:w r[pREF0,(2+%1)*nGRFWIB]<16;16,1>:w -5:w {Compr}
+ mac (16) acc0<1>:w r[pREF2,(2+%1)*nGRFWIB]<8,1>:w 1:w
+ mac (16) acc1<1>:w r[pREF2,(2+%1)*nGRFWIB+nGRFWIB]<8,1>:w 1:w
+ asr.sat (16) r[pRES,nGRFWIB*%1]<2>:ub acc0<16;16,1>:w 10:w
+ asr.sat (16) r[pRES,nGRFWIB*%1+nGRFWIB]<2>:ub acc1<16;16,1>:w 10:w {SecHalf}
+ }
+
+ (f0.0) jmpi INTERLABEL(Return_Interpolate_Y_8x8)
+
+INTERLABEL(Interpolate_Y_H_8x8):
+
+ cmp.e.f0.0 (1) null gMVX_FRAC:w 0:w
+ cmp.e.f0.1 (1) null gMVY_FRAC:w 2:w
+ (f0.0) jmpi INTERLABEL(Interpolate_Y_V_8x8)
+ (f0.1) jmpi INTERLABEL(Interpolate_Y_V_8x8)
+
+ //-----------------------------------------------------------------------
+ // CASE: 123567DEF (H interpolation)
+ //-----------------------------------------------------------------------
+
+ add (4) pREF0<1>:uw gW0<4;4,1>:uw -2:w
+ cmp.g.f0.0 (4) null:w gMVY_FRAC<0;1,0>:w 2:w
+ cmp.e.f0.1 (1) null gMVX_FRAC:w 2:w
+ (f0.0) add (4) pREF0<1>:uw pREF0<4;4,1>:uw nGRFWIB/2:uw
+
+ cmp.e.f0.0 (1) null:w gMVY_FRAC<0;1,0>:w 0:w
+
+ (f0.1) sel (1) pRES:uw gpINTPY:uw nOFFSET_INTERIM:uw // Case 26E vs. 1357DF
+
+ // Compute interim/output horizontal interpolation
+ $for(0;<4;2) {
+ add (16) acc0<1>:w r[pREF0,nGRFWIB*%1]<8,1>:ub 16:w
+ add (16) acc1<1>:w r[pREF0,nGRFWIB*%1+nGRFWIB]<8,1>:ub 16:w
+ mac (16) acc0<1>:w r[pREF0,nGRFWIB*%1+1]<8,1>:ub -5:w
+ mac (16) acc1<1>:w r[pREF0,nGRFWIB*%1+1+nGRFWIB]<8,1>:ub -5:w
+ mac (16) acc0<1>:w r[pREF0,nGRFWIB*%1+2]<8,1>:ub 20:w
+ mac (16) acc1<1>:w r[pREF0,nGRFWIB*%1+2+nGRFWIB]<8,1>:ub 20:w
+ mac (16) acc0<1>:w r[pREF0,nGRFWIB*%1+3]<8,1>:ub 20:w
+ mac (16) acc1<1>:w r[pREF0,nGRFWIB*%1+3+nGRFWIB]<8,1>:ub 20:w
+ mac (16) acc0<1>:w r[pREF0,nGRFWIB*%1+4]<8,1>:ub -5:w
+ mac (16) acc1<1>:w r[pREF0,nGRFWIB*%1+4+nGRFWIB]<8,1>:ub -5:w
+ mac (16) acc0<1>:w r[pREF0,nGRFWIB*%1+5]<8,1>:ub 1:w
+ mac (16) acc1<1>:w r[pREF0,nGRFWIB*%1+5+nGRFWIB]<8,1>:ub 1:w
+ asr.sat (16) r[pRES,nGRFWIB*%1]<2>:ub acc0<16;16,1>:w 5:w
+ asr.sat (16) r[pRES,nGRFWIB*%1+nGRFWIB]<2>:ub acc1<16;16,1>:w 5:w {SecHalf}
+ }
+
+ (-f0.1) jmpi INTERLABEL(Interpolate_Y_V_8x8)
+ (-f0.0) jmpi INTERLABEL(Average_8x8)
+
+ jmpi INTERLABEL(Return_Interpolate_Y_8x8)
+
+INTERLABEL(Interpolate_Y_V_8x8):
+
+ cmp.e.f0.0 (1) null gMVY_FRAC:w 0:w
+ (f0.0) jmpi INTERLABEL(Interpolate_Y_I_8x8)
+
+ //-----------------------------------------------------------------------
+ // CASE: 48C59D7BF (V interpolation)
+ //-----------------------------------------------------------------------
+
+ mov (2) pREF0<1>:uw gW0<4;2,2>:uw {NoDDClr}
+ mov (2) pREF2<1>:uw gW1<2;2,1>:uw {NoDDChk,NoDDClr}
+ mov (1) pRES:uw gpINTPY:uw {NoDDChk}
+
+ cmp.g.f0.1 (4) null:w gMVX_FRAC<0;1,0>:w 2:w
+ cmp.e.f0.0 (1) null:w gMVX_FRAC<0;1,0>:w 0:w
+ (f0.1) add (4) pREF0<1>:uw pREF0<4;4,1>:uw 1:uw
+
+ cmp.e.f0.1 (1) null gMVY_FRAC:w 2:w
+ (-f0.0) jmpi INTERLABEL(VFILTER_8x8)
+ (-f0.1) mov (1) pRES:uw nOFFSET_INTERIM:uw
+
+ INTERLABEL(VFILTER_8x8):
+
+ // Compute interim/output vertical interpolation
+ $for(0;<4;2) {
+ add (32) acc0<1>:w r[pREF0,nGRFWIB*%1-nGRFWIB]<16;8,1>:ub 16:w {Compr}
+ mac (16) acc0<1>:w r[pREF2,nGRFWIB*%1-nGRFWIB]<8,1>:ub -5:w
+ mac (16) acc1<1>:w r[pREF2,nGRFWIB*%1]<8,1>:ub -5:w
+ mac (32) acc0<1>:w r[pREF0,nGRFWIB*%1]<16;8,1>:ub 20:w {Compr}
+ mac (16) acc0<1>:w r[pREF2,nGRFWIB*%1]<8,1>:ub 20:w
+ mac (16) acc1<1>:w r[pREF2,nGRFWIB*%1+nGRFWIB]<8,1>:ub 20:w
+ mac (32) acc0<1>:w r[pREF0,nGRFWIB*%1+nGRFWIB]<16;8,1>:ub -5:w {Compr}
+ mac (16) acc0<1>:w r[pREF2,nGRFWIB*%1+nGRFWIB]<8,1>:ub 1:w
+ mac (16) acc1<1>:w r[pREF2,nGRFWIB*%1+nGRFWIB+nGRFWIB]<8,1>:ub 1:w
+ asr.sat (16) r[pRES,nGRFWIB*%1]<2>:ub acc0<16;16,1>:w 5:w
+ asr.sat (16) r[pRES,nGRFWIB*%1+nGRFWIB]<2>:ub acc1<16;16,1>:w 5:w {SecHalf}
+ }
+
+ (-f0.0) jmpi INTERLABEL(Average_8x8)
+ (f0.1) jmpi INTERLABEL(Return_Interpolate_Y_8x8)
+
+INTERLABEL(Interpolate_Y_I_8x8):
+
+ //-----------------------------------------------------------------------
+ // CASE: 134C (Integer position)
+ //-----------------------------------------------------------------------
+
+ mov (2) pREF0<1>:uw gW0<2;2,1>:uw {NoDDClr}
+
+ mov (1) pRES:uw gpINTPY:uw {NoDDChk}
+
+ cmp.e.f0.0 (2) null:w gMVX_FRAC<0;1,0>:w 3:w
+ cmp.e.f0.1 (2) null:w gMVY_FRAC<0;1,0>:w 3:w
+ (f0.0) add (2) pREF0<1>:uw pREF0<2;2,1>:uw 1:uw
+ (f0.1) add (2) pREF0<1>:uw pREF0<2;2,1>:uw nGRFWIB/2:uw
+
+ mov (16) r[pRES]<1>:uw r[pREF0]<8,1>:ub
+ mov (16) r[pRES,nGRFWIB]<1>:uw r[pREF0,nGRFWIB]<8,1>:ub
+ mov (16) r[pRES,nGRFWIB*2]<1>:uw r[pREF0,nGRFWIB*2]<8,1>:ub
+ mov (16) r[pRES,nGRFWIB*3]<1>:uw r[pREF0,nGRFWIB*3]<8,1>:ub
+
+INTERLABEL(Average_8x8):
+
+ //-----------------------------------------------------------------------
+ // CASE: 13456789BCDEF (Average)
+ //-----------------------------------------------------------------------
+
+ // Average two interim results
+ avg.sat (16) r[pRES,0]<2>:ub r[pRES,0]<32;16,2>:ub gubINTERIM_BUF(0)
+ avg.sat (16) r[pRES,nGRFWIB]<2>:ub r[pRES,nGRFWIB]<32;16,2>:ub gubINTERIM_BUF(1)
+ avg.sat (16) r[pRES,nGRFWIB*2]<2>:ub r[pRES,nGRFWIB*2]<32;16,2>:ub gubINTERIM_BUF(2)
+ avg.sat (16) r[pRES,nGRFWIB*3]<2>:ub r[pRES,nGRFWIB*3]<32;16,2>:ub gubINTERIM_BUF(3)
+
+INTERLABEL(Return_Interpolate_Y_8x8):
+ // Restore all address registers
+ mov (8) a0<1>:w gpADDR<8;8,1>:w
+
+INTERLABEL(Exit_Interpolate_Y_8x8):
+
+// end of file
diff --git a/src/shaders/h264/mc/intra_Header.inc b/src/shaders/h264/mc/intra_Header.inc new file mode 100644 index 00000000..501c7a88 --- /dev/null +++ b/src/shaders/h264/mc/intra_Header.inc @@ -0,0 +1,276 @@ +/*
+ * Header file for all AVC intra prediction kernels
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+#if !defined(__INTRA_HEADER__) // Make sure this file is only included once
+#define __INTRA_HEADER__
+
+// Module name: intra_header.inc
+//
+// Header file for all AVC intra prediction kernels
+//
+// This header file defines everything that's specific to intra macroblock kernels
+
+
+// ----------- Various data buffers and pointers ------------
+//
+// I_PCM data buffer
+//
+#define I_PCM_BUF_Y 4
+#define I_PCM_BUF_UV 12
+
+#define REG_I_PCM_BUF_Y r4
+#define REG_I_PCM_BUF_UV r12
+
+.declare I_PCM_Y Base=REG_I_PCM_BUF_Y ElementSize=1 SrcRegion=REGION(16,1) Type=ub // 8-bit I_PCM Y data
+.declare I_PCM_UV Base=REG_I_PCM_BUF_UV ElementSize=1 SrcRegion=REGION(16,1) Type=ub // 8-bit I_PCM U/V data
+
+// Intra macroblock error data blocks
+//
+#define ERRBUF 4 // Starting GRF index for error data
+#define REG_ERRBUF r4
+.declare MBBLOCKW Base=REG_ERRBUF ElementSize=2 SrcRegion=REGION(16,1) Type=w // For 16-bit inter MB
+.declare MBBLOCKD Base=REG_ERRBUF ElementSize=2 SrcRegion=REGION(16,1) Type=uw // For use in "send" command
+
+#define PERROR a0.2 // Pointer to macroblock error data
+#define PERROR1 a0.3 // Pointer to macroblock error data used by instruction compression
+#define PERROR_UD a0.1 // Pointer to macroblock error data in DWORD unit
+
+// Intra macroblock reference data
+//
+#define REG_INTRA_REF_TOP r49 // Must be an odd numbered GRF register
+.declare INTRA_REF_TOP0 Base=REG_INTRA_REF_TOP ElementSize=1 SrcRegion=REGION(16,1) Type=ub
+.declare INTRA_REF_TOP Base=REG_INTRA_REF_TOP.4 ElementSize=1 SrcRegion=REGION(16,1) Type=ub
+ // Actual top row reference data start at offset 4 in BYTE
+.declare INTRA_REF_TOP_W Base=REG_INTRA_REF_TOP.2 ElementSize=2 SrcRegion=REGION(16,1) Type=uw
+ // Actual top row reference data start at offset 2 in WORD
+.declare INTRA_REF_TOP_D Base=REG_INTRA_REF_TOP ElementSize=4 DstRegion=<1> Type=ud // Only used in "send" instruction
+
+#define INTRA_REF_LEFT_ID 50
+#define REG_INTRA_REF_LEFT r50
+.declare INTRA_REF_LEFT0 Base=REG_INTRA_REF_LEFT ElementSize=1 SrcRegion=REGION(8,4) Type=ub
+.declare INTRA_REF_LEFT Base=REG_INTRA_REF_LEFT.3 ElementSize=1 SrcRegion=REGION(8,4) Type=ub
+ // Actual left column reference data are located at offset 3 in BYTE
+.declare INTRA_REF_LEFT_UV Base=REG_INTRA_REF_LEFT.2 ElementSize=1 SrcRegion=REGION(8,4) Type=ub
+ // Actual left column U/V reference data are located at offset 2 in BYTE
+.declare INTRA_REF_LEFT_W Base=REG_INTRA_REF_LEFT.1 ElementSize=2 SrcRegion=REGION(8,2) Type=uw
+ // Actual left column reference data are located at offset 1 in WORD
+.declare INTRA_REF_LEFT_D Base=REG_INTRA_REF_LEFT ElementSize=4 DstRegion=<1> Type=ud // Only used in "send" instruction
+
+#define PREF_LEFT a0.4 // Pointer to left reference data
+#define PREF_LEFT_UD a0.2 // Pointer in DWORD to left reference data
+
+#define INTRA_TEMP_0 52
+#define INTRA_TEMP_1 53
+#define INTRA_TEMP_2 54
+#define INTRA_TEMP_3 55
+#define INTRA_TEMP_4 56
+#define INTRA_TEMP_5 57
+#define INTRA_TEMP_6 58
+
+#define REG_INTRA_TEMP_0 r52
+#define REG_INTRA_TEMP_1 r53
+#define REG_INTRA_TEMP_2 r54
+#define REG_INTRA_TEMP_3 r55
+#define REG_INTRA_TEMP_4 r56
+#define REG_INTRA_TEMP_5 r57
+#define REG_INTRA_TEMP_6 r58
+#define REG_INTRA_TEMP_7 r59
+#define REG_INTRA_TEMP_8 r60
+
+// Destination registers for write commit
+#define REG_WRITE_COMMIT_Y r60.0
+#define REG_WRITE_COMMIT_UV r61.0
+
+// ----------- Various data buffers and pointers ------------
+// R32 - R47 for predicted picture buffer (for both Y and U/V blocks)
+//
+#define PREDBUF 32 // Starting GRF index for predicted buffer
+#define REG_PREDBUF r32
+
+.declare PRED_Y Base=REG_PREDBUF ElementSize=1 SrcRegion=REGION(16,1) Type=ub // Predicted Y picture
+.declare PRED_YW Base=REG_PREDBUF ElementSize=2 SrcRegion=REGION(16,1) Type=uw // Predicted Y picture stored in WORD
+.declare PRED_Y_FM Base=REG_PREDBUF ElementSize=1 SrcRegion=REGION(16,1) Type=ub // Predicted Y picture frame
+.declare PRED_Y_TF Base=REG_PREDBUF ElementSize=1 SrcRegion=REGION(16,1) Type=ub // Predicted Y picture Top field
+
+.declare PRED_UV Base=REG_PREDBUF ElementSize=1 SrcRegion=REGION(16,1) Type=ub // Predicted U/V picture
+.declare PRED_UVW Base=REG_PREDBUF ElementSize=2 SrcRegion=REGION(16,1) Type=uw // Predicted U/V picture stored in WORD
+.declare PRED_UV_FM Base=REG_PREDBUF ElementSize=1 SrcRegion=REGION(16,1) Type=ub // Predicted U/V picture frame
+.declare PRED_UV_TF Base=REG_PREDBUF ElementSize=1 SrcRegion=REGION(16,1) Type=ub // Predicted U/V picture top field
+.declare PRED_UV_BF Base=REG_PREDBUF.16 ElementSize=1 SrcRegion=REGION(16,1) Type=ub // Predicted U/V picture bottom field
+
+// The same region will also be used as finally decoded Y blocks shared with U/V blocks
+//
+#define DECBUF 32
+#define REG_DECBUF r32
+.declare DEC_Y Base=REG_DECBUF ElementSize=1 SrcRegion=REGION(16,1) Type=ub // Decoded Y picture
+.declare DEC_UV Base=REG_DECBUF ElementSize=1 SrcRegion=REGION(16,1) Type=ub // Decoded U/V P-/B-picture
+.declare DEC_UD Base=REG_DECBUF ElementSize=4 SrcRegion=REGION(8,1) Type=ud // Decoded buffer in UD type
+
+// Reference buffer for intra_NxN prediction
+//
+#define PRED_MODE REG_INTRA_TEMP_0
+.declare REF_TOP0 Base=REG_INTRA_TEMP_5 ElementSize=1 SrcRegion=REGION(16,1) Type=ub
+.declare REF_TOP Base=REG_INTRA_TEMP_5.4 ElementSize=1 SrcRegion=REGION(16,1) Type=ub
+ // Actual top reference data start from offset 3,i.e. p[-1,-1]
+.declare REF_TOP_W Base=REG_INTRA_TEMP_5 ElementSize=2 SrcRegion=REGION(16,1) Type=uw
+.declare REF_TOP_D Base=REG_INTRA_TEMP_5 ElementSize=4 SrcRegion=REGION(8,1) Type=ud
+.declare REF_LEFT Base=REG_INTRA_TEMP_6 ElementSize=1 SrcRegion=REGION(16,1) Type=ub
+.declare REF_LEFT_D Base=REG_INTRA_TEMP_6 ElementSize=4 SrcRegion=REGION(8,1) Type=ud
+
+// For intra prediction plane mode
+//
+.declare H1 Base=REG_INTRA_TEMP_0 ElementSize=2 SrcRegion=REGION(8,1) Type=w // Make sure it's an even GRF
+.declare H2 Base=REG_INTRA_TEMP_0.8 ElementSize=2 SrcRegion=REGION(8,1) Type=w
+.declare V1 Base=REG_INTRA_TEMP_1 ElementSize=2 SrcRegion=REGION(8,1) Type=w // Make sure it's the following odd GRF
+.declare V2 Base=REG_INTRA_TEMP_1.8 ElementSize=2 SrcRegion=REGION(8,1) Type=w
+
+.declare CP Base=REG_INTRA_TEMP_2 ElementSize=2 SrcRegion=REGION(16,1) Type=w
+
+#define PINTRAPRED_Y a0.7 // Used as luma intra prediction mode pointer
+#define PINTRAPRED_UV a0.7 // Used as chroma intra prediction mode pointer
+#define PINTRA4X4_Y a0.4 // Used as luma intra_4x4 prediction mode pointer
+
+#define PBWDCOPY_4 a0.4 // a0.4 - a0.7 used in intra_4x4 prediction for moving data backward
+#define PBWDCOPY_8 a0.6 // a0.6 - a0.7 used in intra_8x8 prediction for moving data backward
+
+// For Intra_4x4 prediction mode
+//
+.declare INTRA_4X4_MODE Base=REG_INTRA_TEMP_1 ElementSize=4 SrcRegion=REGION(1,0) DstRegion=<1> Type=d // Actually only need 1 DWORD
+
+// ----------- Intra CURBE constants ------------
+//
+#define REG_CURBE1 r1
+#define REG_CURBE2 r2
+#define INTRA_4X4_OFFSET 1*GRFWIB // 9 Bytes
+#define INTRA_8X8_OFFSET 1*GRFWIB+12 // 9 Bytes starting sub-register r1.3:ud
+#define INTRA_16X16_OFFSET 1*GRFWIB+24 // 4 Bytes starting sub-register r1.6:ud
+#define INTRA_CHROMA_OFFSET 1*GRFWIB+28 // 4 Bytes starting sub-register r1.7:ud
+
+#define TOP_REF_OFFSET REG_CURBE1.10 // r1.5:w
+
+// Constants used in plane intra prediction mode
+#define XY_3 REG_CURBE2.4 // Stored BYTE constants x-3 for x=0...7, i.e. -3,-2,...3,4 for U/V, need duplicate to every other byte
+#define XY_3_1 REG_CURBE2.5 // Stored BYTE constants x-3 for x=0...7, i.e. -3,-2,...3,4 for 2nd instruction in {Comp}
+#define XY_7 REG_CURBE2.0 // Stored BYTE constants x-7 for x=0...15, i.e. -7,-6,...7,8 for Y
+#define XY_7_1 REG_CURBE2.1 // Stored BYTE constants x-7 for x=0...15, i.e. -7,-6,...7,8 for 2nd instruction in {Comp}
+
+#define INV_SHIFT REG_CURBE2.16
+
+#define INV_TRANS4 REG_CURBE2.20 // For reverse data transfer for intra_4x4 (0x00020406)
+#define INV_TRANS48 REG_CURBE2.22 // For reverse data transfer for intra_4x4 (0x0002)
+#define INV_TRANS8 REG_CURBE1.22 // For reverse data transfer for intra_8x8 (0x0001)
+
+#define INTRA_MODE REG_CURBE2.24 // Offset to intra_Pred_4x4_Y from each sub-block
+
+// ----------- In-line parameters ------------
+//
+#define REG_INLINE r3
+
+#define INLINE_DW0 REG_INLINE.0<0;1,0>:ud
+#define INLINE_DW1 REG_INLINE.1<0;1,0>:ud
+#define INLINE_DW2 REG_INLINE.2<0;1,0>:ud
+#define INLINE_DW3 REG_INLINE.3<0;1,0>:ud
+#define INLINE_DW4 REG_INLINE.4<0;1,0>:ud
+#define INLINE_DW5 REG_INLINE.5<0;1,0>:ud
+#define INLINE_DW6 REG_INLINE.6<0;1,0>:ud
+#define INLINE_DW7 REG_INLINE.7<0;1,0>:ud
+
+// Intra macroblock in-line data
+//
+// In-line DWORD 0
+#define REG_MBAFF_FIELD REG_INLINE.1 // :uw, can be added directly to lower-word of MSGDSC
+#define MBAFF_FIELD BIT26+BIT25 // Bits 26:25 - MBAFF field macroblock flag
+ // 00 = Current macroblock is not an MBAFF field macroblock
+ // 11 = Current macroblock is an MBAFF field macroblock
+
+#define REG_FIELD_PARITY INLINE_DW0
+#define FIELD_PARITY BIT24 // Bit 24 - Macroblock field parity flag
+ // 0 = Current field is a top field
+ // 1 = Current field is a bottom field
+
+#define REG_FIELD_MACROBLOCK_FLAG INLINE_DW0
+#define FIELD_MACROBLOCK_FLAG BIT14 // Bit 14 - Field macroblock flag
+ // 0 = Current macroblock is not a field macroblock
+ // 1 = Current macroblock is a field macroblock
+#define REG_MACROBLOCK_TYPE INLINE_DW0
+#define MACROBLOCK_TYPE BIT12+BIT11+BIT10+BIT9+BIT8 // Bit 12:8 - Intra macroblock flag
+
+#define REG_CHROMA_FORMAT_IDC INLINE_DW0
+#define CHROMA_FORMAT_IDC BIT3+BIT2 // Bit 3:2 - Chroma format
+ // 00 = Luma only (Monochrome)
+ // 01 = YUV420
+ // 10 = YUV422
+ // 11 = YUV444
+#define REG_MBAFF_PIC INLINE_DW0
+#define MBAFF_PIC BIT1 // Bit 1 - MBAFF Frame picture
+ // 0 = Not an MBAFF frame picture
+ // 1 = An MBAFF frame picture
+#define REG_INTRA_PRED_8X8_BLK2_AVAIL_FLAG INLINE_DW0
+#define INTRA_PRED_8X8_BLK2_AVAIL_FLAG BIT4 // Bit 4: Pixel available for block 2 in an intra_8x8 MB.
+
+// In-line DWORD 1
+#define ORIX REG_INLINE.4 // :ub, H. origin of the macroblock in macroblock unit
+#define ORIY REG_INLINE.5 // :ub, V. origin of the macroblock in macroblock unit
+
+// In-line DWORD 2
+#define REG_CBPCYB REG_INLINE.9 // :ub, Coded block pattern
+#define REG_CBPCY INLINE_DW2 // Bits 13:8 - Coded block pattern
+ // reflect Y0, Y1, Y2, Y3, Cb4, Cr5
+ // Bit 13 - Y0
+ // Bit 12 - Y1
+ // Bit 11 - Y2
+ // Bit 10 - Y3
+ // Bit 9 - U4
+ // Bit 8 - V5
+#define CBP_MASK 0x3F00:ud // Bit mask for all CBP bits
+#define CBP_Y_MASK 0x3C00:ud // Bit mask for CBP Y bits
+#define CBP_UV_MASK 0x0300:ud // Bit mask for CBP U/V bits
+
+#define CBP_Y0_MASK BIT13:ud // Bit mask for CBP Y0 bit
+#define CBP_Y1_MASK BIT12:ud // Bit mask for CBP Y1 bit
+#define CBP_Y2_MASK BIT11:ud // Bit mask for CBP Y2 bit
+#define CBP_Y3_MASK BIT10:ud // Bit mask for CBP Y3 bit
+#define CBP_U_MASK BIT9:ud // Bit mask for CBP U bit
+#define CBP_V_MASK BIT8:ud // Bit mask for CBP V bit
+
+// In-line DWORD 3
+#define REG_INTRA_CHROMA_PRED_MODE REG_INLINE.12 // :ub - Intra chroma prediction mode
+#define INTRA_CHROMA_PRED_MODE BIT7+BIT6 // Bit 7:6 - Intra chroma prediction mode
+ // 00 = Intra DC prediction
+ // 01 = Intra horizontal prediction
+ // 10 = Intra vertical prediction
+ // 11 = Intra plane prediction
+#define INTRA_CHROMA_PRED_MODE_SHIFT 6 // Intra chroma prediction mode shift
+
+#define REG_INTRA_PRED_AVAIL_FLAG INLINE_DW3
+#define INTRA_PRED_AVAIL_FLAG BIT4+BIT3+BIT2+BIT1+BIT0 // Bits 4:0 - Intra prediction available flag
+ // Bit 0: Macroblock A (the left neighbor) entire or top half
+ // Bit 1: Macroblock B (the upper neighbor)
+ // Bit 2: Macroblock C (the above-right neighbor)
+ // Bit 3: Macroblock D (the above-left neighbor)
+ // Bit 4: Macroblock A (the left neighbor) bottom half
+ // Each bit is defined below
+ // 0 = The macroblock is not available for intra prediction
+ // 1 = The macroblock is available for intra prediction
+#define INTRA_PRED_LEFT_TH_AVAIL_FLAG BIT0 // Bit 0: Macroblock A (the left neighbor) entire or top half
+#define INTRA_PRED_UP_AVAIL_FLAG BIT1 // Bit 1: Macroblock B (the upper neighbor)
+#define INTRA_PRED_UP_RIGHT_AVAIL_FLAG BIT2 // Bit 2: Macroblock C (the above-right neighbor)
+#define INTRA_PRED_UP_LEFT_AVAIL_FLAG BIT3 // Bit 3: Macroblock D (the above-left neighbor)
+#define INTRA_PRED_LEFT_BH_AVAIL_FLAG BIT4 // Bit 4: Macroblock A (the left neighbor) bottom half
+//#define INTRA_PRED_8X8_BLK2_AVAIL_FLAG BIT5 // Bit 5: Pixel available for block 2 in an intra_8x8 MB.
+#define REG_INTRA_PRED_AVAIL_FLAG_BYTE REG_INLINE.12 // Byte location of Intra_Pred_Avail_Flag
+#define REG_INTRA_PRED_AVAIL_FLAG_WORD REG_INLINE.6 // Word location of Intra_Pred_Avail_Flag
+
+
+.declare INTRA_PRED_MODE Base=REG_INLINE.16 ElementSize=1 SrcRegion=REGION(16,1) Type=ub // Intra prediction mode
+
+// End of intra_header.inc
+
+#endif // !defined(__INTRA_HEADER__)
+
diff --git a/src/shaders/h264/mc/intra_Pred_4x4_Y_4.asm b/src/shaders/h264/mc/intra_Pred_4x4_Y_4.asm new file mode 100644 index 00000000..584d0125 --- /dev/null +++ b/src/shaders/h264/mc/intra_Pred_4x4_Y_4.asm @@ -0,0 +1,240 @@ +/*
+ * Intra predict 4 Intra_4x4 luma blocks
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+#if !defined(__INTRA_PRED_4X4_Y_4__) // Make sure this is only included once
+#define __INTRA_PRED_4X4_Y_4__
+
+// Module name: intra_Pred_4x4_Y_4.asm
+//
+// Intra predict 4 Intra_4x4 luma blocks
+//
+//--------------------------------------------------------------------------
+// Input data:
+//
+// REF_TOP: Top reference data stored in BYTE with p[-1,-1] at REF_TOP(0,-1)
+// REF_LEFT: Left reference data stored in BYTE with p[-1,0] at REF_LEFT(0,0)
+// PRED_MODE: Intra prediction mode stored in 4 words (4 LSB)
+// REG_INTRA_PRED_AVAIL: Top/Left available flag, (Bit0: Left, Bit1: Top)
+//
+//--------------------------------------------------------------------------
+
+#undef INTRA_PRED_AVAIL
+#undef INTRA_REF
+#undef REF_LEFT_BACK
+#undef REF_TMP
+#undef REF_TMP1
+
+#define INTRA_PRED_AVAIL REG_INTRA_TEMP_2.8
+#define INTRA_REF REG_INTRA_TEMP_2
+#define REF_LEFT_BACK REG_INTRA_TEMP_8
+#define REF_TMP REG_INTRA_TEMP_3
+#define REF_TMP1 REG_INTRA_TEMP_4
+
+intra_Pred_4x4_Y_4:
+
+ mov (8) REF_LEFT_BACK<1>:ub REF_LEFT(0)REGION(8,1) // Store left referece data
+// Set up pointers to each intra_4x4 prediction mode
+//
+ and (4) PINTRA4X4_Y<1>:w PRED_MODE<4;4,1>:w 0x0F:w
+ add (4) INTRA_4X4_MODE(0) r[PINTRA4X4_Y, INTRA_4X4_OFFSET]<1,0>:ub INTRA_MODE<4;4,1>:ub
+
+// Sub-block 0 *****************
+ mov (1) INTRA_PRED_AVAIL<1>:w REG_INTRA_PRED_AVAIL<0;1,0>:w // Top/Left neighbor available flags
+ CALL_1(INTRA_4X4_MODE(0),1)
+
+// Add error data to predicted intra data
+ADD_ERROR_SB0:
+ add.sat (8) r[PPREDBUF_Y,PREDSUBBLK0]<2>:ub r[PERROR,ERRBLK0]<8;4,1>:w REG_INTRA_4X4_PRED<8;8,1>:w // Too bad indexed src can't
+ add.sat (8) r[PPREDBUF_Y,PREDSUBBLK0+16]<2>:ub r[PERROR,ERRBLK0+32]<8;4,1>:w REG_INTRA_4X4_PRED.8<8;8,1>:w // cross 2 GRFs
+
+// Sub-block 1 *****************
+ mov (16) REF_TOP0(0)<1> REF_TOP0(0,4)REGION(8,1) // Top reference data
+ mov (4) REF_LEFT(0)<1> r[PPREDBUF_Y,PREDSUBBLK0+6]<8;1,0>:ub // New left referece data from sub-block 0
+ or (1) INTRA_PRED_AVAIL<1>:w REG_INTRA_PRED_AVAIL<0;1,0>:w 1:w // Left neighbor is available
+ CALL_1(INTRA_4X4_MODE(0,1),1)
+
+// Add error data to predicted intra data
+ADD_ERROR_SB1:
+ add.sat (8) r[PPREDBUF_Y,PREDSUBBLK1]<2>:ub r[PERROR,ERRBLK1]<8;4,1>:w REG_INTRA_4X4_PRED<8;8,1>:w // Too bad indexed src can't
+ add.sat (8) r[PPREDBUF_Y,PREDSUBBLK1+16]<2>:ub r[PERROR,ERRBLK1+32]<8;4,1>:w REG_INTRA_4X4_PRED.8<8;8,1>:w // cross 2 GRFs
+
+// Sub-block 2 *****************
+ mov (1) REF_TOP0(0,3)<1> REF_LEFT_BACK.3<0;1,0>:ub // Top-left reference data from stored left referece data
+ mov (4) REF_TOP0(0,4)<1> r[PPREDBUF_Y,PREDSUBBLK0+24]REGION(4,2):ub // Top reference data
+ mov (4) REF_TOP0(0,8)<1> r[PPREDBUF_Y,PREDSUBBLK0+24+32]REGION(4,2):ub // Too bad indexed src can't cross 2 GRFs
+ mov (4) REF_TOP0(0,12)<1> r[PPREDBUF_Y,PREDSUBBLK0+30+32]REGION(1,0):ub // Extended top-right reference data
+ mov (4) REF_LEFT(0)<1> REF_LEFT_BACK.4<4;4,1>:ub // From stored left referece data
+ or (1) INTRA_PRED_AVAIL<1>:w REG_INTRA_PRED_AVAIL<0;1,0>:w 2:w // Top neighbor is available
+ CALL_1(INTRA_4X4_MODE(0,2),1)
+
+// Add error data to predicted intra data
+ADD_ERROR_SB2:
+ add.sat (8) r[PPREDBUF_Y,PREDSUBBLK2]<2>:ub r[PERROR,ERRBLK2]<8;4,1>:w REG_INTRA_4X4_PRED<8;8,1>:w // Too bad indexed src can't
+ add.sat (8) r[PPREDBUF_Y,PREDSUBBLK2+16]<2>:ub r[PERROR,ERRBLK2+32]<8;4,1>:w REG_INTRA_4X4_PRED.8<8;8,1>:w // cross 2 GRFs
+
+// Sub-block 3 *****************
+ mov (16) REF_TOP0(0)<1> REF_TOP0(0,4)REGION(8,1) // Top reference data
+ mov (8) REF_TOP0(0,8)<1> REF_TOP0(0,7)<0;1,0> // Extended top-right reference data
+ mov (4) REF_LEFT(0)<1> r[PPREDBUF_Y,PREDSUBBLK2+6]<8;1,0>:ub // Left referece data from sub-block 0
+ or (1) INTRA_PRED_AVAIL<1>:w REG_INTRA_PRED_AVAIL<0;1,0>:w 3:w // Top/Left neighbor are available
+ CALL_1(INTRA_4X4_MODE(0,3),1)
+
+// Add error data to predicted intra data
+ADD_ERROR_SB3:
+ add.sat (8) r[PPREDBUF_Y,PREDSUBBLK3]<2>:ub r[PERROR,ERRBLK3]<8;4,1>:w REG_INTRA_4X4_PRED<8;8,1>:w // Too bad indexed src can't
+ add.sat (8) r[PPREDBUF_Y,PREDSUBBLK3+16]<2>:ub r[PERROR,ERRBLK3+32]<8;4,1>:w REG_INTRA_4X4_PRED.8<8;8,1>:w // cross 2 GRFs
+
+ RETURN
+
+//--------------------------------------------------------------------------
+// Actual module that performs Intra_4x4 prediction and construction
+//
+// REF_TOP: Top reference data stored in BYTE with p[-1,-1] at REF_TOP(0,-1)
+// REF_LEFT: Left reference data stored in BYTE with p[-1,0] at REF_LEFT(0,0)
+// PINTRA4X4_Y: Intra prediction mode
+// INTRA_PRED_AVAIL: Top/Left available flag, (Bit0: Left, Bit1: Top)
+//
+// Output data:
+//
+// REG_INTRA_4X4_PRED: Predicted 4x4 block data stored in 1 GRF register
+//--------------------------------------------------------------------------
+intra_Pred_4x4_Y:
+// Mode 0
+INTRA_4X4_VERTICAL:
+ mov (16) REG_INTRA_4X4_PRED<1>:w REF_TOP(0)<0;4,1>
+ RETURN_1
+
+// Mode 1
+INTRA_4X4_HORIZONTAL:
+ mov (16) REG_INTRA_4X4_PRED<1>:w REF_LEFT(0)<1;4,0>
+ RETURN_1
+
+// Mode 2
+INTRA_4X4_DC:
+// Rearrange reference samples for unified DC prediction code
+//
+ and.nz.f0.0 (16) NULLREG INTRA_PRED_AVAIL<0;1,0>:w 2:w {Compr}
+ and.nz.f0.1 (16) NULLREG INTRA_PRED_AVAIL<0;1,0>:w 1:w {Compr}
+ (-f0.0.any16h) mov (16) REF_TOP_W(0)<1> 0x8080:uw // Top macroblock not available for intra prediction
+ (-f0.1.any8h) mov (8) REF_LEFT(0)<1> REF_TOP(0)REGION(8,1) // Left macroblock not available for intra prediction
+ (-f0.0.any8h) mov (8) REF_TOP(0)<1> REF_LEFT(0)REGION(8,1) // Top macroblock not available for intra prediction
+// Perform DC prediction
+//
+ add (4) PRED_YW(15)<1> REF_TOP(0)REGION(4,1) REF_LEFT(0)REGION(4,1)
+ add (2) PRED_YW(15)<1> PRED_YW(15)REGION(2,1) PRED_YW(15,2)REGION(2,1)
+ add (16) acc0<1>:w PRED_YW(15)REGION(1,0) PRED_YW(15,1)REGION(1,0)
+ add (16) acc0<1>:w acc0:w 4:w
+ shr (16) REG_INTRA_4X4_PRED<1>:w acc0:w 3:w
+ RETURN_1
+
+// Mode 3
+INTRA_4X4_DIAG_DOWN_LEFT:
+ mov (8) INTRA_REF<1>:ub REF_TOP(0)REGION(8,1) // Keep REF_TOP untouched for future use
+ mov (4) INTRA_REF.8<1>:ub REF_TOP(0,7)REGION(4,1) // p[8,-1] = p[7,-1]
+ add (8) acc0<1>:w INTRA_REF.2<8;8,1> 2:w // p[x+2]+2
+ mac (8) acc0<1>:w INTRA_REF.1<8;8,1> 2:w // 2*p[x+1]+p[x+2]+2
+ mac (8) PRED_YW(15)<1> INTRA_REF.0<8;8,1> 1:w // p[x]+2*p[x+1]+p[x+2]+2
+
+ shr (16) REG_INTRA_4X4_PRED<1>:w PRED_YW(15)<1;4,1> 2:w // (p[x]+2*p[x+1]+p[x+2]+2)>>2
+ RETURN_1
+
+// Mode 4
+INTRA_4X4_DIAG_DOWN_RIGHT:
+
+// Set inverse shift count
+ shl (4) REF_TMP<1>:ud REF_LEFT_D(0)REGION(1,0) INV_SHIFT<4;4,1>:b
+ mov (8) INTRA_REF.4<1>:ub REF_TOP(0,-1)REGION(8,1) // INTRA_REF holds all reference data
+ mov (4) INTRA_REF<1>:ub REF_TMP.3<16;4,4>:ub
+
+ add (8) acc0<1>:w INTRA_REF.2<8;8,1>:ub 2:w // p[x+2]+2
+ mac (8) acc0<1>:w INTRA_REF.1<8;8,1>:ub 2:w // 2*p[x+1]+p[x+2]+2
+ mac (8) INTRA_REF<1>:w INTRA_REF<8;8,1>:ub 1:w // p[x]+2*p[x+1]+p[x+2]+2
+
+// Store data in reversed order
+ add (4) PBWDCOPY_4<1>:w INV_TRANS4<4;4,1>:b INTRA_TEMP_2*GRFWIB:w // Must match with INTRA_REF
+ shr (16) REG_INTRA_4X4_PRED<1>:w r[PBWDCOPY_4]<4,1>:w 2:w
+ RETURN_1
+
+// Mode 5
+INTRA_4X4_VERT_RIGHT:
+
+// Set inverse shift count
+ shl (4) REF_TMP<1>:ud REF_LEFT_D(0)REGION(1,0) INV_SHIFT<4;4,1>:b
+ mov (8) INTRA_REF.4<1>:ub REF_TOP(0,-1)REGION(8,1) // INTRA_REF holds all reference data
+ mov (4) INTRA_REF<1>:ub REF_TMP.3<16;4,4>:ub
+
+ // Even rows
+ avg (8) PRED_YW(14)<1> INTRA_REF.4<8;8,1> INTRA_REF.5<8;8,1> // avg(p[x-1],p[x])
+ // Odd rows
+ add (8) acc0<1>:w INTRA_REF.3<8;8,1>:ub 2:w // p[x]+2
+ mac (8) acc0<1>:w INTRA_REF.2<8;8,1>:ub 2:w // 2*p[x-1]+p[x]+2
+ mac (8) acc0<1>:w INTRA_REF.1<8;8,1>:ub 1:w // p[x-2]+2*p[x-1]+p[x]+2
+ shr (8) INTRA_REF<1>:w acc0:w 2:w // (p[x-2]+2*p[x-1]+p[x]+2)>>2
+
+ mov (4) INTRA_REF.2<2>:w INTRA_REF.2<4;4,1>:w // Keep zVR = -2,-3 unchanged
+ mov (4) INTRA_REF.3<2>:w PRED_YW(14)REGION(4,1) // Combining even rows
+
+ add (4) PBWDCOPY_4<1>:w INV_TRANS4<4;4,1>:b INTRA_TEMP_2*GRFWIB:w // Must match with INTRA_REF
+ mov (16) REG_INTRA_4X4_PRED<1>:w r[PBWDCOPY_4]<4,2>:w
+ RETURN_1
+
+// Mode 6
+INTRA_4X4_HOR_DOWN:
+// Set inverse shift count
+ shl (4) REF_TMP<1>:ud REF_LEFT_D(0)REGION(1,0) INV_SHIFT<4;4,1>:b
+ mov (8) INTRA_REF.4<1>:ub REF_TOP(0,-1)REGION(8,1) // INTRA_REF holds all reference data
+ mov (4) INTRA_REF<1>:ub REF_TMP.3<16;4,4>:ub
+
+ // Even pixels
+ avg (8) PRED_YW(14)<1> INTRA_REF<8;8,1> INTRA_REF.1<8;8,1> // avg(p[y-1],p[y])
+ // Odd pixels
+ add (8) acc0<1>:w INTRA_REF.2<8;8,1>:ub 2:w // p[y]+2
+ mac (8) acc0<1>:w INTRA_REF.1<8;8,1>:ub 2:w // 2*p[y-1]+p[y]+2
+ mac (8) REF_TMP<1>:w INTRA_REF.0<8;8,1>:ub 1:w // p[y-2]+2*p[y-1]+p[y]+2
+ shr (4) INTRA_REF.1<2>:w REF_TMP<4;4,1>:w 2:w // (p[y-2]+2*p[y-1]+p[y]+2)>>2
+
+ shr (2) INTRA_REF.8<1>:w REF_TMP.4<2;2,1>:w 2:w // Keep zVR = -2,-3 unchanged
+ mov (4) INTRA_REF.0<2>:w PRED_YW(14)REGION(4,1) // Combining even pixels
+
+ shl (4) PBWDCOPY_4<1>:w INV_TRANS4<4;4,1>:b 1:w // Convert to WORD offset
+ add (4) PBWDCOPY_4<1>:w PBWDCOPY_4<4;4,1>:w INTRA_TEMP_2*GRFWIB:w // Must match with INTRA_REF
+ mov (16) REG_INTRA_4X4_PRED<1>:w r[PBWDCOPY_4]<4,1>:w
+ RETURN_1
+
+// Mode 7
+INTRA_4X4_VERT_LEFT:
+ // Even rows
+ avg (8) PRED_YW(14)<2> REF_TOP(0)REGION(8,1) REF_TOP(0,1)REGION(8,1) // avg(p[x],p[x+1])
+ // Odd rows
+ add (8) acc0<1>:w REF_TOP(0,2)REGION(8,1) 2:w // p[x+2]+2
+ mac (8) acc0<1>:w REF_TOP(0,1)REGION(8,1) 2:w // 2*p[x+1]+p[x+2]+2
+ mac (8) PRED_YW(15)<1> REF_TOP(0)REGION(8,1) 1:w // p[x]+2*p[x+1]+p[x+2]+2
+ shr (8) PRED_YW(14,1)<2> PRED_YW(15)REGION(8,1) 2:w
+
+ mov (16) REG_INTRA_4X4_PRED<1>:w PRED_YW(14)<1;4,2>
+ RETURN_1
+
+// Mode 8
+INTRA_4X4_HOR_UP:
+// Set extra left reference pixels for unified prediction
+ mov (8) REF_LEFT(0,4)<1> REF_LEFT(0,3)REGION(1,0) // Copy p[-1,3] to p[-1,y],y=4...7
+ // Even pixels
+ avg (8) PRED_YW(14)<2> REF_LEFT(0)REGION(8,1) REF_LEFT(0,1)REGION(8,1) // avg(p[y],p[y+1])
+ // Odd pixels
+ add (8) acc0<1>:w REF_LEFT(0,2)REGION(8,1) 2:w // p[y+2]+2
+ mac (8) acc0<1>:w REF_LEFT(0,1)REGION(8,1) 2:w // 2*p[y+1]+p[y+2]+2
+ mac (8) PRED_YW(15)<1> REF_LEFT(0)REGION(8,1) 1:w // p[y]+2*p[y+1]+p[y+2]+2
+ shr (8) PRED_YW(14,1)<2> PRED_YW(15)REGION(8,1) 2:w // (p[y]+2*p[y+1]+p[y+2]+2)>>2
+
+ mov (16) REG_INTRA_4X4_PRED<1>:w PRED_YW(14)<2;4,1>
+ RETURN_1
+
+// End of intra_Pred_4x4_Y_4
+
+#endif // !defined(__INTRA_PRED_4X4_Y_4__)
diff --git a/src/shaders/h264/mc/intra_Pred_8x8_Y.asm b/src/shaders/h264/mc/intra_Pred_8x8_Y.asm new file mode 100644 index 00000000..c4f245ed --- /dev/null +++ b/src/shaders/h264/mc/intra_Pred_8x8_Y.asm @@ -0,0 +1,246 @@ +/*
+ * Intra predict 8X8 luma block
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+#if !defined(__INTRA_PRED_8X8_Y__) // Make sure this is only included once
+#define __INTRA_PRED_8X8_Y__
+
+// Module name: intra_Pred_8X8_Y.asm
+//
+// Intra predict 8X8 luma block
+//
+//--------------------------------------------------------------------------
+// Input data:
+//
+// REF_TOP: Top reference data stored in BYTE with p[-1,-1] at REF_TOP(0,-1), p[-1,-1] and [15,-1] adjusted
+// REF_LEFT: Left reference data stored in BYTE with p[-1,0] at REF_LEFT(0,2), REF_LEFT(0,1) (p[-1,-1]) adjusted
+// PRED_MODE: Intra prediction mode stored in 4 LSBs
+// INTRA_PRED_AVAIL: Top/Left available flag, (Bit0: Left, Bit1: Top)
+//
+// Output data:
+//
+// REG_INTRA_8X8_PRED: Predicted 8X8 block data
+//--------------------------------------------------------------------------
+
+#define INTRA_REF REG_INTRA_TEMP_1
+#define REF_TMP REG_INTRA_TEMP_2
+
+intra_Pred_8x8_Y:
+
+// Reference sample filtering
+//
+ // Set up boundary pixels for unified filtering
+ mov (1) REF_TOP(0,16)<1> REF_TOP(0,15)REGION(1,0) // p[16,-1] = p[15,-1]
+ mov (8) REF_LEFT(0,2+8)<1> REF_LEFT(0,2+7)REGION(1,0) // p[-1,8] = p[-1,7]
+
+ // Top reference sample filtering (!!Consider instruction compression later)
+ add (16) acc0<1>:w REF_TOP(0,-1)REGION(16,1) 2:w // p[x-1,-1]+2
+ mac (16) acc0<1>:w REF_TOP(0)REGION(16,1) 2:w // p[x-1,-1]+2*p[x,-1]+2
+ mac (16) acc0<1>:w REF_TOP(0,1)REGION(16,1) 1:w // p[x-1,-1]+2*p[x,-1]+p[x+1,-1]+2
+ shr (16) REF_TMP<1>:w acc0:w 2:w // (p[x-1,-1]+2*p[x,-1]+p[x+1,-1]+2)>>2
+
+ // Left reference sample filtering
+ add (16) acc0<1>:w REF_LEFT(0)REGION(16,1) 2:w // p[-1,y-1]+2
+ mac (16) acc0<1>:w REF_LEFT(0,1)REGION(16,1) 2:w // p[-1,y-1]+2*p[-1,y]+2
+ mac (16) acc0<1>:w REF_LEFT(0,2)REGION(16,1) 1:w // p[-1,y-1]+2*p[-1,y]+p[-1,y+1]+2
+ shr (16) INTRA_REF<1>:w acc0:w 2:w // (p[-1,y-1]+2*p[-1,y]+p[-1,y+1]+2)>>2
+
+ // Re-assign filtered reference samples
+ mov (16) REF_TOP(0)<1> REF_TMP<32;16,2>:ub // p'[x,-1], x=0...15
+ mov (8) REF_LEFT(0)<1> INTRA_REF.2<16;8,2>:ub // p'[-1,y], y=0...7
+ mov (1) REF_TOP(0,-1)<1> INTRA_REF<0;1,0>:ub // p'[-1,-1]
+
+// Select intra_8x8 prediction mode
+//
+ and (1) PINTRAPRED_Y<1>:w PRED_MODE<0;1,0>:w 0x0F:w
+ // WA for "jmpi" restriction
+ mov (1) REG_INTRA_TEMP_1<1>:ud r[PINTRAPRED_Y, INTRA_8X8_OFFSET]:ub
+ jmpi (1) REG_INTRA_TEMP_1<0;1,0>:d
+
+// Mode 0
+#define PTMP a0.6
+#define PTMP_D a0.3
+INTRA_8X8_VERTICAL:
+ $for(0,0; <4; 1,32) {
+ add.sat (16) r[PPREDBUF_Y,%2]<2>:ub r[PERROR,%2]<16;16,1>:w REF_TOP(0)<0;8,1>
+ }
+ RETURN
+
+// Mode 1
+INTRA_8X8_HORIZONTAL:
+ $for(0,0; <8; 2,32) {
+ add.sat (16) r[PPREDBUF_Y,%2]<2>:ub r[PERROR,%2]<16;16,1>:w REF_LEFT(0,%1)<1;8,0>
+ }
+ RETURN
+
+// Mode 2
+INTRA_8X8_DC:
+// Rearrange reference samples for unified DC prediction code
+//
+ and.nz.f0.0 (16) NULLREG INTRA_PRED_AVAIL<0;1,0>:w 2:w // Top macroblock available for intra prediction?
+ and.nz.f0.1 (8) NULLREG INTRA_PRED_AVAIL<0;1,0>:w 1:w // Left macroblock available for intra prediction?
+ (-f0.0.any16h) mov (16) REF_TOP_W(0)<1> 0x8080:uw
+ (-f0.1.any8h) mov (8) REF_LEFT(0)<1> REF_TOP(0)REGION(8,1)
+ (-f0.0.any8h) mov (8) REF_TOP(0)<1> REF_LEFT(0)REGION(8,1)
+
+// Perform DC prediction
+//
+ add (8) PRED_YW(15)<1> REF_TOP(0)REGION(8,1) REF_LEFT(0)REGION(8,1)
+ add (4) PRED_YW(15)<1> PRED_YW(15)REGION(4,1) PRED_YW(15,4)REGION(4,1)
+ add (2) PRED_YW(15)<1> PRED_YW(15)REGION(2,1) PRED_YW(15,2)REGION(2,1)
+ add (16) acc0<1>:w PRED_YW(15)REGION(1,0) PRED_YW(15,1)REGION(1,0)
+ add (16) acc0<1>:w acc0:w 8:w
+ shr (16) REG_INTRA_TEMP_0<1>:w acc0:w 4:w
+
+ // Add error block
+ $for(0,0; <4; 1,32) {
+ add.sat (16) r[PPREDBUF_Y,%2]<2>:ub r[PERROR,%2]<16;16,1>:w REG_INTRA_TEMP_0<16;16,1>:w
+ }
+ RETURN
+
+// Mode 3
+INTRA_8X8_DIAG_DOWN_LEFT:
+ mov (8) REF_TOP(0,16)<1> REF_TOP(0,15)REGION(8,1) // p[16,-1] = p[15,-1]
+ add (16) acc0<1>:w REF_TOP(0,2)REGION(16,1) 2:w // p[x+2]+2
+ mac (16) acc0<1>:w REF_TOP(0,1)REGION(16,1) 2:w // 2*p[x+1]+p[x+2]+2
+ mac (16) acc0<1>:w REF_TOP(0)REGION(16,1) 1:w // p[x]+2*p[x+1]+p[x+2]+2
+ shr (16) REG_INTRA_TEMP_0<1>:w acc0<16;16,1>:w 2:w // (p[x]+2*p[x+1]+p[x+2]+2)>>2
+
+ // Add error block
+ $for(0,0; <8; 2,32) {
+ add.sat (16) r[PPREDBUF_Y,%2]<2>:ub r[PERROR,%2]<16;16,1>:w REG_INTRA_TEMP_0.%1<1;8,1>:w
+ }
+ RETURN
+
+// Mode 4
+INTRA_8X8_DIAG_DOWN_RIGHT:
+#define INTRA_REF REG_INTRA_TEMP_1
+#define REF_TMP REG_INTRA_TEMP_2
+
+// Set inverse shift count
+ shl (4) REF_TMP<1>:ud REF_LEFT_D(0,1)REGION(1,0) INV_SHIFT<4;4,1>:b // Reverse order bottom 4 pixels of left ref.
+ shl (4) REF_TMP.4<1>:ud REF_LEFT_D(0)REGION(1,0) INV_SHIFT<4;4,1>:b // Reverse order top 4 pixels of left ref.
+ mov (8) INTRA_REF<1>:ub REF_TMP.3<32;8,4>:ub
+ mov (16) INTRA_REF.8<1>:ub REF_TOP(0,-1)REGION(16,1) // INTRA_REF holds all reference data
+
+ add (16) acc0<1>:w INTRA_REF.2<16;16,1>:ub 2:w // p[x+2]+2
+ mac (16) acc0<1>:w INTRA_REF.1<16;16,1>:ub 2:w // 2*p[x+1]+p[x+2]+2
+ mac (16) acc0<1>:w INTRA_REF<16;16,1>:ub 1:w // p[x]+2*p[x+1]+p[x+2]+2
+ shr (16) INTRA_REF<1>:w acc0<16;16,1>:w 2:w // (p[x]+2*p[x+1]+p[x+2]+2)>>2
+
+// Store data in reversed order
+ add (2) PBWDCOPY_8<1>:w INV_TRANS48<2;2,1>:b INTRA_TEMP_1*GRFWIB:w // Must match with INTRA_REF
+
+ // Add error block
+ $for(0,96; <8; 2,-32) {
+ add.sat (16) r[PPREDBUF_Y,%2]<2>:ub r[PBWDCOPY_8,%1*2]<8,1>:w r[PERROR,%2]<16;16,1>:w
+ }
+ RETURN
+
+// Mode 5
+INTRA_8X8_VERT_RIGHT:
+#define INTRA_REF REG_INTRA_TEMP_1
+#define REF_TMP REG_INTRA_TEMP_2
+#define REF_TMP1 REG_INTRA_TEMP_3
+
+// Set inverse shift count
+ shl (4) REF_TMP<1>:ud REF_LEFT_D(0,1)REGION(1,0) INV_SHIFT<4;4,1>:b // Reverse order bottom 4 pixels of left ref.
+ shl (4) REF_TMP.4<1>:ud REF_LEFT_D(0)REGION(1,0) INV_SHIFT<4;4,1>:b // Reverse order top 4 pixels of left ref.
+ mov (8) INTRA_REF<1>:ub REF_TMP.3<32;8,4>:ub
+ mov (16) INTRA_REF.8<1>:ub REF_TOP(0,-1)REGION(16,1) // INTRA_REF holds all reference data
+
+ // Even rows
+ avg (16) PRED_YW(14)<1> INTRA_REF.8<16;16,1> INTRA_REF.9<16;16,1> // avg(p[x-1],p[x])
+ // Odd rows
+ add (16) acc0<1>:w INTRA_REF.3<16;16,1>:ub 2:w // p[x]+2
+ mac (16) acc0<1>:w INTRA_REF.2<16;16,1>:ub 2:w // 2*p[x-1]+p[x]+2
+ mac (16) acc0<1>:w INTRA_REF.1<16;16,1>:ub 1:w // p[x-2]+2*p[x-1]+p[x]+2
+ shr (16) REF_TMP<1>:w acc0:w 2:w // (p[x-2]+2*p[x-1]+p[x]+2)>>2
+
+ mov (8) INTRA_REF<1>:ub REF_TMP<16;8,2>:ub // Keep zVR = -1,-2,-3,-4,-5,-6,-7 sequencially
+ mov (8) INTRA_REF.6<2>:ub REF_TMP.12<16;8,2>:ub // Keep zVR = -1,1,3,5,7,9,11,13 at even byte
+ mov (8) INTRA_REF.7<2>:ub PRED_Y(14)REGION(8,2) // Combining zVR = 0,2,4,6,8,10,12,14 at odd byte
+
+ add (2) PBWDCOPY_8<1>:w INV_TRANS8<2;2,1>:b INTRA_TEMP_1*GRFWIB:w // Must match with INTRA_REF
+
+ // Add error block
+ $for(0,96; <8; 2,-32) {
+ add.sat (16) r[PPREDBUF_Y,%2]<2>:ub r[PBWDCOPY_8,%1]<8,2>:ub r[PERROR,%2]<16;16,1>:w
+ }
+ RETURN
+
+// Mode 6
+INTRA_8X8_HOR_DOWN:
+// Set inverse shift count
+ shl (4) REF_TMP<1>:ud REF_LEFT_D(0,1)REGION(1,0) INV_SHIFT<4;4,1>:b // Reverse order bottom 4 pixels of left ref.
+ shl (4) REF_TMP.4<1>:ud REF_LEFT_D(0)REGION(1,0) INV_SHIFT<4;4,1>:b // Reverse order top 4 pixels of left ref.
+ mov (8) INTRA_REF<1>:ub REF_TMP.3<16;4,4>:ub
+ mov (16) INTRA_REF.8<1>:ub REF_TOP(0,-1)REGION(16,1) // INTRA_REF holds all reference data
+
+ // Odd pixels
+ add (16) acc0<1>:w INTRA_REF.2<16;16,1>:ub 2:w // p[y]+2
+ mac (16) acc0<1>:w INTRA_REF.1<16;16,1>:ub 2:w // 2*p[y-1]+p[y]+2
+ mac (16) acc0<1>:w INTRA_REF.0<16;16,1>:ub 1:w // p[y-2]+2*p[y-1]+p[y]+2
+ shr (16) PRED_YW(14)<1> acc0:w 2:w // (p[y-2]+2*p[y-1]+p[y]+2)>>2
+ // Even pixels
+ avg (16) INTRA_REF<1>:w INTRA_REF<16;16,1>:ub INTRA_REF.1<16;16,1>:ub // avg(p[y-1],p[y])
+
+ mov (8) INTRA_REF.1<2>:ub PRED_Y(14)REGION(8,2) // Combining odd pixels to form byte type
+ mov (8) INTRA_REF.16<1>:ub PRED_Y(14,16)REGION(8,2) // Keep zVR = -2,-3,-4,-5,-6,-7 unchanged
+ // Now INTRA_REF.0 - INTRA_REF.21 contain predicted data
+
+ add (2) PBWDCOPY_8<1>:w INV_TRANS48<2;2,1>:b INTRA_TEMP_1*GRFWIB:w // Must match with INTRA_REF
+
+ // Add error block
+ $for(0,96; <13; 4,-32) {
+ add.sat (16) r[PPREDBUF_Y,%2]<2>:ub r[PBWDCOPY_8,%1]<8,1>:ub r[PERROR,%2]<16;16,1>:w
+ }
+ RETURN
+
+// Mode 7
+INTRA_8X8_VERT_LEFT:
+ // Even rows
+ avg (16) PRED_YW(14)<1> REF_TOP(0)REGION(16,1) REF_TOP(0,1)REGION(16,1) // avg(p[x],p[x+1])
+ // Odd rows
+ add (16) acc0<1>:w REF_TOP(0,2)REGION(16,1) 2:w // p[x+2]+2
+ mac (16) acc0<1>:w REF_TOP(0,1)REGION(16,1) 2:w // 2*p[x+1]+p[x+2]+2
+ mac (16) acc0<1>:w REF_TOP(0)REGION(16,1) 1:w // p[x]+2*p[x+1]+p[x+2]+2
+ shr (16) PRED_YW(15)<1> acc0<1;8,1>:w 2:w // (p[x]+2*p[x+1]+p[x+2]+2)>>2
+
+ // Add error block
+ $for(0,0; <4; 1,32) {
+ add.sat (16) r[PPREDBUF_Y,%2]<2>:ub PRED_YW(14,%1)<16;8,1> r[PERROR,%2]<16;16,1>:w
+ }
+ RETURN
+
+// Mode 8
+INTRA_8X8_HOR_UP:
+// Set extra left reference pixels for unified prediction
+ mov (8) REF_LEFT(0,8)<1> REF_LEFT(0,7)REGION(1,0) // Copy p[-1,7] to p[-1,y],y=8...15
+
+ // Even pixels
+ avg (16) PRED_YW(14)<1> REF_LEFT(0)REGION(16,1) REF_LEFT(0,1)REGION(16,1) // avg(p[y],p[y+1])
+ // Odd pixels
+ add (16) acc0<1>:w REF_LEFT(0,2)REGION(16,1) 2:w // p[y+2]+2
+ mac (16) acc0<1>:w REF_LEFT(0,1)REGION(16,1) 2:w // 2*p[y+1]+p[y+2]+2
+ mac (16) acc0<1>:w REF_LEFT(0)REGION(16,1) 1:w // p[y]+2*p[y+1]+p[y+2]+2
+ shr (16) PRED_YW(15)<1> acc0<1;8,1>:w 2:w // (p[y]+2*p[y+1]+p[y+2]+2)>>2
+
+ // Merge even/odd pixels
+ // The predicted data need to be stored in byte type (22 bytes are required)
+ mov (16) PRED_Y(14,1)<2> PRED_Y(15)REGION(16,2)
+
+ // Add error block
+ $for(0,0; <4; 1,32) {
+ add.sat (16) r[PPREDBUF_Y,%2]<2>:ub PRED_Y(14,%1*4)<2;8,1> r[PERROR,%2]<16;16,1>:w
+ }
+ RETURN
+
+// End of intra_Pred_8X8_Y
+
+#endif // !defined(__INTRA_PRED_8X8_Y__)
diff --git a/src/shaders/h264/mc/intra_Pred_Chroma.asm b/src/shaders/h264/mc/intra_Pred_Chroma.asm new file mode 100644 index 00000000..a1e16975 --- /dev/null +++ b/src/shaders/h264/mc/intra_Pred_Chroma.asm @@ -0,0 +1,155 @@ +/*
+ * Intra predict 8x8 chroma block
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+#if !defined(__INTRA_PRED_CHROMA__) // Make sure this is only included once
+#define __INTRA_PRED_CHROMA__
+
+// Module name: intra_Pred_Chroma.asm
+//
+// Intra predict 8x8 chroma block
+//
+
+ shr (1) PINTRAPRED_UV<1>:w REG_INTRA_CHROMA_PRED_MODE<0;1,0>:ub INTRA_CHROMA_PRED_MODE_SHIFT:w // Bits 1:0 = intra chroma pred mode
+ // WA for "jmpi" restriction
+ mov (1) REG_INTRA_TEMP_1<1>:d r[PINTRAPRED_UV, INTRA_CHROMA_OFFSET]:b
+ jmpi (1) REG_INTRA_TEMP_1<0;1,0>:d
+
+// Mode 0
+INTRA_CHROMA_DC:
+ and.nz.f0.0 (8) NULLREG REG_INTRA_PRED_AVAIL_FLAG INTRA_PRED_UP_AVAIL_FLAG:ud // Top macroblock available for intra prediction?
+
+// Calculate DC values for sub-block 0 and 3
+//
+// Rearrange reference samples for unified DC prediction code
+// Need to check INTRA_PRED_LEFT_TH_AVAIL_FLAG for blk0 and INTRA_PRED_LEFT_BH_AVAIL_FLAG for blk3
+//
+ (-f0.0.any8h) mov (8) INTRA_REF_TOP_W(0)<1> 0x8080:uw // Up not available
+
+ and.nz.f0.1 (4) NULLREG REG_INTRA_PRED_AVAIL_FLAG INTRA_PRED_LEFT_TH_AVAIL_FLAG:ud
+ (-f0.1.any4h) mov (4) INTRA_REF_LEFT_W(0)<2> INTRA_REF_TOP_W(0)REGION(4,1) // Left top half macroblock not available for intra prediction
+ and.nz.f0.1 (4) NULLREG REG_INTRA_PRED_AVAIL_FLAG INTRA_PRED_LEFT_BH_AVAIL_FLAG:ud
+ (-f0.1.any4h) mov (4) INTRA_REF_LEFT_W(0,8)<2> INTRA_REF_TOP_W(0,4)REGION(4,1) // Left bottom half macroblock not available for intra prediction
+
+ (-f0.0.any8h) mov (8) INTRA_REF_TOP_W(0)<1> INTRA_REF_LEFT_W(0)REGION(8,2) // Up not available
+// Calculate DC prediction
+//
+ add (16) PRED_UVW(0)<1> INTRA_REF_TOP(0)REGION(16,1) INTRA_REF_LEFT_UV(0)<4;2,1> // Sum of top and left reference
+ add (8) PRED_UVW(0)<1> PRED_UVW(0)<4;2,1> PRED_UVW(0,2)<4;2,1> // Sum of first half (blk #0) and second half (blk #3)
+
+ add (8) PRED_UVW(9)<1> PRED_UVW(0)<0;2,1> PRED_UVW(0,2)<0;2,1> // Sum of blk #0
+ add (8) PRED_UVW(11,8)<1> PRED_UVW(0,4)<0;2,1> PRED_UVW(0,6)<0;2,1> // Sum of blk #3
+
+// Calculate DC values for sub-block 1 and 2
+//
+// Rearrange reference samples for unified DC prediction code
+//
+ // Blk #2
+ (-f0.0.any4h) mov (4) INTRA_REF_TOP_W(0)<1> 0x8080:uw
+ (f0.1.any4h) mov (4) INTRA_REF_TOP_W(0)<1> INTRA_REF_LEFT_W(0,8)REGION(4,2) // Always use available left reference
+ (-f0.1.any4h) mov (4) INTRA_REF_LEFT_W(0,8)<2> INTRA_REF_TOP_W(0)REGION(4,1)
+
+ // Blk #1
+ and.nz.f0.1 (4) NULLREG REG_INTRA_PRED_AVAIL_FLAG INTRA_PRED_LEFT_TH_AVAIL_FLAG:ud
+ (-f0.1.any4h) mov (4) INTRA_REF_LEFT_W(0)<2> 0x8080:uw
+ (f0.0.any4h) mov (4) INTRA_REF_LEFT_W(0)<2> INTRA_REF_TOP_W(0,4)REGION(4,1) // Always use available top reference
+ (-f0.0.any4h) mov (4) INTRA_REF_TOP_W(0,4)<1> INTRA_REF_LEFT_W(0)REGION(4,2)
+
+// Calculate DC prediction
+//
+ add (8) PRED_UVW(0)<1> INTRA_REF_TOP(0)REGION(8,1) INTRA_REF_LEFT_UV(0,16)<4;2,1> // Sum of top and left reference for blk #2
+ add (8) PRED_UVW(0,8)<1> INTRA_REF_LEFT_UV(0)<4;2,1> INTRA_REF_TOP(0,8)REGION(8,1) // Sum of top and left reference for blk #1
+ add (8) PRED_UVW(0)<1> PRED_UVW(0)<4;2,1> PRED_UVW(0,2)<4;2,1> // Sum of first half (blk #2) and second half (blk #1)
+
+ add (8) PRED_UVW(9,8)<1> PRED_UVW(0,4)<0;2,1> PRED_UVW(0,6)<0;2,1> // Sum of blk #1
+ add (8) PRED_UVW(11)<1> PRED_UVW(0)<0;2,1> PRED_UVW(0,2)<0;2,1> // Sum of blk #2
+
+// Now, PRED_UVW(9) holds sums for blks #0 and #1 and PRED_UVW(11) holds sums for blks #2 and #3
+//
+ add (32) acc0<1>:w PRED_UVW(9)REGION(16,1) 4:w {Compr} // Add rounder
+ $for(0; <4; 2) {
+ shr (32) PRED_UVW(%1)<1> acc0:w 3:w {Compr}
+ }
+
+ add (32) acc0<1>:w PRED_UVW(11)REGION(16,1) 4:w {Compr} // Add rounder
+ $for(4; <8; 2) {
+ shr (32) PRED_UVW(%1)<1> acc0:w 3:w {Compr}
+ }
+ jmpi (1) End_of_intra_Pred_Chroma
+
+// Mode 1
+INTRA_CHROMA_HORIZONTAL:
+ mov (1) PREF_LEFT_UD<1>:ud INTRA_REF_LEFT_ID*GRFWIB*0x00010001+0x00040000:ud // Set address registers for instruction compression
+ $for(0,0; <8; 2,8) {
+ mov (32) PRED_UVW(%1)<1> r[PREF_LEFT,%2+2]<0;2,1>:ub {Compr} // Actual left column reference data start at offset 2
+ }
+ jmpi (1) End_of_intra_Pred_Chroma
+
+// Mode 2
+INTRA_CHROMA_VERTICAL:
+ $for(0; <8; 2) {
+ mov (32) PRED_UVW(%1)<1> INTRA_REF_TOP(0) {Compr}
+ }
+ jmpi (1) End_of_intra_Pred_Chroma
+
+// Mode 3
+INTRA_Chroma_PLANE:
+// Refer to H.264/AVC spec Section 8.3.4.4
+
+#undef C
+
+#define A REG_INTRA_TEMP_2.0 // All are WORD type
+#define B REG_INTRA_TEMP_3.0 // B[U] & B[V]
+#define C REG_INTRA_TEMP_3.2 // C[U] & C[V]
+#define YP REG_INTRA_TEMP_0 // Store intermediate results of c*(y-3). Make sure it's an even GRF
+#define YP1 REG_INTRA_TEMP_1 // Store intermediate results of c*(y-3). Make sure it's an odd GRF
+#define XP REG_INTRA_TEMP_5 // Store intermediate results of a+b*(x-3)+16. Make sure it's an odd GRF
+
+// First Calculate constants H and V
+// H1 = sum((x'+1)*p[4+x',-1]), x'=0,1,2,3
+// H2 = sum((-x'-1)*p[2-x',-1]), x'=3,2,1,0
+// H = H1 + H2
+// The same calculation holds for V
+//
+ mul (8) H1(0)<1> INTRA_REF_TOP(0,8)REGION(8,1) 0x44332211:v
+ mul (8) H2(0)<1> INTRA_REF_TOP(0,-2)REGION(8,1) 0xFFEEDDCC:v
+
+ mul (8) V1(0)<1> INTRA_REF_LEFT_UV(0,4*4)<4;2,1> 0x44332211:v
+ mul (8) V2(0)<1> INTRA_REF_LEFT_UV(0)<4;2,1> 0x00FFEEDD:v
+ mul (2) V2(0,6)<1> INTRA_REF_TOP(0,-2)REGION(2,1) -4:w // Replace 0*p[-1,3] with -4*p[-1,-1]
+ // Now, REG_INTRA_TEMP_0 holds [H2, H1] and REG_INTRA_TEMP_1 holds [V2, V1]
+
+ // Sum up [H2, H1] and [V2, V1] using instruction compression
+ // ExecSize = 16 is restricted by B-spec for instruction compression
+ // Actual intermediate results are in lower sub-registers after each summing step
+ add (16) H1(0)<1> H1(0) H2(0) {Compr} // Results in lower 8 WORDs
+ add (16) H1(0)<1> H1(0) H1(0,4) {Compr} // Results in lower 4 WORDs
+ add (16) H1(0)<1> H1(0) H1(0,2) {Compr} // Results in lower 2 WORDs
+
+// Calculate a, b, c and further derivations
+ mov (16) acc0<1>:w 32:w
+ mac (4) acc0<1>:w H1(0)<16;2,1> 34:w
+ shr (4) B<1>:w acc0:w 6:w // Done b,c
+ mov (16) acc0<1>:w 16:w
+ mac (16) acc0<1>:w INTRA_REF_TOP(0,7*2)<0;2,1> 16:w
+ mac (16) A<1>:w INTRA_REF_LEFT_UV(0,7*4)<0;2,1> 16:w // A = a+16
+ mac (16) XP<1>:w B<0;2,1>:w XY_3<1;2,0>:b // XP = A+b*(x-3)
+ mul (8) YP<1>:w C<0;2,1>:w XY_3<2;2,0>:b // YP = c*(y-3), Even portion
+ mul (8) YP1<1>:w C<0;2,1>:w XY_3_1<2;2,0>:b // YP = c*(y-3), Odd portion
+
+// Finally the intra_Chroma plane prediction
+ $for(0; <8; 2) {
+ add (32) acc0<1>:w XP<16;16,1>:w YP.%1<0;2,1>:w {Compr}
+ shr.sat (32) PRED_UV(%1)<2> acc0<16;16,1>:w 5:w {Compr}
+ }
+
+End_of_intra_Pred_Chroma:
+
+// End of intra_Pred_Chroma
+
+#endif // !defined(__INTRA_PRED_CHROMA__)
diff --git a/src/shaders/h264/mc/intra_pred_16x16_Y.asm b/src/shaders/h264/mc/intra_pred_16x16_Y.asm new file mode 100644 index 00000000..94ccb076 --- /dev/null +++ b/src/shaders/h264/mc/intra_pred_16x16_Y.asm @@ -0,0 +1,111 @@ +/*
+ * Intra predict 16x16 luma block
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: intra_Pred_16x16_Y.asm
+//
+// Intra predict 16x16 luma block
+//
+ and (1) PINTRAPRED_Y<1>:w INTRA_PRED_MODE(0)REGION(1,0) 0x0F:w
+ // WA for "jmpi" restriction
+ mov (1) REG_INTRA_TEMP_1<1>:ud r[PINTRAPRED_Y, INTRA_16X16_OFFSET]:ub
+ jmpi (1) REG_INTRA_TEMP_1<0;1,0>:d
+
+// Mode 0
+INTRA_16x16_VERTICAL:
+ $for(0; <16; 2) {
+ mov (32) PRED_YW(%1)<1> INTRA_REF_TOP(0) {Compr}
+ }
+ jmpi (1) End_intra_Pred_16x16_Y
+
+// Mode 1
+INTRA_16x16_HORIZONTAL:
+ mov (1) PREF_LEFT_UD<1>:ud INTRA_REF_LEFT_ID*GRFWIB*0x00010001+0x00040000:ud // Set address registers for instruction compression
+ $for(0,0; <16; 2,8) {
+ mov (32) PRED_YW(%1)<1> r[PREF_LEFT,%2+3]<0;1,0>:ub {Compr} // Actual left column reference data start at offset 3
+ }
+ jmpi (1) End_intra_Pred_16x16_Y
+
+// Mode 2
+INTRA_16x16_DC:
+ and.nz.f0.0 (8) NULLREG REG_INTRA_PRED_AVAIL_FLAG INTRA_PRED_UP_AVAIL_FLAG:ud // Top macroblock available for intra prediction?
+ and (8) acc0<1>:ud REG_INTRA_PRED_AVAIL_FLAG INTRA_PRED_LEFT_TH_AVAIL_FLAG+INTRA_PRED_LEFT_BH_AVAIL_FLAG:ud // Left macroblock available for intra prediction?
+ xor.z.f0.1 (8) NULLREG acc0:ud INTRA_PRED_LEFT_TH_AVAIL_FLAG+INTRA_PRED_LEFT_BH_AVAIL_FLAG:ud // Left macroblock available for intra prediction?
+// Rearrange reference samples for unified DC prediction code
+//
+ (-f0.0.any8h) mov (8) INTRA_REF_TOP_W(0)<1> 0x8080:uw
+ (-f0.1.any8h) mov (8) INTRA_REF_LEFT(0)<4> INTRA_REF_TOP(0)REGION(8,1)
+ (-f0.1.any8h) mov (8) INTRA_REF_LEFT(1)<4> INTRA_REF_TOP(0,8)REGION(8,1)
+ (-f0.0.any8h) mov (8) INTRA_REF_TOP(0)<1> INTRA_REF_LEFT(0)REGION(8,4)
+ (-f0.0.any8h) mov (8) INTRA_REF_TOP(0,8)<1> INTRA_REF_LEFT(1)REGION(8,4) // Split due to HW limitation
+// Perform DC prediction
+//
+ add (16) PRED_YW(15)<1> INTRA_REF_LEFT(0)REGION(8,4) INTRA_REF_TOP(0)REGION(16,1)
+ add (8) PRED_YW(15)<1> PRED_YW(15)REGION(8,1) PRED_YW(15,8)REGION(8,1)
+ add (4) PRED_YW(15)<1> PRED_YW(15)REGION(4,1) PRED_YW(15,4)REGION(4,1)
+ add (2) PRED_YW(15)<1> PRED_YW(15)REGION(2,1) PRED_YW(15,2)REGION(2,1)
+ add (32) acc0<1>:w PRED_YW(15)REGION(1,0) PRED_YW(15,1)REGION(1,0) {Compr} // Set up both acc0 and acc1
+ add (32) acc0<1>:w acc0:w 16:w {Compr}
+
+ $for(0; <16; 2) {
+ shr (32) PRED_YW(%1)<1> acc0:w 5:w {Compr}
+ }
+ jmpi (1) End_intra_Pred_16x16_Y
+
+// Mode 3
+INTRA_16x16_PLANE:
+// Refer to H.264/AVC spec Section 8.3.3.4
+
+#define A REG_INTRA_TEMP_2.0 // All are WORD type
+#define B REG_INTRA_TEMP_3.0
+#define C REG_INTRA_TEMP_3.1
+#define YP REG_INTRA_TEMP_0 // Store intermediate results of c*(y-7). Make sure it's an even GRF
+#define YP1 REG_INTRA_TEMP_1 // Store intermediate results of c*(y-7). Make sure it's an odd GRF, used in {Comp}
+#define XP REG_INTRA_TEMP_5 // Store intermediate results of a+b*(x-7)+16. Make sure it's an odd GRF
+
+// First Calculate constants H and V
+// H1 = sum((-x'-1)*p[8+x',-1]), x'=0,1,...7
+// H2 = sum((-x'-1)*p[6-x',-1]), x'=7,6,...0
+// H = -H1 + H2
+// The same calculation holds for V
+//
+ mul (8) H1(0)<1> INTRA_REF_TOP(0,8)REGION(8,1) 0x89ABCDEF:v
+ mul (8) H2(0)<1> INTRA_REF_TOP(0,-1)REGION(8,1) 0xFEDCBA98:v
+
+ mul (8) V1(0)<1> INTRA_REF_LEFT(0,8*4)REGION(8,4) 0x89ABCDEF:v
+ mul (8) V2(0)<1> INTRA_REF_LEFT(0)REGION(8,4) 0x0FEDCBA9:v
+ mul (1) V2(0,7)<1> INTRA_REF_TOP(0,-1)<0;1,0> -8:w // Replace 0*p[-1,7] with -8*p[-1,-1]
+ // Now, REG_INTRA_TEMP_0 holds [H2, -H1] and REG_INTRA_TEMP_1 holds [V2, -V1]
+
+ // Sum up [H2, -H1] and [V2, -V1] using instruction compression
+ // ExecSize = 16 is restricted by B-spec for instruction compression
+ // Actual intermediate results are in lower sub-registers after each summing step
+ add (16) H1(0)<1> -H1(0) H2(0) {Compr} // Results in lower 8 WORDs
+ add (16) H1(0)<1> H1(0) H1(0,4) {Compr} // Results in lower 4 WORDs
+ add (16) H1(0)<1> H1(0) H1(0,2) {Compr} // Results in lower 2 WORDs
+ add (16) H1(0)<1> H1(0) H1(0,1) {Compr} // Results in lower 1 WORD
+
+// Calculate a, b, c and further derivations
+ mov (16) acc0<1>:w 32:w
+ mac (2) acc0<1>:w H1(0)<16;1,0> 5:w
+ shr (2) B<1>:w acc0:w 6:w // Done b,c
+ mov (16) acc0<1>:w 16:w
+ mac (16) acc0<1>:w INTRA_REF_TOP(0,15)<0;1,0> 16:w
+ mac (16) A<1>:w INTRA_REF_LEFT(0,15*4)<0;1,0> 16:w // A = a+16
+ mac (16) XP<1>:w B<0;1,0>:w XY_7<16;16,1>:b // XP = A+b*(x-7)
+ mul (8) YP<1>:w C<0;1,0>:w XY_7<16;8,2>:b // YP = c*(y-7), even portion
+ mul (8) YP1<1>:w C<0;1,0>:w XY_7_1<16;8,2>:b // YP = c*(y-7), odd portion
+
+// Finally the intra_16x16 plane prediction
+ $for(0,0; <16; 2,1) {
+ add (32) acc0<1>:w XP<16;16,1>:w YP.%2<16;16,0>:w {Compr} // Set Width!= 1 to trick EU to use YP_1.%2 for 2nd instruction
+ shr.sat (32) PRED_Y(%1)<2> acc0<16;16,1>:w 5:w {Compr}
+ }
+
+End_intra_Pred_16x16_Y:
+// End of intra_Pred_16x16_Y
diff --git a/src/shaders/h264/mc/list b/src/shaders/h264/mc/list new file mode 100644 index 00000000..000e0fba --- /dev/null +++ b/src/shaders/h264/mc/list @@ -0,0 +1,21 @@ +INTRA_16x16 +INTRA_8x8 +INTRA_4x4 +INTRA_PCM +FRAME_MB +FIELD_MB +MBAFF_MB +SETHWSCOREBOARD +SETHWSCOREBOARD_MBAFF +AVC_ILDB_ROOT_Y_ILDB_FRAME +AVC_ILDB_CHILD_Y_ILDB_FRAME +AVC_ILDB_ROOT_UV_ILDB_FRAME +AVC_ILDB_CHILD_UV_ILDB_FRAME +AVC_ILDB_ROOT_Y_ILDB_FIELD +AVC_ILDB_CHILD_Y_ILDB_FIELD +AVC_ILDB_ROOT_UV_ILDB_FIELD +AVC_ILDB_CHILD_UV_ILDB_FIELD +AVC_ILDB_ROOT_Y_ILDB_MBAFF +AVC_ILDB_CHILD_Y_ILDB_MBAFF +AVC_ILDB_ROOT_UV_ILDB_MBAFF +AVC_ILDB_CHILD_UV_ILDB_MBAFF diff --git a/src/shaders/h264/mc/loadRef_C_10x5.asm b/src/shaders/h264/mc/loadRef_C_10x5.asm new file mode 100644 index 00000000..3c0e851b --- /dev/null +++ b/src/shaders/h264/mc/loadRef_C_10x5.asm @@ -0,0 +1,57 @@ +/*
+ * Load reference 10x5 area for chroma NV12 4x4 MC
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: LoadRef_C_10x5.asm
+//
+// Load reference 10x5 area for chroma NV12 4x4 MC
+
+
+//#if !defined(__LOADREF_C_10x5__) // Make sure this is only included once
+//#define __LOADREF_C_10x5__
+
+
+#if 1
+
+ // Compute integer and fractional components of MV
+ asr (2) gMVX_INT<1>:w r[pMV,0]<2;2,1>:w 0x03:w {NoDDClr}
+ and (2) gMVX_FRACC<1>:w r[pMV,0]<2;2,1>:w 0x07:w {NoDDChk}
+
+ // Check whether MVY is integer
+ or.z.f0.0 (8) null:w gMVY_FRACC<0;1,0>:w 0:w
+
+ // Compute top-left corner position to be loaded
+ mov (2) gMSGSRC.0<1>:d gMVX_INT<2;2,1>:w
+ shl (1) gMSGSRC.0:d gMSGSRC.0:d 1:w
+
+ (f0.0) add (1) pMSGDSC:ud gMSGDSC_R:ud RESP_LEN(2)+nBI_LC_DIFF:ud
+ (-f0.0) add (1) pMSGDSC:ud gMSGDSC_R:ud RESP_LEN(3)+nBI_LC_DIFF:ud
+
+ // Read 16x5 pixels - TODO: Reading 12x5 instead of 16x5 took more time on CL. Why?
+ (f0.0) mov (1) gMSGSRC.2:ud 0x00030009:ud //{NoDDChk}
+ (-f0.0) mov (1) gMSGSRC.2:ud 0x00040009:ud //{NoDDChk}
+ send (8) gudREFC(0)<1> mMSGHDRC gMSGSRC<8;8,1>:ud DAPREAD pMSGDSC:ud
+
+#else
+
+ add (1) pMSGDSC:ud gMSGDSC_R:ud RESP_LEN(3)+nBI_LC_DIFF:ud
+
+ // Compute integer and fractional components of MV
+ asr (2) gMVX_INT<1>:w r[pMV,0]<2;2,1>:w 0x03:w {NoDDClr}
+ and (2) gMVX_FRACC<1>:w r[pMV,0]<2;2,1>:w 0x07:w {NoDDChk}
+
+ // Compute top-left corner position to be loaded
+ mov (2) gMSGSRC.0<1>:d gMVX_INT<2;2,1>:w
+ shl (1) gMSGSRC.0:d gMSGSRC.0:d 1:w
+
+ // Read 16x5 pixels
+ mov (1) gMSGSRC.2:ud 0x00040009:ud {NoDDChk}
+ send (8) gudREFC(0)<1> mMSGHDRC gMSGSRC<8;8,1>:ud DAPREAD pMSGDSC:ud
+#endif
+
+//#endif // !defined(__LOADREF_C_10x5__)
diff --git a/src/shaders/h264/mc/loadRef_C_6x3.asm b/src/shaders/h264/mc/loadRef_C_6x3.asm new file mode 100644 index 00000000..5ed7b69e --- /dev/null +++ b/src/shaders/h264/mc/loadRef_C_6x3.asm @@ -0,0 +1,38 @@ +/*
+ * Load reference 6x3 area for chroma NV12 4x4 MC
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: LoadRef_C_6x3.asm
+//
+// Load reference 6x3 area for chroma NV12 4x4 MC
+
+
+//#if !defined(__LOADREF_C_6x3__) // Make sure this is only included once
+//#define __LOADREF_C_6x3__
+
+
+#ifdef DEV_ILK
+ add (1) pMSGDSC:ud gMSGDSC_R:ud 0x00100010:ud
+#else
+ add (1) pMSGDSC:ud gMSGDSC_R:ud 0x00010010:ud
+#endif // DEV_ILK
+
+ // Compute integer and fractional components of MV
+ asr (2) gMVX_INT<1>:w r[pMV,0]<2;2,1>:w 0x03:w {NoDDClr}
+ and (2) gMVX_FRACC<1>:w r[pMV,0]<2;2,1>:w 0x07:w {NoDDChk}
+
+ // Compute top-left corner position to be loaded
+ mov (2) gMSGSRC.0<1>:d gMVX_INT<2;2,1>:w
+ shl (1) gMSGSRC.0:d gMSGSRC.0:d 1:w
+
+ // Read 8x3 pixels
+ mov (1) gMSGSRC.2:ud 0x00020005:ud
+ send (8) gudREFC(0)<1> mMSGHDRC gMSGSRC<8;8,1>:ud DAPREAD pMSGDSC:ud
+
+
+//#endif // !defined(__LOADREF_C_6x3__)
diff --git a/src/shaders/h264/mc/loadRef_Y_16x13.asm b/src/shaders/h264/mc/loadRef_Y_16x13.asm new file mode 100644 index 00000000..b233ea11 --- /dev/null +++ b/src/shaders/h264/mc/loadRef_Y_16x13.asm @@ -0,0 +1,127 @@ +/*
+ * Load reference 16x13 area for luma 8x8 MC
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: LoadRef_Y_16x13.asm
+//
+// Load reference 16x13 area for luma 8x8 MC
+
+
+//#if !defined(__LOADREF_Y_16x13__) // Make sure this is only included once
+//#define __LOADREF_Y_16x13__
+
+#if 1
+
+#if 1
+
+ // Check whether MVX is integer MV
+ and.z.f0.0 (1) null:w r[pMV,0]<0;1,0>:w 0x3:w
+
+ // Compute integer and fractional components of MV
+ and (2) gMVX_FRAC<1>:w r[pMV,0]<2;2,1>:w 0x03:w //{NoDDClr}
+ asr (2) gMVX_INT<1>:w r[pMV,0]<2;2,1>:w 0x02:w //{NoDDChk}
+
+ // Check whether MVY is integer
+ or.z.f0.1 (8) null:w gMVY_FRAC<0;1,0>:w 0:w
+
+ // If MVX is a multiple of 4 (..., -4, 0, 4, ...) integer MV, do special handling
+ (f0.0) jmpi (1) INTERLABEL(LOADREF_MVXZERO)
+
+ // Set message descriptor
+ (f0.1) add (1) pMSGDSC:ud gMSGDSC_R:ud RESP_LEN(4):ud
+ (-f0.1) add (1) pMSGDSC:ud gMSGDSC_R:ud RESP_LEN(7):ud
+
+ // Compute top-left corner position to be loaded
+ // TODO: sel
+ (-f0.1) add (2) gMSGSRC.0<1>:d gMVX_INT<2;2,1>:w -0x02:d //{NoDDClr}
+ (-f0.1) mov (1) gMSGSRC.2:ud 0x000c000c:ud //{NoDDChk}
+ (f0.1) add (1) gMSGSRC.0<1>:d gMVX_INT<0;1,0>:w -0x02:d //{NoDDClr}
+ (f0.1) mov (1) gMSGSRC.1<1>:d gMVY_INT<0;1,0>:w //{NoDDChk,NoDDClr}
+ (f0.1) mov (1) gMSGSRC.2:ud 0x0007000c:ud //{NoDDChk}
+
+ // Read 16x13 pixels
+ send (8) gudREF(0)<1> mMSGHDRY gMSGSRC<8;8,1>:ud DAPREAD pMSGDSC:ud
+
+ jmpi INTERLABEL(EXIT_LOADREF_Y_16x13)
+
+INTERLABEL(LOADREF_MVXZERO):
+
+ // Set message descriptor
+#ifdef DEV_ILK
+ (f0.1) add (1) pMSGDSC:ud gMSGDSC_R:ud 0x00200000:ud
+ (-f0.1) add (1) pMSGDSC:ud gMSGDSC_R:ud 0x00400000:ud
+#else
+ (f0.1) add (1) pMSGDSC:ud gMSGDSC_R:ud 0x00020000:ud
+ (-f0.1) add (1) pMSGDSC:ud gMSGDSC_R:ud 0x00040000:ud
+#endif
+
+ // Compute top-left corner position to be loaded
+ // TODO: sel
+ mov (2) gMSGSRC.0<1>:d gMVX_INT<2;2,1>:w
+ (-f0.1) add (1) gMSGSRC.1<1>:d gMVY_INT<0;1,0>:w -0x02:d
+ (-f0.1) mov (1) gMSGSRC.2:ud 0x000c0007:ud //{NoDDChk}
+ (f0.1) mov (1) gMSGSRC.2:ud 0x00070007:ud //{NoDDChk}
+
+ // Read 16x13 pixels
+ send (8) gudREF(0)<1> mMSGHDRY gMSGSRC<8;8,1>:ud DAPREAD pMSGDSC:ud
+
+
+#else
+ // Compute integer and fractional components of MV
+ and (2) gMVX_FRAC<1>:w r[pMV,0]<2;2,1>:w 0x03:w //{NoDDClr}
+ asr (2) gMVX_INT<1>:w r[pMV,0]<2;2,1>:w 0x02:w //{NoDDChk}
+
+ // Check whether MVY is integer
+ or.z.f0.1 (8) null:w gMVY_FRAC<0;1,0>:w 0:w
+
+ // Set message descriptor
+#ifdef DEV_ILK
+ (f0.1) add (1) pMSGDSC:ud gMSGDSC_R:ud 0x00400000:ud
+ (-f0.1) add (1) pMSGDSC:ud gMSGDSC_R:ud 0x00700000:ud
+#else
+ (f0.1) add (1) pMSGDSC:ud gMSGDSC_R:ud 0x00040000:ud
+ (-f0.1) add (1) pMSGDSC:ud gMSGDSC_R:ud 0x00070000:ud
+#endif
+
+ // Compute top-left corner position to be loaded
+ // TODO: sel
+ (-f0.1) add (2) gMSGSRC.0<1>:d gMVX_INT<2;2,1>:w -0x02:d //{NoDDClr}
+ (-f0.1) mov (1) gMSGSRC.2:ud 0x000c000c:ud //{NoDDChk}
+ (f0.1) add (1) gMSGSRC.0<1>:d gMVX_INT<0;1,0>:w -0x02:d //{NoDDClr}
+ (f0.1) mov (1) gMSGSRC.1<1>:d gMVY_INT<0;1,0>:w //{NoDDChk,NoDDClr}
+ (f0.1) mov (1) gMSGSRC.2:ud 0x0007000c:ud //{NoDDChk}
+
+ // Read 16x13 pixels
+ send (8) gudREF(0)<1> mMSGHDRY gMSGSRC<8;8,1>:ud DAPREAD pMSGDSC:ud
+#endif
+
+#else
+
+ // Compute integer and fractional components of MV
+ and (2) gMVX_FRAC<1>:w r[pMV,0]<2;2,1>:w 0x03:w {NoDDClr} //
+ asr (2) gMVX_INT<1>:w r[pMV,0]<2;2,1>:w 0x02:w {NoDDChk} //
+
+ // Set message descriptor
+#ifdef DEV_ILK
+ add (1) pMSGDSC:ud gMSGDSC_R:ud 0x00700000:ud
+#else
+ add (1) pMSGDSC:ud gMSGDSC_R:ud 0x00070000:ud
+#endif // DEV_ILK
+
+ // Compute top-left corner position to be loaded
+ add (2) gMSGSRC.0<1>:d gMVX_INT<2;2,1>:w -0x02:d {NoDDClr} //
+ mov (1) gMSGSRC.2:ud 0x000c000c:ud {NoDDChk} //
+
+ // Read 16x13 pixels
+ send (8) gudREF(0)<1> mMSGHDRY gMSGSRC<8;8,1>:ud DAPREAD pMSGDSC:ud
+
+#endif
+
+INTERLABEL(EXIT_LOADREF_Y_16x13):
+
+//#endif // !defined(__LOADREF_Y_16x13__)
diff --git a/src/shaders/h264/mc/loadRef_Y_16x9.asm b/src/shaders/h264/mc/loadRef_Y_16x9.asm new file mode 100644 index 00000000..e48151e4 --- /dev/null +++ b/src/shaders/h264/mc/loadRef_Y_16x9.asm @@ -0,0 +1,61 @@ +/*
+ * Load reference 16x9 area for luma 4x4 MC
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: LoadRef_Y_16x9.asm
+//
+// Load reference 16x9 area for luma 4x4 MC
+
+
+//#if !defined(__LOADREF_Y_16x9__) // Make sure this is only included once
+//#define __LOADREF_Y_16x9__
+
+#if 1
+
+ // Compute integer and fractional components of MV
+ and (2) gMVX_FRAC<1>:w r[pMV,0]<2;2,1>:w 0x03:w //{NoDDClr}
+ asr (2) gMVX_INT<1>:w r[pMV,0]<2;2,1>:w 0x02:w //{NoDDChk}
+
+ // Check whether MVY is integer
+ or.z.f0.1 (8) null:w gMVY_FRAC<0;1,0>:w 0:w
+
+ // Set message descriptor
+ (f0.1) add (1) pMSGDSC:ud gMSGDSC_R:ud RESP_LEN(2):ud
+ (-f0.1) add (1) pMSGDSC:ud gMSGDSC_R:ud RESP_LEN(5):ud
+
+ // Compute top-left corner position to be loaded
+ // TODO: sel
+ (-f0.1) add (2) gMSGSRC.0<1>:d gMVX_INT<2;2,1>:w -0x02:d //{NoDDClr}
+ (-f0.1) mov (1) gMSGSRC.2:ud 0x00080008:ud //{NoDDChk}
+ (f0.1) add (1) gMSGSRC.0<1>:d gMVX_INT<0;1,0>:w -0x02:d //{NoDDClr}
+ (f0.1) mov (1) gMSGSRC.1<1>:d gMVY_INT<0;1,0>:w //{NoDDChk,NoDDClr}
+ (f0.1) mov (1) gMSGSRC.2:ud 0x00030008:ud //{NoDDChk}
+
+ // Read 16x9 pixels
+ send (8) gudREF(0)<1> mMSGHDRY gMSGSRC<8;8,1>:ud DAPREAD pMSGDSC:ud
+
+#else
+
+ // Compute integer and fractional components of MV
+ and (2) gMVX_FRAC<1>:w r[pMV,0]<2;2,1>:w 0x03:w {NoDDClr} //
+ asr (2) gMVX_INT<1>:w r[pMV,0]<2;2,1>:w 0x02:w {NoDDChk} //
+
+ // Set message descriptor
+ add (1) pMSGDSC:ud gMSGDSC_R:ud RESP_LEN(5):ud
+
+ // Compute top-left corner position to be loaded
+ add (2) gMSGSRC.0<1>:d gMVX_INT<2;2,1>:w -0x02:d {NoDDClr} //
+ mov (1) gMSGSRC.2:ud 0x00080008:ud {NoDDChk} //
+
+ // Read 16x9 pixels
+ send (8) gudREF(0)<1> mMSGHDRY gMSGSRC<8;8,1>:ud DAPREAD pMSGDSC:ud
+
+#endif
+
+
+//#endif // !defined(__LOADREF_Y_16x9__)
diff --git a/src/shaders/h264/mc/load_Intra_Ref_UV.asm b/src/shaders/h264/mc/load_Intra_Ref_UV.asm new file mode 100644 index 00000000..34adbe6e --- /dev/null +++ b/src/shaders/h264/mc/load_Intra_Ref_UV.asm @@ -0,0 +1,44 @@ +/*
+ * Load all reference U/V samples from neighboring macroblocks
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+#if !defined(__LOAD_INTRA_REF_UV__) // Make sure this is only included once
+#define __LOAD_INTRA_REF_UV__
+
+// Module name: load_Intra_Ref_UV.asm
+//
+// Load all reference U/V samples from neighboring macroblocks
+//
+// Note: Since loading of U/V data always follows writing of Y, the message descriptor is manipulated
+// to avoid recalculating due to frame/field variztions.
+
+// First load top 20x1 row U/V reference samples
+// 4 from macroblock D (actually use 2), 16 from macroblock B
+//
+ shr (1) I_ORIY<1>:w I_ORIY<0;1,0>:w 1:w // Adjust I_ORIY for NV12 format
+ add (2) MSGSRC.0<1>:d I_ORIX<2;2,1>:w TOP_REF_OFFSET<2;2,1>:b {NoDDClr} // Reference samples positioned at (-4, -1)
+ mov (1) MSGSRC.2:ud 0x00000013:ud {NoDDChk} // Block width and height (20x1)
+
+// Update message descriptor based on previous Y block write
+//
+#ifdef DEV_ILK
+ add (1) MSGDSC MSGDSC RESP_LEN(1)+DWBRMSGDSC_RC+DESTUV-DWBWMSGDSC_WC-0x10000000-DESTY:ud // Set message descriptor
+#else
+ add (1) MSGDSC MSGDSC RESP_LEN(1)+DWBRMSGDSC_RC+DESTUV-DWBWMSGDSC_WC-0x00800000-DESTY:ud // Set message descriptor
+#endif // DEV_ILK
+
+ send (8) INTRA_REF_TOP_D(0) MSGHDR MSGSRC<8;8,1>:ud DAPREAD MSGDSC
+
+// Then load left 4x8 reference samples (actually use 1x8 column)
+//
+ add (1) MSGSRC.1<1>:d MSGSRC.1<0;1,0>:d 1:w {NoDDClr} // Reference samples positioned next row
+ mov (1) MSGSRC.2:ud 0x00070003:ud {NoDDChk} // Block width and height (4x8)
+ send (8) INTRA_REF_LEFT_D(0) MSGHDRUV MSGSRC<8;8,1>:ud DAPREAD MSGDSC
+
+// End of load_Intra_Ref_UV
+#endif // !defined(__LOAD_INTRA_REF_UV__)
diff --git a/src/shaders/h264/mc/load_Intra_Ref_Y.asm b/src/shaders/h264/mc/load_Intra_Ref_Y.asm new file mode 100644 index 00000000..de8ec49e --- /dev/null +++ b/src/shaders/h264/mc/load_Intra_Ref_Y.asm @@ -0,0 +1,37 @@ +/*
+ * Load all reference Y samples from neighboring macroblocks
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+#if !defined(__LOAD_INTRA_REF_Y__) // Make sure this is only included once
+#define __LOAD_INTRA_REF_Y__
+
+// Module name: load_Intra_Ref_Y.asm
+//
+// Load all reference Y samples from neighboring macroblocks
+//
+load_Intra_Ref_Y:
+// shl (2) I_ORIX<1>:uw ORIX<2;2,1>:ub 4:w // Convert MB origin to pixel unit
+
+// First load top 28x1 row reference samples
+// 4 from macroblock D (actually use 1), 16 from macroblock B, and 8 from macroblock C
+//
+ add (2) MSGSRC.0<1>:d I_ORIX<2;2,1>:w TOP_REF_OFFSET<2;2,1>:b {NoDDClr} // Reference samples positioned at (-4, -1)
+ mov (1) MSGSRC.2:ud 0x0000001B:ud {NoDDChk} // Block width and height (28x1)
+ add (1) MSGDSC REG_MBAFF_FIELD<0;1,0>:uw RESP_LEN(1)+DWBRMSGDSC_RC+DESTY:ud // Set message descriptor
+ send (8) INTRA_REF_TOP_D(0) MSGHDRY0 MSGSRC<8;8,1>:ud DAPREAD MSGDSC
+
+// Then load left 4x16 reference samples (actually use 1x16 column)
+//
+ add (1) MSGSRC.1<1>:d MSGSRC.1<0;1,0>:d 1:w {NoDDClr} // Reference samples positioned next row
+ mov (1) MSGSRC.2:ud 0x00F0003:ud {NoDDChk} // Block width and height (4x16)
+ add (1) MSGDSC MSGDSC RESP_LEN(1):ud // Need to read 1 more GRF register
+ send (8) INTRA_REF_LEFT_D(0) MSGHDRY1 MSGSRC<8;8,1>:ud DAPREAD MSGDSC
+
+ RETURN
+// End of load_Intra_Ref_Y
+#endif // !defined(__LOAD_INTRA_REF_Y__)
diff --git a/src/shaders/h264/mc/null.g4a b/src/shaders/h264/mc/null.g4a new file mode 100644 index 00000000..f1380297 --- /dev/null +++ b/src/shaders/h264/mc/null.g4a @@ -0,0 +1,43 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Xiang Haihao <haihao.xiang@intel.com> + * + */ +define(`YUV_color',`0xFFFFFFFFUD') +shl(2) g62.0<1>UD g3.4<2,2,1>UB 4UW {align1}; +mov(1) g62.8<1>UD 0x000f000fUD {align1}; +mov(16) m1<1>UD YUV_color {align1 compr}; +mov(16) m3<1>UD YUV_color {align1 compr}; +mov(16) m5<1>UD YUV_color {align1 compr}; +mov(16) m7<1>UD YUV_color {align1 compr}; +send(16) 0 acc0<1>UW g62<8,8,1>UW write(0, 0, 2, 0) mlen 9 rlen 0 {align1}; + +shr(1) g62.4<1>UD g62.4<1,1,1>UD 1UW {align1}; +mov(1) g62.8<1>UD 0x0007000fUD {align1}; +mov(16) m1<1>UD YUV_color {align1 compr}; +mov(16) m3<1>UD YUV_color {align1 compr}; +send(16) 0 acc0<1>UW g62<8,8,1>UW write(1, 0, 2, 0) mlen 5 rlen 0 {align1}; + +send(16) 0 acc0<1>UW g0<8,8,1>UW thread_spawner(0, 0, 0) mlen 1 rlen 0 {align1 EOT}; diff --git a/src/shaders/h264/mc/null.g4b b/src/shaders/h264/mc/null.g4b new file mode 100644 index 00000000..fdd18e6c --- /dev/null +++ b/src/shaders/h264/mc/null.g4b @@ -0,0 +1,13 @@ + { 0x00200009, 0x27c02e21, 0x00450064, 0x00040004 }, + { 0x00000001, 0x27c80061, 0x00000000, 0x000f000f }, + { 0x00802001, 0x20200062, 0x00000000, 0xffffffff }, + { 0x00802001, 0x20600062, 0x00000000, 0xffffffff }, + { 0x00802001, 0x20a00062, 0x00000000, 0xffffffff }, + { 0x00802001, 0x20e00062, 0x00000000, 0xffffffff }, + { 0x00800031, 0x24001d28, 0x008d07c0, 0x05902000 }, + { 0x00000008, 0x27c42c21, 0x002107c4, 0x00010001 }, + { 0x00000001, 0x27c80061, 0x00000000, 0x0007000f }, + { 0x00802001, 0x20200062, 0x00000000, 0xffffffff }, + { 0x00802001, 0x20600062, 0x00000000, 0xffffffff }, + { 0x00800031, 0x24001d28, 0x008d07c0, 0x05502001 }, + { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, diff --git a/src/shaders/h264/mc/null.g4b.gen5 b/src/shaders/h264/mc/null.g4b.gen5 new file mode 100644 index 00000000..7ecb90d5 --- /dev/null +++ b/src/shaders/h264/mc/null.g4b.gen5 @@ -0,0 +1,13 @@ + { 0x00200009, 0x27c02e21, 0x00450064, 0x00040004 }, + { 0x00000001, 0x27c80061, 0x00000000, 0x000f000f }, + { 0x00802001, 0x20200062, 0x00000000, 0xffffffff }, + { 0x00802001, 0x20600062, 0x00000000, 0xffffffff }, + { 0x00802001, 0x20a00062, 0x00000000, 0xffffffff }, + { 0x00802001, 0x20e00062, 0x00000000, 0xffffffff }, + { 0x00800031, 0x24001d28, 0x508d07c0, 0x12082000 }, + { 0x00000008, 0x27c42c21, 0x002107c4, 0x00010001 }, + { 0x00000001, 0x27c80061, 0x00000000, 0x0007000f }, + { 0x00802001, 0x20200062, 0x00000000, 0xffffffff }, + { 0x00802001, 0x20600062, 0x00000000, 0xffffffff }, + { 0x00800031, 0x24001d28, 0x508d07c0, 0x0a082001 }, + { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, diff --git a/src/shaders/h264/mc/recon_C_4x4.asm b/src/shaders/h264/mc/recon_C_4x4.asm new file mode 100644 index 00000000..3a2a921a --- /dev/null +++ b/src/shaders/h264/mc/recon_C_4x4.asm @@ -0,0 +1,37 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: Recon_C_4x4.asm
+//
+// $Revision: 11 $
+// $Date: 10/03/06 5:28p $
+//
+
+
+//#if !defined(__RECON_C_4x4__) // Make sure this is only included once
+//#define __RECON_C_4x4__
+
+
+ // TODO: Use instruction compression
+ add.sat (4) r[pERRORC,0]<2>:ub r[pERRORC,0]<4;4,1>:w gubCPRED(0)<16;4,4>
+ add.sat (4) r[pERRORC,128]<2>:ub r[pERRORC,128]<4;4,1>:w gubCPRED(0,2)<16;4,4>
+ add.sat (4) r[pERRORC,32]<2>:ub r[pERRORC,32]<4;4,1>:w gubCPRED(1)<16;4,4>
+ add.sat (4) r[pERRORC,128+32]<2>:ub r[pERRORC,128+32]<4;4,1>:w gubCPRED(1,2)<16;4,4>
+
+ add.sat (4) r[pERRORC,16]<2>:ub r[pERRORC,16]<4;4,1>:w gubCPRED(0,16)<16;4,4>
+ add.sat (4) r[pERRORC,128+16]<2>:ub r[pERRORC,128+16]<4;4,1>:w gubCPRED(0,18)<16;4,4>
+ add.sat (4) r[pERRORC,48]<2>:ub r[pERRORC,48]<4;4,1>:w gubCPRED(1,16)<16;4,4>
+ add.sat (4) r[pERRORC,128+48]<2>:ub r[pERRORC,128+48]<4;4,1>:w gubCPRED(1,18)<16;4,4>
+
+ // Increase chroma error block offset
+#ifndef MONO
+ add (1) pERRORC:w pERRORC:w 8:w
+#endif
+
+
+//#endif // !defined(__RECON_C_4x4__)
diff --git a/src/shaders/h264/mc/recon_Y_8x8.asm b/src/shaders/h264/mc/recon_Y_8x8.asm new file mode 100644 index 00000000..60177902 --- /dev/null +++ b/src/shaders/h264/mc/recon_Y_8x8.asm @@ -0,0 +1,27 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: Recon_Y_8x8.asm
+//
+// $Revision: 10 $
+// $Date: 9/22/06 2:50p $
+//
+
+
+//#if !defined(__RECON_Y_8x8__) // Make sure this is only included once
+//#define __RECON_Y_8x8__
+
+
+ add.sat (16) r[pERRORY,0]<2>:ub r[pERRORY,0]<16;16,1>:w gubYPRED(0)
+ add.sat (16) r[pERRORY,nGRFWIB]<2>:ub r[pERRORY,nGRFWIB]<16;16,1>:w gubYPRED(1)
+ add.sat (16) r[pERRORY,nGRFWIB*2]<2>:ub r[pERRORY,nGRFWIB*2]<16;16,1>:w gubYPRED(2)
+ add.sat (16) r[pERRORY,nGRFWIB*3]<2>:ub r[pERRORY,nGRFWIB*3]<16;16,1>:w gubYPRED(3)
+
+ add (1) pERRORY:w pERRORY:w 128:w
+
+//#endif // !defined(__RECON_Y_8x8__)
diff --git a/src/shaders/h264/mc/roundShift_C_4x4.asm b/src/shaders/h264/mc/roundShift_C_4x4.asm new file mode 100644 index 00000000..c6091590 --- /dev/null +++ b/src/shaders/h264/mc/roundShift_C_4x4.asm @@ -0,0 +1,26 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: RoundShift_C_4x4.asm
+//
+// Do (...+32)>>6 to 4x4 (NV12 8x4) interpolated chrominance data
+//
+
+
+//#if !defined(__RoundShift_C_4x4__) // Make sure this is only included once
+//#define __RoundShift_C_4x4__
+
+
+ // TODO: Optimize using instruction compression
+ add (16) acc0<1>:w r[pRESULT,0]<16;16,1>:w 32:w
+ add (16) acc1<1>:w r[pRESULT,nGRFWIB]<16;16,1>:w 32:w
+ asr.sat (16) r[pRESULT,0]<2>:ub acc0<16;16,1>:w 6:w
+ asr.sat (16) r[pRESULT,nGRFWIB]<2>:ub acc1<16;16,1>:w 6:w
+
+
+//#endif // !defined(__RoundShift_C_4x4__)
diff --git a/src/shaders/h264/mc/save_16x16_Y.asm b/src/shaders/h264/mc/save_16x16_Y.asm new file mode 100644 index 00000000..713e12c4 --- /dev/null +++ b/src/shaders/h264/mc/save_16x16_Y.asm @@ -0,0 +1,42 @@ +/*
+ * Save decoded Y picture data to frame buffer
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+#if !defined(__SAVE_16X16_Y__) // Make sure this is only included once
+#define __SAVE_16X16_Y__
+
+// Module name: save_16x16_Y.asm
+//
+// Save decoded Y picture data to frame buffer
+//
+
+save_16x16_Y:
+
+ mov (1) MSGSRC.2:ud 0x000F000F:ud {NoDDClr} // Block width and height (16x16)
+ mov (2) MSGSRC.0:ud I_ORIX<2;2,1>:w {NoDDChk} // X, Y offset
+#ifdef DEV_ILK
+ add (1) MSGDSC MSGDSC MSG_LEN(8)+DWBWMSGDSC_WC-DWBRMSGDSC_RC-0x00200000:ud // Set message descriptor
+#else
+ add (1) MSGDSC MSGDSC MSG_LEN(8)+DWBWMSGDSC_WC-DWBRMSGDSC_RC-0x00020000:ud // Set message descriptor
+#endif // DEV_ILK
+
+ mov (1) PDECBUF_UD<1>:ud 0x10001*DECBUF*GRFWIB+0x00400000:ud // Pointers to row 0 and 2 of decoded data
+
+ $for(0,0; <8; 2,4) {
+ mov (32) MSGPAYLOAD(%1)<1> r[PDECBUF, %2*GRFWIB]REGION(16,2) {Compr} // Block Y0/Y2
+ mov (32) MSGPAYLOAD(%1,16)<1> r[PDECBUF, (1+%2)*GRFWIB]REGION(16,2) {Compr} // Block Y1/Y3
+ }
+
+// Update message descriptor based on previous read setup
+//
+ send (8) REG_WRITE_COMMIT_Y<1>:ud MSGHDR MSGSRC<8;8,1>:ud DAPWRITE MSGDSC
+
+ RETURN
+// End of save_16x16_Y
+
+#endif // !defined(__SAVE_16X16_Y__)
diff --git a/src/shaders/h264/mc/save_4x4_Y.asm b/src/shaders/h264/mc/save_4x4_Y.asm new file mode 100644 index 00000000..415034aa --- /dev/null +++ b/src/shaders/h264/mc/save_4x4_Y.asm @@ -0,0 +1,43 @@ +/*
+ * Save Intra_4x4 decoded Y picture data to frame buffer
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+#if !defined(__SAVE_4X4_Y__) // Make sure this is only included once
+#define __SAVE_4X4_Y__
+
+// Module name: save_4x4_Y.asm
+//
+// Save Intra_4x4 decoded Y picture data to frame buffer
+// Note: Each 4x4 block is stored in 1 GRF register in the order of block raster scan order,
+// i.e. 0, 1, 4, 5, 2, 3, 6, 7, 8, 9, 12, 13, 10, 11, 14, 15
+
+save_4x4_Y:
+
+ mov (1) MSGSRC.2:ud 0x000F000F:ud {NoDDClr} // Block width and height (16x16)
+ mov (2) MSGSRC.0:ud I_ORIX<2;2,1>:w {NoDDChk} // X, Y offset
+#ifdef DEV_ILK
+ add (1) MSGDSC MSGDSC MSG_LEN(8)+DWBWMSGDSC_WC-DWBRMSGDSC_RC-0x00200000:ud // Set message descriptor
+#else
+ add (1) MSGDSC MSGDSC MSG_LEN(8)+DWBWMSGDSC_WC-DWBRMSGDSC_RC-0x00020000:ud // Set message descriptor
+#endif // DEV_ILK
+
+ $for(0; <8; 2) {
+ mov (16) MSGPAYLOAD(%1)<1> DEC_Y(%1)<16;4,1>
+ mov (16) MSGPAYLOAD(%1,16)<1> DEC_Y(%1,4)<16;4,1>
+ mov (16) MSGPAYLOAD(%1+1)<1> DEC_Y(%1,8)<16;4,1>
+ mov (16) MSGPAYLOAD(%1+1,16)<1> DEC_Y(%1,12)<16;4,1>
+ }
+
+// Update message descriptor based on previous read setup
+//
+ send (8) REG_WRITE_COMMIT_Y<1>:ud MSGHDR MSGSRC<8;8,1>:ud DAPWRITE MSGDSC
+
+ RETURN
+// End of save_4x4_Y
+
+#endif // !defined(__SAVE_4X4_Y__)
diff --git a/src/shaders/h264/mc/save_8x8_UV.asm b/src/shaders/h264/mc/save_8x8_UV.asm new file mode 100644 index 00000000..aa76af94 --- /dev/null +++ b/src/shaders/h264/mc/save_8x8_UV.asm @@ -0,0 +1,51 @@ +/*
+ * Save decoded U/V picture data to frame buffer
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+#if !defined(__SAVE_8x8_UV__) // Make sure this is only included once
+#define __SAVE_8x8_UV__
+
+// Module name: save_8x8_UV.asm
+//
+// Save decoded U/V picture data to frame buffer
+//
+
+ mov (1) MSGSRC.2:ud 0x0007000F:ud {NoDDClr} // Block width and height (16x8)
+ mov (2) MSGSRC.0<1>:ud I_ORIX<2;2,1>:w {NoDDChk} // I_ORIX has already been adjusted for NV12
+
+// Update message descriptor based on previous read setup
+//
+#ifdef DEV_ILK
+ add (1) MSGDSC MSGDSC MSG_LEN(4)+DWBWMSGDSC_WC-DWBRMSGDSC_RC-0x00100000:ud // Set message descriptor
+#else
+ add (1) MSGDSC MSGDSC MSG_LEN(4)+DWBWMSGDSC_WC-DWBRMSGDSC_RC-0x00010000:ud // Set message descriptor
+#endif // DEV_ILK
+
+// Write U/V picture data
+//
+#ifndef MONO
+ mov MSGPAYLOAD(0,0)<1> DEC_UV(0)REGION(16,2) // U/V row 0
+ mov MSGPAYLOAD(0,16)<1> DEC_UV(1)REGION(16,2) // U/V row 1
+ mov MSGPAYLOAD(1,0)<1> DEC_UV(2)REGION(16,2) // U/V row 2
+ mov MSGPAYLOAD(1,16)<1> DEC_UV(3)REGION(16,2) // U/V row 3
+ mov MSGPAYLOAD(2,0)<1> DEC_UV(4)REGION(16,2) // U/V row 4
+ mov MSGPAYLOAD(2,16)<1> DEC_UV(5)REGION(16,2) // U/V row 5
+ mov MSGPAYLOAD(3,0)<1> DEC_UV(6)REGION(16,2) // U/V row 6
+ mov MSGPAYLOAD(3,16)<1> DEC_UV(7)REGION(16,2) // U/V row 7
+#else // defined(MONO)
+ $for(0; <4; 2) {
+ mov (16) MSGPAYLOADD(%1)<1> 0x80808080:ud {Compr}
+ }
+
+#endif // !defined(MONO)
+
+ send (8) REG_WRITE_COMMIT_UV<1>:ud MSGHDR MSGSRC<8;8,1>:ud DAPWRITE MSGDSC
+
+// End of save_8x8_UV
+
+#endif // !defined(__SAVE_8x8_UV__)
diff --git a/src/shaders/h264/mc/save_8x8_Y.asm b/src/shaders/h264/mc/save_8x8_Y.asm new file mode 100644 index 00000000..3ffca799 --- /dev/null +++ b/src/shaders/h264/mc/save_8x8_Y.asm @@ -0,0 +1,56 @@ +/*
+ * Save Intra_8x8 decoded Y picture data to frame buffer
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+#if !defined(__SAVE_8X8_Y__) // Make sure this is only included once
+#define __SAVE_8X8_Y__
+
+// Module name: save_8x8_Y.asm
+//
+// Save Intra_8x8 decoded Y picture data to frame buffer
+// NotE: Every 4 rows of Y data are interleaved with the horizontal neighboring blcok
+//
+save_8x8_Y:
+
+ mov (1) MSGSRC.2:ud 0x000F000F:ud {NoDDClr} // Block width and height (16x16)
+ mov (2) MSGSRC.0:ud I_ORIX<2;2,1>:w {NoDDChk} // X, Y offset
+
+// Update message descriptor based on previous read setup
+//
+#ifdef DEV_ILK
+ add (1) MSGDSC MSGDSC MSG_LEN(8)+DWBWMSGDSC_WC-DWBRMSGDSC_RC-0x00200000:ud // Set message descriptor
+#else
+ add (1) MSGDSC MSGDSC MSG_LEN(8)+DWBWMSGDSC_WC-DWBRMSGDSC_RC-0x00020000:ud // Set message descriptor
+#endif // DEV_ILK
+
+ mov (16) MSGPAYLOAD(0)<1> DEC_Y(0)<32;8,1>
+ mov (16) MSGPAYLOAD(0,16)<1> DEC_Y(0,8)<32;8,1>
+ mov (16) MSGPAYLOAD(1,0)<1> DEC_Y(0,16)<32;8,1>
+ mov (16) MSGPAYLOAD(1,16)<1> DEC_Y(0,24)<32;8,1>
+
+ mov (16) MSGPAYLOAD(2)<1> DEC_Y(2)<32;8,1>
+ mov (16) MSGPAYLOAD(2,16)<1> DEC_Y(2,8)<32;8,1>
+ mov (16) MSGPAYLOAD(3,0)<1> DEC_Y(2,16)<32;8,1>
+ mov (16) MSGPAYLOAD(3,16)<1> DEC_Y(2,24)<32;8,1>
+
+ mov (16) MSGPAYLOAD(4)<1> DEC_Y(4)<32;8,1>
+ mov (16) MSGPAYLOAD(4,16)<1> DEC_Y(4,8)<32;8,1>
+ mov (16) MSGPAYLOAD(5,0)<1> DEC_Y(4,16)<32;8,1>
+ mov (16) MSGPAYLOAD(5,16)<1> DEC_Y(4,24)<32;8,1>
+
+ mov (16) MSGPAYLOAD(6)<1> DEC_Y(6)<32;8,1>
+ mov (16) MSGPAYLOAD(6,16)<1> DEC_Y(6,8)<32;8,1>
+ mov (16) MSGPAYLOAD(7,0)<1> DEC_Y(6,16)<32;8,1>
+ mov (16) MSGPAYLOAD(7,16)<1> DEC_Y(6,24)<32;8,1>
+
+ send (8) REG_WRITE_COMMIT_Y<1>:ud MSGHDR MSGSRC<8;8,1>:ud DAPWRITE MSGDSC
+
+ RETURN
+// End of save_8x8_Y
+
+#endif // !defined(__SAVE_8X8_Y__)
diff --git a/src/shaders/h264/mc/save_I_PCM.asm b/src/shaders/h264/mc/save_I_PCM.asm new file mode 100644 index 00000000..77be35e8 --- /dev/null +++ b/src/shaders/h264/mc/save_I_PCM.asm @@ -0,0 +1,56 @@ +/*
+ * Save I_PCM Y samples to Y picture buffer
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: save_I_PCM.asm
+//
+// First save I_PCM Y samples to Y picture buffer
+//
+ mov (1) MSGSRC.2:ud 0x000F000F:ud {NoDDClr} // Block width and height (16x16)
+ shl (2) MSGSRC.0:ud ORIX<2;2,1>:ub 4:w {NoDDChk} // Convert MB origin in pixel unit
+
+ add (1) MSGDSC REG_MBAFF_FIELD<0;1,0>:uw MSG_LEN(8)+DWBWMSGDSC_WC+DESTY:ud // Set message descriptor
+
+ $for(0; <8; 2) {
+ mov (32) MSGPAYLOAD(%1)<1> I_PCM_Y(%1)REGION(16,1) {Compr,NoDDClr}
+ mov (32) MSGPAYLOAD(%1,16)<1> I_PCM_Y(%1,16)REGION(16,1) {Compr,NoDDChk}
+ }
+
+ send (8) REG_WRITE_COMMIT_Y<1>:ud MSGHDR MSGSRC<8;8,1>:ud DAPWRITE MSGDSC
+
+// Then save I_PCM U/V samples to U/V picture buffer
+//
+ mov (1) MSGHDR.2:ud 0x0007000F:ud {NoDDClr} // Block width and height (16x8)
+ asr (1) MSGHDR.1:ud MSGSRC.1<0;1,0>:ud 1:w {NoDDChk} // Y offset should be halved
+ add (1) MSGDSC MSGDSC 0x0-MSG_LEN(4)+0x1:d // Set message descriptor for U/V
+
+#if 0
+ and.z.f0.0 (1) NULLREG REG_CHROMA_FORMAT_IDC CHROMA_FORMAT_IDC:ud
+ (f0.0) jmpi (1) MONOCHROME_I_PCM
+#endif
+
+#ifndef MONO
+// Non-monochrome picture
+//
+ $for(0,0; <4; 2,1) {
+ mov (16) MSGPAYLOAD(%1)<2> I_PCM_UV(%2)REGION(16,1) // U data
+ mov (16) MSGPAYLOAD(%1,1)<2> I_PCM_UV(%2+2)REGION(16,1) // V data
+ mov (16) MSGPAYLOAD(%1+1)<2> I_PCM_UV(%2,16)REGION(16,1) // U data
+ mov (16) MSGPAYLOAD(%1+1,1)<2> I_PCM_UV(%2+2,16)REGION(16,1) // V data
+ }
+#else // defined(MONO)
+MONOCHROME_I_PCM:
+ $for(0; <4; 2) {
+ mov (16) MSGPAYLOADD(%1)<1> 0x80808080:ud {Compr}
+ }
+
+#endif // !defined(MONO)
+
+ send (8) REG_WRITE_COMMIT_UV<1>:ud MSGHDR null:ud DAPWRITE MSGDSC
+
+// End of save_I_PCM
diff --git a/src/shaders/h264/mc/scoreboard.asm b/src/shaders/h264/mc/scoreboard.asm new file mode 100644 index 00000000..6fb41cf0 --- /dev/null +++ b/src/shaders/h264/mc/scoreboard.asm @@ -0,0 +1,282 @@ +/*
+ * Dependency control scoreboard kernel
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: scoreboard.asm
+//
+// Dependency control scoreboard kernel
+//
+// $Revision: 16 $
+// $Date: 10/18/06 4:10p $
+//
+
+// ----------------------------------------------------
+// Main: scoreboard
+// ----------------------------------------------------
+// ----------------------------------------------------
+// Scoreboard structure
+// ----------------------------------------------------
+//
+// 1 DWORD per thread
+//
+// Bit 31: "Checking" thread, i.e. an intra MB that sends "check dependency" message
+// Bit 30: "Completed" thread. This bit set by an "update" message from intra/inter MB.
+// Bits 29:28: Must set to 0
+// Bits 27:24: EUID
+// Bits 23:18: Reserved
+// Bits 17:16: TID
+// Bits 15:8: X offset of current MB
+// Bits 15:5: Reserved
+// Bits 4:0: 5 bits of available neighbor MB flags
+
+.kernel scoreboard
+SCOREBOARD:
+
+#ifdef _DEBUG
+// WA for FULSIM so we'll know which kernel is being debugged
+mov (1) acc0:ud 0xf0aa55a5:ud
+#endif
+
+#include "header.inc"
+#include "scoreboard_header.inc"
+
+//
+// Now, begin source code....
+//
+
+.code
+
+#ifdef AS_ENABLED
+ and.z.f0.1 (1) NULLREG r0.2<0;1,0>:ud TH_RES // Is this a restarted thread previously interrupted?
+ (f0.1) jmpi (1) Scoreboard_Init
+
+ #include "scoreboard_restore_AS.asm"
+
+ jmpi (1) Scoreboard_OpenGW
+Scoreboard_Init:
+#endif // End AS_ENABLED
+
+// Scoreboard must be initialized to 0xc000ffff, meaning all "completed"
+// And it also avoids message mis-handling for the first MB
+ $for(0; <32; 2) {
+ mov (16) CMD_SB(%1)<1> 0xc000ffff:ud {Compr}
+ }
+#ifdef DOUBLE_SB // Scoreboard size needs to be doubled
+ $for(32; <64; 2) {
+ mov (16) CMD_SB(%1)<1> 0xc000ffff:ud {Compr}
+ }
+#endif // DOUBLE_SB
+
+//----------------------------------------------------------
+// Open message gateway for the scoreboard thread
+//
+// RegBase = r4 (0x04)
+// Gateway Size = 64 GRF registers (0x6)
+// Dispatch ID = r0.20:ub
+// Scoreboard Thread Key = 0
+//----------------------------------------------------------
+Scoreboard_OpenGW:
+ mov (8) MSGHDRY0<1>:ud 0x00000000:ud // Initialize message header payload with 0
+
+ // Send a message with register base RegBase=0x04(r4) and Gateway size = 0x6 = 64 GRF reg and Key = 0
+ // 000 00000100 00000 00000 110 00000000 ==> 0000 0000 1000 0000 0000 0110 0000 0000
+#ifdef AS_ENABLED
+ add (1) MSGHDRY0.5<1>:ud r0.20:ub 0x00800700:ud // Allocate 128 GRFs for message gateway - for SIP to send notification MSG
+#else
+ #ifdef DOUBLE_SB
+ add (1) MSGHDRY0.5<1>:ud r0.20:ub 0x00800600:ud // 64 GRF's for CTG-B
+ #else
+ add (1) MSGHDRY0.5<1>:ud r0.20:ub 0x00800500:ud // 32 GRF's for CTG-A
+ #endif // DOUBLE_SB
+#endif
+ send (8) NULLREG MSGHDRY0 null:ud MSG_GW OGWMSGDSC
+
+//------------------------------------------------------------------------
+// Send Thread Spawning Message to start dispatching macroblock threads
+//
+//------------------------------------------------------------------------
+#ifdef AS_ENABLED
+ mov (8) acc0<1>:ud CMD_SB(31)<8;8,1> // Ensure scoreboard data have been completely restored
+#endif // End AS_ENABLED
+ mov (8) MSGHDRY1<1>:ud r0<8;8,1>:ud // Initialize message header payload with R0
+ mov (1) MSGHDRY1.4<1>:ud 0x00000400:ud // Dispatch URB length = 1
+
+ send (8) NULLREG MSGHDRY1 null:ud TS TSMSGDSC
+
+ mov (8) MSGHDRY0<1>:ud 0x00000000:ud // Initialize message header payload with 0
+
+//------------------------------------------------------------------------
+// Scoreboard control data initialization
+//------------------------------------------------------------------------
+#ifdef AS_ENABLED
+ or (1) cr0.1:ud cr0.1:ud AS_INT_EN // Enable interrupt
+ (f0.1) jmpi (1) Scoreboard_State_Init // Jump if not restarted thread
+
+ // Restore scoreboard kernel control data to r1 - r3
+ mov (1) m4.1:ud 64:ud // Starting r1
+ mov (1) m4.2:ud 0x0002001f:ud // for 3 registers
+ send (8) r1.0<1>:ud m4 null:ud DWBRMSGDSC_SC+0x00030000+AS_SAVE // Restore r1 - r3
+ mov (8) a0.0<1>:uw AR_SAVE<8;8,1>:uw // Restore all address registers
+
+// Check whether all MBs have been decoded
+ cmp.e.f0.0 (1) NULLREG TotalMB<0;1,0>:w 0:w // Set "Last MB" flag
+ (-f0.0) jmpi (1) Before_First_MB
+ END_THREAD
+
+// Check whether it is before the first MB
+Before_First_MB:
+ cmp.e.f0.0 (1) NULLREG AVAILFLAGD<1>:ud 0x08020401:ud // in ACBD order
+ (f0.0) jmpi (1) Wavefront_Walk
+
+Scoreboard_State_Init:
+#endif // End AS_ENABLED
+ mov (2) WFLen_B<2>:w HEIGHTINMB_1<0;1,0>:w
+ mov (1) AVAILFLAGD<1>:ud 0x08020401:ud // in ACBD order
+ mov (1) CASE00PTR<1>:ud Notify_MSG_IP-No_Message_IP:ud // Inter kernel starts
+ mov (1) CASE10PTR<1>:ud Dependency_Check_IP-No_Message_IP:ud // Intra kernel starts
+#ifdef AS_ENABLED
+ mov (1) CASE11PTR<1>:ud 0:ud // No message
+#else
+ mov (1) CASE11PTR<1>:ud MB_Loop_IP-No_Message_IP:ud // No message
+#endif // End AS_ENABLED
+ mov (1) StartXD<1>:ud 0:ud
+ mov (1) NewWFOffsetD<1>:ud 0x01ffff00:ud
+
+ mov (4) WFStart(0)<1> 0xffff:w
+ mov (1) WFStart(0)<1> 0:w
+
+ mov (8) a0.0<1>:uw 0x0:uw // Initialize all pointers to 0
+
+//------------------------------------------------------------------------
+// Scoreboard message handling loop
+//------------------------------------------------------------------------
+//
+Scoreboard_Loop:
+ // Calculate current wavefront length
+ add.ge.f0.1 (16) acc0<1>:w StartX<0;1,0>:w 0:w // Used for x>2*y check
+ mac.g.f0.0 (16) NULLREGW WFLenY<0;1,0>:w -2:w // X - 2*Y > 0 ??
+ (f0.0) mov (1) WFLen<1>:w WFLenY<0;1,0>:w // Use smaller vertical wavefront length
+ (-f0.0) asr.sat (1) WFLen<1>:uw StartX<0;1,0>:w 1:w // Horizontal wavefront length is smaller
+
+ // Initialize 5-MB group
+#ifdef ONE_MB_WA
+ mov (2) MBINDEX(0)<1> WFStart(0)<2;2,1>
+ (f0.1) add (4) MBINDEX(0,2)<1> WFStart(0,1)<4;4,1> -1:w
+ (-f0.1) add (4) MBINDEX(0,2)<1> WFStart(0,0)<4;4,1> -1:w
+ (-f0.1) mov (1) StartX<1>:w 0:w // WA for 1-MB wide pictures
+#else
+ mov (2) MBINDEX(0)<1> WFStart(0)<2;2,1> {NoDDClr}
+ add (4) MBINDEX(0,2)<1> WFStart(0,1)<4;4,1> -1:w {NoDDChk}
+#endif
+
+ // Update WFStart
+ mov (8) acc0<1>:w WFStart(0)<0;1,0> // Move WFStart(0) to acc0 to remove dependency later
+ mov (4) WFStart(0,1)<1> WFStart(0)<4;4,1> {NoDDClr} // Shift WFStart(0:2) to WFStart(1:3)
+ add (1) WFStart(0)<1> acc0.0<0;1,0>:w WFLen<0;1,0>:w {NoDDChk} // WFStart(0) = WFStart(0) + WFLen
+
+ mul (8) MBINDEX(0)<1> MBINDEX(0)<8;8,1> 4:w // Adjust MB order # to be DWORD aligned
+ and (1) DEPPTR<1>:uw acc0<0;1,0>:w SB_MASK*4:uw {NoDDClr} // Wrap around scoreboard entries for current MB
+ and (4) DEPPTRL<1>:uw acc0.1<4;4,1>:w SB_MASK*4:uw {NoDDChk} // Wrap around scoreboard entries for neighbor MBs
+
+Wavefront_Walk:
+ wait n0:ud
+// Check for combined "checking" or "completed" threads in forwarded message
+// 2 MSB of scoreboard message indicate:
+// 0b00 = "inter start" message
+// 0b10 = "intra start" message
+// 0b11 = "No Message" or "inter complete" message
+// 0b01 = Reserved (should never occur)
+//
+MB_Loop:
+ shr (1) PMSGSEL<1>:uw r[CMDPTR,CMD_SB_REG_OFF*GRFWIB+2]<0;1,0>:uw 12:w // DWORD aligned pointer to message handler
+ and.nz.f0.1 (4) NULLREG r[CMDPTR,CMD_SB_REG_OFF*GRFWIB]<0;1,0>:ub AVAILFLAG<4;4,1>:ub // f0.1 4 LSB will have the available flags in ACBD order
+ mov (1) MSGHDRY0.4<1>:ud r[CMDPTR,CMD_SB_REG_OFF*GRFWIB]<0;1,0>:ud // Copy MB thread info from scoreboard
+ jmpi (1) r[PMSGSEL, INLINE_REG_OFF*GRFWIB+16]<0;1,0>:d
+
+// Now determine whether this is "inter done" or "no message"
+// through checking debug_counter
+//
+No_Message:
+#ifdef AS_ENABLED
+ cmp.z.f0.1 (1) NULLREG n0:ud 0 // Are all messages handled?
+ and.z.f0.0 (1) NULLREG cr0.1:ud AS_INT // Poll interrupt bit
+ (-f0.1) jmpi (1) MB_Loop // Continue polling the remaining message from current thread
+
+// All messages have been handled
+ (f0.0) jmpi (1) Wavefront_Walk // No interrupt occurs. Wait for next one
+
+// Interrupt has been detected
+// Save all contents and terminate the scoreboard
+//
+ #include "scoreboard_save_AS.asm"
+
+ // Save scoreboard control data as well
+ //
+ mov (8) AR_SAVE<1>:uw a0.0<8;8,1>:uw // All address registers needs to be saved
+ mov (1) MSGHDR.1:ud 64:ud
+ mov (1) MSGHDR.2:ud 0x0002001f:ud // for 3 registers
+ $for(0; <3; 1) {
+ mov (8) MSGPAYLOADD(%1)<1> CMD_SB(%1-3)REGION(8,1)
+ }
+ send (8) NULLREG MSGHDR null:ud DWBWMSGDSC+0x00300000+AS_SAVE // Save r1 - r3
+
+ send (8) NULLREG MSGHDR r0:ud EOTMSGDSC+TH_INT // Terminate with "Thread Interrupted" bit set
+#endif // End AS_ENABLED
+
+Dependency_Check:
+// Current thread is "checking" but not "completed" (0b10 case).
+// Check for dependency clear using all availability bits
+//
+ (f0.1) and.z.f0.1 (4) NULLREG r[DEPPTRL,CMD_SB_REG_OFF*GRFWIB+3]<1,0>:ub DONEFLAG:uw // f0.1 4 LSB contains dependency clear
+ (f0.1.any4h) jmpi (1) Dependency_Check // Dependency not clear, keep polling..
+
+// "Checking" thread and dependency cleared, send a message to let the thread go
+//
+Notify_MSG:
+ send (8) NULLREG MSGHDRY0 null:ud MSG_GW FWDMSGDSC+NOTIFYMSG
+
+// Current macroblock has been serviced. Update to next macroblock in special zig-zag order
+//
+Update_CurMB:
+#if 0
+ add.ge.f0.0 (1) WFLen<1>:w WFLen<0;1,0>:w -1:w // Set "End of wavefront" flag
+ add (1) TotalMB<1>:w TotalMB<0;1,0>:w -1:w // Decrement "TotalMB"
+#else
+ add.ge.f0.0 (2) TotalMB<2>:w TotalMB<4;2,2>:w -1:w // Set "End of wavefront" flag and decrement "TotalMB"
+#endif
+ add (8) MBINDEX(0)<1> MBINDEX(0)<8;8,1> 4:w // Increment MB indices
+ and (1) DEPPTR<1>:uw acc0<0;1,0>:w SB_MASK*4:uw {NoDDClr} // Wrap around 256 scoreboard entries for current MB
+ and (4) DEPPTRL<1>:uw acc0.1<4;4,1>:w SB_MASK*4:uw {NoDDChk} // Wrap around 256 scoreboard entries for neighbor MBs
+ cmp.e.f0.1 (16) NULLREGW StartX<0;1,0>:uw WIDTHINMB_1<0;1,0>:uw // Set "on picture right boundary" flag
+#if 0
+ (f0.0) jmpi (1) Wavefront_Walk // Continue wavefront walking
+#else
+ (f0.0.all2h) jmpi (1) Wavefront_Walk // Continue wavefront walking
+#endif
+
+// Start new wavefront
+//
+ cmp.e.f0.0 (1) NULLREG TotalMB<0;1,0>:w 0:w // Set "Last MB" flag
+ (f0.1) add (4) WFLen<1>:w WFLen<4;4,1>:w NewWFOffset<4;4,1>:b
+ (f0.1) add (4) WFStart(0)<1> WFStart(0)<4;4,1> 1:w
+ (-f0.1) add (1) StartX<1>:w StartX<0;1,0>:w 1:w // Move to right MB
+ (-f0.1) add (1) WFStart(0)<1> WFStart(0)<0;1,0> 1:w
+
+ (-f0.0) jmpi (1) Scoreboard_Loop // Not last MB, start new wavefront walking
+
+// All MBs have decoded. Terminate the thread now
+//
+ END_THREAD
+
+#if !defined(COMBINED_KERNEL) // For standalone kernel only
+.end_code
+
+.end_kernel
+#endif
+
+// End of scoreboard
diff --git a/src/shaders/h264/mc/scoreboard_MBAFF.asm b/src/shaders/h264/mc/scoreboard_MBAFF.asm new file mode 100644 index 00000000..02a49d8d --- /dev/null +++ b/src/shaders/h264/mc/scoreboard_MBAFF.asm @@ -0,0 +1,299 @@ +/*
+ * Dependency control scoreboard kernel for MBAFF frame
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: scoreboard_MBAFF.asm
+//
+// Dependency control scoreboard kernel for MBAFF frame
+//
+// $Revision: 16 $
+// $Date: 10/18/06 4:10p $
+//
+
+// ----------------------------------------------------
+// Main: scoreboard_MBAFF
+// ----------------------------------------------------
+// ----------------------------------------------------
+// Scoreboard structure
+// ----------------------------------------------------
+//
+// 1 DWORD per thread
+//
+// Bit 31: "Checking" thread, i.e. an intra MB that sends "check dependency" message
+// Bit 30: "Completed" thread. This bit set by an "update" message from intra/inter MB.
+// Bits 29:28: Must set to 0
+// Bits 27:24: EUID
+// Bits 23:18: Reserved
+// Bits 17:16: TID
+// Bits 15:8: X offset of current MB
+// Bits 15:5: Reserved
+// Bits 4:0: 5 bits of available neighbor MB flags
+
+.kernel scoreboard_MBAFF
+SCOREBOARD_MBAFF:
+
+#ifdef _DEBUG
+// WA for FULSIM so we'll know which kernel is being debugged
+mov (1) acc0:ud 0xffaa55a5:ud
+#endif
+
+#include "header.inc"
+#include "scoreboard_header.inc"
+
+//
+// Now, begin source code....
+//
+
+.code
+
+#ifdef AS_ENABLED
+ and.z.f0.1 (1) NULLREG r0.2<0;1,0>:ud TH_RES // Is this a restarted thread previously interrupted?
+ (f0.1) jmpi (1) MBAFF_Scoreboard_Init
+
+ #include "scoreboard_restore_AS.asm"
+
+ jmpi (1) MBAFF_Scoreboard_OpenGW
+MBAFF_Scoreboard_Init:
+#endif // End AS_ENABLED
+
+// Scoreboard must be initialized to 0xc000ffff, meaning all "completed"
+// And it also avoids message mis-handling for the first MB
+ $for(0; <32; 2) {
+ mov (16) CMD_SB(%1)<1> 0xc000ffff:ud {Compr}
+ }
+#ifdef DOUBLE_SB // Scoreboard size needs to be doubled
+ $for(32; <64; 2) {
+ mov (16) CMD_SB(%1)<1> 0xc000ffff:ud {Compr}
+ }
+#endif // DOUBLE_SB
+
+//----------------------------------------------------------
+// Open message gateway for the scoreboard thread
+//
+// RegBase = r4 (0x04)
+// Gateway Size = 64 GRF registers (0x6)
+// Dispatch ID = r0.20:ub
+// Scoreboard Thread Key = 0
+//----------------------------------------------------------
+MBAFF_Scoreboard_OpenGW:
+ mov (8) MSGHDRY0<1>:ud 0x00000000:ud // Initialize message header payload with 0
+
+ // Send a message with register base RegBase=0x04(r4) and Gateway size = 0x6 = 64 GRF reg and Key = 0
+ // 000 00000100 00000 00000 110 00000000 ==> 0000 0000 1000 0000 0000 0110 0000 0000
+#ifdef AS_ENABLED
+ add (1) MSGHDRY0.5<1>:ud r0.20:ub 0x00800700:ud // Allocate 128 GRFs for message gateway - for SIP to send notification MSG
+#else
+ #ifdef DOUBLE_SB
+ add (1) MSGHDRY0.5<1>:ud r0.20:ub 0x00800600:ud // 64 GRF's for CTG-B
+ #else
+ add (1) MSGHDRY0.5<1>:ud r0.20:ub 0x00800500:ud // 32 GRF's for CTG-A
+ #endif // DOUBLE_SB
+#endif
+
+ send (8) NULLREG MSGHDRY0 null:ud MSG_GW OGWMSGDSC
+
+//------------------------------------------------------------------------
+// Send Thread Spawning Message to start dispatching macroblock threads
+//
+//------------------------------------------------------------------------
+#ifdef AS_ENABLED
+ mov (8) acc0<1>:ud CMD_SB(31)<8;8,1> // Ensure scoreboard data have been completely restored
+#endif // End AS_ENABLED
+ mov (8) MSGHDRY1<1>:ud r0<8;8,1>:ud // Initialize message header payload with R0
+ mov (1) MSGHDRY1.4<1>:ud 0x00000400:ud // Dispatch URB length = 1
+
+ send (8) NULLREG MSGHDRY1 null:ud TS TSMSGDSC
+
+ mov (8) MSGHDRY0<1>:ud 0x00000000:ud // Initialize message header payload with 0
+
+//------------------------------------------------------------------------
+// Scoreboard control data initialization
+//------------------------------------------------------------------------
+#ifdef AS_ENABLED
+ or (1) cr0.1:ud cr0.1:ud AS_INT_EN // Enable interrupt
+ (f0.1) jmpi (1) MBAFF_Scoreboard_State_Init // Jump if not restarted thread
+
+ // Restore scoreboard kernel control data to r1 - r3
+ mov (1) m4.1:ud 64:ud // Starting r1
+ mov (1) m4.2:ud 0x0002001f:ud // for 3 registers
+ send (8) r1.0<1>:ud m4 null:ud DWBRMSGDSC_SC+0x00030000+AS_SAVE // Restore r1 - r3
+ and (1) CMDPTR<1>:uw MBINDEX(0)<0;1,0> SB_MASK*4:uw // Restore scoreboard entries for current MB
+
+// EOT if all MBs have been decoded
+ cmp.e.f0.0 (1) NULLREG TotalMB<0;1,0>:w 0:w // Set "Last MB" flag
+ (-f0.0) jmpi (1) MBAFF_Before_First_MB
+ END_THREAD
+
+// Check whether it is before the first MB
+MBAFF_Before_First_MB:
+ cmp.e.f0.0 (1) NULLREG AVAILFLAGD<1>:ud 0x08020401:ud // in ACBD order
+ (f0.0) jmpi (1) MBAFF_Wavefront_Walk
+
+MBAFF_Scoreboard_State_Init:
+#endif // End AS_ENABLED
+ mov (2) WFLen_B<2>:w HEIGHTINMB_1<0;1,0>:w
+ mov (1) AVAILFLAGD<1>:ud 0x08020401:ud // in ACBD order
+ mov (1) AVAILFLAG1D<1>:ud 0x08020410:ud // in A_C_B_D_ order
+ mov (1) CASE00PTR<1>:ud MBAFF_Notify_MSG_IP-MBAFF_No_Message_IP:ud // Inter kernel starts
+ mov (1) CASE10PTR<1>:ud MBAFF_Dependency_Check_IP-MBAFF_No_Message_IP:ud // Intra kernel starts
+#ifdef AS_ENABLED
+ mov (1) CASE11PTR<1>:ud 0:ud // No message
+#else
+ mov (1) CASE11PTR<1>:ud MBAFF_MB_Loop_IP-MBAFF_No_Message_IP:ud // No message
+#endif // End AS_ENABLED
+ mov (1) StartXD<1>:ud 0:ud
+ mov (1) NewWFOffsetD<1>:ud 0x01ffff00:ud
+
+ mov (8) WFStart_T(0)<1> 0xffff:w
+ mov (1) WFStart_T(0)<1> 0:w
+
+ mov (8) a0.0<1>:uw 0x0:uw // Initialize all pointers to 0
+
+//------------------------------------------------------------------------
+// Scoreboard message handling loop
+//------------------------------------------------------------------------
+//
+MBAFF_Scoreboard_Loop:
+// Calculate current wavefront length (same for top and bottom MB wavefronts)
+ add.ge.f0.1 (16) acc0<1>:w StartX<0;1,0>:w 0:w // Used for x>2*y check
+ mac.g.f0.0 (16) NULLREGW WFLenY<0;1,0>:w -2:w // X - 2*Y > 0 ??
+ (f0.0) mov (2) WFLen_B<1>:w WFLenY<0;1,0>:w // Use smaller vertical wavefront length
+ (f0.0) mov (1) WFLen_Save<1>:w WFLenY<0;1,0>:w // Save current wave front length
+ (-f0.0) asr.sat (2) WFLen_B<1>:uw StartX<0;1,0>:w 1:w // Horizontal wavefront length is smaller
+ (-f0.0) asr.sat (1) WFLen_Save<1>:uw StartX<0;1,0>:w 1:w // Save current wave front length
+
+// Initialize 9-MB group for top macroblock wavefront
+#ifdef ONE_MB_WA_MBAFF
+ mov (2) MBINDEX(0)<1> WFStart_T(0)<2;2,1>
+ (f0.1) add (4) MBINDEX(0,2)<1> WFStart_B(0,1)<4;4,1> -1:w
+ (-f0.1) add (4) MBINDEX(0,2)<1> WFStart_B(0,0)<4;4,1> -1:w
+ mov (1) MBINDEX(0,5)<1> WFStart_B(0,1)<0;1,0>
+ (-f0.1) mov (1) StartX<1>:w 0:w // WA for 1-MB wide pictures
+#else
+ mov (2) MBINDEX(0)<1> WFStart_T(0)<2;2,1> {NoDDClr}
+ add (4) MBINDEX(0,2)<1> WFStart_B(0,1)<4;4,1> -1:w {NoDDChk,NoDDClr}
+ mov (1) MBINDEX(0,5)<1> WFStart_B(0,1)<0;1,0> {NoDDChk,NoDDClr}
+ add (4) MBINDEX(0,6)<1> WFStart_T(0,1)<4;4,1> -1:w {NoDDChk} // Upper MB group (C_B_D_x)
+#endif
+
+// Update WFStart_B[0]
+ add (8) acc0<1>:w WFLen<0;1,0>:w 1:w // WFLen + 1
+ add (1) WFStart_B(0,0)<1> acc0<0;1,0>:w WFStart_T(0,0)<0;1,0> // WFStart_T[0] + WFLen + 1
+
+MBAFF_Start_Wavefront:
+ mul (16) MBINDEX(0)<1> MBINDEX(0)REGION(16,1) 4:w // Adjust MB order # to be DWORD aligned
+ and (1) CMDPTR<1>:uw acc0<0;1,0>:w SB_MASK*4:uw // Wrap around scoreboard entries for current MB
+
+MBAFF_Wavefront_Walk:
+ wait n0:ud
+
+// Check for combined "checking" or "completed" threads in forwarded message
+// 2 MSB of scoreboard message indicate:
+// 0b00 = "inter start" message
+// 0b10 = "intra start" message
+// 0b11 = "No Message" or "inter complete" message
+// 0b01 = Reserved (should never occur)
+//
+MBAFF_MB_Loop:
+ shr (1) PMSGSEL<1>:uw r[CMDPTR,CMD_SB_REG_OFF*GRFWIB+2]<0;1,0>:uw 12:w // DWORD aligned pointer to message handler
+ and.nz.f0.1 (8) NULLREG r[CMDPTR,CMD_SB_REG_OFF*GRFWIB]<0;1,0>:ub AVAILFLAG<8;8,1>:ub // f0.1 8 LSB will have the available flags in ACBDA_C_B_D_ order
+ mov (1) MSGHDRY0.4<1>:ud r[CMDPTR,CMD_SB_REG_OFF*GRFWIB]<0;1,0>:ud // Copy MB thread info from scoreboard
+ jmpi (1) r[PMSGSEL, INLINE_REG_OFF*GRFWIB+16]<0;1,0>:d
+
+// Now determine whether this is "inter done" or "no message"
+// through checking debug_counter
+//
+MBAFF_No_Message:
+#ifdef AS_ENABLED
+ cmp.z.f0.1 (1) NULLREG n0:ud 0 // Are all messages handled?
+ and.z.f0.0 (1) NULLREG cr0.1:ud AS_INT // Poll interrupt bit
+ (-f0.1) jmpi (1) MBAFF_MB_Loop // Continue polling the remaining message from current thread
+
+// All messages have been handled
+ (f0.0) jmpi (1) MBAFF_Wavefront_Walk // No interrupt occurs. Wait for next one
+
+// Interrupt has been detected
+// Save all contents and terminate the scoreboard
+//
+ #include "scoreboard_save_AS.asm"
+
+ // Save scoreboard control data as well
+ //
+ mov (1) MSGHDR.1:ud 64:ud
+ mov (1) MSGHDR.2:ud 0x0002001f:ud // for 3 registers
+ $for(0; <3; 1) {
+ mov (8) MSGPAYLOADD(%1)<1> CMD_SB(%1-3)REGION(8,1)
+ }
+ send (8) NULLREG MSGHDR null:ud DWBWMSGDSC+0x00300000+AS_SAVE // Save r1 - r3
+
+ send (8) NULLREG MSGHDR r0:ud EOTMSGDSC+TH_INT // Terminate with "Thread Interrupted" bit set
+#endif // End AS_ENABLED
+
+MBAFF_Dependency_Check:
+// Current thread is "checking" but not "completed" (0b10 case).
+// Check for dependency clear using all availability bits
+//
+ and (8) DEPPTR<1>:uw MBINDEX(0,1)REGION(8,1) SB_MASK*4:uw // Wrap around scoreboard entries for current MB
+MBAFF_Dependency_Polling:
+ (f0.1) and.z.f0.1 (8) NULLREG r[DEPPTR,CMD_SB_REG_OFF*GRFWIB+3]<1,0>:ub DONEFLAG:uw // f0.1 8 LSB contains dependency clear
+ (f0.1.any8h) jmpi (1) MBAFF_Dependency_Polling // Dependency not clear, keep polling..
+
+// "Checking" thread and dependency cleared, send a message to let the thread go
+//
+MBAFF_Notify_MSG:
+ send (8) NULLREG MSGHDRY0 null:ud MSG_GW FWDMSGDSC+NOTIFYMSG
+
+// Current macroblock has been serviced. Update to next macroblock in special zig-zag order
+//
+MBAFF_Update_CurMB:
+ add.ge.f0.0 (2) TotalMB<2>:w TotalMB<4;2,2>:w -1:w // Set "End of wavefront" flag and decrement "TotalMB"
+ add (16) MBINDEX(0)<1> MBINDEX(0)REGION(16,1) 4:w // Increment MB indices
+ and (1) CMDPTR<1>:uw acc0<0;1,0>:w SB_MASK*4:uw // Wrap around scoreboard entries for current MB
+ (f0.0.all2h) jmpi (1) MBAFF_Wavefront_Walk // Continue wavefront walking
+
+// Top macroblock wavefront walk done, start bottom MB wavefront
+ add.ge.f0.0 (1) WFLen<1>:w WFLen_B<0;1,0>:w 0:w {NoDDClr} // Set bottom MB wavefront length
+ mov (1) WFLen_B<1>:w -1:w {NoDDChk} // Reset bottom MB wavefront length
+
+// Initialize 9-MB group for bottom macroblock wavefront
+ mov (8) MBINDEX(0)<1> WFStart_B(0)<1;4,0> {NoDDClr} // Initialize with WFStart_B[0] and WFStart_B[1]
+ mov (4) MBINDEX(0,1)<1> WFStart_T(0,1)<0;1,0> {NoDDChk,NoDDClr} // Initialize with WFStart_T[1]
+ mov (2) MBINDEX(0,2)<1> WFStart_T(0)<0;1,0> {NoDDChk,NoDDClr} // Initialize with WFStart_T[0]
+ add (4) MBINDEX(0,6)<1> WFStart_B(0,1)<4;4,1> -1:w {NoDDChk} // Upper MB group (C_B_D_x)
+
+ (f0.0) jmpi (1) MBAFF_Start_Wavefront // Start bottom MB wavefront walk
+
+// Start new wavefront
+//
+ cmp.e.f0.1 (16) NULLREGW StartX<0;1,0>:uw WIDTHINMB_1<0;1,0>:uw // Set "on picture right boundary" flag
+
+ // Update WFStart_T and WFStart_B
+ add (8) acc0<1>:w WFStart_T(0)REGION(1,0) 1:w // Move WFStart_T[0]+1 to acc0 to remove dependency later
+ mov (8) WFStart_T(0,1)<1> WFStart_T(0)<8;8,1> {NoDDClr} // Shift WFStart_T(B)[0:2] to WFStart_T(B)[1:3]
+ mac (1) WFStart_T(0,0)<1> WFLen_Save<0;1,0>:w 2:w {NoDDChk} // WFStart_T[0] = WFStart_T[0] + 2*WFLen
+
+ cmp.e.f0.0 (1) NULLREG TotalMB<0;1,0>:w 0:w // Set "Last MB" flag
+
+ (f0.1) add (4) WFLen<1>:w WFLen<4;4,1>:w NewWFOffset<4;4,1>:b // + (0, -1, -1, 1)
+ (f0.1) add (8) WFStart_T(0)<1> WFStart_T(0)REGION(4,1) 1:w
+ (-f0.1) add (1) StartX<1>:w StartX<0;1,0>:w 1:w // Move to right MB
+ (-f0.1) add (1) WFStart_T(0)<1> WFStart_T(0)REGION(1,0) 1:w
+
+ (-f0.0) jmpi (1) MBAFF_Scoreboard_Loop // Not last MB, start new wavefront walking
+
+// All MBs have decoded. Terminate the thread now
+//
+ END_THREAD
+
+#if !defined(COMBINED_KERNEL) // For standalone kernel only
+.end_code
+
+.end_kernel
+#endif
+
+// End of scoreboard_MBAFF
diff --git a/src/shaders/h264/mc/scoreboard_restore_AS.asm b/src/shaders/h264/mc/scoreboard_restore_AS.asm new file mode 100644 index 00000000..7d953302 --- /dev/null +++ b/src/shaders/h264/mc/scoreboard_restore_AS.asm @@ -0,0 +1,54 @@ +/*
+ * Restore previously stored scoreboard data after content switching back
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: scoreboard_restore_AS.asm
+//
+// Restore previously stored scoreboard data after content switching back
+//
+//
+ // Restore scoreboard data to r4 - r67
+ // They are saved in a 2D surface with width of 32 and height of 80.
+ // Each row corresponds to one GRF register in the following order
+ // r4 - r67 : Scoreboard message
+ //
+ mov (8) MSGSRC<1>:ud r0.0<8;8,1>:ud {NoDDClr} // Initialize message header payload with r0
+
+ mov (2) MSGSRC.0:ud 0:ud {NoDDClr, NoDDChk} // Starting r4
+ mov (1) MSGSRC.2:ud 0x0007001f:ud {NoDDChk} // for 8 registers
+ send (8) CMD_SB(0)<1> m1 MSGSRC<8;8,1>:ud DWBRMSGDSC_SC+0x00080000+AS_SAVE // Restore r4 - r11
+
+ mov (8) m2:ud MSGSRC<8;8,1>:ud
+ mov (1) m2.1:ud 8:ud
+ send (8) CMD_SB(8)<1> m2 null:ud DWBRMSGDSC_SC+0x00080000+AS_SAVE // Restore r12 - r19
+
+ mov (8) m3:ud MSGSRC<8;8,1>:ud
+ mov (1) m3.1:ud 16:ud
+ send (8) CMD_SB(16)<1> m3 null:ud DWBRMSGDSC_SC+0x00080000+AS_SAVE // Restore r20 - r27
+
+ mov (8) m4:ud MSGSRC<8;8,1>:ud
+ mov (1) m4.1:ud 24:ud
+ send (8) CMD_SB(24)<1> m4 null:ud DWBRMSGDSC_SC+0x00080000+AS_SAVE // Restore r28 - r35
+
+ mov (8) m5:ud MSGSRC<8;8,1>:ud
+ mov (1) m5.1:ud 32:ud
+ send (8) CMD_SB(32)<1> m5 null:ud DWBRMSGDSC_SC+0x00080000+AS_SAVE // Restore r36 - r43
+
+ mov (8) m6:ud MSGSRC<8;8,1>:ud
+ mov (1) m6.1:ud 40:ud
+ send (8) CMD_SB(40)<1> m6 null:ud DWBRMSGDSC_SC+0x00080000+AS_SAVE // Restore r44 - r51
+
+ mov (8) m7:ud MSGSRC<8;8,1>:ud
+ mov (1) m7.1:ud 48:ud
+ send (8) CMD_SB(48)<1> m7 null:ud DWBRMSGDSC_SC+0x00080000+AS_SAVE // Restore r52 - r59
+
+ mov (8) m8:ud MSGSRC<8;8,1>:ud
+ mov (1) m8.1:ud 56:ud
+ send (8) CMD_SB(56)<1> m8 null:ud DWBRMSGDSC_SC+0x00080000+AS_SAVE // Restore r60 - r67
+
+// End of scoreboard_restore_AS
diff --git a/src/shaders/h264/mc/scoreboard_save_AS.asm b/src/shaders/h264/mc/scoreboard_save_AS.asm new file mode 100644 index 00000000..13abe0e7 --- /dev/null +++ b/src/shaders/h264/mc/scoreboard_save_AS.asm @@ -0,0 +1,72 @@ +/*
+ * Save scoreboard data before content switching
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Module name: scoreboard_save_AS.asm
+//
+// Save scoreboard data before content switching
+//
+//
+ // r1 - r35 need to be saved
+ // They are saved in a 2D surface with width of 32 and height of 64.
+ // Each row corresponds to one GRF register in the following order
+ // r4 - r35 : Scoreboard message
+ // r1 - r3 : Scoreboard kernel control data
+
+ mov (8) MSGHDR<1>:ud r0.0<8;8,1>:ud // Initialize message header payload with r0
+ mov (1) MSGHDR.2:ud 0x0007001f:ud // for 8 registers
+
+ mov (2) MSGHDR.0:ud 0:ud
+ $for(0; <8; 2) {
+ mov (16) MSGPAYLOADD(%1)<1> CMD_SB(%1)REGION(8,1) {Compr}
+ }
+ send (8) NULLREG MSGHDR null:ud DWBWMSGDSC+0x00800000+AS_SAVE // Save r4 - r11
+
+ mov (1) MSGHDR.1:ud 8:ud
+ $for(0; <8; 2) {
+ mov (16) MSGPAYLOADD(%1)<1> CMD_SB(%1+8)REGION(8,1) {Compr}
+ }
+ send (8) NULLREG MSGHDR null:ud DWBWMSGDSC+0x00800000+AS_SAVE // Save r12 - r19
+
+ mov (1) MSGHDR.1:ud 16:ud
+ $for(0; <8; 2) {
+ mov (16) MSGPAYLOADD(%1)<1> CMD_SB(%1+16)REGION(8,1) {Compr}
+ }
+ send (8) NULLREG MSGHDR null:ud DWBWMSGDSC+0x00800000+AS_SAVE // Save r20 - r27
+
+ mov (1) MSGHDR.1:ud 24:ud
+ $for(0; <8; 2) {
+ mov (16) MSGPAYLOADD(%1)<1> CMD_SB(%1+24)REGION(8,1) {Compr}
+ }
+ send (8) NULLREG MSGHDR null:ud DWBWMSGDSC+0x00800000+AS_SAVE // Save r28 - r35
+
+ mov (1) MSGHDR.1:ud 32:ud
+ $for(0; <8; 2) {
+ mov (16) MSGPAYLOADD(%1)<1> CMD_SB(%1+32)REGION(8,1) {Compr}
+ }
+ send (8) NULLREG MSGHDR null:ud DWBWMSGDSC+0x00800000+AS_SAVE // Save r36 - r43
+
+ mov (1) MSGHDR.1:ud 40:ud
+ $for(0; <8; 2) {
+ mov (16) MSGPAYLOADD(%1)<1> CMD_SB(%1+40)REGION(8,1) {Compr}
+ }
+ send (8) NULLREG MSGHDR null:ud DWBWMSGDSC+0x00800000+AS_SAVE // Save r44 - r51
+
+ mov (1) MSGHDR.1:ud 48:ud
+ $for(0; <8; 2) {
+ mov (16) MSGPAYLOADD(%1)<1> CMD_SB(%1+48)REGION(8,1) {Compr}
+ }
+ send (8) NULLREG MSGHDR null:ud DWBWMSGDSC+0x00800000+AS_SAVE // Save r52 - r59
+
+ mov (1) MSGHDR.1:ud 56:ud
+ $for(0; <8; 2) {
+ mov (16) MSGPAYLOADD(%1)<1> CMD_SB(%1+56)REGION(8,1) {Compr}
+ }
+ send (8) NULLREG MSGHDR null:ud DWBWMSGDSC+0x00800000+AS_SAVE // Save r60 - r67
+
+// End of scoreboard_save_AS
diff --git a/src/shaders/h264/mc/scoreboard_sip.asm b/src/shaders/h264/mc/scoreboard_sip.asm new file mode 100644 index 00000000..6330ea16 --- /dev/null +++ b/src/shaders/h264/mc/scoreboard_sip.asm @@ -0,0 +1,34 @@ +/*
+ * Scoreboard interrupt handler
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: scoreboard_sip.asm
+//
+// scoreboard interrupt handler
+//
+// Simply send a notification message to scoreboard thread
+
+ mov (8) m0<1>:ud 0x00000000:ud // Initialize message header payload with 0
+#ifdef DOUBLE_SB
+ mov (1) m0.5<1>:ud 0x08000200:ud // Message length = 1 DWORD, sent to GRF offset 64 registers
+#else
+ mov (1) m0.5<1>:ud 0x04000200:ud // Message length = 1 DWORD, sent to GRF offset 32 registers
+#endif
+ send (8) null<1>:ud m0 null:ud 0x03108002 // Send notification message to scoreboard kernel
+
+ and (1) cr0.1:ud cr0.1:ud 0x00800000 // Clear preempt exception bit
+ and (1) cr0.0:ud cr0.0:ud 0x7fffffff:ud // Exit SIP routine
+ nop // Required by B-spec
+
+.end_code
+
+
+
+
+
+
diff --git a/src/shaders/h264/mc/scoreboard_start_inter.asm b/src/shaders/h264/mc/scoreboard_start_inter.asm new file mode 100644 index 00000000..831b8419 --- /dev/null +++ b/src/shaders/h264/mc/scoreboard_start_inter.asm @@ -0,0 +1,47 @@ +/*
+ * Scoreboard function for starting inter prediction kernels
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+#if !defined(__SCOREBOARD_START_INTER__)
+#define __SCOREBOARD_START_INTER__
+//
+// Module name: scoreboard_start_inter.asm
+//
+// Scoreboard function for starting inter prediction kernels
+// This function is only used by inter prediction kernels to send message to
+// scoreboard in order to announce the inter kernel has started
+//
+// $Revision: 5 $
+// $Date: 10/18/06 4:11p $
+//
+scoreboard_start_inter:
+
+// First open message gateway since intra kernels need wake-up message to resume
+//
+ mov (8) MSGHDRY0<1>:ud 0x00000000:ud // Initialize message header payload with 0
+
+ // Send a message with register base RegBase = r0 (0x0) and Size = 0x0
+ // 000 00000000 00000 00000 000 00000000 ==> 0000 0000 0000 0000 0000 0000 0000 0000
+ // ---------------------------------------------------------------------------------
+ send (8) NULLREG MSGHDRY0 null:ud MSG_GW OGWMSGDSC
+
+// Derive the scoreboard location where the inter thread writes to
+//
+ mov (8) MSGHDRY1<1>:ud 0x00000000:ud // Initialize message header payload with 0
+
+ // Compose M0.5:ud
+ #include "set_SB_offset.asm"
+
+ // Compose M0.0:ud, i.e. message payload
+ or (1) MSGHDRY1.1<1>:uw sr0.0<0;1,0>:uw 0x0000:uw // Set EUID/TID bits + inter start bit
+
+ send (8) NULLREG MSGHDRY1 null:ud MSG_GW FWDMSGDSC+NOTIFYMSG // Send "Inter start" message to scoreboard kernel
+
+ RETURN
+
+#endif // !defined(__SCOREBOARD_START_INTER__)
diff --git a/src/shaders/h264/mc/scoreboard_start_intra.asm b/src/shaders/h264/mc/scoreboard_start_intra.asm new file mode 100644 index 00000000..6d6d9164 --- /dev/null +++ b/src/shaders/h264/mc/scoreboard_start_intra.asm @@ -0,0 +1,52 @@ +/*
+ * Scoreboard function for starting intra prediction kernels
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+#if !defined(__SCOREBOARD_START_INTRA__)
+#define __SCOREBOARD_START_INTRA__
+//
+// Module name: scoreboard_start_intra.asm
+//
+// Scoreboard function for starting intra prediction kernels
+// This function is only used by intra prediction kernels to send message to
+// scoreboard in order to check dependency clearance
+//
+// $Revision: 5 $
+// $Date: 10/18/06 4:11p $
+//
+scoreboard_start_intra:
+
+// First open message gateway since intra kernels need wake-up message to resume
+//
+ mov (8) MSGHDRY0<1>:ud 0x00000000:ud // Initialize message header payload with 0
+
+ // Send a message with register base RegBase = r0 (0x0) and Size = 0x0
+ // 000 00000000 00000 00000 000 00000000 ==> 0000 0000 0000 0000 0000 0000 0000 0000
+ // ---------------------------------------------------------------------------------
+ and (1) MSGHDRY0.8<1>:uw REG_INTRA_PRED_AVAIL_FLAG_BYTE<0;1,0>:ub 0x1f:uw // Set lower word of key
+ send (8) NULLREG MSGHDRY0 null:ud MSG_GW OGWMSGDSC
+
+// Send "check dependency" message to scoreboard thread
+// --------------------------
+
+// Derive the scoreboard location where the intra thread writes to
+//
+ mov (8) MSGHDRY1<1>:ud 0x00000000:ud // Initialize message header payload with 0
+
+ // Compose M0.5:ud
+ #include "set_SB_offset.asm"
+
+ // Compose M0.0:ud, i.e. message payload
+ and (1) MSGHDRY1.0<1>:uw REG_INTRA_PRED_AVAIL_FLAG_BYTE<0;1,0>:ub 0x1f:uw // Set lower word of message
+ or (1) MSGHDRY1.1<1>:uw sr0.0<0;1,0>:uw 0x8000:uw // Set EUID/TID bits + intra start bit
+
+ send (8) NULLREG MSGHDRY1 null:ud MSG_GW FWDMSGDSC+NOTIFYMSG // Send "Intra start" message to scoreboard kernel
+
+ RETURN
+
+#endif // !defined(__SCOREBOARD_START_INTRA__)
diff --git a/src/shaders/h264/mc/scoreboard_update.asm b/src/shaders/h264/mc/scoreboard_update.asm new file mode 100644 index 00000000..f519e4a6 --- /dev/null +++ b/src/shaders/h264/mc/scoreboard_update.asm @@ -0,0 +1,41 @@ +/*
+ * Scoreboard update function for decoding kernels
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+//
+// Module name: scoreboard_update.asm
+//
+// Scoreboard update function for decoding kernels
+//
+// This module is used by decoding kernels to send message to scoreboard to update the
+// "complete" status, thus the dependency of the MB can be cleared.
+//
+// $Revision: 6 $
+// $Date: 10/16/06 5:19p $
+//
+ mov (8) MSGHDRY1<1>:ud 0x00000000:ud // Initialize message header payload with 0
+
+ // Compose M0.5:ud information
+ add (1) MSGHDRY1.10<1>:uw r0.20:ub 0x0200:uw // Message length = 1 DWORD
+ and (1) MSGHDRY1.11<1>:uw M05_STORE<0;1,0>:uw SB_MASK*4:uw // Retrieve stored value and wrap around scoreboard
+
+ or (1) MSGHDRY1.0<1>:ud M05_STORE<0;1,0>:uw 0xc0000000:ud // Set "Completed" bits
+
+#ifndef BSDRESET_ENABLE
+#ifdef INTER_KERNEL
+ mov (1) gREG_WRITE_COMMIT_Y<1>:ud gREG_WRITE_COMMIT_Y<0;1,0>:ud // Make sure Y write is committed
+ mov (1) gREG_WRITE_COMMIT_UV<1>:ud gREG_WRITE_COMMIT_UV<0;1,0>:ud // Make sure U/V write is committed
+#else
+ mov (1) REG_WRITE_COMMIT_Y<1>:ud REG_WRITE_COMMIT_Y<0;1,0>:ud // Make sure Y write is committed
+ mov (1) REG_WRITE_COMMIT_UV<1>:ud REG_WRITE_COMMIT_UV<0;1,0>:ud // Make sure U/V write is committed
+#endif // INTER_KERNEL
+#endif // BSDRESET_ENABLE
+
+ send (8) NULLREG MSGHDRY1 null:ud MSG_GW FWDMSGDSC
+
+// End of scoreboard_update
diff --git a/src/shaders/h264/mc/set_SB_offset.asm b/src/shaders/h264/mc/set_SB_offset.asm new file mode 100644 index 00000000..0b166e43 --- /dev/null +++ b/src/shaders/h264/mc/set_SB_offset.asm @@ -0,0 +1,26 @@ +/*
+ * Common module to set offset into the scoreboard
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+//
+// Module name: set_SB_offset.asm
+//
+// Common module to set offset into the scoreboard
+// Note: This is to encapsulate the way M0.5:ud in ForwardMsg is filled.
+//
+// $Revision: 2 $
+// $Date: 10/16/06 5:19p $
+//
+ add (1) MSGHDRY1.10<1>:uw r0.20:ub 0x0200:uw // Message length = 1 DWORD
+
+ add (16) acc0<1>:w r0.12<0;1,0>:uw -LEADING_THREAD:w // 0-based thread count derived from r0.6:ud
+ shl (1) M05_STORE<1>:uw acc0<0;1,0>:uw 0x2:uw // Store for future "update" use, in DWORD unit
+ and (16) acc0<1>:w acc0<16;16,1>:uw SB_MASK:uw // Wrap around scoreboard
+ shl (1) MSGHDRY1.11<1>:uw acc0<0;1,0>:uw 0x2:uw // Convert to DWORD offset
+
+// End of set_SB_offset
\ No newline at end of file diff --git a/src/shaders/h264/mc/weightedPred.asm b/src/shaders/h264/mc/weightedPred.asm new file mode 100644 index 00000000..76525f99 --- /dev/null +++ b/src/shaders/h264/mc/weightedPred.asm @@ -0,0 +1,140 @@ +/*
+ * Weighted prediction of luminance and chrominance
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: WeightedPred.asm
+//
+// Weighted prediction of luminance and chrominance
+//
+
+
+//#if !defined(__WeightedPred__) // Make sure this is only included once
+//#define __WeightedPred__
+
+
+ and.z.f0.0 (1) gWEIGHTFLAG:w gWPREDFLAG:ub nWBIDIR_MASK:w
+ cmp.e.f0.1 (1) null:w gPREDFLAG:w 2:w
+ (-f0.0) jmpi INTERLABEL(WeightedPred)
+ (f0.1) jmpi INTERLABEL(DefaultWeightedPred_BiPred)
+
+INTERLABEL(DefaultWeightedPred_UniPred):
+
+ cmp.e.f0.0 (1) null:w gPREDFLAG:w 0:w
+ (f0.0) jmpi INTERLABEL(Return_WeightedPred)
+
+ // luma
+ mov (32) gubYPRED(0)<2> gubINTPY1(0) {Compr}
+ mov (32) gubYPRED(2)<2> gubINTPY1(2) {Compr}
+
+#ifndef MONO
+ // chroma
+ mov (32) gubCPRED(0)<2> gubINTPC1(0) {Compr}
+#endif
+
+ jmpi INTERLABEL(Return_WeightedPred)
+
+INTERLABEL(DefaultWeightedPred_BiPred):
+
+ // luma
+ avg.sat (32) gubYPRED(0)<2> gubINTPY0(0) gubINTPY1(0) {Compr}
+ avg.sat (32) gubYPRED(2)<2> gubINTPY0(2) gubINTPY1(2) {Compr}
+
+#ifndef MONO
+ // chroma
+ avg.sat (32) gubCPRED(0)<2> gubINTPC0(0) gubINTPC1(0) {Compr}
+#endif
+
+ jmpi INTERLABEL(Return_WeightedPred)
+
+INTERLABEL(WeightedPred):
+ cmp.e.f0.1 (1) null:w gWEIGHTFLAG:w 0x80:w
+ (-f0.1) jmpi INTERLABEL(WeightedPred_Explicit)
+
+ cmp.e.f0.0 (1) null:w gPREDFLAG:w 2:w
+ (-f0.0) jmpi INTERLABEL(DefaultWeightedPred_UniPred)
+
+ mov (2) gYADD<1>:w 32:w {NoDDClr}
+ mov (2) gYSHIFT<1>:w 6:w {NoDDChk}
+ mov (4) gOFFSET<1>:w 0:w
+ mov (8) gWT0<2>:w r[pWGT,0]<0;2,1>:w
+
+ jmpi INTERLABEL(WeightedPred_LOOP)
+
+ // Explicit Prediction
+INTERLABEL(WeightedPred_Explicit):
+
+ // WA for weighted prediction - 2007/09/06
+#ifdef SW_W_128 // CTG SW WA
+ cmp.e.f0.1 (8) null:ud r[pWGT,0]<8;8,1>:uw gudW128(0)<0;1,0>
+#else // ILK HW solution
+ and.ne.f0.1 (8) null:uw r[pWGT,12]<0;1,0>:ub 0x88848421:v // Expand W=128 flag to all components. 2 MSB are don't care
+#endif
+ asr.nz.f0.0 (2) gBIPRED<1>:w gPREDFLAG<0;1,0>:w 1:w
+ asr (1) gWEIGHTFLAG:w gWEIGHTFLAG:w 6:w
+ (-f0.0) mov (2) gPREDFLAG1<1>:w gPREDFLAG<0;1,0>:w
+ (f0.0) mov (2) gPREDFLAG0<1>:ud 0x00010001:ud
+ (-f0.0) add (2) gPREDFLAG0<1>:w -gPREDFLAG1<2;2,1>:w 1:w
+
+ // WA for weighted prediction - 2007/09/06
+ (f0.1) mov (8) gWT0<1>:ud 0x00000080:ud
+ (-f0.1) mov (8) gWT0<2>:w r[pWGT,0]<16;8,2>:b
+ (-f0.1) mov (8) gO0<2>:w r[pWGT,1]<16;8,2>:b
+ mul (16) gWT0<1>:w gWT0<16;16,1>:w gPREDFLAG0<0;4,1>:w
+
+ // Compute addition
+ cmp.e.f0.1 (2) null<1>:w gYWDENOM<2;2,1>:ub 0:w
+ (-f0.1) shl (2) gW0<1>:w gWEIGHTFLAG<0;1,0>:w gYWDENOM<2;2,1>:ub
+ (f0.1) mov (2) gW0<1>:w 0:w
+ (-f0.1) asr (2) gW0<1>:w gW0<2;2,1>:w 1:w
+ shl (2) gYADD<1>:w gW0<2;2,1>:w gBIPRED<0;1,0>:w
+ (f0.1) add (2) gYADD<1>:w gYADD<2;2,1>:w gBIPRED<0;1,0>:w
+
+ // Compute shift
+ add (2) gYSHIFT<1>:w gYWDENOM<2;2,1>:ub gBIPRED<0;1,0>:w
+
+ // Compute offset
+ add (4) acc0<1>:w gO0<16;4,4>:w gO1<16;4,4>:w
+ add (4) acc0<1>:w acc0<4;4,1>:w gBIPRED<0;1,0>:w
+ asr (4) gOFFSET<1>:w acc0<4;4,1>:w gBIPRED<0;1,0>:w
+
+INTERLABEL(WeightedPred_LOOP):
+ // luma
+ $for(0;<4;2) {
+ mul (16) acc0<1>:w gubINTPY0(%1) gWT0<0;1,0>:w
+ mul (16) acc1<1>:w gubINTPY0(%1+1) gWT0<0;1,0>:w
+ mac (16) acc0<1>:w gubINTPY1(%1) gWT1<0;1,0>:w
+ mac (16) acc1<1>:w gubINTPY1(%1+1) gWT1<0;1,0>:w
+ add (16) acc0<1>:w acc0<16;16,1>:w gYADD:w
+ add (16) acc1<1>:w acc1<16;16,1>:w gYADD:w
+ // Accumulator cannot be used as destination for ASR
+ asr (16) gwINTERIM_BUF3(0)<1> acc0<16;16,1>:w gYSHIFT:w
+ asr (16) gwINTERIM_BUF3(1)<1> acc1<16;16,1>:w gYSHIFT:w
+ add.sat (16) gubYPRED(%1)<2> gwINTERIM_BUF3(0) gOFFSET:w
+ add.sat (16) gubYPRED(%1+1)<2> gwINTERIM_BUF3(1) gOFFSET:w
+ }
+
+#ifndef MONO
+ // chroma
+ mul (16) acc0<1>:w gubINTPC0(0) gUW0<0;2,4>:w
+ mul (16) acc1<1>:w gubINTPC0(1) gUW0<0;2,4>:w
+ mac (16) acc0<1>:w gubINTPC1(0) gUW1<0;2,4>:w
+ mac (16) acc1<1>:w gubINTPC1(1) gUW1<0;2,4>:w
+ add (16) acc0<1>:w acc0<16;16,1>:w gCADD:w
+ add (16) acc1<1>:w acc1<16;16,1>:w gCADD:w
+ // Accumulator cannot be used as destination for ASR
+ asr (16) gwINTERIM_BUF3(0)<1> acc0<16;16,1>:w gCSHIFT:w
+ asr (16) gwINTERIM_BUF3(1)<1> acc1<16;16,1>:w gCSHIFT:w
+ add.sat (16) gubCPRED(0)<2> gwINTERIM_BUF3(0) gUOFFSET<0;2,1>:w
+ add.sat (16) gubCPRED(1)<2> gwINTERIM_BUF3(1) gUOFFSET<0;2,1>:w
+#endif
+
+
+INTERLABEL(Return_WeightedPred):
+
+
+//#endif // !defined(__WeightedPred__)
diff --git a/src/shaders/h264/mc/writeRecon_C_8x4.asm b/src/shaders/h264/mc/writeRecon_C_8x4.asm new file mode 100644 index 00000000..be7585eb --- /dev/null +++ b/src/shaders/h264/mc/writeRecon_C_8x4.asm @@ -0,0 +1,46 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: WriteRecon_C_8x4.asm
+//
+// $Revision: 10 $
+// $Date: 10/03/06 5:28p $
+//
+
+
+//#if !defined(__WRITERECON_C_8x4__) // Make sure this is only included once
+//#define __WRITERECON_C_8x4__
+
+
+ // TODO: Why did I use p0?
+#ifndef MONO
+ add (1) p0:w pERRORC:w -16:w
+ mov (16) mbMSGPAYLOADC(0,0)<2> r[p0,0]<32;16,2>:ub {NoDDClr}
+ mov (16) mbMSGPAYLOADC(0,1)<2> r[p0,128]<32;16,2>:ub {NoDDChk}
+ mov (16) mbMSGPAYLOADC(1,0)<2> r[p0,32]<32;16,2>:ub {NoDDClr}
+ mov (16) mbMSGPAYLOADC(1,1)<2> r[p0,128+32]<32;16,2>:ub {NoDDChk}
+#else // defined(MONO)
+ mov (16) mbMSGPAYLOADC(0)<1> 0x80808080:ud {Compr}
+#endif // !defined(MONO)
+
+ #if defined(MBAFF)
+ add (1) pMSGDSC:ud gFIELDFLAGS:uw MSG_LEN(2)+nDWBWMSGDSC+nBDIX_DESTC+ENWRCOM:ud
+ #elif defined(FIELD)
+ add (1) pMSGDSC:ud gFIELDFLAGS:uw MSG_LEN(2)+nDWBWMSGDSC_TF+nBDIX_DESTC+ENWRCOM:ud
+ #endif
+
+ asr (1) gMSGSRC.1:d gMSGSRC.1:d 1:w {NoDDClr}
+ mov (1) gMSGSRC.2:ud 0x0003000f:ud {NoDDChk} // NV12 (16x4)
+
+#if defined(FRAME)
+ send (8) gREG_WRITE_COMMIT_UV<1>:ud mMSGHDRCW gMSGSRC<8;8,1>:ud DAPWRITE MSG_LEN(2)+nDWBWMSGDSC+nBDIX_DESTC+ENWRCOM
+#else
+ send (8) gREG_WRITE_COMMIT_UV<1>:ud mMSGHDRCW gMSGSRC<8;8,1>:ud DAPWRITE pMSGDSC:ud
+#endif // defined(FRAME)
+
+//#endif // !defined(__WRITERECON_C_8x4__)
diff --git a/src/shaders/h264/mc/writeRecon_YC.asm b/src/shaders/h264/mc/writeRecon_YC.asm new file mode 100644 index 00000000..ff84aff1 --- /dev/null +++ b/src/shaders/h264/mc/writeRecon_YC.asm @@ -0,0 +1,79 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: WriteRecon_YC.asm
+//
+// $Revision: 10 $
+// $Date: 10/03/06 5:28p $
+//
+
+
+//#if !defined(__WRITERECON_YC__) // Make sure this is only included once
+//#define __WRITERECON_YC__
+
+ // TODO: Merge two inst to one.
+ mov (1) p0:w nOFFSET_ERRORY:w
+ mov (1) p1:w nOFFSET_ERRORY+128:w
+
+ $for(0; <4; 1) {
+ mov (16) mbMSGPAYLOADY(%1,0)<1> r[p0,%1*32+0]<8,2>:ub {NoDDClr}
+ mov (16) mbMSGPAYLOADY(%1,16)<1> r[p0,%1*32+16]<8,2>:ub {NoDDChk}
+ }
+ $for(0; <4; 1) {
+ mov (16) mbMSGPAYLOADY(%1+4,0)<1> r[p0,%1*32+256]<8,2>:ub {NoDDClr}
+ mov (16) mbMSGPAYLOADY(%1+4,16)<1> r[p0,%1*32+16+256]<8,2>:ub {NoDDChk}
+ }
+
+
+ #if defined(MBAFF)
+ add (1) pMSGDSC:ud gFIELDFLAGS:uw MSG_LEN(8)+nDWBWMSGDSC+nBDIX_DESTY+ENWRCOM:ud
+ #elif defined(FIELD)
+ add (1) pMSGDSC:ud gFIELDFLAGS:uw MSG_LEN(8)+nDWBWMSGDSC_TF+nBDIX_DESTY+ENWRCOM:ud
+ #endif
+
+ mov (2) gMSGSRC.0<1>:d gX<2;2,1>:w {NoDDClr}
+ mov (1) gMSGSRC.2:ud 0x000f000f:ud {NoDDChk}
+
+#if defined(FRAME)
+ send (8) gREG_WRITE_COMMIT_Y<1>:ud mMSGHDRYW gMSGSRC<8;8,1>:ud DAPWRITE MSG_LEN(8)+nDWBWMSGDSC+nBDIX_DESTY+ENWRCOM
+#else
+ send (8) gREG_WRITE_COMMIT_Y<1>:ud mMSGHDRYW gMSGSRC<8;8,1>:ud DAPWRITE pMSGDSC:ud
+#endif
+
+#ifndef MONO
+ // TODO: Why did I use p0?
+ mov (1) p0:w nOFFSET_ERRORC:w
+ mov (16) mbMSGPAYLOADC(0,0)<2> r[p0,0]<32;16,2>:ub {NoDDClr}
+ mov (16) mbMSGPAYLOADC(0,1)<2> r[p0,128]<32;16,2>:ub {NoDDChk}
+ mov (16) mbMSGPAYLOADC(1,0)<2> r[p0,32]<32;16,2>:ub {NoDDClr}
+ mov (16) mbMSGPAYLOADC(1,1)<2> r[p0,128+32]<32;16,2>:ub {NoDDChk}
+ mov (16) mbMSGPAYLOADC(2,0)<2> r[p0,64]<32;16,2>:ub {NoDDClr}
+ mov (16) mbMSGPAYLOADC(2,1)<2> r[p0,128+64]<32;16,2>:ub {NoDDChk}
+ mov (16) mbMSGPAYLOADC(3,0)<2> r[p0,96]<32;16,2>:ub {NoDDClr}
+ mov (16) mbMSGPAYLOADC(3,1)<2> r[p0,128+96]<32;16,2>:ub {NoDDChk}
+
+
+ #if defined(MBAFF)
+ add (1) pMSGDSC:ud gFIELDFLAGS:uw MSG_LEN(4)+nDWBWMSGDSC+nBDIX_DESTC+ENWRCOM:ud
+ #elif defined(FIELD)
+ add (1) pMSGDSC:ud gFIELDFLAGS:uw MSG_LEN(4)+nDWBWMSGDSC_TF+nBDIX_DESTC+ENWRCOM:ud
+ #endif
+
+ asr (1) gMSGSRC.1:d gMSGSRC.1:d 1:w {NoDDClr}
+ mov (1) gMSGSRC.2:ud 0x0007000f:ud {NoDDChk} // NV12 (16x4)
+
+#if defined(FRAME)
+ send (8) gREG_WRITE_COMMIT_UV<1>:ud mMSGHDRCW gMSGSRC<8;8,1>:ud DAPWRITE MSG_LEN(4)+nDWBWMSGDSC+nBDIX_DESTC+ENWRCOM
+#else
+ send (8) gREG_WRITE_COMMIT_UV<1>:ud mMSGHDRCW gMSGSRC<8;8,1>:ud DAPWRITE pMSGDSC:ud
+#endif // defined(FRAME)
+
+#endif // !defined(MONO)
+
+
+//#endif // !defined(__WRITERECON_YC__)
diff --git a/src/shaders/h264/mc/writeRecon_Y_16x8.asm b/src/shaders/h264/mc/writeRecon_Y_16x8.asm new file mode 100644 index 00000000..509a2ec2 --- /dev/null +++ b/src/shaders/h264/mc/writeRecon_Y_16x8.asm @@ -0,0 +1,43 @@ +/*
+ * Copyright © <2010>, Intel Corporation.
+ *
+ * This program is licensed under the terms and conditions of the
+ * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
+ * http://www.opensource.org/licenses/eclipse-1.0.php.
+ *
+ */
+// Kernel name: WriteRecon_Y_16x8.asm
+//
+// $Revision: 10 $
+// $Date: 10/03/06 5:28p $
+//
+
+
+//#if !defined(__WRITERECON_Y_16x8__) // Make sure this is only included once
+//#define __WRITERECON_Y_16x8__
+
+
+ add (1) p0:w pERRORY:w -256:w
+ add (1) p1:w pERRORY:w -128:w
+
+ $for(0; <4; 1) {
+ mov (16) mbMSGPAYLOADY(%1,0)<1> r[p0,%1*32+0]<8,2>:ub {NoDDClr}
+ mov (16) mbMSGPAYLOADY(%1,16)<1> r[p0,%1*32+16]<8,2>:ub {NoDDChk}
+ }
+
+ #if defined(MBAFF)
+ add (1) pMSGDSC:ud gFIELDFLAGS:uw MSG_LEN(4)+nDWBWMSGDSC+nBDIX_DESTY+ENWRCOM:ud
+ #elif defined(FIELD)
+ add (1) pMSGDSC:ud gFIELDFLAGS:uw MSG_LEN(4)+nDWBWMSGDSC_TF+nBDIX_DESTY+ENWRCOM:ud
+ #endif
+
+ mov (2) gMSGSRC.0<1>:d gX<2;2,1>:w {NoDDClr}
+ mov (1) gMSGSRC.2:ud 0x0007000f:ud {NoDDChk}
+
+#if defined(FRAME)
+ send (8) gREG_WRITE_COMMIT_Y<1>:ud mMSGHDRYW gMSGSRC<8;8,1>:ud DAPWRITE MSG_LEN(4)+nDWBWMSGDSC+nBDIX_DESTY+ENWRCOM
+#else
+ send (8) gREG_WRITE_COMMIT_Y<1>:ud mMSGHDRYW gMSGSRC<8;8,1>:ud DAPWRITE pMSGDSC:ud
+#endif
+
+//#endif // !defined(__WRITERECON_Y_16x8__)
diff --git a/src/shaders/mpeg2/Makefile.am b/src/shaders/mpeg2/Makefile.am new file mode 100644 index 00000000..e5c6e7f0 --- /dev/null +++ b/src/shaders/mpeg2/Makefile.am @@ -0,0 +1 @@ +SUBDIRS = vld diff --git a/src/shaders/mpeg2/vld/Makefile.am b/src/shaders/mpeg2/vld/Makefile.am new file mode 100644 index 00000000..ff534fe0 --- /dev/null +++ b/src/shaders/mpeg2/vld/Makefile.am @@ -0,0 +1,90 @@ + +INTEL_G4I = addidct.g4i \ + do_iq_intra.g4i \ + do_iq_non_intra.g4i \ + idct.g4i \ + iq_intra.g4i \ + iq_non_intra.g4i \ + motion_field_uv.g4i \ + motion_field_y.g4i \ + motion_frame_uv.g4i \ + motion_frame_y.g4i \ + read_field_x0y0_uv.g4i \ + read_field_x0y0_y.g4i \ + read_field_x0y1_y.g4i \ + read_field_x1y0_y.g4i \ + read_field_x1y1_y.g4i \ + read_frame_x0y0_uv.g4i \ + read_frame_x0y0_y.g4i \ + read_frame_x0y1_y.g4i \ + read_frame_x1y0_y.g4i \ + read_frame_x1y1_y.g4i + +INTEL_G4A = frame_intra.g4a \ + frame_frame_pred_forward.g4a \ + frame_frame_pred_backward.g4a \ + frame_frame_pred_bidirect.g4a \ + frame_field_pred_forward.g4a \ + frame_field_pred_backward.g4a \ + frame_field_pred_bidirect.g4a \ + lib.g4a \ + field_intra.g4a \ + field_forward.g4a \ + field_forward_16x8.g4a \ + field_backward.g4a \ + field_backward_16x8.g4a \ + field_bidirect.g4a \ + field_bidirect_16x8.g4a \ + null.g4a + +INTEL_G4B = frame_intra.g4b \ + frame_frame_pred_forward.g4b \ + frame_frame_pred_backward.g4b \ + frame_frame_pred_bidirect.g4b \ + frame_field_pred_forward.g4b \ + frame_field_pred_backward.g4b \ + frame_field_pred_bidirect.g4b \ + lib.g4b \ + field_intra.g4b \ + field_forward.g4b \ + field_forward_16x8.g4b \ + field_backward.g4b \ + field_backward_16x8.g4b \ + field_bidirect.g4b \ + field_bidirect_16x8.g4b + +INTEL_G4B_GEN5 = frame_intra.g4b.gen5 \ + frame_frame_pred_forward.g4b.gen5 \ + frame_frame_pred_backward.g4b.gen5 \ + frame_frame_pred_bidirect.g4b.gen5 \ + frame_field_pred_forward.g4b.gen5 \ + frame_field_pred_backward.g4b.gen5 \ + frame_field_pred_bidirect.g4b.gen5 \ + lib.g4b.gen5 \ + field_intra.g4b.gen5 \ + field_forward.g4b.gen5 \ + field_forward_16x8.g4b.gen5 \ + field_backward.g4b.gen5 \ + field_backward_16x8.g4b.gen5 \ + field_bidirect.g4b.gen5 \ + field_bidirect_16x8.g4b.gen5 + +EXTRA_DIST = $(INTEL_G4I) \ + $(INTEL_G4A) \ + $(INTEL_G4B) \ + $(INTEL_G4B_GEN5) + +if HAVE_GEN4ASM + +SUFFIXES = .g4a .g4b +.g4a.g4b: + m4 $*.g4a > $*.g4m && intel-gen4asm -o $@ $*.g4m && intel-gen4asm -g 5 -o $@.gen5 $*.g4m && rm $*.g4m + +$(INTEL_G4B): $(INTEL_G4I) + +BUILT_SOURCES= $(INTEL_G4B) + +clean-local: + -rm -f $(INTEL_G4B) + -rm -f $(INTEL_G4B_GEN5) +endif diff --git a/src/shaders/mpeg2/vld/addidct.g4i b/src/shaders/mpeg2/vld/addidct.g4i new file mode 100644 index 00000000..b57548d1 --- /dev/null +++ b/src/shaders/mpeg2/vld/addidct.g4i @@ -0,0 +1,152 @@ +/* + * Copyright © 2008 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g32: message descriptor for reading reference data + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data */ +mov (2) g31.0<1>UD g82.12<2,2,1>UW {align1}; //restore x and y + +and.nz (1) null g82.2<1,1,1>UW 0x20UW {align1}; //dct_type +(f0) jmpi field_dct; + +add (16) g58.0<1>W g83.0<16,16,1>W g58.0<16,16,2>UB {align1}; +add (16) g59.0<1>W g84.0<16,16,1>W g59.0<16,16,2>UB {align1}; +add (16) g60.0<1>W g85.0<16,16,1>W g60.0<16,16,2>UB {align1}; +add (16) g61.0<1>W g86.0<16,16,1>W g61.0<16,16,2>UB {align1}; +add (16) g62.0<1>W g87.0<16,16,1>W g62.0<16,16,2>UB {align1}; +add (16) g63.0<1>W g88.0<16,16,1>W g63.0<16,16,2>UB {align1}; +add (16) g64.0<1>W g89.0<16,16,1>W g64.0<16,16,2>UB {align1}; +add (16) g65.0<1>W g90.0<16,16,1>W g65.0<16,16,2>UB {align1}; +add (16) g66.0<1>W g91.0<16,16,1>W g66.0<16,16,2>UB {align1}; +add (16) g67.0<1>W g92.0<16,16,1>W g67.0<16,16,2>UB {align1}; +add (16) g68.0<1>W g93.0<16,16,1>W g68.0<16,16,2>UB {align1}; +add (16) g69.0<1>W g94.0<16,16,1>W g69.0<16,16,2>UB {align1}; +add (16) g70.0<1>W g95.0<16,16,1>W g70.0<16,16,2>UB {align1}; +add (16) g71.0<1>W g96.0<16,16,1>W g71.0<16,16,2>UB {align1}; +add (16) g72.0<1>W g97.0<16,16,1>W g72.0<16,16,2>UB {align1}; +add (16) g73.0<1>W g98.0<16,16,1>W g73.0<16,16,2>UB {align1}; +jmpi write_back; + +field_dct: +add (16) g58.0<1>W g83.0<16,16,1>W g58.0<16,16,2>UB {align1}; +add (16) g59.0<1>W g91.0<16,16,1>W g59.0<16,16,2>UB {align1}; +add (16) g60.0<1>W g84.0<16,16,1>W g60.0<16,16,2>UB {align1}; +add (16) g61.0<1>W g92.0<16,16,1>W g61.0<16,16,2>UB {align1}; +add (16) g62.0<1>W g85.0<16,16,1>W g62.0<16,16,2>UB {align1}; +add (16) g63.0<1>W g93.0<16,16,1>W g63.0<16,16,2>UB {align1}; +add (16) g64.0<1>W g86.0<16,16,1>W g64.0<16,16,2>UB {align1}; +add (16) g65.0<1>W g94.0<16,16,1>W g65.0<16,16,2>UB {align1}; +add (16) g66.0<1>W g87.0<16,16,1>W g66.0<16,16,2>UB {align1}; +add (16) g67.0<1>W g95.0<16,16,1>W g67.0<16,16,2>UB {align1}; +add (16) g68.0<1>W g88.0<16,16,1>W g68.0<16,16,2>UB {align1}; +add (16) g69.0<1>W g96.0<16,16,1>W g69.0<16,16,2>UB {align1}; +add (16) g70.0<1>W g89.0<16,16,1>W g70.0<16,16,2>UB {align1}; +add (16) g71.0<1>W g97.0<16,16,1>W g71.0<16,16,2>UB {align1}; +add (16) g72.0<1>W g90.0<16,16,1>W g72.0<16,16,2>UB {align1}; +add (16) g73.0<1>W g98.0<16,16,1>W g73.0<16,16,2>UB {align1}; + +write_back: +mov (1) g31.8<1>UD 0x00F000FUD {align1}; +mov.sat (16) g58.0<2>UB g58.0<16,16,1>W {align1}; +mov.sat (16) g59.0<2>UB g59.0<16,16,1>W {align1}; +mov.sat (16) g60.0<2>UB g60.0<16,16,1>W {align1}; +mov.sat (16) g61.0<2>UB g61.0<16,16,1>W {align1}; +mov.sat (16) g62.0<2>UB g62.0<16,16,1>W {align1}; +mov.sat (16) g63.0<2>UB g63.0<16,16,1>W {align1}; +mov.sat (16) g64.0<2>UB g64.0<16,16,1>W {align1}; +mov.sat (16) g65.0<2>UB g65.0<16,16,1>W {align1}; +mov.sat (16) g66.0<2>UB g66.0<16,16,1>W {align1}; +mov.sat (16) g67.0<2>UB g67.0<16,16,1>W {align1}; +mov.sat (16) g68.0<2>UB g68.0<16,16,1>W {align1}; +mov.sat (16) g69.0<2>UB g69.0<16,16,1>W {align1}; +mov.sat (16) g70.0<2>UB g70.0<16,16,1>W {align1}; +mov.sat (16) g71.0<2>UB g71.0<16,16,1>W {align1}; +mov.sat (16) g72.0<2>UB g72.0<16,16,1>W {align1}; +mov.sat (16) g73.0<2>UB g73.0<16,16,1>W {align1}; + +mov (16) m1.0<1>UB g58.0<16,16,2>UB {align1}; +mov (16) m1.16<1>UB g59.0<16,16,2>UB {align1}; +mov (16) m2.0<1>UB g60.0<16,16,2>UB {align1}; +mov (16) m2.16<1>UB g61.0<16,16,2>UB {align1}; +mov (16) m3.0<1>UB g62.0<16,16,2>UB {align1}; +mov (16) m3.16<1>UB g63.0<16,16,2>UB {align1}; +mov (16) m4.0<1>UB g64.0<16,16,2>UB {align1}; +mov (16) m4.16<1>UB g65.0<16,16,2>UB {align1}; +mov (16) m5.0<1>UB g66.0<16,16,2>UB {align1}; +mov (16) m5.16<1>UB g67.0<16,16,2>UB {align1}; +mov (16) m6.0<1>UB g68.0<16,16,2>UB {align1}; +mov (16) m6.16<1>UB g69.0<16,16,2>UB {align1}; +mov (16) m7.0<1>UB g70.0<16,16,2>UB {align1}; +mov (16) m7.16<1>UB g71.0<16,16,2>UB {align1}; +mov (16) m8.0<1>UB g72.0<16,16,2>UB {align1}; +mov (16) m8.16<1>UB g73.0<16,16,2>UB {align1}; +send (16) 0 acc0<1>UW g31<8,8,1>UW write(0,0,2,0) mlen 9 rlen 0 {align1}; + +//U +mov (1) g31.8<1>UD 0x0070007UD { align1 }; +shr (2) g31.0<1>UD g31.0<2,2,1>UD 1D {align1}; +add (16) g74.0<1>W g99.0<16,16,1>W g74.0<16,16,1>UW {align1}; +add (16) g75.0<1>W g100.0<16,16,1>W g75.0<16,16,1>UW {align1}; +add (16) g76.0<1>W g101.0<16,16,1>W g76.0<16,16,1>UW {align1}; +add (16) g77.0<1>W g102.0<16,16,1>W g77.0<16,16,1>UW {align1}; +mov.sat (16) g74.0<2>UB g74.0<16,16,1>W {align1}; +mov.sat (16) g75.0<2>UB g75.0<16,16,1>W {align1}; +mov.sat (16) g76.0<2>UB g76.0<16,16,1>W {align1}; +mov.sat (16) g77.0<2>UB g77.0<16,16,1>W {align1}; + +mov (16) m1.0<1>UB g74.0<16,16,2>UB {align1}; +mov (16) m1.16<1>UB g75.0<16,16,2>UB {align1}; +mov (16) m2.0<1>UB g76.0<16,16,2>UB {align1}; +mov (16) m2.16<1>UB g77.0<16,16,2>UB {align1}; +send (16) 0 acc0<1>UW g31<8,8,1>UW write(1, 0, 2, 0) mlen 3 rlen 0 { align1 }; + +//V +add (16) g78.0<1>UW g103.0<16,16,1>W g78.0<16,16,1>UW {align1}; +add (16) g79.0<1>UW g104.0<16,16,1>W g79.0<16,16,1>UW {align1}; +add (16) g80.0<1>UW g105.0<16,16,1>W g80.0<16,16,1>UW {align1}; +add (16) g81.0<1>UW g106.0<16,16,1>W g81.0<16,16,1>UW {align1}; +mov.sat (16) g78.0<2>UB g78.0<16,16,1>W {align1}; +mov.sat (16) g79.0<2>UB g79.0<16,16,1>W {align1}; +mov.sat (16) g80.0<2>UB g80.0<16,16,1>W {align1}; +mov.sat (16) g81.0<2>UB g81.0<16,16,1>W {align1}; + +mov (16) m1.0<1>UB g78.0<16,16,2>UB {align1}; +mov (16) m1.16<1>UB g79.0<16,16,2>UB {align1}; +mov (16) m2.0<1>UB g80.0<16,16,2>UB {align1}; +mov (16) m2.16<1>UB g81.0<16,16,2>UB {align1}; +send (16) 0 acc0<1>UW g31<8,8,1>UW write(2, 0, 2, 0) mlen 3 rlen 0 { align1 }; + +send (16) 0 acc0<1>UW g0<8,8,1>UW + thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; + diff --git a/src/shaders/mpeg2/vld/do_iq_intra.g4i b/src/shaders/mpeg2/vld/do_iq_intra.g4i new file mode 100644 index 00000000..29bd0208 --- /dev/null +++ b/src/shaders/mpeg2/vld/do_iq_intra.g4i @@ -0,0 +1,64 @@ +/* + * Copyright © 2008 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g112~g115: intra IQ matrix in UW format (in order to use instruction compress), copys from g1~g2 + g[a0.0]:DCT data of a block + g125: ip before jump + if(v==0 && u==0 && intra_mb) + F''[v][u] = QF[v][u] * intra_dc_mult + else + F''[v][u] = (QF[v][u]*W[w][v][u]*quantiser_scale*2)/32 +*/ +DO_IQ_INTRA: +add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1}; +mov (1) g111.0<1>W g[a0.0]<1,1,1>W {align1}; +mul (16) g116.0<1>D g[a0.0]<8,8,1>W g112.0<8,8,1>UW {align1 compr}; +mul (16) g116.0<1>D g116.0<8,8,1>D g109.0<8,8,0>UW {align1 compr}; +asr (16) g116.0<1>D g116.0<8,8,1>D 4UW {align1 compr}; +mul (1) g116.0<1>D g111<1,1,1>W g109.4<1,1,1>UW {align1}; //intra_dc_mult + +add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1}; +mul (16) g118.0<1>D g[a0.0]<8,8,1>W g113.0<8,8,1>UW {align1 compr}; +mul (16) g118.0<1>D g118.0<8,8,1>D g109.0<8,8,0>UW {align1 compr}; +asr (16) g118.0<1>D g118.0<8,8,1>D 4UW {align1 compr}; + +add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1}; +mul (16) g120.0<1>D g[a0.0]<8,8,1>W g114.0<8,8,1>UW {align1 compr}; +mul (16) g120.0<1>D g120.0<8,8,1>D g109.0<8,8,0>UW {align1 compr}; +asr (16) g120.0<1>D g120.0<8,8,1>D 4UW {align1 compr}; + +add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1}; +mul (16) g122.0<1>D g[a0.0]<8,8,1>W g115.0<8,8,1>UW {align1 compr}; +mul (16) g122.0<1>D g122.0<8,8,1>D g109.0<8,8,0>UW {align1 compr}; +asr (16) g122.0<1>D g122.0<8,8,1>D 4UW {align1 compr}; + +add (1) ip g125.0<1,1,1>UD 0x20UD {align1}; //jump back diff --git a/src/shaders/mpeg2/vld/do_iq_non_intra.g4i b/src/shaders/mpeg2/vld/do_iq_non_intra.g4i new file mode 100644 index 00000000..da85e845 --- /dev/null +++ b/src/shaders/mpeg2/vld/do_iq_non_intra.g4i @@ -0,0 +1,59 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g112~g115: intra IQ matrix in UW format (in order to use instruction compress), copys from g1~g2 + g[a0.0]:DCT data of a block + g125: ip before jump + F''[v][u]=(((QF[v][u]*2)+Sign(QF[v][u])) * W[w][v][u] * quantiser_scale)/32; +*/ +DO_IQ_NON_INTRA: +add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1}; +mul (16) g116.0<1>D g[a0.0]<8,8,1>W g112.0<8,8,1>UW {align1 compr}; +mul (16) g116.0<1>D g116.0<8,8,1>D g109.0<8,8,0>UW {align1 compr}; +asr (16) g116.0<1>D g116.0<8,8,1>D 4UW {align1 compr}; + +add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1}; +mul (16) g118.0<1>D g[a0.0]<8,8,1>W g113.0<8,8,1>UW {align1 compr}; +mul (16) g118.0<1>D g118.0<8,8,1>D g109.0<8,8,0>UW {align1 compr}; +asr (16) g118.0<1>D g118.0<8,8,1>D 4UW {align1 compr}; + +add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1}; +mul (16) g120.0<1>D g[a0.0]<8,8,1>W g114.0<8,8,1>UW {align1 compr}; +mul (16) g120.0<1>D g120.0<8,8,1>D g109.0<8,8,0>UW {align1 compr}; +asr (16) g120.0<1>D g120.0<8,8,1>D 4UW {align1 compr}; + +add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1}; +mul (16) g122.0<1>D g[a0.0]<8,8,1>W g115.0<8,8,1>UW {align1 compr}; +mul (16) g122.0<1>D g122.0<8,8,1>D g109.0<8,8,0>UW {align1 compr}; +asr (16) g122.0<1>D g122.0<8,8,1>D 4UW {align1 compr}; + +add (1) ip g125.0<1,1,1>UD 0x20UD {align1}; //jump back diff --git a/src/shaders/mpeg2/vld/field_addidct.g4i b/src/shaders/mpeg2/vld/field_addidct.g4i new file mode 100644 index 00000000..05d0f957 --- /dev/null +++ b/src/shaders/mpeg2/vld/field_addidct.g4i @@ -0,0 +1,153 @@ +/* + * Copyright © 2008 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g32: message descriptor for reading reference data + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data */ +mov (2) g31.0<1>UD g82.12<2,2,1>UW {align1}; //restore x and y + +and.nz (1) null g82.2<1,1,1>UW 0x20UW {align1}; //dct_type +(f0) jmpi field_dct; + +add (16) g58.0<1>W g83.0<16,16,1>W g58.0<16,16,2>UB {align1}; +add (16) g59.0<1>W g84.0<16,16,1>W g59.0<16,16,2>UB {align1}; +add (16) g60.0<1>W g85.0<16,16,1>W g60.0<16,16,2>UB {align1}; +add (16) g61.0<1>W g86.0<16,16,1>W g61.0<16,16,2>UB {align1}; +add (16) g62.0<1>W g87.0<16,16,1>W g62.0<16,16,2>UB {align1}; +add (16) g63.0<1>W g88.0<16,16,1>W g63.0<16,16,2>UB {align1}; +add (16) g64.0<1>W g89.0<16,16,1>W g64.0<16,16,2>UB {align1}; +add (16) g65.0<1>W g90.0<16,16,1>W g65.0<16,16,2>UB {align1}; +add (16) g66.0<1>W g91.0<16,16,1>W g66.0<16,16,2>UB {align1}; +add (16) g67.0<1>W g92.0<16,16,1>W g67.0<16,16,2>UB {align1}; +add (16) g68.0<1>W g93.0<16,16,1>W g68.0<16,16,2>UB {align1}; +add (16) g69.0<1>W g94.0<16,16,1>W g69.0<16,16,2>UB {align1}; +add (16) g70.0<1>W g95.0<16,16,1>W g70.0<16,16,2>UB {align1}; +add (16) g71.0<1>W g96.0<16,16,1>W g71.0<16,16,2>UB {align1}; +add (16) g72.0<1>W g97.0<16,16,1>W g72.0<16,16,2>UB {align1}; +add (16) g73.0<1>W g98.0<16,16,1>W g73.0<16,16,2>UB {align1}; + +jmpi write_back; + +field_dct: +add (16) g58.0<1>W g83.0<16,16,1>W g58.0<16,16,2>UB {align1}; +add (16) g59.0<1>W g91.0<16,16,1>W g59.0<16,16,2>UB {align1}; +add (16) g60.0<1>W g84.0<16,16,1>W g60.0<16,16,2>UB {align1}; +add (16) g61.0<1>W g92.0<16,16,1>W g61.0<16,16,2>UB {align1}; +add (16) g62.0<1>W g85.0<16,16,1>W g62.0<16,16,2>UB {align1}; +add (16) g63.0<1>W g93.0<16,16,1>W g63.0<16,16,2>UB {align1}; +add (16) g64.0<1>W g86.0<16,16,1>W g64.0<16,16,2>UB {align1}; +add (16) g65.0<1>W g94.0<16,16,1>W g65.0<16,16,2>UB {align1}; +add (16) g66.0<1>W g87.0<16,16,1>W g66.0<16,16,2>UB {align1}; +add (16) g67.0<1>W g95.0<16,16,1>W g67.0<16,16,2>UB {align1}; +add (16) g68.0<1>W g88.0<16,16,1>W g68.0<16,16,2>UB {align1}; +add (16) g69.0<1>W g96.0<16,16,1>W g69.0<16,16,2>UB {align1}; +add (16) g70.0<1>W g89.0<16,16,1>W g70.0<16,16,2>UB {align1}; +add (16) g71.0<1>W g97.0<16,16,1>W g71.0<16,16,2>UB {align1}; +add (16) g72.0<1>W g90.0<16,16,1>W g72.0<16,16,2>UB {align1}; +add (16) g73.0<1>W g98.0<16,16,1>W g73.0<16,16,2>UB {align1}; + +write_back: +mov (1) g31.8<1>UD 0x00F000FUD {align1}; +mov.sat (16) g58.0<2>UB g58.0<16,16,1>W {align1}; +mov.sat (16) g59.0<2>UB g59.0<16,16,1>W {align1}; +mov.sat (16) g60.0<2>UB g60.0<16,16,1>W {align1}; +mov.sat (16) g61.0<2>UB g61.0<16,16,1>W {align1}; +mov.sat (16) g62.0<2>UB g62.0<16,16,1>W {align1}; +mov.sat (16) g63.0<2>UB g63.0<16,16,1>W {align1}; +mov.sat (16) g64.0<2>UB g64.0<16,16,1>W {align1}; +mov.sat (16) g65.0<2>UB g65.0<16,16,1>W {align1}; +mov.sat (16) g66.0<2>UB g66.0<16,16,1>W {align1}; +mov.sat (16) g67.0<2>UB g67.0<16,16,1>W {align1}; +mov.sat (16) g68.0<2>UB g68.0<16,16,1>W {align1}; +mov.sat (16) g69.0<2>UB g69.0<16,16,1>W {align1}; +mov.sat (16) g70.0<2>UB g70.0<16,16,1>W {align1}; +mov.sat (16) g71.0<2>UB g71.0<16,16,1>W {align1}; +mov.sat (16) g72.0<2>UB g72.0<16,16,1>W {align1}; +mov.sat (16) g73.0<2>UB g73.0<16,16,1>W {align1}; + +mov (16) m1.0<1>UB g58.0<16,16,2>UB {align1}; +mov (16) m1.16<1>UB g59.0<16,16,2>UB {align1}; +mov (16) m2.0<1>UB g60.0<16,16,2>UB {align1}; +mov (16) m2.16<1>UB g61.0<16,16,2>UB {align1}; +mov (16) m3.0<1>UB g62.0<16,16,2>UB {align1}; +mov (16) m3.16<1>UB g63.0<16,16,2>UB {align1}; +mov (16) m4.0<1>UB g64.0<16,16,2>UB {align1}; +mov (16) m4.16<1>UB g65.0<16,16,2>UB {align1}; +mov (16) m5.0<1>UB g66.0<16,16,2>UB {align1}; +mov (16) m5.16<1>UB g67.0<16,16,2>UB {align1}; +mov (16) m6.0<1>UB g68.0<16,16,2>UB {align1}; +mov (16) m6.16<1>UB g69.0<16,16,2>UB {align1}; +mov (16) m7.0<1>UB g70.0<16,16,2>UB {align1}; +mov (16) m7.16<1>UB g71.0<16,16,2>UB {align1}; +mov (16) m8.0<1>UB g72.0<16,16,2>UB {align1}; +mov (16) m8.16<1>UB g73.0<16,16,2>UB {align1}; +send (16) 0 acc0<1>UW g31<8,8,1>UW write(0,0,2,0) mlen 9 rlen 0 {align1}; + +//U +mov (1) g31.8<1>UD 0x0070007UD { align1 }; +shr (2) g31.0<1>UD g31.0<2,2,1>UD 1D {align1}; +add (16) g74.0<1>W g99.0<16,16,1>W g74.0<16,16,1>UW {align1}; +add (16) g75.0<1>W g100.0<16,16,1>W g75.0<16,16,1>UW {align1}; +add (16) g76.0<1>W g101.0<16,16,1>W g76.0<16,16,1>UW {align1}; +add (16) g77.0<1>W g102.0<16,16,1>W g77.0<16,16,1>UW {align1}; +mov.sat (16) g74.0<2>UB g74.0<16,16,1>W {align1}; +mov.sat (16) g75.0<2>UB g75.0<16,16,1>W {align1}; +mov.sat (16) g76.0<2>UB g76.0<16,16,1>W {align1}; +mov.sat (16) g77.0<2>UB g77.0<16,16,1>W {align1}; + +mov (16) m1.0<1>UB g74.0<16,16,2>UB {align1}; +mov (16) m1.16<1>UB g75.0<16,16,2>UB {align1}; +mov (16) m2.0<1>UB g76.0<16,16,2>UB {align1}; +mov (16) m2.16<1>UB g77.0<16,16,2>UB {align1}; +send (16) 0 acc0<1>UW g31<8,8,1>UW write(1, 0, 2, 0) mlen 3 rlen 0 { align1 }; + +//V +add (16) g78.0<1>UW g103.0<16,16,1>W g78.0<16,16,1>UW {align1}; +add (16) g79.0<1>UW g104.0<16,16,1>W g79.0<16,16,1>UW {align1}; +add (16) g80.0<1>UW g105.0<16,16,1>W g80.0<16,16,1>UW {align1}; +add (16) g81.0<1>UW g106.0<16,16,1>W g81.0<16,16,1>UW {align1}; +mov.sat (16) g78.0<2>UB g78.0<16,16,1>W {align1}; +mov.sat (16) g79.0<2>UB g79.0<16,16,1>W {align1}; +mov.sat (16) g80.0<2>UB g80.0<16,16,1>W {align1}; +mov.sat (16) g81.0<2>UB g81.0<16,16,1>W {align1}; + +mov (16) m1.0<1>UB g78.0<16,16,2>UB {align1}; +mov (16) m1.16<1>UB g79.0<16,16,2>UB {align1}; +mov (16) m2.0<1>UB g80.0<16,16,2>UB {align1}; +mov (16) m2.16<1>UB g81.0<16,16,2>UB {align1}; +send (16) 0 acc0<1>UW g31<8,8,1>UW write(2, 0, 2, 0) mlen 3 rlen 0 { align1 }; + +send (16) 0 acc0<1>UW g0<8,8,1>UW + thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; + diff --git a/src/shaders/mpeg2/vld/field_backward.g4a b/src/shaders/mpeg2/vld/field_backward.g4a new file mode 100644 index 00000000..1696ff37 --- /dev/null +++ b/src/shaders/mpeg2/vld/field_backward.g4a @@ -0,0 +1,99 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data + g32: message descriptor for reading reference data */ + +mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; +mov (2) g31.0<1>UD g82.12<2,2,1>UW {align1}; +mov (1) g126.8<1>UD ip {align1}; +mov (1) ip g21.0<1,1,1>UD {align1}; + +//Y of top field +first_field_picture: +asr (2) g31.14<1>W g82.20<2,2,1>W 1W {align1}; +add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +mov (1) g32.28<1>UD 0UD {align1}; +and.nz (1) null g82.2<1,1,1>UW 0x2000UW {align1}; //motion vertical field select forward +(f0) mov (1) g32.28<1>UD 1UD {align1}; +shl (1) g32.4<1>UD g32.4<1,1,1>UD 1UD {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD g32.28<1,1,1>UD {align1}; +define(`surface',`7') +define(`mv1',`g82.20') +define(`mv2',`g82.22') +include(`field_motion_y.g4i') +//UV of top field +shr (2) g31.0<1>UD g31.0<2,2,1>UD 1UD {align1}; +asr (2) g31.14<1>W g82.20<2,2,1>W 2W {align1}; +add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +mov (1) g32.28<1>UD 0UD {align1}; +and.nz (1) null g82.2<1,1,1>UW 0x2000UW {align1}; //motion vertical field select forward +(f0) mov (1) g32.28<1>UD 1UD {align1}; +shl (1) g32.4<1>UD g32.4<1,1,1>UD 1UD {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD g32.28<1,1,1>UD {align1}; +define(`surface_u', `8') +define(`surface_v', `9') +define(`mv1',`g82.20') +define(`mv2',`g82.22') +include(`field_motion_uv.g4i') +jmpi field_addidct; + +second_field_picture: +//Y of bottom field +asr (2) g31.14<1>W g82.20<2,2,1>W 1W {align1}; +add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +shl (1) g32.4<1>UD g32.4<1,1,1>UD 1UD {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD g32.28<1,1,1>UD {align1}; +define(`surface',`3') +define(`mv1',`g82.20') +define(`mv2',`g82.22') +include(`field_motion_y.g4i') +//UV of bottom field +shr (2) g31.0<1>UD g31.0<2,2,1>UD 1UD {align1}; +asr (2) g31.14<1>W g82.20<2,2,1>W 2W {align1}; +add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +shl (1) g32.4<1>UD g32.4<1,1,1>UD 1UD {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD g32.28<1,1,1>UD {align1}; +define(`surface_u', `10') +define(`surface_v', `11') +define(`mv1',`g82.20') +define(`mv2',`g82.22') +include(`field_motion_uv.g4i') + +field_addidct: +include(`field_addidct.g4i') +out: +send (16) 0 acc0<1>UW g0<8,8,1>UW + thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; diff --git a/src/shaders/mpeg2/vld/field_backward.g4b b/src/shaders/mpeg2/vld/field_backward.g4b new file mode 100644 index 00000000..f00d8e56 --- /dev/null +++ b/src/shaders/mpeg2/vld/field_backward.g4b @@ -0,0 +1,757 @@ + { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, + { 0x00000001, 0x34000020, 0x002102a0, 0x00000000 }, + { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00010001 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x00000001, 0x241c0061, 0x00000000, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x20002000 }, + { 0x00010001, 0x241c0061, 0x00000000, 0x00000001 }, + { 0x00000009, 0x24040c21, 0x00210404, 0x00000001 }, + { 0x00000040, 0x24040421, 0x00210404, 0x0021041c }, + { 0x01000005, 0x20002dbc, 0x00210a54, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000006a }, + { 0x01000005, 0x20002dbc, 0x00210a56, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000004f }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a007 }, + { 0x00800040, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x27604629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x27804629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x27a04629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x27c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x27e04629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x28004629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x28204629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b10500 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10540 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10580 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b105c0 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10600 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10640 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b10680 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b106c0 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b10501 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10541 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10581 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b105c1 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10601 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10641 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b10681 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b106c1 }, + { 0x00800008, 0x27402d29, 0x00b10740, 0x00020002 }, + { 0x00800008, 0x27602d29, 0x00b10760, 0x00020002 }, + { 0x00800008, 0x27802d29, 0x00b10780, 0x00020002 }, + { 0x00800008, 0x27a02d29, 0x00b107a0, 0x00020002 }, + { 0x00800008, 0x27c02d29, 0x00b107c0, 0x00020002 }, + { 0x00800008, 0x27e02d29, 0x00b107e0, 0x00020002 }, + { 0x00800008, 0x28002d29, 0x00b10800, 0x00020002 }, + { 0x00800008, 0x28202d29, 0x00b10820, 0x00020002 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a007 }, + { 0x00800040, 0x28404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x28604629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x28804629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x28a04629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x28c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x28e04629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x29004629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x29204629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b10500 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10540 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10580 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b105c0 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10600 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10640 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b10680 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c0 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b10501 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10541 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10581 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b105c1 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10601 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10641 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b10681 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c1 }, + { 0x00800008, 0x28402d29, 0x00b10840, 0x00020002 }, + { 0x00800008, 0x28602d29, 0x00b10860, 0x00020002 }, + { 0x00800008, 0x28802d29, 0x00b10880, 0x00020002 }, + { 0x00800008, 0x28a02d29, 0x00b108a0, 0x00020002 }, + { 0x00800008, 0x28c02d29, 0x00b108c0, 0x00020002 }, + { 0x00800008, 0x28e02d29, 0x00b108e0, 0x00020002 }, + { 0x00800008, 0x29002d29, 0x00b10900, 0x00020002 }, + { 0x00800008, 0x29202d29, 0x00b10920, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, + { 0x00800042, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800042, 0x27604629, 0x00b10500, 0x00b10501 }, + { 0x00800042, 0x27804629, 0x00b10540, 0x00b10541 }, + { 0x00800042, 0x27a04629, 0x00b10580, 0x00b10581 }, + { 0x00800042, 0x27c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800042, 0x27e04629, 0x00b10600, 0x00b10601 }, + { 0x00800042, 0x28004629, 0x00b10640, 0x00b10641 }, + { 0x00800042, 0x28204629, 0x00b10680, 0x00b10681 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, + { 0x00800042, 0x28404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800042, 0x28604629, 0x00b10500, 0x00b10501 }, + { 0x00800042, 0x28804629, 0x00b10540, 0x00b10541 }, + { 0x00800042, 0x28a04629, 0x00b10580, 0x00b10581 }, + { 0x00800042, 0x28c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800042, 0x28e04629, 0x00b10600, 0x00b10601 }, + { 0x00800042, 0x29004629, 0x00b10640, 0x00b10641 }, + { 0x00800042, 0x29204629, 0x00b10680, 0x00b10681 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000039 }, + { 0x01000005, 0x20002dbc, 0x00210a56, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000001f }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a007 }, + { 0x00800042, 0x27404629, 0x00b104c0, 0x00b10500 }, + { 0x00800042, 0x27604629, 0x00b10500, 0x00b10540 }, + { 0x00800042, 0x27804629, 0x00b10540, 0x00b10580 }, + { 0x00800042, 0x27a04629, 0x00b10580, 0x00b105c0 }, + { 0x00800042, 0x27c04629, 0x00b105c0, 0x00b10600 }, + { 0x00800042, 0x27e04629, 0x00b10600, 0x00b10640 }, + { 0x00800042, 0x28004629, 0x00b10640, 0x00b10680 }, + { 0x00800042, 0x28204629, 0x00b10680, 0x00b106c0 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a007 }, + { 0x00800042, 0x28404629, 0x00b104c0, 0x00b10500 }, + { 0x00800042, 0x28604629, 0x00b10500, 0x00b10540 }, + { 0x00800042, 0x28804629, 0x00b10540, 0x00b10580 }, + { 0x00800042, 0x28a04629, 0x00b10580, 0x00b105c0 }, + { 0x00800042, 0x28c04629, 0x00b105c0, 0x00b10600 }, + { 0x00800042, 0x28e04629, 0x00b10600, 0x00b10640 }, + { 0x00800042, 0x29004629, 0x00b10640, 0x00b10680 }, + { 0x00800042, 0x29204629, 0x00b10680, 0x00b106c0 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, + { 0x00800001, 0x27400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x27600229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x27800229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x27a00229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x27c00229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x27e00229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x28000229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x28200229, 0x00b10680, 0x00000000 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, + { 0x00800001, 0x28400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x28600229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x28800229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x28a00229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x28c00229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x28e00229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x29000229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x29200229, 0x00b10680, 0x00000000 }, + { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00020002 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x00000001, 0x241c0061, 0x00000000, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x20002000 }, + { 0x00010001, 0x241c0061, 0x00000000, 0x00000001 }, + { 0x00000009, 0x24040c21, 0x00210404, 0x00000001 }, + { 0x00000040, 0x24040421, 0x00210404, 0x0021041c }, + { 0x01000005, 0x20003dbc, 0x00210a54, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000005c }, + { 0x01000005, 0x20003dbc, 0x00210a56, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000043 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0414a009 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0411a008 }, + { 0x00800031, 0x26401d29, 0x008d0400, 0x0411a009 }, + { 0x00600040, 0x29404629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29504629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29604629, 0x008d0540, 0x008d0541 }, + { 0x00600040, 0x29704629, 0x008d0560, 0x008d0561 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0520 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0540 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d0560 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d0580 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0521 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0541 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d0561 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d0581 }, + { 0x00600040, 0x29c04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x29d04629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x29e04629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x29f04629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05e0 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d0600 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d0620 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0640 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05e1 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d0601 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d0621 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0641 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0414a009 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0411a008 }, + { 0x00800031, 0x26401d29, 0x008d0400, 0x0411a009 }, + { 0x00600040, 0x29804629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29904629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29a04629, 0x008d0540, 0x008d0541 }, + { 0x00600040, 0x29b04629, 0x008d0560, 0x008d0561 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d0520 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0540 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0560 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0580 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d0521 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0541 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0561 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0581 }, + { 0x00600040, 0x2a004629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x2a104629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x2a204629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x2a304629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d05e0 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0600 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0620 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0640 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d05e1 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0601 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0621 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0641 }, + { 0x00a02008, 0x29402d29, 0x00b10940, 0x00020002 }, + { 0x00a02008, 0x29802d29, 0x00b10980, 0x00020002 }, + { 0x00a02008, 0x29c02d29, 0x00b109c0, 0x00020002 }, + { 0x00a02008, 0x2a002d29, 0x00b10a00, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000004e }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a008 }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a009 }, + { 0x00600042, 0x29404629, 0x008d0500, 0x008d0501 }, + { 0x00600042, 0x29504629, 0x008d0520, 0x008d0521 }, + { 0x00600042, 0x29604629, 0x008d0540, 0x008d0541 }, + { 0x00600042, 0x29704629, 0x008d0560, 0x008d0561 }, + { 0x00600042, 0x29c04629, 0x008d0580, 0x008d0581 }, + { 0x00600042, 0x29d04629, 0x008d05a0, 0x008d05a1 }, + { 0x00600042, 0x29e04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600042, 0x29f04629, 0x008d05e0, 0x008d05e1 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a008 }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a009 }, + { 0x00600042, 0x29804629, 0x008d0500, 0x008d0501 }, + { 0x00600042, 0x29904629, 0x008d0520, 0x008d0521 }, + { 0x00600042, 0x29a04629, 0x008d0540, 0x008d0541 }, + { 0x00600042, 0x29b04629, 0x008d0560, 0x008d0561 }, + { 0x00600042, 0x2a004629, 0x008d0580, 0x008d0581 }, + { 0x00600042, 0x2a104629, 0x008d05a0, 0x008d05a1 }, + { 0x00600042, 0x2a204629, 0x008d05c0, 0x008d05c1 }, + { 0x00600042, 0x2a304629, 0x008d05e0, 0x008d05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000037 }, + { 0x01000005, 0x20003dbc, 0x00210a56, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000001f }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0414a009 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0411a008 }, + { 0x00800031, 0x26401d29, 0x008d0400, 0x0411a009 }, + { 0x00600042, 0x29404629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29504629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29604629, 0x008d0540, 0x008d0560 }, + { 0x00600042, 0x29704629, 0x008d0560, 0x008d0580 }, + { 0x00600042, 0x29c04629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x29d04629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x29e04629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x29f04629, 0x008d0620, 0x008d0640 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0414a009 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0411a008 }, + { 0x00800031, 0x26401d29, 0x008d0400, 0x0411a009 }, + { 0x00600042, 0x29804629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29904629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29a04629, 0x008d0540, 0x008d0560 }, + { 0x00600042, 0x29b04629, 0x008d0560, 0x008d0580 }, + { 0x00600042, 0x2a004629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x2a104629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x2a204629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x2a304629, 0x008d0620, 0x008d0640 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a008 }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a009 }, + { 0x00600001, 0x29400229, 0x008d0500, 0x00000000 }, + { 0x00600001, 0x29500229, 0x008d0520, 0x00000000 }, + { 0x00600001, 0x29600229, 0x008d0540, 0x00000000 }, + { 0x00600001, 0x29700229, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x29c00229, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x29d00229, 0x008d05a0, 0x00000000 }, + { 0x00600001, 0x29e00229, 0x008d05c0, 0x00000000 }, + { 0x00600001, 0x29f00229, 0x008d05e0, 0x00000000 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a008 }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a009 }, + { 0x00600001, 0x29800229, 0x008d0500, 0x00000000 }, + { 0x00600001, 0x29900229, 0x008d0520, 0x00000000 }, + { 0x00600001, 0x29a00229, 0x008d0540, 0x00000000 }, + { 0x00600001, 0x29b00229, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x2a000229, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x2a100229, 0x008d05a0, 0x00000000 }, + { 0x00600001, 0x2a200229, 0x008d05c0, 0x00000000 }, + { 0x00600001, 0x2a300229, 0x008d05e0, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000143 }, + { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00010001 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x00000009, 0x24040c21, 0x00210404, 0x00000001 }, + { 0x00000040, 0x24040421, 0x00210404, 0x0021041c }, + { 0x01000005, 0x20002dbc, 0x00210a54, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000006a }, + { 0x01000005, 0x20002dbc, 0x00210a56, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000004f }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a003 }, + { 0x00800040, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x27604629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x27804629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x27a04629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x27c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x27e04629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x28004629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x28204629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b10500 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10540 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10580 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b105c0 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10600 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10640 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b10680 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b106c0 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b10501 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10541 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10581 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b105c1 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10601 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10641 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b10681 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b106c1 }, + { 0x00800008, 0x27402d29, 0x00b10740, 0x00020002 }, + { 0x00800008, 0x27602d29, 0x00b10760, 0x00020002 }, + { 0x00800008, 0x27802d29, 0x00b10780, 0x00020002 }, + { 0x00800008, 0x27a02d29, 0x00b107a0, 0x00020002 }, + { 0x00800008, 0x27c02d29, 0x00b107c0, 0x00020002 }, + { 0x00800008, 0x27e02d29, 0x00b107e0, 0x00020002 }, + { 0x00800008, 0x28002d29, 0x00b10800, 0x00020002 }, + { 0x00800008, 0x28202d29, 0x00b10820, 0x00020002 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a003 }, + { 0x00800040, 0x28404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x28604629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x28804629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x28a04629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x28c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x28e04629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x29004629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x29204629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b10500 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10540 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10580 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b105c0 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10600 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10640 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b10680 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c0 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b10501 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10541 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10581 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b105c1 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10601 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10641 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b10681 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c1 }, + { 0x00800008, 0x28402d29, 0x00b10840, 0x00020002 }, + { 0x00800008, 0x28602d29, 0x00b10860, 0x00020002 }, + { 0x00800008, 0x28802d29, 0x00b10880, 0x00020002 }, + { 0x00800008, 0x28a02d29, 0x00b108a0, 0x00020002 }, + { 0x00800008, 0x28c02d29, 0x00b108c0, 0x00020002 }, + { 0x00800008, 0x28e02d29, 0x00b108e0, 0x00020002 }, + { 0x00800008, 0x29002d29, 0x00b10900, 0x00020002 }, + { 0x00800008, 0x29202d29, 0x00b10920, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a003 }, + { 0x00800042, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800042, 0x27604629, 0x00b10500, 0x00b10501 }, + { 0x00800042, 0x27804629, 0x00b10540, 0x00b10541 }, + { 0x00800042, 0x27a04629, 0x00b10580, 0x00b10581 }, + { 0x00800042, 0x27c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800042, 0x27e04629, 0x00b10600, 0x00b10601 }, + { 0x00800042, 0x28004629, 0x00b10640, 0x00b10641 }, + { 0x00800042, 0x28204629, 0x00b10680, 0x00b10681 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a003 }, + { 0x00800042, 0x28404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800042, 0x28604629, 0x00b10500, 0x00b10501 }, + { 0x00800042, 0x28804629, 0x00b10540, 0x00b10541 }, + { 0x00800042, 0x28a04629, 0x00b10580, 0x00b10581 }, + { 0x00800042, 0x28c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800042, 0x28e04629, 0x00b10600, 0x00b10601 }, + { 0x00800042, 0x29004629, 0x00b10640, 0x00b10641 }, + { 0x00800042, 0x29204629, 0x00b10680, 0x00b10681 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000039 }, + { 0x01000005, 0x20002dbc, 0x00210a56, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000001f }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a003 }, + { 0x00800042, 0x27404629, 0x00b104c0, 0x00b10500 }, + { 0x00800042, 0x27604629, 0x00b10500, 0x00b10540 }, + { 0x00800042, 0x27804629, 0x00b10540, 0x00b10580 }, + { 0x00800042, 0x27a04629, 0x00b10580, 0x00b105c0 }, + { 0x00800042, 0x27c04629, 0x00b105c0, 0x00b10600 }, + { 0x00800042, 0x27e04629, 0x00b10600, 0x00b10640 }, + { 0x00800042, 0x28004629, 0x00b10640, 0x00b10680 }, + { 0x00800042, 0x28204629, 0x00b10680, 0x00b106c0 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a003 }, + { 0x00800042, 0x28404629, 0x00b104c0, 0x00b10500 }, + { 0x00800042, 0x28604629, 0x00b10500, 0x00b10540 }, + { 0x00800042, 0x28804629, 0x00b10540, 0x00b10580 }, + { 0x00800042, 0x28a04629, 0x00b10580, 0x00b105c0 }, + { 0x00800042, 0x28c04629, 0x00b105c0, 0x00b10600 }, + { 0x00800042, 0x28e04629, 0x00b10600, 0x00b10640 }, + { 0x00800042, 0x29004629, 0x00b10640, 0x00b10680 }, + { 0x00800042, 0x29204629, 0x00b10680, 0x00b106c0 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a003 }, + { 0x00800001, 0x27400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x27600229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x27800229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x27a00229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x27c00229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x27e00229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x28000229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x28200229, 0x00b10680, 0x00000000 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a003 }, + { 0x00800001, 0x28400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x28600229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x28800229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x28a00229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x28c00229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x28e00229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x29000229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x29200229, 0x00b10680, 0x00000000 }, + { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00020002 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x00000009, 0x24040c21, 0x00210404, 0x00000001 }, + { 0x00000040, 0x24040421, 0x00210404, 0x0021041c }, + { 0x01000005, 0x20003dbc, 0x00210a54, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000005c }, + { 0x01000005, 0x20003dbc, 0x00210a56, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000043 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a00a }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0414a00b }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0411a00a }, + { 0x00800031, 0x26401d29, 0x008d0400, 0x0411a00b }, + { 0x00600040, 0x29404629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29504629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29604629, 0x008d0540, 0x008d0541 }, + { 0x00600040, 0x29704629, 0x008d0560, 0x008d0561 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0520 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0540 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d0560 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d0580 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0521 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0541 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d0561 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d0581 }, + { 0x00600040, 0x29c04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x29d04629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x29e04629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x29f04629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05e0 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d0600 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d0620 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0640 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05e1 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d0601 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d0621 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0641 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a00a }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0414a00b }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0411a00a }, + { 0x00800031, 0x26401d29, 0x008d0400, 0x0411a00b }, + { 0x00600040, 0x29804629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29904629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29a04629, 0x008d0540, 0x008d0541 }, + { 0x00600040, 0x29b04629, 0x008d0560, 0x008d0561 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d0520 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0540 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0560 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0580 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d0521 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0541 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0561 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0581 }, + { 0x00600040, 0x2a004629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x2a104629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x2a204629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x2a304629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d05e0 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0600 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0620 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0640 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d05e1 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0601 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0621 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0641 }, + { 0x00a02008, 0x29402d29, 0x00b10940, 0x00020002 }, + { 0x00a02008, 0x29802d29, 0x00b10980, 0x00020002 }, + { 0x00a02008, 0x29c02d29, 0x00b109c0, 0x00020002 }, + { 0x00a02008, 0x2a002d29, 0x00b10a00, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000004e }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a00a }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a00b }, + { 0x00600042, 0x29404629, 0x008d0500, 0x008d0501 }, + { 0x00600042, 0x29504629, 0x008d0520, 0x008d0521 }, + { 0x00600042, 0x29604629, 0x008d0540, 0x008d0541 }, + { 0x00600042, 0x29704629, 0x008d0560, 0x008d0561 }, + { 0x00600042, 0x29c04629, 0x008d0580, 0x008d0581 }, + { 0x00600042, 0x29d04629, 0x008d05a0, 0x008d05a1 }, + { 0x00600042, 0x29e04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600042, 0x29f04629, 0x008d05e0, 0x008d05e1 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a00a }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a00b }, + { 0x00600042, 0x29804629, 0x008d0500, 0x008d0501 }, + { 0x00600042, 0x29904629, 0x008d0520, 0x008d0521 }, + { 0x00600042, 0x29a04629, 0x008d0540, 0x008d0541 }, + { 0x00600042, 0x29b04629, 0x008d0560, 0x008d0561 }, + { 0x00600042, 0x2a004629, 0x008d0580, 0x008d0581 }, + { 0x00600042, 0x2a104629, 0x008d05a0, 0x008d05a1 }, + { 0x00600042, 0x2a204629, 0x008d05c0, 0x008d05c1 }, + { 0x00600042, 0x2a304629, 0x008d05e0, 0x008d05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000037 }, + { 0x01000005, 0x20003dbc, 0x00210a56, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000001f }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a00a }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0414a00b }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0411a00a }, + { 0x00800031, 0x26401d29, 0x008d0400, 0x0411a00b }, + { 0x00600042, 0x29404629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29504629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29604629, 0x008d0540, 0x008d0560 }, + { 0x00600042, 0x29704629, 0x008d0560, 0x008d0580 }, + { 0x00600042, 0x29c04629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x29d04629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x29e04629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x29f04629, 0x008d0620, 0x008d0640 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a00a }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0414a00b }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0411a00a }, + { 0x00800031, 0x26401d29, 0x008d0400, 0x0411a00b }, + { 0x00600042, 0x29804629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29904629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29a04629, 0x008d0540, 0x008d0560 }, + { 0x00600042, 0x29b04629, 0x008d0560, 0x008d0580 }, + { 0x00600042, 0x2a004629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x2a104629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x2a204629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x2a304629, 0x008d0620, 0x008d0640 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a00a }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a00b }, + { 0x00600001, 0x29400229, 0x008d0500, 0x00000000 }, + { 0x00600001, 0x29500229, 0x008d0520, 0x00000000 }, + { 0x00600001, 0x29600229, 0x008d0540, 0x00000000 }, + { 0x00600001, 0x29700229, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x29c00229, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x29d00229, 0x008d05a0, 0x00000000 }, + { 0x00600001, 0x29e00229, 0x008d05c0, 0x00000000 }, + { 0x00600001, 0x29f00229, 0x008d05e0, 0x00000000 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a00a }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a00b }, + { 0x00600001, 0x29800229, 0x008d0500, 0x00000000 }, + { 0x00600001, 0x29900229, 0x008d0520, 0x00000000 }, + { 0x00600001, 0x29a00229, 0x008d0540, 0x00000000 }, + { 0x00600001, 0x29b00229, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x2a000229, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x2a100229, 0x008d05a0, 0x00000000 }, + { 0x00600001, 0x2a200229, 0x008d05c0, 0x00000000 }, + { 0x00600001, 0x2a300229, 0x008d05e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10a80, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10aa0, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10ac0, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10ae0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10b00, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10b20, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10b40, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10b60, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10b80, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10ba0, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10bc0, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10be0, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c00, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10c20, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10b60, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10a80, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10b80, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10aa0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10ba0, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10ac0, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10bc0, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10ae0, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10be0, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10b00, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10c00, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10b20, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c20, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10b40, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, + { 0x80800001, 0x474001b1, 0x00b10740, 0x00000000 }, + { 0x80800001, 0x476001b1, 0x00b10760, 0x00000000 }, + { 0x80800001, 0x478001b1, 0x00b10780, 0x00000000 }, + { 0x80800001, 0x47a001b1, 0x00b107a0, 0x00000000 }, + { 0x80800001, 0x47c001b1, 0x00b107c0, 0x00000000 }, + { 0x80800001, 0x47e001b1, 0x00b107e0, 0x00000000 }, + { 0x80800001, 0x480001b1, 0x00b10800, 0x00000000 }, + { 0x80800001, 0x482001b1, 0x00b10820, 0x00000000 }, + { 0x80800001, 0x484001b1, 0x00b10840, 0x00000000 }, + { 0x80800001, 0x486001b1, 0x00b10860, 0x00000000 }, + { 0x80800001, 0x488001b1, 0x00b10880, 0x00000000 }, + { 0x80800001, 0x48a001b1, 0x00b108a0, 0x00000000 }, + { 0x80800001, 0x48c001b1, 0x00b108c0, 0x00000000 }, + { 0x80800001, 0x48e001b1, 0x00b108e0, 0x00000000 }, + { 0x80800001, 0x490001b1, 0x00b10900, 0x00000000 }, + { 0x80800001, 0x492001b1, 0x00b10920, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, + { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, + { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, + { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, + { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, + { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, + { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05902000 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, + { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, + { 0x00800040, 0x294025ad, 0x00b10c60, 0x00b10940 }, + { 0x00800040, 0x296025ad, 0x00b10c80, 0x00b10960 }, + { 0x00800040, 0x298025ad, 0x00b10ca0, 0x00b10980 }, + { 0x00800040, 0x29a025ad, 0x00b10cc0, 0x00b109a0 }, + { 0x80800001, 0x494001b1, 0x00b10940, 0x00000000 }, + { 0x80800001, 0x496001b1, 0x00b10960, 0x00000000 }, + { 0x80800001, 0x498001b1, 0x00b10980, 0x00000000 }, + { 0x80800001, 0x49a001b1, 0x00b109a0, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302001 }, + { 0x00800040, 0x29c025a9, 0x00b10ce0, 0x00b109c0 }, + { 0x00800040, 0x29e025a9, 0x00b10d00, 0x00b109e0 }, + { 0x00800040, 0x2a0025a9, 0x00b10d20, 0x00b10a00 }, + { 0x00800040, 0x2a2025a9, 0x00b10d40, 0x00b10a20 }, + { 0x80800001, 0x49c001b1, 0x00b109c0, 0x00000000 }, + { 0x80800001, 0x49e001b1, 0x00b109e0, 0x00000000 }, + { 0x80800001, 0x4a0001b1, 0x00b10a00, 0x00000000 }, + { 0x80800001, 0x4a2001b1, 0x00b10a20, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302002 }, + { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, + { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, diff --git a/src/shaders/mpeg2/vld/field_backward.g4b.gen5 b/src/shaders/mpeg2/vld/field_backward.g4b.gen5 new file mode 100644 index 00000000..7aac9e4c --- /dev/null +++ b/src/shaders/mpeg2/vld/field_backward.g4b.gen5 @@ -0,0 +1,757 @@ + { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, + { 0x00000001, 0x34000020, 0x002102a0, 0x00000000 }, + { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00010001 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x00000001, 0x241c0061, 0x00000000, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x20002000 }, + { 0x00010001, 0x241c0061, 0x00000000, 0x00000001 }, + { 0x00000009, 0x24040c21, 0x00210404, 0x00000001 }, + { 0x00000040, 0x24040421, 0x00210404, 0x0021041c }, + { 0x01000005, 0x20002dbc, 0x00210a54, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000d4 }, + { 0x01000005, 0x20002dbc, 0x00210a56, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000009e }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a007 }, + { 0x00800040, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x27604629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x27804629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x27a04629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x27c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x27e04629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x28004629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x28204629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b10500 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10540 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10580 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b105c0 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10600 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10640 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b10680 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b106c0 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b10501 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10541 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10581 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b105c1 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10601 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10641 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b10681 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b106c1 }, + { 0x00800008, 0x27402d29, 0x00b10740, 0x00020002 }, + { 0x00800008, 0x27602d29, 0x00b10760, 0x00020002 }, + { 0x00800008, 0x27802d29, 0x00b10780, 0x00020002 }, + { 0x00800008, 0x27a02d29, 0x00b107a0, 0x00020002 }, + { 0x00800008, 0x27c02d29, 0x00b107c0, 0x00020002 }, + { 0x00800008, 0x27e02d29, 0x00b107e0, 0x00020002 }, + { 0x00800008, 0x28002d29, 0x00b10800, 0x00020002 }, + { 0x00800008, 0x28202d29, 0x00b10820, 0x00020002 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a007 }, + { 0x00800040, 0x28404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x28604629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x28804629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x28a04629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x28c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x28e04629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x29004629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x29204629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b10500 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10540 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10580 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b105c0 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10600 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10640 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b10680 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c0 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b10501 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10541 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10581 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b105c1 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10601 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10641 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b10681 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c1 }, + { 0x00800008, 0x28402d29, 0x00b10840, 0x00020002 }, + { 0x00800008, 0x28602d29, 0x00b10860, 0x00020002 }, + { 0x00800008, 0x28802d29, 0x00b10880, 0x00020002 }, + { 0x00800008, 0x28a02d29, 0x00b108a0, 0x00020002 }, + { 0x00800008, 0x28c02d29, 0x00b108c0, 0x00020002 }, + { 0x00800008, 0x28e02d29, 0x00b108e0, 0x00020002 }, + { 0x00800008, 0x29002d29, 0x00b10900, 0x00020002 }, + { 0x00800008, 0x29202d29, 0x00b10920, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000000a4 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, + { 0x00800042, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800042, 0x27604629, 0x00b10500, 0x00b10501 }, + { 0x00800042, 0x27804629, 0x00b10540, 0x00b10541 }, + { 0x00800042, 0x27a04629, 0x00b10580, 0x00b10581 }, + { 0x00800042, 0x27c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800042, 0x27e04629, 0x00b10600, 0x00b10601 }, + { 0x00800042, 0x28004629, 0x00b10640, 0x00b10641 }, + { 0x00800042, 0x28204629, 0x00b10680, 0x00b10681 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, + { 0x00800042, 0x28404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800042, 0x28604629, 0x00b10500, 0x00b10501 }, + { 0x00800042, 0x28804629, 0x00b10540, 0x00b10541 }, + { 0x00800042, 0x28a04629, 0x00b10580, 0x00b10581 }, + { 0x00800042, 0x28c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800042, 0x28e04629, 0x00b10600, 0x00b10601 }, + { 0x00800042, 0x29004629, 0x00b10640, 0x00b10641 }, + { 0x00800042, 0x29204629, 0x00b10680, 0x00b10681 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000072 }, + { 0x01000005, 0x20002dbc, 0x00210a56, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000003e }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a007 }, + { 0x00800042, 0x27404629, 0x00b104c0, 0x00b10500 }, + { 0x00800042, 0x27604629, 0x00b10500, 0x00b10540 }, + { 0x00800042, 0x27804629, 0x00b10540, 0x00b10580 }, + { 0x00800042, 0x27a04629, 0x00b10580, 0x00b105c0 }, + { 0x00800042, 0x27c04629, 0x00b105c0, 0x00b10600 }, + { 0x00800042, 0x27e04629, 0x00b10600, 0x00b10640 }, + { 0x00800042, 0x28004629, 0x00b10640, 0x00b10680 }, + { 0x00800042, 0x28204629, 0x00b10680, 0x00b106c0 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a007 }, + { 0x00800042, 0x28404629, 0x00b104c0, 0x00b10500 }, + { 0x00800042, 0x28604629, 0x00b10500, 0x00b10540 }, + { 0x00800042, 0x28804629, 0x00b10540, 0x00b10580 }, + { 0x00800042, 0x28a04629, 0x00b10580, 0x00b105c0 }, + { 0x00800042, 0x28c04629, 0x00b105c0, 0x00b10600 }, + { 0x00800042, 0x28e04629, 0x00b10600, 0x00b10640 }, + { 0x00800042, 0x29004629, 0x00b10640, 0x00b10680 }, + { 0x00800042, 0x29204629, 0x00b10680, 0x00b106c0 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, + { 0x00800001, 0x27400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x27600229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x27800229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x27a00229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x27c00229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x27e00229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x28000229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x28200229, 0x00b10680, 0x00000000 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, + { 0x00800001, 0x28400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x28600229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x28800229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x28a00229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x28c00229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x28e00229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x29000229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x29200229, 0x00b10680, 0x00000000 }, + { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00020002 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x00000001, 0x241c0061, 0x00000000, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x20002000 }, + { 0x00010001, 0x241c0061, 0x00000000, 0x00000001 }, + { 0x00000009, 0x24040c21, 0x00210404, 0x00000001 }, + { 0x00000040, 0x24040421, 0x00210404, 0x0021041c }, + { 0x01000005, 0x20003dbc, 0x00210a54, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000b8 }, + { 0x01000005, 0x20003dbc, 0x00210a56, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000086 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0248a009 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0218a008 }, + { 0x00800031, 0x26401d29, 0x408d0400, 0x0218a009 }, + { 0x00600040, 0x29404629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29504629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29604629, 0x008d0540, 0x008d0541 }, + { 0x00600040, 0x29704629, 0x008d0560, 0x008d0561 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0520 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0540 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d0560 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d0580 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0521 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0541 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d0561 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d0581 }, + { 0x00600040, 0x29c04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x29d04629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x29e04629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x29f04629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05e0 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d0600 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d0620 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0640 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05e1 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d0601 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d0621 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0641 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0248a009 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0218a008 }, + { 0x00800031, 0x26401d29, 0x408d0400, 0x0218a009 }, + { 0x00600040, 0x29804629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29904629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29a04629, 0x008d0540, 0x008d0541 }, + { 0x00600040, 0x29b04629, 0x008d0560, 0x008d0561 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d0520 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0540 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0560 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0580 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d0521 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0541 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0561 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0581 }, + { 0x00600040, 0x2a004629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x2a104629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x2a204629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x2a304629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d05e0 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0600 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0620 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0640 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d05e1 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0601 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0621 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0641 }, + { 0x00a02008, 0x29402d29, 0x00b10940, 0x00020002 }, + { 0x00a02008, 0x29802d29, 0x00b10980, 0x00020002 }, + { 0x00a02008, 0x29c02d29, 0x00b109c0, 0x00020002 }, + { 0x00a02008, 0x2a002d29, 0x00b10a00, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000009c }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a008 }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a009 }, + { 0x00600042, 0x29404629, 0x008d0500, 0x008d0501 }, + { 0x00600042, 0x29504629, 0x008d0520, 0x008d0521 }, + { 0x00600042, 0x29604629, 0x008d0540, 0x008d0541 }, + { 0x00600042, 0x29704629, 0x008d0560, 0x008d0561 }, + { 0x00600042, 0x29c04629, 0x008d0580, 0x008d0581 }, + { 0x00600042, 0x29d04629, 0x008d05a0, 0x008d05a1 }, + { 0x00600042, 0x29e04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600042, 0x29f04629, 0x008d05e0, 0x008d05e1 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a008 }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a009 }, + { 0x00600042, 0x29804629, 0x008d0500, 0x008d0501 }, + { 0x00600042, 0x29904629, 0x008d0520, 0x008d0521 }, + { 0x00600042, 0x29a04629, 0x008d0540, 0x008d0541 }, + { 0x00600042, 0x29b04629, 0x008d0560, 0x008d0561 }, + { 0x00600042, 0x2a004629, 0x008d0580, 0x008d0581 }, + { 0x00600042, 0x2a104629, 0x008d05a0, 0x008d05a1 }, + { 0x00600042, 0x2a204629, 0x008d05c0, 0x008d05c1 }, + { 0x00600042, 0x2a304629, 0x008d05e0, 0x008d05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000006e }, + { 0x01000005, 0x20003dbc, 0x00210a56, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000003e }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0248a009 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0218a008 }, + { 0x00800031, 0x26401d29, 0x408d0400, 0x0218a009 }, + { 0x00600042, 0x29404629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29504629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29604629, 0x008d0540, 0x008d0560 }, + { 0x00600042, 0x29704629, 0x008d0560, 0x008d0580 }, + { 0x00600042, 0x29c04629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x29d04629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x29e04629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x29f04629, 0x008d0620, 0x008d0640 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0248a009 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0218a008 }, + { 0x00800031, 0x26401d29, 0x408d0400, 0x0218a009 }, + { 0x00600042, 0x29804629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29904629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29a04629, 0x008d0540, 0x008d0560 }, + { 0x00600042, 0x29b04629, 0x008d0560, 0x008d0580 }, + { 0x00600042, 0x2a004629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x2a104629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x2a204629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x2a304629, 0x008d0620, 0x008d0640 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000002c }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a008 }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a009 }, + { 0x00600001, 0x29400229, 0x008d0500, 0x00000000 }, + { 0x00600001, 0x29500229, 0x008d0520, 0x00000000 }, + { 0x00600001, 0x29600229, 0x008d0540, 0x00000000 }, + { 0x00600001, 0x29700229, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x29c00229, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x29d00229, 0x008d05a0, 0x00000000 }, + { 0x00600001, 0x29e00229, 0x008d05c0, 0x00000000 }, + { 0x00600001, 0x29f00229, 0x008d05e0, 0x00000000 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a008 }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a009 }, + { 0x00600001, 0x29800229, 0x008d0500, 0x00000000 }, + { 0x00600001, 0x29900229, 0x008d0520, 0x00000000 }, + { 0x00600001, 0x29a00229, 0x008d0540, 0x00000000 }, + { 0x00600001, 0x29b00229, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x2a000229, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x2a100229, 0x008d05a0, 0x00000000 }, + { 0x00600001, 0x2a200229, 0x008d05c0, 0x00000000 }, + { 0x00600001, 0x2a300229, 0x008d05e0, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000286 }, + { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00010001 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x00000009, 0x24040c21, 0x00210404, 0x00000001 }, + { 0x00000040, 0x24040421, 0x00210404, 0x0021041c }, + { 0x01000005, 0x20002dbc, 0x00210a54, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000d4 }, + { 0x01000005, 0x20002dbc, 0x00210a56, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000009e }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a003 }, + { 0x00800040, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x27604629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x27804629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x27a04629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x27c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x27e04629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x28004629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x28204629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b10500 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10540 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10580 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b105c0 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10600 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10640 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b10680 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b106c0 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b10501 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10541 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10581 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b105c1 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10601 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10641 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b10681 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b106c1 }, + { 0x00800008, 0x27402d29, 0x00b10740, 0x00020002 }, + { 0x00800008, 0x27602d29, 0x00b10760, 0x00020002 }, + { 0x00800008, 0x27802d29, 0x00b10780, 0x00020002 }, + { 0x00800008, 0x27a02d29, 0x00b107a0, 0x00020002 }, + { 0x00800008, 0x27c02d29, 0x00b107c0, 0x00020002 }, + { 0x00800008, 0x27e02d29, 0x00b107e0, 0x00020002 }, + { 0x00800008, 0x28002d29, 0x00b10800, 0x00020002 }, + { 0x00800008, 0x28202d29, 0x00b10820, 0x00020002 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a003 }, + { 0x00800040, 0x28404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x28604629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x28804629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x28a04629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x28c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x28e04629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x29004629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x29204629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b10500 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10540 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10580 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b105c0 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10600 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10640 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b10680 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c0 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b10501 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10541 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10581 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b105c1 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10601 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10641 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b10681 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c1 }, + { 0x00800008, 0x28402d29, 0x00b10840, 0x00020002 }, + { 0x00800008, 0x28602d29, 0x00b10860, 0x00020002 }, + { 0x00800008, 0x28802d29, 0x00b10880, 0x00020002 }, + { 0x00800008, 0x28a02d29, 0x00b108a0, 0x00020002 }, + { 0x00800008, 0x28c02d29, 0x00b108c0, 0x00020002 }, + { 0x00800008, 0x28e02d29, 0x00b108e0, 0x00020002 }, + { 0x00800008, 0x29002d29, 0x00b10900, 0x00020002 }, + { 0x00800008, 0x29202d29, 0x00b10920, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000000a4 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a003 }, + { 0x00800042, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800042, 0x27604629, 0x00b10500, 0x00b10501 }, + { 0x00800042, 0x27804629, 0x00b10540, 0x00b10541 }, + { 0x00800042, 0x27a04629, 0x00b10580, 0x00b10581 }, + { 0x00800042, 0x27c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800042, 0x27e04629, 0x00b10600, 0x00b10601 }, + { 0x00800042, 0x28004629, 0x00b10640, 0x00b10641 }, + { 0x00800042, 0x28204629, 0x00b10680, 0x00b10681 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a003 }, + { 0x00800042, 0x28404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800042, 0x28604629, 0x00b10500, 0x00b10501 }, + { 0x00800042, 0x28804629, 0x00b10540, 0x00b10541 }, + { 0x00800042, 0x28a04629, 0x00b10580, 0x00b10581 }, + { 0x00800042, 0x28c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800042, 0x28e04629, 0x00b10600, 0x00b10601 }, + { 0x00800042, 0x29004629, 0x00b10640, 0x00b10641 }, + { 0x00800042, 0x29204629, 0x00b10680, 0x00b10681 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000072 }, + { 0x01000005, 0x20002dbc, 0x00210a56, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000003e }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a003 }, + { 0x00800042, 0x27404629, 0x00b104c0, 0x00b10500 }, + { 0x00800042, 0x27604629, 0x00b10500, 0x00b10540 }, + { 0x00800042, 0x27804629, 0x00b10540, 0x00b10580 }, + { 0x00800042, 0x27a04629, 0x00b10580, 0x00b105c0 }, + { 0x00800042, 0x27c04629, 0x00b105c0, 0x00b10600 }, + { 0x00800042, 0x27e04629, 0x00b10600, 0x00b10640 }, + { 0x00800042, 0x28004629, 0x00b10640, 0x00b10680 }, + { 0x00800042, 0x28204629, 0x00b10680, 0x00b106c0 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a003 }, + { 0x00800042, 0x28404629, 0x00b104c0, 0x00b10500 }, + { 0x00800042, 0x28604629, 0x00b10500, 0x00b10540 }, + { 0x00800042, 0x28804629, 0x00b10540, 0x00b10580 }, + { 0x00800042, 0x28a04629, 0x00b10580, 0x00b105c0 }, + { 0x00800042, 0x28c04629, 0x00b105c0, 0x00b10600 }, + { 0x00800042, 0x28e04629, 0x00b10600, 0x00b10640 }, + { 0x00800042, 0x29004629, 0x00b10640, 0x00b10680 }, + { 0x00800042, 0x29204629, 0x00b10680, 0x00b106c0 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a003 }, + { 0x00800001, 0x27400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x27600229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x27800229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x27a00229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x27c00229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x27e00229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x28000229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x28200229, 0x00b10680, 0x00000000 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a003 }, + { 0x00800001, 0x28400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x28600229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x28800229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x28a00229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x28c00229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x28e00229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x29000229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x29200229, 0x00b10680, 0x00000000 }, + { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00020002 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x00000009, 0x24040c21, 0x00210404, 0x00000001 }, + { 0x00000040, 0x24040421, 0x00210404, 0x0021041c }, + { 0x01000005, 0x20003dbc, 0x00210a54, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000b8 }, + { 0x01000005, 0x20003dbc, 0x00210a56, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000086 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a00a }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0248a00b }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0218a00a }, + { 0x00800031, 0x26401d29, 0x408d0400, 0x0218a00b }, + { 0x00600040, 0x29404629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29504629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29604629, 0x008d0540, 0x008d0541 }, + { 0x00600040, 0x29704629, 0x008d0560, 0x008d0561 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0520 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0540 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d0560 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d0580 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0521 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0541 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d0561 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d0581 }, + { 0x00600040, 0x29c04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x29d04629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x29e04629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x29f04629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05e0 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d0600 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d0620 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0640 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05e1 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d0601 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d0621 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0641 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a00a }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0248a00b }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0218a00a }, + { 0x00800031, 0x26401d29, 0x408d0400, 0x0218a00b }, + { 0x00600040, 0x29804629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29904629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29a04629, 0x008d0540, 0x008d0541 }, + { 0x00600040, 0x29b04629, 0x008d0560, 0x008d0561 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d0520 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0540 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0560 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0580 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d0521 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0541 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0561 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0581 }, + { 0x00600040, 0x2a004629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x2a104629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x2a204629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x2a304629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d05e0 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0600 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0620 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0640 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d05e1 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0601 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0621 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0641 }, + { 0x00a02008, 0x29402d29, 0x00b10940, 0x00020002 }, + { 0x00a02008, 0x29802d29, 0x00b10980, 0x00020002 }, + { 0x00a02008, 0x29c02d29, 0x00b109c0, 0x00020002 }, + { 0x00a02008, 0x2a002d29, 0x00b10a00, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000009c }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a00a }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a00b }, + { 0x00600042, 0x29404629, 0x008d0500, 0x008d0501 }, + { 0x00600042, 0x29504629, 0x008d0520, 0x008d0521 }, + { 0x00600042, 0x29604629, 0x008d0540, 0x008d0541 }, + { 0x00600042, 0x29704629, 0x008d0560, 0x008d0561 }, + { 0x00600042, 0x29c04629, 0x008d0580, 0x008d0581 }, + { 0x00600042, 0x29d04629, 0x008d05a0, 0x008d05a1 }, + { 0x00600042, 0x29e04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600042, 0x29f04629, 0x008d05e0, 0x008d05e1 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a00a }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a00b }, + { 0x00600042, 0x29804629, 0x008d0500, 0x008d0501 }, + { 0x00600042, 0x29904629, 0x008d0520, 0x008d0521 }, + { 0x00600042, 0x29a04629, 0x008d0540, 0x008d0541 }, + { 0x00600042, 0x29b04629, 0x008d0560, 0x008d0561 }, + { 0x00600042, 0x2a004629, 0x008d0580, 0x008d0581 }, + { 0x00600042, 0x2a104629, 0x008d05a0, 0x008d05a1 }, + { 0x00600042, 0x2a204629, 0x008d05c0, 0x008d05c1 }, + { 0x00600042, 0x2a304629, 0x008d05e0, 0x008d05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000006e }, + { 0x01000005, 0x20003dbc, 0x00210a56, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000003e }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a00a }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0248a00b }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0218a00a }, + { 0x00800031, 0x26401d29, 0x408d0400, 0x0218a00b }, + { 0x00600042, 0x29404629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29504629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29604629, 0x008d0540, 0x008d0560 }, + { 0x00600042, 0x29704629, 0x008d0560, 0x008d0580 }, + { 0x00600042, 0x29c04629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x29d04629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x29e04629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x29f04629, 0x008d0620, 0x008d0640 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a00a }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0248a00b }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0218a00a }, + { 0x00800031, 0x26401d29, 0x408d0400, 0x0218a00b }, + { 0x00600042, 0x29804629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29904629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29a04629, 0x008d0540, 0x008d0560 }, + { 0x00600042, 0x29b04629, 0x008d0560, 0x008d0580 }, + { 0x00600042, 0x2a004629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x2a104629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x2a204629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x2a304629, 0x008d0620, 0x008d0640 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000002c }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a00a }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a00b }, + { 0x00600001, 0x29400229, 0x008d0500, 0x00000000 }, + { 0x00600001, 0x29500229, 0x008d0520, 0x00000000 }, + { 0x00600001, 0x29600229, 0x008d0540, 0x00000000 }, + { 0x00600001, 0x29700229, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x29c00229, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x29d00229, 0x008d05a0, 0x00000000 }, + { 0x00600001, 0x29e00229, 0x008d05c0, 0x00000000 }, + { 0x00600001, 0x29f00229, 0x008d05e0, 0x00000000 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a00a }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a00b }, + { 0x00600001, 0x29800229, 0x008d0500, 0x00000000 }, + { 0x00600001, 0x29900229, 0x008d0520, 0x00000000 }, + { 0x00600001, 0x29a00229, 0x008d0540, 0x00000000 }, + { 0x00600001, 0x29b00229, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x2a000229, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x2a100229, 0x008d05a0, 0x00000000 }, + { 0x00600001, 0x2a200229, 0x008d05c0, 0x00000000 }, + { 0x00600001, 0x2a300229, 0x008d05e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10a80, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10aa0, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10ac0, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10ae0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10b00, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10b20, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10b40, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10b60, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10b80, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10ba0, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10bc0, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10be0, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c00, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10c20, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10b60, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10a80, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10b80, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10aa0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10ba0, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10ac0, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10bc0, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10ae0, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10be0, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10b00, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10c00, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10b20, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c20, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10b40, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, + { 0x80800001, 0x474001b1, 0x00b10740, 0x00000000 }, + { 0x80800001, 0x476001b1, 0x00b10760, 0x00000000 }, + { 0x80800001, 0x478001b1, 0x00b10780, 0x00000000 }, + { 0x80800001, 0x47a001b1, 0x00b107a0, 0x00000000 }, + { 0x80800001, 0x47c001b1, 0x00b107c0, 0x00000000 }, + { 0x80800001, 0x47e001b1, 0x00b107e0, 0x00000000 }, + { 0x80800001, 0x480001b1, 0x00b10800, 0x00000000 }, + { 0x80800001, 0x482001b1, 0x00b10820, 0x00000000 }, + { 0x80800001, 0x484001b1, 0x00b10840, 0x00000000 }, + { 0x80800001, 0x486001b1, 0x00b10860, 0x00000000 }, + { 0x80800001, 0x488001b1, 0x00b10880, 0x00000000 }, + { 0x80800001, 0x48a001b1, 0x00b108a0, 0x00000000 }, + { 0x80800001, 0x48c001b1, 0x00b108c0, 0x00000000 }, + { 0x80800001, 0x48e001b1, 0x00b108e0, 0x00000000 }, + { 0x80800001, 0x490001b1, 0x00b10900, 0x00000000 }, + { 0x80800001, 0x492001b1, 0x00b10920, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, + { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, + { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, + { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, + { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, + { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, + { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x12082000 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, + { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, + { 0x00800040, 0x294025ad, 0x00b10c60, 0x00b10940 }, + { 0x00800040, 0x296025ad, 0x00b10c80, 0x00b10960 }, + { 0x00800040, 0x298025ad, 0x00b10ca0, 0x00b10980 }, + { 0x00800040, 0x29a025ad, 0x00b10cc0, 0x00b109a0 }, + { 0x80800001, 0x494001b1, 0x00b10940, 0x00000000 }, + { 0x80800001, 0x496001b1, 0x00b10960, 0x00000000 }, + { 0x80800001, 0x498001b1, 0x00b10980, 0x00000000 }, + { 0x80800001, 0x49a001b1, 0x00b109a0, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082001 }, + { 0x00800040, 0x29c025a9, 0x00b10ce0, 0x00b109c0 }, + { 0x00800040, 0x29e025a9, 0x00b10d00, 0x00b109e0 }, + { 0x00800040, 0x2a0025a9, 0x00b10d20, 0x00b10a00 }, + { 0x00800040, 0x2a2025a9, 0x00b10d40, 0x00b10a20 }, + { 0x80800001, 0x49c001b1, 0x00b109c0, 0x00000000 }, + { 0x80800001, 0x49e001b1, 0x00b109e0, 0x00000000 }, + { 0x80800001, 0x4a0001b1, 0x00b10a00, 0x00000000 }, + { 0x80800001, 0x4a2001b1, 0x00b10a20, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082002 }, + { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, + { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, diff --git a/src/shaders/mpeg2/vld/field_backward_16x8.g4a b/src/shaders/mpeg2/vld/field_backward_16x8.g4a new file mode 100644 index 00000000..89b83685 --- /dev/null +++ b/src/shaders/mpeg2/vld/field_backward_16x8.g4a @@ -0,0 +1,30 @@ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data + g32: message descriptor for reading reference data */ +mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; +mov (2) g31.0<1>UD g82.12<2,2,1>UW {align1}; +define(`UV_red',`0xffffffffUD') +define(`UV_white',`0x7f7f7f7fUD') +define(`UV_green',`0x00000000UD') +mov(2) g6.0<1>UD g82.12<2,2,1>UW {align1}; +mov(1) g6.8<1>UD 0x000f000fUD { align1 }; +mov(16) m1<1>UD 0xFFFFFFFFUD {align1 compr}; +mov(16) m3<1>UD 0xFFFFFFFFUD {align1 compr}; +mov(16) m5<1>UD 0xFFFFFFFFUD {align1 compr}; +mov(16) m7<1>UD 0xFFFFFFFFUD {align1 compr}; +send (16) 0 acc0<1>UW g6<8,8,1>UW write(0, 0, 2, 0) mlen 9 rlen 0 { align1 }; +/*Fill U buffer & V buffer with 0x7F*/ +shr (2) g6.0<1>UD g82.12<2,2,1>UW 1UW {align1}; +mov(1) g6.8<1>UD 0x00070007UD { align1 }; +mov (16) m1<1>UD UV_white {align1 compr}; +send (16) 0 acc0<1>UW g6<8,8,1>UW write(2, 0, 2, 0) mlen 3 rlen 0 { align1 }; +send (16) 0 acc0<1>UW g6<8,8,1>UW write(1, 0, 2, 0) mlen 3 rlen 0 { align1 }; +send (16) 0 acc0<1>UW g0<8,8,1>UW + thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; diff --git a/src/shaders/mpeg2/vld/field_backward_16x8.g4b b/src/shaders/mpeg2/vld/field_backward_16x8.g4b new file mode 100644 index 00000000..9d95f70b --- /dev/null +++ b/src/shaders/mpeg2/vld/field_backward_16x8.g4b @@ -0,0 +1,15 @@ + { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x00200001, 0x20c00121, 0x00450a4c, 0x00000000 }, + { 0x00000001, 0x20c80061, 0x00000000, 0x000f000f }, + { 0x00802001, 0x20200062, 0x00000000, 0xffffffff }, + { 0x00802001, 0x20600062, 0x00000000, 0xffffffff }, + { 0x00802001, 0x20a00062, 0x00000000, 0xffffffff }, + { 0x00802001, 0x20e00062, 0x00000000, 0xffffffff }, + { 0x00800031, 0x24001d28, 0x008d00c0, 0x05902000 }, + { 0x00200008, 0x20c02d21, 0x00450a4c, 0x00010001 }, + { 0x00000001, 0x20c80061, 0x00000000, 0x00070007 }, + { 0x00802001, 0x20200062, 0x00000000, 0x7f7f7f7f }, + { 0x00800031, 0x24001d28, 0x008d00c0, 0x05302002 }, + { 0x00800031, 0x24001d28, 0x008d00c0, 0x05302001 }, + { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, diff --git a/src/shaders/mpeg2/vld/field_backward_16x8.g4b.gen5 b/src/shaders/mpeg2/vld/field_backward_16x8.g4b.gen5 new file mode 100644 index 00000000..b12bddc0 --- /dev/null +++ b/src/shaders/mpeg2/vld/field_backward_16x8.g4b.gen5 @@ -0,0 +1,15 @@ + { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x00200001, 0x20c00121, 0x00450a4c, 0x00000000 }, + { 0x00000001, 0x20c80061, 0x00000000, 0x000f000f }, + { 0x00802001, 0x20200062, 0x00000000, 0xffffffff }, + { 0x00802001, 0x20600062, 0x00000000, 0xffffffff }, + { 0x00802001, 0x20a00062, 0x00000000, 0xffffffff }, + { 0x00802001, 0x20e00062, 0x00000000, 0xffffffff }, + { 0x00800031, 0x24001d28, 0x508d00c0, 0x12082000 }, + { 0x00200008, 0x20c02d21, 0x00450a4c, 0x00010001 }, + { 0x00000001, 0x20c80061, 0x00000000, 0x00070007 }, + { 0x00802001, 0x20200062, 0x00000000, 0x7f7f7f7f }, + { 0x00800031, 0x24001d28, 0x508d00c0, 0x06082002 }, + { 0x00800031, 0x24001d28, 0x508d00c0, 0x06082001 }, + { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, diff --git a/src/shaders/mpeg2/vld/field_bidirect.g4a b/src/shaders/mpeg2/vld/field_bidirect.g4a new file mode 100644 index 00000000..ad6d3028 --- /dev/null +++ b/src/shaders/mpeg2/vld/field_bidirect.g4a @@ -0,0 +1,141 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data + g32: message descriptor for reading reference data */ + +mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; +mov (2) g31.0<1>UD g82.12<2,2,1>UW {align1}; +mov (1) g126.8<1>UD ip {align1}; +mov (1) ip g21.0<1,1,1>UD {align1}; + +//Y of forward +asr (2) g31.14<1>W g82.16<2,2,1>W 1W {align1}; +add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +mov (1) g32.28<1>UD 0UD {align1}; +and.nz (1) null g82.2<1,1,1>UW 0x1000UW {align1}; //motion vertical field select +(f0) mov (1) g32.28<1>UD 1UD {align1}; +shl (1) g32.4<1>UD g32.4<1,1,1>UD 1UD {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD g32.28<1,1,1>UD {align1}; +define(`surface',`4') +define(`mv1',`g82.16') +define(`mv2',`g82.18') +include(`field_motion_y.g4i') +mov (16) g108.0<1>UD g58.0<16,16,1>UD {align1 compr}; +mov (16) g110.0<1>UD g60.0<16,16,1>UD {align1 compr}; +mov (16) g112.0<1>UD g62.0<16,16,1>UD {align1 compr}; +mov (16) g114.0<1>UD g64.0<16,16,1>UD {align1 compr}; +mov (16) g116.0<1>UD g66.0<16,16,1>UD {align1 compr}; +mov (16) g118.0<1>UD g68.0<16,16,1>UD {align1 compr}; +mov (16) g120.0<1>UD g70.0<16,16,1>UD {align1 compr}; +mov (16) g122.0<1>UD g72.0<16,16,1>UD {align1 compr}; + +//Y of backward +asr (2) g31.14<1>W g82.20<2,2,1>W 1W {align1}; +add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +mov (1) g32.28<1>UD 0UD {align1}; +and.nz (1) null g82.2<1,1,1>UW 0x2000UW {align1}; //motion vertical field select +(f0) mov (1) g32.28<1>UD 1UD {align1}; +shl (1) g32.4<1>UD g32.4<1,1,1>UD 1UD {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD g32.28<1,1,1>UD {align1}; +define(`surface',`7') +define(`mv1',`g82.20') +define(`mv2',`g82.22') +include(`field_motion_y.g4i') +avg (16) g58.0<1>UW g58.0<16,16,1>UW g108.0<16,16,1>UW {align1}; +avg (16) g59.0<1>UW g59.0<16,16,1>UW g109.0<16,16,1>UW {align1}; +avg (16) g60.0<1>UW g60.0<16,16,1>UW g110.0<16,16,1>UW {align1}; +avg (16) g61.0<1>UW g61.0<16,16,1>UW g111.0<16,16,1>UW {align1}; +avg (16) g62.0<1>UW g62.0<16,16,1>UW g112.0<16,16,1>UW {align1}; +avg (16) g63.0<1>UW g63.0<16,16,1>UW g113.0<16,16,1>UW {align1}; +avg (16) g64.0<1>UW g64.0<16,16,1>UW g114.0<16,16,1>UW {align1}; +avg (16) g65.0<1>UW g65.0<16,16,1>UW g115.0<16,16,1>UW {align1}; +avg (16) g66.0<1>UW g66.0<16,16,1>UW g116.0<16,16,1>UW {align1}; +avg (16) g67.0<1>UW g67.0<16,16,1>UW g117.0<16,16,1>UW {align1}; +avg (16) g68.0<1>UW g68.0<16,16,1>UW g118.0<16,16,1>UW {align1}; +avg (16) g69.0<1>UW g69.0<16,16,1>UW g119.0<16,16,1>UW {align1}; +avg (16) g70.0<1>UW g70.0<16,16,1>UW g120.0<16,16,1>UW {align1}; +avg (16) g71.0<1>UW g71.0<16,16,1>UW g121.0<16,16,1>UW {align1}; +avg (16) g72.0<1>UW g72.0<16,16,1>UW g122.0<16,16,1>UW {align1}; +avg (16) g73.0<1>UW g73.0<16,16,1>UW g123.0<16,16,1>UW {align1}; + +//UV, Forward +shr (2) g31.0<1>UD g31.0<2,2,1>UD 1UD {align1}; +asr (2) g31.14<1>W g82.16<2,2,1>W 2W {align1}; +add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +mov (1) g32.28<1>UD 0UD {align1}; +and.nz (1) null g82.2<1,1,1>UW 0x1000UW {align1}; //motion vertical field select +(f0) mov (1) g32.28<1>UD 1UD {align1}; +shl (1) g32.4<1>UD g32.4<1,1,1>UD 1UD {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD g32.28<1,1,1>UD {align1}; +define(`surface_u', `5') +define(`surface_v', `6') +define(`mv1',`g82.16') +define(`mv2',`g82.18') +include(`field_motion_uv.g4i') +//Save UV Forward +mov (16) g108.0<1>UD g74.0<16,16,1>UD {align1 compr}; +mov (16) g110.0<1>UD g76.0<16,16,1>UD {align1 compr}; +mov (16) g112.0<1>UD g78.0<16,16,1>UD {align1 compr}; +mov (16) g114.0<1>UD g80.0<16,16,1>UD {align1 compr}; + +//UV, Backward +asr (2) g31.14<1>W g82.20<2,2,1>W 2W {align1}; +add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +mov (1) g32.28<1>UD 0UD {align1}; +and.nz (1) null g82.2<1,1,1>UW 0x2000UW {align1}; //motion vertical field select +(f0) mov (1) g32.28<1>UD 1UD {align1}; +shl (1) g32.4<1>UD g32.4<1,1,1>UD 1UD {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD g32.28<1,1,1>UD {align1}; +define(`surface_u', `8') +define(`surface_v', `9') +define(`mv1',`g82.20') +define(`mv2',`g82.22') +include(`field_motion_uv.g4i') +//Average Forward and Backward +avg (16) g74.0<1>UW g74.0<16,16,1>UW g108.0<16,16,1>UW {align1}; +avg (16) g75.0<1>UW g75.0<16,16,1>UW g109.0<16,16,1>UW {align1}; +avg (16) g76.0<1>UW g76.0<16,16,1>UW g110.0<16,16,1>UW {align1}; +avg (16) g77.0<1>UW g77.0<16,16,1>UW g111.0<16,16,1>UW {align1}; +avg (16) g78.0<1>UW g78.0<16,16,1>UW g112.0<16,16,1>UW {align1}; +avg (16) g79.0<1>UW g79.0<16,16,1>UW g113.0<16,16,1>UW {align1}; +avg (16) g80.0<1>UW g80.0<16,16,1>UW g114.0<16,16,1>UW {align1}; +avg (16) g81.0<1>UW g81.0<16,16,1>UW g115.0<16,16,1>UW {align1}; + +field_addidct: +include(`field_addidct.g4i') +out: +send (16) 0 acc0<1>UW g0<8,8,1>UW + thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; diff --git a/src/shaders/mpeg2/vld/field_bidirect.g4b b/src/shaders/mpeg2/vld/field_bidirect.g4b new file mode 100644 index 00000000..181e7762 --- /dev/null +++ b/src/shaders/mpeg2/vld/field_bidirect.g4b @@ -0,0 +1,797 @@ + { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, + { 0x00000001, 0x34000020, 0x002102a0, 0x00000000 }, + { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00010001 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x00000001, 0x241c0061, 0x00000000, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x10001000 }, + { 0x00010001, 0x241c0061, 0x00000000, 0x00000001 }, + { 0x00000009, 0x24040c21, 0x00210404, 0x00000001 }, + { 0x00000040, 0x24040421, 0x00210404, 0x0021041c }, + { 0x01000005, 0x20002dbc, 0x00210a50, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000006a }, + { 0x01000005, 0x20002dbc, 0x00210a52, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000004f }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a004 }, + { 0x00800040, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x27604629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x27804629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x27a04629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x27c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x27e04629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x28004629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x28204629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b10500 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10540 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10580 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b105c0 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10600 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10640 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b10680 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b106c0 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b10501 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10541 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10581 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b105c1 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10601 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10641 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b10681 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b106c1 }, + { 0x00800008, 0x27402d29, 0x00b10740, 0x00020002 }, + { 0x00800008, 0x27602d29, 0x00b10760, 0x00020002 }, + { 0x00800008, 0x27802d29, 0x00b10780, 0x00020002 }, + { 0x00800008, 0x27a02d29, 0x00b107a0, 0x00020002 }, + { 0x00800008, 0x27c02d29, 0x00b107c0, 0x00020002 }, + { 0x00800008, 0x27e02d29, 0x00b107e0, 0x00020002 }, + { 0x00800008, 0x28002d29, 0x00b10800, 0x00020002 }, + { 0x00800008, 0x28202d29, 0x00b10820, 0x00020002 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a004 }, + { 0x00800040, 0x28404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x28604629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x28804629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x28a04629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x28c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x28e04629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x29004629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x29204629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b10500 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10540 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10580 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b105c0 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10600 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10640 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b10680 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c0 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b10501 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10541 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10581 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b105c1 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10601 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10641 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b10681 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c1 }, + { 0x00800008, 0x28402d29, 0x00b10840, 0x00020002 }, + { 0x00800008, 0x28602d29, 0x00b10860, 0x00020002 }, + { 0x00800008, 0x28802d29, 0x00b10880, 0x00020002 }, + { 0x00800008, 0x28a02d29, 0x00b108a0, 0x00020002 }, + { 0x00800008, 0x28c02d29, 0x00b108c0, 0x00020002 }, + { 0x00800008, 0x28e02d29, 0x00b108e0, 0x00020002 }, + { 0x00800008, 0x29002d29, 0x00b10900, 0x00020002 }, + { 0x00800008, 0x29202d29, 0x00b10920, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, + { 0x00800042, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800042, 0x27604629, 0x00b10500, 0x00b10501 }, + { 0x00800042, 0x27804629, 0x00b10540, 0x00b10541 }, + { 0x00800042, 0x27a04629, 0x00b10580, 0x00b10581 }, + { 0x00800042, 0x27c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800042, 0x27e04629, 0x00b10600, 0x00b10601 }, + { 0x00800042, 0x28004629, 0x00b10640, 0x00b10641 }, + { 0x00800042, 0x28204629, 0x00b10680, 0x00b10681 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, + { 0x00800042, 0x28404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800042, 0x28604629, 0x00b10500, 0x00b10501 }, + { 0x00800042, 0x28804629, 0x00b10540, 0x00b10541 }, + { 0x00800042, 0x28a04629, 0x00b10580, 0x00b10581 }, + { 0x00800042, 0x28c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800042, 0x28e04629, 0x00b10600, 0x00b10601 }, + { 0x00800042, 0x29004629, 0x00b10640, 0x00b10641 }, + { 0x00800042, 0x29204629, 0x00b10680, 0x00b10681 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000039 }, + { 0x01000005, 0x20002dbc, 0x00210a52, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000001f }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a004 }, + { 0x00800042, 0x27404629, 0x00b104c0, 0x00b10500 }, + { 0x00800042, 0x27604629, 0x00b10500, 0x00b10540 }, + { 0x00800042, 0x27804629, 0x00b10540, 0x00b10580 }, + { 0x00800042, 0x27a04629, 0x00b10580, 0x00b105c0 }, + { 0x00800042, 0x27c04629, 0x00b105c0, 0x00b10600 }, + { 0x00800042, 0x27e04629, 0x00b10600, 0x00b10640 }, + { 0x00800042, 0x28004629, 0x00b10640, 0x00b10680 }, + { 0x00800042, 0x28204629, 0x00b10680, 0x00b106c0 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a004 }, + { 0x00800042, 0x28404629, 0x00b104c0, 0x00b10500 }, + { 0x00800042, 0x28604629, 0x00b10500, 0x00b10540 }, + { 0x00800042, 0x28804629, 0x00b10540, 0x00b10580 }, + { 0x00800042, 0x28a04629, 0x00b10580, 0x00b105c0 }, + { 0x00800042, 0x28c04629, 0x00b105c0, 0x00b10600 }, + { 0x00800042, 0x28e04629, 0x00b10600, 0x00b10640 }, + { 0x00800042, 0x29004629, 0x00b10640, 0x00b10680 }, + { 0x00800042, 0x29204629, 0x00b10680, 0x00b106c0 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, + { 0x00800001, 0x27400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x27600229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x27800229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x27a00229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x27c00229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x27e00229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x28000229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x28200229, 0x00b10680, 0x00000000 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, + { 0x00800001, 0x28400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x28600229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x28800229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x28a00229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x28c00229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x28e00229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x29000229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x29200229, 0x00b10680, 0x00000000 }, + { 0x00802001, 0x2d800021, 0x00b10740, 0x00000000 }, + { 0x00802001, 0x2dc00021, 0x00b10780, 0x00000000 }, + { 0x00802001, 0x2e000021, 0x00b107c0, 0x00000000 }, + { 0x00802001, 0x2e400021, 0x00b10800, 0x00000000 }, + { 0x00802001, 0x2e800021, 0x00b10840, 0x00000000 }, + { 0x00802001, 0x2ec00021, 0x00b10880, 0x00000000 }, + { 0x00802001, 0x2f000021, 0x00b108c0, 0x00000000 }, + { 0x00802001, 0x2f400021, 0x00b10900, 0x00000000 }, + { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00010001 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x00000001, 0x241c0061, 0x00000000, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x20002000 }, + { 0x00010001, 0x241c0061, 0x00000000, 0x00000001 }, + { 0x00000009, 0x24040c21, 0x00210404, 0x00000001 }, + { 0x00000040, 0x24040421, 0x00210404, 0x0021041c }, + { 0x01000005, 0x20002dbc, 0x00210a54, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000006a }, + { 0x01000005, 0x20002dbc, 0x00210a56, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000004f }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a007 }, + { 0x00800040, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x27604629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x27804629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x27a04629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x27c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x27e04629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x28004629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x28204629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b10500 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10540 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10580 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b105c0 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10600 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10640 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b10680 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b106c0 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b10501 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10541 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10581 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b105c1 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10601 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10641 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b10681 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b106c1 }, + { 0x00800008, 0x27402d29, 0x00b10740, 0x00020002 }, + { 0x00800008, 0x27602d29, 0x00b10760, 0x00020002 }, + { 0x00800008, 0x27802d29, 0x00b10780, 0x00020002 }, + { 0x00800008, 0x27a02d29, 0x00b107a0, 0x00020002 }, + { 0x00800008, 0x27c02d29, 0x00b107c0, 0x00020002 }, + { 0x00800008, 0x27e02d29, 0x00b107e0, 0x00020002 }, + { 0x00800008, 0x28002d29, 0x00b10800, 0x00020002 }, + { 0x00800008, 0x28202d29, 0x00b10820, 0x00020002 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a007 }, + { 0x00800040, 0x28404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x28604629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x28804629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x28a04629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x28c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x28e04629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x29004629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x29204629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b10500 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10540 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10580 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b105c0 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10600 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10640 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b10680 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c0 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b10501 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10541 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10581 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b105c1 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10601 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10641 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b10681 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c1 }, + { 0x00800008, 0x28402d29, 0x00b10840, 0x00020002 }, + { 0x00800008, 0x28602d29, 0x00b10860, 0x00020002 }, + { 0x00800008, 0x28802d29, 0x00b10880, 0x00020002 }, + { 0x00800008, 0x28a02d29, 0x00b108a0, 0x00020002 }, + { 0x00800008, 0x28c02d29, 0x00b108c0, 0x00020002 }, + { 0x00800008, 0x28e02d29, 0x00b108e0, 0x00020002 }, + { 0x00800008, 0x29002d29, 0x00b10900, 0x00020002 }, + { 0x00800008, 0x29202d29, 0x00b10920, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, + { 0x00800042, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800042, 0x27604629, 0x00b10500, 0x00b10501 }, + { 0x00800042, 0x27804629, 0x00b10540, 0x00b10541 }, + { 0x00800042, 0x27a04629, 0x00b10580, 0x00b10581 }, + { 0x00800042, 0x27c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800042, 0x27e04629, 0x00b10600, 0x00b10601 }, + { 0x00800042, 0x28004629, 0x00b10640, 0x00b10641 }, + { 0x00800042, 0x28204629, 0x00b10680, 0x00b10681 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, + { 0x00800042, 0x28404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800042, 0x28604629, 0x00b10500, 0x00b10501 }, + { 0x00800042, 0x28804629, 0x00b10540, 0x00b10541 }, + { 0x00800042, 0x28a04629, 0x00b10580, 0x00b10581 }, + { 0x00800042, 0x28c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800042, 0x28e04629, 0x00b10600, 0x00b10601 }, + { 0x00800042, 0x29004629, 0x00b10640, 0x00b10641 }, + { 0x00800042, 0x29204629, 0x00b10680, 0x00b10681 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000039 }, + { 0x01000005, 0x20002dbc, 0x00210a56, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000001f }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a007 }, + { 0x00800042, 0x27404629, 0x00b104c0, 0x00b10500 }, + { 0x00800042, 0x27604629, 0x00b10500, 0x00b10540 }, + { 0x00800042, 0x27804629, 0x00b10540, 0x00b10580 }, + { 0x00800042, 0x27a04629, 0x00b10580, 0x00b105c0 }, + { 0x00800042, 0x27c04629, 0x00b105c0, 0x00b10600 }, + { 0x00800042, 0x27e04629, 0x00b10600, 0x00b10640 }, + { 0x00800042, 0x28004629, 0x00b10640, 0x00b10680 }, + { 0x00800042, 0x28204629, 0x00b10680, 0x00b106c0 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a007 }, + { 0x00800042, 0x28404629, 0x00b104c0, 0x00b10500 }, + { 0x00800042, 0x28604629, 0x00b10500, 0x00b10540 }, + { 0x00800042, 0x28804629, 0x00b10540, 0x00b10580 }, + { 0x00800042, 0x28a04629, 0x00b10580, 0x00b105c0 }, + { 0x00800042, 0x28c04629, 0x00b105c0, 0x00b10600 }, + { 0x00800042, 0x28e04629, 0x00b10600, 0x00b10640 }, + { 0x00800042, 0x29004629, 0x00b10640, 0x00b10680 }, + { 0x00800042, 0x29204629, 0x00b10680, 0x00b106c0 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, + { 0x00800001, 0x27400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x27600229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x27800229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x27a00229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x27c00229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x27e00229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x28000229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x28200229, 0x00b10680, 0x00000000 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, + { 0x00800001, 0x28400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x28600229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x28800229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x28a00229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x28c00229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x28e00229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x29000229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x29200229, 0x00b10680, 0x00000000 }, + { 0x00800042, 0x27402529, 0x00b10740, 0x00b10d80 }, + { 0x00800042, 0x27602529, 0x00b10760, 0x00b10da0 }, + { 0x00800042, 0x27802529, 0x00b10780, 0x00b10dc0 }, + { 0x00800042, 0x27a02529, 0x00b107a0, 0x00b10de0 }, + { 0x00800042, 0x27c02529, 0x00b107c0, 0x00b10e00 }, + { 0x00800042, 0x27e02529, 0x00b107e0, 0x00b10e20 }, + { 0x00800042, 0x28002529, 0x00b10800, 0x00b10e40 }, + { 0x00800042, 0x28202529, 0x00b10820, 0x00b10e60 }, + { 0x00800042, 0x28402529, 0x00b10840, 0x00b10e80 }, + { 0x00800042, 0x28602529, 0x00b10860, 0x00b10ea0 }, + { 0x00800042, 0x28802529, 0x00b10880, 0x00b10ec0 }, + { 0x00800042, 0x28a02529, 0x00b108a0, 0x00b10ee0 }, + { 0x00800042, 0x28c02529, 0x00b108c0, 0x00b10f00 }, + { 0x00800042, 0x28e02529, 0x00b108e0, 0x00b10f20 }, + { 0x00800042, 0x29002529, 0x00b10900, 0x00b10f40 }, + { 0x00800042, 0x29202529, 0x00b10920, 0x00b10f60 }, + { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00020002 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x00000001, 0x241c0061, 0x00000000, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x10001000 }, + { 0x00010001, 0x241c0061, 0x00000000, 0x00000001 }, + { 0x00000009, 0x24040c21, 0x00210404, 0x00000001 }, + { 0x00000040, 0x24040421, 0x00210404, 0x0021041c }, + { 0x01000005, 0x20003dbc, 0x00210a50, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000005c }, + { 0x01000005, 0x20003dbc, 0x00210a52, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000043 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a005 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0414a006 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0411a005 }, + { 0x00800031, 0x26401d29, 0x008d0400, 0x0411a006 }, + { 0x00600040, 0x29404629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29504629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29604629, 0x008d0540, 0x008d0541 }, + { 0x00600040, 0x29704629, 0x008d0560, 0x008d0561 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0520 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0540 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d0560 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d0580 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0521 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0541 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d0561 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d0581 }, + { 0x00600040, 0x29c04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x29d04629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x29e04629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x29f04629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05e0 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d0600 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d0620 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0640 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05e1 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d0601 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d0621 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0641 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a005 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0414a006 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0411a005 }, + { 0x00800031, 0x26401d29, 0x008d0400, 0x0411a006 }, + { 0x00600040, 0x29804629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29904629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29a04629, 0x008d0540, 0x008d0541 }, + { 0x00600040, 0x29b04629, 0x008d0560, 0x008d0561 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d0520 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0540 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0560 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0580 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d0521 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0541 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0561 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0581 }, + { 0x00600040, 0x2a004629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x2a104629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x2a204629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x2a304629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d05e0 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0600 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0620 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0640 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d05e1 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0601 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0621 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0641 }, + { 0x00a02008, 0x29402d29, 0x00b10940, 0x00020002 }, + { 0x00a02008, 0x29802d29, 0x00b10980, 0x00020002 }, + { 0x00a02008, 0x29c02d29, 0x00b109c0, 0x00020002 }, + { 0x00a02008, 0x2a002d29, 0x00b10a00, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000004e }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a005 }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a006 }, + { 0x00600042, 0x29404629, 0x008d0500, 0x008d0501 }, + { 0x00600042, 0x29504629, 0x008d0520, 0x008d0521 }, + { 0x00600042, 0x29604629, 0x008d0540, 0x008d0541 }, + { 0x00600042, 0x29704629, 0x008d0560, 0x008d0561 }, + { 0x00600042, 0x29c04629, 0x008d0580, 0x008d0581 }, + { 0x00600042, 0x29d04629, 0x008d05a0, 0x008d05a1 }, + { 0x00600042, 0x29e04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600042, 0x29f04629, 0x008d05e0, 0x008d05e1 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a005 }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a006 }, + { 0x00600042, 0x29804629, 0x008d0500, 0x008d0501 }, + { 0x00600042, 0x29904629, 0x008d0520, 0x008d0521 }, + { 0x00600042, 0x29a04629, 0x008d0540, 0x008d0541 }, + { 0x00600042, 0x29b04629, 0x008d0560, 0x008d0561 }, + { 0x00600042, 0x2a004629, 0x008d0580, 0x008d0581 }, + { 0x00600042, 0x2a104629, 0x008d05a0, 0x008d05a1 }, + { 0x00600042, 0x2a204629, 0x008d05c0, 0x008d05c1 }, + { 0x00600042, 0x2a304629, 0x008d05e0, 0x008d05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000037 }, + { 0x01000005, 0x20003dbc, 0x00210a52, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000001f }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a005 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0414a006 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0411a005 }, + { 0x00800031, 0x26401d29, 0x008d0400, 0x0411a006 }, + { 0x00600042, 0x29404629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29504629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29604629, 0x008d0540, 0x008d0560 }, + { 0x00600042, 0x29704629, 0x008d0560, 0x008d0580 }, + { 0x00600042, 0x29c04629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x29d04629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x29e04629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x29f04629, 0x008d0620, 0x008d0640 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a005 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0414a006 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0411a005 }, + { 0x00800031, 0x26401d29, 0x008d0400, 0x0411a006 }, + { 0x00600042, 0x29804629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29904629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29a04629, 0x008d0540, 0x008d0560 }, + { 0x00600042, 0x29b04629, 0x008d0560, 0x008d0580 }, + { 0x00600042, 0x2a004629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x2a104629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x2a204629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x2a304629, 0x008d0620, 0x008d0640 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a005 }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a006 }, + { 0x00600001, 0x29400229, 0x008d0500, 0x00000000 }, + { 0x00600001, 0x29500229, 0x008d0520, 0x00000000 }, + { 0x00600001, 0x29600229, 0x008d0540, 0x00000000 }, + { 0x00600001, 0x29700229, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x29c00229, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x29d00229, 0x008d05a0, 0x00000000 }, + { 0x00600001, 0x29e00229, 0x008d05c0, 0x00000000 }, + { 0x00600001, 0x29f00229, 0x008d05e0, 0x00000000 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a005 }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a006 }, + { 0x00600001, 0x29800229, 0x008d0500, 0x00000000 }, + { 0x00600001, 0x29900229, 0x008d0520, 0x00000000 }, + { 0x00600001, 0x29a00229, 0x008d0540, 0x00000000 }, + { 0x00600001, 0x29b00229, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x2a000229, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x2a100229, 0x008d05a0, 0x00000000 }, + { 0x00600001, 0x2a200229, 0x008d05c0, 0x00000000 }, + { 0x00600001, 0x2a300229, 0x008d05e0, 0x00000000 }, + { 0x00802001, 0x2d800021, 0x00b10940, 0x00000000 }, + { 0x00802001, 0x2dc00021, 0x00b10980, 0x00000000 }, + { 0x00802001, 0x2e000021, 0x00b109c0, 0x00000000 }, + { 0x00802001, 0x2e400021, 0x00b10a00, 0x00000000 }, + { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00020002 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x00000001, 0x241c0061, 0x00000000, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x20002000 }, + { 0x00010001, 0x241c0061, 0x00000000, 0x00000001 }, + { 0x00000009, 0x24040c21, 0x00210404, 0x00000001 }, + { 0x00000040, 0x24040421, 0x00210404, 0x0021041c }, + { 0x01000005, 0x20003dbc, 0x00210a54, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000005c }, + { 0x01000005, 0x20003dbc, 0x00210a56, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000043 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0414a009 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0411a008 }, + { 0x00800031, 0x26401d29, 0x008d0400, 0x0411a009 }, + { 0x00600040, 0x29404629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29504629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29604629, 0x008d0540, 0x008d0541 }, + { 0x00600040, 0x29704629, 0x008d0560, 0x008d0561 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0520 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0540 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d0560 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d0580 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0521 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0541 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d0561 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d0581 }, + { 0x00600040, 0x29c04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x29d04629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x29e04629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x29f04629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05e0 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d0600 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d0620 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0640 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05e1 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d0601 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d0621 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0641 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0414a009 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0411a008 }, + { 0x00800031, 0x26401d29, 0x008d0400, 0x0411a009 }, + { 0x00600040, 0x29804629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29904629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29a04629, 0x008d0540, 0x008d0541 }, + { 0x00600040, 0x29b04629, 0x008d0560, 0x008d0561 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d0520 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0540 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0560 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0580 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d0521 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0541 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0561 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0581 }, + { 0x00600040, 0x2a004629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x2a104629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x2a204629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x2a304629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d05e0 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0600 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0620 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0640 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d05e1 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0601 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0621 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0641 }, + { 0x00a02008, 0x29402d29, 0x00b10940, 0x00020002 }, + { 0x00a02008, 0x29802d29, 0x00b10980, 0x00020002 }, + { 0x00a02008, 0x29c02d29, 0x00b109c0, 0x00020002 }, + { 0x00a02008, 0x2a002d29, 0x00b10a00, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000004e }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a008 }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a009 }, + { 0x00600042, 0x29404629, 0x008d0500, 0x008d0501 }, + { 0x00600042, 0x29504629, 0x008d0520, 0x008d0521 }, + { 0x00600042, 0x29604629, 0x008d0540, 0x008d0541 }, + { 0x00600042, 0x29704629, 0x008d0560, 0x008d0561 }, + { 0x00600042, 0x29c04629, 0x008d0580, 0x008d0581 }, + { 0x00600042, 0x29d04629, 0x008d05a0, 0x008d05a1 }, + { 0x00600042, 0x29e04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600042, 0x29f04629, 0x008d05e0, 0x008d05e1 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a008 }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a009 }, + { 0x00600042, 0x29804629, 0x008d0500, 0x008d0501 }, + { 0x00600042, 0x29904629, 0x008d0520, 0x008d0521 }, + { 0x00600042, 0x29a04629, 0x008d0540, 0x008d0541 }, + { 0x00600042, 0x29b04629, 0x008d0560, 0x008d0561 }, + { 0x00600042, 0x2a004629, 0x008d0580, 0x008d0581 }, + { 0x00600042, 0x2a104629, 0x008d05a0, 0x008d05a1 }, + { 0x00600042, 0x2a204629, 0x008d05c0, 0x008d05c1 }, + { 0x00600042, 0x2a304629, 0x008d05e0, 0x008d05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000037 }, + { 0x01000005, 0x20003dbc, 0x00210a56, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000001f }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0414a009 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0411a008 }, + { 0x00800031, 0x26401d29, 0x008d0400, 0x0411a009 }, + { 0x00600042, 0x29404629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29504629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29604629, 0x008d0540, 0x008d0560 }, + { 0x00600042, 0x29704629, 0x008d0560, 0x008d0580 }, + { 0x00600042, 0x29c04629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x29d04629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x29e04629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x29f04629, 0x008d0620, 0x008d0640 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0414a009 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0411a008 }, + { 0x00800031, 0x26401d29, 0x008d0400, 0x0411a009 }, + { 0x00600042, 0x29804629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29904629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29a04629, 0x008d0540, 0x008d0560 }, + { 0x00600042, 0x29b04629, 0x008d0560, 0x008d0580 }, + { 0x00600042, 0x2a004629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x2a104629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x2a204629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x2a304629, 0x008d0620, 0x008d0640 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a008 }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a009 }, + { 0x00600001, 0x29400229, 0x008d0500, 0x00000000 }, + { 0x00600001, 0x29500229, 0x008d0520, 0x00000000 }, + { 0x00600001, 0x29600229, 0x008d0540, 0x00000000 }, + { 0x00600001, 0x29700229, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x29c00229, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x29d00229, 0x008d05a0, 0x00000000 }, + { 0x00600001, 0x29e00229, 0x008d05c0, 0x00000000 }, + { 0x00600001, 0x29f00229, 0x008d05e0, 0x00000000 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a008 }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a009 }, + { 0x00600001, 0x29800229, 0x008d0500, 0x00000000 }, + { 0x00600001, 0x29900229, 0x008d0520, 0x00000000 }, + { 0x00600001, 0x29a00229, 0x008d0540, 0x00000000 }, + { 0x00600001, 0x29b00229, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x2a000229, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x2a100229, 0x008d05a0, 0x00000000 }, + { 0x00600001, 0x2a200229, 0x008d05c0, 0x00000000 }, + { 0x00600001, 0x2a300229, 0x008d05e0, 0x00000000 }, + { 0x00800042, 0x29402529, 0x00b10940, 0x00b10d80 }, + { 0x00800042, 0x29602529, 0x00b10960, 0x00b10da0 }, + { 0x00800042, 0x29802529, 0x00b10980, 0x00b10dc0 }, + { 0x00800042, 0x29a02529, 0x00b109a0, 0x00b10de0 }, + { 0x00800042, 0x29c02529, 0x00b109c0, 0x00b10e00 }, + { 0x00800042, 0x29e02529, 0x00b109e0, 0x00b10e20 }, + { 0x00800042, 0x2a002529, 0x00b10a00, 0x00b10e40 }, + { 0x00800042, 0x2a202529, 0x00b10a20, 0x00b10e60 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10a80, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10aa0, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10ac0, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10ae0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10b00, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10b20, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10b40, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10b60, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10b80, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10ba0, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10bc0, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10be0, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c00, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10c20, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10b60, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10a80, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10b80, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10aa0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10ba0, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10ac0, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10bc0, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10ae0, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10be0, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10b00, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10c00, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10b20, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c20, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10b40, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, + { 0x80800001, 0x474001b1, 0x00b10740, 0x00000000 }, + { 0x80800001, 0x476001b1, 0x00b10760, 0x00000000 }, + { 0x80800001, 0x478001b1, 0x00b10780, 0x00000000 }, + { 0x80800001, 0x47a001b1, 0x00b107a0, 0x00000000 }, + { 0x80800001, 0x47c001b1, 0x00b107c0, 0x00000000 }, + { 0x80800001, 0x47e001b1, 0x00b107e0, 0x00000000 }, + { 0x80800001, 0x480001b1, 0x00b10800, 0x00000000 }, + { 0x80800001, 0x482001b1, 0x00b10820, 0x00000000 }, + { 0x80800001, 0x484001b1, 0x00b10840, 0x00000000 }, + { 0x80800001, 0x486001b1, 0x00b10860, 0x00000000 }, + { 0x80800001, 0x488001b1, 0x00b10880, 0x00000000 }, + { 0x80800001, 0x48a001b1, 0x00b108a0, 0x00000000 }, + { 0x80800001, 0x48c001b1, 0x00b108c0, 0x00000000 }, + { 0x80800001, 0x48e001b1, 0x00b108e0, 0x00000000 }, + { 0x80800001, 0x490001b1, 0x00b10900, 0x00000000 }, + { 0x80800001, 0x492001b1, 0x00b10920, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, + { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, + { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, + { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, + { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, + { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, + { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05902000 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, + { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, + { 0x00800040, 0x294025ad, 0x00b10c60, 0x00b10940 }, + { 0x00800040, 0x296025ad, 0x00b10c80, 0x00b10960 }, + { 0x00800040, 0x298025ad, 0x00b10ca0, 0x00b10980 }, + { 0x00800040, 0x29a025ad, 0x00b10cc0, 0x00b109a0 }, + { 0x80800001, 0x494001b1, 0x00b10940, 0x00000000 }, + { 0x80800001, 0x496001b1, 0x00b10960, 0x00000000 }, + { 0x80800001, 0x498001b1, 0x00b10980, 0x00000000 }, + { 0x80800001, 0x49a001b1, 0x00b109a0, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302001 }, + { 0x00800040, 0x29c025a9, 0x00b10ce0, 0x00b109c0 }, + { 0x00800040, 0x29e025a9, 0x00b10d00, 0x00b109e0 }, + { 0x00800040, 0x2a0025a9, 0x00b10d20, 0x00b10a00 }, + { 0x00800040, 0x2a2025a9, 0x00b10d40, 0x00b10a20 }, + { 0x80800001, 0x49c001b1, 0x00b109c0, 0x00000000 }, + { 0x80800001, 0x49e001b1, 0x00b109e0, 0x00000000 }, + { 0x80800001, 0x4a0001b1, 0x00b10a00, 0x00000000 }, + { 0x80800001, 0x4a2001b1, 0x00b10a20, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302002 }, + { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, + { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, diff --git a/src/shaders/mpeg2/vld/field_bidirect.g4b.gen5 b/src/shaders/mpeg2/vld/field_bidirect.g4b.gen5 new file mode 100644 index 00000000..70dd7b36 --- /dev/null +++ b/src/shaders/mpeg2/vld/field_bidirect.g4b.gen5 @@ -0,0 +1,797 @@ + { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, + { 0x00000001, 0x34000020, 0x002102a0, 0x00000000 }, + { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00010001 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x00000001, 0x241c0061, 0x00000000, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x10001000 }, + { 0x00010001, 0x241c0061, 0x00000000, 0x00000001 }, + { 0x00000009, 0x24040c21, 0x00210404, 0x00000001 }, + { 0x00000040, 0x24040421, 0x00210404, 0x0021041c }, + { 0x01000005, 0x20002dbc, 0x00210a50, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000d4 }, + { 0x01000005, 0x20002dbc, 0x00210a52, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000009e }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a004 }, + { 0x00800040, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x27604629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x27804629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x27a04629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x27c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x27e04629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x28004629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x28204629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b10500 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10540 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10580 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b105c0 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10600 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10640 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b10680 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b106c0 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b10501 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10541 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10581 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b105c1 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10601 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10641 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b10681 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b106c1 }, + { 0x00800008, 0x27402d29, 0x00b10740, 0x00020002 }, + { 0x00800008, 0x27602d29, 0x00b10760, 0x00020002 }, + { 0x00800008, 0x27802d29, 0x00b10780, 0x00020002 }, + { 0x00800008, 0x27a02d29, 0x00b107a0, 0x00020002 }, + { 0x00800008, 0x27c02d29, 0x00b107c0, 0x00020002 }, + { 0x00800008, 0x27e02d29, 0x00b107e0, 0x00020002 }, + { 0x00800008, 0x28002d29, 0x00b10800, 0x00020002 }, + { 0x00800008, 0x28202d29, 0x00b10820, 0x00020002 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a004 }, + { 0x00800040, 0x28404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x28604629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x28804629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x28a04629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x28c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x28e04629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x29004629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x29204629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b10500 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10540 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10580 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b105c0 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10600 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10640 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b10680 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c0 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b10501 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10541 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10581 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b105c1 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10601 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10641 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b10681 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c1 }, + { 0x00800008, 0x28402d29, 0x00b10840, 0x00020002 }, + { 0x00800008, 0x28602d29, 0x00b10860, 0x00020002 }, + { 0x00800008, 0x28802d29, 0x00b10880, 0x00020002 }, + { 0x00800008, 0x28a02d29, 0x00b108a0, 0x00020002 }, + { 0x00800008, 0x28c02d29, 0x00b108c0, 0x00020002 }, + { 0x00800008, 0x28e02d29, 0x00b108e0, 0x00020002 }, + { 0x00800008, 0x29002d29, 0x00b10900, 0x00020002 }, + { 0x00800008, 0x29202d29, 0x00b10920, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000000a4 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, + { 0x00800042, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800042, 0x27604629, 0x00b10500, 0x00b10501 }, + { 0x00800042, 0x27804629, 0x00b10540, 0x00b10541 }, + { 0x00800042, 0x27a04629, 0x00b10580, 0x00b10581 }, + { 0x00800042, 0x27c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800042, 0x27e04629, 0x00b10600, 0x00b10601 }, + { 0x00800042, 0x28004629, 0x00b10640, 0x00b10641 }, + { 0x00800042, 0x28204629, 0x00b10680, 0x00b10681 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, + { 0x00800042, 0x28404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800042, 0x28604629, 0x00b10500, 0x00b10501 }, + { 0x00800042, 0x28804629, 0x00b10540, 0x00b10541 }, + { 0x00800042, 0x28a04629, 0x00b10580, 0x00b10581 }, + { 0x00800042, 0x28c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800042, 0x28e04629, 0x00b10600, 0x00b10601 }, + { 0x00800042, 0x29004629, 0x00b10640, 0x00b10641 }, + { 0x00800042, 0x29204629, 0x00b10680, 0x00b10681 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000072 }, + { 0x01000005, 0x20002dbc, 0x00210a52, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000003e }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a004 }, + { 0x00800042, 0x27404629, 0x00b104c0, 0x00b10500 }, + { 0x00800042, 0x27604629, 0x00b10500, 0x00b10540 }, + { 0x00800042, 0x27804629, 0x00b10540, 0x00b10580 }, + { 0x00800042, 0x27a04629, 0x00b10580, 0x00b105c0 }, + { 0x00800042, 0x27c04629, 0x00b105c0, 0x00b10600 }, + { 0x00800042, 0x27e04629, 0x00b10600, 0x00b10640 }, + { 0x00800042, 0x28004629, 0x00b10640, 0x00b10680 }, + { 0x00800042, 0x28204629, 0x00b10680, 0x00b106c0 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a004 }, + { 0x00800042, 0x28404629, 0x00b104c0, 0x00b10500 }, + { 0x00800042, 0x28604629, 0x00b10500, 0x00b10540 }, + { 0x00800042, 0x28804629, 0x00b10540, 0x00b10580 }, + { 0x00800042, 0x28a04629, 0x00b10580, 0x00b105c0 }, + { 0x00800042, 0x28c04629, 0x00b105c0, 0x00b10600 }, + { 0x00800042, 0x28e04629, 0x00b10600, 0x00b10640 }, + { 0x00800042, 0x29004629, 0x00b10640, 0x00b10680 }, + { 0x00800042, 0x29204629, 0x00b10680, 0x00b106c0 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, + { 0x00800001, 0x27400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x27600229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x27800229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x27a00229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x27c00229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x27e00229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x28000229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x28200229, 0x00b10680, 0x00000000 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, + { 0x00800001, 0x28400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x28600229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x28800229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x28a00229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x28c00229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x28e00229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x29000229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x29200229, 0x00b10680, 0x00000000 }, + { 0x00802001, 0x2d800021, 0x00b10740, 0x00000000 }, + { 0x00802001, 0x2dc00021, 0x00b10780, 0x00000000 }, + { 0x00802001, 0x2e000021, 0x00b107c0, 0x00000000 }, + { 0x00802001, 0x2e400021, 0x00b10800, 0x00000000 }, + { 0x00802001, 0x2e800021, 0x00b10840, 0x00000000 }, + { 0x00802001, 0x2ec00021, 0x00b10880, 0x00000000 }, + { 0x00802001, 0x2f000021, 0x00b108c0, 0x00000000 }, + { 0x00802001, 0x2f400021, 0x00b10900, 0x00000000 }, + { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00010001 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x00000001, 0x241c0061, 0x00000000, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x20002000 }, + { 0x00010001, 0x241c0061, 0x00000000, 0x00000001 }, + { 0x00000009, 0x24040c21, 0x00210404, 0x00000001 }, + { 0x00000040, 0x24040421, 0x00210404, 0x0021041c }, + { 0x01000005, 0x20002dbc, 0x00210a54, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000d4 }, + { 0x01000005, 0x20002dbc, 0x00210a56, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000009e }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a007 }, + { 0x00800040, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x27604629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x27804629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x27a04629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x27c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x27e04629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x28004629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x28204629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b10500 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10540 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10580 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b105c0 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10600 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10640 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b10680 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b106c0 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b10501 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10541 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10581 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b105c1 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10601 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10641 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b10681 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b106c1 }, + { 0x00800008, 0x27402d29, 0x00b10740, 0x00020002 }, + { 0x00800008, 0x27602d29, 0x00b10760, 0x00020002 }, + { 0x00800008, 0x27802d29, 0x00b10780, 0x00020002 }, + { 0x00800008, 0x27a02d29, 0x00b107a0, 0x00020002 }, + { 0x00800008, 0x27c02d29, 0x00b107c0, 0x00020002 }, + { 0x00800008, 0x27e02d29, 0x00b107e0, 0x00020002 }, + { 0x00800008, 0x28002d29, 0x00b10800, 0x00020002 }, + { 0x00800008, 0x28202d29, 0x00b10820, 0x00020002 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a007 }, + { 0x00800040, 0x28404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x28604629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x28804629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x28a04629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x28c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x28e04629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x29004629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x29204629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b10500 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10540 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10580 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b105c0 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10600 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10640 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b10680 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c0 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b10501 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10541 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10581 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b105c1 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10601 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10641 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b10681 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c1 }, + { 0x00800008, 0x28402d29, 0x00b10840, 0x00020002 }, + { 0x00800008, 0x28602d29, 0x00b10860, 0x00020002 }, + { 0x00800008, 0x28802d29, 0x00b10880, 0x00020002 }, + { 0x00800008, 0x28a02d29, 0x00b108a0, 0x00020002 }, + { 0x00800008, 0x28c02d29, 0x00b108c0, 0x00020002 }, + { 0x00800008, 0x28e02d29, 0x00b108e0, 0x00020002 }, + { 0x00800008, 0x29002d29, 0x00b10900, 0x00020002 }, + { 0x00800008, 0x29202d29, 0x00b10920, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000000a4 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, + { 0x00800042, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800042, 0x27604629, 0x00b10500, 0x00b10501 }, + { 0x00800042, 0x27804629, 0x00b10540, 0x00b10541 }, + { 0x00800042, 0x27a04629, 0x00b10580, 0x00b10581 }, + { 0x00800042, 0x27c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800042, 0x27e04629, 0x00b10600, 0x00b10601 }, + { 0x00800042, 0x28004629, 0x00b10640, 0x00b10641 }, + { 0x00800042, 0x28204629, 0x00b10680, 0x00b10681 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, + { 0x00800042, 0x28404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800042, 0x28604629, 0x00b10500, 0x00b10501 }, + { 0x00800042, 0x28804629, 0x00b10540, 0x00b10541 }, + { 0x00800042, 0x28a04629, 0x00b10580, 0x00b10581 }, + { 0x00800042, 0x28c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800042, 0x28e04629, 0x00b10600, 0x00b10601 }, + { 0x00800042, 0x29004629, 0x00b10640, 0x00b10641 }, + { 0x00800042, 0x29204629, 0x00b10680, 0x00b10681 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000072 }, + { 0x01000005, 0x20002dbc, 0x00210a56, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000003e }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a007 }, + { 0x00800042, 0x27404629, 0x00b104c0, 0x00b10500 }, + { 0x00800042, 0x27604629, 0x00b10500, 0x00b10540 }, + { 0x00800042, 0x27804629, 0x00b10540, 0x00b10580 }, + { 0x00800042, 0x27a04629, 0x00b10580, 0x00b105c0 }, + { 0x00800042, 0x27c04629, 0x00b105c0, 0x00b10600 }, + { 0x00800042, 0x27e04629, 0x00b10600, 0x00b10640 }, + { 0x00800042, 0x28004629, 0x00b10640, 0x00b10680 }, + { 0x00800042, 0x28204629, 0x00b10680, 0x00b106c0 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a007 }, + { 0x00800042, 0x28404629, 0x00b104c0, 0x00b10500 }, + { 0x00800042, 0x28604629, 0x00b10500, 0x00b10540 }, + { 0x00800042, 0x28804629, 0x00b10540, 0x00b10580 }, + { 0x00800042, 0x28a04629, 0x00b10580, 0x00b105c0 }, + { 0x00800042, 0x28c04629, 0x00b105c0, 0x00b10600 }, + { 0x00800042, 0x28e04629, 0x00b10600, 0x00b10640 }, + { 0x00800042, 0x29004629, 0x00b10640, 0x00b10680 }, + { 0x00800042, 0x29204629, 0x00b10680, 0x00b106c0 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, + { 0x00800001, 0x27400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x27600229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x27800229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x27a00229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x27c00229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x27e00229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x28000229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x28200229, 0x00b10680, 0x00000000 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, + { 0x00800001, 0x28400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x28600229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x28800229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x28a00229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x28c00229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x28e00229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x29000229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x29200229, 0x00b10680, 0x00000000 }, + { 0x00800042, 0x27402529, 0x00b10740, 0x00b10d80 }, + { 0x00800042, 0x27602529, 0x00b10760, 0x00b10da0 }, + { 0x00800042, 0x27802529, 0x00b10780, 0x00b10dc0 }, + { 0x00800042, 0x27a02529, 0x00b107a0, 0x00b10de0 }, + { 0x00800042, 0x27c02529, 0x00b107c0, 0x00b10e00 }, + { 0x00800042, 0x27e02529, 0x00b107e0, 0x00b10e20 }, + { 0x00800042, 0x28002529, 0x00b10800, 0x00b10e40 }, + { 0x00800042, 0x28202529, 0x00b10820, 0x00b10e60 }, + { 0x00800042, 0x28402529, 0x00b10840, 0x00b10e80 }, + { 0x00800042, 0x28602529, 0x00b10860, 0x00b10ea0 }, + { 0x00800042, 0x28802529, 0x00b10880, 0x00b10ec0 }, + { 0x00800042, 0x28a02529, 0x00b108a0, 0x00b10ee0 }, + { 0x00800042, 0x28c02529, 0x00b108c0, 0x00b10f00 }, + { 0x00800042, 0x28e02529, 0x00b108e0, 0x00b10f20 }, + { 0x00800042, 0x29002529, 0x00b10900, 0x00b10f40 }, + { 0x00800042, 0x29202529, 0x00b10920, 0x00b10f60 }, + { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00020002 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x00000001, 0x241c0061, 0x00000000, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x10001000 }, + { 0x00010001, 0x241c0061, 0x00000000, 0x00000001 }, + { 0x00000009, 0x24040c21, 0x00210404, 0x00000001 }, + { 0x00000040, 0x24040421, 0x00210404, 0x0021041c }, + { 0x01000005, 0x20003dbc, 0x00210a50, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000b8 }, + { 0x01000005, 0x20003dbc, 0x00210a52, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000086 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a005 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0248a006 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0218a005 }, + { 0x00800031, 0x26401d29, 0x408d0400, 0x0218a006 }, + { 0x00600040, 0x29404629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29504629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29604629, 0x008d0540, 0x008d0541 }, + { 0x00600040, 0x29704629, 0x008d0560, 0x008d0561 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0520 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0540 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d0560 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d0580 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0521 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0541 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d0561 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d0581 }, + { 0x00600040, 0x29c04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x29d04629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x29e04629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x29f04629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05e0 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d0600 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d0620 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0640 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05e1 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d0601 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d0621 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0641 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a005 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0248a006 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0218a005 }, + { 0x00800031, 0x26401d29, 0x408d0400, 0x0218a006 }, + { 0x00600040, 0x29804629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29904629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29a04629, 0x008d0540, 0x008d0541 }, + { 0x00600040, 0x29b04629, 0x008d0560, 0x008d0561 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d0520 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0540 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0560 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0580 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d0521 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0541 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0561 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0581 }, + { 0x00600040, 0x2a004629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x2a104629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x2a204629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x2a304629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d05e0 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0600 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0620 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0640 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d05e1 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0601 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0621 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0641 }, + { 0x00a02008, 0x29402d29, 0x00b10940, 0x00020002 }, + { 0x00a02008, 0x29802d29, 0x00b10980, 0x00020002 }, + { 0x00a02008, 0x29c02d29, 0x00b109c0, 0x00020002 }, + { 0x00a02008, 0x2a002d29, 0x00b10a00, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000009c }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a005 }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a006 }, + { 0x00600042, 0x29404629, 0x008d0500, 0x008d0501 }, + { 0x00600042, 0x29504629, 0x008d0520, 0x008d0521 }, + { 0x00600042, 0x29604629, 0x008d0540, 0x008d0541 }, + { 0x00600042, 0x29704629, 0x008d0560, 0x008d0561 }, + { 0x00600042, 0x29c04629, 0x008d0580, 0x008d0581 }, + { 0x00600042, 0x29d04629, 0x008d05a0, 0x008d05a1 }, + { 0x00600042, 0x29e04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600042, 0x29f04629, 0x008d05e0, 0x008d05e1 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a005 }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a006 }, + { 0x00600042, 0x29804629, 0x008d0500, 0x008d0501 }, + { 0x00600042, 0x29904629, 0x008d0520, 0x008d0521 }, + { 0x00600042, 0x29a04629, 0x008d0540, 0x008d0541 }, + { 0x00600042, 0x29b04629, 0x008d0560, 0x008d0561 }, + { 0x00600042, 0x2a004629, 0x008d0580, 0x008d0581 }, + { 0x00600042, 0x2a104629, 0x008d05a0, 0x008d05a1 }, + { 0x00600042, 0x2a204629, 0x008d05c0, 0x008d05c1 }, + { 0x00600042, 0x2a304629, 0x008d05e0, 0x008d05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000006e }, + { 0x01000005, 0x20003dbc, 0x00210a52, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000003e }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a005 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0248a006 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0218a005 }, + { 0x00800031, 0x26401d29, 0x408d0400, 0x0218a006 }, + { 0x00600042, 0x29404629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29504629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29604629, 0x008d0540, 0x008d0560 }, + { 0x00600042, 0x29704629, 0x008d0560, 0x008d0580 }, + { 0x00600042, 0x29c04629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x29d04629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x29e04629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x29f04629, 0x008d0620, 0x008d0640 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a005 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0248a006 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0218a005 }, + { 0x00800031, 0x26401d29, 0x408d0400, 0x0218a006 }, + { 0x00600042, 0x29804629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29904629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29a04629, 0x008d0540, 0x008d0560 }, + { 0x00600042, 0x29b04629, 0x008d0560, 0x008d0580 }, + { 0x00600042, 0x2a004629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x2a104629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x2a204629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x2a304629, 0x008d0620, 0x008d0640 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000002c }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a005 }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a006 }, + { 0x00600001, 0x29400229, 0x008d0500, 0x00000000 }, + { 0x00600001, 0x29500229, 0x008d0520, 0x00000000 }, + { 0x00600001, 0x29600229, 0x008d0540, 0x00000000 }, + { 0x00600001, 0x29700229, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x29c00229, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x29d00229, 0x008d05a0, 0x00000000 }, + { 0x00600001, 0x29e00229, 0x008d05c0, 0x00000000 }, + { 0x00600001, 0x29f00229, 0x008d05e0, 0x00000000 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a005 }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a006 }, + { 0x00600001, 0x29800229, 0x008d0500, 0x00000000 }, + { 0x00600001, 0x29900229, 0x008d0520, 0x00000000 }, + { 0x00600001, 0x29a00229, 0x008d0540, 0x00000000 }, + { 0x00600001, 0x29b00229, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x2a000229, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x2a100229, 0x008d05a0, 0x00000000 }, + { 0x00600001, 0x2a200229, 0x008d05c0, 0x00000000 }, + { 0x00600001, 0x2a300229, 0x008d05e0, 0x00000000 }, + { 0x00802001, 0x2d800021, 0x00b10940, 0x00000000 }, + { 0x00802001, 0x2dc00021, 0x00b10980, 0x00000000 }, + { 0x00802001, 0x2e000021, 0x00b109c0, 0x00000000 }, + { 0x00802001, 0x2e400021, 0x00b10a00, 0x00000000 }, + { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00020002 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x00000001, 0x241c0061, 0x00000000, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x20002000 }, + { 0x00010001, 0x241c0061, 0x00000000, 0x00000001 }, + { 0x00000009, 0x24040c21, 0x00210404, 0x00000001 }, + { 0x00000040, 0x24040421, 0x00210404, 0x0021041c }, + { 0x01000005, 0x20003dbc, 0x00210a54, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000b8 }, + { 0x01000005, 0x20003dbc, 0x00210a56, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000086 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0248a009 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0218a008 }, + { 0x00800031, 0x26401d29, 0x408d0400, 0x0218a009 }, + { 0x00600040, 0x29404629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29504629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29604629, 0x008d0540, 0x008d0541 }, + { 0x00600040, 0x29704629, 0x008d0560, 0x008d0561 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0520 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0540 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d0560 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d0580 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0521 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0541 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d0561 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d0581 }, + { 0x00600040, 0x29c04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x29d04629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x29e04629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x29f04629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05e0 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d0600 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d0620 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0640 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05e1 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d0601 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d0621 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0641 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0248a009 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0218a008 }, + { 0x00800031, 0x26401d29, 0x408d0400, 0x0218a009 }, + { 0x00600040, 0x29804629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29904629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29a04629, 0x008d0540, 0x008d0541 }, + { 0x00600040, 0x29b04629, 0x008d0560, 0x008d0561 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d0520 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0540 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0560 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0580 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d0521 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0541 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0561 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0581 }, + { 0x00600040, 0x2a004629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x2a104629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x2a204629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x2a304629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d05e0 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0600 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0620 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0640 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d05e1 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0601 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0621 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0641 }, + { 0x00a02008, 0x29402d29, 0x00b10940, 0x00020002 }, + { 0x00a02008, 0x29802d29, 0x00b10980, 0x00020002 }, + { 0x00a02008, 0x29c02d29, 0x00b109c0, 0x00020002 }, + { 0x00a02008, 0x2a002d29, 0x00b10a00, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000009c }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a008 }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a009 }, + { 0x00600042, 0x29404629, 0x008d0500, 0x008d0501 }, + { 0x00600042, 0x29504629, 0x008d0520, 0x008d0521 }, + { 0x00600042, 0x29604629, 0x008d0540, 0x008d0541 }, + { 0x00600042, 0x29704629, 0x008d0560, 0x008d0561 }, + { 0x00600042, 0x29c04629, 0x008d0580, 0x008d0581 }, + { 0x00600042, 0x29d04629, 0x008d05a0, 0x008d05a1 }, + { 0x00600042, 0x29e04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600042, 0x29f04629, 0x008d05e0, 0x008d05e1 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a008 }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a009 }, + { 0x00600042, 0x29804629, 0x008d0500, 0x008d0501 }, + { 0x00600042, 0x29904629, 0x008d0520, 0x008d0521 }, + { 0x00600042, 0x29a04629, 0x008d0540, 0x008d0541 }, + { 0x00600042, 0x29b04629, 0x008d0560, 0x008d0561 }, + { 0x00600042, 0x2a004629, 0x008d0580, 0x008d0581 }, + { 0x00600042, 0x2a104629, 0x008d05a0, 0x008d05a1 }, + { 0x00600042, 0x2a204629, 0x008d05c0, 0x008d05c1 }, + { 0x00600042, 0x2a304629, 0x008d05e0, 0x008d05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000006e }, + { 0x01000005, 0x20003dbc, 0x00210a56, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000003e }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0248a009 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0218a008 }, + { 0x00800031, 0x26401d29, 0x408d0400, 0x0218a009 }, + { 0x00600042, 0x29404629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29504629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29604629, 0x008d0540, 0x008d0560 }, + { 0x00600042, 0x29704629, 0x008d0560, 0x008d0580 }, + { 0x00600042, 0x29c04629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x29d04629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x29e04629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x29f04629, 0x008d0620, 0x008d0640 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0248a009 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0218a008 }, + { 0x00800031, 0x26401d29, 0x408d0400, 0x0218a009 }, + { 0x00600042, 0x29804629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29904629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29a04629, 0x008d0540, 0x008d0560 }, + { 0x00600042, 0x29b04629, 0x008d0560, 0x008d0580 }, + { 0x00600042, 0x2a004629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x2a104629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x2a204629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x2a304629, 0x008d0620, 0x008d0640 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000002c }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a008 }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a009 }, + { 0x00600001, 0x29400229, 0x008d0500, 0x00000000 }, + { 0x00600001, 0x29500229, 0x008d0520, 0x00000000 }, + { 0x00600001, 0x29600229, 0x008d0540, 0x00000000 }, + { 0x00600001, 0x29700229, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x29c00229, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x29d00229, 0x008d05a0, 0x00000000 }, + { 0x00600001, 0x29e00229, 0x008d05c0, 0x00000000 }, + { 0x00600001, 0x29f00229, 0x008d05e0, 0x00000000 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a008 }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a009 }, + { 0x00600001, 0x29800229, 0x008d0500, 0x00000000 }, + { 0x00600001, 0x29900229, 0x008d0520, 0x00000000 }, + { 0x00600001, 0x29a00229, 0x008d0540, 0x00000000 }, + { 0x00600001, 0x29b00229, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x2a000229, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x2a100229, 0x008d05a0, 0x00000000 }, + { 0x00600001, 0x2a200229, 0x008d05c0, 0x00000000 }, + { 0x00600001, 0x2a300229, 0x008d05e0, 0x00000000 }, + { 0x00800042, 0x29402529, 0x00b10940, 0x00b10d80 }, + { 0x00800042, 0x29602529, 0x00b10960, 0x00b10da0 }, + { 0x00800042, 0x29802529, 0x00b10980, 0x00b10dc0 }, + { 0x00800042, 0x29a02529, 0x00b109a0, 0x00b10de0 }, + { 0x00800042, 0x29c02529, 0x00b109c0, 0x00b10e00 }, + { 0x00800042, 0x29e02529, 0x00b109e0, 0x00b10e20 }, + { 0x00800042, 0x2a002529, 0x00b10a00, 0x00b10e40 }, + { 0x00800042, 0x2a202529, 0x00b10a20, 0x00b10e60 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10a80, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10aa0, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10ac0, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10ae0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10b00, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10b20, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10b40, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10b60, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10b80, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10ba0, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10bc0, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10be0, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c00, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10c20, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10b60, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10a80, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10b80, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10aa0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10ba0, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10ac0, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10bc0, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10ae0, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10be0, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10b00, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10c00, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10b20, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c20, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10b40, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, + { 0x80800001, 0x474001b1, 0x00b10740, 0x00000000 }, + { 0x80800001, 0x476001b1, 0x00b10760, 0x00000000 }, + { 0x80800001, 0x478001b1, 0x00b10780, 0x00000000 }, + { 0x80800001, 0x47a001b1, 0x00b107a0, 0x00000000 }, + { 0x80800001, 0x47c001b1, 0x00b107c0, 0x00000000 }, + { 0x80800001, 0x47e001b1, 0x00b107e0, 0x00000000 }, + { 0x80800001, 0x480001b1, 0x00b10800, 0x00000000 }, + { 0x80800001, 0x482001b1, 0x00b10820, 0x00000000 }, + { 0x80800001, 0x484001b1, 0x00b10840, 0x00000000 }, + { 0x80800001, 0x486001b1, 0x00b10860, 0x00000000 }, + { 0x80800001, 0x488001b1, 0x00b10880, 0x00000000 }, + { 0x80800001, 0x48a001b1, 0x00b108a0, 0x00000000 }, + { 0x80800001, 0x48c001b1, 0x00b108c0, 0x00000000 }, + { 0x80800001, 0x48e001b1, 0x00b108e0, 0x00000000 }, + { 0x80800001, 0x490001b1, 0x00b10900, 0x00000000 }, + { 0x80800001, 0x492001b1, 0x00b10920, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, + { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, + { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, + { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, + { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, + { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, + { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x12082000 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, + { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, + { 0x00800040, 0x294025ad, 0x00b10c60, 0x00b10940 }, + { 0x00800040, 0x296025ad, 0x00b10c80, 0x00b10960 }, + { 0x00800040, 0x298025ad, 0x00b10ca0, 0x00b10980 }, + { 0x00800040, 0x29a025ad, 0x00b10cc0, 0x00b109a0 }, + { 0x80800001, 0x494001b1, 0x00b10940, 0x00000000 }, + { 0x80800001, 0x496001b1, 0x00b10960, 0x00000000 }, + { 0x80800001, 0x498001b1, 0x00b10980, 0x00000000 }, + { 0x80800001, 0x49a001b1, 0x00b109a0, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082001 }, + { 0x00800040, 0x29c025a9, 0x00b10ce0, 0x00b109c0 }, + { 0x00800040, 0x29e025a9, 0x00b10d00, 0x00b109e0 }, + { 0x00800040, 0x2a0025a9, 0x00b10d20, 0x00b10a00 }, + { 0x00800040, 0x2a2025a9, 0x00b10d40, 0x00b10a20 }, + { 0x80800001, 0x49c001b1, 0x00b109c0, 0x00000000 }, + { 0x80800001, 0x49e001b1, 0x00b109e0, 0x00000000 }, + { 0x80800001, 0x4a0001b1, 0x00b10a00, 0x00000000 }, + { 0x80800001, 0x4a2001b1, 0x00b10a20, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082002 }, + { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, + { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, diff --git a/src/shaders/mpeg2/vld/field_bidirect_16x8.g4a b/src/shaders/mpeg2/vld/field_bidirect_16x8.g4a new file mode 100644 index 00000000..e4fc1788 --- /dev/null +++ b/src/shaders/mpeg2/vld/field_bidirect_16x8.g4a @@ -0,0 +1,31 @@ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data + g32: message descriptor for reading reference data */ + +mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; +mov (2) g31.0<1>UD g82.12<2,2,1>UW {align1}; +define(`UV_red',`0xffffffffUD') +define(`UV_white',`0x7f7f7f7fUD') +define(`UV_green',`0x00000000UD') +mov(2) g6.0<1>UD g82.12<2,2,1>UW {align1}; +mov(1) g6.8<1>UD 0x000f000fUD { align1 }; +mov(16) m1<1>UD 0xFFFFFFFFUD {align1 compr}; +mov(16) m3<1>UD 0xFFFFFFFFUD {align1 compr}; +mov(16) m5<1>UD 0xFFFFFFFFUD {align1 compr}; +mov(16) m7<1>UD 0xFFFFFFFFUD {align1 compr}; +send (16) 0 acc0<1>UW g6<8,8,1>UW write(0, 0, 2, 0) mlen 9 rlen 0 { align1 }; +/*Fill U buffer & V buffer with 0x7F*/ +shr (2) g6.0<1>UD g82.12<2,2,1>UW 1UW {align1}; +mov(1) g6.8<1>UD 0x00070007UD { align1 }; +mov (16) m1<1>UD UV_white {align1 compr}; +send (16) 0 acc0<1>UW g6<8,8,1>UW write(2, 0, 2, 0) mlen 3 rlen 0 { align1 }; +send (16) 0 acc0<1>UW g6<8,8,1>UW write(1, 0, 2, 0) mlen 3 rlen 0 { align1 }; +send (16) 0 acc0<1>UW g0<8,8,1>UW + thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; diff --git a/src/shaders/mpeg2/vld/field_bidirect_16x8.g4b b/src/shaders/mpeg2/vld/field_bidirect_16x8.g4b new file mode 100644 index 00000000..9d95f70b --- /dev/null +++ b/src/shaders/mpeg2/vld/field_bidirect_16x8.g4b @@ -0,0 +1,15 @@ + { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x00200001, 0x20c00121, 0x00450a4c, 0x00000000 }, + { 0x00000001, 0x20c80061, 0x00000000, 0x000f000f }, + { 0x00802001, 0x20200062, 0x00000000, 0xffffffff }, + { 0x00802001, 0x20600062, 0x00000000, 0xffffffff }, + { 0x00802001, 0x20a00062, 0x00000000, 0xffffffff }, + { 0x00802001, 0x20e00062, 0x00000000, 0xffffffff }, + { 0x00800031, 0x24001d28, 0x008d00c0, 0x05902000 }, + { 0x00200008, 0x20c02d21, 0x00450a4c, 0x00010001 }, + { 0x00000001, 0x20c80061, 0x00000000, 0x00070007 }, + { 0x00802001, 0x20200062, 0x00000000, 0x7f7f7f7f }, + { 0x00800031, 0x24001d28, 0x008d00c0, 0x05302002 }, + { 0x00800031, 0x24001d28, 0x008d00c0, 0x05302001 }, + { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, diff --git a/src/shaders/mpeg2/vld/field_bidirect_16x8.g4b.gen5 b/src/shaders/mpeg2/vld/field_bidirect_16x8.g4b.gen5 new file mode 100644 index 00000000..b12bddc0 --- /dev/null +++ b/src/shaders/mpeg2/vld/field_bidirect_16x8.g4b.gen5 @@ -0,0 +1,15 @@ + { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x00200001, 0x20c00121, 0x00450a4c, 0x00000000 }, + { 0x00000001, 0x20c80061, 0x00000000, 0x000f000f }, + { 0x00802001, 0x20200062, 0x00000000, 0xffffffff }, + { 0x00802001, 0x20600062, 0x00000000, 0xffffffff }, + { 0x00802001, 0x20a00062, 0x00000000, 0xffffffff }, + { 0x00802001, 0x20e00062, 0x00000000, 0xffffffff }, + { 0x00800031, 0x24001d28, 0x508d00c0, 0x12082000 }, + { 0x00200008, 0x20c02d21, 0x00450a4c, 0x00010001 }, + { 0x00000001, 0x20c80061, 0x00000000, 0x00070007 }, + { 0x00802001, 0x20200062, 0x00000000, 0x7f7f7f7f }, + { 0x00800031, 0x24001d28, 0x508d00c0, 0x06082002 }, + { 0x00800031, 0x24001d28, 0x508d00c0, 0x06082001 }, + { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, diff --git a/src/shaders/mpeg2/vld/field_forward.g4a b/src/shaders/mpeg2/vld/field_forward.g4a new file mode 100644 index 00000000..611cf0c3 --- /dev/null +++ b/src/shaders/mpeg2/vld/field_forward.g4a @@ -0,0 +1,116 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data + g32: message descriptor for reading reference data */ + +mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; +mov (2) g31.0<1>UD g82.12<2,2,1>UW {align1}; +mov (1) g126.8<1>UD ip {align1}; +mov (1) ip g21.0<1,1,1>UD {align1}; + +and.nz (1) null g82.2<1,1,1>UW 0x0800UW {align1}; //second field-picture? +(f0) jmpi first_field_picture; + +and (1) g32.0<1>UW g82.10<1,1,1>UW 0x0003UW {align1}; +cmp.e (1) null g32.0<1,1,1>UW 0x0002UW {align1}; //bottom field? +(f0) jmpi bottom_field; + +top_field: +and.z (1) null g82.2<1,1,1>UW 0x1000UW {align1}; //motion vertical field select forward +(f0) jmpi first_field_picture; //second field-picture top field from top +mov (1) g32.28<1>UD 1UD {align1}; +jmpi first_field_picture; //second field-picture top field from bottom + +bottom_field: +and.nz (1) null g82.2<1,1,1>UW 0x1000UW {align1}; //motion vertical field select forward +(f0) jmpi first_field_picture; //second field-picture bottom field from bottom +mov (1) g32.28<1>UD 0UD {align1}; +jmpi second_field_picture; //second field-picture bottom field from top + +//Y of top field +first_field_picture: +asr (2) g31.14<1>W g82.16<2,2,1>W 1W {align1}; +add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +mov (1) g32.28<1>UD 0UD {align1}; +and.nz (1) null g82.2<1,1,1>UW 0x1000UW {align1}; //motion vertical field select forward +(f0) mov (1) g32.28<1>UD 1UD {align1}; +shl (1) g32.4<1>UD g32.4<1,1,1>UD 1UD {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD g32.28<1,1,1>UD {align1}; +define(`surface',`4') +define(`mv1',`g82.16') +define(`mv2',`g82.18') +include(`field_motion_y.g4i') +//UV of top field +shr (2) g31.0<1>UD g31.0<2,2,1>UD 1UD {align1}; +asr (2) g31.14<1>W g82.16<2,2,1>W 2W {align1}; +add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +mov (1) g32.28<1>UD 0UD {align1}; +and.nz (1) null g82.2<1,1,1>UW 0x1000UW {align1}; //motion vertical field select forward +(f0) mov (1) g32.28<1>UD 1UD {align1}; +shl (1) g32.4<1>UD g32.4<1,1,1>UD 1UD {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD g32.28<1,1,1>UD {align1}; +define(`surface_u', `5') +define(`surface_v', `6') +define(`mv1',`g82.16') +define(`mv2',`g82.18') +include(`field_motion_uv.g4i') +jmpi field_addidct; + +second_field_picture: +//Y of bottom field +asr (2) g31.14<1>W g82.16<2,2,1>W 1W {align1}; +add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +shl (1) g32.4<1>UD g32.4<1,1,1>UD 1UD {align1}; +define(`surface',`3') +define(`mv1',`g82.16') +define(`mv2',`g82.18') +include(`field_motion_y.g4i') +//UV of bottom field +shr (2) g31.0<1>UD g31.0<2,2,1>UD 1UD {align1}; +asr (2) g31.14<1>W g82.16<2,2,1>W 2W {align1}; +add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +shl (1) g32.4<1>UD g32.4<1,1,1>UD 1UD {align1}; +define(`surface_u', `10') +define(`surface_v', `11') +define(`mv1',`g82.16') +define(`mv2',`g82.18') +include(`field_motion_uv.g4i') + +field_addidct: +include(`field_addidct.g4i') +out: +send (16) 0 acc0<1>UW g0<8,8,1>UW + thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; diff --git a/src/shaders/mpeg2/vld/field_forward.g4b b/src/shaders/mpeg2/vld/field_forward.g4b new file mode 100644 index 00000000..aa059f1c --- /dev/null +++ b/src/shaders/mpeg2/vld/field_forward.g4b @@ -0,0 +1,768 @@ + { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, + { 0x00000001, 0x34000020, 0x002102a0, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x08000800 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000000b }, + { 0x00000005, 0x24002d29, 0x00210a4a, 0x00030003 }, + { 0x01000010, 0x20002d3c, 0x00210400, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, + { 0x01000005, 0x20002d3c, 0x00210a42, 0x10001000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x241c0061, 0x00000000, 0x00000001 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000004 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x10001000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000002 }, + { 0x00000001, 0x241c0061, 0x00000000, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000014a }, + { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00010001 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x00000001, 0x241c0061, 0x00000000, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x10001000 }, + { 0x00010001, 0x241c0061, 0x00000000, 0x00000001 }, + { 0x00000009, 0x24040c21, 0x00210404, 0x00000001 }, + { 0x00000040, 0x24040421, 0x00210404, 0x0021041c }, + { 0x01000005, 0x20002dbc, 0x00210a50, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000006a }, + { 0x01000005, 0x20002dbc, 0x00210a52, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000004f }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a004 }, + { 0x00800040, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x27604629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x27804629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x27a04629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x27c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x27e04629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x28004629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x28204629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b10500 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10540 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10580 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b105c0 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10600 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10640 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b10680 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b106c0 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b10501 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10541 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10581 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b105c1 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10601 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10641 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b10681 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b106c1 }, + { 0x00800008, 0x27402d29, 0x00b10740, 0x00020002 }, + { 0x00800008, 0x27602d29, 0x00b10760, 0x00020002 }, + { 0x00800008, 0x27802d29, 0x00b10780, 0x00020002 }, + { 0x00800008, 0x27a02d29, 0x00b107a0, 0x00020002 }, + { 0x00800008, 0x27c02d29, 0x00b107c0, 0x00020002 }, + { 0x00800008, 0x27e02d29, 0x00b107e0, 0x00020002 }, + { 0x00800008, 0x28002d29, 0x00b10800, 0x00020002 }, + { 0x00800008, 0x28202d29, 0x00b10820, 0x00020002 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a004 }, + { 0x00800040, 0x28404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x28604629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x28804629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x28a04629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x28c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x28e04629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x29004629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x29204629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b10500 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10540 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10580 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b105c0 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10600 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10640 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b10680 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c0 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b10501 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10541 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10581 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b105c1 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10601 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10641 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b10681 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c1 }, + { 0x00800008, 0x28402d29, 0x00b10840, 0x00020002 }, + { 0x00800008, 0x28602d29, 0x00b10860, 0x00020002 }, + { 0x00800008, 0x28802d29, 0x00b10880, 0x00020002 }, + { 0x00800008, 0x28a02d29, 0x00b108a0, 0x00020002 }, + { 0x00800008, 0x28c02d29, 0x00b108c0, 0x00020002 }, + { 0x00800008, 0x28e02d29, 0x00b108e0, 0x00020002 }, + { 0x00800008, 0x29002d29, 0x00b10900, 0x00020002 }, + { 0x00800008, 0x29202d29, 0x00b10920, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, + { 0x00800042, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800042, 0x27604629, 0x00b10500, 0x00b10501 }, + { 0x00800042, 0x27804629, 0x00b10540, 0x00b10541 }, + { 0x00800042, 0x27a04629, 0x00b10580, 0x00b10581 }, + { 0x00800042, 0x27c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800042, 0x27e04629, 0x00b10600, 0x00b10601 }, + { 0x00800042, 0x28004629, 0x00b10640, 0x00b10641 }, + { 0x00800042, 0x28204629, 0x00b10680, 0x00b10681 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, + { 0x00800042, 0x28404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800042, 0x28604629, 0x00b10500, 0x00b10501 }, + { 0x00800042, 0x28804629, 0x00b10540, 0x00b10541 }, + { 0x00800042, 0x28a04629, 0x00b10580, 0x00b10581 }, + { 0x00800042, 0x28c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800042, 0x28e04629, 0x00b10600, 0x00b10601 }, + { 0x00800042, 0x29004629, 0x00b10640, 0x00b10641 }, + { 0x00800042, 0x29204629, 0x00b10680, 0x00b10681 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000039 }, + { 0x01000005, 0x20002dbc, 0x00210a52, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000001f }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a004 }, + { 0x00800042, 0x27404629, 0x00b104c0, 0x00b10500 }, + { 0x00800042, 0x27604629, 0x00b10500, 0x00b10540 }, + { 0x00800042, 0x27804629, 0x00b10540, 0x00b10580 }, + { 0x00800042, 0x27a04629, 0x00b10580, 0x00b105c0 }, + { 0x00800042, 0x27c04629, 0x00b105c0, 0x00b10600 }, + { 0x00800042, 0x27e04629, 0x00b10600, 0x00b10640 }, + { 0x00800042, 0x28004629, 0x00b10640, 0x00b10680 }, + { 0x00800042, 0x28204629, 0x00b10680, 0x00b106c0 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a004 }, + { 0x00800042, 0x28404629, 0x00b104c0, 0x00b10500 }, + { 0x00800042, 0x28604629, 0x00b10500, 0x00b10540 }, + { 0x00800042, 0x28804629, 0x00b10540, 0x00b10580 }, + { 0x00800042, 0x28a04629, 0x00b10580, 0x00b105c0 }, + { 0x00800042, 0x28c04629, 0x00b105c0, 0x00b10600 }, + { 0x00800042, 0x28e04629, 0x00b10600, 0x00b10640 }, + { 0x00800042, 0x29004629, 0x00b10640, 0x00b10680 }, + { 0x00800042, 0x29204629, 0x00b10680, 0x00b106c0 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, + { 0x00800001, 0x27400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x27600229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x27800229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x27a00229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x27c00229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x27e00229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x28000229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x28200229, 0x00b10680, 0x00000000 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, + { 0x00800001, 0x28400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x28600229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x28800229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x28a00229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x28c00229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x28e00229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x29000229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x29200229, 0x00b10680, 0x00000000 }, + { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00020002 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x00000001, 0x241c0061, 0x00000000, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x10001000 }, + { 0x00010001, 0x241c0061, 0x00000000, 0x00000001 }, + { 0x00000009, 0x24040c21, 0x00210404, 0x00000001 }, + { 0x00000040, 0x24040421, 0x00210404, 0x0021041c }, + { 0x01000005, 0x20003dbc, 0x00210a50, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000005c }, + { 0x01000005, 0x20003dbc, 0x00210a52, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000043 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a005 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0414a006 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0411a005 }, + { 0x00800031, 0x26401d29, 0x008d0400, 0x0411a006 }, + { 0x00600040, 0x29404629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29504629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29604629, 0x008d0540, 0x008d0541 }, + { 0x00600040, 0x29704629, 0x008d0560, 0x008d0561 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0520 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0540 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d0560 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d0580 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0521 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0541 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d0561 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d0581 }, + { 0x00600040, 0x29c04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x29d04629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x29e04629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x29f04629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05e0 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d0600 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d0620 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0640 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05e1 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d0601 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d0621 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0641 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a005 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0414a006 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0411a005 }, + { 0x00800031, 0x26401d29, 0x008d0400, 0x0411a006 }, + { 0x00600040, 0x29804629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29904629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29a04629, 0x008d0540, 0x008d0541 }, + { 0x00600040, 0x29b04629, 0x008d0560, 0x008d0561 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d0520 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0540 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0560 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0580 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d0521 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0541 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0561 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0581 }, + { 0x00600040, 0x2a004629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x2a104629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x2a204629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x2a304629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d05e0 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0600 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0620 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0640 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d05e1 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0601 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0621 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0641 }, + { 0x00a02008, 0x29402d29, 0x00b10940, 0x00020002 }, + { 0x00a02008, 0x29802d29, 0x00b10980, 0x00020002 }, + { 0x00a02008, 0x29c02d29, 0x00b109c0, 0x00020002 }, + { 0x00a02008, 0x2a002d29, 0x00b10a00, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000004e }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a005 }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a006 }, + { 0x00600042, 0x29404629, 0x008d0500, 0x008d0501 }, + { 0x00600042, 0x29504629, 0x008d0520, 0x008d0521 }, + { 0x00600042, 0x29604629, 0x008d0540, 0x008d0541 }, + { 0x00600042, 0x29704629, 0x008d0560, 0x008d0561 }, + { 0x00600042, 0x29c04629, 0x008d0580, 0x008d0581 }, + { 0x00600042, 0x29d04629, 0x008d05a0, 0x008d05a1 }, + { 0x00600042, 0x29e04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600042, 0x29f04629, 0x008d05e0, 0x008d05e1 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a005 }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a006 }, + { 0x00600042, 0x29804629, 0x008d0500, 0x008d0501 }, + { 0x00600042, 0x29904629, 0x008d0520, 0x008d0521 }, + { 0x00600042, 0x29a04629, 0x008d0540, 0x008d0541 }, + { 0x00600042, 0x29b04629, 0x008d0560, 0x008d0561 }, + { 0x00600042, 0x2a004629, 0x008d0580, 0x008d0581 }, + { 0x00600042, 0x2a104629, 0x008d05a0, 0x008d05a1 }, + { 0x00600042, 0x2a204629, 0x008d05c0, 0x008d05c1 }, + { 0x00600042, 0x2a304629, 0x008d05e0, 0x008d05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000037 }, + { 0x01000005, 0x20003dbc, 0x00210a52, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000001f }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a005 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0414a006 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0411a005 }, + { 0x00800031, 0x26401d29, 0x008d0400, 0x0411a006 }, + { 0x00600042, 0x29404629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29504629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29604629, 0x008d0540, 0x008d0560 }, + { 0x00600042, 0x29704629, 0x008d0560, 0x008d0580 }, + { 0x00600042, 0x29c04629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x29d04629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x29e04629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x29f04629, 0x008d0620, 0x008d0640 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a005 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0414a006 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0411a005 }, + { 0x00800031, 0x26401d29, 0x008d0400, 0x0411a006 }, + { 0x00600042, 0x29804629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29904629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29a04629, 0x008d0540, 0x008d0560 }, + { 0x00600042, 0x29b04629, 0x008d0560, 0x008d0580 }, + { 0x00600042, 0x2a004629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x2a104629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x2a204629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x2a304629, 0x008d0620, 0x008d0640 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a005 }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a006 }, + { 0x00600001, 0x29400229, 0x008d0500, 0x00000000 }, + { 0x00600001, 0x29500229, 0x008d0520, 0x00000000 }, + { 0x00600001, 0x29600229, 0x008d0540, 0x00000000 }, + { 0x00600001, 0x29700229, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x29c00229, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x29d00229, 0x008d05a0, 0x00000000 }, + { 0x00600001, 0x29e00229, 0x008d05c0, 0x00000000 }, + { 0x00600001, 0x29f00229, 0x008d05e0, 0x00000000 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a005 }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a006 }, + { 0x00600001, 0x29800229, 0x008d0500, 0x00000000 }, + { 0x00600001, 0x29900229, 0x008d0520, 0x00000000 }, + { 0x00600001, 0x29a00229, 0x008d0540, 0x00000000 }, + { 0x00600001, 0x29b00229, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x2a000229, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x2a100229, 0x008d05a0, 0x00000000 }, + { 0x00600001, 0x2a200229, 0x008d05c0, 0x00000000 }, + { 0x00600001, 0x2a300229, 0x008d05e0, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000141 }, + { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00010001 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x00000009, 0x24040c21, 0x00210404, 0x00000001 }, + { 0x01000005, 0x20002dbc, 0x00210a50, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000006a }, + { 0x01000005, 0x20002dbc, 0x00210a52, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000004f }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a003 }, + { 0x00800040, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x27604629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x27804629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x27a04629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x27c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x27e04629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x28004629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x28204629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b10500 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10540 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10580 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b105c0 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10600 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10640 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b10680 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b106c0 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b10501 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10541 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10581 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b105c1 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10601 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10641 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b10681 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b106c1 }, + { 0x00800008, 0x27402d29, 0x00b10740, 0x00020002 }, + { 0x00800008, 0x27602d29, 0x00b10760, 0x00020002 }, + { 0x00800008, 0x27802d29, 0x00b10780, 0x00020002 }, + { 0x00800008, 0x27a02d29, 0x00b107a0, 0x00020002 }, + { 0x00800008, 0x27c02d29, 0x00b107c0, 0x00020002 }, + { 0x00800008, 0x27e02d29, 0x00b107e0, 0x00020002 }, + { 0x00800008, 0x28002d29, 0x00b10800, 0x00020002 }, + { 0x00800008, 0x28202d29, 0x00b10820, 0x00020002 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a003 }, + { 0x00800040, 0x28404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x28604629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x28804629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x28a04629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x28c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x28e04629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x29004629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x29204629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b10500 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10540 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10580 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b105c0 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10600 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10640 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b10680 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c0 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b10501 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10541 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10581 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b105c1 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10601 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10641 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b10681 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c1 }, + { 0x00800008, 0x28402d29, 0x00b10840, 0x00020002 }, + { 0x00800008, 0x28602d29, 0x00b10860, 0x00020002 }, + { 0x00800008, 0x28802d29, 0x00b10880, 0x00020002 }, + { 0x00800008, 0x28a02d29, 0x00b108a0, 0x00020002 }, + { 0x00800008, 0x28c02d29, 0x00b108c0, 0x00020002 }, + { 0x00800008, 0x28e02d29, 0x00b108e0, 0x00020002 }, + { 0x00800008, 0x29002d29, 0x00b10900, 0x00020002 }, + { 0x00800008, 0x29202d29, 0x00b10920, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a003 }, + { 0x00800042, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800042, 0x27604629, 0x00b10500, 0x00b10501 }, + { 0x00800042, 0x27804629, 0x00b10540, 0x00b10541 }, + { 0x00800042, 0x27a04629, 0x00b10580, 0x00b10581 }, + { 0x00800042, 0x27c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800042, 0x27e04629, 0x00b10600, 0x00b10601 }, + { 0x00800042, 0x28004629, 0x00b10640, 0x00b10641 }, + { 0x00800042, 0x28204629, 0x00b10680, 0x00b10681 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a003 }, + { 0x00800042, 0x28404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800042, 0x28604629, 0x00b10500, 0x00b10501 }, + { 0x00800042, 0x28804629, 0x00b10540, 0x00b10541 }, + { 0x00800042, 0x28a04629, 0x00b10580, 0x00b10581 }, + { 0x00800042, 0x28c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800042, 0x28e04629, 0x00b10600, 0x00b10601 }, + { 0x00800042, 0x29004629, 0x00b10640, 0x00b10641 }, + { 0x00800042, 0x29204629, 0x00b10680, 0x00b10681 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000039 }, + { 0x01000005, 0x20002dbc, 0x00210a52, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000001f }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a003 }, + { 0x00800042, 0x27404629, 0x00b104c0, 0x00b10500 }, + { 0x00800042, 0x27604629, 0x00b10500, 0x00b10540 }, + { 0x00800042, 0x27804629, 0x00b10540, 0x00b10580 }, + { 0x00800042, 0x27a04629, 0x00b10580, 0x00b105c0 }, + { 0x00800042, 0x27c04629, 0x00b105c0, 0x00b10600 }, + { 0x00800042, 0x27e04629, 0x00b10600, 0x00b10640 }, + { 0x00800042, 0x28004629, 0x00b10640, 0x00b10680 }, + { 0x00800042, 0x28204629, 0x00b10680, 0x00b106c0 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a003 }, + { 0x00800042, 0x28404629, 0x00b104c0, 0x00b10500 }, + { 0x00800042, 0x28604629, 0x00b10500, 0x00b10540 }, + { 0x00800042, 0x28804629, 0x00b10540, 0x00b10580 }, + { 0x00800042, 0x28a04629, 0x00b10580, 0x00b105c0 }, + { 0x00800042, 0x28c04629, 0x00b105c0, 0x00b10600 }, + { 0x00800042, 0x28e04629, 0x00b10600, 0x00b10640 }, + { 0x00800042, 0x29004629, 0x00b10640, 0x00b10680 }, + { 0x00800042, 0x29204629, 0x00b10680, 0x00b106c0 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a003 }, + { 0x00800001, 0x27400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x27600229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x27800229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x27a00229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x27c00229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x27e00229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x28000229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x28200229, 0x00b10680, 0x00000000 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a003 }, + { 0x00800001, 0x28400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x28600229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x28800229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x28a00229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x28c00229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x28e00229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x29000229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x29200229, 0x00b10680, 0x00000000 }, + { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00020002 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x00000009, 0x24040c21, 0x00210404, 0x00000001 }, + { 0x01000005, 0x20003dbc, 0x00210a50, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000005c }, + { 0x01000005, 0x20003dbc, 0x00210a52, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000043 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a00a }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0414a00b }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0411a00a }, + { 0x00800031, 0x26401d29, 0x008d0400, 0x0411a00b }, + { 0x00600040, 0x29404629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29504629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29604629, 0x008d0540, 0x008d0541 }, + { 0x00600040, 0x29704629, 0x008d0560, 0x008d0561 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0520 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0540 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d0560 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d0580 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0521 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0541 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d0561 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d0581 }, + { 0x00600040, 0x29c04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x29d04629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x29e04629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x29f04629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05e0 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d0600 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d0620 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0640 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05e1 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d0601 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d0621 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0641 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a00a }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0414a00b }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0411a00a }, + { 0x00800031, 0x26401d29, 0x008d0400, 0x0411a00b }, + { 0x00600040, 0x29804629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29904629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29a04629, 0x008d0540, 0x008d0541 }, + { 0x00600040, 0x29b04629, 0x008d0560, 0x008d0561 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d0520 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0540 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0560 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0580 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d0521 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0541 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0561 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0581 }, + { 0x00600040, 0x2a004629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x2a104629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x2a204629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x2a304629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d05e0 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0600 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0620 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0640 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d05e1 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0601 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0621 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0641 }, + { 0x00a02008, 0x29402d29, 0x00b10940, 0x00020002 }, + { 0x00a02008, 0x29802d29, 0x00b10980, 0x00020002 }, + { 0x00a02008, 0x29c02d29, 0x00b109c0, 0x00020002 }, + { 0x00a02008, 0x2a002d29, 0x00b10a00, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000004e }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a00a }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a00b }, + { 0x00600042, 0x29404629, 0x008d0500, 0x008d0501 }, + { 0x00600042, 0x29504629, 0x008d0520, 0x008d0521 }, + { 0x00600042, 0x29604629, 0x008d0540, 0x008d0541 }, + { 0x00600042, 0x29704629, 0x008d0560, 0x008d0561 }, + { 0x00600042, 0x29c04629, 0x008d0580, 0x008d0581 }, + { 0x00600042, 0x29d04629, 0x008d05a0, 0x008d05a1 }, + { 0x00600042, 0x29e04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600042, 0x29f04629, 0x008d05e0, 0x008d05e1 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a00a }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a00b }, + { 0x00600042, 0x29804629, 0x008d0500, 0x008d0501 }, + { 0x00600042, 0x29904629, 0x008d0520, 0x008d0521 }, + { 0x00600042, 0x29a04629, 0x008d0540, 0x008d0541 }, + { 0x00600042, 0x29b04629, 0x008d0560, 0x008d0561 }, + { 0x00600042, 0x2a004629, 0x008d0580, 0x008d0581 }, + { 0x00600042, 0x2a104629, 0x008d05a0, 0x008d05a1 }, + { 0x00600042, 0x2a204629, 0x008d05c0, 0x008d05c1 }, + { 0x00600042, 0x2a304629, 0x008d05e0, 0x008d05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000037 }, + { 0x01000005, 0x20003dbc, 0x00210a52, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000001f }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a00a }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0414a00b }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0411a00a }, + { 0x00800031, 0x26401d29, 0x008d0400, 0x0411a00b }, + { 0x00600042, 0x29404629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29504629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29604629, 0x008d0540, 0x008d0560 }, + { 0x00600042, 0x29704629, 0x008d0560, 0x008d0580 }, + { 0x00600042, 0x29c04629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x29d04629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x29e04629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x29f04629, 0x008d0620, 0x008d0640 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a00a }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0414a00b }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0411a00a }, + { 0x00800031, 0x26401d29, 0x008d0400, 0x0411a00b }, + { 0x00600042, 0x29804629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29904629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29a04629, 0x008d0540, 0x008d0560 }, + { 0x00600042, 0x29b04629, 0x008d0560, 0x008d0580 }, + { 0x00600042, 0x2a004629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x2a104629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x2a204629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x2a304629, 0x008d0620, 0x008d0640 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a00a }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a00b }, + { 0x00600001, 0x29400229, 0x008d0500, 0x00000000 }, + { 0x00600001, 0x29500229, 0x008d0520, 0x00000000 }, + { 0x00600001, 0x29600229, 0x008d0540, 0x00000000 }, + { 0x00600001, 0x29700229, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x29c00229, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x29d00229, 0x008d05a0, 0x00000000 }, + { 0x00600001, 0x29e00229, 0x008d05c0, 0x00000000 }, + { 0x00600001, 0x29f00229, 0x008d05e0, 0x00000000 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a00a }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a00b }, + { 0x00600001, 0x29800229, 0x008d0500, 0x00000000 }, + { 0x00600001, 0x29900229, 0x008d0520, 0x00000000 }, + { 0x00600001, 0x29a00229, 0x008d0540, 0x00000000 }, + { 0x00600001, 0x29b00229, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x2a000229, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x2a100229, 0x008d05a0, 0x00000000 }, + { 0x00600001, 0x2a200229, 0x008d05c0, 0x00000000 }, + { 0x00600001, 0x2a300229, 0x008d05e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10a80, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10aa0, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10ac0, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10ae0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10b00, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10b20, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10b40, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10b60, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10b80, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10ba0, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10bc0, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10be0, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c00, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10c20, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10b60, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10a80, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10b80, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10aa0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10ba0, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10ac0, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10bc0, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10ae0, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10be0, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10b00, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10c00, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10b20, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c20, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10b40, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, + { 0x80800001, 0x474001b1, 0x00b10740, 0x00000000 }, + { 0x80800001, 0x476001b1, 0x00b10760, 0x00000000 }, + { 0x80800001, 0x478001b1, 0x00b10780, 0x00000000 }, + { 0x80800001, 0x47a001b1, 0x00b107a0, 0x00000000 }, + { 0x80800001, 0x47c001b1, 0x00b107c0, 0x00000000 }, + { 0x80800001, 0x47e001b1, 0x00b107e0, 0x00000000 }, + { 0x80800001, 0x480001b1, 0x00b10800, 0x00000000 }, + { 0x80800001, 0x482001b1, 0x00b10820, 0x00000000 }, + { 0x80800001, 0x484001b1, 0x00b10840, 0x00000000 }, + { 0x80800001, 0x486001b1, 0x00b10860, 0x00000000 }, + { 0x80800001, 0x488001b1, 0x00b10880, 0x00000000 }, + { 0x80800001, 0x48a001b1, 0x00b108a0, 0x00000000 }, + { 0x80800001, 0x48c001b1, 0x00b108c0, 0x00000000 }, + { 0x80800001, 0x48e001b1, 0x00b108e0, 0x00000000 }, + { 0x80800001, 0x490001b1, 0x00b10900, 0x00000000 }, + { 0x80800001, 0x492001b1, 0x00b10920, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, + { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, + { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, + { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, + { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, + { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, + { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05902000 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, + { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, + { 0x00800040, 0x294025ad, 0x00b10c60, 0x00b10940 }, + { 0x00800040, 0x296025ad, 0x00b10c80, 0x00b10960 }, + { 0x00800040, 0x298025ad, 0x00b10ca0, 0x00b10980 }, + { 0x00800040, 0x29a025ad, 0x00b10cc0, 0x00b109a0 }, + { 0x80800001, 0x494001b1, 0x00b10940, 0x00000000 }, + { 0x80800001, 0x496001b1, 0x00b10960, 0x00000000 }, + { 0x80800001, 0x498001b1, 0x00b10980, 0x00000000 }, + { 0x80800001, 0x49a001b1, 0x00b109a0, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302001 }, + { 0x00800040, 0x29c025a9, 0x00b10ce0, 0x00b109c0 }, + { 0x00800040, 0x29e025a9, 0x00b10d00, 0x00b109e0 }, + { 0x00800040, 0x2a0025a9, 0x00b10d20, 0x00b10a00 }, + { 0x00800040, 0x2a2025a9, 0x00b10d40, 0x00b10a20 }, + { 0x80800001, 0x49c001b1, 0x00b109c0, 0x00000000 }, + { 0x80800001, 0x49e001b1, 0x00b109e0, 0x00000000 }, + { 0x80800001, 0x4a0001b1, 0x00b10a00, 0x00000000 }, + { 0x80800001, 0x4a2001b1, 0x00b10a20, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302002 }, + { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, + { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, diff --git a/src/shaders/mpeg2/vld/field_forward.g4b.gen5 b/src/shaders/mpeg2/vld/field_forward.g4b.gen5 new file mode 100644 index 00000000..4867a5e5 --- /dev/null +++ b/src/shaders/mpeg2/vld/field_forward.g4b.gen5 @@ -0,0 +1,768 @@ + { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, + { 0x00000001, 0x34000020, 0x002102a0, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x08000800 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00000005, 0x24002d29, 0x00210a4a, 0x00030003 }, + { 0x01000010, 0x20002d3c, 0x00210400, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, + { 0x01000005, 0x20002d3c, 0x00210a42, 0x10001000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000000c }, + { 0x00000001, 0x241c0061, 0x00000000, 0x00000001 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x10001000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, + { 0x00000001, 0x241c0061, 0x00000000, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000294 }, + { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00010001 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x00000001, 0x241c0061, 0x00000000, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x10001000 }, + { 0x00010001, 0x241c0061, 0x00000000, 0x00000001 }, + { 0x00000009, 0x24040c21, 0x00210404, 0x00000001 }, + { 0x00000040, 0x24040421, 0x00210404, 0x0021041c }, + { 0x01000005, 0x20002dbc, 0x00210a50, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000d4 }, + { 0x01000005, 0x20002dbc, 0x00210a52, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000009e }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a004 }, + { 0x00800040, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x27604629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x27804629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x27a04629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x27c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x27e04629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x28004629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x28204629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b10500 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10540 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10580 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b105c0 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10600 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10640 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b10680 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b106c0 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b10501 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10541 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10581 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b105c1 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10601 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10641 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b10681 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b106c1 }, + { 0x00800008, 0x27402d29, 0x00b10740, 0x00020002 }, + { 0x00800008, 0x27602d29, 0x00b10760, 0x00020002 }, + { 0x00800008, 0x27802d29, 0x00b10780, 0x00020002 }, + { 0x00800008, 0x27a02d29, 0x00b107a0, 0x00020002 }, + { 0x00800008, 0x27c02d29, 0x00b107c0, 0x00020002 }, + { 0x00800008, 0x27e02d29, 0x00b107e0, 0x00020002 }, + { 0x00800008, 0x28002d29, 0x00b10800, 0x00020002 }, + { 0x00800008, 0x28202d29, 0x00b10820, 0x00020002 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a004 }, + { 0x00800040, 0x28404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x28604629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x28804629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x28a04629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x28c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x28e04629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x29004629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x29204629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b10500 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10540 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10580 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b105c0 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10600 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10640 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b10680 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c0 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b10501 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10541 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10581 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b105c1 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10601 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10641 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b10681 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c1 }, + { 0x00800008, 0x28402d29, 0x00b10840, 0x00020002 }, + { 0x00800008, 0x28602d29, 0x00b10860, 0x00020002 }, + { 0x00800008, 0x28802d29, 0x00b10880, 0x00020002 }, + { 0x00800008, 0x28a02d29, 0x00b108a0, 0x00020002 }, + { 0x00800008, 0x28c02d29, 0x00b108c0, 0x00020002 }, + { 0x00800008, 0x28e02d29, 0x00b108e0, 0x00020002 }, + { 0x00800008, 0x29002d29, 0x00b10900, 0x00020002 }, + { 0x00800008, 0x29202d29, 0x00b10920, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000000a4 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, + { 0x00800042, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800042, 0x27604629, 0x00b10500, 0x00b10501 }, + { 0x00800042, 0x27804629, 0x00b10540, 0x00b10541 }, + { 0x00800042, 0x27a04629, 0x00b10580, 0x00b10581 }, + { 0x00800042, 0x27c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800042, 0x27e04629, 0x00b10600, 0x00b10601 }, + { 0x00800042, 0x28004629, 0x00b10640, 0x00b10641 }, + { 0x00800042, 0x28204629, 0x00b10680, 0x00b10681 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, + { 0x00800042, 0x28404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800042, 0x28604629, 0x00b10500, 0x00b10501 }, + { 0x00800042, 0x28804629, 0x00b10540, 0x00b10541 }, + { 0x00800042, 0x28a04629, 0x00b10580, 0x00b10581 }, + { 0x00800042, 0x28c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800042, 0x28e04629, 0x00b10600, 0x00b10601 }, + { 0x00800042, 0x29004629, 0x00b10640, 0x00b10641 }, + { 0x00800042, 0x29204629, 0x00b10680, 0x00b10681 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000072 }, + { 0x01000005, 0x20002dbc, 0x00210a52, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000003e }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a004 }, + { 0x00800042, 0x27404629, 0x00b104c0, 0x00b10500 }, + { 0x00800042, 0x27604629, 0x00b10500, 0x00b10540 }, + { 0x00800042, 0x27804629, 0x00b10540, 0x00b10580 }, + { 0x00800042, 0x27a04629, 0x00b10580, 0x00b105c0 }, + { 0x00800042, 0x27c04629, 0x00b105c0, 0x00b10600 }, + { 0x00800042, 0x27e04629, 0x00b10600, 0x00b10640 }, + { 0x00800042, 0x28004629, 0x00b10640, 0x00b10680 }, + { 0x00800042, 0x28204629, 0x00b10680, 0x00b106c0 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a004 }, + { 0x00800042, 0x28404629, 0x00b104c0, 0x00b10500 }, + { 0x00800042, 0x28604629, 0x00b10500, 0x00b10540 }, + { 0x00800042, 0x28804629, 0x00b10540, 0x00b10580 }, + { 0x00800042, 0x28a04629, 0x00b10580, 0x00b105c0 }, + { 0x00800042, 0x28c04629, 0x00b105c0, 0x00b10600 }, + { 0x00800042, 0x28e04629, 0x00b10600, 0x00b10640 }, + { 0x00800042, 0x29004629, 0x00b10640, 0x00b10680 }, + { 0x00800042, 0x29204629, 0x00b10680, 0x00b106c0 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, + { 0x00800001, 0x27400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x27600229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x27800229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x27a00229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x27c00229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x27e00229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x28000229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x28200229, 0x00b10680, 0x00000000 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, + { 0x00800001, 0x28400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x28600229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x28800229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x28a00229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x28c00229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x28e00229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x29000229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x29200229, 0x00b10680, 0x00000000 }, + { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00020002 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x00000001, 0x241c0061, 0x00000000, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x10001000 }, + { 0x00010001, 0x241c0061, 0x00000000, 0x00000001 }, + { 0x00000009, 0x24040c21, 0x00210404, 0x00000001 }, + { 0x00000040, 0x24040421, 0x00210404, 0x0021041c }, + { 0x01000005, 0x20003dbc, 0x00210a50, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000b8 }, + { 0x01000005, 0x20003dbc, 0x00210a52, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000086 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a005 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0248a006 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0218a005 }, + { 0x00800031, 0x26401d29, 0x408d0400, 0x0218a006 }, + { 0x00600040, 0x29404629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29504629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29604629, 0x008d0540, 0x008d0541 }, + { 0x00600040, 0x29704629, 0x008d0560, 0x008d0561 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0520 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0540 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d0560 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d0580 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0521 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0541 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d0561 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d0581 }, + { 0x00600040, 0x29c04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x29d04629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x29e04629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x29f04629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05e0 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d0600 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d0620 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0640 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05e1 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d0601 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d0621 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0641 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a005 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0248a006 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0218a005 }, + { 0x00800031, 0x26401d29, 0x408d0400, 0x0218a006 }, + { 0x00600040, 0x29804629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29904629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29a04629, 0x008d0540, 0x008d0541 }, + { 0x00600040, 0x29b04629, 0x008d0560, 0x008d0561 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d0520 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0540 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0560 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0580 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d0521 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0541 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0561 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0581 }, + { 0x00600040, 0x2a004629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x2a104629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x2a204629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x2a304629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d05e0 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0600 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0620 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0640 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d05e1 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0601 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0621 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0641 }, + { 0x00a02008, 0x29402d29, 0x00b10940, 0x00020002 }, + { 0x00a02008, 0x29802d29, 0x00b10980, 0x00020002 }, + { 0x00a02008, 0x29c02d29, 0x00b109c0, 0x00020002 }, + { 0x00a02008, 0x2a002d29, 0x00b10a00, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000009c }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a005 }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a006 }, + { 0x00600042, 0x29404629, 0x008d0500, 0x008d0501 }, + { 0x00600042, 0x29504629, 0x008d0520, 0x008d0521 }, + { 0x00600042, 0x29604629, 0x008d0540, 0x008d0541 }, + { 0x00600042, 0x29704629, 0x008d0560, 0x008d0561 }, + { 0x00600042, 0x29c04629, 0x008d0580, 0x008d0581 }, + { 0x00600042, 0x29d04629, 0x008d05a0, 0x008d05a1 }, + { 0x00600042, 0x29e04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600042, 0x29f04629, 0x008d05e0, 0x008d05e1 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a005 }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a006 }, + { 0x00600042, 0x29804629, 0x008d0500, 0x008d0501 }, + { 0x00600042, 0x29904629, 0x008d0520, 0x008d0521 }, + { 0x00600042, 0x29a04629, 0x008d0540, 0x008d0541 }, + { 0x00600042, 0x29b04629, 0x008d0560, 0x008d0561 }, + { 0x00600042, 0x2a004629, 0x008d0580, 0x008d0581 }, + { 0x00600042, 0x2a104629, 0x008d05a0, 0x008d05a1 }, + { 0x00600042, 0x2a204629, 0x008d05c0, 0x008d05c1 }, + { 0x00600042, 0x2a304629, 0x008d05e0, 0x008d05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000006e }, + { 0x01000005, 0x20003dbc, 0x00210a52, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000003e }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a005 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0248a006 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0218a005 }, + { 0x00800031, 0x26401d29, 0x408d0400, 0x0218a006 }, + { 0x00600042, 0x29404629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29504629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29604629, 0x008d0540, 0x008d0560 }, + { 0x00600042, 0x29704629, 0x008d0560, 0x008d0580 }, + { 0x00600042, 0x29c04629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x29d04629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x29e04629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x29f04629, 0x008d0620, 0x008d0640 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a005 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0248a006 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0218a005 }, + { 0x00800031, 0x26401d29, 0x408d0400, 0x0218a006 }, + { 0x00600042, 0x29804629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29904629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29a04629, 0x008d0540, 0x008d0560 }, + { 0x00600042, 0x29b04629, 0x008d0560, 0x008d0580 }, + { 0x00600042, 0x2a004629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x2a104629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x2a204629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x2a304629, 0x008d0620, 0x008d0640 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000002c }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a005 }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a006 }, + { 0x00600001, 0x29400229, 0x008d0500, 0x00000000 }, + { 0x00600001, 0x29500229, 0x008d0520, 0x00000000 }, + { 0x00600001, 0x29600229, 0x008d0540, 0x00000000 }, + { 0x00600001, 0x29700229, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x29c00229, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x29d00229, 0x008d05a0, 0x00000000 }, + { 0x00600001, 0x29e00229, 0x008d05c0, 0x00000000 }, + { 0x00600001, 0x29f00229, 0x008d05e0, 0x00000000 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a005 }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a006 }, + { 0x00600001, 0x29800229, 0x008d0500, 0x00000000 }, + { 0x00600001, 0x29900229, 0x008d0520, 0x00000000 }, + { 0x00600001, 0x29a00229, 0x008d0540, 0x00000000 }, + { 0x00600001, 0x29b00229, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x2a000229, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x2a100229, 0x008d05a0, 0x00000000 }, + { 0x00600001, 0x2a200229, 0x008d05c0, 0x00000000 }, + { 0x00600001, 0x2a300229, 0x008d05e0, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000282 }, + { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00010001 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x00000009, 0x24040c21, 0x00210404, 0x00000001 }, + { 0x01000005, 0x20002dbc, 0x00210a50, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000d4 }, + { 0x01000005, 0x20002dbc, 0x00210a52, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000009e }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a003 }, + { 0x00800040, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x27604629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x27804629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x27a04629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x27c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x27e04629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x28004629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x28204629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b10500 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10540 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10580 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b105c0 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10600 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10640 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b10680 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b106c0 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b10501 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10541 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10581 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b105c1 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10601 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10641 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b10681 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b106c1 }, + { 0x00800008, 0x27402d29, 0x00b10740, 0x00020002 }, + { 0x00800008, 0x27602d29, 0x00b10760, 0x00020002 }, + { 0x00800008, 0x27802d29, 0x00b10780, 0x00020002 }, + { 0x00800008, 0x27a02d29, 0x00b107a0, 0x00020002 }, + { 0x00800008, 0x27c02d29, 0x00b107c0, 0x00020002 }, + { 0x00800008, 0x27e02d29, 0x00b107e0, 0x00020002 }, + { 0x00800008, 0x28002d29, 0x00b10800, 0x00020002 }, + { 0x00800008, 0x28202d29, 0x00b10820, 0x00020002 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a003 }, + { 0x00800040, 0x28404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x28604629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x28804629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x28a04629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x28c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x28e04629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x29004629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x29204629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b10500 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10540 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10580 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b105c0 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10600 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10640 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b10680 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c0 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b10501 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10541 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10581 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b105c1 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10601 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10641 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b10681 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c1 }, + { 0x00800008, 0x28402d29, 0x00b10840, 0x00020002 }, + { 0x00800008, 0x28602d29, 0x00b10860, 0x00020002 }, + { 0x00800008, 0x28802d29, 0x00b10880, 0x00020002 }, + { 0x00800008, 0x28a02d29, 0x00b108a0, 0x00020002 }, + { 0x00800008, 0x28c02d29, 0x00b108c0, 0x00020002 }, + { 0x00800008, 0x28e02d29, 0x00b108e0, 0x00020002 }, + { 0x00800008, 0x29002d29, 0x00b10900, 0x00020002 }, + { 0x00800008, 0x29202d29, 0x00b10920, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000000a4 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a003 }, + { 0x00800042, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800042, 0x27604629, 0x00b10500, 0x00b10501 }, + { 0x00800042, 0x27804629, 0x00b10540, 0x00b10541 }, + { 0x00800042, 0x27a04629, 0x00b10580, 0x00b10581 }, + { 0x00800042, 0x27c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800042, 0x27e04629, 0x00b10600, 0x00b10601 }, + { 0x00800042, 0x28004629, 0x00b10640, 0x00b10641 }, + { 0x00800042, 0x28204629, 0x00b10680, 0x00b10681 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a003 }, + { 0x00800042, 0x28404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800042, 0x28604629, 0x00b10500, 0x00b10501 }, + { 0x00800042, 0x28804629, 0x00b10540, 0x00b10541 }, + { 0x00800042, 0x28a04629, 0x00b10580, 0x00b10581 }, + { 0x00800042, 0x28c04629, 0x00b105c0, 0x00b105c1 }, + { 0x00800042, 0x28e04629, 0x00b10600, 0x00b10601 }, + { 0x00800042, 0x29004629, 0x00b10640, 0x00b10641 }, + { 0x00800042, 0x29204629, 0x00b10680, 0x00b10681 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000072 }, + { 0x01000005, 0x20002dbc, 0x00210a52, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000003e }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a003 }, + { 0x00800042, 0x27404629, 0x00b104c0, 0x00b10500 }, + { 0x00800042, 0x27604629, 0x00b10500, 0x00b10540 }, + { 0x00800042, 0x27804629, 0x00b10540, 0x00b10580 }, + { 0x00800042, 0x27a04629, 0x00b10580, 0x00b105c0 }, + { 0x00800042, 0x27c04629, 0x00b105c0, 0x00b10600 }, + { 0x00800042, 0x27e04629, 0x00b10600, 0x00b10640 }, + { 0x00800042, 0x28004629, 0x00b10640, 0x00b10680 }, + { 0x00800042, 0x28204629, 0x00b10680, 0x00b106c0 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a003 }, + { 0x00800042, 0x28404629, 0x00b104c0, 0x00b10500 }, + { 0x00800042, 0x28604629, 0x00b10500, 0x00b10540 }, + { 0x00800042, 0x28804629, 0x00b10540, 0x00b10580 }, + { 0x00800042, 0x28a04629, 0x00b10580, 0x00b105c0 }, + { 0x00800042, 0x28c04629, 0x00b105c0, 0x00b10600 }, + { 0x00800042, 0x28e04629, 0x00b10600, 0x00b10640 }, + { 0x00800042, 0x29004629, 0x00b10640, 0x00b10680 }, + { 0x00800042, 0x29204629, 0x00b10680, 0x00b106c0 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a003 }, + { 0x00800001, 0x27400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x27600229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x27800229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x27a00229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x27c00229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x27e00229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x28000229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x28200229, 0x00b10680, 0x00000000 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a003 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a003 }, + { 0x00800001, 0x28400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x28600229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x28800229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x28a00229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x28c00229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x28e00229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x29000229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x29200229, 0x00b10680, 0x00000000 }, + { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00020002 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x00000009, 0x24040c21, 0x00210404, 0x00000001 }, + { 0x01000005, 0x20003dbc, 0x00210a50, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000b8 }, + { 0x01000005, 0x20003dbc, 0x00210a52, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000086 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a00a }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0248a00b }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0218a00a }, + { 0x00800031, 0x26401d29, 0x408d0400, 0x0218a00b }, + { 0x00600040, 0x29404629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29504629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29604629, 0x008d0540, 0x008d0541 }, + { 0x00600040, 0x29704629, 0x008d0560, 0x008d0561 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0520 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0540 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d0560 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d0580 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0521 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0541 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d0561 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d0581 }, + { 0x00600040, 0x29c04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x29d04629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x29e04629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x29f04629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05e0 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d0600 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d0620 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0640 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05e1 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d0601 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d0621 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0641 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a00a }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0248a00b }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0218a00a }, + { 0x00800031, 0x26401d29, 0x408d0400, 0x0218a00b }, + { 0x00600040, 0x29804629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29904629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29a04629, 0x008d0540, 0x008d0541 }, + { 0x00600040, 0x29b04629, 0x008d0560, 0x008d0561 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d0520 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0540 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0560 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0580 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d0521 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0541 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0561 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0581 }, + { 0x00600040, 0x2a004629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x2a104629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x2a204629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x2a304629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d05e0 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0600 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0620 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0640 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d05e1 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0601 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0621 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0641 }, + { 0x00a02008, 0x29402d29, 0x00b10940, 0x00020002 }, + { 0x00a02008, 0x29802d29, 0x00b10980, 0x00020002 }, + { 0x00a02008, 0x29c02d29, 0x00b109c0, 0x00020002 }, + { 0x00a02008, 0x2a002d29, 0x00b10a00, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000009c }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a00a }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a00b }, + { 0x00600042, 0x29404629, 0x008d0500, 0x008d0501 }, + { 0x00600042, 0x29504629, 0x008d0520, 0x008d0521 }, + { 0x00600042, 0x29604629, 0x008d0540, 0x008d0541 }, + { 0x00600042, 0x29704629, 0x008d0560, 0x008d0561 }, + { 0x00600042, 0x29c04629, 0x008d0580, 0x008d0581 }, + { 0x00600042, 0x29d04629, 0x008d05a0, 0x008d05a1 }, + { 0x00600042, 0x29e04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600042, 0x29f04629, 0x008d05e0, 0x008d05e1 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a00a }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a00b }, + { 0x00600042, 0x29804629, 0x008d0500, 0x008d0501 }, + { 0x00600042, 0x29904629, 0x008d0520, 0x008d0521 }, + { 0x00600042, 0x29a04629, 0x008d0540, 0x008d0541 }, + { 0x00600042, 0x29b04629, 0x008d0560, 0x008d0561 }, + { 0x00600042, 0x2a004629, 0x008d0580, 0x008d0581 }, + { 0x00600042, 0x2a104629, 0x008d05a0, 0x008d05a1 }, + { 0x00600042, 0x2a204629, 0x008d05c0, 0x008d05c1 }, + { 0x00600042, 0x2a304629, 0x008d05e0, 0x008d05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000006e }, + { 0x01000005, 0x20003dbc, 0x00210a52, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000003e }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a00a }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0248a00b }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0218a00a }, + { 0x00800031, 0x26401d29, 0x408d0400, 0x0218a00b }, + { 0x00600042, 0x29404629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29504629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29604629, 0x008d0540, 0x008d0560 }, + { 0x00600042, 0x29704629, 0x008d0560, 0x008d0580 }, + { 0x00600042, 0x29c04629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x29d04629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x29e04629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x29f04629, 0x008d0620, 0x008d0640 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a00a }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0248a00b }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000000f }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0218a00a }, + { 0x00800031, 0x26401d29, 0x408d0400, 0x0218a00b }, + { 0x00600042, 0x29804629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29904629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29a04629, 0x008d0540, 0x008d0560 }, + { 0x00600042, 0x29b04629, 0x008d0560, 0x008d0580 }, + { 0x00600042, 0x2a004629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x2a104629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x2a204629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x2a304629, 0x008d0620, 0x008d0640 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000002c }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a00a }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a00b }, + { 0x00600001, 0x29400229, 0x008d0500, 0x00000000 }, + { 0x00600001, 0x29500229, 0x008d0520, 0x00000000 }, + { 0x00600001, 0x29600229, 0x008d0540, 0x00000000 }, + { 0x00600001, 0x29700229, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x29c00229, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x29d00229, 0x008d05a0, 0x00000000 }, + { 0x00600001, 0x29e00229, 0x008d05c0, 0x00000000 }, + { 0x00600001, 0x29f00229, 0x008d05e0, 0x00000000 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a00a }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a00b }, + { 0x00600001, 0x29800229, 0x008d0500, 0x00000000 }, + { 0x00600001, 0x29900229, 0x008d0520, 0x00000000 }, + { 0x00600001, 0x29a00229, 0x008d0540, 0x00000000 }, + { 0x00600001, 0x29b00229, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x2a000229, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x2a100229, 0x008d05a0, 0x00000000 }, + { 0x00600001, 0x2a200229, 0x008d05c0, 0x00000000 }, + { 0x00600001, 0x2a300229, 0x008d05e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10a80, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10aa0, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10ac0, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10ae0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10b00, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10b20, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10b40, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10b60, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10b80, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10ba0, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10bc0, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10be0, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c00, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10c20, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10b60, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10a80, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10b80, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10aa0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10ba0, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10ac0, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10bc0, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10ae0, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10be0, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10b00, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10c00, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10b20, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c20, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10b40, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, + { 0x80800001, 0x474001b1, 0x00b10740, 0x00000000 }, + { 0x80800001, 0x476001b1, 0x00b10760, 0x00000000 }, + { 0x80800001, 0x478001b1, 0x00b10780, 0x00000000 }, + { 0x80800001, 0x47a001b1, 0x00b107a0, 0x00000000 }, + { 0x80800001, 0x47c001b1, 0x00b107c0, 0x00000000 }, + { 0x80800001, 0x47e001b1, 0x00b107e0, 0x00000000 }, + { 0x80800001, 0x480001b1, 0x00b10800, 0x00000000 }, + { 0x80800001, 0x482001b1, 0x00b10820, 0x00000000 }, + { 0x80800001, 0x484001b1, 0x00b10840, 0x00000000 }, + { 0x80800001, 0x486001b1, 0x00b10860, 0x00000000 }, + { 0x80800001, 0x488001b1, 0x00b10880, 0x00000000 }, + { 0x80800001, 0x48a001b1, 0x00b108a0, 0x00000000 }, + { 0x80800001, 0x48c001b1, 0x00b108c0, 0x00000000 }, + { 0x80800001, 0x48e001b1, 0x00b108e0, 0x00000000 }, + { 0x80800001, 0x490001b1, 0x00b10900, 0x00000000 }, + { 0x80800001, 0x492001b1, 0x00b10920, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, + { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, + { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, + { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, + { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, + { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, + { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x12082000 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, + { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, + { 0x00800040, 0x294025ad, 0x00b10c60, 0x00b10940 }, + { 0x00800040, 0x296025ad, 0x00b10c80, 0x00b10960 }, + { 0x00800040, 0x298025ad, 0x00b10ca0, 0x00b10980 }, + { 0x00800040, 0x29a025ad, 0x00b10cc0, 0x00b109a0 }, + { 0x80800001, 0x494001b1, 0x00b10940, 0x00000000 }, + { 0x80800001, 0x496001b1, 0x00b10960, 0x00000000 }, + { 0x80800001, 0x498001b1, 0x00b10980, 0x00000000 }, + { 0x80800001, 0x49a001b1, 0x00b109a0, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082001 }, + { 0x00800040, 0x29c025a9, 0x00b10ce0, 0x00b109c0 }, + { 0x00800040, 0x29e025a9, 0x00b10d00, 0x00b109e0 }, + { 0x00800040, 0x2a0025a9, 0x00b10d20, 0x00b10a00 }, + { 0x00800040, 0x2a2025a9, 0x00b10d40, 0x00b10a20 }, + { 0x80800001, 0x49c001b1, 0x00b109c0, 0x00000000 }, + { 0x80800001, 0x49e001b1, 0x00b109e0, 0x00000000 }, + { 0x80800001, 0x4a0001b1, 0x00b10a00, 0x00000000 }, + { 0x80800001, 0x4a2001b1, 0x00b10a20, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082002 }, + { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, + { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, diff --git a/src/shaders/mpeg2/vld/field_forward_16x8.g4a b/src/shaders/mpeg2/vld/field_forward_16x8.g4a new file mode 100644 index 00000000..2052481b --- /dev/null +++ b/src/shaders/mpeg2/vld/field_forward_16x8.g4a @@ -0,0 +1,31 @@ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data + g32: message descriptor for reading reference data */ +mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; +mov (2) g31.0<1>UD g82.12<2,2,1>UW {align1}; +define(`UV_red',`0xffffffffUD') +define(`UV_white',`0x7f7f7f7fUD') +define(`UV_green',`0x00000000UD') +mov(2) g6.0<1>UD g82.12<2,2,1>UW {align1}; +mov(1) g6.8<1>UD 0x000f000fUD { align1 }; +mov(16) m1<1>UD 0xFFFFFFFFUD {align1 compr}; +mov(16) m3<1>UD 0xFFFFFFFFUD {align1 compr}; +mov(16) m5<1>UD 0xFFFFFFFFUD {align1 compr}; +mov(16) m7<1>UD 0xFFFFFFFFUD {align1 compr}; +send (16) 0 acc0<1>UW g6<8,8,1>UW write(0, 0, 2, 0) mlen 9 rlen 0 { align1 }; +/*Fill U buffer & V buffer with 0x7F*/ +shr (2) g6.0<1>UD g82.12<2,2,1>UW 1UW {align1}; +mov(1) g6.8<1>UD 0x00070007UD { align1 }; +mov (16) m1<1>UD UV_white {align1 compr}; +send (16) 0 acc0<1>UW g6<8,8,1>UW write(2, 0, 2, 0) mlen 3 rlen 0 { align1 }; +send (16) 0 acc0<1>UW g6<8,8,1>UW write(1, 0, 2, 0) mlen 3 rlen 0 { align1 }; + +send (16) 0 acc0<1>UW g0<8,8,1>UW + thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; diff --git a/src/shaders/mpeg2/vld/field_forward_16x8.g4b b/src/shaders/mpeg2/vld/field_forward_16x8.g4b new file mode 100644 index 00000000..9d95f70b --- /dev/null +++ b/src/shaders/mpeg2/vld/field_forward_16x8.g4b @@ -0,0 +1,15 @@ + { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x00200001, 0x20c00121, 0x00450a4c, 0x00000000 }, + { 0x00000001, 0x20c80061, 0x00000000, 0x000f000f }, + { 0x00802001, 0x20200062, 0x00000000, 0xffffffff }, + { 0x00802001, 0x20600062, 0x00000000, 0xffffffff }, + { 0x00802001, 0x20a00062, 0x00000000, 0xffffffff }, + { 0x00802001, 0x20e00062, 0x00000000, 0xffffffff }, + { 0x00800031, 0x24001d28, 0x008d00c0, 0x05902000 }, + { 0x00200008, 0x20c02d21, 0x00450a4c, 0x00010001 }, + { 0x00000001, 0x20c80061, 0x00000000, 0x00070007 }, + { 0x00802001, 0x20200062, 0x00000000, 0x7f7f7f7f }, + { 0x00800031, 0x24001d28, 0x008d00c0, 0x05302002 }, + { 0x00800031, 0x24001d28, 0x008d00c0, 0x05302001 }, + { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, diff --git a/src/shaders/mpeg2/vld/field_forward_16x8.g4b.gen5 b/src/shaders/mpeg2/vld/field_forward_16x8.g4b.gen5 new file mode 100644 index 00000000..b12bddc0 --- /dev/null +++ b/src/shaders/mpeg2/vld/field_forward_16x8.g4b.gen5 @@ -0,0 +1,15 @@ + { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x00200001, 0x20c00121, 0x00450a4c, 0x00000000 }, + { 0x00000001, 0x20c80061, 0x00000000, 0x000f000f }, + { 0x00802001, 0x20200062, 0x00000000, 0xffffffff }, + { 0x00802001, 0x20600062, 0x00000000, 0xffffffff }, + { 0x00802001, 0x20a00062, 0x00000000, 0xffffffff }, + { 0x00802001, 0x20e00062, 0x00000000, 0xffffffff }, + { 0x00800031, 0x24001d28, 0x508d00c0, 0x12082000 }, + { 0x00200008, 0x20c02d21, 0x00450a4c, 0x00010001 }, + { 0x00000001, 0x20c80061, 0x00000000, 0x00070007 }, + { 0x00802001, 0x20200062, 0x00000000, 0x7f7f7f7f }, + { 0x00800031, 0x24001d28, 0x508d00c0, 0x06082002 }, + { 0x00800031, 0x24001d28, 0x508d00c0, 0x06082001 }, + { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, diff --git a/src/shaders/mpeg2/vld/field_intra.g4a b/src/shaders/mpeg2/vld/field_intra.g4a new file mode 100644 index 00000000..e85ec85c --- /dev/null +++ b/src/shaders/mpeg2/vld/field_intra.g4a @@ -0,0 +1,209 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* + GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT tab + g31: read and write message descriptor + g32~g55:DCT data + g58~g81:reference data + g82: thread payload + g83~g106:IDCT data +*/ +mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; +mov (2) g31.0<1>UD g82.12<2,2,1>UW {align1}; + +include(`iq_intra.g4i') + +//defined for idct +define(`ROW_SHIFT', `11UD') +define(`ROW_ADD', `0x400UD') +define(`COL_SHIFT', `20UD') +define(`COL_ADD', `0x80000UD') + +mov (1) a0.0<1>UD 0x06F006E0UD {align1}; //0x06F006E0UD+0x00200020UD=0x07100700UD (g56.0 and g56.16) + +//Y0 +mov (1) g125.0<1>UD ip {align1}; +jmpi IDCT_START; +add (8) g83.0<1>W g32.0<16,8,2>W 128UW {align1}; +add (8) g84.0<1>W g33.0<16,8,2>W 128UW {align1}; +add (8) g85.0<1>W g34.0<16,8,2>W 128UW {align1}; +add (8) g86.0<1>W g35.0<16,8,2>W 128UW {align1}; +add (8) g87.0<1>W g36.0<16,8,2>W 128UW {align1}; +add (8) g88.0<1>W g37.0<16,8,2>W 128UW {align1}; +add (8) g89.0<1>W g38.0<16,8,2>W 128UW {align1}; +add (8) g90.0<1>W g39.0<16,8,2>W 128UW {align1}; + +//Y1 +mov (1) g125.0<1>UD ip {align1}; +jmpi IDCT_START; +add (8) g83.16<1>W g32.0<16,8,2>W 128UW {align1}; +add (8) g84.16<1>W g33.0<16,8,2>W 128UW {align1}; +add (8) g85.16<1>W g34.0<16,8,2>W 128UW {align1}; +add (8) g86.16<1>W g35.0<16,8,2>W 128UW {align1}; +add (8) g87.16<1>W g36.0<16,8,2>W 128UW {align1}; +add (8) g88.16<1>W g37.0<16,8,2>W 128UW {align1}; +add (8) g89.16<1>W g38.0<16,8,2>W 128UW {align1}; +add (8) g90.16<1>W g39.0<16,8,2>W 128UW {align1}; + +//Y2 +mov (1) g125.0<1>UD ip {align1}; +jmpi IDCT_START; +add (8) g91.0<1>W g32.0<16,8,2>W 128UW {align1}; +add (8) g92.0<1>W g33.0<16,8,2>W 128UW {align1}; +add (8) g93.0<1>W g34.0<16,8,2>W 128UW {align1}; +add (8) g94.0<1>W g35.0<16,8,2>W 128UW {align1}; +add (8) g95.0<1>W g36.0<16,8,2>W 128UW {align1}; +add (8) g96.0<1>W g37.0<16,8,2>W 128UW {align1}; +add (8) g97.0<1>W g38.0<16,8,2>W 128UW {align1}; +add (8) g98.0<1>W g39.0<16,8,2>W 128UW {align1}; + +//Y3 +mov (1) g125.0<1>UD ip {align1}; +jmpi IDCT_START; +add (8) g91.16<1>W g32.0<16,8,2>W 128UW {align1}; +add (8) g92.16<1>W g33.0<16,8,2>W 128UW {align1}; +add (8) g93.16<1>W g34.0<16,8,2>W 128UW {align1}; +add (8) g94.16<1>W g35.0<16,8,2>W 128UW {align1}; +add (8) g95.16<1>W g36.0<16,8,2>W 128UW {align1}; +add (8) g96.16<1>W g37.0<16,8,2>W 128UW {align1}; +add (8) g97.16<1>W g38.0<16,8,2>W 128UW {align1}; +add (8) g98.16<1>W g39.0<16,8,2>W 128UW {align1}; + +//U +mov (1) g125.0<1>UD ip {align1}; +jmpi IDCT_START; +add (16) g99.0<1>W g32.0<16,8,2>W 128UW {align1}; +add (16) g100.0<1>W g34.0<16,8,2>W 128UW {align1}; +add (16) g101.0<1>W g36.0<16,8,2>W 128UW {align1}; +add (16) g102.0<1>W g38.0<16,8,2>W 128UW {align1}; + +//V +mov (1) g125.0<1>UD ip {align1}; +jmpi IDCT_START; +add (16) g103.0<1>W g32.0<16,8,2>W 128UW {align1}; +add (16) g104.0<1>W g34.0<16,8,2>W 128UW {align1}; +add (16) g105.0<1>W g36.0<16,8,2>W 128UW {align1}; +add (16) g106.0<1>W g38.0<16,8,2>W 128UW {align1}; + +//send msg +mov (1) g31.8<1>UD 0x00F000FUD {align1}; +mov.sat (16) g83.0<2>UB g83.0<16,16,1>W {align1}; +mov.sat (16) g84.0<2>UB g84.0<16,16,1>W {align1}; +mov.sat (16) g85.0<2>UB g85.0<16,16,1>W {align1}; +mov.sat (16) g86.0<2>UB g86.0<16,16,1>W {align1}; +mov.sat (16) g87.0<2>UB g87.0<16,16,1>W {align1}; +mov.sat (16) g88.0<2>UB g88.0<16,16,1>W {align1}; +mov.sat (16) g89.0<2>UB g89.0<16,16,1>W {align1}; +mov.sat (16) g90.0<2>UB g90.0<16,16,1>W {align1}; +mov.sat (16) g91.0<2>UB g91.0<16,16,1>W {align1}; +mov.sat (16) g92.0<2>UB g92.0<16,16,1>W {align1}; +mov.sat (16) g93.0<2>UB g93.0<16,16,1>W {align1}; +mov.sat (16) g94.0<2>UB g94.0<16,16,1>W {align1}; +mov.sat (16) g95.0<2>UB g95.0<16,16,1>W {align1}; +mov.sat (16) g96.0<2>UB g96.0<16,16,1>W {align1}; +mov.sat (16) g97.0<2>UB g97.0<16,16,1>W {align1}; +mov.sat (16) g98.0<2>UB g98.0<16,16,1>W {align1}; + +and.nz (1) null g82.2<1,1,1>UW 0x20UW{align1}; +(f0) jmpi field_dct; + +mov (16) m1.0<1>UB g83.0<16,16,2>UB {align1}; +mov (16) m1.16<1>UB g84.0<16,16,2>UB {align1}; +mov (16) m2.0<1>UB g85.0<16,16,2>UB {align1}; +mov (16) m2.16<1>UB g86.0<16,16,2>UB {align1}; +mov (16) m3.0<1>UB g87.0<16,16,2>UB {align1}; +mov (16) m3.16<1>UB g88.0<16,16,2>UB {align1}; +mov (16) m4.0<1>UB g89.0<16,16,2>UB {align1}; +mov (16) m4.16<1>UB g90.0<16,16,2>UB {align1}; +mov (16) m5.0<1>UB g91.0<16,16,2>UB {align1}; +mov (16) m5.16<1>UB g92.0<16,16,2>UB {align1}; +mov (16) m6.0<1>UB g93.0<16,16,2>UB {align1}; +mov (16) m6.16<1>UB g94.0<16,16,2>UB {align1}; +mov (16) m7.0<1>UB g95.0<16,16,2>UB {align1}; +mov (16) m7.16<1>UB g96.0<16,16,2>UB {align1}; +mov (16) m8.0<1>UB g97.0<16,16,2>UB {align1}; +mov (16) m8.16<1>UB g98.0<16,16,2>UB {align1}; +jmpi write_back; + +field_dct: +mov (16) m1.0<1>UB g83.0<16,16,2>UB {align1}; +mov (16) m1.16<1>UB g91.0<16,16,2>UB {align1}; +mov (16) m2.0<1>UB g84.0<16,16,2>UB {align1}; +mov (16) m2.16<1>UB g92.0<16,16,2>UB {align1}; +mov (16) m3.0<1>UB g85.0<16,16,2>UB {align1}; +mov (16) m3.16<1>UB g93.0<16,16,2>UB {align1}; +mov (16) m4.0<1>UB g86.0<16,16,2>UB {align1}; +mov (16) m4.16<1>UB g94.0<16,16,2>UB {align1}; +mov (16) m5.0<1>UB g87.0<16,16,2>UB {align1}; +mov (16) m5.16<1>UB g95.0<16,16,2>UB {align1}; +mov (16) m6.0<1>UB g88.0<16,16,2>UB {align1}; +mov (16) m6.16<1>UB g96.0<16,16,2>UB {align1}; +mov (16) m7.0<1>UB g89.0<16,16,2>UB {align1}; +mov (16) m7.16<1>UB g97.0<16,16,2>UB {align1}; +mov (16) m8.0<1>UB g90.0<16,16,2>UB {align1}; +mov (16) m8.16<1>UB g98.0<16,16,2>UB {align1}; + +write_back: +send (16) 0 acc0<1>UW g31<8,8,1>UW write(0,0,2,0) mlen 9 rlen 0 {align1}; + +//U +mov (1) g31.8<1>UD 0x0070007UD { align1 }; +shr (2) g31.0<1>UD g82.12<2,2,1>UW 1D {align1}; +mov.sat (16) g99.0<2>UB g99.0<16,16,1>W {align1}; +mov.sat (16) g100.0<2>UB g100.0<16,16,1>W {align1}; +mov.sat (16) g101.0<2>UB g101.0<16,16,1>W {align1}; +mov.sat (16) g102.0<2>UB g102.0<16,16,1>W {align1}; + +mov (16) m1.0<1>UB g99.0<16,16,2>UB {align1}; +mov (16) m1.16<1>UB g100.0<16,16,2>UB {align1}; +mov (16) m2.0<1>UB g101.0<16,16,2>UB {align1}; +mov (16) m2.16<1>UB g102.0<16,16,2>UB {align1}; +send (16) 0 acc0<1>UW g31<8,8,1>UW write(1, 0, 2, 0) mlen 3 rlen 0 { align1 }; + +//V +mov.sat (16) g103.0<2>UB g103.0<16,16,1>W {align1}; +mov.sat (16) g104.0<2>UB g104.0<16,16,1>W {align1}; +mov.sat (16) g105.0<2>UB g105.0<16,16,1>W {align1}; +mov.sat (16) g106.0<2>UB g106.0<16,16,1>W {align1}; + +mov (16) m1.0<1>UB g103.0<16,16,2>UB {align1}; +mov (16) m1.16<1>UB g104.0<16,16,2>UB {align1}; +mov (16) m2.0<1>UB g105.0<16,16,2>UB {align1}; +mov (16) m2.16<1>UB g106.0<16,16,2>UB {align1}; +send (16) 0 acc0<1>UW g31<8,8,1>UW write(2, 0, 2, 0) mlen 3 rlen 0 { align1 }; + +OUT: +send (16) 0 acc0<1>UW g0<8,8,1>UW + thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; + +include(`do_iq_intra.g4i') +include(`idct.g4i') diff --git a/src/shaders/mpeg2/vld/field_intra.g4b b/src/shaders/mpeg2/vld/field_intra.g4b new file mode 100644 index 00000000..4c1c8c44 --- /dev/null +++ b/src/shaders/mpeg2/vld/field_intra.g4b @@ -0,0 +1,313 @@ + { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x00000005, 0x2da02d29, 0x00210a48, 0x001f001f }, + { 0x00000005, 0x2da42d29, 0x00210a48, 0x60006000 }, + { 0x00000008, 0x2da42d29, 0x00210da4, 0x000d000d }, + { 0x00000001, 0x2da60169, 0x00000000, 0x00080008 }, + { 0x00000008, 0x2da42529, 0x00210da6, 0x00210da4 }, + { 0x01000005, 0x20002d3c, 0x00210a48, 0x00200020 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000012 }, + { 0x05000010, 0x20002d3c, 0x00210da0, 0x00090009 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, + { 0x05000010, 0x20002d3c, 0x00210da0, 0x00110011 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x05000010, 0x20002d3c, 0x00210da0, 0x00190019 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, + { 0x00000040, 0x2da03d29, 0x00210da0, 0xffe7ffe7 }, + { 0x00000009, 0x2da02d29, 0x00210da0, 0x00030003 }, + { 0x00000040, 0x2da02d29, 0x00210da0, 0x00400040 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000009 }, + { 0x00000040, 0x2da03d29, 0x00210da0, 0xfff7fff7 }, + { 0x00000009, 0x2da02d29, 0x00210da0, 0x00010001 }, + { 0x00000040, 0x2da02d29, 0x00210da0, 0x000a000a }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000005 }, + { 0x00000040, 0x2da03d29, 0x00210da0, 0xffefffef }, + { 0x00000009, 0x2da02d29, 0x00210da0, 0x00020002 }, + { 0x00000040, 0x2da02d29, 0x00210da0, 0x001c001c }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000001 }, + { 0x00000009, 0x2da00d29, 0x00210da0, 0x00000001 }, + { 0x00000001, 0x2dc00129, 0x00210da0, 0x00000000 }, + { 0x00800001, 0x2e000229, 0x00b10020, 0x00000000 }, + { 0x00800001, 0x2e200229, 0x00b10030, 0x00000000 }, + { 0x00800001, 0x2e400229, 0x00b10040, 0x00000000 }, + { 0x00800001, 0x2e600229, 0x00b10050, 0x00000000 }, + { 0x00000001, 0x22000060, 0x00000000, 0x03f003e0 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000000a1 }, + { 0x00800001, 0x270001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x272001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x274001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x276001ad, 0x00ae0f40, 0x00000000 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000009b }, + { 0x00800001, 0x278001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x27a001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x27c001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x27e001ad, 0x00ae0f40, 0x00000000 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000095 }, + { 0x00800001, 0x280001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x282001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x284001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x286001ad, 0x00ae0f40, 0x00000000 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000008f }, + { 0x00800001, 0x288001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x28a001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x28c001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x28e001ad, 0x00ae0f40, 0x00000000 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000089 }, + { 0x00800001, 0x290001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x292001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x294001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x296001ad, 0x00ae0f40, 0x00000000 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000083 }, + { 0x00800001, 0x298001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x29a001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x29c001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x29e001ad, 0x00ae0f40, 0x00000000 }, + { 0x00000001, 0x22000060, 0x00000000, 0x06f006e0 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000008f }, + { 0x00600040, 0x2a602dad, 0x00ae0400, 0x00800080 }, + { 0x00600040, 0x2a802dad, 0x00ae0420, 0x00800080 }, + { 0x00600040, 0x2aa02dad, 0x00ae0440, 0x00800080 }, + { 0x00600040, 0x2ac02dad, 0x00ae0460, 0x00800080 }, + { 0x00600040, 0x2ae02dad, 0x00ae0480, 0x00800080 }, + { 0x00600040, 0x2b002dad, 0x00ae04a0, 0x00800080 }, + { 0x00600040, 0x2b202dad, 0x00ae04c0, 0x00800080 }, + { 0x00600040, 0x2b402dad, 0x00ae04e0, 0x00800080 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000085 }, + { 0x00600040, 0x2a702dad, 0x00ae0400, 0x00800080 }, + { 0x00600040, 0x2a902dad, 0x00ae0420, 0x00800080 }, + { 0x00600040, 0x2ab02dad, 0x00ae0440, 0x00800080 }, + { 0x00600040, 0x2ad02dad, 0x00ae0460, 0x00800080 }, + { 0x00600040, 0x2af02dad, 0x00ae0480, 0x00800080 }, + { 0x00600040, 0x2b102dad, 0x00ae04a0, 0x00800080 }, + { 0x00600040, 0x2b302dad, 0x00ae04c0, 0x00800080 }, + { 0x00600040, 0x2b502dad, 0x00ae04e0, 0x00800080 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000007b }, + { 0x00600040, 0x2b602dad, 0x00ae0400, 0x00800080 }, + { 0x00600040, 0x2b802dad, 0x00ae0420, 0x00800080 }, + { 0x00600040, 0x2ba02dad, 0x00ae0440, 0x00800080 }, + { 0x00600040, 0x2bc02dad, 0x00ae0460, 0x00800080 }, + { 0x00600040, 0x2be02dad, 0x00ae0480, 0x00800080 }, + { 0x00600040, 0x2c002dad, 0x00ae04a0, 0x00800080 }, + { 0x00600040, 0x2c202dad, 0x00ae04c0, 0x00800080 }, + { 0x00600040, 0x2c402dad, 0x00ae04e0, 0x00800080 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000071 }, + { 0x00600040, 0x2b702dad, 0x00ae0400, 0x00800080 }, + { 0x00600040, 0x2b902dad, 0x00ae0420, 0x00800080 }, + { 0x00600040, 0x2bb02dad, 0x00ae0440, 0x00800080 }, + { 0x00600040, 0x2bd02dad, 0x00ae0460, 0x00800080 }, + { 0x00600040, 0x2bf02dad, 0x00ae0480, 0x00800080 }, + { 0x00600040, 0x2c102dad, 0x00ae04a0, 0x00800080 }, + { 0x00600040, 0x2c302dad, 0x00ae04c0, 0x00800080 }, + { 0x00600040, 0x2c502dad, 0x00ae04e0, 0x00800080 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000067 }, + { 0x00800040, 0x2c602dad, 0x00ae0400, 0x00800080 }, + { 0x00800040, 0x2c802dad, 0x00ae0440, 0x00800080 }, + { 0x00800040, 0x2ca02dad, 0x00ae0480, 0x00800080 }, + { 0x00800040, 0x2cc02dad, 0x00ae04c0, 0x00800080 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000061 }, + { 0x00800040, 0x2ce02dad, 0x00ae0400, 0x00800080 }, + { 0x00800040, 0x2d002dad, 0x00ae0440, 0x00800080 }, + { 0x00800040, 0x2d202dad, 0x00ae0480, 0x00800080 }, + { 0x00800040, 0x2d402dad, 0x00ae04c0, 0x00800080 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, + { 0x80800001, 0x4a6001b1, 0x00b10a60, 0x00000000 }, + { 0x80800001, 0x4a8001b1, 0x00b10a80, 0x00000000 }, + { 0x80800001, 0x4aa001b1, 0x00b10aa0, 0x00000000 }, + { 0x80800001, 0x4ac001b1, 0x00b10ac0, 0x00000000 }, + { 0x80800001, 0x4ae001b1, 0x00b10ae0, 0x00000000 }, + { 0x80800001, 0x4b0001b1, 0x00b10b00, 0x00000000 }, + { 0x80800001, 0x4b2001b1, 0x00b10b20, 0x00000000 }, + { 0x80800001, 0x4b4001b1, 0x00b10b40, 0x00000000 }, + { 0x80800001, 0x4b6001b1, 0x00b10b60, 0x00000000 }, + { 0x80800001, 0x4b8001b1, 0x00b10b80, 0x00000000 }, + { 0x80800001, 0x4ba001b1, 0x00b10ba0, 0x00000000 }, + { 0x80800001, 0x4bc001b1, 0x00b10bc0, 0x00000000 }, + { 0x80800001, 0x4be001b1, 0x00b10be0, 0x00000000 }, + { 0x80800001, 0x4c0001b1, 0x00b10c00, 0x00000000 }, + { 0x80800001, 0x4c2001b1, 0x00b10c20, 0x00000000 }, + { 0x80800001, 0x4c4001b1, 0x00b10c40, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, + { 0x00800001, 0x20200232, 0x00b20a60, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20a80, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20aa0, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20ac0, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00b20ae0, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00b20b00, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00b20b20, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00b20b40, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00b20b60, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00b20b80, 0x00000000 }, + { 0x00800001, 0x20c00232, 0x00b20ba0, 0x00000000 }, + { 0x00800001, 0x20d00232, 0x00b20bc0, 0x00000000 }, + { 0x00800001, 0x20e00232, 0x00b20be0, 0x00000000 }, + { 0x00800001, 0x20f00232, 0x00b20c00, 0x00000000 }, + { 0x00800001, 0x21000232, 0x00b20c20, 0x00000000 }, + { 0x00800001, 0x21100232, 0x00b20c40, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00800001, 0x20200232, 0x00b20a60, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20b60, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20a80, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20b80, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00b20aa0, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00b20ba0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00b20ac0, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00b20bc0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00b20ae0, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00b20be0, 0x00000000 }, + { 0x00800001, 0x20c00232, 0x00b20b00, 0x00000000 }, + { 0x00800001, 0x20d00232, 0x00b20c00, 0x00000000 }, + { 0x00800001, 0x20e00232, 0x00b20b20, 0x00000000 }, + { 0x00800001, 0x20f00232, 0x00b20c20, 0x00000000 }, + { 0x00800001, 0x21000232, 0x00b20b40, 0x00000000 }, + { 0x00800001, 0x21100232, 0x00b20c40, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05902000 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, + { 0x00200008, 0x23e01d21, 0x00450a4c, 0x00000001 }, + { 0x80800001, 0x4c6001b1, 0x00b10c60, 0x00000000 }, + { 0x80800001, 0x4c8001b1, 0x00b10c80, 0x00000000 }, + { 0x80800001, 0x4ca001b1, 0x00b10ca0, 0x00000000 }, + { 0x80800001, 0x4cc001b1, 0x00b10cc0, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20c60, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20c80, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20ca0, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20cc0, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302001 }, + { 0x80800001, 0x4ce001b1, 0x00b10ce0, 0x00000000 }, + { 0x80800001, 0x4d0001b1, 0x00b10d00, 0x00000000 }, + { 0x80800001, 0x4d2001b1, 0x00b10d20, 0x00000000 }, + { 0x80800001, 0x4d4001b1, 0x00b10d40, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20ce0, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20d00, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20d20, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20d40, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302002 }, + { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00000001, 0x2de001ad, 0x00218000, 0x00000000 }, + { 0x00802041, 0x2e8025a5, 0x008d8000, 0x008d0e00 }, + { 0x00802041, 0x2e8024a5, 0x008d0e80, 0x008c0da0 }, + { 0x0080200c, 0x2e802ca5, 0x008d0e80, 0x00040004 }, + { 0x00000041, 0x2e8025a5, 0x00210de0, 0x00210da4 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802041, 0x2ec025a5, 0x008d8000, 0x008d0e20 }, + { 0x00802041, 0x2ec024a5, 0x008d0ec0, 0x008c0da0 }, + { 0x0080200c, 0x2ec02ca5, 0x008d0ec0, 0x00040004 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802041, 0x2f0025a5, 0x008d8000, 0x008d0e40 }, + { 0x00802041, 0x2f0024a5, 0x008d0f00, 0x008c0da0 }, + { 0x0080200c, 0x2f002ca5, 0x008d0f00, 0x00040004 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802041, 0x2f4025a5, 0x008d8000, 0x008d0e60 }, + { 0x00802041, 0x2f4024a5, 0x008d0f40, 0x008c0da0 }, + { 0x0080200c, 0x2f402ca5, 0x008d0f40, 0x00040004 }, + { 0x00000040, 0x34000c20, 0x00210fa0, 0x00000020 }, + { 0x00000001, 0x2fc00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, + { 0x00802040, 0x24000ca5, 0x008d0400, 0x00000400 }, + { 0x00802040, 0x24400ca5, 0x008d0440, 0x00000400 }, + { 0x00802040, 0x24800ca5, 0x008d0480, 0x00000400 }, + { 0x00802040, 0x24c00ca5, 0x008d04c0, 0x00000400 }, + { 0x00802008, 0x24000ca5, 0x008d0400, 0x0000000b }, + { 0x00802008, 0x24400ca5, 0x008d0440, 0x0000000b }, + { 0x00802008, 0x24800ca5, 0x008d0480, 0x0000000b }, + { 0x00802008, 0x24c00ca5, 0x008d04c0, 0x0000000b }, + { 0x00800001, 0x2dc001ad, 0x00ae0400, 0x00000000 }, + { 0x00800001, 0x2de001ad, 0x00ae0440, 0x00000000 }, + { 0x00800001, 0x2e0001ad, 0x00ae0480, 0x00000000 }, + { 0x00800001, 0x2e2001ad, 0x00ae04c0, 0x00000000 }, + { 0x00000001, 0x2a000001, 0x00210200, 0x00000000 }, + { 0x00000001, 0x22000060, 0x00000000, 0x0db00da0 }, + { 0x00000001, 0x2fc00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000a }, + { 0x00802040, 0x24000ca5, 0x008d0400, 0x00080000 }, + { 0x00802040, 0x24400ca5, 0x008d0440, 0x00080000 }, + { 0x00802040, 0x24800ca5, 0x008d0480, 0x00080000 }, + { 0x00802040, 0x24c00ca5, 0x008d04c0, 0x00080000 }, + { 0x00802008, 0x24000ca5, 0x008d0400, 0x00000014 }, + { 0x00802008, 0x24400ca5, 0x008d0440, 0x00000014 }, + { 0x00802008, 0x24800ca5, 0x008d0480, 0x00000014 }, + { 0x00802008, 0x24c00ca5, 0x008d04c0, 0x00000014 }, + { 0x00000001, 0x22000020, 0x00210a00, 0x00000000 }, + { 0x00000040, 0x34000c20, 0x00210fa0, 0x00000020 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, + { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, + { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, + { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, + { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, + { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, + { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, + { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, + { 0x00200040, 0x240014a5, 0x00800500, 0x00800510 }, + { 0x00200040, 0x242014a5, 0x00800540, 0x00800550 }, + { 0x00200040, 0x244014a5, 0x00800580, 0x00800590 }, + { 0x00200040, 0x246014a5, 0x008005c0, 0x008005d0 }, + { 0x00200040, 0x248014a5, 0x00800600, 0x00800610 }, + { 0x00200040, 0x24a014a5, 0x00800640, 0x00800650 }, + { 0x00200040, 0x24c014a5, 0x00800680, 0x00800690 }, + { 0x00200040, 0x24e014a5, 0x008006c0, 0x008006d0 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, + { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, + { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, + { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, + { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, + { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, + { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, + { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, + { 0x00200040, 0x240814a5, 0x00800500, 0x00800510 }, + { 0x00200040, 0x242814a5, 0x00800540, 0x00800550 }, + { 0x00200040, 0x244814a5, 0x00800580, 0x00800590 }, + { 0x00200040, 0x246814a5, 0x008005c0, 0x008005d0 }, + { 0x00200040, 0x248814a5, 0x00800600, 0x00800610 }, + { 0x00200040, 0x24a814a5, 0x00800640, 0x00800650 }, + { 0x00200040, 0x24c814a5, 0x00800680, 0x00800690 }, + { 0x00200040, 0x24e814a5, 0x008006c0, 0x008006d0 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, + { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, + { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, + { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, + { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, + { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, + { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, + { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, + { 0x00200040, 0x241014a5, 0x00800500, 0x00800510 }, + { 0x00200040, 0x243014a5, 0x00800540, 0x00800550 }, + { 0x00200040, 0x245014a5, 0x00800580, 0x00800590 }, + { 0x00200040, 0x247014a5, 0x008005c0, 0x008005d0 }, + { 0x00200040, 0x249014a5, 0x00800600, 0x00800610 }, + { 0x00200040, 0x24b014a5, 0x00800640, 0x00800650 }, + { 0x00200040, 0x24d014a5, 0x00800680, 0x00800690 }, + { 0x00200040, 0x24f014a5, 0x008006c0, 0x008006d0 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, + { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, + { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, + { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, + { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, + { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, + { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, + { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, + { 0x00200040, 0x241814a5, 0x00800500, 0x00800510 }, + { 0x00200040, 0x243814a5, 0x00800540, 0x00800550 }, + { 0x00200040, 0x245814a5, 0x00800580, 0x00800590 }, + { 0x00200040, 0x247814a5, 0x008005c0, 0x008005d0 }, + { 0x00200040, 0x249814a5, 0x00800600, 0x00800610 }, + { 0x00200040, 0x24b814a5, 0x00800640, 0x00800650 }, + { 0x00200040, 0x24d814a5, 0x00800680, 0x00800690 }, + { 0x00200040, 0x24f814a5, 0x008006c0, 0x008006d0 }, + { 0x00000040, 0x34000c20, 0x00210fc0, 0x00000020 }, diff --git a/src/shaders/mpeg2/vld/field_intra.g4b.gen5 b/src/shaders/mpeg2/vld/field_intra.g4b.gen5 new file mode 100644 index 00000000..957f6fc3 --- /dev/null +++ b/src/shaders/mpeg2/vld/field_intra.g4b.gen5 @@ -0,0 +1,313 @@ + { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x00000005, 0x2da02d29, 0x00210a48, 0x001f001f }, + { 0x00000005, 0x2da42d29, 0x00210a48, 0x60006000 }, + { 0x00000008, 0x2da42d29, 0x00210da4, 0x000d000d }, + { 0x00000001, 0x2da60169, 0x00000000, 0x00080008 }, + { 0x00000008, 0x2da42529, 0x00210da6, 0x00210da4 }, + { 0x01000005, 0x20002d3c, 0x00210a48, 0x00200020 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x05000010, 0x20002d3c, 0x00210da0, 0x00090009 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, + { 0x05000010, 0x20002d3c, 0x00210da0, 0x00110011 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000000c }, + { 0x05000010, 0x20002d3c, 0x00210da0, 0x00190019 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000040, 0x2da03d29, 0x00210da0, 0xffe7ffe7 }, + { 0x00000009, 0x2da02d29, 0x00210da0, 0x00030003 }, + { 0x00000040, 0x2da02d29, 0x00210da0, 0x00400040 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000012 }, + { 0x00000040, 0x2da03d29, 0x00210da0, 0xfff7fff7 }, + { 0x00000009, 0x2da02d29, 0x00210da0, 0x00010001 }, + { 0x00000040, 0x2da02d29, 0x00210da0, 0x000a000a }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000a }, + { 0x00000040, 0x2da03d29, 0x00210da0, 0xffefffef }, + { 0x00000009, 0x2da02d29, 0x00210da0, 0x00020002 }, + { 0x00000040, 0x2da02d29, 0x00210da0, 0x001c001c }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000002 }, + { 0x00000009, 0x2da00d29, 0x00210da0, 0x00000001 }, + { 0x00000001, 0x2dc00129, 0x00210da0, 0x00000000 }, + { 0x00800001, 0x2e000229, 0x00b10020, 0x00000000 }, + { 0x00800001, 0x2e200229, 0x00b10030, 0x00000000 }, + { 0x00800001, 0x2e400229, 0x00b10040, 0x00000000 }, + { 0x00800001, 0x2e600229, 0x00b10050, 0x00000000 }, + { 0x00000001, 0x22000060, 0x00000000, 0x03f003e0 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000142 }, + { 0x00800001, 0x270001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x272001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x274001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x276001ad, 0x00ae0f40, 0x00000000 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000136 }, + { 0x00800001, 0x278001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x27a001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x27c001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x27e001ad, 0x00ae0f40, 0x00000000 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000012a }, + { 0x00800001, 0x280001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x282001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x284001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x286001ad, 0x00ae0f40, 0x00000000 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000011e }, + { 0x00800001, 0x288001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x28a001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x28c001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x28e001ad, 0x00ae0f40, 0x00000000 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000112 }, + { 0x00800001, 0x290001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x292001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x294001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x296001ad, 0x00ae0f40, 0x00000000 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000106 }, + { 0x00800001, 0x298001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x29a001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x29c001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x29e001ad, 0x00ae0f40, 0x00000000 }, + { 0x00000001, 0x22000060, 0x00000000, 0x06f006e0 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000011e }, + { 0x00600040, 0x2a602dad, 0x00ae0400, 0x00800080 }, + { 0x00600040, 0x2a802dad, 0x00ae0420, 0x00800080 }, + { 0x00600040, 0x2aa02dad, 0x00ae0440, 0x00800080 }, + { 0x00600040, 0x2ac02dad, 0x00ae0460, 0x00800080 }, + { 0x00600040, 0x2ae02dad, 0x00ae0480, 0x00800080 }, + { 0x00600040, 0x2b002dad, 0x00ae04a0, 0x00800080 }, + { 0x00600040, 0x2b202dad, 0x00ae04c0, 0x00800080 }, + { 0x00600040, 0x2b402dad, 0x00ae04e0, 0x00800080 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000010a }, + { 0x00600040, 0x2a702dad, 0x00ae0400, 0x00800080 }, + { 0x00600040, 0x2a902dad, 0x00ae0420, 0x00800080 }, + { 0x00600040, 0x2ab02dad, 0x00ae0440, 0x00800080 }, + { 0x00600040, 0x2ad02dad, 0x00ae0460, 0x00800080 }, + { 0x00600040, 0x2af02dad, 0x00ae0480, 0x00800080 }, + { 0x00600040, 0x2b102dad, 0x00ae04a0, 0x00800080 }, + { 0x00600040, 0x2b302dad, 0x00ae04c0, 0x00800080 }, + { 0x00600040, 0x2b502dad, 0x00ae04e0, 0x00800080 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000000f6 }, + { 0x00600040, 0x2b602dad, 0x00ae0400, 0x00800080 }, + { 0x00600040, 0x2b802dad, 0x00ae0420, 0x00800080 }, + { 0x00600040, 0x2ba02dad, 0x00ae0440, 0x00800080 }, + { 0x00600040, 0x2bc02dad, 0x00ae0460, 0x00800080 }, + { 0x00600040, 0x2be02dad, 0x00ae0480, 0x00800080 }, + { 0x00600040, 0x2c002dad, 0x00ae04a0, 0x00800080 }, + { 0x00600040, 0x2c202dad, 0x00ae04c0, 0x00800080 }, + { 0x00600040, 0x2c402dad, 0x00ae04e0, 0x00800080 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000000e2 }, + { 0x00600040, 0x2b702dad, 0x00ae0400, 0x00800080 }, + { 0x00600040, 0x2b902dad, 0x00ae0420, 0x00800080 }, + { 0x00600040, 0x2bb02dad, 0x00ae0440, 0x00800080 }, + { 0x00600040, 0x2bd02dad, 0x00ae0460, 0x00800080 }, + { 0x00600040, 0x2bf02dad, 0x00ae0480, 0x00800080 }, + { 0x00600040, 0x2c102dad, 0x00ae04a0, 0x00800080 }, + { 0x00600040, 0x2c302dad, 0x00ae04c0, 0x00800080 }, + { 0x00600040, 0x2c502dad, 0x00ae04e0, 0x00800080 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000000ce }, + { 0x00800040, 0x2c602dad, 0x00ae0400, 0x00800080 }, + { 0x00800040, 0x2c802dad, 0x00ae0440, 0x00800080 }, + { 0x00800040, 0x2ca02dad, 0x00ae0480, 0x00800080 }, + { 0x00800040, 0x2cc02dad, 0x00ae04c0, 0x00800080 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000000c2 }, + { 0x00800040, 0x2ce02dad, 0x00ae0400, 0x00800080 }, + { 0x00800040, 0x2d002dad, 0x00ae0440, 0x00800080 }, + { 0x00800040, 0x2d202dad, 0x00ae0480, 0x00800080 }, + { 0x00800040, 0x2d402dad, 0x00ae04c0, 0x00800080 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, + { 0x80800001, 0x4a6001b1, 0x00b10a60, 0x00000000 }, + { 0x80800001, 0x4a8001b1, 0x00b10a80, 0x00000000 }, + { 0x80800001, 0x4aa001b1, 0x00b10aa0, 0x00000000 }, + { 0x80800001, 0x4ac001b1, 0x00b10ac0, 0x00000000 }, + { 0x80800001, 0x4ae001b1, 0x00b10ae0, 0x00000000 }, + { 0x80800001, 0x4b0001b1, 0x00b10b00, 0x00000000 }, + { 0x80800001, 0x4b2001b1, 0x00b10b20, 0x00000000 }, + { 0x80800001, 0x4b4001b1, 0x00b10b40, 0x00000000 }, + { 0x80800001, 0x4b6001b1, 0x00b10b60, 0x00000000 }, + { 0x80800001, 0x4b8001b1, 0x00b10b80, 0x00000000 }, + { 0x80800001, 0x4ba001b1, 0x00b10ba0, 0x00000000 }, + { 0x80800001, 0x4bc001b1, 0x00b10bc0, 0x00000000 }, + { 0x80800001, 0x4be001b1, 0x00b10be0, 0x00000000 }, + { 0x80800001, 0x4c0001b1, 0x00b10c00, 0x00000000 }, + { 0x80800001, 0x4c2001b1, 0x00b10c20, 0x00000000 }, + { 0x80800001, 0x4c4001b1, 0x00b10c40, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, + { 0x00800001, 0x20200232, 0x00b20a60, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20a80, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20aa0, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20ac0, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00b20ae0, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00b20b00, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00b20b20, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00b20b40, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00b20b60, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00b20b80, 0x00000000 }, + { 0x00800001, 0x20c00232, 0x00b20ba0, 0x00000000 }, + { 0x00800001, 0x20d00232, 0x00b20bc0, 0x00000000 }, + { 0x00800001, 0x20e00232, 0x00b20be0, 0x00000000 }, + { 0x00800001, 0x20f00232, 0x00b20c00, 0x00000000 }, + { 0x00800001, 0x21000232, 0x00b20c20, 0x00000000 }, + { 0x00800001, 0x21100232, 0x00b20c40, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x00800001, 0x20200232, 0x00b20a60, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20b60, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20a80, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20b80, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00b20aa0, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00b20ba0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00b20ac0, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00b20bc0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00b20ae0, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00b20be0, 0x00000000 }, + { 0x00800001, 0x20c00232, 0x00b20b00, 0x00000000 }, + { 0x00800001, 0x20d00232, 0x00b20c00, 0x00000000 }, + { 0x00800001, 0x20e00232, 0x00b20b20, 0x00000000 }, + { 0x00800001, 0x20f00232, 0x00b20c20, 0x00000000 }, + { 0x00800001, 0x21000232, 0x00b20b40, 0x00000000 }, + { 0x00800001, 0x21100232, 0x00b20c40, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x12082000 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, + { 0x00200008, 0x23e01d21, 0x00450a4c, 0x00000001 }, + { 0x80800001, 0x4c6001b1, 0x00b10c60, 0x00000000 }, + { 0x80800001, 0x4c8001b1, 0x00b10c80, 0x00000000 }, + { 0x80800001, 0x4ca001b1, 0x00b10ca0, 0x00000000 }, + { 0x80800001, 0x4cc001b1, 0x00b10cc0, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20c60, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20c80, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20ca0, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20cc0, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082001 }, + { 0x80800001, 0x4ce001b1, 0x00b10ce0, 0x00000000 }, + { 0x80800001, 0x4d0001b1, 0x00b10d00, 0x00000000 }, + { 0x80800001, 0x4d2001b1, 0x00b10d20, 0x00000000 }, + { 0x80800001, 0x4d4001b1, 0x00b10d40, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20ce0, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20d00, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20d20, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20d40, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082002 }, + { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00000001, 0x2de001ad, 0x00218000, 0x00000000 }, + { 0x00802041, 0x2e8025a5, 0x008d8000, 0x008d0e00 }, + { 0x00802041, 0x2e8024a5, 0x008d0e80, 0x008c0da0 }, + { 0x0080200c, 0x2e802ca5, 0x008d0e80, 0x00040004 }, + { 0x00000041, 0x2e8025a5, 0x00210de0, 0x00210da4 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802041, 0x2ec025a5, 0x008d8000, 0x008d0e20 }, + { 0x00802041, 0x2ec024a5, 0x008d0ec0, 0x008c0da0 }, + { 0x0080200c, 0x2ec02ca5, 0x008d0ec0, 0x00040004 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802041, 0x2f0025a5, 0x008d8000, 0x008d0e40 }, + { 0x00802041, 0x2f0024a5, 0x008d0f00, 0x008c0da0 }, + { 0x0080200c, 0x2f002ca5, 0x008d0f00, 0x00040004 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802041, 0x2f4025a5, 0x008d8000, 0x008d0e60 }, + { 0x00802041, 0x2f4024a5, 0x008d0f40, 0x008c0da0 }, + { 0x0080200c, 0x2f402ca5, 0x008d0f40, 0x00040004 }, + { 0x00000040, 0x34000c20, 0x00210fa0, 0x00000020 }, + { 0x00000001, 0x2fc00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00802040, 0x24000ca5, 0x008d0400, 0x00000400 }, + { 0x00802040, 0x24400ca5, 0x008d0440, 0x00000400 }, + { 0x00802040, 0x24800ca5, 0x008d0480, 0x00000400 }, + { 0x00802040, 0x24c00ca5, 0x008d04c0, 0x00000400 }, + { 0x00802008, 0x24000ca5, 0x008d0400, 0x0000000b }, + { 0x00802008, 0x24400ca5, 0x008d0440, 0x0000000b }, + { 0x00802008, 0x24800ca5, 0x008d0480, 0x0000000b }, + { 0x00802008, 0x24c00ca5, 0x008d04c0, 0x0000000b }, + { 0x00800001, 0x2dc001ad, 0x00ae0400, 0x00000000 }, + { 0x00800001, 0x2de001ad, 0x00ae0440, 0x00000000 }, + { 0x00800001, 0x2e0001ad, 0x00ae0480, 0x00000000 }, + { 0x00800001, 0x2e2001ad, 0x00ae04c0, 0x00000000 }, + { 0x00000001, 0x2a000001, 0x00210200, 0x00000000 }, + { 0x00000001, 0x22000060, 0x00000000, 0x0db00da0 }, + { 0x00000001, 0x2fc00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000014 }, + { 0x00802040, 0x24000ca5, 0x008d0400, 0x00080000 }, + { 0x00802040, 0x24400ca5, 0x008d0440, 0x00080000 }, + { 0x00802040, 0x24800ca5, 0x008d0480, 0x00080000 }, + { 0x00802040, 0x24c00ca5, 0x008d04c0, 0x00080000 }, + { 0x00802008, 0x24000ca5, 0x008d0400, 0x00000014 }, + { 0x00802008, 0x24400ca5, 0x008d0440, 0x00000014 }, + { 0x00802008, 0x24800ca5, 0x008d0480, 0x00000014 }, + { 0x00802008, 0x24c00ca5, 0x008d04c0, 0x00000014 }, + { 0x00000001, 0x22000020, 0x00210a00, 0x00000000 }, + { 0x00000040, 0x34000c20, 0x00210fa0, 0x00000020 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, + { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, + { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, + { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, + { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, + { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, + { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, + { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, + { 0x00200040, 0x240014a5, 0x00800500, 0x00800510 }, + { 0x00200040, 0x242014a5, 0x00800540, 0x00800550 }, + { 0x00200040, 0x244014a5, 0x00800580, 0x00800590 }, + { 0x00200040, 0x246014a5, 0x008005c0, 0x008005d0 }, + { 0x00200040, 0x248014a5, 0x00800600, 0x00800610 }, + { 0x00200040, 0x24a014a5, 0x00800640, 0x00800650 }, + { 0x00200040, 0x24c014a5, 0x00800680, 0x00800690 }, + { 0x00200040, 0x24e014a5, 0x008006c0, 0x008006d0 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, + { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, + { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, + { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, + { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, + { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, + { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, + { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, + { 0x00200040, 0x240814a5, 0x00800500, 0x00800510 }, + { 0x00200040, 0x242814a5, 0x00800540, 0x00800550 }, + { 0x00200040, 0x244814a5, 0x00800580, 0x00800590 }, + { 0x00200040, 0x246814a5, 0x008005c0, 0x008005d0 }, + { 0x00200040, 0x248814a5, 0x00800600, 0x00800610 }, + { 0x00200040, 0x24a814a5, 0x00800640, 0x00800650 }, + { 0x00200040, 0x24c814a5, 0x00800680, 0x00800690 }, + { 0x00200040, 0x24e814a5, 0x008006c0, 0x008006d0 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, + { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, + { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, + { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, + { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, + { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, + { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, + { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, + { 0x00200040, 0x241014a5, 0x00800500, 0x00800510 }, + { 0x00200040, 0x243014a5, 0x00800540, 0x00800550 }, + { 0x00200040, 0x245014a5, 0x00800580, 0x00800590 }, + { 0x00200040, 0x247014a5, 0x008005c0, 0x008005d0 }, + { 0x00200040, 0x249014a5, 0x00800600, 0x00800610 }, + { 0x00200040, 0x24b014a5, 0x00800640, 0x00800650 }, + { 0x00200040, 0x24d014a5, 0x00800680, 0x00800690 }, + { 0x00200040, 0x24f014a5, 0x008006c0, 0x008006d0 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, + { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, + { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, + { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, + { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, + { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, + { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, + { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, + { 0x00200040, 0x241814a5, 0x00800500, 0x00800510 }, + { 0x00200040, 0x243814a5, 0x00800540, 0x00800550 }, + { 0x00200040, 0x245814a5, 0x00800580, 0x00800590 }, + { 0x00200040, 0x247814a5, 0x008005c0, 0x008005d0 }, + { 0x00200040, 0x249814a5, 0x00800600, 0x00800610 }, + { 0x00200040, 0x24b814a5, 0x00800640, 0x00800650 }, + { 0x00200040, 0x24d814a5, 0x00800680, 0x00800690 }, + { 0x00200040, 0x24f814a5, 0x008006c0, 0x008006d0 }, + { 0x00000040, 0x34000c20, 0x00210fc0, 0x00000020 }, diff --git a/src/shaders/mpeg2/vld/field_motion_uv.g4i b/src/shaders/mpeg2/vld/field_motion_uv.g4i new file mode 100644 index 00000000..201ee51f --- /dev/null +++ b/src/shaders/mpeg2/vld/field_motion_uv.g4i @@ -0,0 +1,47 @@ +/* + * Copyright © 2008 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Zhang Hua jun <huajun.zhang@intel.com> + * Xing Dong sheng <dongsheng.xing@intel.com> + * + */ + + and.z (1) null mv1<1,1,1>W 2W {align1}; + (f0) jmpi L1; + and.z (1) null mv2<1,1,1>W 2W {align1}; + (f0) jmpi L2; + include(`field_read_x1y1_uv.g4i') + jmpi L5; +L2: + include(`field_read_x1y0_uv.g4i') + jmpi L5; +L1: + and.z (1) null mv2<1,1,1>W 2W {align1}; + (f0) jmpi L4; + include(`field_read_x0y1_uv.g4i') + jmpi L5; +L4: + include(`field_read_x0y0_uv.g4i') +L5: + diff --git a/src/shaders/mpeg2/vld/field_motion_y.g4i b/src/shaders/mpeg2/vld/field_motion_y.g4i new file mode 100644 index 00000000..20adb310 --- /dev/null +++ b/src/shaders/mpeg2/vld/field_motion_y.g4i @@ -0,0 +1,45 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Zhang Hua jun <huajun.zhang@intel.com> + * Xing Dong sheng <dongsheng.xing@intel.com> + * + */ + and.z (1) null mv1<1,1,1>W 1UW {align1}; + (f0) jmpi L1; + and.z (1) null mv2<1,1,1>W 1UW {align1}; + (f0) jmpi L2; + include(`field_read_x1y1_y.g4i') + jmpi L5; +L2: + include(`field_read_x1y0_y.g4i') + jmpi L5; +L1: + and.z (1) null mv2<1,1,1>W 1UW {align1}; + (f0) jmpi L4; + include(`field_read_x0y1_y.g4i') + jmpi L5; +L4: + include(`field_read_x0y0_y.g4i') +L5: diff --git a/src/shaders/mpeg2/vld/field_read_x0y0_uv.g4i b/src/shaders/mpeg2/vld/field_read_x0y0_uv.g4i new file mode 100644 index 00000000..ff439e5e --- /dev/null +++ b/src/shaders/mpeg2/vld/field_read_x0y0_uv.g4i @@ -0,0 +1,65 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data + g32: message descriptor for reading reference data */ + +mov (1) g32.8<1>UD 0x7000FUD {align1}; //8*16 +send (16) 0 g40.0<1>UW g32<8,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 4 {align1};//U +send (16) 0 g44.0<1>UW g32<8,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 4 {align1};//V +//U +mov (8) g74.0<1>UW g40.0<8,8,1>UB {align1}; +mov (8) g74.16<1>UW g41.0<8,8,1>UB {align1}; +mov (8) g75.0<1>UW g42.0<8,8,1>UB {align1}; +mov (8) g75.16<1>UW g43.0<8,8,1>UB {align1}; +//V +mov (8) g78.0<1>UW g44.0<8,8,1>UB {align1}; +mov (8) g78.16<1>UW g45.0<8,8,1>UB {align1}; +mov (8) g79.0<1>UW g46.0<8,8,1>UB {align1}; +mov (8) g79.16<1>UW g47.0<8,8,1>UB {align1}; + +add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; +send (16) 0 g40.0<1>UW g32<8,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 4 {align1};//U +send (16) 0 g44.0<1>UW g32<8,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 4 {align1};//V +//U +mov (8) g76.0<1>UW g40.0<8,8,1>UB {align1}; +mov (8) g76.16<1>UW g41.0<8,8,1>UB {align1}; +mov (8) g77.0<1>UW g42.0<8,8,1>UB {align1}; +mov (8) g77.16<1>UW g43.0<8,8,1>UB {align1}; +//V +mov (8) g80.0<1>UW g44.0<8,8,1>UB {align1}; +mov (8) g80.16<1>UW g45.0<8,8,1>UB {align1}; +mov (8) g81.0<1>UW g46.0<8,8,1>UB {align1}; +mov (8) g81.16<1>UW g47.0<8,8,1>UB {align1}; diff --git a/src/shaders/mpeg2/vld/field_read_x0y0_y.g4i b/src/shaders/mpeg2/vld/field_read_x0y0_y.g4i new file mode 100644 index 00000000..3b0da9c0 --- /dev/null +++ b/src/shaders/mpeg2/vld/field_read_x0y0_y.g4i @@ -0,0 +1,62 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data + g32: message descriptor for reading reference data */ +mov (1) g32.8<1>UD 0x07001FUD {align1}; +send (16) 0 g38.0<1>UW g32<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; +send (16) 0 g46.0<1>UW g32<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1}; +mov (16) g58.0<1>UW g38.0<16,16,1>UB {align1}; +mov (16) g59.0<1>UW g40.0<16,16,1>UB {align1}; +mov (16) g60.0<1>UW g42.0<16,16,1>UB {align1}; +mov (16) g61.0<1>UW g44.0<16,16,1>UB {align1}; +mov (16) g62.0<1>UW g46.0<16,16,1>UB {align1}; +mov (16) g63.0<1>UW g48.0<16,16,1>UB {align1}; +mov (16) g64.0<1>UW g50.0<16,16,1>UB {align1}; +mov (16) g65.0<1>UW g52.0<16,16,1>UB {align1}; + +add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; +send (16) 0 g38.0<1>UW g32<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; +send (16) 0 g46.0<1>UW g32<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1}; +mov (16) g66.0<1>UW g38.0<16,16,1>UB {align1}; +mov (16) g67.0<1>UW g40.0<16,16,1>UB {align1}; +mov (16) g68.0<1>UW g42.0<16,16,1>UB {align1}; +mov (16) g69.0<1>UW g44.0<16,16,1>UB {align1}; +mov (16) g70.0<1>UW g46.0<16,16,1>UB {align1}; +mov (16) g71.0<1>UW g48.0<16,16,1>UB {align1}; +mov (16) g72.0<1>UW g50.0<16,16,1>UB {align1}; +mov (16) g73.0<1>UW g52.0<16,16,1>UB {align1}; diff --git a/src/shaders/mpeg2/vld/field_read_x0y1_uv.g4i b/src/shaders/mpeg2/vld/field_read_x0y1_uv.g4i new file mode 100644 index 00000000..b72507a6 --- /dev/null +++ b/src/shaders/mpeg2/vld/field_read_x0y1_uv.g4i @@ -0,0 +1,45 @@ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data + g115: message descriptor for reading reference data */ +mov (1) g32.8<1>UD 0x7000FUD {align1}; //8*16 +send (16) 0 g40.0<1>UW g32<8,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 4 {align1};//U +send (16) 0 g46.0<1>UW g32<8,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 4 {align1};//V +add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; +mov (1) g32.8<1>UD 0x0FUD {align1}; +send (16) 0 g44.0<1>UW g32<8,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 1 {align1};//U +send (16) 0 g50.0<1>UW g32<8,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 1 {align1};//V +//U +avg (8) g74.0<1>UW g40.0<8,8,1>UB g41.0<8,8,1>UB {align1}; +avg (8) g74.16<1>UW g41.0<8,8,1>UB g42.0<8,8,1>UB {align1}; +avg (8) g75.0<1>UW g42.0<8,8,1>UB g43.0<8,8,1>UB {align1}; +avg (8) g75.16<1>UW g43.0<8,8,1>UB g44.0<8,8,1>UB {align1}; +//V +avg (8) g78.0<1>UW g46.0<8,8,1>UB g47.0<8,8,1>UB {align1}; +avg (8) g78.16<1>UW g47.0<8,8,1>UB g48.0<8,8,1>UB {align1}; +avg (8) g79.0<1>UW g48.0<8,8,1>UB g49.0<8,8,1>UB {align1}; +avg (8) g79.16<1>UW g49.0<8,8,1>UB g50.0<8,8,1>UB {align1}; + +mov (1) g32.8<1>UD 0x7000FUD {align1}; //8*16 +send (16) 0 g40.0<1>UW g32<8,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 4 {align1};//U +send (16) 0 g46.0<1>UW g32<8,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 4 {align1};//V +add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; +mov (1) g32.8<1>UD 0x0FUD {align1}; +send (16) 0 g44.0<1>UW g32<8,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 1 {align1};//U +send (16) 0 g50.0<1>UW g32<8,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 1 {align1};//V +//U +avg (8) g76.0<1>UW g40.0<8,8,1>UB g41.0<8,8,1>UB {align1}; +avg (8) g76.16<1>UW g41.0<8,8,1>UB g42.0<8,8,1>UB {align1}; +avg (8) g77.0<1>UW g42.0<8,8,1>UB g43.0<8,8,1>UB {align1}; +avg (8) g77.16<1>UW g43.0<8,8,1>UB g44.0<8,8,1>UB {align1}; +//V +avg (8) g80.0<1>UW g46.0<8,8,1>UB g47.0<8,8,1>UB {align1}; +avg (8) g80.16<1>UW g47.0<8,8,1>UB g48.0<8,8,1>UB {align1}; +avg (8) g81.0<1>UW g48.0<8,8,1>UB g49.0<8,8,1>UB {align1}; +avg (8) g81.16<1>UW g49.0<8,8,1>UB g50.0<8,8,1>UB {align1}; diff --git a/src/shaders/mpeg2/vld/field_read_x0y1_y.g4i b/src/shaders/mpeg2/vld/field_read_x0y1_y.g4i new file mode 100644 index 00000000..98a09edc --- /dev/null +++ b/src/shaders/mpeg2/vld/field_read_x0y1_y.g4i @@ -0,0 +1,68 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data + g115: message descriptor for reading reference data */ +mov (1) g32.8<1>UD 0x07001FUD {align1}; +send (16) 0 g38.0<1>UW g32<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; +send (16) 0 g46.0<1>UW g32<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; +mov (1) g32.8<1>UD 0x1FUD {align1}; +send (16) 0 g54.0<1>UW g32<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; +avg (16) g58.0<1>UW g38.0<16,16,1>UB g40.0<16,16,1>UB {align1}; +avg (16) g59.0<1>UW g40.0<16,16,1>UB g42.0<16,16,1>UB {align1}; +avg (16) g60.0<1>UW g42.0<16,16,1>UB g44.0<16,16,1>UB {align1}; +avg (16) g61.0<1>UW g44.0<16,16,1>UB g46.0<16,16,1>UB {align1}; +avg (16) g62.0<1>UW g46.0<16,16,1>UB g48.0<16,16,1>UB {align1}; +avg (16) g63.0<1>UW g48.0<16,16,1>UB g50.0<16,16,1>UB {align1}; +avg (16) g64.0<1>UW g50.0<16,16,1>UB g52.0<16,16,1>UB {align1}; +avg (16) g65.0<1>UW g52.0<16,16,1>UB g54.0<16,16,1>UB {align1}; + +mov (1) g32.8<1>UD 0x07001FUD {align1}; +send (16) 0 g38.0<1>UW g32<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; +send (16) 0 g46.0<1>UW g32<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; +mov (1) g32.8<1>UD 0x1FUD {align1}; +send (16) 0 g54.0<1>UW g32<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; +avg (16) g66.0<1>UW g38.0<16,16,1>UB g40.0<16,16,1>UB {align1}; +avg (16) g67.0<1>UW g40.0<16,16,1>UB g42.0<16,16,1>UB {align1}; +avg (16) g68.0<1>UW g42.0<16,16,1>UB g44.0<16,16,1>UB {align1}; +avg (16) g69.0<1>UW g44.0<16,16,1>UB g46.0<16,16,1>UB {align1}; +avg (16) g70.0<1>UW g46.0<16,16,1>UB g48.0<16,16,1>UB {align1}; +avg (16) g71.0<1>UW g48.0<16,16,1>UB g50.0<16,16,1>UB {align1}; +avg (16) g72.0<1>UW g50.0<16,16,1>UB g52.0<16,16,1>UB {align1}; +avg (16) g73.0<1>UW g52.0<16,16,1>UB g54.0<16,16,1>UB {align1}; diff --git a/src/shaders/mpeg2/vld/field_read_x1y0_uv.g4i b/src/shaders/mpeg2/vld/field_read_x1y0_uv.g4i new file mode 100644 index 00000000..8e318d7a --- /dev/null +++ b/src/shaders/mpeg2/vld/field_read_x1y0_uv.g4i @@ -0,0 +1,37 @@ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data + g115: message descriptor for reading reference data */ +mov (1) g32.8<1>UD 0x7000FUD {align1}; //8*16 +send (16) 0 g40.0<1>UW g32<8,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 4 {align1};//U +send (16) 0 g44.0<1>UW g32<8,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 4 {align1};//V +//U +avg (8) g74.0<1>UW g40.0<8,8,1>UB g40.1<8,8,1>UB {align1}; +avg (8) g74.16<1>UW g41.0<8,8,1>UB g41.1<8,8,1>UB {align1}; +avg (8) g75.0<1>UW g42.0<8,8,1>UB g42.1<8,8,1>UB {align1}; +avg (8) g75.16<1>UW g43.0<8,8,1>UB g43.1<8,8,1>UB {align1}; +//V +avg (8) g78.0<1>UW g44.0<8,8,1>UB g44.1<8,8,1>UB {align1}; +avg (8) g78.16<1>UW g45.0<8,8,1>UB g45.1<8,8,1>UB {align1}; +avg (8) g79.0<1>UW g46.0<8,8,1>UB g46.1<8,8,1>UB {align1}; +avg (8) g79.16<1>UW g47.0<8,8,1>UB g47.1<8,8,1>UB {align1}; + +add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; +send (16) 0 g40.0<1>UW g32<8,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 4 {align1};//U +send (16) 0 g44.0<1>UW g32<8,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 4 {align1};//V +//U +avg (8) g76.0<1>UW g40.0<8,8,1>UB g40.1<8,8,1>UB {align1}; +avg (8) g76.16<1>UW g41.0<8,8,1>UB g41.1<8,8,1>UB {align1}; +avg (8) g77.0<1>UW g42.0<8,8,1>UB g42.1<8,8,1>UB {align1}; +avg (8) g77.16<1>UW g43.0<8,8,1>UB g43.1<8,8,1>UB {align1}; +//V +avg (8) g80.0<1>UW g44.0<8,8,1>UB g44.1<8,8,1>UB {align1}; +avg (8) g80.16<1>UW g45.0<8,8,1>UB g45.1<8,8,1>UB {align1}; +avg (8) g81.0<1>UW g46.0<8,8,1>UB g46.1<8,8,1>UB {align1}; +avg (8) g81.16<1>UW g47.0<8,8,1>UB g47.1<8,8,1>UB {align1}; diff --git a/src/shaders/mpeg2/vld/field_read_x1y0_y.g4i b/src/shaders/mpeg2/vld/field_read_x1y0_y.g4i new file mode 100644 index 00000000..0d2fbb1a --- /dev/null +++ b/src/shaders/mpeg2/vld/field_read_x1y0_y.g4i @@ -0,0 +1,62 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data + g115: message descriptor for reading reference data */ +mov (1) g32.8<1>UD 0x07001FUD {align1}; +send (16) 0 g38.0<1>UW g32<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; +send (16) 0 g46.0<1>UW g32<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1}; +avg (16) g58.0<1>UW g38.0<16,16,1>UB g38.1<16,16,1>UB {align1}; +avg (16) g59.0<1>UW g40.0<16,16,1>UB g40.1<16,16,1>UB {align1}; +avg (16) g60.0<1>UW g42.0<16,16,1>UB g42.1<16,16,1>UB {align1}; +avg (16) g61.0<1>UW g44.0<16,16,1>UB g44.1<16,16,1>UB {align1}; +avg (16) g62.0<1>UW g46.0<16,16,1>UB g46.1<16,16,1>UB {align1}; +avg (16) g63.0<1>UW g48.0<16,16,1>UB g48.1<16,16,1>UB {align1}; +avg (16) g64.0<1>UW g50.0<16,16,1>UB g50.1<16,16,1>UB {align1}; +avg (16) g65.0<1>UW g52.0<16,16,1>UB g52.1<16,16,1>UB {align1}; + +add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; +send (16) 0 g38.0<1>UW g32<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; +send (16) 0 g46.0<1>UW g32<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1}; +avg (16) g66.0<1>UW g38.0<16,16,1>UB g38.1<16,16,1>UB {align1}; +avg (16) g67.0<1>UW g40.0<16,16,1>UB g40.1<16,16,1>UB {align1}; +avg (16) g68.0<1>UW g42.0<16,16,1>UB g42.1<16,16,1>UB {align1}; +avg (16) g69.0<1>UW g44.0<16,16,1>UB g44.1<16,16,1>UB {align1}; +avg (16) g70.0<1>UW g46.0<16,16,1>UB g46.1<16,16,1>UB {align1}; +avg (16) g71.0<1>UW g48.0<16,16,1>UB g48.1<16,16,1>UB {align1}; +avg (16) g72.0<1>UW g50.0<16,16,1>UB g50.1<16,16,1>UB {align1}; +avg (16) g73.0<1>UW g52.0<16,16,1>UB g52.1<16,16,1>UB {align1}; diff --git a/src/shaders/mpeg2/vld/field_read_x1y1_uv.g4i b/src/shaders/mpeg2/vld/field_read_x1y1_uv.g4i new file mode 100644 index 00000000..dd8877af --- /dev/null +++ b/src/shaders/mpeg2/vld/field_read_x1y1_uv.g4i @@ -0,0 +1,91 @@ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data + g115: message descriptor for reading reference data */ +mov (1) g32.8<1>UD 0x7000FUD {align1}; //8*16 +send (16) 0 g40.0<1>UW g32<8,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 4 {align1};//U +send (16) 0 g46.0<1>UW g32<8,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 4 {align1};//V +add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; +mov (1) g32.8<1>UD 0x0FUD {align1}; +send (16) 0 g44.0<1>UW g32<8,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 1 {align1};//U +send (16) 0 g50.0<1>UW g32<8,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 1 {align1};//V +//U +add (8) g74.0<1>UW g40.0<8,8,1>UB g40.1<8,8,1>UB {align1}; +add (8) g74.16<1>UW g41.0<8,8,1>UB g41.1<8,8,1>UB {align1}; +add (8) g75.0<1>UW g42.0<8,8,1>UB g42.1<8,8,1>UB {align1}; +add (8) g75.16<1>UW g43.0<8,8,1>UB g43.1<8,8,1>UB {align1}; + +add (8) g74.0<1>UW g74.0<8,8,1>UW g41.0<8,8,1>UB {align1}; +add (8) g74.16<1>UW g74.16<8,8,1>UW g42.0<8,8,1>UB {align1}; +add (8) g75.0<1>UW g75.0<8,8,1>UW g43.0<8,8,1>UB {align1}; +add (8) g75.16<1>UW g75.16<8,8,1>UW g44.0<8,8,1>UB {align1}; + +add (8) g74.0<1>UW g74.0<8,8,1>UW g41.1<8,8,1>UB {align1}; +add (8) g74.16<1>UW g74.16<8,8,1>UW g42.1<8,8,1>UB {align1}; +add (8) g75.0<1>UW g75.0<8,8,1>UW g43.1<8,8,1>UB {align1}; +add (8) g75.16<1>UW g75.16<8,8,1>UW g44.1<8,8,1>UB {align1}; +//V +add (8) g78.0<1>UW g46.0<8,8,1>UB g46.1<8,8,1>UB {align1}; +add (8) g78.16<1>UW g47.0<8,8,1>UB g47.1<8,8,1>UB {align1}; +add (8) g79.0<1>UW g48.0<8,8,1>UB g48.1<8,8,1>UB {align1}; +add (8) g79.16<1>UW g49.0<8,8,1>UB g49.1<8,8,1>UB {align1}; + +add (8) g78.0<1>UW g78.0<8,8,1>UW g47.0<8,8,1>UB {align1}; +add (8) g78.16<1>UW g78.16<8,8,1>UW g48.0<8,8,1>UB {align1}; +add (8) g79.0<1>UW g79.0<8,8,1>UW g49.0<8,8,1>UB {align1}; +add (8) g79.16<1>UW g79.16<8,8,1>UW g50.0<8,8,1>UB {align1}; + +add (8) g78.0<1>UW g78.0<8,8,1>UW g47.1<8,8,1>UB {align1}; +add (8) g78.16<1>UW g78.16<8,8,1>UW g48.1<8,8,1>UB {align1}; +add (8) g79.0<1>UW g79.0<8,8,1>UW g49.1<8,8,1>UB {align1}; +add (8) g79.16<1>UW g79.16<8,8,1>UW g50.1<8,8,1>UB {align1}; + +mov (1) g32.8<1>UD 0x7000FUD {align1}; //8*16 +send (16) 0 g40.0<1>UW g32<8,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 4 {align1};//U +send (16) 0 g46.0<1>UW g32<8,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 4 {align1};//V +add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; +mov (1) g32.8<1>UD 0x0FUD {align1}; +send (16) 0 g44.0<1>UW g32<8,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 1 {align1};//U +send (16) 0 g50.0<1>UW g32<8,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 1 {align1};//V +//U +add (8) g76.0<1>UW g40.0<8,8,1>UB g40.1<8,8,1>UB {align1}; +add (8) g76.16<1>UW g41.0<8,8,1>UB g41.1<8,8,1>UB {align1}; +add (8) g77.0<1>UW g42.0<8,8,1>UB g42.1<8,8,1>UB {align1}; +add (8) g77.16<1>UW g43.0<8,8,1>UB g43.1<8,8,1>UB {align1}; + +add (8) g76.0<1>UW g76.0<8,8,1>UW g41.0<8,8,1>UB {align1}; +add (8) g76.16<1>UW g76.16<8,8,1>UW g42.0<8,8,1>UB {align1}; +add (8) g77.0<1>UW g77.0<8,8,1>UW g43.0<8,8,1>UB {align1}; +add (8) g77.16<1>UW g77.16<8,8,1>UW g44.0<8,8,1>UB {align1}; + +add (8) g76.0<1>UW g76.0<8,8,1>UW g41.1<8,8,1>UB {align1}; +add (8) g76.16<1>UW g76.16<8,8,1>UW g42.1<8,8,1>UB {align1}; +add (8) g77.0<1>UW g77.0<8,8,1>UW g43.1<8,8,1>UB {align1}; +add (8) g77.16<1>UW g77.16<8,8,1>UW g44.1<8,8,1>UB {align1}; +//V +add (8) g80.0<1>UW g46.0<8,8,1>UB g46.1<8,8,1>UB {align1}; +add (8) g80.16<1>UW g47.0<8,8,1>UB g47.1<8,8,1>UB {align1}; +add (8) g81.0<1>UW g48.0<8,8,1>UB g48.1<8,8,1>UB {align1}; +add (8) g81.16<1>UW g49.0<8,8,1>UB g49.1<8,8,1>UB {align1}; + +add (8) g80.0<1>UW g80.0<8,8,1>UW g47.0<8,8,1>UB {align1}; +add (8) g80.16<1>UW g80.16<8,8,1>UW g48.0<8,8,1>UB {align1}; +add (8) g81.0<1>UW g81.0<8,8,1>UW g49.0<8,8,1>UB {align1}; +add (8) g81.16<1>UW g81.16<8,8,1>UW g50.0<8,8,1>UB {align1}; + +add (8) g80.0<1>UW g80.0<8,8,1>UW g47.1<8,8,1>UB {align1}; +add (8) g80.16<1>UW g80.16<8,8,1>UW g48.1<8,8,1>UB {align1}; +add (8) g81.0<1>UW g81.0<8,8,1>UW g49.1<8,8,1>UB {align1}; +add (8) g81.16<1>UW g81.16<8,8,1>UW g50.1<8,8,1>UB {align1}; + +shr (32) g74.0<1>UW g74.0<16,16,1>UW 2UW {align1 compr}; +shr (32) g76.0<1>UW g76.0<16,16,1>UW 2UW {align1 compr}; +shr (32) g78.0<1>UW g78.0<16,16,1>UW 2UW {align1 compr}; +shr (32) g80.0<1>UW g80.0<16,16,1>UW 2UW {align1 compr}; + diff --git a/src/shaders/mpeg2/vld/field_read_x1y1_y.g4i b/src/shaders/mpeg2/vld/field_read_x1y1_y.g4i new file mode 100644 index 00000000..7c28b86e --- /dev/null +++ b/src/shaders/mpeg2/vld/field_read_x1y1_y.g4i @@ -0,0 +1,123 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data + g115: message descriptor for reading reference data */ +mov (1) g32.8<1>UD 0x07001FUD {align1}; +send (16) 0 g38.0<1>UW g32<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; +send (16) 0 g46.0<1>UW g32<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; +mov (1) g32.8<1>UD 0x1FUD {align1}; +send (16) 0 g54.0<1>UW g32<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; +add (16) g58.0<1>UW g38.0<16,16,1>UB g38.1<16,16,1>UB {align1}; +add (16) g59.0<1>UW g40.0<16,16,1>UB g40.1<16,16,1>UB {align1}; +add (16) g60.0<1>UW g42.0<16,16,1>UB g42.1<16,16,1>UB {align1}; +add (16) g61.0<1>UW g44.0<16,16,1>UB g44.1<16,16,1>UB {align1}; +add (16) g62.0<1>UW g46.0<16,16,1>UB g46.1<16,16,1>UB {align1}; +add (16) g63.0<1>UW g48.0<16,16,1>UB g48.1<16,16,1>UB {align1}; +add (16) g64.0<1>UW g50.0<16,16,1>UB g50.1<16,16,1>UB {align1}; +add (16) g65.0<1>UW g52.0<16,16,1>UB g52.1<16,16,1>UB {align1}; + +add (16) g58.0<1>UW g58.0<16,16,1>UW g40.0<16,16,1>UB {align1}; +add (16) g59.0<1>UW g59.0<16,16,1>UW g42.0<16,16,1>UB {align1}; +add (16) g60.0<1>UW g60.0<16,16,1>UW g44.0<16,16,1>UB {align1}; +add (16) g61.0<1>UW g61.0<16,16,1>UW g46.0<16,16,1>UB {align1}; +add (16) g62.0<1>UW g62.0<16,16,1>UW g48.0<16,16,1>UB {align1}; +add (16) g63.0<1>UW g63.0<16,16,1>UW g50.0<16,16,1>UB {align1}; +add (16) g64.0<1>UW g64.0<16,16,1>UW g52.0<16,16,1>UB {align1}; +add (16) g65.0<1>UW g65.0<16,16,1>UW g54.0<16,16,1>UB {align1}; + +add (16) g58.0<1>UW g58.0<16,16,1>UW g40.1<16,16,1>UB {align1}; +add (16) g59.0<1>UW g59.0<16,16,1>UW g42.1<16,16,1>UB {align1}; +add (16) g60.0<1>UW g60.0<16,16,1>UW g44.1<16,16,1>UB {align1}; +add (16) g61.0<1>UW g61.0<16,16,1>UW g46.1<16,16,1>UB {align1}; +add (16) g62.0<1>UW g62.0<16,16,1>UW g48.1<16,16,1>UB {align1}; +add (16) g63.0<1>UW g63.0<16,16,1>UW g50.1<16,16,1>UB {align1}; +add (16) g64.0<1>UW g64.0<16,16,1>UW g52.1<16,16,1>UB {align1}; +add (16) g65.0<1>UW g65.0<16,16,1>UW g54.1<16,16,1>UB {align1}; + +shr (16) g58.0<1>UW g58.0<16,16,1>UW 2UW {align1}; +shr (16) g59.0<1>UW g59.0<16,16,1>UW 2UW {align1}; +shr (16) g60.0<1>UW g60.0<16,16,1>UW 2UW {align1}; +shr (16) g61.0<1>UW g61.0<16,16,1>UW 2UW {align1}; +shr (16) g62.0<1>UW g62.0<16,16,1>UW 2UW {align1}; +shr (16) g63.0<1>UW g63.0<16,16,1>UW 2UW {align1}; +shr (16) g64.0<1>UW g64.0<16,16,1>UW 2UW {align1}; +shr (16) g65.0<1>UW g65.0<16,16,1>UW 2UW {align1}; + +mov (1) g32.8<1>UD 0x07001FUD {align1}; +send (16) 0 g38.0<1>UW g32<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; +send (16) 0 g46.0<1>UW g32<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; +mov (1) g32.8<1>UD 0x1FUD {align1}; +send (16) 0 g54.0<1>UW g32<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; +add (16) g66.0<1>UW g38.0<16,16,1>UB g38.1<16,16,1>UB {align1}; +add (16) g67.0<1>UW g40.0<16,16,1>UB g40.1<16,16,1>UB {align1}; +add (16) g68.0<1>UW g42.0<16,16,1>UB g42.1<16,16,1>UB {align1}; +add (16) g69.0<1>UW g44.0<16,16,1>UB g44.1<16,16,1>UB {align1}; +add (16) g70.0<1>UW g46.0<16,16,1>UB g46.1<16,16,1>UB {align1}; +add (16) g71.0<1>UW g48.0<16,16,1>UB g48.1<16,16,1>UB {align1}; +add (16) g72.0<1>UW g50.0<16,16,1>UB g50.1<16,16,1>UB {align1}; +add (16) g73.0<1>UW g52.0<16,16,1>UB g52.1<16,16,1>UB {align1}; + +add (16) g66.0<1>UW g66.0<16,16,1>UW g40.0<16,16,1>UB {align1}; +add (16) g67.0<1>UW g67.0<16,16,1>UW g42.0<16,16,1>UB {align1}; +add (16) g68.0<1>UW g68.0<16,16,1>UW g44.0<16,16,1>UB {align1}; +add (16) g69.0<1>UW g69.0<16,16,1>UW g46.0<16,16,1>UB {align1}; +add (16) g70.0<1>UW g70.0<16,16,1>UW g48.0<16,16,1>UB {align1}; +add (16) g71.0<1>UW g71.0<16,16,1>UW g50.0<16,16,1>UB {align1}; +add (16) g72.0<1>UW g72.0<16,16,1>UW g52.0<16,16,1>UB {align1}; +add (16) g73.0<1>UW g73.0<16,16,1>UW g54.0<16,16,1>UB {align1}; + +add (16) g66.0<1>UW g66.0<16,16,1>UW g40.1<16,16,1>UB {align1}; +add (16) g67.0<1>UW g67.0<16,16,1>UW g42.1<16,16,1>UB {align1}; +add (16) g68.0<1>UW g68.0<16,16,1>UW g44.1<16,16,1>UB {align1}; +add (16) g69.0<1>UW g69.0<16,16,1>UW g46.1<16,16,1>UB {align1}; +add (16) g70.0<1>UW g70.0<16,16,1>UW g48.1<16,16,1>UB {align1}; +add (16) g71.0<1>UW g71.0<16,16,1>UW g50.1<16,16,1>UB {align1}; +add (16) g72.0<1>UW g72.0<16,16,1>UW g52.1<16,16,1>UB {align1}; +add (16) g73.0<1>UW g73.0<16,16,1>UW g54.1<16,16,1>UB {align1}; + +shr (16) g66.0<1>UW g66.0<16,16,1>UW 2UW {align1}; +shr (16) g67.0<1>UW g67.0<16,16,1>UW 2UW {align1}; +shr (16) g68.0<1>UW g68.0<16,16,1>UW 2UW {align1}; +shr (16) g69.0<1>UW g69.0<16,16,1>UW 2UW {align1}; +shr (16) g70.0<1>UW g70.0<16,16,1>UW 2UW {align1}; +shr (16) g71.0<1>UW g71.0<16,16,1>UW 2UW {align1}; +shr (16) g72.0<1>UW g72.0<16,16,1>UW 2UW {align1}; +shr (16) g73.0<1>UW g73.0<16,16,1>UW 2UW {align1}; + diff --git a/src/shaders/mpeg2/vld/frame_field_pred_backward.g4a b/src/shaders/mpeg2/vld/frame_field_pred_backward.g4a new file mode 100644 index 00000000..9db50eda --- /dev/null +++ b/src/shaders/mpeg2/vld/frame_field_pred_backward.g4a @@ -0,0 +1,126 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data + g115: message descriptor for reading reference data */ +mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; +mov(2) g31.0<1>UD g82.12<2,2,1>UW {align1}; +mov (1) g126.8<1>UD ip {align1}; +mov (1) ip g21.0<1,1,1>UD {align1}; + +/*field 0 of Y*/ +asr (2) g31.14<1>W g82.20<2,2,1>W 1W {align1}; +shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; +add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; +and.nz (1) null g82.2<1,1,1>UW 0x2000UW {align1}; +(f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; +define(`surface',`7') +define(`mv1',`g82.20') +define(`mv2',`g82.22') +include(`motion_field_y.g4i') +mov (8) g58.0<1>UD g32.0<8,8,1>UD {align1}; +mov (8) g60.0<1>UD g33.0<8,8,1>UD {align1}; +mov (8) g62.0<1>UD g34.0<8,8,1>UD {align1}; +mov (8) g64.0<1>UD g35.0<8,8,1>UD {align1}; +mov (8) g66.0<1>UD g36.0<8,8,1>UD {align1}; +mov (8) g68.0<1>UD g37.0<8,8,1>UD {align1}; +mov (8) g70.0<1>UD g38.0<8,8,1>UD {align1}; +mov (8) g72.0<1>UD g39.0<8,8,1>UD {align1}; + +/*field 1 of Y*/ +asr (2) g31.14<1>W g82.28<2,2,1>W 1W {align1}; +shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; +add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; +and.nz (1) null g82.2<1,1,1>UW 0x8000UW {align1}; +(f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; +define(`surface',`7') +define(`mv1',`g82.28') +define(`mv2',`g82.30') +include(`motion_field_y.g4i') +mov (8) g59.0<1>UD g32.0<8,8,1>UD {align1}; +mov (8) g61.0<1>UD g33.0<8,8,1>UD {align1}; +mov (8) g63.0<1>UD g34.0<8,8,1>UD {align1}; +mov (8) g65.0<1>UD g35.0<8,8,1>UD {align1}; +mov (8) g67.0<1>UD g36.0<8,8,1>UD {align1}; +mov (8) g69.0<1>UD g37.0<8,8,1>UD {align1}; +mov (8) g71.0<1>UD g38.0<8,8,1>UD {align1}; +mov (8) g73.0<1>UD g39.0<8,8,1>UD {align1}; + +/*field 0 of UV*/ +shr (2) g31.0<1>UD g31.0<2,2,1>UD 1UD {align1}; +asr (2) g82.20<1>W g82.20<2,2,1>W 1W {align1}; +asr (2) g31.14<1>W g82.20<2,2,1>W 1W {align1}; +shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; +add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +and.nz (1) null g82.2<1,1,1>UW 0x2000UW {align1}; +(f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; +define(`surface_u', `8') +define(`surface_v', `9') +define(`mv1',`g82.20') +define(`mv2',`g82.22') +include(`motion_field_uv.g4i') +mov (8) g74.0<1>UW g32.0<8,8,1>UW {align1}; +mov (8) g75.0<1>UW g33.0<8,8,1>UW {align1}; +mov (8) g76.0<1>UW g34.0<8,8,1>UW {align1}; +mov (8) g77.0<1>UW g35.0<8,8,1>UW {align1}; +mov (8) g78.0<1>UW g36.0<8,8,1>UW {align1}; +mov (8) g79.0<1>UW g37.0<8,8,1>UW {align1}; +mov (8) g80.0<1>UW g38.0<8,8,1>UW {align1}; +mov (8) g81.0<1>UW g39.0<8,8,1>UW {align1}; + +/*field 1 of UV*/ +asr (2) g82.28<1>W g82.28<2,2,1>W 1W {align1}; +asr (2) g31.14<1>W g82.28<2,2,1>W 1W {align1}; +shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; +add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +and.nz (1) null g82.2<1,1,1>UW 0x8000UW {align1}; +(f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; +define(`mv1',`g82.28') +define(`mv2',`g82.30') +include(`motion_field_uv.g4i') +mov (8) g74.16<1>UW g32.0<8,8,1>UW {align1}; +mov (8) g75.16<1>UW g33.0<8,8,1>UW {align1}; +mov (8) g76.16<1>UW g34.0<8,8,1>UW {align1}; +mov (8) g77.16<1>UW g35.0<8,8,1>UW {align1}; +mov (8) g78.16<1>UW g36.0<8,8,1>UW {align1}; +mov (8) g79.16<1>UW g37.0<8,8,1>UW {align1}; +mov (8) g80.16<1>UW g38.0<8,8,1>UW {align1}; +mov (8) g81.16<1>UW g39.0<8,8,1>UW {align1}; + +include(`addidct.g4i') +send (16) 0 acc0<1>UW g0<8,8,1>UW + thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; diff --git a/src/shaders/mpeg2/vld/frame_field_pred_backward.g4b b/src/shaders/mpeg2/vld/frame_field_pred_backward.g4b new file mode 100644 index 00000000..5d468295 --- /dev/null +++ b/src/shaders/mpeg2/vld/frame_field_pred_backward.g4b @@ -0,0 +1,553 @@ + { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, + { 0x00000001, 0x34000020, 0x002102a0, 0x00000000 }, + { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x20002000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20002dbc, 0x00210a54, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000045 }, + { 0x01000005, 0x20002dbc, 0x00210a56, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000002f }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a007 }, + { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, + { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, + { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, + { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, + { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000040 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000002c }, + { 0x01000005, 0x20002dbc, 0x00210a56, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000017 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a007 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000013 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, + { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, + { 0x00600001, 0x27400021, 0x008d0400, 0x00000000 }, + { 0x00600001, 0x27800021, 0x008d0420, 0x00000000 }, + { 0x00600001, 0x27c00021, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x28000021, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28400021, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28800021, 0x008d04a0, 0x00000000 }, + { 0x00600001, 0x28c00021, 0x008d04c0, 0x00000000 }, + { 0x00600001, 0x29000021, 0x008d04e0, 0x00000000 }, + { 0x0020000c, 0x23ee3dad, 0x00450a5c, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x80008000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20002dbc, 0x00210a5c, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000045 }, + { 0x01000005, 0x20002dbc, 0x00210a5e, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000002f }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a007 }, + { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, + { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, + { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, + { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, + { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000040 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000002c }, + { 0x01000005, 0x20002dbc, 0x00210a5e, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000017 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a007 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000013 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, + { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, + { 0x00600001, 0x27600021, 0x008d0400, 0x00000000 }, + { 0x00600001, 0x27a00021, 0x008d0420, 0x00000000 }, + { 0x00600001, 0x27e00021, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28600021, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28a00021, 0x008d04a0, 0x00000000 }, + { 0x00600001, 0x28e00021, 0x008d04c0, 0x00000000 }, + { 0x00600001, 0x29200021, 0x008d04e0, 0x00000000 }, + { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, + { 0x0020000c, 0x2a543dad, 0x00450a54, 0x00010001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x20002000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20003dbc, 0x00210a54, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000032 }, + { 0x01000005, 0x20003dbc, 0x00210a56, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, + { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a009 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a008 }, + { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a009 }, + { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, + { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, + { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000029 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0414a009 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, + { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, + { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, + { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, + { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000001d }, + { 0x01000005, 0x20003dbc, 0x00210a56, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, + { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a009 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a008 }, + { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a009 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000b }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x00ad0e60, 0x0414a008 }, + { 0x00800031, 0x25a01d29, 0x00ad0e60, 0x0414a009 }, + { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, + { 0x00600001, 0x29400129, 0x008d0400, 0x00000000 }, + { 0x00600001, 0x29600129, 0x008d0420, 0x00000000 }, + { 0x00600001, 0x29800129, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x29a00129, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x29c00129, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x29e00129, 0x008d04a0, 0x00000000 }, + { 0x00600001, 0x2a000129, 0x008d04c0, 0x00000000 }, + { 0x00600001, 0x2a200129, 0x008d04e0, 0x00000000 }, + { 0x0020000c, 0x2a5c3dad, 0x00450a5c, 0x00010001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a5c, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x80008000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20003dbc, 0x00210a5c, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000032 }, + { 0x01000005, 0x20003dbc, 0x00210a5e, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, + { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a009 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a008 }, + { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a009 }, + { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, + { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, + { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000029 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0414a009 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, + { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, + { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, + { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, + { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000001d }, + { 0x01000005, 0x20003dbc, 0x00210a5e, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, + { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a009 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a008 }, + { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a009 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000b }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x00ad0e60, 0x0414a008 }, + { 0x00800031, 0x25a01d29, 0x00ad0e60, 0x0414a009 }, + { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, + { 0x00600001, 0x29500129, 0x008d0400, 0x00000000 }, + { 0x00600001, 0x29700129, 0x008d0420, 0x00000000 }, + { 0x00600001, 0x29900129, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x29b00129, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x29d00129, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x29f00129, 0x008d04a0, 0x00000000 }, + { 0x00600001, 0x2a100129, 0x008d04c0, 0x00000000 }, + { 0x00600001, 0x2a300129, 0x008d04e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10a80, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10aa0, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10ac0, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10ae0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10b00, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10b20, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10b40, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10b60, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10b80, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10ba0, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10bc0, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10be0, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c00, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10c20, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10b60, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10a80, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10b80, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10aa0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10ba0, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10ac0, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10bc0, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10ae0, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10be0, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10b00, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10c00, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10b20, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c20, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10b40, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, + { 0x80800001, 0x474001b1, 0x00b10740, 0x00000000 }, + { 0x80800001, 0x476001b1, 0x00b10760, 0x00000000 }, + { 0x80800001, 0x478001b1, 0x00b10780, 0x00000000 }, + { 0x80800001, 0x47a001b1, 0x00b107a0, 0x00000000 }, + { 0x80800001, 0x47c001b1, 0x00b107c0, 0x00000000 }, + { 0x80800001, 0x47e001b1, 0x00b107e0, 0x00000000 }, + { 0x80800001, 0x480001b1, 0x00b10800, 0x00000000 }, + { 0x80800001, 0x482001b1, 0x00b10820, 0x00000000 }, + { 0x80800001, 0x484001b1, 0x00b10840, 0x00000000 }, + { 0x80800001, 0x486001b1, 0x00b10860, 0x00000000 }, + { 0x80800001, 0x488001b1, 0x00b10880, 0x00000000 }, + { 0x80800001, 0x48a001b1, 0x00b108a0, 0x00000000 }, + { 0x80800001, 0x48c001b1, 0x00b108c0, 0x00000000 }, + { 0x80800001, 0x48e001b1, 0x00b108e0, 0x00000000 }, + { 0x80800001, 0x490001b1, 0x00b10900, 0x00000000 }, + { 0x80800001, 0x492001b1, 0x00b10920, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, + { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, + { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, + { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, + { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, + { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, + { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05902000 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, + { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, + { 0x00800040, 0x294025ad, 0x00b10c60, 0x00b10940 }, + { 0x00800040, 0x296025ad, 0x00b10c80, 0x00b10960 }, + { 0x00800040, 0x298025ad, 0x00b10ca0, 0x00b10980 }, + { 0x00800040, 0x29a025ad, 0x00b10cc0, 0x00b109a0 }, + { 0x80800001, 0x494001b1, 0x00b10940, 0x00000000 }, + { 0x80800001, 0x496001b1, 0x00b10960, 0x00000000 }, + { 0x80800001, 0x498001b1, 0x00b10980, 0x00000000 }, + { 0x80800001, 0x49a001b1, 0x00b109a0, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302001 }, + { 0x00800040, 0x29c025a9, 0x00b10ce0, 0x00b109c0 }, + { 0x00800040, 0x29e025a9, 0x00b10d00, 0x00b109e0 }, + { 0x00800040, 0x2a0025a9, 0x00b10d20, 0x00b10a00 }, + { 0x00800040, 0x2a2025a9, 0x00b10d40, 0x00b10a20 }, + { 0x80800001, 0x49c001b1, 0x00b109c0, 0x00000000 }, + { 0x80800001, 0x49e001b1, 0x00b109e0, 0x00000000 }, + { 0x80800001, 0x4a0001b1, 0x00b10a00, 0x00000000 }, + { 0x80800001, 0x4a2001b1, 0x00b10a20, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302002 }, + { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, + { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, diff --git a/src/shaders/mpeg2/vld/frame_field_pred_backward.g4b.gen5 b/src/shaders/mpeg2/vld/frame_field_pred_backward.g4b.gen5 new file mode 100644 index 00000000..18595b26 --- /dev/null +++ b/src/shaders/mpeg2/vld/frame_field_pred_backward.g4b.gen5 @@ -0,0 +1,553 @@ + { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, + { 0x00000001, 0x34000020, 0x002102a0, 0x00000000 }, + { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x20002000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20002dbc, 0x00210a54, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000008a }, + { 0x01000005, 0x20002dbc, 0x00210a56, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000005e }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a007 }, + { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, + { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, + { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, + { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, + { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000080 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000058 }, + { 0x01000005, 0x20002dbc, 0x00210a56, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000002e }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a007 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000026 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, + { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, + { 0x00600001, 0x27400021, 0x008d0400, 0x00000000 }, + { 0x00600001, 0x27800021, 0x008d0420, 0x00000000 }, + { 0x00600001, 0x27c00021, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x28000021, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28400021, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28800021, 0x008d04a0, 0x00000000 }, + { 0x00600001, 0x28c00021, 0x008d04c0, 0x00000000 }, + { 0x00600001, 0x29000021, 0x008d04e0, 0x00000000 }, + { 0x0020000c, 0x23ee3dad, 0x00450a5c, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x80008000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20002dbc, 0x00210a5c, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000008a }, + { 0x01000005, 0x20002dbc, 0x00210a5e, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000005e }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a007 }, + { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, + { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, + { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, + { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, + { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000080 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000058 }, + { 0x01000005, 0x20002dbc, 0x00210a5e, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000002e }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a007 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000026 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, + { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, + { 0x00600001, 0x27600021, 0x008d0400, 0x00000000 }, + { 0x00600001, 0x27a00021, 0x008d0420, 0x00000000 }, + { 0x00600001, 0x27e00021, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28600021, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28a00021, 0x008d04a0, 0x00000000 }, + { 0x00600001, 0x28e00021, 0x008d04c0, 0x00000000 }, + { 0x00600001, 0x29200021, 0x008d04e0, 0x00000000 }, + { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, + { 0x0020000c, 0x2a543dad, 0x00450a54, 0x00010001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x20002000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20003dbc, 0x00210a54, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000064 }, + { 0x01000005, 0x20003dbc, 0x00210a56, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000048 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, + { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a009 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a008 }, + { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a009 }, + { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, + { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, + { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0248a009 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, + { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, + { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, + { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, + { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000003a }, + { 0x01000005, 0x20003dbc, 0x00210a56, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, + { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a009 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a008 }, + { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a009 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x40ad0e60, 0x0248a008 }, + { 0x00800031, 0x25a01d29, 0x40ad0e60, 0x0248a009 }, + { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, + { 0x00600001, 0x29400129, 0x008d0400, 0x00000000 }, + { 0x00600001, 0x29600129, 0x008d0420, 0x00000000 }, + { 0x00600001, 0x29800129, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x29a00129, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x29c00129, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x29e00129, 0x008d04a0, 0x00000000 }, + { 0x00600001, 0x2a000129, 0x008d04c0, 0x00000000 }, + { 0x00600001, 0x2a200129, 0x008d04e0, 0x00000000 }, + { 0x0020000c, 0x2a5c3dad, 0x00450a5c, 0x00010001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a5c, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x80008000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20003dbc, 0x00210a5c, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000064 }, + { 0x01000005, 0x20003dbc, 0x00210a5e, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000048 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, + { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a009 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a008 }, + { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a009 }, + { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, + { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, + { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0248a009 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, + { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, + { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, + { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, + { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000003a }, + { 0x01000005, 0x20003dbc, 0x00210a5e, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, + { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a009 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a008 }, + { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a009 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x40ad0e60, 0x0248a008 }, + { 0x00800031, 0x25a01d29, 0x40ad0e60, 0x0248a009 }, + { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, + { 0x00600001, 0x29500129, 0x008d0400, 0x00000000 }, + { 0x00600001, 0x29700129, 0x008d0420, 0x00000000 }, + { 0x00600001, 0x29900129, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x29b00129, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x29d00129, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x29f00129, 0x008d04a0, 0x00000000 }, + { 0x00600001, 0x2a100129, 0x008d04c0, 0x00000000 }, + { 0x00600001, 0x2a300129, 0x008d04e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10a80, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10aa0, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10ac0, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10ae0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10b00, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10b20, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10b40, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10b60, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10b80, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10ba0, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10bc0, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10be0, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c00, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10c20, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10b60, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10a80, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10b80, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10aa0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10ba0, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10ac0, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10bc0, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10ae0, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10be0, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10b00, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10c00, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10b20, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c20, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10b40, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, + { 0x80800001, 0x474001b1, 0x00b10740, 0x00000000 }, + { 0x80800001, 0x476001b1, 0x00b10760, 0x00000000 }, + { 0x80800001, 0x478001b1, 0x00b10780, 0x00000000 }, + { 0x80800001, 0x47a001b1, 0x00b107a0, 0x00000000 }, + { 0x80800001, 0x47c001b1, 0x00b107c0, 0x00000000 }, + { 0x80800001, 0x47e001b1, 0x00b107e0, 0x00000000 }, + { 0x80800001, 0x480001b1, 0x00b10800, 0x00000000 }, + { 0x80800001, 0x482001b1, 0x00b10820, 0x00000000 }, + { 0x80800001, 0x484001b1, 0x00b10840, 0x00000000 }, + { 0x80800001, 0x486001b1, 0x00b10860, 0x00000000 }, + { 0x80800001, 0x488001b1, 0x00b10880, 0x00000000 }, + { 0x80800001, 0x48a001b1, 0x00b108a0, 0x00000000 }, + { 0x80800001, 0x48c001b1, 0x00b108c0, 0x00000000 }, + { 0x80800001, 0x48e001b1, 0x00b108e0, 0x00000000 }, + { 0x80800001, 0x490001b1, 0x00b10900, 0x00000000 }, + { 0x80800001, 0x492001b1, 0x00b10920, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, + { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, + { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, + { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, + { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, + { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, + { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x12082000 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, + { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, + { 0x00800040, 0x294025ad, 0x00b10c60, 0x00b10940 }, + { 0x00800040, 0x296025ad, 0x00b10c80, 0x00b10960 }, + { 0x00800040, 0x298025ad, 0x00b10ca0, 0x00b10980 }, + { 0x00800040, 0x29a025ad, 0x00b10cc0, 0x00b109a0 }, + { 0x80800001, 0x494001b1, 0x00b10940, 0x00000000 }, + { 0x80800001, 0x496001b1, 0x00b10960, 0x00000000 }, + { 0x80800001, 0x498001b1, 0x00b10980, 0x00000000 }, + { 0x80800001, 0x49a001b1, 0x00b109a0, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082001 }, + { 0x00800040, 0x29c025a9, 0x00b10ce0, 0x00b109c0 }, + { 0x00800040, 0x29e025a9, 0x00b10d00, 0x00b109e0 }, + { 0x00800040, 0x2a0025a9, 0x00b10d20, 0x00b10a00 }, + { 0x00800040, 0x2a2025a9, 0x00b10d40, 0x00b10a20 }, + { 0x80800001, 0x49c001b1, 0x00b109c0, 0x00000000 }, + { 0x80800001, 0x49e001b1, 0x00b109e0, 0x00000000 }, + { 0x80800001, 0x4a0001b1, 0x00b10a00, 0x00000000 }, + { 0x80800001, 0x4a2001b1, 0x00b10a20, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082002 }, + { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, + { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, diff --git a/src/shaders/mpeg2/vld/frame_field_pred_bidirect.g4a b/src/shaders/mpeg2/vld/frame_field_pred_bidirect.g4a new file mode 100644 index 00000000..fdc1e838 --- /dev/null +++ b/src/shaders/mpeg2/vld/frame_field_pred_bidirect.g4a @@ -0,0 +1,213 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data + g115: message descriptor for reading reference data */ +mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; +mov(2) g31.0<1>UD g82.12<2,2,1>UW {align1}; +mov (1) g126.8<1>UD ip {align1}; +mov (1) ip g21.0<1,1,1>UD {align1}; + +/*field 0 forward prediction of Y*/ +asr (2) g31.14<1>W g82.16<2,2,1>W 1W {align1}; +shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; +add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; +and.nz (1) null g82.2<1,1,1>UW 0x1000UW {align1}; +(f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; +define(`surface',`4') +define(`mv1',`g82.16') +define(`mv2',`g82.18') +include(`motion_field_y.g4i') +mov (8) g58.0<1>UD g32.0<8,8,1>UD {align1}; +mov (8) g60.0<1>UD g33.0<8,8,1>UD {align1}; +mov (8) g62.0<1>UD g34.0<8,8,1>UD {align1}; +mov (8) g64.0<1>UD g35.0<8,8,1>UD {align1}; +mov (8) g66.0<1>UD g36.0<8,8,1>UD {align1}; +mov (8) g68.0<1>UD g37.0<8,8,1>UD {align1}; +mov (8) g70.0<1>UD g38.0<8,8,1>UD {align1}; +mov (8) g72.0<1>UD g39.0<8,8,1>UD {align1}; + +/*field 1 forward prediction of Y*/ +asr (2) g31.14<1>W g82.24<2,2,1>W 1W {align1}; +shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; +add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; +and.nz (1) null g82.2<1,1,1>UW 0x4000UW {align1}; +(f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; +define(`surface',`4') +define(`mv1',`g82.24') +define(`mv2',`g82.26') +include(`motion_field_y.g4i') +mov (8) g59.0<1>UD g32.0<8,8,1>UD {align1}; +mov (8) g61.0<1>UD g33.0<8,8,1>UD {align1}; +mov (8) g63.0<1>UD g34.0<8,8,1>UD {align1}; +mov (8) g65.0<1>UD g35.0<8,8,1>UD {align1}; +mov (8) g67.0<1>UD g36.0<8,8,1>UD {align1}; +mov (8) g69.0<1>UD g37.0<8,8,1>UD {align1}; +mov (8) g71.0<1>UD g38.0<8,8,1>UD {align1}; +mov (8) g73.0<1>UD g39.0<8,8,1>UD {align1}; + +/*field 0 forward prediction of UV*/ +shr (2) g31.0<1>UD g31.0<2,2,1>UD 1UD {align1}; +asr (2) g82.16<1>W g82.16<2,2,1>W 1W {align1}; +asr (2) g31.14<1>W g82.16<2,2,1>W 1W {align1}; +shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; +add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; +and.nz (1) null g82.2<1,1,1>UW 0x1000UW {align1}; +(f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; +define(`surface_u', `5') +define(`surface_v', `6') +define(`mv1',`g82.16') +define(`mv2',`g82.18') +include(`motion_field_uv.g4i') +mov (8) g74.0<1>UW g32.0<8,8,1>UW {align1}; +mov (8) g75.0<1>UW g33.0<8,8,1>UW {align1}; +mov (8) g76.0<1>UW g34.0<8,8,1>UW {align1}; +mov (8) g77.0<1>UW g35.0<8,8,1>UW {align1}; +mov (8) g78.0<1>UW g36.0<8,8,1>UW {align1}; +mov (8) g79.0<1>UW g37.0<8,8,1>UW {align1}; +mov (8) g80.0<1>UW g38.0<8,8,1>UW {align1}; +mov (8) g81.0<1>UW g39.0<8,8,1>UW {align1}; + +/*field 1 forward prediction of UV*/ +asr (2) g82.24<1>W g82.24<2,2,1>W 1W {align1}; +asr (2) g31.14<1>W g82.24<2,2,1>W 1W {align1}; +shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; +add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; +and.nz (1) null g82.2<1,1,1>UW 0x4000UW {align1}; +(f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; +define(`mv1',`g82.24') +define(`mv2',`g82.26') +include(`motion_field_uv.g4i') +mov (8) g74.16<1>UW g32.0<8,8,1>UW {align1}; +mov (8) g75.16<1>UW g33.0<8,8,1>UW {align1}; +mov (8) g76.16<1>UW g34.0<8,8,1>UW {align1}; +mov (8) g77.16<1>UW g35.0<8,8,1>UW {align1}; +mov (8) g78.16<1>UW g36.0<8,8,1>UW {align1}; +mov (8) g79.16<1>UW g37.0<8,8,1>UW {align1}; +mov (8) g80.16<1>UW g38.0<8,8,1>UW {align1}; +mov (8) g81.16<1>UW g39.0<8,8,1>UW {align1}; + +/*field 0 backward prediction of Y*/ +mov(2) g31.0<1>UD g82.12<2,2,1>UW {align1}; + +asr (2) g31.14<1>W g82.20<2,2,1>W 1W {align1}; +shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; +add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; +and.nz (1) null g82.2<1,1,1>UW 0x2000UW {align1}; +(f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; +define(`surface',`7') +define(`mv1',`g82.20') +define(`mv2',`g82.22') +include(`motion_field_y.g4i') +avg.sat (16) g58.0<1>UW g58.0<16,16,1>UW g32.0<16,16,1>UW {align1}; +avg.sat (16) g60.0<1>UW g60.0<16,16,1>UW g33.0<16,16,1>UW {align1}; +avg.sat (16) g62.0<1>UW g62.0<16,16,1>UW g34.0<16,16,1>UW {align1}; +avg.sat (16) g64.0<1>UW g64.0<16,16,1>UW g35.0<16,16,1>UW {align1}; +avg.sat (16) g66.0<1>UW g66.0<16,16,1>UW g36.0<16,16,1>UW {align1}; +avg.sat (16) g68.0<1>UW g68.0<16,16,1>UW g37.0<16,16,1>UW {align1}; +avg.sat (16) g70.0<1>UW g70.0<16,16,1>UW g38.0<16,16,1>UW {align1}; +avg.sat (16) g72.0<1>UW g72.0<16,16,1>UW g39.0<16,16,1>UW {align1}; + +/*field 1 backward prediction of Y*/ +asr (2) g31.14<1>W g82.28<2,2,1>W 1W {align1}; +shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; +add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; +and.nz (1) null g82.2<1,1,1>UW 0x8000UW {align1}; +(f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; +define(`surface',`7') +define(`mv1',`g82.28') +define(`mv2',`g82.30') +include(`motion_field_y.g4i') +avg.sat (16) g59.0<1>UW g59.0<16,16,1>UW g32.0<16,16,1>UW {align1}; +avg.sat (16) g61.0<1>UW g61.0<16,16,1>UW g33.0<16,16,1>UW {align1}; +avg.sat (16) g63.0<1>UW g63.0<16,16,1>UW g34.0<16,16,1>UW {align1}; +avg.sat (16) g65.0<1>UW g65.0<16,16,1>UW g35.0<16,16,1>UW {align1}; +avg.sat (16) g67.0<1>UW g67.0<16,16,1>UW g36.0<16,16,1>UW {align1}; +avg.sat (16) g69.0<1>UW g69.0<16,16,1>UW g37.0<16,16,1>UW {align1}; +avg.sat (16) g71.0<1>UW g71.0<16,16,1>UW g38.0<16,16,1>UW {align1}; +avg.sat (16) g73.0<1>UW g73.0<16,16,1>UW g39.0<16,16,1>UW {align1}; + +/*field 0 backward prediction of UV*/ +shr (2) g31.0<1>UD g31.0<2,2,1>UD 1UD {align1}; +asr (2) g82.20<1>W g82.20<2,2,1>W 1W {align1}; +asr (2) g31.14<1>W g82.20<2,2,1>W 1W {align1}; +shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; +add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; +and.nz (1) null g82.2<1,1,1>UW 0x2000UW {align1}; +(f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; +define(`surface_u', `8') +define(`surface_v', `9') +define(`mv1',`g82.20') +define(`mv2',`g82.22') +include(`motion_field_uv.g4i') +avg.sat (8) g74.0<1>UW g74.0<8,8,1>UW g32.0<8,8,1>UW {align1}; +avg.sat (8) g75.0<1>UW g75.0<8,8,1>UW g33.0<8,8,1>UW {align1}; +avg.sat (8) g76.0<1>UW g76.0<8,8,1>UW g34.0<8,8,1>UW {align1}; +avg.sat (8) g77.0<1>UW g77.0<8,8,1>UW g35.0<8,8,1>UW {align1}; +avg.sat (8) g78.0<1>UW g78.0<8,8,1>UW g36.0<8,8,1>UW {align1}; +avg.sat (8) g79.0<1>UW g79.0<8,8,1>UW g37.0<8,8,1>UW {align1}; +avg.sat (8) g80.0<1>UW g80.0<8,8,1>UW g38.0<8,8,1>UW {align1}; +avg.sat (8) g81.0<1>UW g81.0<8,8,1>UW g39.0<8,8,1>UW {align1}; + +/*field 1 backward prediction of UV*/ +asr (2) g82.28<1>W g82.28<2,2,1>W 1W {align1}; +asr (2) g31.14<1>W g82.28<2,2,1>W 1W {align1}; +shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; +add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; +and.nz (1) null g82.2<1,1,1>UW 0x8000UW {align1}; +(f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; +define(`mv1',`g82.28') +define(`mv2',`g82.30') +include(`motion_field_uv.g4i') +avg.sat (8) g74.16<1>UW g74.16<8,8,1>UW g32.0<8,8,1>UW {align1}; +avg.sat (8) g75.16<1>UW g75.16<8,8,1>UW g33.0<8,8,1>UW {align1}; +avg.sat (8) g76.16<1>UW g76.16<8,8,1>UW g34.0<8,8,1>UW {align1}; +avg.sat (8) g77.16<1>UW g77.16<8,8,1>UW g35.0<8,8,1>UW {align1}; +avg.sat (8) g78.16<1>UW g78.16<8,8,1>UW g36.0<8,8,1>UW {align1}; +avg.sat (8) g79.16<1>UW g79.16<8,8,1>UW g37.0<8,8,1>UW {align1}; +avg.sat (8) g80.16<1>UW g80.16<8,8,1>UW g38.0<8,8,1>UW {align1}; +avg.sat (8) g81.16<1>UW g81.16<8,8,1>UW g39.0<8,8,1>UW {align1}; + +include(`addidct.g4i') +send (16) 0 acc0<1>UW g0<8,8,1>UW + thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; diff --git a/src/shaders/mpeg2/vld/frame_field_pred_bidirect.g4b b/src/shaders/mpeg2/vld/frame_field_pred_bidirect.g4b new file mode 100644 index 00000000..9bd272e4 --- /dev/null +++ b/src/shaders/mpeg2/vld/frame_field_pred_bidirect.g4b @@ -0,0 +1,1007 @@ + { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, + { 0x00000001, 0x34000020, 0x002102a0, 0x00000000 }, + { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x10001000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20002dbc, 0x00210a50, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000045 }, + { 0x01000005, 0x20002dbc, 0x00210a52, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000002f }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a004 }, + { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, + { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, + { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, + { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, + { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000040 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000002c }, + { 0x01000005, 0x20002dbc, 0x00210a52, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000017 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a004 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000013 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, + { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, + { 0x00600001, 0x27400021, 0x008d0400, 0x00000000 }, + { 0x00600001, 0x27800021, 0x008d0420, 0x00000000 }, + { 0x00600001, 0x27c00021, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x28000021, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28400021, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28800021, 0x008d04a0, 0x00000000 }, + { 0x00600001, 0x28c00021, 0x008d04c0, 0x00000000 }, + { 0x00600001, 0x29000021, 0x008d04e0, 0x00000000 }, + { 0x0020000c, 0x23ee3dad, 0x00450a58, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x40004000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20002dbc, 0x00210a58, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000045 }, + { 0x01000005, 0x20002dbc, 0x00210a5a, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000002f }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a004 }, + { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, + { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, + { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, + { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, + { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000040 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000002c }, + { 0x01000005, 0x20002dbc, 0x00210a5a, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000017 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a004 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000013 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, + { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, + { 0x00600001, 0x27600021, 0x008d0400, 0x00000000 }, + { 0x00600001, 0x27a00021, 0x008d0420, 0x00000000 }, + { 0x00600001, 0x27e00021, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28600021, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28a00021, 0x008d04a0, 0x00000000 }, + { 0x00600001, 0x28e00021, 0x008d04c0, 0x00000000 }, + { 0x00600001, 0x29200021, 0x008d04e0, 0x00000000 }, + { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, + { 0x0020000c, 0x2a503dad, 0x00450a50, 0x00010001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x10001000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20003dbc, 0x00210a50, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000032 }, + { 0x01000005, 0x20003dbc, 0x00210a52, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, + { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a006 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a005 }, + { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a006 }, + { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, + { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, + { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000029 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0414a006 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, + { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, + { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, + { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, + { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000001d }, + { 0x01000005, 0x20003dbc, 0x00210a52, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, + { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a006 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a005 }, + { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a006 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000b }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x00ad0e60, 0x0414a005 }, + { 0x00800031, 0x25a01d29, 0x00ad0e60, 0x0414a006 }, + { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, + { 0x00600001, 0x29400129, 0x008d0400, 0x00000000 }, + { 0x00600001, 0x29600129, 0x008d0420, 0x00000000 }, + { 0x00600001, 0x29800129, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x29a00129, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x29c00129, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x29e00129, 0x008d04a0, 0x00000000 }, + { 0x00600001, 0x2a000129, 0x008d04c0, 0x00000000 }, + { 0x00600001, 0x2a200129, 0x008d04e0, 0x00000000 }, + { 0x0020000c, 0x2a583dad, 0x00450a58, 0x00010001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a58, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x40004000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20003dbc, 0x00210a58, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000032 }, + { 0x01000005, 0x20003dbc, 0x00210a5a, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, + { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a006 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a005 }, + { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a006 }, + { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, + { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, + { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000029 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0414a006 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, + { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, + { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, + { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, + { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000001d }, + { 0x01000005, 0x20003dbc, 0x00210a5a, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, + { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a006 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a005 }, + { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a006 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000b }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x00ad0e60, 0x0414a005 }, + { 0x00800031, 0x25a01d29, 0x00ad0e60, 0x0414a006 }, + { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, + { 0x00600001, 0x29500129, 0x008d0400, 0x00000000 }, + { 0x00600001, 0x29700129, 0x008d0420, 0x00000000 }, + { 0x00600001, 0x29900129, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x29b00129, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x29d00129, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x29f00129, 0x008d04a0, 0x00000000 }, + { 0x00600001, 0x2a100129, 0x008d04c0, 0x00000000 }, + { 0x00600001, 0x2a300129, 0x008d04e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x20002000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20002dbc, 0x00210a54, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000045 }, + { 0x01000005, 0x20002dbc, 0x00210a56, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000002f }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a007 }, + { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, + { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, + { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, + { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, + { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000040 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000002c }, + { 0x01000005, 0x20002dbc, 0x00210a56, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000017 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a007 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000013 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, + { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, + { 0x80800042, 0x27402529, 0x00b10740, 0x00b10400 }, + { 0x80800042, 0x27802529, 0x00b10780, 0x00b10420 }, + { 0x80800042, 0x27c02529, 0x00b107c0, 0x00b10440 }, + { 0x80800042, 0x28002529, 0x00b10800, 0x00b10460 }, + { 0x80800042, 0x28402529, 0x00b10840, 0x00b10480 }, + { 0x80800042, 0x28802529, 0x00b10880, 0x00b104a0 }, + { 0x80800042, 0x28c02529, 0x00b108c0, 0x00b104c0 }, + { 0x80800042, 0x29002529, 0x00b10900, 0x00b104e0 }, + { 0x0020000c, 0x23ee3dad, 0x00450a5c, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x80008000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20002dbc, 0x00210a5c, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000045 }, + { 0x01000005, 0x20002dbc, 0x00210a5e, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000002f }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a007 }, + { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, + { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, + { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, + { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, + { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000040 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000002c }, + { 0x01000005, 0x20002dbc, 0x00210a5e, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000017 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a007 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000013 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, + { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, + { 0x80800042, 0x27602529, 0x00b10760, 0x00b10400 }, + { 0x80800042, 0x27a02529, 0x00b107a0, 0x00b10420 }, + { 0x80800042, 0x27e02529, 0x00b107e0, 0x00b10440 }, + { 0x80800042, 0x28202529, 0x00b10820, 0x00b10460 }, + { 0x80800042, 0x28602529, 0x00b10860, 0x00b10480 }, + { 0x80800042, 0x28a02529, 0x00b108a0, 0x00b104a0 }, + { 0x80800042, 0x28e02529, 0x00b108e0, 0x00b104c0 }, + { 0x80800042, 0x29202529, 0x00b10920, 0x00b104e0 }, + { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, + { 0x0020000c, 0x2a543dad, 0x00450a54, 0x00010001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x20002000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20003dbc, 0x00210a54, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000032 }, + { 0x01000005, 0x20003dbc, 0x00210a56, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, + { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a009 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a008 }, + { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a009 }, + { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, + { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, + { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000029 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0414a009 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, + { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, + { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, + { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, + { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000001d }, + { 0x01000005, 0x20003dbc, 0x00210a56, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, + { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a009 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a008 }, + { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a009 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000b }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x00ad0e60, 0x0414a008 }, + { 0x00800031, 0x25a01d29, 0x00ad0e60, 0x0414a009 }, + { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, + { 0x80600042, 0x29402529, 0x008d0940, 0x008d0400 }, + { 0x80600042, 0x29602529, 0x008d0960, 0x008d0420 }, + { 0x80600042, 0x29802529, 0x008d0980, 0x008d0440 }, + { 0x80600042, 0x29a02529, 0x008d09a0, 0x008d0460 }, + { 0x80600042, 0x29c02529, 0x008d09c0, 0x008d0480 }, + { 0x80600042, 0x29e02529, 0x008d09e0, 0x008d04a0 }, + { 0x80600042, 0x2a002529, 0x008d0a00, 0x008d04c0 }, + { 0x80600042, 0x2a202529, 0x008d0a20, 0x008d04e0 }, + { 0x0020000c, 0x2a5c3dad, 0x00450a5c, 0x00010001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a5c, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x80008000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20003dbc, 0x00210a5c, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000032 }, + { 0x01000005, 0x20003dbc, 0x00210a5e, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, + { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a009 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a008 }, + { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a009 }, + { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, + { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, + { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000029 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0414a009 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, + { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, + { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, + { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, + { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000001d }, + { 0x01000005, 0x20003dbc, 0x00210a5e, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, + { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a009 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a008 }, + { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a009 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000b }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x00ad0e60, 0x0414a008 }, + { 0x00800031, 0x25a01d29, 0x00ad0e60, 0x0414a009 }, + { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, + { 0x80600042, 0x29502529, 0x008d0950, 0x008d0400 }, + { 0x80600042, 0x29702529, 0x008d0970, 0x008d0420 }, + { 0x80600042, 0x29902529, 0x008d0990, 0x008d0440 }, + { 0x80600042, 0x29b02529, 0x008d09b0, 0x008d0460 }, + { 0x80600042, 0x29d02529, 0x008d09d0, 0x008d0480 }, + { 0x80600042, 0x29f02529, 0x008d09f0, 0x008d04a0 }, + { 0x80600042, 0x2a102529, 0x008d0a10, 0x008d04c0 }, + { 0x80600042, 0x2a302529, 0x008d0a30, 0x008d04e0 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10a80, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10aa0, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10ac0, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10ae0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10b00, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10b20, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10b40, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10b60, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10b80, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10ba0, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10bc0, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10be0, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c00, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10c20, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10b60, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10a80, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10b80, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10aa0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10ba0, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10ac0, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10bc0, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10ae0, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10be0, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10b00, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10c00, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10b20, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c20, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10b40, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, + { 0x80800001, 0x474001b1, 0x00b10740, 0x00000000 }, + { 0x80800001, 0x476001b1, 0x00b10760, 0x00000000 }, + { 0x80800001, 0x478001b1, 0x00b10780, 0x00000000 }, + { 0x80800001, 0x47a001b1, 0x00b107a0, 0x00000000 }, + { 0x80800001, 0x47c001b1, 0x00b107c0, 0x00000000 }, + { 0x80800001, 0x47e001b1, 0x00b107e0, 0x00000000 }, + { 0x80800001, 0x480001b1, 0x00b10800, 0x00000000 }, + { 0x80800001, 0x482001b1, 0x00b10820, 0x00000000 }, + { 0x80800001, 0x484001b1, 0x00b10840, 0x00000000 }, + { 0x80800001, 0x486001b1, 0x00b10860, 0x00000000 }, + { 0x80800001, 0x488001b1, 0x00b10880, 0x00000000 }, + { 0x80800001, 0x48a001b1, 0x00b108a0, 0x00000000 }, + { 0x80800001, 0x48c001b1, 0x00b108c0, 0x00000000 }, + { 0x80800001, 0x48e001b1, 0x00b108e0, 0x00000000 }, + { 0x80800001, 0x490001b1, 0x00b10900, 0x00000000 }, + { 0x80800001, 0x492001b1, 0x00b10920, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, + { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, + { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, + { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, + { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, + { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, + { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05902000 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, + { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, + { 0x00800040, 0x294025ad, 0x00b10c60, 0x00b10940 }, + { 0x00800040, 0x296025ad, 0x00b10c80, 0x00b10960 }, + { 0x00800040, 0x298025ad, 0x00b10ca0, 0x00b10980 }, + { 0x00800040, 0x29a025ad, 0x00b10cc0, 0x00b109a0 }, + { 0x80800001, 0x494001b1, 0x00b10940, 0x00000000 }, + { 0x80800001, 0x496001b1, 0x00b10960, 0x00000000 }, + { 0x80800001, 0x498001b1, 0x00b10980, 0x00000000 }, + { 0x80800001, 0x49a001b1, 0x00b109a0, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302001 }, + { 0x00800040, 0x29c025a9, 0x00b10ce0, 0x00b109c0 }, + { 0x00800040, 0x29e025a9, 0x00b10d00, 0x00b109e0 }, + { 0x00800040, 0x2a0025a9, 0x00b10d20, 0x00b10a00 }, + { 0x00800040, 0x2a2025a9, 0x00b10d40, 0x00b10a20 }, + { 0x80800001, 0x49c001b1, 0x00b109c0, 0x00000000 }, + { 0x80800001, 0x49e001b1, 0x00b109e0, 0x00000000 }, + { 0x80800001, 0x4a0001b1, 0x00b10a00, 0x00000000 }, + { 0x80800001, 0x4a2001b1, 0x00b10a20, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302002 }, + { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, + { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, diff --git a/src/shaders/mpeg2/vld/frame_field_pred_bidirect.g4b.gen5 b/src/shaders/mpeg2/vld/frame_field_pred_bidirect.g4b.gen5 new file mode 100644 index 00000000..b99ad57f --- /dev/null +++ b/src/shaders/mpeg2/vld/frame_field_pred_bidirect.g4b.gen5 @@ -0,0 +1,1007 @@ + { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, + { 0x00000001, 0x34000020, 0x002102a0, 0x00000000 }, + { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x10001000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20002dbc, 0x00210a50, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000008a }, + { 0x01000005, 0x20002dbc, 0x00210a52, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000005e }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a004 }, + { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, + { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, + { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, + { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, + { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000080 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000058 }, + { 0x01000005, 0x20002dbc, 0x00210a52, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000002e }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a004 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000026 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, + { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, + { 0x00600001, 0x27400021, 0x008d0400, 0x00000000 }, + { 0x00600001, 0x27800021, 0x008d0420, 0x00000000 }, + { 0x00600001, 0x27c00021, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x28000021, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28400021, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28800021, 0x008d04a0, 0x00000000 }, + { 0x00600001, 0x28c00021, 0x008d04c0, 0x00000000 }, + { 0x00600001, 0x29000021, 0x008d04e0, 0x00000000 }, + { 0x0020000c, 0x23ee3dad, 0x00450a58, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x40004000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20002dbc, 0x00210a58, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000008a }, + { 0x01000005, 0x20002dbc, 0x00210a5a, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000005e }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a004 }, + { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, + { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, + { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, + { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, + { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000080 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000058 }, + { 0x01000005, 0x20002dbc, 0x00210a5a, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000002e }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a004 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000026 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, + { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, + { 0x00600001, 0x27600021, 0x008d0400, 0x00000000 }, + { 0x00600001, 0x27a00021, 0x008d0420, 0x00000000 }, + { 0x00600001, 0x27e00021, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28600021, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28a00021, 0x008d04a0, 0x00000000 }, + { 0x00600001, 0x28e00021, 0x008d04c0, 0x00000000 }, + { 0x00600001, 0x29200021, 0x008d04e0, 0x00000000 }, + { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, + { 0x0020000c, 0x2a503dad, 0x00450a50, 0x00010001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x10001000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20003dbc, 0x00210a50, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000064 }, + { 0x01000005, 0x20003dbc, 0x00210a52, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000048 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, + { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a006 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a005 }, + { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a006 }, + { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, + { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, + { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0248a006 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, + { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, + { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, + { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, + { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000003a }, + { 0x01000005, 0x20003dbc, 0x00210a52, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, + { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a006 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a005 }, + { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a006 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x40ad0e60, 0x0248a005 }, + { 0x00800031, 0x25a01d29, 0x40ad0e60, 0x0248a006 }, + { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, + { 0x00600001, 0x29400129, 0x008d0400, 0x00000000 }, + { 0x00600001, 0x29600129, 0x008d0420, 0x00000000 }, + { 0x00600001, 0x29800129, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x29a00129, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x29c00129, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x29e00129, 0x008d04a0, 0x00000000 }, + { 0x00600001, 0x2a000129, 0x008d04c0, 0x00000000 }, + { 0x00600001, 0x2a200129, 0x008d04e0, 0x00000000 }, + { 0x0020000c, 0x2a583dad, 0x00450a58, 0x00010001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a58, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x40004000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20003dbc, 0x00210a58, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000064 }, + { 0x01000005, 0x20003dbc, 0x00210a5a, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000048 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, + { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a006 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a005 }, + { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a006 }, + { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, + { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, + { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0248a006 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, + { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, + { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, + { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, + { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000003a }, + { 0x01000005, 0x20003dbc, 0x00210a5a, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, + { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a006 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a005 }, + { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a006 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x40ad0e60, 0x0248a005 }, + { 0x00800031, 0x25a01d29, 0x40ad0e60, 0x0248a006 }, + { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, + { 0x00600001, 0x29500129, 0x008d0400, 0x00000000 }, + { 0x00600001, 0x29700129, 0x008d0420, 0x00000000 }, + { 0x00600001, 0x29900129, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x29b00129, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x29d00129, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x29f00129, 0x008d04a0, 0x00000000 }, + { 0x00600001, 0x2a100129, 0x008d04c0, 0x00000000 }, + { 0x00600001, 0x2a300129, 0x008d04e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x20002000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20002dbc, 0x00210a54, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000008a }, + { 0x01000005, 0x20002dbc, 0x00210a56, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000005e }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a007 }, + { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, + { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, + { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, + { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, + { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000080 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000058 }, + { 0x01000005, 0x20002dbc, 0x00210a56, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000002e }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a007 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000026 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, + { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, + { 0x80800042, 0x27402529, 0x00b10740, 0x00b10400 }, + { 0x80800042, 0x27802529, 0x00b10780, 0x00b10420 }, + { 0x80800042, 0x27c02529, 0x00b107c0, 0x00b10440 }, + { 0x80800042, 0x28002529, 0x00b10800, 0x00b10460 }, + { 0x80800042, 0x28402529, 0x00b10840, 0x00b10480 }, + { 0x80800042, 0x28802529, 0x00b10880, 0x00b104a0 }, + { 0x80800042, 0x28c02529, 0x00b108c0, 0x00b104c0 }, + { 0x80800042, 0x29002529, 0x00b10900, 0x00b104e0 }, + { 0x0020000c, 0x23ee3dad, 0x00450a5c, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x80008000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20002dbc, 0x00210a5c, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000008a }, + { 0x01000005, 0x20002dbc, 0x00210a5e, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000005e }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a007 }, + { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, + { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, + { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, + { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, + { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000080 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000058 }, + { 0x01000005, 0x20002dbc, 0x00210a5e, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000002e }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a007 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000026 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, + { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, + { 0x80800042, 0x27602529, 0x00b10760, 0x00b10400 }, + { 0x80800042, 0x27a02529, 0x00b107a0, 0x00b10420 }, + { 0x80800042, 0x27e02529, 0x00b107e0, 0x00b10440 }, + { 0x80800042, 0x28202529, 0x00b10820, 0x00b10460 }, + { 0x80800042, 0x28602529, 0x00b10860, 0x00b10480 }, + { 0x80800042, 0x28a02529, 0x00b108a0, 0x00b104a0 }, + { 0x80800042, 0x28e02529, 0x00b108e0, 0x00b104c0 }, + { 0x80800042, 0x29202529, 0x00b10920, 0x00b104e0 }, + { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, + { 0x0020000c, 0x2a543dad, 0x00450a54, 0x00010001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x20002000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20003dbc, 0x00210a54, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000064 }, + { 0x01000005, 0x20003dbc, 0x00210a56, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000048 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, + { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a009 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a008 }, + { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a009 }, + { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, + { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, + { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0248a009 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, + { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, + { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, + { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, + { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000003a }, + { 0x01000005, 0x20003dbc, 0x00210a56, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, + { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a009 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a008 }, + { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a009 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x40ad0e60, 0x0248a008 }, + { 0x00800031, 0x25a01d29, 0x40ad0e60, 0x0248a009 }, + { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, + { 0x80600042, 0x29402529, 0x008d0940, 0x008d0400 }, + { 0x80600042, 0x29602529, 0x008d0960, 0x008d0420 }, + { 0x80600042, 0x29802529, 0x008d0980, 0x008d0440 }, + { 0x80600042, 0x29a02529, 0x008d09a0, 0x008d0460 }, + { 0x80600042, 0x29c02529, 0x008d09c0, 0x008d0480 }, + { 0x80600042, 0x29e02529, 0x008d09e0, 0x008d04a0 }, + { 0x80600042, 0x2a002529, 0x008d0a00, 0x008d04c0 }, + { 0x80600042, 0x2a202529, 0x008d0a20, 0x008d04e0 }, + { 0x0020000c, 0x2a5c3dad, 0x00450a5c, 0x00010001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a5c, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x80008000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20003dbc, 0x00210a5c, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000064 }, + { 0x01000005, 0x20003dbc, 0x00210a5e, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000048 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, + { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a009 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a008 }, + { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a009 }, + { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, + { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, + { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0248a009 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, + { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, + { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, + { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, + { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000003a }, + { 0x01000005, 0x20003dbc, 0x00210a5e, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, + { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a009 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a008 }, + { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a009 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x40ad0e60, 0x0248a008 }, + { 0x00800031, 0x25a01d29, 0x40ad0e60, 0x0248a009 }, + { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, + { 0x80600042, 0x29502529, 0x008d0950, 0x008d0400 }, + { 0x80600042, 0x29702529, 0x008d0970, 0x008d0420 }, + { 0x80600042, 0x29902529, 0x008d0990, 0x008d0440 }, + { 0x80600042, 0x29b02529, 0x008d09b0, 0x008d0460 }, + { 0x80600042, 0x29d02529, 0x008d09d0, 0x008d0480 }, + { 0x80600042, 0x29f02529, 0x008d09f0, 0x008d04a0 }, + { 0x80600042, 0x2a102529, 0x008d0a10, 0x008d04c0 }, + { 0x80600042, 0x2a302529, 0x008d0a30, 0x008d04e0 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10a80, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10aa0, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10ac0, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10ae0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10b00, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10b20, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10b40, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10b60, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10b80, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10ba0, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10bc0, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10be0, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c00, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10c20, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10b60, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10a80, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10b80, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10aa0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10ba0, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10ac0, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10bc0, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10ae0, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10be0, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10b00, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10c00, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10b20, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c20, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10b40, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, + { 0x80800001, 0x474001b1, 0x00b10740, 0x00000000 }, + { 0x80800001, 0x476001b1, 0x00b10760, 0x00000000 }, + { 0x80800001, 0x478001b1, 0x00b10780, 0x00000000 }, + { 0x80800001, 0x47a001b1, 0x00b107a0, 0x00000000 }, + { 0x80800001, 0x47c001b1, 0x00b107c0, 0x00000000 }, + { 0x80800001, 0x47e001b1, 0x00b107e0, 0x00000000 }, + { 0x80800001, 0x480001b1, 0x00b10800, 0x00000000 }, + { 0x80800001, 0x482001b1, 0x00b10820, 0x00000000 }, + { 0x80800001, 0x484001b1, 0x00b10840, 0x00000000 }, + { 0x80800001, 0x486001b1, 0x00b10860, 0x00000000 }, + { 0x80800001, 0x488001b1, 0x00b10880, 0x00000000 }, + { 0x80800001, 0x48a001b1, 0x00b108a0, 0x00000000 }, + { 0x80800001, 0x48c001b1, 0x00b108c0, 0x00000000 }, + { 0x80800001, 0x48e001b1, 0x00b108e0, 0x00000000 }, + { 0x80800001, 0x490001b1, 0x00b10900, 0x00000000 }, + { 0x80800001, 0x492001b1, 0x00b10920, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, + { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, + { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, + { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, + { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, + { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, + { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x12082000 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, + { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, + { 0x00800040, 0x294025ad, 0x00b10c60, 0x00b10940 }, + { 0x00800040, 0x296025ad, 0x00b10c80, 0x00b10960 }, + { 0x00800040, 0x298025ad, 0x00b10ca0, 0x00b10980 }, + { 0x00800040, 0x29a025ad, 0x00b10cc0, 0x00b109a0 }, + { 0x80800001, 0x494001b1, 0x00b10940, 0x00000000 }, + { 0x80800001, 0x496001b1, 0x00b10960, 0x00000000 }, + { 0x80800001, 0x498001b1, 0x00b10980, 0x00000000 }, + { 0x80800001, 0x49a001b1, 0x00b109a0, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082001 }, + { 0x00800040, 0x29c025a9, 0x00b10ce0, 0x00b109c0 }, + { 0x00800040, 0x29e025a9, 0x00b10d00, 0x00b109e0 }, + { 0x00800040, 0x2a0025a9, 0x00b10d20, 0x00b10a00 }, + { 0x00800040, 0x2a2025a9, 0x00b10d40, 0x00b10a20 }, + { 0x80800001, 0x49c001b1, 0x00b109c0, 0x00000000 }, + { 0x80800001, 0x49e001b1, 0x00b109e0, 0x00000000 }, + { 0x80800001, 0x4a0001b1, 0x00b10a00, 0x00000000 }, + { 0x80800001, 0x4a2001b1, 0x00b10a20, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082002 }, + { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, + { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, diff --git a/src/shaders/mpeg2/vld/frame_field_pred_forward.g4a b/src/shaders/mpeg2/vld/frame_field_pred_forward.g4a new file mode 100644 index 00000000..4c79c5f4 --- /dev/null +++ b/src/shaders/mpeg2/vld/frame_field_pred_forward.g4a @@ -0,0 +1,130 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data + g115: message descriptor for reading reference data */ +mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; +mov (2) g31.0<1>UD g82.12<2,2,1>UW {align1}; +mov (1) g126.8<1>UD ip {align1}; +mov (1) ip g21.0<1,1,1>UD {align1}; + +/*field 0 of Y*/ +asr (2) g31.14<1>W g82.16<2,2,1>W 1W {align1}; +shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; +add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; +and.nz (1) null g82.2<1,1,1>UW 0x1000UW {align1}; //motion vertical field select +(f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; +define(`surface',`4') +define(`mv1',`g82.16') +define(`mv2',`g82.18') +include(`motion_field_y.g4i') +mov (8) g58.0<1>UD g32.0<8,8,1>UD {align1}; +mov (8) g60.0<1>UD g33.0<8,8,1>UD {align1}; +mov (8) g62.0<1>UD g34.0<8,8,1>UD {align1}; +mov (8) g64.0<1>UD g35.0<8,8,1>UD {align1}; +mov (8) g66.0<1>UD g36.0<8,8,1>UD {align1}; +mov (8) g68.0<1>UD g37.0<8,8,1>UD {align1}; +mov (8) g70.0<1>UD g38.0<8,8,1>UD {align1}; +mov (8) g72.0<1>UD g39.0<8,8,1>UD {align1}; + +/*field 1 of Y*/ +asr (2) g31.14<1>W g82.24<2,2,1>W 1W {align1}; +shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; +add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; +and.nz (1) null g82.2<1,1,1>UW 0x4000UW {align1}; +(f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; +define(`surface',`4') +define(`mv1',`g82.24') +define(`mv2',`g82.26') +include(`motion_field_y.g4i') +mov (8) g59.0<1>UD g32.0<8,8,1>UD {align1}; +mov (8) g61.0<1>UD g33.0<8,8,1>UD {align1}; +mov (8) g63.0<1>UD g34.0<8,8,1>UD {align1}; +mov (8) g65.0<1>UD g35.0<8,8,1>UD {align1}; +mov (8) g67.0<1>UD g36.0<8,8,1>UD {align1}; +mov (8) g69.0<1>UD g37.0<8,8,1>UD {align1}; +mov (8) g71.0<1>UD g38.0<8,8,1>UD {align1}; +mov (8) g73.0<1>UD g39.0<8,8,1>UD {align1}; + +/*field 0 of UV*/ +shr (2) g31.0<1>UD g31.0<2,2,1>UD 1UD {align1}; +asr (2) g82.16<1>W g82.16<2,2,1>W 1W {align1}; +asr (2) g31.14<1>W g82.16<2,2,1>W 1W {align1}; +shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; +add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; +and.nz (1) null g82.2<1,1,1>UW 0x1000UW {align1}; +(f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; +define(`surface_u', `5') +define(`surface_v', `6') +define(`mv1',`g82.16') +define(`mv2',`g82.18') +include(`motion_field_uv.g4i') +mov (8) g74.0<1>UW g32.0<8,8,1>UW {align1}; +mov (8) g75.0<1>UW g33.0<8,8,1>UW {align1}; +mov (8) g76.0<1>UW g34.0<8,8,1>UW {align1}; +mov (8) g77.0<1>UW g35.0<8,8,1>UW {align1}; +mov (8) g78.0<1>UW g36.0<8,8,1>UW {align1}; +mov (8) g79.0<1>UW g37.0<8,8,1>UW {align1}; +mov (8) g80.0<1>UW g38.0<8,8,1>UW {align1}; +mov (8) g81.0<1>UW g39.0<8,8,1>UW {align1}; + +/*field 1 of UV*/ +asr (2) g82.24<1>W g82.24<2,2,1>W 1W {align1}; +asr (2) g31.14<1>W g82.24<2,2,1>W 1W {align1}; +shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; +add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; +and.nz (1) null g82.2<1,1,1>UW 0x4000UW {align1}; +(f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; +define(`surface_u', `5') +define(`surface_v', `6') +define(`mv1',`g82.24') +define(`mv2',`g82.26') +include(`motion_field_uv.g4i') +mov (8) g74.16<1>UW g32.0<8,8,1>UW {align1}; +mov (8) g75.16<1>UW g33.0<8,8,1>UW {align1}; +mov (8) g76.16<1>UW g34.0<8,8,1>UW {align1}; +mov (8) g77.16<1>UW g35.0<8,8,1>UW {align1}; +mov (8) g78.16<1>UW g36.0<8,8,1>UW {align1}; +mov (8) g79.16<1>UW g37.0<8,8,1>UW {align1}; +mov (8) g80.16<1>UW g38.0<8,8,1>UW {align1}; +mov (8) g81.16<1>UW g39.0<8,8,1>UW {align1}; + +include(`addidct.g4i') +send (16) 0 acc0<1>UW g0<8,8,1>UW + thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; diff --git a/src/shaders/mpeg2/vld/frame_field_pred_forward.g4b b/src/shaders/mpeg2/vld/frame_field_pred_forward.g4b new file mode 100644 index 00000000..6c02221f --- /dev/null +++ b/src/shaders/mpeg2/vld/frame_field_pred_forward.g4b @@ -0,0 +1,555 @@ + { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, + { 0x00000001, 0x34000020, 0x002102a0, 0x00000000 }, + { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x10001000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20002dbc, 0x00210a50, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000045 }, + { 0x01000005, 0x20002dbc, 0x00210a52, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000002f }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a004 }, + { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, + { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, + { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, + { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, + { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000040 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000002c }, + { 0x01000005, 0x20002dbc, 0x00210a52, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000017 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a004 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000013 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, + { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, + { 0x00600001, 0x27400021, 0x008d0400, 0x00000000 }, + { 0x00600001, 0x27800021, 0x008d0420, 0x00000000 }, + { 0x00600001, 0x27c00021, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x28000021, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28400021, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28800021, 0x008d04a0, 0x00000000 }, + { 0x00600001, 0x28c00021, 0x008d04c0, 0x00000000 }, + { 0x00600001, 0x29000021, 0x008d04e0, 0x00000000 }, + { 0x0020000c, 0x23ee3dad, 0x00450a58, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x40004000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20002dbc, 0x00210a58, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000045 }, + { 0x01000005, 0x20002dbc, 0x00210a5a, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000002f }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a004 }, + { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, + { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, + { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, + { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, + { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000040 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000002c }, + { 0x01000005, 0x20002dbc, 0x00210a5a, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000017 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a004 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000013 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, + { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, + { 0x00600001, 0x27600021, 0x008d0400, 0x00000000 }, + { 0x00600001, 0x27a00021, 0x008d0420, 0x00000000 }, + { 0x00600001, 0x27e00021, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28600021, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28a00021, 0x008d04a0, 0x00000000 }, + { 0x00600001, 0x28e00021, 0x008d04c0, 0x00000000 }, + { 0x00600001, 0x29200021, 0x008d04e0, 0x00000000 }, + { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, + { 0x0020000c, 0x2a503dad, 0x00450a50, 0x00010001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x10001000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20003dbc, 0x00210a50, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000032 }, + { 0x01000005, 0x20003dbc, 0x00210a52, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, + { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a006 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a005 }, + { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a006 }, + { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, + { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, + { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000029 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0414a006 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, + { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, + { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, + { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, + { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000001d }, + { 0x01000005, 0x20003dbc, 0x00210a52, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, + { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a006 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a005 }, + { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a006 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000b }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x00ad0e60, 0x0414a005 }, + { 0x00800031, 0x25a01d29, 0x00ad0e60, 0x0414a006 }, + { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, + { 0x00600001, 0x29400129, 0x008d0400, 0x00000000 }, + { 0x00600001, 0x29600129, 0x008d0420, 0x00000000 }, + { 0x00600001, 0x29800129, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x29a00129, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x29c00129, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x29e00129, 0x008d04a0, 0x00000000 }, + { 0x00600001, 0x2a000129, 0x008d04c0, 0x00000000 }, + { 0x00600001, 0x2a200129, 0x008d04e0, 0x00000000 }, + { 0x0020000c, 0x2a583dad, 0x00450a58, 0x00010001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a58, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x40004000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20003dbc, 0x00210a58, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000032 }, + { 0x01000005, 0x20003dbc, 0x00210a5a, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, + { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a006 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a005 }, + { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a006 }, + { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, + { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, + { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000029 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0414a006 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, + { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, + { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, + { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, + { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000001d }, + { 0x01000005, 0x20003dbc, 0x00210a5a, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, + { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a006 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a005 }, + { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a006 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000b }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x00ad0e60, 0x0414a005 }, + { 0x00800031, 0x25a01d29, 0x00ad0e60, 0x0414a006 }, + { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, + { 0x00600001, 0x29500129, 0x008d0400, 0x00000000 }, + { 0x00600001, 0x29700129, 0x008d0420, 0x00000000 }, + { 0x00600001, 0x29900129, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x29b00129, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x29d00129, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x29f00129, 0x008d04a0, 0x00000000 }, + { 0x00600001, 0x2a100129, 0x008d04c0, 0x00000000 }, + { 0x00600001, 0x2a300129, 0x008d04e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10a80, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10aa0, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10ac0, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10ae0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10b00, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10b20, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10b40, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10b60, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10b80, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10ba0, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10bc0, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10be0, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c00, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10c20, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10b60, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10a80, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10b80, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10aa0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10ba0, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10ac0, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10bc0, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10ae0, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10be0, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10b00, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10c00, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10b20, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c20, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10b40, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, + { 0x80800001, 0x474001b1, 0x00b10740, 0x00000000 }, + { 0x80800001, 0x476001b1, 0x00b10760, 0x00000000 }, + { 0x80800001, 0x478001b1, 0x00b10780, 0x00000000 }, + { 0x80800001, 0x47a001b1, 0x00b107a0, 0x00000000 }, + { 0x80800001, 0x47c001b1, 0x00b107c0, 0x00000000 }, + { 0x80800001, 0x47e001b1, 0x00b107e0, 0x00000000 }, + { 0x80800001, 0x480001b1, 0x00b10800, 0x00000000 }, + { 0x80800001, 0x482001b1, 0x00b10820, 0x00000000 }, + { 0x80800001, 0x484001b1, 0x00b10840, 0x00000000 }, + { 0x80800001, 0x486001b1, 0x00b10860, 0x00000000 }, + { 0x80800001, 0x488001b1, 0x00b10880, 0x00000000 }, + { 0x80800001, 0x48a001b1, 0x00b108a0, 0x00000000 }, + { 0x80800001, 0x48c001b1, 0x00b108c0, 0x00000000 }, + { 0x80800001, 0x48e001b1, 0x00b108e0, 0x00000000 }, + { 0x80800001, 0x490001b1, 0x00b10900, 0x00000000 }, + { 0x80800001, 0x492001b1, 0x00b10920, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, + { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, + { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, + { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, + { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, + { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, + { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05902000 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, + { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, + { 0x00800040, 0x294025ad, 0x00b10c60, 0x00b10940 }, + { 0x00800040, 0x296025ad, 0x00b10c80, 0x00b10960 }, + { 0x00800040, 0x298025ad, 0x00b10ca0, 0x00b10980 }, + { 0x00800040, 0x29a025ad, 0x00b10cc0, 0x00b109a0 }, + { 0x80800001, 0x494001b1, 0x00b10940, 0x00000000 }, + { 0x80800001, 0x496001b1, 0x00b10960, 0x00000000 }, + { 0x80800001, 0x498001b1, 0x00b10980, 0x00000000 }, + { 0x80800001, 0x49a001b1, 0x00b109a0, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302001 }, + { 0x00800040, 0x29c025a9, 0x00b10ce0, 0x00b109c0 }, + { 0x00800040, 0x29e025a9, 0x00b10d00, 0x00b109e0 }, + { 0x00800040, 0x2a0025a9, 0x00b10d20, 0x00b10a00 }, + { 0x00800040, 0x2a2025a9, 0x00b10d40, 0x00b10a20 }, + { 0x80800001, 0x49c001b1, 0x00b109c0, 0x00000000 }, + { 0x80800001, 0x49e001b1, 0x00b109e0, 0x00000000 }, + { 0x80800001, 0x4a0001b1, 0x00b10a00, 0x00000000 }, + { 0x80800001, 0x4a2001b1, 0x00b10a20, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302002 }, + { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, + { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, diff --git a/src/shaders/mpeg2/vld/frame_field_pred_forward.g4b.gen5 b/src/shaders/mpeg2/vld/frame_field_pred_forward.g4b.gen5 new file mode 100644 index 00000000..4c2434ab --- /dev/null +++ b/src/shaders/mpeg2/vld/frame_field_pred_forward.g4b.gen5 @@ -0,0 +1,555 @@ + { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, + { 0x00000001, 0x34000020, 0x002102a0, 0x00000000 }, + { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x10001000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20002dbc, 0x00210a50, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000008a }, + { 0x01000005, 0x20002dbc, 0x00210a52, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000005e }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a004 }, + { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, + { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, + { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, + { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, + { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000080 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000058 }, + { 0x01000005, 0x20002dbc, 0x00210a52, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000002e }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a004 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000026 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, + { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, + { 0x00600001, 0x27400021, 0x008d0400, 0x00000000 }, + { 0x00600001, 0x27800021, 0x008d0420, 0x00000000 }, + { 0x00600001, 0x27c00021, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x28000021, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28400021, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28800021, 0x008d04a0, 0x00000000 }, + { 0x00600001, 0x28c00021, 0x008d04c0, 0x00000000 }, + { 0x00600001, 0x29000021, 0x008d04e0, 0x00000000 }, + { 0x0020000c, 0x23ee3dad, 0x00450a58, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x40004000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20002dbc, 0x00210a58, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000008a }, + { 0x01000005, 0x20002dbc, 0x00210a5a, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000005e }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a004 }, + { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, + { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, + { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, + { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, + { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, + { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, + { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, + { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, + { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, + { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, + { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, + { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, + { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000080 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000058 }, + { 0x01000005, 0x20002dbc, 0x00210a5a, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000002e }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a004 }, + { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, + { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, + { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, + { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, + { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, + { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, + { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, + { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000026 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, + { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, + { 0x00600001, 0x27600021, 0x008d0400, 0x00000000 }, + { 0x00600001, 0x27a00021, 0x008d0420, 0x00000000 }, + { 0x00600001, 0x27e00021, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28600021, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28a00021, 0x008d04a0, 0x00000000 }, + { 0x00600001, 0x28e00021, 0x008d04c0, 0x00000000 }, + { 0x00600001, 0x29200021, 0x008d04e0, 0x00000000 }, + { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, + { 0x0020000c, 0x2a503dad, 0x00450a50, 0x00010001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x10001000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20003dbc, 0x00210a50, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000064 }, + { 0x01000005, 0x20003dbc, 0x00210a52, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000048 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, + { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a006 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a005 }, + { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a006 }, + { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, + { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, + { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0248a006 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, + { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, + { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, + { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, + { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000003a }, + { 0x01000005, 0x20003dbc, 0x00210a52, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, + { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a006 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a005 }, + { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a006 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x40ad0e60, 0x0248a005 }, + { 0x00800031, 0x25a01d29, 0x40ad0e60, 0x0248a006 }, + { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, + { 0x00600001, 0x29400129, 0x008d0400, 0x00000000 }, + { 0x00600001, 0x29600129, 0x008d0420, 0x00000000 }, + { 0x00600001, 0x29800129, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x29a00129, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x29c00129, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x29e00129, 0x008d04a0, 0x00000000 }, + { 0x00600001, 0x2a000129, 0x008d04c0, 0x00000000 }, + { 0x00600001, 0x2a200129, 0x008d04e0, 0x00000000 }, + { 0x0020000c, 0x2a583dad, 0x00450a58, 0x00010001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a58, 0x00010001 }, + { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, + { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, + { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x40004000 }, + { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, + { 0x01000005, 0x20003dbc, 0x00210a58, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000064 }, + { 0x01000005, 0x20003dbc, 0x00210a5a, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000048 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, + { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a006 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a005 }, + { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a006 }, + { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, + { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, + { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, + { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, + { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, + { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, + { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, + { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, + { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, + { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, + { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, + { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, + { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, + { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0248a006 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, + { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, + { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, + { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, + { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000003a }, + { 0x01000005, 0x20003dbc, 0x00210a5a, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, + { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a006 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, + { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, + { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a005 }, + { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a006 }, + { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, + { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, + { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, + { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, + { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, + { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, + { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, + { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x25001d29, 0x40ad0e60, 0x0248a005 }, + { 0x00800031, 0x25a01d29, 0x40ad0e60, 0x0248a006 }, + { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, + { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, + { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, + { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, + { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, + { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, + { 0x00600001, 0x29500129, 0x008d0400, 0x00000000 }, + { 0x00600001, 0x29700129, 0x008d0420, 0x00000000 }, + { 0x00600001, 0x29900129, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x29b00129, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x29d00129, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x29f00129, 0x008d04a0, 0x00000000 }, + { 0x00600001, 0x2a100129, 0x008d04c0, 0x00000000 }, + { 0x00600001, 0x2a300129, 0x008d04e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10a80, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10aa0, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10ac0, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10ae0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10b00, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10b20, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10b40, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10b60, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10b80, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10ba0, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10bc0, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10be0, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c00, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10c20, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10b60, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10a80, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10b80, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10aa0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10ba0, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10ac0, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10bc0, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10ae0, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10be0, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10b00, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10c00, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10b20, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c20, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10b40, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, + { 0x80800001, 0x474001b1, 0x00b10740, 0x00000000 }, + { 0x80800001, 0x476001b1, 0x00b10760, 0x00000000 }, + { 0x80800001, 0x478001b1, 0x00b10780, 0x00000000 }, + { 0x80800001, 0x47a001b1, 0x00b107a0, 0x00000000 }, + { 0x80800001, 0x47c001b1, 0x00b107c0, 0x00000000 }, + { 0x80800001, 0x47e001b1, 0x00b107e0, 0x00000000 }, + { 0x80800001, 0x480001b1, 0x00b10800, 0x00000000 }, + { 0x80800001, 0x482001b1, 0x00b10820, 0x00000000 }, + { 0x80800001, 0x484001b1, 0x00b10840, 0x00000000 }, + { 0x80800001, 0x486001b1, 0x00b10860, 0x00000000 }, + { 0x80800001, 0x488001b1, 0x00b10880, 0x00000000 }, + { 0x80800001, 0x48a001b1, 0x00b108a0, 0x00000000 }, + { 0x80800001, 0x48c001b1, 0x00b108c0, 0x00000000 }, + { 0x80800001, 0x48e001b1, 0x00b108e0, 0x00000000 }, + { 0x80800001, 0x490001b1, 0x00b10900, 0x00000000 }, + { 0x80800001, 0x492001b1, 0x00b10920, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, + { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, + { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, + { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, + { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, + { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, + { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x12082000 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, + { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, + { 0x00800040, 0x294025ad, 0x00b10c60, 0x00b10940 }, + { 0x00800040, 0x296025ad, 0x00b10c80, 0x00b10960 }, + { 0x00800040, 0x298025ad, 0x00b10ca0, 0x00b10980 }, + { 0x00800040, 0x29a025ad, 0x00b10cc0, 0x00b109a0 }, + { 0x80800001, 0x494001b1, 0x00b10940, 0x00000000 }, + { 0x80800001, 0x496001b1, 0x00b10960, 0x00000000 }, + { 0x80800001, 0x498001b1, 0x00b10980, 0x00000000 }, + { 0x80800001, 0x49a001b1, 0x00b109a0, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082001 }, + { 0x00800040, 0x29c025a9, 0x00b10ce0, 0x00b109c0 }, + { 0x00800040, 0x29e025a9, 0x00b10d00, 0x00b109e0 }, + { 0x00800040, 0x2a0025a9, 0x00b10d20, 0x00b10a00 }, + { 0x00800040, 0x2a2025a9, 0x00b10d40, 0x00b10a20 }, + { 0x80800001, 0x49c001b1, 0x00b109c0, 0x00000000 }, + { 0x80800001, 0x49e001b1, 0x00b109e0, 0x00000000 }, + { 0x80800001, 0x4a0001b1, 0x00b10a00, 0x00000000 }, + { 0x80800001, 0x4a2001b1, 0x00b10a20, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082002 }, + { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, + { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, diff --git a/src/shaders/mpeg2/vld/frame_frame_pred_backward.g4a b/src/shaders/mpeg2/vld/frame_frame_pred_backward.g4a new file mode 100644 index 00000000..28fe910e --- /dev/null +++ b/src/shaders/mpeg2/vld/frame_frame_pred_backward.g4a @@ -0,0 +1,61 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g32: message descriptor for reading reference data + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data */ +mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; +mov(2) g31.0<1>UD g82.12<2,2,1>UW {align1}; +mov (1) g126.8<1>UD ip {align1}; +mov (1) ip g21.0<1,1,1>UD {align1}; + +//Y, (x', y') = (x, y) + (motion_vector.x >> 1, motion_vector.y >> 1) +asr (2) g31.14<1>W g82.20<2,2,1>W 1W {align1}; +add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +define(`input_surface', `7') +define(`mv1', `g82.20') +define(`mv2', `g82.22') +include(`motion_frame_y.g4i') + +//UV, (x', y') = (x >> 1, y >> 1) + (motion_vector.x >> 2, motion_vector.y >> 2) +shr (2) g31.0<1>UD g31.0<2,2,1>UD 1UD {align1}; +asr (2) g31.14<1>W g82.20<2,2,1>W 2W {align1}; +add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +define(`input_surface1', `8') +define(`input_surface2', `9') +include(`motion_frame_uv.g4i') + +include(`addidct.g4i') +send (16) 0 acc0<1>UW g0<8,8,1>UW + thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; diff --git a/src/shaders/mpeg2/vld/frame_frame_pred_backward.g4b b/src/shaders/mpeg2/vld/frame_frame_pred_backward.g4b new file mode 100644 index 00000000..475200b6 --- /dev/null +++ b/src/shaders/mpeg2/vld/frame_frame_pred_backward.g4b @@ -0,0 +1,369 @@ + { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, + { 0x00000001, 0x34000020, 0x002102a0, 0x00000000 }, + { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00010001 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x01000005, 0x20000d3c, 0x00210a54, 0x00000001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000005f }, + { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000048 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a007 }, + { 0x00800040, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x27604629, 0x00b104e0, 0x00b104e1 }, + { 0x00800040, 0x27804629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x27a04629, 0x00b10520, 0x00b10521 }, + { 0x00800040, 0x27c04629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x27e04629, 0x00b10560, 0x00b10561 }, + { 0x00800040, 0x28004629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x28204629, 0x00b105a0, 0x00b105a1 }, + { 0x00800040, 0x28404629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x28604629, 0x00b105e0, 0x00b105e1 }, + { 0x00800040, 0x28804629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x28a04629, 0x00b10620, 0x00b10621 }, + { 0x00800040, 0x28c04629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x28e04629, 0x00b10660, 0x00b10661 }, + { 0x00800040, 0x29004629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x29204629, 0x00b106a0, 0x00b106a1 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e0 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10500 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10520 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10540 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10560 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10580 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a0 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c0 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e0 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10600 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10620 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10640 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10660 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10680 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a0 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c0 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e1 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10501 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10521 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10541 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10561 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10581 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a1 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c1 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e1 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10601 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10621 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10641 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10661 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10681 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a1 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c1 }, + { 0x80800008, 0x27402d29, 0x00b10740, 0x00020002 }, + { 0x80800008, 0x27602d29, 0x00b10760, 0x00020002 }, + { 0x80800008, 0x27802d29, 0x00b10780, 0x00020002 }, + { 0x80800008, 0x27a02d29, 0x00b107a0, 0x00020002 }, + { 0x80800008, 0x27c02d29, 0x00b107c0, 0x00020002 }, + { 0x80800008, 0x27e02d29, 0x00b107e0, 0x00020002 }, + { 0x80800008, 0x28002d29, 0x00b10800, 0x00020002 }, + { 0x80800008, 0x28202d29, 0x00b10820, 0x00020002 }, + { 0x80800008, 0x28402d29, 0x00b10840, 0x00020002 }, + { 0x80800008, 0x28602d29, 0x00b10860, 0x00020002 }, + { 0x80800008, 0x28802d29, 0x00b10880, 0x00020002 }, + { 0x80800008, 0x28a02d29, 0x00b108a0, 0x00020002 }, + { 0x80800008, 0x28c02d29, 0x00b108c0, 0x00020002 }, + { 0x80800008, 0x28e02d29, 0x00b108e0, 0x00020002 }, + { 0x80800008, 0x29002d29, 0x00b10900, 0x00020002 }, + { 0x80800008, 0x29202d29, 0x00b10920, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000043 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, + { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x80800042, 0x27604629, 0x00b104e0, 0x00b104e1 }, + { 0x80800042, 0x27804629, 0x00b10500, 0x00b10501 }, + { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10521 }, + { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10541 }, + { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10561 }, + { 0x80800042, 0x28004629, 0x00b10580, 0x00b10581 }, + { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105a1 }, + { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105c1 }, + { 0x80800042, 0x28604629, 0x00b105e0, 0x00b105e1 }, + { 0x80800042, 0x28804629, 0x00b10600, 0x00b10601 }, + { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10621 }, + { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10641 }, + { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10661 }, + { 0x80800042, 0x29004629, 0x00b10680, 0x00b10681 }, + { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106a1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000002e }, + { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000018 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a007 }, + { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104e0 }, + { 0x80800042, 0x27604629, 0x00b104e0, 0x00b10500 }, + { 0x80800042, 0x27804629, 0x00b10500, 0x00b10520 }, + { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10540 }, + { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10560 }, + { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10580 }, + { 0x80800042, 0x28004629, 0x00b10580, 0x00b105a0 }, + { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105c0 }, + { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105e0 }, + { 0x80800042, 0x28604629, 0x00b105e0, 0x00b10600 }, + { 0x80800042, 0x28804629, 0x00b10600, 0x00b10620 }, + { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10640 }, + { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10660 }, + { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10680 }, + { 0x80800042, 0x29004629, 0x00b10680, 0x00b106a0 }, + { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106c0 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000014 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, + { 0x00800001, 0x27400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x27600229, 0x00b104e0, 0x00000000 }, + { 0x00800001, 0x27800229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x27a00229, 0x00b10520, 0x00000000 }, + { 0x00800001, 0x27c00229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x27e00229, 0x00b10560, 0x00000000 }, + { 0x00800001, 0x28000229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x28200229, 0x00b105a0, 0x00000000 }, + { 0x00800001, 0x28400229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x28600229, 0x00b105e0, 0x00000000 }, + { 0x00800001, 0x28800229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x28a00229, 0x00b10620, 0x00000000 }, + { 0x00800001, 0x28c00229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x28e00229, 0x00b10660, 0x00000000 }, + { 0x00800001, 0x29000229, 0x00b10680, 0x00000000 }, + { 0x00800001, 0x29200229, 0x00b106a0, 0x00000000 }, + { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00020002 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x01000005, 0x20000d3c, 0x00210a54, 0x00000002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000004e }, + { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000040 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24401d29, 0x008d0400, 0x0418a008 }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0418a009 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25401d29, 0x008d0400, 0x0411a008 }, + { 0x00800031, 0x26801d29, 0x008d0400, 0x0411a009 }, + { 0x00600040, 0x29404629, 0x008d0440, 0x008d0441 }, + { 0x00600040, 0x29504629, 0x008d0460, 0x008d0461 }, + { 0x00600040, 0x29604629, 0x008d0480, 0x008d0481 }, + { 0x00600040, 0x29704629, 0x008d04a0, 0x008d04a1 }, + { 0x00600040, 0x29804629, 0x008d04c0, 0x008d04c1 }, + { 0x00600040, 0x29904629, 0x008d04e0, 0x008d04e1 }, + { 0x00600040, 0x29a04629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29b04629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0460 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0480 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a0 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c0 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e0 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0500 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0520 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0540 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0461 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0481 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a1 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c1 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e1 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0501 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0521 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0541 }, + { 0x00600040, 0x29c04629, 0x008d0580, 0x008d0581 }, + { 0x00600040, 0x29d04629, 0x008d05a0, 0x008d05a1 }, + { 0x00600040, 0x29e04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x29f04629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x2a004629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x2a104629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x2a204629, 0x008d0640, 0x008d0641 }, + { 0x00600040, 0x2a304629, 0x008d0660, 0x008d0661 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a0 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c0 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e0 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0600 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0620 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0640 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0660 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0680 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a1 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c1 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e1 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0601 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0621 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0641 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0661 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0681 }, + { 0x00800008, 0x29402d29, 0x00b10940, 0x00020002 }, + { 0x00800008, 0x29602d29, 0x00b10960, 0x00020002 }, + { 0x00800008, 0x29802d29, 0x00b10980, 0x00020002 }, + { 0x00800008, 0x29a02d29, 0x00b109a0, 0x00020002 }, + { 0x00800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, + { 0x00800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, + { 0x00800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, + { 0x00800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x24401d29, 0x008d0400, 0x0414a008 }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a009 }, + { 0x00800042, 0x29404629, 0x00ad0440, 0x00ad0441 }, + { 0x00800042, 0x29604629, 0x00ad0460, 0x00ad0461 }, + { 0x00800042, 0x29804629, 0x00ad0480, 0x00ad0481 }, + { 0x00800042, 0x29a04629, 0x00ad04a0, 0x00ad04a1 }, + { 0x00800042, 0x29c04629, 0x00ad0580, 0x00ad0581 }, + { 0x00800042, 0x29e04629, 0x00ad05a0, 0x00ad05a1 }, + { 0x00800042, 0x2a004629, 0x00ad05c0, 0x00ad05c1 }, + { 0x00800042, 0x2a204629, 0x00ad05e0, 0x00ad05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000025 }, + { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000018 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24401d29, 0x008d0400, 0x0418a008 }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0418a009 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25401d29, 0x008d0400, 0x0411a008 }, + { 0x00800031, 0x26801d29, 0x008d0400, 0x0411a009 }, + { 0x00600042, 0x29404629, 0x008d0440, 0x008d0460 }, + { 0x00600042, 0x29504629, 0x008d0460, 0x008d0480 }, + { 0x00600042, 0x29604629, 0x008d0480, 0x008d04a0 }, + { 0x00600042, 0x29704629, 0x008d04a0, 0x008d04c0 }, + { 0x00600042, 0x29804629, 0x008d04c0, 0x008d04e0 }, + { 0x00600042, 0x29904629, 0x008d04e0, 0x008d0500 }, + { 0x00600042, 0x29a04629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29b04629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29c04629, 0x008d0580, 0x008d05a0 }, + { 0x00600042, 0x29d04629, 0x008d05a0, 0x008d05c0 }, + { 0x00600042, 0x29e04629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x29f04629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x2a004629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x2a104629, 0x008d0620, 0x008d0640 }, + { 0x00600042, 0x2a204629, 0x008d0640, 0x008d0660 }, + { 0x00600042, 0x2a304629, 0x008d0660, 0x008d0680 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000b }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x24801d29, 0x008d0400, 0x0414a008 }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a009 }, + { 0x00800001, 0x29400229, 0x00ad0480, 0x00000000 }, + { 0x00800001, 0x29600229, 0x00ad04a0, 0x00000000 }, + { 0x00800001, 0x29800229, 0x00ad04c0, 0x00000000 }, + { 0x00800001, 0x29a00229, 0x00ad04e0, 0x00000000 }, + { 0x00800001, 0x29c00229, 0x00ad0500, 0x00000000 }, + { 0x00800001, 0x29e00229, 0x00ad0520, 0x00000000 }, + { 0x00800001, 0x2a000229, 0x00ad0540, 0x00000000 }, + { 0x00800001, 0x2a200229, 0x00ad0560, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10a80, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10aa0, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10ac0, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10ae0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10b00, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10b20, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10b40, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10b60, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10b80, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10ba0, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10bc0, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10be0, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c00, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10c20, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10b60, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10a80, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10b80, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10aa0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10ba0, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10ac0, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10bc0, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10ae0, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10be0, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10b00, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10c00, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10b20, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c20, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10b40, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, + { 0x80800001, 0x474001b1, 0x00b10740, 0x00000000 }, + { 0x80800001, 0x476001b1, 0x00b10760, 0x00000000 }, + { 0x80800001, 0x478001b1, 0x00b10780, 0x00000000 }, + { 0x80800001, 0x47a001b1, 0x00b107a0, 0x00000000 }, + { 0x80800001, 0x47c001b1, 0x00b107c0, 0x00000000 }, + { 0x80800001, 0x47e001b1, 0x00b107e0, 0x00000000 }, + { 0x80800001, 0x480001b1, 0x00b10800, 0x00000000 }, + { 0x80800001, 0x482001b1, 0x00b10820, 0x00000000 }, + { 0x80800001, 0x484001b1, 0x00b10840, 0x00000000 }, + { 0x80800001, 0x486001b1, 0x00b10860, 0x00000000 }, + { 0x80800001, 0x488001b1, 0x00b10880, 0x00000000 }, + { 0x80800001, 0x48a001b1, 0x00b108a0, 0x00000000 }, + { 0x80800001, 0x48c001b1, 0x00b108c0, 0x00000000 }, + { 0x80800001, 0x48e001b1, 0x00b108e0, 0x00000000 }, + { 0x80800001, 0x490001b1, 0x00b10900, 0x00000000 }, + { 0x80800001, 0x492001b1, 0x00b10920, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, + { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, + { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, + { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, + { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, + { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, + { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05902000 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, + { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, + { 0x00800040, 0x294025ad, 0x00b10c60, 0x00b10940 }, + { 0x00800040, 0x296025ad, 0x00b10c80, 0x00b10960 }, + { 0x00800040, 0x298025ad, 0x00b10ca0, 0x00b10980 }, + { 0x00800040, 0x29a025ad, 0x00b10cc0, 0x00b109a0 }, + { 0x80800001, 0x494001b1, 0x00b10940, 0x00000000 }, + { 0x80800001, 0x496001b1, 0x00b10960, 0x00000000 }, + { 0x80800001, 0x498001b1, 0x00b10980, 0x00000000 }, + { 0x80800001, 0x49a001b1, 0x00b109a0, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302001 }, + { 0x00800040, 0x29c025a9, 0x00b10ce0, 0x00b109c0 }, + { 0x00800040, 0x29e025a9, 0x00b10d00, 0x00b109e0 }, + { 0x00800040, 0x2a0025a9, 0x00b10d20, 0x00b10a00 }, + { 0x00800040, 0x2a2025a9, 0x00b10d40, 0x00b10a20 }, + { 0x80800001, 0x49c001b1, 0x00b109c0, 0x00000000 }, + { 0x80800001, 0x49e001b1, 0x00b109e0, 0x00000000 }, + { 0x80800001, 0x4a0001b1, 0x00b10a00, 0x00000000 }, + { 0x80800001, 0x4a2001b1, 0x00b10a20, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302002 }, + { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, + { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, diff --git a/src/shaders/mpeg2/vld/frame_frame_pred_backward.g4b.gen5 b/src/shaders/mpeg2/vld/frame_frame_pred_backward.g4b.gen5 new file mode 100644 index 00000000..5f5c174a --- /dev/null +++ b/src/shaders/mpeg2/vld/frame_frame_pred_backward.g4b.gen5 @@ -0,0 +1,369 @@ + { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, + { 0x00000001, 0x34000020, 0x002102a0, 0x00000000 }, + { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00010001 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x01000005, 0x20000d3c, 0x00210a54, 0x00000001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000be }, + { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000090 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a007 }, + { 0x00800040, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x27604629, 0x00b104e0, 0x00b104e1 }, + { 0x00800040, 0x27804629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x27a04629, 0x00b10520, 0x00b10521 }, + { 0x00800040, 0x27c04629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x27e04629, 0x00b10560, 0x00b10561 }, + { 0x00800040, 0x28004629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x28204629, 0x00b105a0, 0x00b105a1 }, + { 0x00800040, 0x28404629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x28604629, 0x00b105e0, 0x00b105e1 }, + { 0x00800040, 0x28804629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x28a04629, 0x00b10620, 0x00b10621 }, + { 0x00800040, 0x28c04629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x28e04629, 0x00b10660, 0x00b10661 }, + { 0x00800040, 0x29004629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x29204629, 0x00b106a0, 0x00b106a1 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e0 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10500 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10520 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10540 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10560 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10580 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a0 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c0 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e0 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10600 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10620 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10640 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10660 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10680 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a0 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c0 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e1 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10501 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10521 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10541 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10561 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10581 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a1 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c1 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e1 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10601 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10621 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10641 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10661 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10681 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a1 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c1 }, + { 0x80800008, 0x27402d29, 0x00b10740, 0x00020002 }, + { 0x80800008, 0x27602d29, 0x00b10760, 0x00020002 }, + { 0x80800008, 0x27802d29, 0x00b10780, 0x00020002 }, + { 0x80800008, 0x27a02d29, 0x00b107a0, 0x00020002 }, + { 0x80800008, 0x27c02d29, 0x00b107c0, 0x00020002 }, + { 0x80800008, 0x27e02d29, 0x00b107e0, 0x00020002 }, + { 0x80800008, 0x28002d29, 0x00b10800, 0x00020002 }, + { 0x80800008, 0x28202d29, 0x00b10820, 0x00020002 }, + { 0x80800008, 0x28402d29, 0x00b10840, 0x00020002 }, + { 0x80800008, 0x28602d29, 0x00b10860, 0x00020002 }, + { 0x80800008, 0x28802d29, 0x00b10880, 0x00020002 }, + { 0x80800008, 0x28a02d29, 0x00b108a0, 0x00020002 }, + { 0x80800008, 0x28c02d29, 0x00b108c0, 0x00020002 }, + { 0x80800008, 0x28e02d29, 0x00b108e0, 0x00020002 }, + { 0x80800008, 0x29002d29, 0x00b10900, 0x00020002 }, + { 0x80800008, 0x29202d29, 0x00b10920, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000086 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, + { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x80800042, 0x27604629, 0x00b104e0, 0x00b104e1 }, + { 0x80800042, 0x27804629, 0x00b10500, 0x00b10501 }, + { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10521 }, + { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10541 }, + { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10561 }, + { 0x80800042, 0x28004629, 0x00b10580, 0x00b10581 }, + { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105a1 }, + { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105c1 }, + { 0x80800042, 0x28604629, 0x00b105e0, 0x00b105e1 }, + { 0x80800042, 0x28804629, 0x00b10600, 0x00b10601 }, + { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10621 }, + { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10641 }, + { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10661 }, + { 0x80800042, 0x29004629, 0x00b10680, 0x00b10681 }, + { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106a1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000005c }, + { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000030 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a007 }, + { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104e0 }, + { 0x80800042, 0x27604629, 0x00b104e0, 0x00b10500 }, + { 0x80800042, 0x27804629, 0x00b10500, 0x00b10520 }, + { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10540 }, + { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10560 }, + { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10580 }, + { 0x80800042, 0x28004629, 0x00b10580, 0x00b105a0 }, + { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105c0 }, + { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105e0 }, + { 0x80800042, 0x28604629, 0x00b105e0, 0x00b10600 }, + { 0x80800042, 0x28804629, 0x00b10600, 0x00b10620 }, + { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10640 }, + { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10660 }, + { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10680 }, + { 0x80800042, 0x29004629, 0x00b10680, 0x00b106a0 }, + { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106c0 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000028 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, + { 0x00800001, 0x27400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x27600229, 0x00b104e0, 0x00000000 }, + { 0x00800001, 0x27800229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x27a00229, 0x00b10520, 0x00000000 }, + { 0x00800001, 0x27c00229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x27e00229, 0x00b10560, 0x00000000 }, + { 0x00800001, 0x28000229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x28200229, 0x00b105a0, 0x00000000 }, + { 0x00800001, 0x28400229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x28600229, 0x00b105e0, 0x00000000 }, + { 0x00800001, 0x28800229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x28a00229, 0x00b10620, 0x00000000 }, + { 0x00800001, 0x28c00229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x28e00229, 0x00b10660, 0x00000000 }, + { 0x00800001, 0x29000229, 0x00b10680, 0x00000000 }, + { 0x00800001, 0x29200229, 0x00b106a0, 0x00000000 }, + { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00020002 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x01000005, 0x20000d3c, 0x00210a54, 0x00000002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000009c }, + { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000080 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24401d29, 0x408d0400, 0x0288a008 }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0288a009 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25401d29, 0x408d0400, 0x0218a008 }, + { 0x00800031, 0x26801d29, 0x408d0400, 0x0218a009 }, + { 0x00600040, 0x29404629, 0x008d0440, 0x008d0441 }, + { 0x00600040, 0x29504629, 0x008d0460, 0x008d0461 }, + { 0x00600040, 0x29604629, 0x008d0480, 0x008d0481 }, + { 0x00600040, 0x29704629, 0x008d04a0, 0x008d04a1 }, + { 0x00600040, 0x29804629, 0x008d04c0, 0x008d04c1 }, + { 0x00600040, 0x29904629, 0x008d04e0, 0x008d04e1 }, + { 0x00600040, 0x29a04629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29b04629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0460 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0480 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a0 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c0 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e0 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0500 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0520 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0540 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0461 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0481 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a1 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c1 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e1 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0501 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0521 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0541 }, + { 0x00600040, 0x29c04629, 0x008d0580, 0x008d0581 }, + { 0x00600040, 0x29d04629, 0x008d05a0, 0x008d05a1 }, + { 0x00600040, 0x29e04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x29f04629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x2a004629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x2a104629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x2a204629, 0x008d0640, 0x008d0641 }, + { 0x00600040, 0x2a304629, 0x008d0660, 0x008d0661 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a0 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c0 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e0 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0600 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0620 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0640 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0660 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0680 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a1 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c1 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e1 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0601 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0621 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0641 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0661 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0681 }, + { 0x00800008, 0x29402d29, 0x00b10940, 0x00020002 }, + { 0x00800008, 0x29602d29, 0x00b10960, 0x00020002 }, + { 0x00800008, 0x29802d29, 0x00b10980, 0x00020002 }, + { 0x00800008, 0x29a02d29, 0x00b109a0, 0x00020002 }, + { 0x00800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, + { 0x00800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, + { 0x00800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, + { 0x00800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x24401d29, 0x408d0400, 0x0248a008 }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a009 }, + { 0x00800042, 0x29404629, 0x00ad0440, 0x00ad0441 }, + { 0x00800042, 0x29604629, 0x00ad0460, 0x00ad0461 }, + { 0x00800042, 0x29804629, 0x00ad0480, 0x00ad0481 }, + { 0x00800042, 0x29a04629, 0x00ad04a0, 0x00ad04a1 }, + { 0x00800042, 0x29c04629, 0x00ad0580, 0x00ad0581 }, + { 0x00800042, 0x29e04629, 0x00ad05a0, 0x00ad05a1 }, + { 0x00800042, 0x2a004629, 0x00ad05c0, 0x00ad05c1 }, + { 0x00800042, 0x2a204629, 0x00ad05e0, 0x00ad05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, + { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000030 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24401d29, 0x408d0400, 0x0288a008 }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0288a009 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25401d29, 0x408d0400, 0x0218a008 }, + { 0x00800031, 0x26801d29, 0x408d0400, 0x0218a009 }, + { 0x00600042, 0x29404629, 0x008d0440, 0x008d0460 }, + { 0x00600042, 0x29504629, 0x008d0460, 0x008d0480 }, + { 0x00600042, 0x29604629, 0x008d0480, 0x008d04a0 }, + { 0x00600042, 0x29704629, 0x008d04a0, 0x008d04c0 }, + { 0x00600042, 0x29804629, 0x008d04c0, 0x008d04e0 }, + { 0x00600042, 0x29904629, 0x008d04e0, 0x008d0500 }, + { 0x00600042, 0x29a04629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29b04629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29c04629, 0x008d0580, 0x008d05a0 }, + { 0x00600042, 0x29d04629, 0x008d05a0, 0x008d05c0 }, + { 0x00600042, 0x29e04629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x29f04629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x2a004629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x2a104629, 0x008d0620, 0x008d0640 }, + { 0x00600042, 0x2a204629, 0x008d0640, 0x008d0660 }, + { 0x00600042, 0x2a304629, 0x008d0660, 0x008d0680 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x24801d29, 0x408d0400, 0x0248a008 }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a009 }, + { 0x00800001, 0x29400229, 0x00ad0480, 0x00000000 }, + { 0x00800001, 0x29600229, 0x00ad04a0, 0x00000000 }, + { 0x00800001, 0x29800229, 0x00ad04c0, 0x00000000 }, + { 0x00800001, 0x29a00229, 0x00ad04e0, 0x00000000 }, + { 0x00800001, 0x29c00229, 0x00ad0500, 0x00000000 }, + { 0x00800001, 0x29e00229, 0x00ad0520, 0x00000000 }, + { 0x00800001, 0x2a000229, 0x00ad0540, 0x00000000 }, + { 0x00800001, 0x2a200229, 0x00ad0560, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10a80, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10aa0, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10ac0, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10ae0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10b00, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10b20, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10b40, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10b60, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10b80, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10ba0, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10bc0, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10be0, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c00, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10c20, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10b60, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10a80, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10b80, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10aa0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10ba0, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10ac0, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10bc0, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10ae0, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10be0, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10b00, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10c00, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10b20, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c20, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10b40, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, + { 0x80800001, 0x474001b1, 0x00b10740, 0x00000000 }, + { 0x80800001, 0x476001b1, 0x00b10760, 0x00000000 }, + { 0x80800001, 0x478001b1, 0x00b10780, 0x00000000 }, + { 0x80800001, 0x47a001b1, 0x00b107a0, 0x00000000 }, + { 0x80800001, 0x47c001b1, 0x00b107c0, 0x00000000 }, + { 0x80800001, 0x47e001b1, 0x00b107e0, 0x00000000 }, + { 0x80800001, 0x480001b1, 0x00b10800, 0x00000000 }, + { 0x80800001, 0x482001b1, 0x00b10820, 0x00000000 }, + { 0x80800001, 0x484001b1, 0x00b10840, 0x00000000 }, + { 0x80800001, 0x486001b1, 0x00b10860, 0x00000000 }, + { 0x80800001, 0x488001b1, 0x00b10880, 0x00000000 }, + { 0x80800001, 0x48a001b1, 0x00b108a0, 0x00000000 }, + { 0x80800001, 0x48c001b1, 0x00b108c0, 0x00000000 }, + { 0x80800001, 0x48e001b1, 0x00b108e0, 0x00000000 }, + { 0x80800001, 0x490001b1, 0x00b10900, 0x00000000 }, + { 0x80800001, 0x492001b1, 0x00b10920, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, + { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, + { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, + { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, + { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, + { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, + { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x12082000 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, + { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, + { 0x00800040, 0x294025ad, 0x00b10c60, 0x00b10940 }, + { 0x00800040, 0x296025ad, 0x00b10c80, 0x00b10960 }, + { 0x00800040, 0x298025ad, 0x00b10ca0, 0x00b10980 }, + { 0x00800040, 0x29a025ad, 0x00b10cc0, 0x00b109a0 }, + { 0x80800001, 0x494001b1, 0x00b10940, 0x00000000 }, + { 0x80800001, 0x496001b1, 0x00b10960, 0x00000000 }, + { 0x80800001, 0x498001b1, 0x00b10980, 0x00000000 }, + { 0x80800001, 0x49a001b1, 0x00b109a0, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082001 }, + { 0x00800040, 0x29c025a9, 0x00b10ce0, 0x00b109c0 }, + { 0x00800040, 0x29e025a9, 0x00b10d00, 0x00b109e0 }, + { 0x00800040, 0x2a0025a9, 0x00b10d20, 0x00b10a00 }, + { 0x00800040, 0x2a2025a9, 0x00b10d40, 0x00b10a20 }, + { 0x80800001, 0x49c001b1, 0x00b109c0, 0x00000000 }, + { 0x80800001, 0x49e001b1, 0x00b109e0, 0x00000000 }, + { 0x80800001, 0x4a0001b1, 0x00b10a00, 0x00000000 }, + { 0x80800001, 0x4a2001b1, 0x00b10a20, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082002 }, + { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, + { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, diff --git a/src/shaders/mpeg2/vld/frame_frame_pred_bidirect.g4a b/src/shaders/mpeg2/vld/frame_frame_pred_bidirect.g4a new file mode 100644 index 00000000..cf7ef57c --- /dev/null +++ b/src/shaders/mpeg2/vld/frame_frame_pred_bidirect.g4a @@ -0,0 +1,120 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g32: message descriptor for reading reference data + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data */ +mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; +mov (2) g31.0<1>UD g82.12<2,2,1>UW {align1}; +mov (1) g126.8<1>UD ip {align1}; +mov (1) ip g21.0<1,1,1>UD {align1}; + +//Y, Forward +mov (1) g31.8<1>UD 0x0070007UD {align1}; +define(`input_surface', `4') +define(`mv1', `g82.16') +define(`mv2', `g82.18') +asr (2) g31.14<1>W g82.16<2,2,1>W 1W {align1}; +add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +include(`motion_frame_y.g4i') +//Save Forward +mov (16) g108.0<1>UD g58.0<16,16,1>UD {align1 compr}; +mov (16) g110.0<1>UD g60.0<16,16,1>UD {align1 compr}; +mov (16) g112.0<1>UD g62.0<16,16,1>UD {align1 compr}; +mov (16) g114.0<1>UD g64.0<16,16,1>UD {align1 compr}; +mov (16) g116.0<1>UD g66.0<16,16,1>UD {align1 compr}; +mov (16) g118.0<1>UD g68.0<16,16,1>UD {align1 compr}; +mov (16) g120.0<1>UD g70.0<16,16,1>UD {align1 compr}; +mov (16) g122.0<1>UD g72.0<16,16,1>UD {align1 compr}; +//Y, Backward +define(`input_surface', `7') +define(`mv1', `g82.20') +define(`mv2', `g82.22') +asr (2) g31.14<1>W g82.20<2,2,1>W 1W {align1}; +add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +include(`motion_frame_y.g4i') +//Average Forward and Backward +avg.sat (16) g58.0<1>UW g58.0<16,16,1>UW g108.0<16,16,1>UW {align1}; +avg.sat (16) g59.0<1>UW g59.0<16,16,1>UW g109.0<16,16,1>UW {align1}; +avg.sat (16) g60.0<1>UW g60.0<16,16,1>UW g110.0<16,16,1>UW {align1}; +avg.sat (16) g61.0<1>UW g61.0<16,16,1>UW g111.0<16,16,1>UW {align1}; +avg.sat (16) g62.0<1>UW g62.0<16,16,1>UW g112.0<16,16,1>UW {align1}; +avg.sat (16) g63.0<1>UW g63.0<16,16,1>UW g113.0<16,16,1>UW {align1}; +avg.sat (16) g64.0<1>UW g64.0<16,16,1>UW g114.0<16,16,1>UW {align1}; +avg.sat (16) g65.0<1>UW g65.0<16,16,1>UW g115.0<16,16,1>UW {align1}; +avg.sat (16) g66.0<1>UW g66.0<16,16,1>UW g116.0<16,16,1>UW {align1}; +avg.sat (16) g67.0<1>UW g67.0<16,16,1>UW g117.0<16,16,1>UW {align1}; +avg.sat (16) g68.0<1>UW g68.0<16,16,1>UW g118.0<16,16,1>UW {align1}; +avg.sat (16) g69.0<1>UW g69.0<16,16,1>UW g119.0<16,16,1>UW {align1}; +avg.sat (16) g70.0<1>UW g70.0<16,16,1>UW g120.0<16,16,1>UW {align1}; +avg.sat (16) g71.0<1>UW g71.0<16,16,1>UW g121.0<16,16,1>UW {align1}; +avg.sat (16) g72.0<1>UW g72.0<16,16,1>UW g122.0<16,16,1>UW {align1}; +avg.sat (16) g73.0<1>UW g73.0<16,16,1>UW g123.0<16,16,1>UW {align1}; + +//UV, Forward +shr (2) g31.0<1>UD g31.0<2,2,1>UD 1UD {align1}; +asr (2) g31.14<1>W g82.16<2,2,1>W 2W {align1}; +add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +define(`input_surface1', `5') +define(`input_surface2', `6') +mov (1) g32.8<1>UD 0x007000fUD {align1}; +include(`motion_frame_uv.g4i') +//Save UV Forward +mov (16) g108.0<1>UB g74.0<16,16,2>UB {align1}; +mov (16) g108.16<1>UB g75.0<16,16,2>UB {align1}; +mov (16) g109.0<1>UB g76.0<16,16,2>UB {align1}; +mov (16) g109.16<1>UB g77.0<16,16,2>UB {align1}; +mov (16) g110.0<1>UB g78.0<16,16,2>UB {align1}; +mov (16) g110.16<1>UB g79.0<16,16,2>UB {align1}; +mov (16) g111.0<1>UB g80.0<16,16,2>UB {align1}; +mov (16) g111.16<1>UB g81.0<16,16,2>UB {align1}; +//UV, Backward +asr (2) g31.14<1>W g82.20<2,2,1>W 2W {align1}; +add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +define(`input_surface1', `8') +define(`input_surface2', `9') +include(`motion_frame_uv.g4i') +//Average Forward and Backward +avg.sat (16) g74.0<1>UW g74.0<16,16,1>UW g108.0<16,16,1>UB {align1}; +avg.sat (16) g75.0<1>UW g75.0<16,16,1>UW g108.16<16,16,1>UB {align1}; +avg.sat (16) g76.0<1>UW g76.0<16,16,1>UW g109.0<16,16,1>UB {align1}; +avg.sat (16) g77.0<1>UW g77.0<16,16,1>UW g109.16<16,16,1>UB {align1}; +avg.sat (16) g78.0<1>UW g78.0<16,16,1>UW g110.0<16,16,1>UB {align1}; +avg.sat (16) g79.0<1>UW g79.0<16,16,1>UW g110.16<16,16,1>UB {align1}; +avg.sat (16) g80.0<1>UW g80.0<16,16,1>UW g111.0<16,16,1>UB {align1}; +avg.sat (16) g81.0<1>UW g81.0<16,16,1>UW g111.16<16,16,1>UB {align1}; + +include(`addidct.g4i') +send (16) 0 acc0<1>UW g0<8,8,1>UW + thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; diff --git a/src/shaders/mpeg2/vld/frame_frame_pred_bidirect.g4b b/src/shaders/mpeg2/vld/frame_frame_pred_bidirect.g4b new file mode 100644 index 00000000..0ca1f384 --- /dev/null +++ b/src/shaders/mpeg2/vld/frame_frame_pred_bidirect.g4b @@ -0,0 +1,675 @@ + { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, + { 0x00000001, 0x34000020, 0x002102a0, 0x00000000 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, + { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00010001 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x01000005, 0x20000d3c, 0x00210a50, 0x00000001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000005f }, + { 0x01000005, 0x20000d3c, 0x00210a52, 0x00000001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000048 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a004 }, + { 0x00800040, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x27604629, 0x00b104e0, 0x00b104e1 }, + { 0x00800040, 0x27804629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x27a04629, 0x00b10520, 0x00b10521 }, + { 0x00800040, 0x27c04629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x27e04629, 0x00b10560, 0x00b10561 }, + { 0x00800040, 0x28004629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x28204629, 0x00b105a0, 0x00b105a1 }, + { 0x00800040, 0x28404629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x28604629, 0x00b105e0, 0x00b105e1 }, + { 0x00800040, 0x28804629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x28a04629, 0x00b10620, 0x00b10621 }, + { 0x00800040, 0x28c04629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x28e04629, 0x00b10660, 0x00b10661 }, + { 0x00800040, 0x29004629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x29204629, 0x00b106a0, 0x00b106a1 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e0 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10500 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10520 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10540 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10560 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10580 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a0 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c0 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e0 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10600 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10620 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10640 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10660 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10680 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a0 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c0 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e1 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10501 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10521 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10541 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10561 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10581 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a1 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c1 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e1 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10601 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10621 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10641 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10661 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10681 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a1 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c1 }, + { 0x80800008, 0x27402d29, 0x00b10740, 0x00020002 }, + { 0x80800008, 0x27602d29, 0x00b10760, 0x00020002 }, + { 0x80800008, 0x27802d29, 0x00b10780, 0x00020002 }, + { 0x80800008, 0x27a02d29, 0x00b107a0, 0x00020002 }, + { 0x80800008, 0x27c02d29, 0x00b107c0, 0x00020002 }, + { 0x80800008, 0x27e02d29, 0x00b107e0, 0x00020002 }, + { 0x80800008, 0x28002d29, 0x00b10800, 0x00020002 }, + { 0x80800008, 0x28202d29, 0x00b10820, 0x00020002 }, + { 0x80800008, 0x28402d29, 0x00b10840, 0x00020002 }, + { 0x80800008, 0x28602d29, 0x00b10860, 0x00020002 }, + { 0x80800008, 0x28802d29, 0x00b10880, 0x00020002 }, + { 0x80800008, 0x28a02d29, 0x00b108a0, 0x00020002 }, + { 0x80800008, 0x28c02d29, 0x00b108c0, 0x00020002 }, + { 0x80800008, 0x28e02d29, 0x00b108e0, 0x00020002 }, + { 0x80800008, 0x29002d29, 0x00b10900, 0x00020002 }, + { 0x80800008, 0x29202d29, 0x00b10920, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000043 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, + { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x80800042, 0x27604629, 0x00b104e0, 0x00b104e1 }, + { 0x80800042, 0x27804629, 0x00b10500, 0x00b10501 }, + { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10521 }, + { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10541 }, + { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10561 }, + { 0x80800042, 0x28004629, 0x00b10580, 0x00b10581 }, + { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105a1 }, + { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105c1 }, + { 0x80800042, 0x28604629, 0x00b105e0, 0x00b105e1 }, + { 0x80800042, 0x28804629, 0x00b10600, 0x00b10601 }, + { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10621 }, + { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10641 }, + { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10661 }, + { 0x80800042, 0x29004629, 0x00b10680, 0x00b10681 }, + { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106a1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000002e }, + { 0x01000005, 0x20000d3c, 0x00210a52, 0x00000001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000018 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a004 }, + { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104e0 }, + { 0x80800042, 0x27604629, 0x00b104e0, 0x00b10500 }, + { 0x80800042, 0x27804629, 0x00b10500, 0x00b10520 }, + { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10540 }, + { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10560 }, + { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10580 }, + { 0x80800042, 0x28004629, 0x00b10580, 0x00b105a0 }, + { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105c0 }, + { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105e0 }, + { 0x80800042, 0x28604629, 0x00b105e0, 0x00b10600 }, + { 0x80800042, 0x28804629, 0x00b10600, 0x00b10620 }, + { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10640 }, + { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10660 }, + { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10680 }, + { 0x80800042, 0x29004629, 0x00b10680, 0x00b106a0 }, + { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106c0 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000014 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, + { 0x00800001, 0x27400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x27600229, 0x00b104e0, 0x00000000 }, + { 0x00800001, 0x27800229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x27a00229, 0x00b10520, 0x00000000 }, + { 0x00800001, 0x27c00229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x27e00229, 0x00b10560, 0x00000000 }, + { 0x00800001, 0x28000229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x28200229, 0x00b105a0, 0x00000000 }, + { 0x00800001, 0x28400229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x28600229, 0x00b105e0, 0x00000000 }, + { 0x00800001, 0x28800229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x28a00229, 0x00b10620, 0x00000000 }, + { 0x00800001, 0x28c00229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x28e00229, 0x00b10660, 0x00000000 }, + { 0x00800001, 0x29000229, 0x00b10680, 0x00000000 }, + { 0x00800001, 0x29200229, 0x00b106a0, 0x00000000 }, + { 0x00802001, 0x2d800021, 0x00b10740, 0x00000000 }, + { 0x00802001, 0x2dc00021, 0x00b10780, 0x00000000 }, + { 0x00802001, 0x2e000021, 0x00b107c0, 0x00000000 }, + { 0x00802001, 0x2e400021, 0x00b10800, 0x00000000 }, + { 0x00802001, 0x2e800021, 0x00b10840, 0x00000000 }, + { 0x00802001, 0x2ec00021, 0x00b10880, 0x00000000 }, + { 0x00802001, 0x2f000021, 0x00b108c0, 0x00000000 }, + { 0x00802001, 0x2f400021, 0x00b10900, 0x00000000 }, + { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00010001 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x01000005, 0x20000d3c, 0x00210a54, 0x00000001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000005f }, + { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000048 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a007 }, + { 0x00800040, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x27604629, 0x00b104e0, 0x00b104e1 }, + { 0x00800040, 0x27804629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x27a04629, 0x00b10520, 0x00b10521 }, + { 0x00800040, 0x27c04629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x27e04629, 0x00b10560, 0x00b10561 }, + { 0x00800040, 0x28004629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x28204629, 0x00b105a0, 0x00b105a1 }, + { 0x00800040, 0x28404629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x28604629, 0x00b105e0, 0x00b105e1 }, + { 0x00800040, 0x28804629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x28a04629, 0x00b10620, 0x00b10621 }, + { 0x00800040, 0x28c04629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x28e04629, 0x00b10660, 0x00b10661 }, + { 0x00800040, 0x29004629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x29204629, 0x00b106a0, 0x00b106a1 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e0 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10500 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10520 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10540 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10560 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10580 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a0 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c0 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e0 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10600 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10620 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10640 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10660 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10680 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a0 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c0 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e1 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10501 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10521 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10541 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10561 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10581 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a1 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c1 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e1 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10601 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10621 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10641 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10661 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10681 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a1 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c1 }, + { 0x80800008, 0x27402d29, 0x00b10740, 0x00020002 }, + { 0x80800008, 0x27602d29, 0x00b10760, 0x00020002 }, + { 0x80800008, 0x27802d29, 0x00b10780, 0x00020002 }, + { 0x80800008, 0x27a02d29, 0x00b107a0, 0x00020002 }, + { 0x80800008, 0x27c02d29, 0x00b107c0, 0x00020002 }, + { 0x80800008, 0x27e02d29, 0x00b107e0, 0x00020002 }, + { 0x80800008, 0x28002d29, 0x00b10800, 0x00020002 }, + { 0x80800008, 0x28202d29, 0x00b10820, 0x00020002 }, + { 0x80800008, 0x28402d29, 0x00b10840, 0x00020002 }, + { 0x80800008, 0x28602d29, 0x00b10860, 0x00020002 }, + { 0x80800008, 0x28802d29, 0x00b10880, 0x00020002 }, + { 0x80800008, 0x28a02d29, 0x00b108a0, 0x00020002 }, + { 0x80800008, 0x28c02d29, 0x00b108c0, 0x00020002 }, + { 0x80800008, 0x28e02d29, 0x00b108e0, 0x00020002 }, + { 0x80800008, 0x29002d29, 0x00b10900, 0x00020002 }, + { 0x80800008, 0x29202d29, 0x00b10920, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000043 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, + { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x80800042, 0x27604629, 0x00b104e0, 0x00b104e1 }, + { 0x80800042, 0x27804629, 0x00b10500, 0x00b10501 }, + { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10521 }, + { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10541 }, + { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10561 }, + { 0x80800042, 0x28004629, 0x00b10580, 0x00b10581 }, + { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105a1 }, + { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105c1 }, + { 0x80800042, 0x28604629, 0x00b105e0, 0x00b105e1 }, + { 0x80800042, 0x28804629, 0x00b10600, 0x00b10601 }, + { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10621 }, + { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10641 }, + { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10661 }, + { 0x80800042, 0x29004629, 0x00b10680, 0x00b10681 }, + { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106a1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000002e }, + { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000018 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a007 }, + { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104e0 }, + { 0x80800042, 0x27604629, 0x00b104e0, 0x00b10500 }, + { 0x80800042, 0x27804629, 0x00b10500, 0x00b10520 }, + { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10540 }, + { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10560 }, + { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10580 }, + { 0x80800042, 0x28004629, 0x00b10580, 0x00b105a0 }, + { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105c0 }, + { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105e0 }, + { 0x80800042, 0x28604629, 0x00b105e0, 0x00b10600 }, + { 0x80800042, 0x28804629, 0x00b10600, 0x00b10620 }, + { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10640 }, + { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10660 }, + { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10680 }, + { 0x80800042, 0x29004629, 0x00b10680, 0x00b106a0 }, + { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106c0 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000014 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, + { 0x00800001, 0x27400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x27600229, 0x00b104e0, 0x00000000 }, + { 0x00800001, 0x27800229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x27a00229, 0x00b10520, 0x00000000 }, + { 0x00800001, 0x27c00229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x27e00229, 0x00b10560, 0x00000000 }, + { 0x00800001, 0x28000229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x28200229, 0x00b105a0, 0x00000000 }, + { 0x00800001, 0x28400229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x28600229, 0x00b105e0, 0x00000000 }, + { 0x00800001, 0x28800229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x28a00229, 0x00b10620, 0x00000000 }, + { 0x00800001, 0x28c00229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x28e00229, 0x00b10660, 0x00000000 }, + { 0x00800001, 0x29000229, 0x00b10680, 0x00000000 }, + { 0x00800001, 0x29200229, 0x00b106a0, 0x00000000 }, + { 0x80800042, 0x27402529, 0x00b10740, 0x00b10d80 }, + { 0x80800042, 0x27602529, 0x00b10760, 0x00b10da0 }, + { 0x80800042, 0x27802529, 0x00b10780, 0x00b10dc0 }, + { 0x80800042, 0x27a02529, 0x00b107a0, 0x00b10de0 }, + { 0x80800042, 0x27c02529, 0x00b107c0, 0x00b10e00 }, + { 0x80800042, 0x27e02529, 0x00b107e0, 0x00b10e20 }, + { 0x80800042, 0x28002529, 0x00b10800, 0x00b10e40 }, + { 0x80800042, 0x28202529, 0x00b10820, 0x00b10e60 }, + { 0x80800042, 0x28402529, 0x00b10840, 0x00b10e80 }, + { 0x80800042, 0x28602529, 0x00b10860, 0x00b10ea0 }, + { 0x80800042, 0x28802529, 0x00b10880, 0x00b10ec0 }, + { 0x80800042, 0x28a02529, 0x00b108a0, 0x00b10ee0 }, + { 0x80800042, 0x28c02529, 0x00b108c0, 0x00b10f00 }, + { 0x80800042, 0x28e02529, 0x00b108e0, 0x00b10f20 }, + { 0x80800042, 0x29002529, 0x00b10900, 0x00b10f40 }, + { 0x80800042, 0x29202529, 0x00b10920, 0x00b10f60 }, + { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00020002 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x01000005, 0x20000d3c, 0x00210a54, 0x00000002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000004e }, + { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000040 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24401d29, 0x008d0400, 0x0418a005 }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0418a006 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25401d29, 0x008d0400, 0x0411a005 }, + { 0x00800031, 0x26801d29, 0x008d0400, 0x0411a006 }, + { 0x00600040, 0x29404629, 0x008d0440, 0x008d0441 }, + { 0x00600040, 0x29504629, 0x008d0460, 0x008d0461 }, + { 0x00600040, 0x29604629, 0x008d0480, 0x008d0481 }, + { 0x00600040, 0x29704629, 0x008d04a0, 0x008d04a1 }, + { 0x00600040, 0x29804629, 0x008d04c0, 0x008d04c1 }, + { 0x00600040, 0x29904629, 0x008d04e0, 0x008d04e1 }, + { 0x00600040, 0x29a04629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29b04629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0460 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0480 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a0 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c0 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e0 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0500 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0520 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0540 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0461 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0481 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a1 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c1 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e1 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0501 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0521 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0541 }, + { 0x00600040, 0x29c04629, 0x008d0580, 0x008d0581 }, + { 0x00600040, 0x29d04629, 0x008d05a0, 0x008d05a1 }, + { 0x00600040, 0x29e04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x29f04629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x2a004629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x2a104629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x2a204629, 0x008d0640, 0x008d0641 }, + { 0x00600040, 0x2a304629, 0x008d0660, 0x008d0661 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a0 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c0 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e0 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0600 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0620 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0640 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0660 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0680 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a1 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c1 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e1 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0601 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0621 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0641 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0661 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0681 }, + { 0x00800008, 0x29402d29, 0x00b10940, 0x00020002 }, + { 0x00800008, 0x29602d29, 0x00b10960, 0x00020002 }, + { 0x00800008, 0x29802d29, 0x00b10980, 0x00020002 }, + { 0x00800008, 0x29a02d29, 0x00b109a0, 0x00020002 }, + { 0x00800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, + { 0x00800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, + { 0x00800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, + { 0x00800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x24401d29, 0x008d0400, 0x0414a005 }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a006 }, + { 0x00800042, 0x29404629, 0x00ad0440, 0x00ad0441 }, + { 0x00800042, 0x29604629, 0x00ad0460, 0x00ad0461 }, + { 0x00800042, 0x29804629, 0x00ad0480, 0x00ad0481 }, + { 0x00800042, 0x29a04629, 0x00ad04a0, 0x00ad04a1 }, + { 0x00800042, 0x29c04629, 0x00ad0580, 0x00ad0581 }, + { 0x00800042, 0x29e04629, 0x00ad05a0, 0x00ad05a1 }, + { 0x00800042, 0x2a004629, 0x00ad05c0, 0x00ad05c1 }, + { 0x00800042, 0x2a204629, 0x00ad05e0, 0x00ad05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000025 }, + { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000018 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24401d29, 0x008d0400, 0x0418a005 }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0418a006 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25401d29, 0x008d0400, 0x0411a005 }, + { 0x00800031, 0x26801d29, 0x008d0400, 0x0411a006 }, + { 0x00600042, 0x29404629, 0x008d0440, 0x008d0460 }, + { 0x00600042, 0x29504629, 0x008d0460, 0x008d0480 }, + { 0x00600042, 0x29604629, 0x008d0480, 0x008d04a0 }, + { 0x00600042, 0x29704629, 0x008d04a0, 0x008d04c0 }, + { 0x00600042, 0x29804629, 0x008d04c0, 0x008d04e0 }, + { 0x00600042, 0x29904629, 0x008d04e0, 0x008d0500 }, + { 0x00600042, 0x29a04629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29b04629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29c04629, 0x008d0580, 0x008d05a0 }, + { 0x00600042, 0x29d04629, 0x008d05a0, 0x008d05c0 }, + { 0x00600042, 0x29e04629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x29f04629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x2a004629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x2a104629, 0x008d0620, 0x008d0640 }, + { 0x00600042, 0x2a204629, 0x008d0640, 0x008d0660 }, + { 0x00600042, 0x2a304629, 0x008d0660, 0x008d0680 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000b }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x24801d29, 0x008d0400, 0x0414a005 }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a006 }, + { 0x00800001, 0x29400229, 0x00ad0480, 0x00000000 }, + { 0x00800001, 0x29600229, 0x00ad04a0, 0x00000000 }, + { 0x00800001, 0x29800229, 0x00ad04c0, 0x00000000 }, + { 0x00800001, 0x29a00229, 0x00ad04e0, 0x00000000 }, + { 0x00800001, 0x29c00229, 0x00ad0500, 0x00000000 }, + { 0x00800001, 0x29e00229, 0x00ad0520, 0x00000000 }, + { 0x00800001, 0x2a000229, 0x00ad0540, 0x00000000 }, + { 0x00800001, 0x2a200229, 0x00ad0560, 0x00000000 }, + { 0x00800001, 0x2d800231, 0x00b20940, 0x00000000 }, + { 0x00800001, 0x2d900231, 0x00b20960, 0x00000000 }, + { 0x00800001, 0x2da00231, 0x00b20980, 0x00000000 }, + { 0x00800001, 0x2db00231, 0x00b209a0, 0x00000000 }, + { 0x00800001, 0x2dc00231, 0x00b209c0, 0x00000000 }, + { 0x00800001, 0x2dd00231, 0x00b209e0, 0x00000000 }, + { 0x00800001, 0x2de00231, 0x00b20a00, 0x00000000 }, + { 0x00800001, 0x2df00231, 0x00b20a20, 0x00000000 }, + { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00020002 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x01000005, 0x20000d3c, 0x00210a54, 0x00000002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000004e }, + { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000040 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24401d29, 0x008d0400, 0x0418a008 }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0418a009 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25401d29, 0x008d0400, 0x0411a008 }, + { 0x00800031, 0x26801d29, 0x008d0400, 0x0411a009 }, + { 0x00600040, 0x29404629, 0x008d0440, 0x008d0441 }, + { 0x00600040, 0x29504629, 0x008d0460, 0x008d0461 }, + { 0x00600040, 0x29604629, 0x008d0480, 0x008d0481 }, + { 0x00600040, 0x29704629, 0x008d04a0, 0x008d04a1 }, + { 0x00600040, 0x29804629, 0x008d04c0, 0x008d04c1 }, + { 0x00600040, 0x29904629, 0x008d04e0, 0x008d04e1 }, + { 0x00600040, 0x29a04629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29b04629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0460 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0480 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a0 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c0 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e0 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0500 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0520 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0540 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0461 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0481 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a1 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c1 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e1 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0501 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0521 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0541 }, + { 0x00600040, 0x29c04629, 0x008d0580, 0x008d0581 }, + { 0x00600040, 0x29d04629, 0x008d05a0, 0x008d05a1 }, + { 0x00600040, 0x29e04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x29f04629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x2a004629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x2a104629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x2a204629, 0x008d0640, 0x008d0641 }, + { 0x00600040, 0x2a304629, 0x008d0660, 0x008d0661 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a0 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c0 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e0 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0600 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0620 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0640 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0660 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0680 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a1 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c1 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e1 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0601 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0621 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0641 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0661 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0681 }, + { 0x00800008, 0x29402d29, 0x00b10940, 0x00020002 }, + { 0x00800008, 0x29602d29, 0x00b10960, 0x00020002 }, + { 0x00800008, 0x29802d29, 0x00b10980, 0x00020002 }, + { 0x00800008, 0x29a02d29, 0x00b109a0, 0x00020002 }, + { 0x00800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, + { 0x00800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, + { 0x00800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, + { 0x00800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x24401d29, 0x008d0400, 0x0414a008 }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a009 }, + { 0x00800042, 0x29404629, 0x00ad0440, 0x00ad0441 }, + { 0x00800042, 0x29604629, 0x00ad0460, 0x00ad0461 }, + { 0x00800042, 0x29804629, 0x00ad0480, 0x00ad0481 }, + { 0x00800042, 0x29a04629, 0x00ad04a0, 0x00ad04a1 }, + { 0x00800042, 0x29c04629, 0x00ad0580, 0x00ad0581 }, + { 0x00800042, 0x29e04629, 0x00ad05a0, 0x00ad05a1 }, + { 0x00800042, 0x2a004629, 0x00ad05c0, 0x00ad05c1 }, + { 0x00800042, 0x2a204629, 0x00ad05e0, 0x00ad05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000025 }, + { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000018 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24401d29, 0x008d0400, 0x0418a008 }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0418a009 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25401d29, 0x008d0400, 0x0411a008 }, + { 0x00800031, 0x26801d29, 0x008d0400, 0x0411a009 }, + { 0x00600042, 0x29404629, 0x008d0440, 0x008d0460 }, + { 0x00600042, 0x29504629, 0x008d0460, 0x008d0480 }, + { 0x00600042, 0x29604629, 0x008d0480, 0x008d04a0 }, + { 0x00600042, 0x29704629, 0x008d04a0, 0x008d04c0 }, + { 0x00600042, 0x29804629, 0x008d04c0, 0x008d04e0 }, + { 0x00600042, 0x29904629, 0x008d04e0, 0x008d0500 }, + { 0x00600042, 0x29a04629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29b04629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29c04629, 0x008d0580, 0x008d05a0 }, + { 0x00600042, 0x29d04629, 0x008d05a0, 0x008d05c0 }, + { 0x00600042, 0x29e04629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x29f04629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x2a004629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x2a104629, 0x008d0620, 0x008d0640 }, + { 0x00600042, 0x2a204629, 0x008d0640, 0x008d0660 }, + { 0x00600042, 0x2a304629, 0x008d0660, 0x008d0680 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000b }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x24801d29, 0x008d0400, 0x0414a008 }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a009 }, + { 0x00800001, 0x29400229, 0x00ad0480, 0x00000000 }, + { 0x00800001, 0x29600229, 0x00ad04a0, 0x00000000 }, + { 0x00800001, 0x29800229, 0x00ad04c0, 0x00000000 }, + { 0x00800001, 0x29a00229, 0x00ad04e0, 0x00000000 }, + { 0x00800001, 0x29c00229, 0x00ad0500, 0x00000000 }, + { 0x00800001, 0x29e00229, 0x00ad0520, 0x00000000 }, + { 0x00800001, 0x2a000229, 0x00ad0540, 0x00000000 }, + { 0x00800001, 0x2a200229, 0x00ad0560, 0x00000000 }, + { 0x80800042, 0x29404529, 0x00b10940, 0x00b10d80 }, + { 0x80800042, 0x29604529, 0x00b10960, 0x00b10d90 }, + { 0x80800042, 0x29804529, 0x00b10980, 0x00b10da0 }, + { 0x80800042, 0x29a04529, 0x00b109a0, 0x00b10db0 }, + { 0x80800042, 0x29c04529, 0x00b109c0, 0x00b10dc0 }, + { 0x80800042, 0x29e04529, 0x00b109e0, 0x00b10dd0 }, + { 0x80800042, 0x2a004529, 0x00b10a00, 0x00b10de0 }, + { 0x80800042, 0x2a204529, 0x00b10a20, 0x00b10df0 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10a80, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10aa0, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10ac0, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10ae0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10b00, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10b20, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10b40, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10b60, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10b80, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10ba0, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10bc0, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10be0, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c00, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10c20, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10b60, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10a80, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10b80, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10aa0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10ba0, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10ac0, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10bc0, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10ae0, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10be0, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10b00, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10c00, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10b20, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c20, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10b40, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, + { 0x80800001, 0x474001b1, 0x00b10740, 0x00000000 }, + { 0x80800001, 0x476001b1, 0x00b10760, 0x00000000 }, + { 0x80800001, 0x478001b1, 0x00b10780, 0x00000000 }, + { 0x80800001, 0x47a001b1, 0x00b107a0, 0x00000000 }, + { 0x80800001, 0x47c001b1, 0x00b107c0, 0x00000000 }, + { 0x80800001, 0x47e001b1, 0x00b107e0, 0x00000000 }, + { 0x80800001, 0x480001b1, 0x00b10800, 0x00000000 }, + { 0x80800001, 0x482001b1, 0x00b10820, 0x00000000 }, + { 0x80800001, 0x484001b1, 0x00b10840, 0x00000000 }, + { 0x80800001, 0x486001b1, 0x00b10860, 0x00000000 }, + { 0x80800001, 0x488001b1, 0x00b10880, 0x00000000 }, + { 0x80800001, 0x48a001b1, 0x00b108a0, 0x00000000 }, + { 0x80800001, 0x48c001b1, 0x00b108c0, 0x00000000 }, + { 0x80800001, 0x48e001b1, 0x00b108e0, 0x00000000 }, + { 0x80800001, 0x490001b1, 0x00b10900, 0x00000000 }, + { 0x80800001, 0x492001b1, 0x00b10920, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, + { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, + { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, + { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, + { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, + { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, + { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05902000 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, + { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, + { 0x00800040, 0x294025ad, 0x00b10c60, 0x00b10940 }, + { 0x00800040, 0x296025ad, 0x00b10c80, 0x00b10960 }, + { 0x00800040, 0x298025ad, 0x00b10ca0, 0x00b10980 }, + { 0x00800040, 0x29a025ad, 0x00b10cc0, 0x00b109a0 }, + { 0x80800001, 0x494001b1, 0x00b10940, 0x00000000 }, + { 0x80800001, 0x496001b1, 0x00b10960, 0x00000000 }, + { 0x80800001, 0x498001b1, 0x00b10980, 0x00000000 }, + { 0x80800001, 0x49a001b1, 0x00b109a0, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302001 }, + { 0x00800040, 0x29c025a9, 0x00b10ce0, 0x00b109c0 }, + { 0x00800040, 0x29e025a9, 0x00b10d00, 0x00b109e0 }, + { 0x00800040, 0x2a0025a9, 0x00b10d20, 0x00b10a00 }, + { 0x00800040, 0x2a2025a9, 0x00b10d40, 0x00b10a20 }, + { 0x80800001, 0x49c001b1, 0x00b109c0, 0x00000000 }, + { 0x80800001, 0x49e001b1, 0x00b109e0, 0x00000000 }, + { 0x80800001, 0x4a0001b1, 0x00b10a00, 0x00000000 }, + { 0x80800001, 0x4a2001b1, 0x00b10a20, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302002 }, + { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, + { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, diff --git a/src/shaders/mpeg2/vld/frame_frame_pred_bidirect.g4b.gen5 b/src/shaders/mpeg2/vld/frame_frame_pred_bidirect.g4b.gen5 new file mode 100644 index 00000000..1078caa5 --- /dev/null +++ b/src/shaders/mpeg2/vld/frame_frame_pred_bidirect.g4b.gen5 @@ -0,0 +1,675 @@ + { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, + { 0x00000001, 0x34000020, 0x002102a0, 0x00000000 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, + { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00010001 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x01000005, 0x20000d3c, 0x00210a50, 0x00000001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000be }, + { 0x01000005, 0x20000d3c, 0x00210a52, 0x00000001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000090 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a004 }, + { 0x00800040, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x27604629, 0x00b104e0, 0x00b104e1 }, + { 0x00800040, 0x27804629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x27a04629, 0x00b10520, 0x00b10521 }, + { 0x00800040, 0x27c04629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x27e04629, 0x00b10560, 0x00b10561 }, + { 0x00800040, 0x28004629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x28204629, 0x00b105a0, 0x00b105a1 }, + { 0x00800040, 0x28404629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x28604629, 0x00b105e0, 0x00b105e1 }, + { 0x00800040, 0x28804629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x28a04629, 0x00b10620, 0x00b10621 }, + { 0x00800040, 0x28c04629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x28e04629, 0x00b10660, 0x00b10661 }, + { 0x00800040, 0x29004629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x29204629, 0x00b106a0, 0x00b106a1 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e0 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10500 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10520 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10540 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10560 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10580 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a0 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c0 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e0 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10600 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10620 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10640 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10660 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10680 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a0 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c0 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e1 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10501 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10521 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10541 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10561 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10581 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a1 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c1 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e1 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10601 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10621 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10641 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10661 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10681 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a1 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c1 }, + { 0x80800008, 0x27402d29, 0x00b10740, 0x00020002 }, + { 0x80800008, 0x27602d29, 0x00b10760, 0x00020002 }, + { 0x80800008, 0x27802d29, 0x00b10780, 0x00020002 }, + { 0x80800008, 0x27a02d29, 0x00b107a0, 0x00020002 }, + { 0x80800008, 0x27c02d29, 0x00b107c0, 0x00020002 }, + { 0x80800008, 0x27e02d29, 0x00b107e0, 0x00020002 }, + { 0x80800008, 0x28002d29, 0x00b10800, 0x00020002 }, + { 0x80800008, 0x28202d29, 0x00b10820, 0x00020002 }, + { 0x80800008, 0x28402d29, 0x00b10840, 0x00020002 }, + { 0x80800008, 0x28602d29, 0x00b10860, 0x00020002 }, + { 0x80800008, 0x28802d29, 0x00b10880, 0x00020002 }, + { 0x80800008, 0x28a02d29, 0x00b108a0, 0x00020002 }, + { 0x80800008, 0x28c02d29, 0x00b108c0, 0x00020002 }, + { 0x80800008, 0x28e02d29, 0x00b108e0, 0x00020002 }, + { 0x80800008, 0x29002d29, 0x00b10900, 0x00020002 }, + { 0x80800008, 0x29202d29, 0x00b10920, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000086 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, + { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x80800042, 0x27604629, 0x00b104e0, 0x00b104e1 }, + { 0x80800042, 0x27804629, 0x00b10500, 0x00b10501 }, + { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10521 }, + { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10541 }, + { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10561 }, + { 0x80800042, 0x28004629, 0x00b10580, 0x00b10581 }, + { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105a1 }, + { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105c1 }, + { 0x80800042, 0x28604629, 0x00b105e0, 0x00b105e1 }, + { 0x80800042, 0x28804629, 0x00b10600, 0x00b10601 }, + { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10621 }, + { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10641 }, + { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10661 }, + { 0x80800042, 0x29004629, 0x00b10680, 0x00b10681 }, + { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106a1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000005c }, + { 0x01000005, 0x20000d3c, 0x00210a52, 0x00000001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000030 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a004 }, + { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104e0 }, + { 0x80800042, 0x27604629, 0x00b104e0, 0x00b10500 }, + { 0x80800042, 0x27804629, 0x00b10500, 0x00b10520 }, + { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10540 }, + { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10560 }, + { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10580 }, + { 0x80800042, 0x28004629, 0x00b10580, 0x00b105a0 }, + { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105c0 }, + { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105e0 }, + { 0x80800042, 0x28604629, 0x00b105e0, 0x00b10600 }, + { 0x80800042, 0x28804629, 0x00b10600, 0x00b10620 }, + { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10640 }, + { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10660 }, + { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10680 }, + { 0x80800042, 0x29004629, 0x00b10680, 0x00b106a0 }, + { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106c0 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000028 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, + { 0x00800001, 0x27400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x27600229, 0x00b104e0, 0x00000000 }, + { 0x00800001, 0x27800229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x27a00229, 0x00b10520, 0x00000000 }, + { 0x00800001, 0x27c00229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x27e00229, 0x00b10560, 0x00000000 }, + { 0x00800001, 0x28000229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x28200229, 0x00b105a0, 0x00000000 }, + { 0x00800001, 0x28400229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x28600229, 0x00b105e0, 0x00000000 }, + { 0x00800001, 0x28800229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x28a00229, 0x00b10620, 0x00000000 }, + { 0x00800001, 0x28c00229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x28e00229, 0x00b10660, 0x00000000 }, + { 0x00800001, 0x29000229, 0x00b10680, 0x00000000 }, + { 0x00800001, 0x29200229, 0x00b106a0, 0x00000000 }, + { 0x00802001, 0x2d800021, 0x00b10740, 0x00000000 }, + { 0x00802001, 0x2dc00021, 0x00b10780, 0x00000000 }, + { 0x00802001, 0x2e000021, 0x00b107c0, 0x00000000 }, + { 0x00802001, 0x2e400021, 0x00b10800, 0x00000000 }, + { 0x00802001, 0x2e800021, 0x00b10840, 0x00000000 }, + { 0x00802001, 0x2ec00021, 0x00b10880, 0x00000000 }, + { 0x00802001, 0x2f000021, 0x00b108c0, 0x00000000 }, + { 0x00802001, 0x2f400021, 0x00b10900, 0x00000000 }, + { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00010001 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x01000005, 0x20000d3c, 0x00210a54, 0x00000001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000be }, + { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000090 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a007 }, + { 0x00800040, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x27604629, 0x00b104e0, 0x00b104e1 }, + { 0x00800040, 0x27804629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x27a04629, 0x00b10520, 0x00b10521 }, + { 0x00800040, 0x27c04629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x27e04629, 0x00b10560, 0x00b10561 }, + { 0x00800040, 0x28004629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x28204629, 0x00b105a0, 0x00b105a1 }, + { 0x00800040, 0x28404629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x28604629, 0x00b105e0, 0x00b105e1 }, + { 0x00800040, 0x28804629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x28a04629, 0x00b10620, 0x00b10621 }, + { 0x00800040, 0x28c04629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x28e04629, 0x00b10660, 0x00b10661 }, + { 0x00800040, 0x29004629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x29204629, 0x00b106a0, 0x00b106a1 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e0 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10500 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10520 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10540 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10560 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10580 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a0 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c0 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e0 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10600 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10620 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10640 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10660 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10680 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a0 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c0 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e1 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10501 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10521 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10541 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10561 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10581 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a1 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c1 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e1 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10601 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10621 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10641 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10661 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10681 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a1 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c1 }, + { 0x80800008, 0x27402d29, 0x00b10740, 0x00020002 }, + { 0x80800008, 0x27602d29, 0x00b10760, 0x00020002 }, + { 0x80800008, 0x27802d29, 0x00b10780, 0x00020002 }, + { 0x80800008, 0x27a02d29, 0x00b107a0, 0x00020002 }, + { 0x80800008, 0x27c02d29, 0x00b107c0, 0x00020002 }, + { 0x80800008, 0x27e02d29, 0x00b107e0, 0x00020002 }, + { 0x80800008, 0x28002d29, 0x00b10800, 0x00020002 }, + { 0x80800008, 0x28202d29, 0x00b10820, 0x00020002 }, + { 0x80800008, 0x28402d29, 0x00b10840, 0x00020002 }, + { 0x80800008, 0x28602d29, 0x00b10860, 0x00020002 }, + { 0x80800008, 0x28802d29, 0x00b10880, 0x00020002 }, + { 0x80800008, 0x28a02d29, 0x00b108a0, 0x00020002 }, + { 0x80800008, 0x28c02d29, 0x00b108c0, 0x00020002 }, + { 0x80800008, 0x28e02d29, 0x00b108e0, 0x00020002 }, + { 0x80800008, 0x29002d29, 0x00b10900, 0x00020002 }, + { 0x80800008, 0x29202d29, 0x00b10920, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000086 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, + { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x80800042, 0x27604629, 0x00b104e0, 0x00b104e1 }, + { 0x80800042, 0x27804629, 0x00b10500, 0x00b10501 }, + { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10521 }, + { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10541 }, + { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10561 }, + { 0x80800042, 0x28004629, 0x00b10580, 0x00b10581 }, + { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105a1 }, + { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105c1 }, + { 0x80800042, 0x28604629, 0x00b105e0, 0x00b105e1 }, + { 0x80800042, 0x28804629, 0x00b10600, 0x00b10601 }, + { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10621 }, + { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10641 }, + { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10661 }, + { 0x80800042, 0x29004629, 0x00b10680, 0x00b10681 }, + { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106a1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000005c }, + { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000030 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a007 }, + { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104e0 }, + { 0x80800042, 0x27604629, 0x00b104e0, 0x00b10500 }, + { 0x80800042, 0x27804629, 0x00b10500, 0x00b10520 }, + { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10540 }, + { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10560 }, + { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10580 }, + { 0x80800042, 0x28004629, 0x00b10580, 0x00b105a0 }, + { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105c0 }, + { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105e0 }, + { 0x80800042, 0x28604629, 0x00b105e0, 0x00b10600 }, + { 0x80800042, 0x28804629, 0x00b10600, 0x00b10620 }, + { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10640 }, + { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10660 }, + { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10680 }, + { 0x80800042, 0x29004629, 0x00b10680, 0x00b106a0 }, + { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106c0 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000028 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, + { 0x00800001, 0x27400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x27600229, 0x00b104e0, 0x00000000 }, + { 0x00800001, 0x27800229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x27a00229, 0x00b10520, 0x00000000 }, + { 0x00800001, 0x27c00229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x27e00229, 0x00b10560, 0x00000000 }, + { 0x00800001, 0x28000229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x28200229, 0x00b105a0, 0x00000000 }, + { 0x00800001, 0x28400229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x28600229, 0x00b105e0, 0x00000000 }, + { 0x00800001, 0x28800229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x28a00229, 0x00b10620, 0x00000000 }, + { 0x00800001, 0x28c00229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x28e00229, 0x00b10660, 0x00000000 }, + { 0x00800001, 0x29000229, 0x00b10680, 0x00000000 }, + { 0x00800001, 0x29200229, 0x00b106a0, 0x00000000 }, + { 0x80800042, 0x27402529, 0x00b10740, 0x00b10d80 }, + { 0x80800042, 0x27602529, 0x00b10760, 0x00b10da0 }, + { 0x80800042, 0x27802529, 0x00b10780, 0x00b10dc0 }, + { 0x80800042, 0x27a02529, 0x00b107a0, 0x00b10de0 }, + { 0x80800042, 0x27c02529, 0x00b107c0, 0x00b10e00 }, + { 0x80800042, 0x27e02529, 0x00b107e0, 0x00b10e20 }, + { 0x80800042, 0x28002529, 0x00b10800, 0x00b10e40 }, + { 0x80800042, 0x28202529, 0x00b10820, 0x00b10e60 }, + { 0x80800042, 0x28402529, 0x00b10840, 0x00b10e80 }, + { 0x80800042, 0x28602529, 0x00b10860, 0x00b10ea0 }, + { 0x80800042, 0x28802529, 0x00b10880, 0x00b10ec0 }, + { 0x80800042, 0x28a02529, 0x00b108a0, 0x00b10ee0 }, + { 0x80800042, 0x28c02529, 0x00b108c0, 0x00b10f00 }, + { 0x80800042, 0x28e02529, 0x00b108e0, 0x00b10f20 }, + { 0x80800042, 0x29002529, 0x00b10900, 0x00b10f40 }, + { 0x80800042, 0x29202529, 0x00b10920, 0x00b10f60 }, + { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00020002 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x01000005, 0x20000d3c, 0x00210a54, 0x00000002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000009c }, + { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000080 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24401d29, 0x408d0400, 0x0288a005 }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0288a006 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25401d29, 0x408d0400, 0x0218a005 }, + { 0x00800031, 0x26801d29, 0x408d0400, 0x0218a006 }, + { 0x00600040, 0x29404629, 0x008d0440, 0x008d0441 }, + { 0x00600040, 0x29504629, 0x008d0460, 0x008d0461 }, + { 0x00600040, 0x29604629, 0x008d0480, 0x008d0481 }, + { 0x00600040, 0x29704629, 0x008d04a0, 0x008d04a1 }, + { 0x00600040, 0x29804629, 0x008d04c0, 0x008d04c1 }, + { 0x00600040, 0x29904629, 0x008d04e0, 0x008d04e1 }, + { 0x00600040, 0x29a04629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29b04629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0460 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0480 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a0 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c0 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e0 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0500 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0520 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0540 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0461 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0481 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a1 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c1 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e1 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0501 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0521 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0541 }, + { 0x00600040, 0x29c04629, 0x008d0580, 0x008d0581 }, + { 0x00600040, 0x29d04629, 0x008d05a0, 0x008d05a1 }, + { 0x00600040, 0x29e04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x29f04629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x2a004629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x2a104629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x2a204629, 0x008d0640, 0x008d0641 }, + { 0x00600040, 0x2a304629, 0x008d0660, 0x008d0661 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a0 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c0 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e0 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0600 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0620 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0640 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0660 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0680 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a1 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c1 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e1 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0601 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0621 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0641 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0661 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0681 }, + { 0x00800008, 0x29402d29, 0x00b10940, 0x00020002 }, + { 0x00800008, 0x29602d29, 0x00b10960, 0x00020002 }, + { 0x00800008, 0x29802d29, 0x00b10980, 0x00020002 }, + { 0x00800008, 0x29a02d29, 0x00b109a0, 0x00020002 }, + { 0x00800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, + { 0x00800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, + { 0x00800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, + { 0x00800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x24401d29, 0x408d0400, 0x0248a005 }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a006 }, + { 0x00800042, 0x29404629, 0x00ad0440, 0x00ad0441 }, + { 0x00800042, 0x29604629, 0x00ad0460, 0x00ad0461 }, + { 0x00800042, 0x29804629, 0x00ad0480, 0x00ad0481 }, + { 0x00800042, 0x29a04629, 0x00ad04a0, 0x00ad04a1 }, + { 0x00800042, 0x29c04629, 0x00ad0580, 0x00ad0581 }, + { 0x00800042, 0x29e04629, 0x00ad05a0, 0x00ad05a1 }, + { 0x00800042, 0x2a004629, 0x00ad05c0, 0x00ad05c1 }, + { 0x00800042, 0x2a204629, 0x00ad05e0, 0x00ad05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, + { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000030 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24401d29, 0x408d0400, 0x0288a005 }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0288a006 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25401d29, 0x408d0400, 0x0218a005 }, + { 0x00800031, 0x26801d29, 0x408d0400, 0x0218a006 }, + { 0x00600042, 0x29404629, 0x008d0440, 0x008d0460 }, + { 0x00600042, 0x29504629, 0x008d0460, 0x008d0480 }, + { 0x00600042, 0x29604629, 0x008d0480, 0x008d04a0 }, + { 0x00600042, 0x29704629, 0x008d04a0, 0x008d04c0 }, + { 0x00600042, 0x29804629, 0x008d04c0, 0x008d04e0 }, + { 0x00600042, 0x29904629, 0x008d04e0, 0x008d0500 }, + { 0x00600042, 0x29a04629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29b04629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29c04629, 0x008d0580, 0x008d05a0 }, + { 0x00600042, 0x29d04629, 0x008d05a0, 0x008d05c0 }, + { 0x00600042, 0x29e04629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x29f04629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x2a004629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x2a104629, 0x008d0620, 0x008d0640 }, + { 0x00600042, 0x2a204629, 0x008d0640, 0x008d0660 }, + { 0x00600042, 0x2a304629, 0x008d0660, 0x008d0680 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x24801d29, 0x408d0400, 0x0248a005 }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a006 }, + { 0x00800001, 0x29400229, 0x00ad0480, 0x00000000 }, + { 0x00800001, 0x29600229, 0x00ad04a0, 0x00000000 }, + { 0x00800001, 0x29800229, 0x00ad04c0, 0x00000000 }, + { 0x00800001, 0x29a00229, 0x00ad04e0, 0x00000000 }, + { 0x00800001, 0x29c00229, 0x00ad0500, 0x00000000 }, + { 0x00800001, 0x29e00229, 0x00ad0520, 0x00000000 }, + { 0x00800001, 0x2a000229, 0x00ad0540, 0x00000000 }, + { 0x00800001, 0x2a200229, 0x00ad0560, 0x00000000 }, + { 0x00800001, 0x2d800231, 0x00b20940, 0x00000000 }, + { 0x00800001, 0x2d900231, 0x00b20960, 0x00000000 }, + { 0x00800001, 0x2da00231, 0x00b20980, 0x00000000 }, + { 0x00800001, 0x2db00231, 0x00b209a0, 0x00000000 }, + { 0x00800001, 0x2dc00231, 0x00b209c0, 0x00000000 }, + { 0x00800001, 0x2dd00231, 0x00b209e0, 0x00000000 }, + { 0x00800001, 0x2de00231, 0x00b20a00, 0x00000000 }, + { 0x00800001, 0x2df00231, 0x00b20a20, 0x00000000 }, + { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00020002 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x01000005, 0x20000d3c, 0x00210a54, 0x00000002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000009c }, + { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000080 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24401d29, 0x408d0400, 0x0288a008 }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0288a009 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25401d29, 0x408d0400, 0x0218a008 }, + { 0x00800031, 0x26801d29, 0x408d0400, 0x0218a009 }, + { 0x00600040, 0x29404629, 0x008d0440, 0x008d0441 }, + { 0x00600040, 0x29504629, 0x008d0460, 0x008d0461 }, + { 0x00600040, 0x29604629, 0x008d0480, 0x008d0481 }, + { 0x00600040, 0x29704629, 0x008d04a0, 0x008d04a1 }, + { 0x00600040, 0x29804629, 0x008d04c0, 0x008d04c1 }, + { 0x00600040, 0x29904629, 0x008d04e0, 0x008d04e1 }, + { 0x00600040, 0x29a04629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29b04629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0460 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0480 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a0 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c0 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e0 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0500 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0520 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0540 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0461 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0481 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a1 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c1 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e1 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0501 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0521 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0541 }, + { 0x00600040, 0x29c04629, 0x008d0580, 0x008d0581 }, + { 0x00600040, 0x29d04629, 0x008d05a0, 0x008d05a1 }, + { 0x00600040, 0x29e04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x29f04629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x2a004629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x2a104629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x2a204629, 0x008d0640, 0x008d0641 }, + { 0x00600040, 0x2a304629, 0x008d0660, 0x008d0661 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a0 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c0 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e0 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0600 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0620 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0640 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0660 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0680 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a1 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c1 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e1 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0601 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0621 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0641 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0661 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0681 }, + { 0x00800008, 0x29402d29, 0x00b10940, 0x00020002 }, + { 0x00800008, 0x29602d29, 0x00b10960, 0x00020002 }, + { 0x00800008, 0x29802d29, 0x00b10980, 0x00020002 }, + { 0x00800008, 0x29a02d29, 0x00b109a0, 0x00020002 }, + { 0x00800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, + { 0x00800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, + { 0x00800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, + { 0x00800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x24401d29, 0x408d0400, 0x0248a008 }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a009 }, + { 0x00800042, 0x29404629, 0x00ad0440, 0x00ad0441 }, + { 0x00800042, 0x29604629, 0x00ad0460, 0x00ad0461 }, + { 0x00800042, 0x29804629, 0x00ad0480, 0x00ad0481 }, + { 0x00800042, 0x29a04629, 0x00ad04a0, 0x00ad04a1 }, + { 0x00800042, 0x29c04629, 0x00ad0580, 0x00ad0581 }, + { 0x00800042, 0x29e04629, 0x00ad05a0, 0x00ad05a1 }, + { 0x00800042, 0x2a004629, 0x00ad05c0, 0x00ad05c1 }, + { 0x00800042, 0x2a204629, 0x00ad05e0, 0x00ad05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, + { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000030 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24401d29, 0x408d0400, 0x0288a008 }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0288a009 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25401d29, 0x408d0400, 0x0218a008 }, + { 0x00800031, 0x26801d29, 0x408d0400, 0x0218a009 }, + { 0x00600042, 0x29404629, 0x008d0440, 0x008d0460 }, + { 0x00600042, 0x29504629, 0x008d0460, 0x008d0480 }, + { 0x00600042, 0x29604629, 0x008d0480, 0x008d04a0 }, + { 0x00600042, 0x29704629, 0x008d04a0, 0x008d04c0 }, + { 0x00600042, 0x29804629, 0x008d04c0, 0x008d04e0 }, + { 0x00600042, 0x29904629, 0x008d04e0, 0x008d0500 }, + { 0x00600042, 0x29a04629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29b04629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29c04629, 0x008d0580, 0x008d05a0 }, + { 0x00600042, 0x29d04629, 0x008d05a0, 0x008d05c0 }, + { 0x00600042, 0x29e04629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x29f04629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x2a004629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x2a104629, 0x008d0620, 0x008d0640 }, + { 0x00600042, 0x2a204629, 0x008d0640, 0x008d0660 }, + { 0x00600042, 0x2a304629, 0x008d0660, 0x008d0680 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x24801d29, 0x408d0400, 0x0248a008 }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a009 }, + { 0x00800001, 0x29400229, 0x00ad0480, 0x00000000 }, + { 0x00800001, 0x29600229, 0x00ad04a0, 0x00000000 }, + { 0x00800001, 0x29800229, 0x00ad04c0, 0x00000000 }, + { 0x00800001, 0x29a00229, 0x00ad04e0, 0x00000000 }, + { 0x00800001, 0x29c00229, 0x00ad0500, 0x00000000 }, + { 0x00800001, 0x29e00229, 0x00ad0520, 0x00000000 }, + { 0x00800001, 0x2a000229, 0x00ad0540, 0x00000000 }, + { 0x00800001, 0x2a200229, 0x00ad0560, 0x00000000 }, + { 0x80800042, 0x29404529, 0x00b10940, 0x00b10d80 }, + { 0x80800042, 0x29604529, 0x00b10960, 0x00b10d90 }, + { 0x80800042, 0x29804529, 0x00b10980, 0x00b10da0 }, + { 0x80800042, 0x29a04529, 0x00b109a0, 0x00b10db0 }, + { 0x80800042, 0x29c04529, 0x00b109c0, 0x00b10dc0 }, + { 0x80800042, 0x29e04529, 0x00b109e0, 0x00b10dd0 }, + { 0x80800042, 0x2a004529, 0x00b10a00, 0x00b10de0 }, + { 0x80800042, 0x2a204529, 0x00b10a20, 0x00b10df0 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10a80, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10aa0, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10ac0, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10ae0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10b00, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10b20, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10b40, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10b60, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10b80, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10ba0, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10bc0, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10be0, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c00, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10c20, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10b60, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10a80, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10b80, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10aa0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10ba0, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10ac0, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10bc0, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10ae0, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10be0, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10b00, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10c00, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10b20, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c20, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10b40, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, + { 0x80800001, 0x474001b1, 0x00b10740, 0x00000000 }, + { 0x80800001, 0x476001b1, 0x00b10760, 0x00000000 }, + { 0x80800001, 0x478001b1, 0x00b10780, 0x00000000 }, + { 0x80800001, 0x47a001b1, 0x00b107a0, 0x00000000 }, + { 0x80800001, 0x47c001b1, 0x00b107c0, 0x00000000 }, + { 0x80800001, 0x47e001b1, 0x00b107e0, 0x00000000 }, + { 0x80800001, 0x480001b1, 0x00b10800, 0x00000000 }, + { 0x80800001, 0x482001b1, 0x00b10820, 0x00000000 }, + { 0x80800001, 0x484001b1, 0x00b10840, 0x00000000 }, + { 0x80800001, 0x486001b1, 0x00b10860, 0x00000000 }, + { 0x80800001, 0x488001b1, 0x00b10880, 0x00000000 }, + { 0x80800001, 0x48a001b1, 0x00b108a0, 0x00000000 }, + { 0x80800001, 0x48c001b1, 0x00b108c0, 0x00000000 }, + { 0x80800001, 0x48e001b1, 0x00b108e0, 0x00000000 }, + { 0x80800001, 0x490001b1, 0x00b10900, 0x00000000 }, + { 0x80800001, 0x492001b1, 0x00b10920, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, + { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, + { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, + { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, + { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, + { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, + { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x12082000 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, + { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, + { 0x00800040, 0x294025ad, 0x00b10c60, 0x00b10940 }, + { 0x00800040, 0x296025ad, 0x00b10c80, 0x00b10960 }, + { 0x00800040, 0x298025ad, 0x00b10ca0, 0x00b10980 }, + { 0x00800040, 0x29a025ad, 0x00b10cc0, 0x00b109a0 }, + { 0x80800001, 0x494001b1, 0x00b10940, 0x00000000 }, + { 0x80800001, 0x496001b1, 0x00b10960, 0x00000000 }, + { 0x80800001, 0x498001b1, 0x00b10980, 0x00000000 }, + { 0x80800001, 0x49a001b1, 0x00b109a0, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082001 }, + { 0x00800040, 0x29c025a9, 0x00b10ce0, 0x00b109c0 }, + { 0x00800040, 0x29e025a9, 0x00b10d00, 0x00b109e0 }, + { 0x00800040, 0x2a0025a9, 0x00b10d20, 0x00b10a00 }, + { 0x00800040, 0x2a2025a9, 0x00b10d40, 0x00b10a20 }, + { 0x80800001, 0x49c001b1, 0x00b109c0, 0x00000000 }, + { 0x80800001, 0x49e001b1, 0x00b109e0, 0x00000000 }, + { 0x80800001, 0x4a0001b1, 0x00b10a00, 0x00000000 }, + { 0x80800001, 0x4a2001b1, 0x00b10a20, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082002 }, + { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, + { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, diff --git a/src/shaders/mpeg2/vld/frame_frame_pred_forward.g4a b/src/shaders/mpeg2/vld/frame_frame_pred_forward.g4a new file mode 100644 index 00000000..22f48041 --- /dev/null +++ b/src/shaders/mpeg2/vld/frame_frame_pred_forward.g4a @@ -0,0 +1,61 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g32: message descriptor for reading reference data + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data */ +mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; +mov (2) g31.0<1>UD g82.12<2,2,1>UW {align1}; +mov (1) g126.8<1>UD ip {align1}; +mov (1) ip g21.0<1,1,1>UD {align1}; + +//Y, (x', y') = (x, y) + (motion_vector.x >> 1, motion_vector.y >> 1) +asr (2) g31.14<1>W g82.16<2,2,1>W 1W {align1}; +add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +define(`input_surface', `4') +define(`mv1', `g82.16') +define(`mv2', `g82.18') +include(`motion_frame_y.g4i') + +//UV, (x', y') = (x >> 1, y >> 1) + (motion_vector.x >> 2, motion_vector.y >> 2) +shr (2) g31.0<1>UD g31.0<2,2,1>UD 1UD {align1}; +asr (2) g31.14<1>W g82.16<2,2,1>W 2W {align1}; +add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; +define(`input_surface1', `5') +define(`input_surface2', `6') +include(`motion_frame_uv.g4i') + +include(`addidct.g4i') +send (16) 0 acc0<1>UW g0<8,8,1>UW + thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; diff --git a/src/shaders/mpeg2/vld/frame_frame_pred_forward.g4b b/src/shaders/mpeg2/vld/frame_frame_pred_forward.g4b new file mode 100644 index 00000000..4bf6c935 --- /dev/null +++ b/src/shaders/mpeg2/vld/frame_frame_pred_forward.g4b @@ -0,0 +1,369 @@ + { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, + { 0x00000001, 0x34000020, 0x002102a0, 0x00000000 }, + { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00010001 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x01000005, 0x20000d3c, 0x00210a50, 0x00000001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000005f }, + { 0x01000005, 0x20000d3c, 0x00210a52, 0x00000001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000048 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a004 }, + { 0x00800040, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x27604629, 0x00b104e0, 0x00b104e1 }, + { 0x00800040, 0x27804629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x27a04629, 0x00b10520, 0x00b10521 }, + { 0x00800040, 0x27c04629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x27e04629, 0x00b10560, 0x00b10561 }, + { 0x00800040, 0x28004629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x28204629, 0x00b105a0, 0x00b105a1 }, + { 0x00800040, 0x28404629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x28604629, 0x00b105e0, 0x00b105e1 }, + { 0x00800040, 0x28804629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x28a04629, 0x00b10620, 0x00b10621 }, + { 0x00800040, 0x28c04629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x28e04629, 0x00b10660, 0x00b10661 }, + { 0x00800040, 0x29004629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x29204629, 0x00b106a0, 0x00b106a1 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e0 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10500 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10520 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10540 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10560 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10580 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a0 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c0 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e0 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10600 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10620 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10640 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10660 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10680 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a0 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c0 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e1 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10501 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10521 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10541 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10561 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10581 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a1 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c1 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e1 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10601 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10621 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10641 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10661 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10681 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a1 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c1 }, + { 0x80800008, 0x27402d29, 0x00b10740, 0x00020002 }, + { 0x80800008, 0x27602d29, 0x00b10760, 0x00020002 }, + { 0x80800008, 0x27802d29, 0x00b10780, 0x00020002 }, + { 0x80800008, 0x27a02d29, 0x00b107a0, 0x00020002 }, + { 0x80800008, 0x27c02d29, 0x00b107c0, 0x00020002 }, + { 0x80800008, 0x27e02d29, 0x00b107e0, 0x00020002 }, + { 0x80800008, 0x28002d29, 0x00b10800, 0x00020002 }, + { 0x80800008, 0x28202d29, 0x00b10820, 0x00020002 }, + { 0x80800008, 0x28402d29, 0x00b10840, 0x00020002 }, + { 0x80800008, 0x28602d29, 0x00b10860, 0x00020002 }, + { 0x80800008, 0x28802d29, 0x00b10880, 0x00020002 }, + { 0x80800008, 0x28a02d29, 0x00b108a0, 0x00020002 }, + { 0x80800008, 0x28c02d29, 0x00b108c0, 0x00020002 }, + { 0x80800008, 0x28e02d29, 0x00b108e0, 0x00020002 }, + { 0x80800008, 0x29002d29, 0x00b10900, 0x00020002 }, + { 0x80800008, 0x29202d29, 0x00b10920, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000043 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, + { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x80800042, 0x27604629, 0x00b104e0, 0x00b104e1 }, + { 0x80800042, 0x27804629, 0x00b10500, 0x00b10501 }, + { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10521 }, + { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10541 }, + { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10561 }, + { 0x80800042, 0x28004629, 0x00b10580, 0x00b10581 }, + { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105a1 }, + { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105c1 }, + { 0x80800042, 0x28604629, 0x00b105e0, 0x00b105e1 }, + { 0x80800042, 0x28804629, 0x00b10600, 0x00b10601 }, + { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10621 }, + { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10641 }, + { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10661 }, + { 0x80800042, 0x29004629, 0x00b10680, 0x00b10681 }, + { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106a1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000002e }, + { 0x01000005, 0x20000d3c, 0x00210a52, 0x00000001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000018 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a004 }, + { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104e0 }, + { 0x80800042, 0x27604629, 0x00b104e0, 0x00b10500 }, + { 0x80800042, 0x27804629, 0x00b10500, 0x00b10520 }, + { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10540 }, + { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10560 }, + { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10580 }, + { 0x80800042, 0x28004629, 0x00b10580, 0x00b105a0 }, + { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105c0 }, + { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105e0 }, + { 0x80800042, 0x28604629, 0x00b105e0, 0x00b10600 }, + { 0x80800042, 0x28804629, 0x00b10600, 0x00b10620 }, + { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10640 }, + { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10660 }, + { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10680 }, + { 0x80800042, 0x29004629, 0x00b10680, 0x00b106a0 }, + { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106c0 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000014 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, + { 0x00800001, 0x27400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x27600229, 0x00b104e0, 0x00000000 }, + { 0x00800001, 0x27800229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x27a00229, 0x00b10520, 0x00000000 }, + { 0x00800001, 0x27c00229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x27e00229, 0x00b10560, 0x00000000 }, + { 0x00800001, 0x28000229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x28200229, 0x00b105a0, 0x00000000 }, + { 0x00800001, 0x28400229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x28600229, 0x00b105e0, 0x00000000 }, + { 0x00800001, 0x28800229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x28a00229, 0x00b10620, 0x00000000 }, + { 0x00800001, 0x28c00229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x28e00229, 0x00b10660, 0x00000000 }, + { 0x00800001, 0x29000229, 0x00b10680, 0x00000000 }, + { 0x00800001, 0x29200229, 0x00b106a0, 0x00000000 }, + { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00020002 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x01000005, 0x20000d3c, 0x00210a50, 0x00000002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000004e }, + { 0x01000005, 0x20000d3c, 0x00210a52, 0x00000002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000040 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24401d29, 0x008d0400, 0x0418a005 }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0418a006 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25401d29, 0x008d0400, 0x0411a005 }, + { 0x00800031, 0x26801d29, 0x008d0400, 0x0411a006 }, + { 0x00600040, 0x29404629, 0x008d0440, 0x008d0441 }, + { 0x00600040, 0x29504629, 0x008d0460, 0x008d0461 }, + { 0x00600040, 0x29604629, 0x008d0480, 0x008d0481 }, + { 0x00600040, 0x29704629, 0x008d04a0, 0x008d04a1 }, + { 0x00600040, 0x29804629, 0x008d04c0, 0x008d04c1 }, + { 0x00600040, 0x29904629, 0x008d04e0, 0x008d04e1 }, + { 0x00600040, 0x29a04629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29b04629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0460 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0480 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a0 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c0 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e0 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0500 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0520 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0540 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0461 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0481 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a1 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c1 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e1 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0501 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0521 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0541 }, + { 0x00600040, 0x29c04629, 0x008d0580, 0x008d0581 }, + { 0x00600040, 0x29d04629, 0x008d05a0, 0x008d05a1 }, + { 0x00600040, 0x29e04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x29f04629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x2a004629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x2a104629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x2a204629, 0x008d0640, 0x008d0641 }, + { 0x00600040, 0x2a304629, 0x008d0660, 0x008d0661 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a0 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c0 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e0 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0600 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0620 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0640 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0660 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0680 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a1 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c1 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e1 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0601 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0621 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0641 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0661 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0681 }, + { 0x00800008, 0x29402d29, 0x00b10940, 0x00020002 }, + { 0x00800008, 0x29602d29, 0x00b10960, 0x00020002 }, + { 0x00800008, 0x29802d29, 0x00b10980, 0x00020002 }, + { 0x00800008, 0x29a02d29, 0x00b109a0, 0x00020002 }, + { 0x00800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, + { 0x00800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, + { 0x00800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, + { 0x00800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x24401d29, 0x008d0400, 0x0414a005 }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a006 }, + { 0x00800042, 0x29404629, 0x00ad0440, 0x00ad0441 }, + { 0x00800042, 0x29604629, 0x00ad0460, 0x00ad0461 }, + { 0x00800042, 0x29804629, 0x00ad0480, 0x00ad0481 }, + { 0x00800042, 0x29a04629, 0x00ad04a0, 0x00ad04a1 }, + { 0x00800042, 0x29c04629, 0x00ad0580, 0x00ad0581 }, + { 0x00800042, 0x29e04629, 0x00ad05a0, 0x00ad05a1 }, + { 0x00800042, 0x2a004629, 0x00ad05c0, 0x00ad05c1 }, + { 0x00800042, 0x2a204629, 0x00ad05e0, 0x00ad05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000025 }, + { 0x01000005, 0x20000d3c, 0x00210a52, 0x00000002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000018 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24401d29, 0x008d0400, 0x0418a005 }, + { 0x00800031, 0x25801d29, 0x008d0400, 0x0418a006 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25401d29, 0x008d0400, 0x0411a005 }, + { 0x00800031, 0x26801d29, 0x008d0400, 0x0411a006 }, + { 0x00600042, 0x29404629, 0x008d0440, 0x008d0460 }, + { 0x00600042, 0x29504629, 0x008d0460, 0x008d0480 }, + { 0x00600042, 0x29604629, 0x008d0480, 0x008d04a0 }, + { 0x00600042, 0x29704629, 0x008d04a0, 0x008d04c0 }, + { 0x00600042, 0x29804629, 0x008d04c0, 0x008d04e0 }, + { 0x00600042, 0x29904629, 0x008d04e0, 0x008d0500 }, + { 0x00600042, 0x29a04629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29b04629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29c04629, 0x008d0580, 0x008d05a0 }, + { 0x00600042, 0x29d04629, 0x008d05a0, 0x008d05c0 }, + { 0x00600042, 0x29e04629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x29f04629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x2a004629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x2a104629, 0x008d0620, 0x008d0640 }, + { 0x00600042, 0x2a204629, 0x008d0640, 0x008d0660 }, + { 0x00600042, 0x2a304629, 0x008d0660, 0x008d0680 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000b }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x24801d29, 0x008d0400, 0x0414a005 }, + { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a006 }, + { 0x00800001, 0x29400229, 0x00ad0480, 0x00000000 }, + { 0x00800001, 0x29600229, 0x00ad04a0, 0x00000000 }, + { 0x00800001, 0x29800229, 0x00ad04c0, 0x00000000 }, + { 0x00800001, 0x29a00229, 0x00ad04e0, 0x00000000 }, + { 0x00800001, 0x29c00229, 0x00ad0500, 0x00000000 }, + { 0x00800001, 0x29e00229, 0x00ad0520, 0x00000000 }, + { 0x00800001, 0x2a000229, 0x00ad0540, 0x00000000 }, + { 0x00800001, 0x2a200229, 0x00ad0560, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10a80, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10aa0, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10ac0, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10ae0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10b00, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10b20, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10b40, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10b60, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10b80, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10ba0, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10bc0, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10be0, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c00, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10c20, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10b60, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10a80, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10b80, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10aa0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10ba0, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10ac0, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10bc0, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10ae0, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10be0, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10b00, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10c00, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10b20, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c20, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10b40, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, + { 0x80800001, 0x474001b1, 0x00b10740, 0x00000000 }, + { 0x80800001, 0x476001b1, 0x00b10760, 0x00000000 }, + { 0x80800001, 0x478001b1, 0x00b10780, 0x00000000 }, + { 0x80800001, 0x47a001b1, 0x00b107a0, 0x00000000 }, + { 0x80800001, 0x47c001b1, 0x00b107c0, 0x00000000 }, + { 0x80800001, 0x47e001b1, 0x00b107e0, 0x00000000 }, + { 0x80800001, 0x480001b1, 0x00b10800, 0x00000000 }, + { 0x80800001, 0x482001b1, 0x00b10820, 0x00000000 }, + { 0x80800001, 0x484001b1, 0x00b10840, 0x00000000 }, + { 0x80800001, 0x486001b1, 0x00b10860, 0x00000000 }, + { 0x80800001, 0x488001b1, 0x00b10880, 0x00000000 }, + { 0x80800001, 0x48a001b1, 0x00b108a0, 0x00000000 }, + { 0x80800001, 0x48c001b1, 0x00b108c0, 0x00000000 }, + { 0x80800001, 0x48e001b1, 0x00b108e0, 0x00000000 }, + { 0x80800001, 0x490001b1, 0x00b10900, 0x00000000 }, + { 0x80800001, 0x492001b1, 0x00b10920, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, + { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, + { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, + { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, + { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, + { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, + { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05902000 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, + { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, + { 0x00800040, 0x294025ad, 0x00b10c60, 0x00b10940 }, + { 0x00800040, 0x296025ad, 0x00b10c80, 0x00b10960 }, + { 0x00800040, 0x298025ad, 0x00b10ca0, 0x00b10980 }, + { 0x00800040, 0x29a025ad, 0x00b10cc0, 0x00b109a0 }, + { 0x80800001, 0x494001b1, 0x00b10940, 0x00000000 }, + { 0x80800001, 0x496001b1, 0x00b10960, 0x00000000 }, + { 0x80800001, 0x498001b1, 0x00b10980, 0x00000000 }, + { 0x80800001, 0x49a001b1, 0x00b109a0, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302001 }, + { 0x00800040, 0x29c025a9, 0x00b10ce0, 0x00b109c0 }, + { 0x00800040, 0x29e025a9, 0x00b10d00, 0x00b109e0 }, + { 0x00800040, 0x2a0025a9, 0x00b10d20, 0x00b10a00 }, + { 0x00800040, 0x2a2025a9, 0x00b10d40, 0x00b10a20 }, + { 0x80800001, 0x49c001b1, 0x00b109c0, 0x00000000 }, + { 0x80800001, 0x49e001b1, 0x00b109e0, 0x00000000 }, + { 0x80800001, 0x4a0001b1, 0x00b10a00, 0x00000000 }, + { 0x80800001, 0x4a2001b1, 0x00b10a20, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302002 }, + { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, + { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, diff --git a/src/shaders/mpeg2/vld/frame_frame_pred_forward.g4b.gen5 b/src/shaders/mpeg2/vld/frame_frame_pred_forward.g4b.gen5 new file mode 100644 index 00000000..9d894888 --- /dev/null +++ b/src/shaders/mpeg2/vld/frame_frame_pred_forward.g4b.gen5 @@ -0,0 +1,369 @@ + { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, + { 0x00000001, 0x34000020, 0x002102a0, 0x00000000 }, + { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00010001 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x01000005, 0x20000d3c, 0x00210a50, 0x00000001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000be }, + { 0x01000005, 0x20000d3c, 0x00210a52, 0x00000001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000090 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a004 }, + { 0x00800040, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x00800040, 0x27604629, 0x00b104e0, 0x00b104e1 }, + { 0x00800040, 0x27804629, 0x00b10500, 0x00b10501 }, + { 0x00800040, 0x27a04629, 0x00b10520, 0x00b10521 }, + { 0x00800040, 0x27c04629, 0x00b10540, 0x00b10541 }, + { 0x00800040, 0x27e04629, 0x00b10560, 0x00b10561 }, + { 0x00800040, 0x28004629, 0x00b10580, 0x00b10581 }, + { 0x00800040, 0x28204629, 0x00b105a0, 0x00b105a1 }, + { 0x00800040, 0x28404629, 0x00b105c0, 0x00b105c1 }, + { 0x00800040, 0x28604629, 0x00b105e0, 0x00b105e1 }, + { 0x00800040, 0x28804629, 0x00b10600, 0x00b10601 }, + { 0x00800040, 0x28a04629, 0x00b10620, 0x00b10621 }, + { 0x00800040, 0x28c04629, 0x00b10640, 0x00b10641 }, + { 0x00800040, 0x28e04629, 0x00b10660, 0x00b10661 }, + { 0x00800040, 0x29004629, 0x00b10680, 0x00b10681 }, + { 0x00800040, 0x29204629, 0x00b106a0, 0x00b106a1 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e0 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10500 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10520 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10540 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10560 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10580 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a0 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c0 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e0 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10600 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10620 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10640 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10660 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10680 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a0 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c0 }, + { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e1 }, + { 0x00800040, 0x27604529, 0x00b10760, 0x00b10501 }, + { 0x00800040, 0x27804529, 0x00b10780, 0x00b10521 }, + { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10541 }, + { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10561 }, + { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10581 }, + { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a1 }, + { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c1 }, + { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e1 }, + { 0x00800040, 0x28604529, 0x00b10860, 0x00b10601 }, + { 0x00800040, 0x28804529, 0x00b10880, 0x00b10621 }, + { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10641 }, + { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10661 }, + { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10681 }, + { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a1 }, + { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c1 }, + { 0x80800008, 0x27402d29, 0x00b10740, 0x00020002 }, + { 0x80800008, 0x27602d29, 0x00b10760, 0x00020002 }, + { 0x80800008, 0x27802d29, 0x00b10780, 0x00020002 }, + { 0x80800008, 0x27a02d29, 0x00b107a0, 0x00020002 }, + { 0x80800008, 0x27c02d29, 0x00b107c0, 0x00020002 }, + { 0x80800008, 0x27e02d29, 0x00b107e0, 0x00020002 }, + { 0x80800008, 0x28002d29, 0x00b10800, 0x00020002 }, + { 0x80800008, 0x28202d29, 0x00b10820, 0x00020002 }, + { 0x80800008, 0x28402d29, 0x00b10840, 0x00020002 }, + { 0x80800008, 0x28602d29, 0x00b10860, 0x00020002 }, + { 0x80800008, 0x28802d29, 0x00b10880, 0x00020002 }, + { 0x80800008, 0x28a02d29, 0x00b108a0, 0x00020002 }, + { 0x80800008, 0x28c02d29, 0x00b108c0, 0x00020002 }, + { 0x80800008, 0x28e02d29, 0x00b108e0, 0x00020002 }, + { 0x80800008, 0x29002d29, 0x00b10900, 0x00020002 }, + { 0x80800008, 0x29202d29, 0x00b10920, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000086 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, + { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104c1 }, + { 0x80800042, 0x27604629, 0x00b104e0, 0x00b104e1 }, + { 0x80800042, 0x27804629, 0x00b10500, 0x00b10501 }, + { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10521 }, + { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10541 }, + { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10561 }, + { 0x80800042, 0x28004629, 0x00b10580, 0x00b10581 }, + { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105a1 }, + { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105c1 }, + { 0x80800042, 0x28604629, 0x00b105e0, 0x00b105e1 }, + { 0x80800042, 0x28804629, 0x00b10600, 0x00b10601 }, + { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10621 }, + { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10641 }, + { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10661 }, + { 0x80800042, 0x29004629, 0x00b10680, 0x00b10681 }, + { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106a1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000005c }, + { 0x01000005, 0x20000d3c, 0x00210a52, 0x00000001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000030 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a004 }, + { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104e0 }, + { 0x80800042, 0x27604629, 0x00b104e0, 0x00b10500 }, + { 0x80800042, 0x27804629, 0x00b10500, 0x00b10520 }, + { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10540 }, + { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10560 }, + { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10580 }, + { 0x80800042, 0x28004629, 0x00b10580, 0x00b105a0 }, + { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105c0 }, + { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105e0 }, + { 0x80800042, 0x28604629, 0x00b105e0, 0x00b10600 }, + { 0x80800042, 0x28804629, 0x00b10600, 0x00b10620 }, + { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10640 }, + { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10660 }, + { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10680 }, + { 0x80800042, 0x29004629, 0x00b10680, 0x00b106a0 }, + { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106c0 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000028 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, + { 0x00800001, 0x27400229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x27600229, 0x00b104e0, 0x00000000 }, + { 0x00800001, 0x27800229, 0x00b10500, 0x00000000 }, + { 0x00800001, 0x27a00229, 0x00b10520, 0x00000000 }, + { 0x00800001, 0x27c00229, 0x00b10540, 0x00000000 }, + { 0x00800001, 0x27e00229, 0x00b10560, 0x00000000 }, + { 0x00800001, 0x28000229, 0x00b10580, 0x00000000 }, + { 0x00800001, 0x28200229, 0x00b105a0, 0x00000000 }, + { 0x00800001, 0x28400229, 0x00b105c0, 0x00000000 }, + { 0x00800001, 0x28600229, 0x00b105e0, 0x00000000 }, + { 0x00800001, 0x28800229, 0x00b10600, 0x00000000 }, + { 0x00800001, 0x28a00229, 0x00b10620, 0x00000000 }, + { 0x00800001, 0x28c00229, 0x00b10640, 0x00000000 }, + { 0x00800001, 0x28e00229, 0x00b10660, 0x00000000 }, + { 0x00800001, 0x29000229, 0x00b10680, 0x00000000 }, + { 0x00800001, 0x29200229, 0x00b106a0, 0x00000000 }, + { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, + { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00020002 }, + { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, + { 0x01000005, 0x20000d3c, 0x00210a50, 0x00000002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000009c }, + { 0x01000005, 0x20000d3c, 0x00210a52, 0x00000002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000080 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24401d29, 0x408d0400, 0x0288a005 }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0288a006 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25401d29, 0x408d0400, 0x0218a005 }, + { 0x00800031, 0x26801d29, 0x408d0400, 0x0218a006 }, + { 0x00600040, 0x29404629, 0x008d0440, 0x008d0441 }, + { 0x00600040, 0x29504629, 0x008d0460, 0x008d0461 }, + { 0x00600040, 0x29604629, 0x008d0480, 0x008d0481 }, + { 0x00600040, 0x29704629, 0x008d04a0, 0x008d04a1 }, + { 0x00600040, 0x29804629, 0x008d04c0, 0x008d04c1 }, + { 0x00600040, 0x29904629, 0x008d04e0, 0x008d04e1 }, + { 0x00600040, 0x29a04629, 0x008d0500, 0x008d0501 }, + { 0x00600040, 0x29b04629, 0x008d0520, 0x008d0521 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0460 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0480 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a0 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c0 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e0 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0500 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0520 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0540 }, + { 0x00600040, 0x29404529, 0x008d0940, 0x008d0461 }, + { 0x00600040, 0x29504529, 0x008d0950, 0x008d0481 }, + { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a1 }, + { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c1 }, + { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e1 }, + { 0x00600040, 0x29904529, 0x008d0990, 0x008d0501 }, + { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0521 }, + { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0541 }, + { 0x00600040, 0x29c04629, 0x008d0580, 0x008d0581 }, + { 0x00600040, 0x29d04629, 0x008d05a0, 0x008d05a1 }, + { 0x00600040, 0x29e04629, 0x008d05c0, 0x008d05c1 }, + { 0x00600040, 0x29f04629, 0x008d05e0, 0x008d05e1 }, + { 0x00600040, 0x2a004629, 0x008d0600, 0x008d0601 }, + { 0x00600040, 0x2a104629, 0x008d0620, 0x008d0621 }, + { 0x00600040, 0x2a204629, 0x008d0640, 0x008d0641 }, + { 0x00600040, 0x2a304629, 0x008d0660, 0x008d0661 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a0 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c0 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e0 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0600 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0620 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0640 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0660 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0680 }, + { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a1 }, + { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c1 }, + { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e1 }, + { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0601 }, + { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0621 }, + { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0641 }, + { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0661 }, + { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0681 }, + { 0x00800008, 0x29402d29, 0x00b10940, 0x00020002 }, + { 0x00800008, 0x29602d29, 0x00b10960, 0x00020002 }, + { 0x00800008, 0x29802d29, 0x00b10980, 0x00020002 }, + { 0x00800008, 0x29a02d29, 0x00b109a0, 0x00020002 }, + { 0x00800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, + { 0x00800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, + { 0x00800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, + { 0x00800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x24401d29, 0x408d0400, 0x0248a005 }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a006 }, + { 0x00800042, 0x29404629, 0x00ad0440, 0x00ad0441 }, + { 0x00800042, 0x29604629, 0x00ad0460, 0x00ad0461 }, + { 0x00800042, 0x29804629, 0x00ad0480, 0x00ad0481 }, + { 0x00800042, 0x29a04629, 0x00ad04a0, 0x00ad04a1 }, + { 0x00800042, 0x29c04629, 0x00ad0580, 0x00ad0581 }, + { 0x00800042, 0x29e04629, 0x00ad05a0, 0x00ad05a1 }, + { 0x00800042, 0x2a004629, 0x00ad05c0, 0x00ad05c1 }, + { 0x00800042, 0x2a204629, 0x00ad05e0, 0x00ad05e1 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, + { 0x01000005, 0x20000d3c, 0x00210a52, 0x00000002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000030 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, + { 0x00800031, 0x24401d29, 0x408d0400, 0x0288a005 }, + { 0x00800031, 0x25801d29, 0x408d0400, 0x0288a006 }, + { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, + { 0x00800031, 0x25401d29, 0x408d0400, 0x0218a005 }, + { 0x00800031, 0x26801d29, 0x408d0400, 0x0218a006 }, + { 0x00600042, 0x29404629, 0x008d0440, 0x008d0460 }, + { 0x00600042, 0x29504629, 0x008d0460, 0x008d0480 }, + { 0x00600042, 0x29604629, 0x008d0480, 0x008d04a0 }, + { 0x00600042, 0x29704629, 0x008d04a0, 0x008d04c0 }, + { 0x00600042, 0x29804629, 0x008d04c0, 0x008d04e0 }, + { 0x00600042, 0x29904629, 0x008d04e0, 0x008d0500 }, + { 0x00600042, 0x29a04629, 0x008d0500, 0x008d0520 }, + { 0x00600042, 0x29b04629, 0x008d0520, 0x008d0540 }, + { 0x00600042, 0x29c04629, 0x008d0580, 0x008d05a0 }, + { 0x00600042, 0x29d04629, 0x008d05a0, 0x008d05c0 }, + { 0x00600042, 0x29e04629, 0x008d05c0, 0x008d05e0 }, + { 0x00600042, 0x29f04629, 0x008d05e0, 0x008d0600 }, + { 0x00600042, 0x2a004629, 0x008d0600, 0x008d0620 }, + { 0x00600042, 0x2a104629, 0x008d0620, 0x008d0640 }, + { 0x00600042, 0x2a204629, 0x008d0640, 0x008d0660 }, + { 0x00600042, 0x2a304629, 0x008d0660, 0x008d0680 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, + { 0x00800031, 0x24801d29, 0x408d0400, 0x0248a005 }, + { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a006 }, + { 0x00800001, 0x29400229, 0x00ad0480, 0x00000000 }, + { 0x00800001, 0x29600229, 0x00ad04a0, 0x00000000 }, + { 0x00800001, 0x29800229, 0x00ad04c0, 0x00000000 }, + { 0x00800001, 0x29a00229, 0x00ad04e0, 0x00000000 }, + { 0x00800001, 0x29c00229, 0x00ad0500, 0x00000000 }, + { 0x00800001, 0x29e00229, 0x00ad0520, 0x00000000 }, + { 0x00800001, 0x2a000229, 0x00ad0540, 0x00000000 }, + { 0x00800001, 0x2a200229, 0x00ad0560, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10a80, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10aa0, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10ac0, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10ae0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10b00, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10b20, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10b40, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10b60, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10b80, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10ba0, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10bc0, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10be0, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c00, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10c20, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, + { 0x00800040, 0x276045ad, 0x00b10b60, 0x00b20760 }, + { 0x00800040, 0x278045ad, 0x00b10a80, 0x00b20780 }, + { 0x00800040, 0x27a045ad, 0x00b10b80, 0x00b207a0 }, + { 0x00800040, 0x27c045ad, 0x00b10aa0, 0x00b207c0 }, + { 0x00800040, 0x27e045ad, 0x00b10ba0, 0x00b207e0 }, + { 0x00800040, 0x280045ad, 0x00b10ac0, 0x00b20800 }, + { 0x00800040, 0x282045ad, 0x00b10bc0, 0x00b20820 }, + { 0x00800040, 0x284045ad, 0x00b10ae0, 0x00b20840 }, + { 0x00800040, 0x286045ad, 0x00b10be0, 0x00b20860 }, + { 0x00800040, 0x288045ad, 0x00b10b00, 0x00b20880 }, + { 0x00800040, 0x28a045ad, 0x00b10c00, 0x00b208a0 }, + { 0x00800040, 0x28c045ad, 0x00b10b20, 0x00b208c0 }, + { 0x00800040, 0x28e045ad, 0x00b10c20, 0x00b208e0 }, + { 0x00800040, 0x290045ad, 0x00b10b40, 0x00b20900 }, + { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, + { 0x80800001, 0x474001b1, 0x00b10740, 0x00000000 }, + { 0x80800001, 0x476001b1, 0x00b10760, 0x00000000 }, + { 0x80800001, 0x478001b1, 0x00b10780, 0x00000000 }, + { 0x80800001, 0x47a001b1, 0x00b107a0, 0x00000000 }, + { 0x80800001, 0x47c001b1, 0x00b107c0, 0x00000000 }, + { 0x80800001, 0x47e001b1, 0x00b107e0, 0x00000000 }, + { 0x80800001, 0x480001b1, 0x00b10800, 0x00000000 }, + { 0x80800001, 0x482001b1, 0x00b10820, 0x00000000 }, + { 0x80800001, 0x484001b1, 0x00b10840, 0x00000000 }, + { 0x80800001, 0x486001b1, 0x00b10860, 0x00000000 }, + { 0x80800001, 0x488001b1, 0x00b10880, 0x00000000 }, + { 0x80800001, 0x48a001b1, 0x00b108a0, 0x00000000 }, + { 0x80800001, 0x48c001b1, 0x00b108c0, 0x00000000 }, + { 0x80800001, 0x48e001b1, 0x00b108e0, 0x00000000 }, + { 0x80800001, 0x490001b1, 0x00b10900, 0x00000000 }, + { 0x80800001, 0x492001b1, 0x00b10920, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, + { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, + { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, + { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, + { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, + { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, + { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x12082000 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, + { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, + { 0x00800040, 0x294025ad, 0x00b10c60, 0x00b10940 }, + { 0x00800040, 0x296025ad, 0x00b10c80, 0x00b10960 }, + { 0x00800040, 0x298025ad, 0x00b10ca0, 0x00b10980 }, + { 0x00800040, 0x29a025ad, 0x00b10cc0, 0x00b109a0 }, + { 0x80800001, 0x494001b1, 0x00b10940, 0x00000000 }, + { 0x80800001, 0x496001b1, 0x00b10960, 0x00000000 }, + { 0x80800001, 0x498001b1, 0x00b10980, 0x00000000 }, + { 0x80800001, 0x49a001b1, 0x00b109a0, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082001 }, + { 0x00800040, 0x29c025a9, 0x00b10ce0, 0x00b109c0 }, + { 0x00800040, 0x29e025a9, 0x00b10d00, 0x00b109e0 }, + { 0x00800040, 0x2a0025a9, 0x00b10d20, 0x00b10a00 }, + { 0x00800040, 0x2a2025a9, 0x00b10d40, 0x00b10a20 }, + { 0x80800001, 0x49c001b1, 0x00b109c0, 0x00000000 }, + { 0x80800001, 0x49e001b1, 0x00b109e0, 0x00000000 }, + { 0x80800001, 0x4a0001b1, 0x00b10a00, 0x00000000 }, + { 0x80800001, 0x4a2001b1, 0x00b10a20, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082002 }, + { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, + { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, diff --git a/src/shaders/mpeg2/vld/frame_intra.g4a b/src/shaders/mpeg2/vld/frame_intra.g4a new file mode 100644 index 00000000..cf12a449 --- /dev/null +++ b/src/shaders/mpeg2/vld/frame_intra.g4a @@ -0,0 +1,211 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* + GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT tab + g31: read and write message descriptor + g32~g55:DCT data + g58~g81:reference data + g82: thread payload + g83~g106:IDCT data +*/ + +mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; +mov (2) g31.0<1>UD g82.12<2,2,1>UW {align1}; +//shl (1) g31.4<1>UD g31.4<1,1,1>UD 1UD {align1}; + +include(`iq_intra.g4i') + +//defined for idct +define(`ROW_SHIFT', `11UD') +define(`ROW_ADD', `0x400UD') +define(`COL_SHIFT', `20UD') +define(`COL_ADD', `0x80000UD') + +mov (1) a0.0<1>UD 0x06F006E0UD {align1}; //0x06F006E0UD+0x00200020UD=0x07100700UD (g56.0 and g56.16) + +//Y0 +mov (1) g125.0<1>UD ip {align1}; +jmpi IDCT_START; +add (8) g83.0<1>W g32.0<16,8,2>W 128UW {align1}; +add (8) g84.0<1>W g33.0<16,8,2>W 128UW {align1}; +add (8) g85.0<1>W g34.0<16,8,2>W 128UW {align1}; +add (8) g86.0<1>W g35.0<16,8,2>W 128UW {align1}; +add (8) g87.0<1>W g36.0<16,8,2>W 128UW {align1}; +add (8) g88.0<1>W g37.0<16,8,2>W 128UW {align1}; +add (8) g89.0<1>W g38.0<16,8,2>W 128UW {align1}; +add (8) g90.0<1>W g39.0<16,8,2>W 128UW {align1}; + +//Y1 +mov (1) g125.0<1>UD ip {align1}; +jmpi IDCT_START; +add (8) g83.16<1>W g32.0<16,8,2>W 128UW {align1}; +add (8) g84.16<1>W g33.0<16,8,2>W 128UW {align1}; +add (8) g85.16<1>W g34.0<16,8,2>W 128UW {align1}; +add (8) g86.16<1>W g35.0<16,8,2>W 128UW {align1}; +add (8) g87.16<1>W g36.0<16,8,2>W 128UW {align1}; +add (8) g88.16<1>W g37.0<16,8,2>W 128UW {align1}; +add (8) g89.16<1>W g38.0<16,8,2>W 128UW {align1}; +add (8) g90.16<1>W g39.0<16,8,2>W 128UW {align1}; + +//Y2 +mov (1) g125.0<1>UD ip {align1}; +jmpi IDCT_START; +add (8) g91.0<1>W g32.0<16,8,2>W 128UW {align1}; +add (8) g92.0<1>W g33.0<16,8,2>W 128UW {align1}; +add (8) g93.0<1>W g34.0<16,8,2>W 128UW {align1}; +add (8) g94.0<1>W g35.0<16,8,2>W 128UW {align1}; +add (8) g95.0<1>W g36.0<16,8,2>W 128UW {align1}; +add (8) g96.0<1>W g37.0<16,8,2>W 128UW {align1}; +add (8) g97.0<1>W g38.0<16,8,2>W 128UW {align1}; +add (8) g98.0<1>W g39.0<16,8,2>W 128UW {align1}; + +//Y3 +mov (1) g125.0<1>UD ip {align1}; +jmpi IDCT_START; +add (8) g91.16<1>W g32.0<16,8,2>W 128UW {align1}; +add (8) g92.16<1>W g33.0<16,8,2>W 128UW {align1}; +add (8) g93.16<1>W g34.0<16,8,2>W 128UW {align1}; +add (8) g94.16<1>W g35.0<16,8,2>W 128UW {align1}; +add (8) g95.16<1>W g36.0<16,8,2>W 128UW {align1}; +add (8) g96.16<1>W g37.0<16,8,2>W 128UW {align1}; +add (8) g97.16<1>W g38.0<16,8,2>W 128UW {align1}; +add (8) g98.16<1>W g39.0<16,8,2>W 128UW {align1}; + +//U +mov (1) g125.0<1>UD ip {align1}; +jmpi IDCT_START; +add (16) g99.0<1>W g32.0<16,8,2>W 128UW {align1}; +add (16) g100.0<1>W g34.0<16,8,2>W 128UW {align1}; +add (16) g101.0<1>W g36.0<16,8,2>W 128UW {align1}; +add (16) g102.0<1>W g38.0<16,8,2>W 128UW {align1}; + +//V +mov (1) g125.0<1>UD ip {align1}; +jmpi IDCT_START; +add (16) g103.0<1>W g32.0<16,8,2>W 128UW {align1}; +add (16) g104.0<1>W g34.0<16,8,2>W 128UW {align1}; +add (16) g105.0<1>W g36.0<16,8,2>W 128UW {align1}; +add (16) g106.0<1>W g38.0<16,8,2>W 128UW {align1}; + +//send msg +mov (1) g31.8<1>UD 0x00F000FUD {align1}; +mov.sat (16) g83.0<2>UB g83.0<16,16,1>W {align1}; +mov.sat (16) g84.0<2>UB g84.0<16,16,1>W {align1}; +mov.sat (16) g85.0<2>UB g85.0<16,16,1>W {align1}; +mov.sat (16) g86.0<2>UB g86.0<16,16,1>W {align1}; +mov.sat (16) g87.0<2>UB g87.0<16,16,1>W {align1}; +mov.sat (16) g88.0<2>UB g88.0<16,16,1>W {align1}; +mov.sat (16) g89.0<2>UB g89.0<16,16,1>W {align1}; +mov.sat (16) g90.0<2>UB g90.0<16,16,1>W {align1}; +mov.sat (16) g91.0<2>UB g91.0<16,16,1>W {align1}; +mov.sat (16) g92.0<2>UB g92.0<16,16,1>W {align1}; +mov.sat (16) g93.0<2>UB g93.0<16,16,1>W {align1}; +mov.sat (16) g94.0<2>UB g94.0<16,16,1>W {align1}; +mov.sat (16) g95.0<2>UB g95.0<16,16,1>W {align1}; +mov.sat (16) g96.0<2>UB g96.0<16,16,1>W {align1}; +mov.sat (16) g97.0<2>UB g97.0<16,16,1>W {align1}; +mov.sat (16) g98.0<2>UB g98.0<16,16,1>W {align1}; + +and.nz (1) null g82.2<1,1,1>UW 0x20UW{align1}; +(f0) jmpi field_dct; + +mov (16) m1.0<1>UB g83.0<16,16,2>UB {align1}; +mov (16) m1.16<1>UB g84.0<16,16,2>UB {align1}; +mov (16) m2.0<1>UB g85.0<16,16,2>UB {align1}; +mov (16) m2.16<1>UB g86.0<16,16,2>UB {align1}; +mov (16) m3.0<1>UB g87.0<16,16,2>UB {align1}; +mov (16) m3.16<1>UB g88.0<16,16,2>UB {align1}; +mov (16) m4.0<1>UB g89.0<16,16,2>UB {align1}; +mov (16) m4.16<1>UB g90.0<16,16,2>UB {align1}; +mov (16) m5.0<1>UB g91.0<16,16,2>UB {align1}; +mov (16) m5.16<1>UB g92.0<16,16,2>UB {align1}; +mov (16) m6.0<1>UB g93.0<16,16,2>UB {align1}; +mov (16) m6.16<1>UB g94.0<16,16,2>UB {align1}; +mov (16) m7.0<1>UB g95.0<16,16,2>UB {align1}; +mov (16) m7.16<1>UB g96.0<16,16,2>UB {align1}; +mov (16) m8.0<1>UB g97.0<16,16,2>UB {align1}; +mov (16) m8.16<1>UB g98.0<16,16,2>UB {align1}; +jmpi write_back; + +field_dct: +mov (16) m1.0<1>UB g83.0<16,16,2>UB {align1}; +mov (16) m1.16<1>UB g91.0<16,16,2>UB {align1}; +mov (16) m2.0<1>UB g84.0<16,16,2>UB {align1}; +mov (16) m2.16<1>UB g92.0<16,16,2>UB {align1}; +mov (16) m3.0<1>UB g85.0<16,16,2>UB {align1}; +mov (16) m3.16<1>UB g93.0<16,16,2>UB {align1}; +mov (16) m4.0<1>UB g86.0<16,16,2>UB {align1}; +mov (16) m4.16<1>UB g94.0<16,16,2>UB {align1}; +mov (16) m5.0<1>UB g87.0<16,16,2>UB {align1}; +mov (16) m5.16<1>UB g95.0<16,16,2>UB {align1}; +mov (16) m6.0<1>UB g88.0<16,16,2>UB {align1}; +mov (16) m6.16<1>UB g96.0<16,16,2>UB {align1}; +mov (16) m7.0<1>UB g89.0<16,16,2>UB {align1}; +mov (16) m7.16<1>UB g97.0<16,16,2>UB {align1}; +mov (16) m8.0<1>UB g90.0<16,16,2>UB {align1}; +mov (16) m8.16<1>UB g98.0<16,16,2>UB {align1}; + +write_back: +send (16) 0 acc0<1>UW g31<8,8,1>UW write(0,0,2,0) mlen 9 rlen 0 {align1}; + +//U +mov (1) g31.8<1>UD 0x0070007UD { align1 }; +shr (2) g31.0<1>UD g82.12<2,2,1>UW 1D {align1}; +mov.sat (16) g99.0<2>UB g99.0<16,16,1>W {align1}; +mov.sat (16) g100.0<2>UB g100.0<16,16,1>W {align1}; +mov.sat (16) g101.0<2>UB g101.0<16,16,1>W {align1}; +mov.sat (16) g102.0<2>UB g102.0<16,16,1>W {align1}; + +mov (16) m1.0<1>UB g99.0<16,16,2>UB {align1}; +mov (16) m1.16<1>UB g100.0<16,16,2>UB {align1}; +mov (16) m2.0<1>UB g101.0<16,16,2>UB {align1}; +mov (16) m2.16<1>UB g102.0<16,16,2>UB {align1}; +send (16) 0 acc0<1>UW g31<8,8,1>UW write(1, 0, 2, 0) mlen 3 rlen 0 { align1 }; + +//V +mov.sat (16) g103.0<2>UB g103.0<16,16,1>W {align1}; +mov.sat (16) g104.0<2>UB g104.0<16,16,1>W {align1}; +mov.sat (16) g105.0<2>UB g105.0<16,16,1>W {align1}; +mov.sat (16) g106.0<2>UB g106.0<16,16,1>W {align1}; + +mov (16) m1.0<1>UB g103.0<16,16,2>UB {align1}; +mov (16) m1.16<1>UB g104.0<16,16,2>UB {align1}; +mov (16) m2.0<1>UB g105.0<16,16,2>UB {align1}; +mov (16) m2.16<1>UB g106.0<16,16,2>UB {align1}; +send (16) 0 acc0<1>UW g31<8,8,1>UW write(2, 0, 2, 0) mlen 3 rlen 0 { align1 }; + +OUT: +send (16) 0 acc0<1>UW g0<8,8,1>UW + thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; + +include(`do_iq_intra.g4i') +include(`idct.g4i') diff --git a/src/shaders/mpeg2/vld/frame_intra.g4b b/src/shaders/mpeg2/vld/frame_intra.g4b new file mode 100644 index 00000000..4c1c8c44 --- /dev/null +++ b/src/shaders/mpeg2/vld/frame_intra.g4b @@ -0,0 +1,313 @@ + { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x00000005, 0x2da02d29, 0x00210a48, 0x001f001f }, + { 0x00000005, 0x2da42d29, 0x00210a48, 0x60006000 }, + { 0x00000008, 0x2da42d29, 0x00210da4, 0x000d000d }, + { 0x00000001, 0x2da60169, 0x00000000, 0x00080008 }, + { 0x00000008, 0x2da42529, 0x00210da6, 0x00210da4 }, + { 0x01000005, 0x20002d3c, 0x00210a48, 0x00200020 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000012 }, + { 0x05000010, 0x20002d3c, 0x00210da0, 0x00090009 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, + { 0x05000010, 0x20002d3c, 0x00210da0, 0x00110011 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x05000010, 0x20002d3c, 0x00210da0, 0x00190019 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, + { 0x00000040, 0x2da03d29, 0x00210da0, 0xffe7ffe7 }, + { 0x00000009, 0x2da02d29, 0x00210da0, 0x00030003 }, + { 0x00000040, 0x2da02d29, 0x00210da0, 0x00400040 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000009 }, + { 0x00000040, 0x2da03d29, 0x00210da0, 0xfff7fff7 }, + { 0x00000009, 0x2da02d29, 0x00210da0, 0x00010001 }, + { 0x00000040, 0x2da02d29, 0x00210da0, 0x000a000a }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000005 }, + { 0x00000040, 0x2da03d29, 0x00210da0, 0xffefffef }, + { 0x00000009, 0x2da02d29, 0x00210da0, 0x00020002 }, + { 0x00000040, 0x2da02d29, 0x00210da0, 0x001c001c }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000001 }, + { 0x00000009, 0x2da00d29, 0x00210da0, 0x00000001 }, + { 0x00000001, 0x2dc00129, 0x00210da0, 0x00000000 }, + { 0x00800001, 0x2e000229, 0x00b10020, 0x00000000 }, + { 0x00800001, 0x2e200229, 0x00b10030, 0x00000000 }, + { 0x00800001, 0x2e400229, 0x00b10040, 0x00000000 }, + { 0x00800001, 0x2e600229, 0x00b10050, 0x00000000 }, + { 0x00000001, 0x22000060, 0x00000000, 0x03f003e0 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000000a1 }, + { 0x00800001, 0x270001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x272001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x274001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x276001ad, 0x00ae0f40, 0x00000000 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000009b }, + { 0x00800001, 0x278001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x27a001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x27c001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x27e001ad, 0x00ae0f40, 0x00000000 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000095 }, + { 0x00800001, 0x280001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x282001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x284001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x286001ad, 0x00ae0f40, 0x00000000 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000008f }, + { 0x00800001, 0x288001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x28a001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x28c001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x28e001ad, 0x00ae0f40, 0x00000000 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000089 }, + { 0x00800001, 0x290001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x292001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x294001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x296001ad, 0x00ae0f40, 0x00000000 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000083 }, + { 0x00800001, 0x298001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x29a001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x29c001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x29e001ad, 0x00ae0f40, 0x00000000 }, + { 0x00000001, 0x22000060, 0x00000000, 0x06f006e0 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000008f }, + { 0x00600040, 0x2a602dad, 0x00ae0400, 0x00800080 }, + { 0x00600040, 0x2a802dad, 0x00ae0420, 0x00800080 }, + { 0x00600040, 0x2aa02dad, 0x00ae0440, 0x00800080 }, + { 0x00600040, 0x2ac02dad, 0x00ae0460, 0x00800080 }, + { 0x00600040, 0x2ae02dad, 0x00ae0480, 0x00800080 }, + { 0x00600040, 0x2b002dad, 0x00ae04a0, 0x00800080 }, + { 0x00600040, 0x2b202dad, 0x00ae04c0, 0x00800080 }, + { 0x00600040, 0x2b402dad, 0x00ae04e0, 0x00800080 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000085 }, + { 0x00600040, 0x2a702dad, 0x00ae0400, 0x00800080 }, + { 0x00600040, 0x2a902dad, 0x00ae0420, 0x00800080 }, + { 0x00600040, 0x2ab02dad, 0x00ae0440, 0x00800080 }, + { 0x00600040, 0x2ad02dad, 0x00ae0460, 0x00800080 }, + { 0x00600040, 0x2af02dad, 0x00ae0480, 0x00800080 }, + { 0x00600040, 0x2b102dad, 0x00ae04a0, 0x00800080 }, + { 0x00600040, 0x2b302dad, 0x00ae04c0, 0x00800080 }, + { 0x00600040, 0x2b502dad, 0x00ae04e0, 0x00800080 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000007b }, + { 0x00600040, 0x2b602dad, 0x00ae0400, 0x00800080 }, + { 0x00600040, 0x2b802dad, 0x00ae0420, 0x00800080 }, + { 0x00600040, 0x2ba02dad, 0x00ae0440, 0x00800080 }, + { 0x00600040, 0x2bc02dad, 0x00ae0460, 0x00800080 }, + { 0x00600040, 0x2be02dad, 0x00ae0480, 0x00800080 }, + { 0x00600040, 0x2c002dad, 0x00ae04a0, 0x00800080 }, + { 0x00600040, 0x2c202dad, 0x00ae04c0, 0x00800080 }, + { 0x00600040, 0x2c402dad, 0x00ae04e0, 0x00800080 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000071 }, + { 0x00600040, 0x2b702dad, 0x00ae0400, 0x00800080 }, + { 0x00600040, 0x2b902dad, 0x00ae0420, 0x00800080 }, + { 0x00600040, 0x2bb02dad, 0x00ae0440, 0x00800080 }, + { 0x00600040, 0x2bd02dad, 0x00ae0460, 0x00800080 }, + { 0x00600040, 0x2bf02dad, 0x00ae0480, 0x00800080 }, + { 0x00600040, 0x2c102dad, 0x00ae04a0, 0x00800080 }, + { 0x00600040, 0x2c302dad, 0x00ae04c0, 0x00800080 }, + { 0x00600040, 0x2c502dad, 0x00ae04e0, 0x00800080 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000067 }, + { 0x00800040, 0x2c602dad, 0x00ae0400, 0x00800080 }, + { 0x00800040, 0x2c802dad, 0x00ae0440, 0x00800080 }, + { 0x00800040, 0x2ca02dad, 0x00ae0480, 0x00800080 }, + { 0x00800040, 0x2cc02dad, 0x00ae04c0, 0x00800080 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000061 }, + { 0x00800040, 0x2ce02dad, 0x00ae0400, 0x00800080 }, + { 0x00800040, 0x2d002dad, 0x00ae0440, 0x00800080 }, + { 0x00800040, 0x2d202dad, 0x00ae0480, 0x00800080 }, + { 0x00800040, 0x2d402dad, 0x00ae04c0, 0x00800080 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, + { 0x80800001, 0x4a6001b1, 0x00b10a60, 0x00000000 }, + { 0x80800001, 0x4a8001b1, 0x00b10a80, 0x00000000 }, + { 0x80800001, 0x4aa001b1, 0x00b10aa0, 0x00000000 }, + { 0x80800001, 0x4ac001b1, 0x00b10ac0, 0x00000000 }, + { 0x80800001, 0x4ae001b1, 0x00b10ae0, 0x00000000 }, + { 0x80800001, 0x4b0001b1, 0x00b10b00, 0x00000000 }, + { 0x80800001, 0x4b2001b1, 0x00b10b20, 0x00000000 }, + { 0x80800001, 0x4b4001b1, 0x00b10b40, 0x00000000 }, + { 0x80800001, 0x4b6001b1, 0x00b10b60, 0x00000000 }, + { 0x80800001, 0x4b8001b1, 0x00b10b80, 0x00000000 }, + { 0x80800001, 0x4ba001b1, 0x00b10ba0, 0x00000000 }, + { 0x80800001, 0x4bc001b1, 0x00b10bc0, 0x00000000 }, + { 0x80800001, 0x4be001b1, 0x00b10be0, 0x00000000 }, + { 0x80800001, 0x4c0001b1, 0x00b10c00, 0x00000000 }, + { 0x80800001, 0x4c2001b1, 0x00b10c20, 0x00000000 }, + { 0x80800001, 0x4c4001b1, 0x00b10c40, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, + { 0x00800001, 0x20200232, 0x00b20a60, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20a80, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20aa0, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20ac0, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00b20ae0, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00b20b00, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00b20b20, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00b20b40, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00b20b60, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00b20b80, 0x00000000 }, + { 0x00800001, 0x20c00232, 0x00b20ba0, 0x00000000 }, + { 0x00800001, 0x20d00232, 0x00b20bc0, 0x00000000 }, + { 0x00800001, 0x20e00232, 0x00b20be0, 0x00000000 }, + { 0x00800001, 0x20f00232, 0x00b20c00, 0x00000000 }, + { 0x00800001, 0x21000232, 0x00b20c20, 0x00000000 }, + { 0x00800001, 0x21100232, 0x00b20c40, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00800001, 0x20200232, 0x00b20a60, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20b60, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20a80, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20b80, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00b20aa0, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00b20ba0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00b20ac0, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00b20bc0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00b20ae0, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00b20be0, 0x00000000 }, + { 0x00800001, 0x20c00232, 0x00b20b00, 0x00000000 }, + { 0x00800001, 0x20d00232, 0x00b20c00, 0x00000000 }, + { 0x00800001, 0x20e00232, 0x00b20b20, 0x00000000 }, + { 0x00800001, 0x20f00232, 0x00b20c20, 0x00000000 }, + { 0x00800001, 0x21000232, 0x00b20b40, 0x00000000 }, + { 0x00800001, 0x21100232, 0x00b20c40, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05902000 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, + { 0x00200008, 0x23e01d21, 0x00450a4c, 0x00000001 }, + { 0x80800001, 0x4c6001b1, 0x00b10c60, 0x00000000 }, + { 0x80800001, 0x4c8001b1, 0x00b10c80, 0x00000000 }, + { 0x80800001, 0x4ca001b1, 0x00b10ca0, 0x00000000 }, + { 0x80800001, 0x4cc001b1, 0x00b10cc0, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20c60, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20c80, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20ca0, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20cc0, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302001 }, + { 0x80800001, 0x4ce001b1, 0x00b10ce0, 0x00000000 }, + { 0x80800001, 0x4d0001b1, 0x00b10d00, 0x00000000 }, + { 0x80800001, 0x4d2001b1, 0x00b10d20, 0x00000000 }, + { 0x80800001, 0x4d4001b1, 0x00b10d40, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20ce0, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20d00, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20d20, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20d40, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302002 }, + { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00000001, 0x2de001ad, 0x00218000, 0x00000000 }, + { 0x00802041, 0x2e8025a5, 0x008d8000, 0x008d0e00 }, + { 0x00802041, 0x2e8024a5, 0x008d0e80, 0x008c0da0 }, + { 0x0080200c, 0x2e802ca5, 0x008d0e80, 0x00040004 }, + { 0x00000041, 0x2e8025a5, 0x00210de0, 0x00210da4 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802041, 0x2ec025a5, 0x008d8000, 0x008d0e20 }, + { 0x00802041, 0x2ec024a5, 0x008d0ec0, 0x008c0da0 }, + { 0x0080200c, 0x2ec02ca5, 0x008d0ec0, 0x00040004 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802041, 0x2f0025a5, 0x008d8000, 0x008d0e40 }, + { 0x00802041, 0x2f0024a5, 0x008d0f00, 0x008c0da0 }, + { 0x0080200c, 0x2f002ca5, 0x008d0f00, 0x00040004 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802041, 0x2f4025a5, 0x008d8000, 0x008d0e60 }, + { 0x00802041, 0x2f4024a5, 0x008d0f40, 0x008c0da0 }, + { 0x0080200c, 0x2f402ca5, 0x008d0f40, 0x00040004 }, + { 0x00000040, 0x34000c20, 0x00210fa0, 0x00000020 }, + { 0x00000001, 0x2fc00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, + { 0x00802040, 0x24000ca5, 0x008d0400, 0x00000400 }, + { 0x00802040, 0x24400ca5, 0x008d0440, 0x00000400 }, + { 0x00802040, 0x24800ca5, 0x008d0480, 0x00000400 }, + { 0x00802040, 0x24c00ca5, 0x008d04c0, 0x00000400 }, + { 0x00802008, 0x24000ca5, 0x008d0400, 0x0000000b }, + { 0x00802008, 0x24400ca5, 0x008d0440, 0x0000000b }, + { 0x00802008, 0x24800ca5, 0x008d0480, 0x0000000b }, + { 0x00802008, 0x24c00ca5, 0x008d04c0, 0x0000000b }, + { 0x00800001, 0x2dc001ad, 0x00ae0400, 0x00000000 }, + { 0x00800001, 0x2de001ad, 0x00ae0440, 0x00000000 }, + { 0x00800001, 0x2e0001ad, 0x00ae0480, 0x00000000 }, + { 0x00800001, 0x2e2001ad, 0x00ae04c0, 0x00000000 }, + { 0x00000001, 0x2a000001, 0x00210200, 0x00000000 }, + { 0x00000001, 0x22000060, 0x00000000, 0x0db00da0 }, + { 0x00000001, 0x2fc00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000a }, + { 0x00802040, 0x24000ca5, 0x008d0400, 0x00080000 }, + { 0x00802040, 0x24400ca5, 0x008d0440, 0x00080000 }, + { 0x00802040, 0x24800ca5, 0x008d0480, 0x00080000 }, + { 0x00802040, 0x24c00ca5, 0x008d04c0, 0x00080000 }, + { 0x00802008, 0x24000ca5, 0x008d0400, 0x00000014 }, + { 0x00802008, 0x24400ca5, 0x008d0440, 0x00000014 }, + { 0x00802008, 0x24800ca5, 0x008d0480, 0x00000014 }, + { 0x00802008, 0x24c00ca5, 0x008d04c0, 0x00000014 }, + { 0x00000001, 0x22000020, 0x00210a00, 0x00000000 }, + { 0x00000040, 0x34000c20, 0x00210fa0, 0x00000020 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, + { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, + { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, + { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, + { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, + { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, + { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, + { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, + { 0x00200040, 0x240014a5, 0x00800500, 0x00800510 }, + { 0x00200040, 0x242014a5, 0x00800540, 0x00800550 }, + { 0x00200040, 0x244014a5, 0x00800580, 0x00800590 }, + { 0x00200040, 0x246014a5, 0x008005c0, 0x008005d0 }, + { 0x00200040, 0x248014a5, 0x00800600, 0x00800610 }, + { 0x00200040, 0x24a014a5, 0x00800640, 0x00800650 }, + { 0x00200040, 0x24c014a5, 0x00800680, 0x00800690 }, + { 0x00200040, 0x24e014a5, 0x008006c0, 0x008006d0 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, + { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, + { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, + { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, + { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, + { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, + { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, + { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, + { 0x00200040, 0x240814a5, 0x00800500, 0x00800510 }, + { 0x00200040, 0x242814a5, 0x00800540, 0x00800550 }, + { 0x00200040, 0x244814a5, 0x00800580, 0x00800590 }, + { 0x00200040, 0x246814a5, 0x008005c0, 0x008005d0 }, + { 0x00200040, 0x248814a5, 0x00800600, 0x00800610 }, + { 0x00200040, 0x24a814a5, 0x00800640, 0x00800650 }, + { 0x00200040, 0x24c814a5, 0x00800680, 0x00800690 }, + { 0x00200040, 0x24e814a5, 0x008006c0, 0x008006d0 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, + { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, + { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, + { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, + { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, + { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, + { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, + { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, + { 0x00200040, 0x241014a5, 0x00800500, 0x00800510 }, + { 0x00200040, 0x243014a5, 0x00800540, 0x00800550 }, + { 0x00200040, 0x245014a5, 0x00800580, 0x00800590 }, + { 0x00200040, 0x247014a5, 0x008005c0, 0x008005d0 }, + { 0x00200040, 0x249014a5, 0x00800600, 0x00800610 }, + { 0x00200040, 0x24b014a5, 0x00800640, 0x00800650 }, + { 0x00200040, 0x24d014a5, 0x00800680, 0x00800690 }, + { 0x00200040, 0x24f014a5, 0x008006c0, 0x008006d0 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, + { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, + { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, + { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, + { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, + { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, + { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, + { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, + { 0x00200040, 0x241814a5, 0x00800500, 0x00800510 }, + { 0x00200040, 0x243814a5, 0x00800540, 0x00800550 }, + { 0x00200040, 0x245814a5, 0x00800580, 0x00800590 }, + { 0x00200040, 0x247814a5, 0x008005c0, 0x008005d0 }, + { 0x00200040, 0x249814a5, 0x00800600, 0x00800610 }, + { 0x00200040, 0x24b814a5, 0x00800640, 0x00800650 }, + { 0x00200040, 0x24d814a5, 0x00800680, 0x00800690 }, + { 0x00200040, 0x24f814a5, 0x008006c0, 0x008006d0 }, + { 0x00000040, 0x34000c20, 0x00210fc0, 0x00000020 }, diff --git a/src/shaders/mpeg2/vld/frame_intra.g4b.gen5 b/src/shaders/mpeg2/vld/frame_intra.g4b.gen5 new file mode 100644 index 00000000..957f6fc3 --- /dev/null +++ b/src/shaders/mpeg2/vld/frame_intra.g4b.gen5 @@ -0,0 +1,313 @@ + { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, + { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, + { 0x00000005, 0x2da02d29, 0x00210a48, 0x001f001f }, + { 0x00000005, 0x2da42d29, 0x00210a48, 0x60006000 }, + { 0x00000008, 0x2da42d29, 0x00210da4, 0x000d000d }, + { 0x00000001, 0x2da60169, 0x00000000, 0x00080008 }, + { 0x00000008, 0x2da42529, 0x00210da6, 0x00210da4 }, + { 0x01000005, 0x20002d3c, 0x00210a48, 0x00200020 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x05000010, 0x20002d3c, 0x00210da0, 0x00090009 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, + { 0x05000010, 0x20002d3c, 0x00210da0, 0x00110011 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000000c }, + { 0x05000010, 0x20002d3c, 0x00210da0, 0x00190019 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000040, 0x2da03d29, 0x00210da0, 0xffe7ffe7 }, + { 0x00000009, 0x2da02d29, 0x00210da0, 0x00030003 }, + { 0x00000040, 0x2da02d29, 0x00210da0, 0x00400040 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000012 }, + { 0x00000040, 0x2da03d29, 0x00210da0, 0xfff7fff7 }, + { 0x00000009, 0x2da02d29, 0x00210da0, 0x00010001 }, + { 0x00000040, 0x2da02d29, 0x00210da0, 0x000a000a }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000a }, + { 0x00000040, 0x2da03d29, 0x00210da0, 0xffefffef }, + { 0x00000009, 0x2da02d29, 0x00210da0, 0x00020002 }, + { 0x00000040, 0x2da02d29, 0x00210da0, 0x001c001c }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000002 }, + { 0x00000009, 0x2da00d29, 0x00210da0, 0x00000001 }, + { 0x00000001, 0x2dc00129, 0x00210da0, 0x00000000 }, + { 0x00800001, 0x2e000229, 0x00b10020, 0x00000000 }, + { 0x00800001, 0x2e200229, 0x00b10030, 0x00000000 }, + { 0x00800001, 0x2e400229, 0x00b10040, 0x00000000 }, + { 0x00800001, 0x2e600229, 0x00b10050, 0x00000000 }, + { 0x00000001, 0x22000060, 0x00000000, 0x03f003e0 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000142 }, + { 0x00800001, 0x270001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x272001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x274001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x276001ad, 0x00ae0f40, 0x00000000 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000136 }, + { 0x00800001, 0x278001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x27a001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x27c001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x27e001ad, 0x00ae0f40, 0x00000000 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000012a }, + { 0x00800001, 0x280001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x282001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x284001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x286001ad, 0x00ae0f40, 0x00000000 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000011e }, + { 0x00800001, 0x288001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x28a001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x28c001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x28e001ad, 0x00ae0f40, 0x00000000 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000112 }, + { 0x00800001, 0x290001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x292001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x294001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x296001ad, 0x00ae0f40, 0x00000000 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000106 }, + { 0x00800001, 0x298001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x29a001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x29c001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x29e001ad, 0x00ae0f40, 0x00000000 }, + { 0x00000001, 0x22000060, 0x00000000, 0x06f006e0 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000011e }, + { 0x00600040, 0x2a602dad, 0x00ae0400, 0x00800080 }, + { 0x00600040, 0x2a802dad, 0x00ae0420, 0x00800080 }, + { 0x00600040, 0x2aa02dad, 0x00ae0440, 0x00800080 }, + { 0x00600040, 0x2ac02dad, 0x00ae0460, 0x00800080 }, + { 0x00600040, 0x2ae02dad, 0x00ae0480, 0x00800080 }, + { 0x00600040, 0x2b002dad, 0x00ae04a0, 0x00800080 }, + { 0x00600040, 0x2b202dad, 0x00ae04c0, 0x00800080 }, + { 0x00600040, 0x2b402dad, 0x00ae04e0, 0x00800080 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000010a }, + { 0x00600040, 0x2a702dad, 0x00ae0400, 0x00800080 }, + { 0x00600040, 0x2a902dad, 0x00ae0420, 0x00800080 }, + { 0x00600040, 0x2ab02dad, 0x00ae0440, 0x00800080 }, + { 0x00600040, 0x2ad02dad, 0x00ae0460, 0x00800080 }, + { 0x00600040, 0x2af02dad, 0x00ae0480, 0x00800080 }, + { 0x00600040, 0x2b102dad, 0x00ae04a0, 0x00800080 }, + { 0x00600040, 0x2b302dad, 0x00ae04c0, 0x00800080 }, + { 0x00600040, 0x2b502dad, 0x00ae04e0, 0x00800080 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000000f6 }, + { 0x00600040, 0x2b602dad, 0x00ae0400, 0x00800080 }, + { 0x00600040, 0x2b802dad, 0x00ae0420, 0x00800080 }, + { 0x00600040, 0x2ba02dad, 0x00ae0440, 0x00800080 }, + { 0x00600040, 0x2bc02dad, 0x00ae0460, 0x00800080 }, + { 0x00600040, 0x2be02dad, 0x00ae0480, 0x00800080 }, + { 0x00600040, 0x2c002dad, 0x00ae04a0, 0x00800080 }, + { 0x00600040, 0x2c202dad, 0x00ae04c0, 0x00800080 }, + { 0x00600040, 0x2c402dad, 0x00ae04e0, 0x00800080 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000000e2 }, + { 0x00600040, 0x2b702dad, 0x00ae0400, 0x00800080 }, + { 0x00600040, 0x2b902dad, 0x00ae0420, 0x00800080 }, + { 0x00600040, 0x2bb02dad, 0x00ae0440, 0x00800080 }, + { 0x00600040, 0x2bd02dad, 0x00ae0460, 0x00800080 }, + { 0x00600040, 0x2bf02dad, 0x00ae0480, 0x00800080 }, + { 0x00600040, 0x2c102dad, 0x00ae04a0, 0x00800080 }, + { 0x00600040, 0x2c302dad, 0x00ae04c0, 0x00800080 }, + { 0x00600040, 0x2c502dad, 0x00ae04e0, 0x00800080 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000000ce }, + { 0x00800040, 0x2c602dad, 0x00ae0400, 0x00800080 }, + { 0x00800040, 0x2c802dad, 0x00ae0440, 0x00800080 }, + { 0x00800040, 0x2ca02dad, 0x00ae0480, 0x00800080 }, + { 0x00800040, 0x2cc02dad, 0x00ae04c0, 0x00800080 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000000c2 }, + { 0x00800040, 0x2ce02dad, 0x00ae0400, 0x00800080 }, + { 0x00800040, 0x2d002dad, 0x00ae0440, 0x00800080 }, + { 0x00800040, 0x2d202dad, 0x00ae0480, 0x00800080 }, + { 0x00800040, 0x2d402dad, 0x00ae04c0, 0x00800080 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, + { 0x80800001, 0x4a6001b1, 0x00b10a60, 0x00000000 }, + { 0x80800001, 0x4a8001b1, 0x00b10a80, 0x00000000 }, + { 0x80800001, 0x4aa001b1, 0x00b10aa0, 0x00000000 }, + { 0x80800001, 0x4ac001b1, 0x00b10ac0, 0x00000000 }, + { 0x80800001, 0x4ae001b1, 0x00b10ae0, 0x00000000 }, + { 0x80800001, 0x4b0001b1, 0x00b10b00, 0x00000000 }, + { 0x80800001, 0x4b2001b1, 0x00b10b20, 0x00000000 }, + { 0x80800001, 0x4b4001b1, 0x00b10b40, 0x00000000 }, + { 0x80800001, 0x4b6001b1, 0x00b10b60, 0x00000000 }, + { 0x80800001, 0x4b8001b1, 0x00b10b80, 0x00000000 }, + { 0x80800001, 0x4ba001b1, 0x00b10ba0, 0x00000000 }, + { 0x80800001, 0x4bc001b1, 0x00b10bc0, 0x00000000 }, + { 0x80800001, 0x4be001b1, 0x00b10be0, 0x00000000 }, + { 0x80800001, 0x4c0001b1, 0x00b10c00, 0x00000000 }, + { 0x80800001, 0x4c2001b1, 0x00b10c20, 0x00000000 }, + { 0x80800001, 0x4c4001b1, 0x00b10c40, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, + { 0x00800001, 0x20200232, 0x00b20a60, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20a80, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20aa0, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20ac0, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00b20ae0, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00b20b00, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00b20b20, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00b20b40, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00b20b60, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00b20b80, 0x00000000 }, + { 0x00800001, 0x20c00232, 0x00b20ba0, 0x00000000 }, + { 0x00800001, 0x20d00232, 0x00b20bc0, 0x00000000 }, + { 0x00800001, 0x20e00232, 0x00b20be0, 0x00000000 }, + { 0x00800001, 0x20f00232, 0x00b20c00, 0x00000000 }, + { 0x00800001, 0x21000232, 0x00b20c20, 0x00000000 }, + { 0x00800001, 0x21100232, 0x00b20c40, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x00800001, 0x20200232, 0x00b20a60, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20b60, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20a80, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20b80, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00b20aa0, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00b20ba0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00b20ac0, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00b20bc0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00b20ae0, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00b20be0, 0x00000000 }, + { 0x00800001, 0x20c00232, 0x00b20b00, 0x00000000 }, + { 0x00800001, 0x20d00232, 0x00b20c00, 0x00000000 }, + { 0x00800001, 0x20e00232, 0x00b20b20, 0x00000000 }, + { 0x00800001, 0x20f00232, 0x00b20c20, 0x00000000 }, + { 0x00800001, 0x21000232, 0x00b20b40, 0x00000000 }, + { 0x00800001, 0x21100232, 0x00b20c40, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x12082000 }, + { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, + { 0x00200008, 0x23e01d21, 0x00450a4c, 0x00000001 }, + { 0x80800001, 0x4c6001b1, 0x00b10c60, 0x00000000 }, + { 0x80800001, 0x4c8001b1, 0x00b10c80, 0x00000000 }, + { 0x80800001, 0x4ca001b1, 0x00b10ca0, 0x00000000 }, + { 0x80800001, 0x4cc001b1, 0x00b10cc0, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20c60, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20c80, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20ca0, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20cc0, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082001 }, + { 0x80800001, 0x4ce001b1, 0x00b10ce0, 0x00000000 }, + { 0x80800001, 0x4d0001b1, 0x00b10d00, 0x00000000 }, + { 0x80800001, 0x4d2001b1, 0x00b10d20, 0x00000000 }, + { 0x80800001, 0x4d4001b1, 0x00b10d40, 0x00000000 }, + { 0x00800001, 0x20200232, 0x00b20ce0, 0x00000000 }, + { 0x00800001, 0x20300232, 0x00b20d00, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00b20d20, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b20d40, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082002 }, + { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00000001, 0x2de001ad, 0x00218000, 0x00000000 }, + { 0x00802041, 0x2e8025a5, 0x008d8000, 0x008d0e00 }, + { 0x00802041, 0x2e8024a5, 0x008d0e80, 0x008c0da0 }, + { 0x0080200c, 0x2e802ca5, 0x008d0e80, 0x00040004 }, + { 0x00000041, 0x2e8025a5, 0x00210de0, 0x00210da4 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802041, 0x2ec025a5, 0x008d8000, 0x008d0e20 }, + { 0x00802041, 0x2ec024a5, 0x008d0ec0, 0x008c0da0 }, + { 0x0080200c, 0x2ec02ca5, 0x008d0ec0, 0x00040004 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802041, 0x2f0025a5, 0x008d8000, 0x008d0e40 }, + { 0x00802041, 0x2f0024a5, 0x008d0f00, 0x008c0da0 }, + { 0x0080200c, 0x2f002ca5, 0x008d0f00, 0x00040004 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802041, 0x2f4025a5, 0x008d8000, 0x008d0e60 }, + { 0x00802041, 0x2f4024a5, 0x008d0f40, 0x008c0da0 }, + { 0x0080200c, 0x2f402ca5, 0x008d0f40, 0x00040004 }, + { 0x00000040, 0x34000c20, 0x00210fa0, 0x00000020 }, + { 0x00000001, 0x2fc00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00802040, 0x24000ca5, 0x008d0400, 0x00000400 }, + { 0x00802040, 0x24400ca5, 0x008d0440, 0x00000400 }, + { 0x00802040, 0x24800ca5, 0x008d0480, 0x00000400 }, + { 0x00802040, 0x24c00ca5, 0x008d04c0, 0x00000400 }, + { 0x00802008, 0x24000ca5, 0x008d0400, 0x0000000b }, + { 0x00802008, 0x24400ca5, 0x008d0440, 0x0000000b }, + { 0x00802008, 0x24800ca5, 0x008d0480, 0x0000000b }, + { 0x00802008, 0x24c00ca5, 0x008d04c0, 0x0000000b }, + { 0x00800001, 0x2dc001ad, 0x00ae0400, 0x00000000 }, + { 0x00800001, 0x2de001ad, 0x00ae0440, 0x00000000 }, + { 0x00800001, 0x2e0001ad, 0x00ae0480, 0x00000000 }, + { 0x00800001, 0x2e2001ad, 0x00ae04c0, 0x00000000 }, + { 0x00000001, 0x2a000001, 0x00210200, 0x00000000 }, + { 0x00000001, 0x22000060, 0x00000000, 0x0db00da0 }, + { 0x00000001, 0x2fc00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000014 }, + { 0x00802040, 0x24000ca5, 0x008d0400, 0x00080000 }, + { 0x00802040, 0x24400ca5, 0x008d0440, 0x00080000 }, + { 0x00802040, 0x24800ca5, 0x008d0480, 0x00080000 }, + { 0x00802040, 0x24c00ca5, 0x008d04c0, 0x00080000 }, + { 0x00802008, 0x24000ca5, 0x008d0400, 0x00000014 }, + { 0x00802008, 0x24400ca5, 0x008d0440, 0x00000014 }, + { 0x00802008, 0x24800ca5, 0x008d0480, 0x00000014 }, + { 0x00802008, 0x24c00ca5, 0x008d04c0, 0x00000014 }, + { 0x00000001, 0x22000020, 0x00210a00, 0x00000000 }, + { 0x00000040, 0x34000c20, 0x00210fa0, 0x00000020 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, + { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, + { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, + { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, + { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, + { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, + { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, + { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, + { 0x00200040, 0x240014a5, 0x00800500, 0x00800510 }, + { 0x00200040, 0x242014a5, 0x00800540, 0x00800550 }, + { 0x00200040, 0x244014a5, 0x00800580, 0x00800590 }, + { 0x00200040, 0x246014a5, 0x008005c0, 0x008005d0 }, + { 0x00200040, 0x248014a5, 0x00800600, 0x00800610 }, + { 0x00200040, 0x24a014a5, 0x00800640, 0x00800650 }, + { 0x00200040, 0x24c014a5, 0x00800680, 0x00800690 }, + { 0x00200040, 0x24e014a5, 0x008006c0, 0x008006d0 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, + { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, + { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, + { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, + { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, + { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, + { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, + { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, + { 0x00200040, 0x240814a5, 0x00800500, 0x00800510 }, + { 0x00200040, 0x242814a5, 0x00800540, 0x00800550 }, + { 0x00200040, 0x244814a5, 0x00800580, 0x00800590 }, + { 0x00200040, 0x246814a5, 0x008005c0, 0x008005d0 }, + { 0x00200040, 0x248814a5, 0x00800600, 0x00800610 }, + { 0x00200040, 0x24a814a5, 0x00800640, 0x00800650 }, + { 0x00200040, 0x24c814a5, 0x00800680, 0x00800690 }, + { 0x00200040, 0x24e814a5, 0x008006c0, 0x008006d0 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, + { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, + { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, + { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, + { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, + { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, + { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, + { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, + { 0x00200040, 0x241014a5, 0x00800500, 0x00800510 }, + { 0x00200040, 0x243014a5, 0x00800540, 0x00800550 }, + { 0x00200040, 0x245014a5, 0x00800580, 0x00800590 }, + { 0x00200040, 0x247014a5, 0x008005c0, 0x008005d0 }, + { 0x00200040, 0x249014a5, 0x00800600, 0x00800610 }, + { 0x00200040, 0x24b014a5, 0x00800640, 0x00800650 }, + { 0x00200040, 0x24d014a5, 0x00800680, 0x00800690 }, + { 0x00200040, 0x24f014a5, 0x008006c0, 0x008006d0 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, + { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, + { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, + { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, + { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, + { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, + { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, + { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, + { 0x00200040, 0x241814a5, 0x00800500, 0x00800510 }, + { 0x00200040, 0x243814a5, 0x00800540, 0x00800550 }, + { 0x00200040, 0x245814a5, 0x00800580, 0x00800590 }, + { 0x00200040, 0x247814a5, 0x008005c0, 0x008005d0 }, + { 0x00200040, 0x249814a5, 0x00800600, 0x00800610 }, + { 0x00200040, 0x24b814a5, 0x00800640, 0x00800650 }, + { 0x00200040, 0x24d814a5, 0x00800680, 0x00800690 }, + { 0x00200040, 0x24f814a5, 0x008006c0, 0x008006d0 }, + { 0x00000040, 0x34000c20, 0x00210fc0, 0x00000020 }, diff --git a/src/shaders/mpeg2/vld/idct.g4i b/src/shaders/mpeg2/vld/idct.g4i new file mode 100644 index 00000000..c1747d18 --- /dev/null +++ b/src/shaders/mpeg2/vld/idct.g4i @@ -0,0 +1,147 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix in UB format + g3~g4:non intra IQ matrix in UB format + g5~g20:IDCT table + g56~g79:DCT data after IQ before idct + g83~g106: IDCT data after idct + g82: thread payload backup + g125: ip before idct +*/ +IDCT_START: +mov (1) g126.0<1>UD ip {align1}; +jmpi DO_IDCT; +add (16) g32<1>D g32<8,8,1>D ROW_ADD {compr}; +add (16) g34<1>D g34<8,8,1>D ROW_ADD {compr}; +add (16) g36<1>D g36<8,8,1>D ROW_ADD {compr}; +add (16) g38<1>D g38<8,8,1>D ROW_ADD {compr}; + +shr (16) g32<1>D g32<8,8,1>D ROW_SHIFT {compr}; +shr (16) g34<1>D g34<8,8,1>D ROW_SHIFT {compr}; +shr (16) g36<1>D g36<8,8,1>D ROW_SHIFT {compr}; +shr (16) g38<1>D g38<8,8,1>D ROW_SHIFT {compr}; + +mov (16) g110.0<1>W g32<16,8,2>W {align1}; +mov (16) g111.0<1>W g34<16,8,2>W {align1}; +mov (16) g112.0<1>W g36<16,8,2>W {align1}; +mov (16) g113.0<1>W g38<16,8,2>W {align1}; + +mov (1) g80.0<1>UD a0.0<1,1,1>UD {align1}; //save a0 +mov (1) a0.0<1>UD 0x0DB00DA0UD {align1}; //begin at g110.0, the output of idct_row.g4i +mov (1) g126.0<1>UD ip {align1}; +jmpi DO_IDCT; + +add (16) g32<1>D g32<8,8,1>D COL_ADD {compr}; +add (16) g34<1>D g34<8,8,1>D COL_ADD {compr}; +add (16) g36<1>D g36<8,8,1>D COL_ADD {compr}; +add (16) g38<1>D g38<8,8,1>D COL_ADD {compr}; + +shr (16) g32<1>D g32<8,8,1>D COL_SHIFT {compr}; +shr (16) g34<1>D g34<8,8,1>D COL_SHIFT {compr}; +shr (16) g36<1>D g36<8,8,1>D COL_SHIFT {compr}; +shr (16) g38<1>D g38<8,8,1>D COL_SHIFT {compr}; + +mov (1) a0.0<1>UD g80.0<1,1,1>UD {align1}; //restore a0 +add (1) ip g125.0<1,1,1>UD 0x20UD {align1}; //jump back + +DO_IDCT: +add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1}; //increase the address +dp4 (16) g40<1>D g[a0.0]<8,8,1>W g5<8,8,1>D {align1 compr}; +dp4 (16) g42<1>D g[a0.0]<8,8,1>W g7<8,8,1>D {align1 compr}; +dp4 (16) g44<1>D g[a0.0]<8,8,1>W g9<8,8,1>D {align1 compr}; +dp4 (16) g46<1>D g[a0.0]<8,8,1>W g11<8,8,1>D {align1 compr}; +dp4 (16) g48<1>D g[a0.0]<8,8,1>W g13<8,8,1>D {align1 compr}; +dp4 (16) g50<1>D g[a0.0]<8,8,1>W g15<8,8,1>D {align1 compr}; +dp4 (16) g52<1>D g[a0.0]<8,8,1>W g17<8,8,1>D {align1 compr}; +dp4 (16) g54<1>D g[a0.0]<8,8,1>W g19<8,8,1>D {align1 compr}; +add (2) g32.0<1>D g40.0<8,1,8>D g40.16<8,1,8>D {align1}; +add (2) g33.0<1>D g42.0<8,1,8>D g42.16<8,1,8>D {align1}; +add (2) g34.0<1>D g44.0<8,1,8>D g44.16<8,1,8>D {align1}; +add (2) g35.0<1>D g46.0<8,1,8>D g46.16<8,1,8>D {align1}; +add (2) g36.0<1>D g48.0<8,1,8>D g48.16<8,1,8>D {align1}; +add (2) g37.0<1>D g50.0<8,1,8>D g50.16<8,1,8>D {align1}; +add (2) g38.0<1>D g52.0<8,1,8>D g52.16<8,1,8>D {align1}; +add (2) g39.0<1>D g54.0<8,1,8>D g54.16<8,1,8>D {align1}; + +add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1}; +dp4 (16) g40<1>D g[a0.0]<8,8,1>W g5<8,8,1>D {align1 compr}; +dp4 (16) g42<1>D g[a0.0]<8,8,1>W g7<8,8,1>D {align1 compr}; +dp4 (16) g44<1>D g[a0.0]<8,8,1>W g9<8,8,1>D {align1 compr}; +dp4 (16) g46<1>D g[a0.0]<8,8,1>W g11<8,8,1>D {align1 compr}; +dp4 (16) g48<1>D g[a0.0]<8,8,1>W g13<8,8,1>D {align1 compr}; +dp4 (16) g50<1>D g[a0.0]<8,8,1>W g15<8,8,1>D {align1 compr}; +dp4 (16) g52<1>D g[a0.0]<8,8,1>W g17<8,8,1>D {align1 compr}; +dp4 (16) g54<1>D g[a0.0]<8,8,1>W g19<8,8,1>D {align1 compr}; +add (2) g32.8<1>D g40.0<8,1,8>D g40.16<8,1,8>D {align1}; +add (2) g33.8<1>D g42.0<8,1,8>D g42.16<8,1,8>D {align1}; +add (2) g34.8<1>D g44.0<8,1,8>D g44.16<8,1,8>D {align1}; +add (2) g35.8<1>D g46.0<8,1,8>D g46.16<8,1,8>D {align1}; +add (2) g36.8<1>D g48.0<8,1,8>D g48.16<8,1,8>D {align1}; +add (2) g37.8<1>D g50.0<8,1,8>D g50.16<8,1,8>D {align1}; +add (2) g38.8<1>D g52.0<8,1,8>D g52.16<8,1,8>D {align1}; +add (2) g39.8<1>D g54.0<8,1,8>D g54.16<8,1,8>D {align1}; + +add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1}; +dp4 (16) g40<1>D g[a0.0]<8,8,1>W g5<8,8,1>D {align1 compr}; +dp4 (16) g42<1>D g[a0.0]<8,8,1>W g7<8,8,1>D {align1 compr}; +dp4 (16) g44<1>D g[a0.0]<8,8,1>W g9<8,8,1>D {align1 compr}; +dp4 (16) g46<1>D g[a0.0]<8,8,1>W g11<8,8,1>D {align1 compr}; +dp4 (16) g48<1>D g[a0.0]<8,8,1>W g13<8,8,1>D {align1 compr}; +dp4 (16) g50<1>D g[a0.0]<8,8,1>W g15<8,8,1>D {align1 compr}; +dp4 (16) g52<1>D g[a0.0]<8,8,1>W g17<8,8,1>D {align1 compr}; +dp4 (16) g54<1>D g[a0.0]<8,8,1>W g19<8,8,1>D {align1 compr}; +add (2) g32.16<1>D g40.0<8,1,8>D g40.16<8,1,8>D {align1}; +add (2) g33.16<1>D g42.0<8,1,8>D g42.16<8,1,8>D {align1}; +add (2) g34.16<1>D g44.0<8,1,8>D g44.16<8,1,8>D {align1}; +add (2) g35.16<1>D g46.0<8,1,8>D g46.16<8,1,8>D {align1}; +add (2) g36.16<1>D g48.0<8,1,8>D g48.16<8,1,8>D {align1}; +add (2) g37.16<1>D g50.0<8,1,8>D g50.16<8,1,8>D {align1}; +add (2) g38.16<1>D g52.0<8,1,8>D g52.16<8,1,8>D {align1}; +add (2) g39.16<1>D g54.0<8,1,8>D g54.16<8,1,8>D {align1}; + +add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1}; +dp4 (16) g40<1>D g[a0.0]<8,8,1>W g5<8,8,1>D {align1 compr}; +dp4 (16) g42<1>D g[a0.0]<8,8,1>W g7<8,8,1>D {align1 compr}; +dp4 (16) g44<1>D g[a0.0]<8,8,1>W g9<8,8,1>D {align1 compr}; +dp4 (16) g46<1>D g[a0.0]<8,8,1>W g11<8,8,1>D {align1 compr}; +dp4 (16) g48<1>D g[a0.0]<8,8,1>W g13<8,8,1>D {align1 compr}; +dp4 (16) g50<1>D g[a0.0]<8,8,1>W g15<8,8,1>D {align1 compr}; +dp4 (16) g52<1>D g[a0.0]<8,8,1>W g17<8,8,1>D {align1 compr}; +dp4 (16) g54<1>D g[a0.0]<8,8,1>W g19<8,8,1>D {align1 compr}; +add (2) g32.24<1>D g40.0<8,1,8>D g40.16<8,1,8>D {align1}; +add (2) g33.24<1>D g42.0<8,1,8>D g42.16<8,1,8>D {align1}; +add (2) g34.24<1>D g44.0<8,1,8>D g44.16<8,1,8>D {align1}; +add (2) g35.24<1>D g46.0<8,1,8>D g46.16<8,1,8>D {align1}; +add (2) g36.24<1>D g48.0<8,1,8>D g48.16<8,1,8>D {align1}; +add (2) g37.24<1>D g50.0<8,1,8>D g50.16<8,1,8>D {align1}; +add (2) g38.24<1>D g52.0<8,1,8>D g52.16<8,1,8>D {align1}; +add (2) g39.24<1>D g54.0<8,1,8>D g54.16<8,1,8>D {align1}; + +add (1) ip g126.0<1,1,1>UD 0x20UD {align1}; //jump back diff --git a/src/shaders/mpeg2/vld/iq_intra.g4i b/src/shaders/mpeg2/vld/iq_intra.g4i new file mode 100644 index 00000000..b0143613 --- /dev/null +++ b/src/shaders/mpeg2/vld/iq_intra.g4i @@ -0,0 +1,131 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix in UB format + g3~g4:non intra IQ matrix in UB format + g5~g20:IDCT table + g32~g55:DCT data before IQ + g56~g79:DCT data after IQ + g82: thread payload backup + g109: g109.0:q_scale_code, g109.4:intra_dc_mult, + g110: q_scale_code + g111: intra DC coefficient + g112~g115: intra IQ matrix in UW format (in order to use instruction compress), copys from g1~g2 + g125: ip before jump +*/ +and (1) g109.0<1>UW g82.8<1,1,1>UW 0x1fUW {align1}; //q_scale_code + +and (1) g109.4<1>UW g82.8<1,1,1>UW 0x6000UW {align1}; //intra_dc_presion +shr (1) g109.4<1>UW g109.4<1,1,1>UW 13UW {align1}; +mov (1) g109.6<1>UW 0x8UW {align1}; +shr (1) g109.4<1>UW g109.6<1,1,1>UW g109.4<1,1,1>UW {align1}; //intra_dc_mult + +and.z (1) null g82.8<1,1,1>UW 0x20UW {align1}; //if(q_scale_type==0) q_scale=q_scale_code*2; +(f0) jmpi Q_SCALE_TYPE_0; + +cmp.l (1) null g109.0<1,1,1>UW 9UW {align1}; //if(q_scale_type!=0) calculate q_scale +(f0) jmpi DO_IQ; +cmp.l (1) null g109.0<1,1,1>UW 17UW {align1}; +(f0) jmpi RANG_9_16; +cmp.l (1) null g109.0<1,1,1>UW 25UW {align1}; +(f0) jmpi RANG_17_24; + +RANG_25_31: +add (1) g109.0<1>UW g109.0<1,1,1>UW -25W {align1}; +shl (1) g109.0<1>UW g109.0<1,1,1>UW 3UW {align1}; +add (1) g109.0<1>UW g109.0<1,1,1>UW 64UW {align1}; +jmpi DO_IQ; + +RANG_9_16: +add (1) g109.0<1>UW g109.0<1,1,1>UW -9W {align1}; +shl (1) g109.0<1>UW g109.0<1,1,1>UW 1UW {align1}; +add (1) g109.0<1>UW g109.0<1,1,1>UW 10UW {align1}; +jmpi DO_IQ; + +RANG_17_24: +add (1) g109.0<1>UW g109.0<1,1,1>UW -17W {align1}; +shl (1) g109.0<1>UW g109.0<1,1,1>UW 2UW {align1}; +add (1) g109.0<1>UW g109.0<1,1,1>UW 28UW {align1}; +jmpi DO_IQ; + +Q_SCALE_TYPE_0: +shl (1) g109.0<1>UW g109.0<1,1,1>UW 1UD {align1}; + +DO_IQ: +mov (1) g110.0<1>UW g109.0<1,1,1>UW {align1}; + +mov (16) g112.0<1>UW g1.0<16,16,1>UB {align1}; +mov (16) g113.0<1>UW g1.16<16,16,1>UB {align1}; +mov (16) g114.0<1>UW g2.0<16,16,1>UB {align1}; +mov (16) g115.0<1>UW g2.16<16,16,1>UB {align1}; + +mov (1) a0.0<1>UD 0x03F003E0UD {align1}; + +mov (1) g125.0<1>UD ip {align1}; +jmpi DO_IQ_INTRA; +mov (16) g56.0<1>W g116.0<16,8,2>W {align1}; +mov (16) g57.0<1>W g118.0<16,8,2>W {align1}; +mov (16) g58.0<1>W g120.0<16,8,2>W {align1}; +mov (16) g59.0<1>W g122.0<16,8,2>W {align1}; + +mov (1) g125.0<1>UD ip {align1}; +jmpi DO_IQ_INTRA; +mov (16) g60.0<1>W g116.0<16,8,2>W {align1}; +mov (16) g61.0<1>W g118.0<16,8,2>W {align1}; +mov (16) g62.0<1>W g120.0<16,8,2>W {align1}; +mov (16) g63.0<1>W g122.0<16,8,2>W {align1}; + +mov (1) g125.0<1>UD ip {align1}; +jmpi DO_IQ_INTRA; +mov (16) g64.0<1>W g116.0<16,8,2>W {align1}; +mov (16) g65.0<1>W g118.0<16,8,2>W {align1}; +mov (16) g66.0<1>W g120.0<16,8,2>W {align1}; +mov (16) g67.0<1>W g122.0<16,8,2>W {align1}; + +mov (1) g125.0<1>UD ip {align1}; +jmpi DO_IQ_INTRA; +mov (16) g68.0<1>W g116.0<16,8,2>W {align1}; +mov (16) g69.0<1>W g118.0<16,8,2>W {align1}; +mov (16) g70.0<1>W g120.0<16,8,2>W {align1}; +mov (16) g71.0<1>W g122.0<16,8,2>W {align1}; + +mov (1) g125.0<1>UD ip {align1}; +jmpi DO_IQ_INTRA; +mov (16) g72.0<1>W g116.0<16,8,2>W {align1}; +mov (16) g73.0<1>W g118.0<16,8,2>W {align1}; +mov (16) g74.0<1>W g120.0<16,8,2>W {align1}; +mov (16) g75.0<1>W g122.0<16,8,2>W {align1}; + +mov (1) g125.0<1>UD ip {align1}; +jmpi DO_IQ_INTRA; +mov (16) g76.0<1>W g116.0<16,8,2>W {align1}; +mov (16) g77.0<1>W g118.0<16,8,2>W {align1}; +mov (16) g78.0<1>W g120.0<16,8,2>W {align1}; +mov (16) g79.0<1>W g122.0<16,8,2>W {align1}; + diff --git a/src/shaders/mpeg2/vld/iq_non_intra.g4i b/src/shaders/mpeg2/vld/iq_non_intra.g4i new file mode 100644 index 00000000..03c09aa0 --- /dev/null +++ b/src/shaders/mpeg2/vld/iq_non_intra.g4i @@ -0,0 +1,150 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix in UB format + g3~g4:non intra IQ matrix in UB format + g5~g20:IDCT table + g32~g55:DCT data before IQ + g56~g79:DCT data after IQ + g82: thread payload backup + g109: q_scale_code + g110: q_scale_code + g112~g115: non intra IQ matrix in UW format (in order to use instruction compress), copys from g3~g4 + g125: ip before jump +*/ +and (1) g109.0<1>UW g82.8<1,1,1>UW 0x1fUW {align1}; //q_scale_code + +and.z (1) null g82.8<1,1,1>UW 0x20UW {align1}; //if(q_scale_type==0) q_scale=q_scale_code*2; +(f0) jmpi Q_SCALE_TYPE_0; + +cmp.l (1) null g109.0<1,1,1>UW 9UW {align1}; //if(q_scale_type!=0) calculate q_scale +(f0) jmpi DO_IQ; +cmp.l (1) null g109.0<1,1,1>UW 17UW {align1}; +(f0) jmpi RANG_9_16; +cmp.l (1) null g109.0<1,1,1>UW 25UW {align1}; +(f0) jmpi RANG_17_24; + +RANG_25_31: +add (1) g109.0<1>UW g109.0<1,1,1>UW -25W {align1}; +shl (1) g109.0<1>UW g109.0<1,1,1>UW 3UW {align1}; +add (1) g109.0<1>UW g109.0<1,1,1>UW 64UW {align1}; +jmpi DO_IQ; + +RANG_9_16: +add (1) g109.0<1>UW g109.0<1,1,1>UW -9W {align1}; +shl (1) g109.0<1>UW g109.0<1,1,1>UW 1UW {align1}; +add (1) g109.0<1>UW g109.0<1,1,1>UW 10UW {align1}; +jmpi DO_IQ; + +RANG_17_24: +add (1) g109.0<1>UW g109.0<1,1,1>UW -17W {align1}; +shl (1) g109.0<1>UW g109.0<1,1,1>UW 2UW {align1}; +add (1) g109.0<1>UW g109.0<1,1,1>UW 28UW {align1}; +jmpi DO_IQ; + +Q_SCALE_TYPE_0: +shl (1) g109.0<1>UW g109.0<1,1,1>UW 1UD {align1}; + +DO_IQ: +mov (1) g110.0<1>UW g109.0<1,1,1>UW {align1}; + +mov (16) g112.0<1>UW g3.0<16,16,1>UB {align1}; +mov (16) g113.0<1>UW g3.16<16,16,1>UB {align1}; +mov (16) g114.0<1>UW g4.0<16,16,1>UB {align1}; +mov (16) g115.0<1>UW g4.16<16,16,1>UB {align1}; + +mov (1) a0.0<1>UD 0x03F003E0UD {align1}; + +//Y0 +iq_non_intra_y0: +and.z (1) null g82.8<1,1,1>UW 0x800UW {align1}; +(f0) jmpi iq_non_intra_y1; +mov (1) g125.0<1>UD ip {align1}; +jmpi DO_IQ_NON_INTRA; +mov (16) g56.0<1>W g116.0<16,8,2>W {align1}; +mov (16) g57.0<1>W g118.0<16,8,2>W {align1}; +mov (16) g58.0<1>W g120.0<16,8,2>W {align1}; +mov (16) g59.0<1>W g122.0<16,8,2>W {align1}; + +//Y1 +iq_non_intra_y1: +and.z (1) null g82.8<1,1,1>UW 0x400UW {align1}; +(f0) jmpi iq_non_intra_y2; +mov (1) g125.0<1>UD ip {align1}; +jmpi DO_IQ_NON_INTRA; +mov (16) g60.0<1>W g116.0<16,8,2>W {align1}; +mov (16) g61.0<1>W g118.0<16,8,2>W {align1}; +mov (16) g62.0<1>W g120.0<16,8,2>W {align1}; +mov (16) g63.0<1>W g122.0<16,8,2>W {align1}; + +//Y2 +iq_non_intra_y2: +and.z (1) null g82.8<1,1,1>UW 0x200UW {align1}; +(f0) jmpi iq_non_intra_y3; +mov (1) g125.0<1>UD ip {align1}; +jmpi DO_IQ_NON_INTRA; +mov (16) g64.0<1>W g116.0<16,8,2>W {align1}; +mov (16) g65.0<1>W g118.0<16,8,2>W {align1}; +mov (16) g66.0<1>W g120.0<16,8,2>W {align1}; +mov (16) g67.0<1>W g122.0<16,8,2>W {align1}; + +//Y3 +iq_non_intra_y3: +and.z (1) null g82.8<1,1,1>UW 0x100UW {align1}; +(f0) jmpi iq_non_intra_u; +mov (1) g125.0<1>UD ip {align1}; +jmpi DO_IQ_NON_INTRA; +mov (16) g68.0<1>W g116.0<16,8,2>W {align1}; +mov (16) g69.0<1>W g118.0<16,8,2>W {align1}; +mov (16) g70.0<1>W g120.0<16,8,2>W {align1}; +mov (16) g71.0<1>W g122.0<16,8,2>W {align1}; + +//U +iq_non_intra_u: +and.z (1) null g82.8<1,1,1>UW 0x80UW {align1}; +(f0) jmpi iq_non_intra_v; +mov (1) g125.0<1>UD ip {align1}; +jmpi DO_IQ_NON_INTRA; +mov (16) g72.0<1>W g116.0<16,8,2>W {align1}; +mov (16) g73.0<1>W g118.0<16,8,2>W {align1}; +mov (16) g74.0<1>W g120.0<16,8,2>W {align1}; +mov (16) g75.0<1>W g122.0<16,8,2>W {align1}; + +//V +iq_non_intra_v: +and.z (1) null g82.8<1,1,1>UW 0x40UW {align1}; +(f0) jmpi iq_non_intra_end; +mov (1) g125.0<1>UD ip {align1}; +jmpi DO_IQ_NON_INTRA; +mov (16) g76.0<1>W g116.0<16,8,2>W {align1}; +mov (16) g77.0<1>W g118.0<16,8,2>W {align1}; +mov (16) g78.0<1>W g120.0<16,8,2>W {align1}; +mov (16) g79.0<1>W g122.0<16,8,2>W {align1}; + +iq_non_intra_end: diff --git a/src/shaders/mpeg2/vld/lib.g4a b/src/shaders/mpeg2/vld/lib.g4a new file mode 100644 index 00000000..567caafe --- /dev/null +++ b/src/shaders/mpeg2/vld/lib.g4a @@ -0,0 +1,190 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix in UB format + g3~g4:non intra IQ matrix in UB format + g5~g20:IDCT table + g32~g55:DCT data before IQ + g56~g79:DCT data after IQ + g83~g106: IDCT data after idct + g82: thread payload backup + g125: ip before jump +*/ +include(`iq_non_intra.g4i') + +define(`ROW_SHIFT', `11UD') //define for idct +define(`ROW_ADD', `0x400UD') +define(`COL_SHIFT', `20UD') +define(`COL_ADD', `0x80000UD') + +mov (1) a0.0<1>UD 0x06F006E0UD {align1};//0x06F006E0UD+0x00200020UD=0x07100700UD (g56.0 and g56.16,the start of DCT data) + +//Y0 +and.nz (1) null g82.8<1,1,1>UW 0x800UW {align1}; +(f0) jmpi do_idct_y0; + +mov (8) g83.0<1>UW 0UW {align1}; +mov (8) g84.0<1>UW 0UW {align1}; +mov (8) g85.0<1>UW 0UW {align1}; +mov (8) g86.0<1>UW 0UW {align1}; +mov (8) g87.0<1>UW 0UW {align1}; +mov (8) g88.0<1>UW 0UW {align1}; +mov (8) g89.0<1>UW 0UW {align1}; +mov (8) g90.0<1>UW 0UW {align1}; +add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00800080UD {align1}; +jmpi block_y1; +do_idct_y0: +mov (1) g125.0<1>UD ip {align1}; +jmpi IDCT_START; +mov (8) g83.0<1>W g32.0<16,8,2>W {align1}; +mov (8) g84.0<1>W g33.0<16,8,2>W {align1}; +mov (8) g85.0<1>W g34.0<16,8,2>W {align1}; +mov (8) g86.0<1>W g35.0<16,8,2>W {align1}; +mov (8) g87.0<1>W g36.0<16,8,2>W {align1}; +mov (8) g88.0<1>W g37.0<16,8,2>W {align1}; +mov (8) g89.0<1>W g38.0<16,8,2>W {align1}; +mov (8) g90.0<1>W g39.0<16,8,2>W {align1}; + +//Y1 +block_y1: +and.nz (1) null g82.8<1,1,1>UW 0x400UW {align1}; +(f0) jmpi do_idct_y1; +mov (8) g83.16<1>UW 0UW {align1}; +mov (8) g84.16<1>UW 0UW {align1}; +mov (8) g85.16<1>UW 0UW {align1}; +mov (8) g86.16<1>UW 0UW {align1}; +mov (8) g87.16<1>UW 0UW {align1}; +mov (8) g88.16<1>UW 0UW {align1}; +mov (8) g89.16<1>UW 0UW {align1}; +mov (8) g90.16<1>UW 0UW {align1}; +add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00800080UD {align1}; +jmpi block_y2; +do_idct_y1: +mov (1) g125.0<1>UD ip {align1}; +jmpi IDCT_START; +mov (8) g83.16<1>W g32.0<16,8,2>W {align1}; +mov (8) g84.16<1>W g33.0<16,8,2>W {align1}; +mov (8) g85.16<1>W g34.0<16,8,2>W {align1}; +mov (8) g86.16<1>W g35.0<16,8,2>W {align1}; +mov (8) g87.16<1>W g36.0<16,8,2>W {align1}; +mov (8) g88.16<1>W g37.0<16,8,2>W {align1}; +mov (8) g89.16<1>W g38.0<16,8,2>W {align1}; +mov (8) g90.16<1>W g39.0<16,8,2>W {align1}; + +//Y2 +block_y2: +and.nz (1) null g82.8<1,1,1>UW 0x200UW {align1}; +(f0) jmpi do_idct_y2; +mov (8) g91.0<1>UW 0UW {align1}; +mov (8) g92.0<1>UW 0UW {align1}; +mov (8) g93.0<1>UW 0UW {align1}; +mov (8) g94.0<1>UW 0UW {align1}; +mov (8) g95.0<1>UW 0UW {align1}; +mov (8) g96.0<1>UW 0UW {align1}; +mov (8) g97.0<1>UW 0UW {align1}; +mov (8) g98.0<1>UW 0UW {align1}; +add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00800080UD {align1}; +jmpi block_y3; +do_idct_y2: +mov (1) g125.0<1>UD ip {align1}; +jmpi IDCT_START; +mov (8) g91.0<1>W g32.0<16,8,2>W {align1}; +mov (8) g92.0<1>W g33.0<16,8,2>W {align1}; +mov (8) g93.0<1>W g34.0<16,8,2>W {align1}; +mov (8) g94.0<1>W g35.0<16,8,2>W {align1}; +mov (8) g95.0<1>W g36.0<16,8,2>W {align1}; +mov (8) g96.0<1>W g37.0<16,8,2>W {align1}; +mov (8) g97.0<1>W g38.0<16,8,2>W {align1}; +mov (8) g98.0<1>W g39.0<16,8,2>W {align1}; + +//Y3 +block_y3: +and.nz (1) null g82.8<1,1,1>UW 0x100UW {align1}; +(f0) jmpi do_idct_y3; +mov (8) g91.16<1>UW 0UW {align1}; +mov (8) g92.16<1>UW 0UW {align1}; +mov (8) g93.16<1>UW 0UW {align1}; +mov (8) g94.16<1>UW 0UW {align1}; +mov (8) g95.16<1>UW 0UW {align1}; +mov (8) g96.16<1>UW 0UW {align1}; +mov (8) g97.16<1>UW 0UW {align1}; +mov (8) g98.16<1>UW 0UW {align1}; +add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00800080UD {align1}; +jmpi block_u; +do_idct_y3: +mov (1) g125.0<1>UD ip {align1}; +jmpi IDCT_START; +mov (8) g91.16<1>W g32.0<16,8,2>W {align1}; +mov (8) g92.16<1>W g33.0<16,8,2>W {align1}; +mov (8) g93.16<1>W g34.0<16,8,2>W {align1}; +mov (8) g94.16<1>W g35.0<16,8,2>W {align1}; +mov (8) g95.16<1>W g36.0<16,8,2>W {align1}; +mov (8) g96.16<1>W g37.0<16,8,2>W {align1}; +mov (8) g97.16<1>W g38.0<16,8,2>W {align1}; +mov (8) g98.16<1>W g39.0<16,8,2>W {align1}; + +//U +block_u: +and.nz (1) null g82.8<1,1,1>UW 0x80UW {align1}; +(f0) jmpi do_idct_u; +mov (16) g99.0<1>UW 0UW {align1}; +mov (16) g100.0<1>UW 0UW {align1}; +mov (16) g101.0<1>UW 0UW {align1}; +mov (16) g102.0<1>UW 0UW {align1}; +add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00800080UD {align1}; +jmpi block_v; +do_idct_u: +mov (1) g125.0<1>UD ip {align1}; +jmpi IDCT_START; +mov (16) g99.0<1>W g32.0<16,8,2>W {align1}; +mov (16) g100.0<1>W g34.0<16,8,2>W {align1}; +mov (16) g101.0<1>W g36.0<16,8,2>W {align1}; +mov (16) g102.0<1>W g38.0<16,8,2>W {align1}; + +//V +block_v: +and.nz (1) null g82.8<1,1,1>UW 0x40UW {align1}; +(f0) jmpi do_idct_v; +mov (16) g103.0<1>UW 0UW {align1}; +mov (16) g104.0<1>UW 0UW {align1}; +mov (16) g105.0<1>UW 0UW {align1}; +mov (16) g106.0<1>UW 0UW {align1}; +jmpi block_end; +do_idct_v: +mov (1) g125.0<1>UD ip {align1}; +jmpi IDCT_START; +mov (16) g103.0<1>W g32.0<16,8,2>W {align1}; +mov (16) g104.0<1>W g34.0<16,8,2>W {align1}; +mov (16) g105.0<1>W g36.0<16,8,2>W {align1}; +mov (16) g106.0<1>W g38.0<16,8,2>W {align1}; +block_end: + +add (1) ip g126.8<1,1,1>UD 0x20UD {align1}; //jump back +include(`do_iq_non_intra.g4i') +include(`idct.g4i') diff --git a/src/shaders/mpeg2/vld/lib.g4b b/src/shaders/mpeg2/vld/lib.g4b new file mode 100644 index 00000000..262bff90 --- /dev/null +++ b/src/shaders/mpeg2/vld/lib.g4b @@ -0,0 +1,307 @@ + { 0x00000005, 0x2da02d29, 0x00210a48, 0x001f001f }, + { 0x01000005, 0x20002d3c, 0x00210a48, 0x00200020 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000012 }, + { 0x05000010, 0x20002d3c, 0x00210da0, 0x00090009 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, + { 0x05000010, 0x20002d3c, 0x00210da0, 0x00110011 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x05000010, 0x20002d3c, 0x00210da0, 0x00190019 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, + { 0x00000040, 0x2da03d29, 0x00210da0, 0xffe7ffe7 }, + { 0x00000009, 0x2da02d29, 0x00210da0, 0x00030003 }, + { 0x00000040, 0x2da02d29, 0x00210da0, 0x00400040 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000009 }, + { 0x00000040, 0x2da03d29, 0x00210da0, 0xfff7fff7 }, + { 0x00000009, 0x2da02d29, 0x00210da0, 0x00010001 }, + { 0x00000040, 0x2da02d29, 0x00210da0, 0x000a000a }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000005 }, + { 0x00000040, 0x2da03d29, 0x00210da0, 0xffefffef }, + { 0x00000009, 0x2da02d29, 0x00210da0, 0x00020002 }, + { 0x00000040, 0x2da02d29, 0x00210da0, 0x001c001c }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000001 }, + { 0x00000009, 0x2da00d29, 0x00210da0, 0x00000001 }, + { 0x00000001, 0x2dc00129, 0x00210da0, 0x00000000 }, + { 0x00800001, 0x2e000229, 0x00b10060, 0x00000000 }, + { 0x00800001, 0x2e200229, 0x00b10070, 0x00000000 }, + { 0x00800001, 0x2e400229, 0x00b10080, 0x00000000 }, + { 0x00800001, 0x2e600229, 0x00b10090, 0x00000000 }, + { 0x00000001, 0x22000060, 0x00000000, 0x03f003e0 }, + { 0x01000005, 0x20002d3c, 0x00210a48, 0x08000800 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000000a1 }, + { 0x00800001, 0x270001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x272001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x274001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x276001ad, 0x00ae0f40, 0x00000000 }, + { 0x01000005, 0x20002d3c, 0x00210a48, 0x04000400 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000099 }, + { 0x00800001, 0x278001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x27a001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x27c001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x27e001ad, 0x00ae0f40, 0x00000000 }, + { 0x01000005, 0x20002d3c, 0x00210a48, 0x02000200 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000091 }, + { 0x00800001, 0x280001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x282001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x284001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x286001ad, 0x00ae0f40, 0x00000000 }, + { 0x01000005, 0x20002d3c, 0x00210a48, 0x01000100 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000089 }, + { 0x00800001, 0x288001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x28a001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x28c001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x28e001ad, 0x00ae0f40, 0x00000000 }, + { 0x01000005, 0x20002d3c, 0x00210a48, 0x00800080 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000081 }, + { 0x00800001, 0x290001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x292001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x294001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x296001ad, 0x00ae0f40, 0x00000000 }, + { 0x01000005, 0x20002d3c, 0x00210a48, 0x00400040 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000079 }, + { 0x00800001, 0x298001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x29a001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x29c001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x29e001ad, 0x00ae0f40, 0x00000000 }, + { 0x00000001, 0x22000060, 0x00000000, 0x06f006e0 }, + { 0x02000005, 0x20002d3c, 0x00210a48, 0x08000800 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000000a }, + { 0x00600001, 0x2a600169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2a800169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2aa00169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2ac00169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2ae00169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b000169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b200169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b400169, 0x00000000, 0x00000000 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00800080 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000a }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000077 }, + { 0x00600001, 0x2a6001ad, 0x00ae0400, 0x00000000 }, + { 0x00600001, 0x2a8001ad, 0x00ae0420, 0x00000000 }, + { 0x00600001, 0x2aa001ad, 0x00ae0440, 0x00000000 }, + { 0x00600001, 0x2ac001ad, 0x00ae0460, 0x00000000 }, + { 0x00600001, 0x2ae001ad, 0x00ae0480, 0x00000000 }, + { 0x00600001, 0x2b0001ad, 0x00ae04a0, 0x00000000 }, + { 0x00600001, 0x2b2001ad, 0x00ae04c0, 0x00000000 }, + { 0x00600001, 0x2b4001ad, 0x00ae04e0, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a48, 0x04000400 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000000a }, + { 0x00600001, 0x2a700169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2a900169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2ab00169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2ad00169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2af00169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b100169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b300169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b500169, 0x00000000, 0x00000000 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00800080 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000a }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000061 }, + { 0x00600001, 0x2a7001ad, 0x00ae0400, 0x00000000 }, + { 0x00600001, 0x2a9001ad, 0x00ae0420, 0x00000000 }, + { 0x00600001, 0x2ab001ad, 0x00ae0440, 0x00000000 }, + { 0x00600001, 0x2ad001ad, 0x00ae0460, 0x00000000 }, + { 0x00600001, 0x2af001ad, 0x00ae0480, 0x00000000 }, + { 0x00600001, 0x2b1001ad, 0x00ae04a0, 0x00000000 }, + { 0x00600001, 0x2b3001ad, 0x00ae04c0, 0x00000000 }, + { 0x00600001, 0x2b5001ad, 0x00ae04e0, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a48, 0x02000200 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000000a }, + { 0x00600001, 0x2b600169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b800169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2ba00169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2bc00169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2be00169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2c000169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2c200169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2c400169, 0x00000000, 0x00000000 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00800080 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000a }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000004b }, + { 0x00600001, 0x2b6001ad, 0x00ae0400, 0x00000000 }, + { 0x00600001, 0x2b8001ad, 0x00ae0420, 0x00000000 }, + { 0x00600001, 0x2ba001ad, 0x00ae0440, 0x00000000 }, + { 0x00600001, 0x2bc001ad, 0x00ae0460, 0x00000000 }, + { 0x00600001, 0x2be001ad, 0x00ae0480, 0x00000000 }, + { 0x00600001, 0x2c0001ad, 0x00ae04a0, 0x00000000 }, + { 0x00600001, 0x2c2001ad, 0x00ae04c0, 0x00000000 }, + { 0x00600001, 0x2c4001ad, 0x00ae04e0, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a48, 0x01000100 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000000a }, + { 0x00600001, 0x2b700169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b900169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2bb00169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2bd00169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2bf00169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2c100169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2c300169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2c500169, 0x00000000, 0x00000000 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00800080 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000a }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000035 }, + { 0x00600001, 0x2b7001ad, 0x00ae0400, 0x00000000 }, + { 0x00600001, 0x2b9001ad, 0x00ae0420, 0x00000000 }, + { 0x00600001, 0x2bb001ad, 0x00ae0440, 0x00000000 }, + { 0x00600001, 0x2bd001ad, 0x00ae0460, 0x00000000 }, + { 0x00600001, 0x2bf001ad, 0x00ae0480, 0x00000000 }, + { 0x00600001, 0x2c1001ad, 0x00ae04a0, 0x00000000 }, + { 0x00600001, 0x2c3001ad, 0x00ae04c0, 0x00000000 }, + { 0x00600001, 0x2c5001ad, 0x00ae04e0, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a48, 0x00800080 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00800001, 0x2c600169, 0x00000000, 0x00000000 }, + { 0x00800001, 0x2c800169, 0x00000000, 0x00000000 }, + { 0x00800001, 0x2ca00169, 0x00000000, 0x00000000 }, + { 0x00800001, 0x2cc00169, 0x00000000, 0x00000000 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00800080 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000023 }, + { 0x00800001, 0x2c6001ad, 0x00ae0400, 0x00000000 }, + { 0x00800001, 0x2c8001ad, 0x00ae0440, 0x00000000 }, + { 0x00800001, 0x2ca001ad, 0x00ae0480, 0x00000000 }, + { 0x00800001, 0x2cc001ad, 0x00ae04c0, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a48, 0x00400040 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000005 }, + { 0x00800001, 0x2ce00169, 0x00000000, 0x00000000 }, + { 0x00800001, 0x2d000169, 0x00000000, 0x00000000 }, + { 0x00800001, 0x2d200169, 0x00000000, 0x00000000 }, + { 0x00800001, 0x2d400169, 0x00000000, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00800001, 0x2ce001ad, 0x00ae0400, 0x00000000 }, + { 0x00800001, 0x2d0001ad, 0x00ae0440, 0x00000000 }, + { 0x00800001, 0x2d2001ad, 0x00ae0480, 0x00000000 }, + { 0x00800001, 0x2d4001ad, 0x00ae04c0, 0x00000000 }, + { 0x00000040, 0x34000c20, 0x00210fc8, 0x00000020 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802041, 0x2e8025a5, 0x008d8000, 0x008d0e00 }, + { 0x00802041, 0x2e8024a5, 0x008d0e80, 0x008c0da0 }, + { 0x0080200c, 0x2e802ca5, 0x008d0e80, 0x00040004 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802041, 0x2ec025a5, 0x008d8000, 0x008d0e20 }, + { 0x00802041, 0x2ec024a5, 0x008d0ec0, 0x008c0da0 }, + { 0x0080200c, 0x2ec02ca5, 0x008d0ec0, 0x00040004 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802041, 0x2f0025a5, 0x008d8000, 0x008d0e40 }, + { 0x00802041, 0x2f0024a5, 0x008d0f00, 0x008c0da0 }, + { 0x0080200c, 0x2f002ca5, 0x008d0f00, 0x00040004 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802041, 0x2f4025a5, 0x008d8000, 0x008d0e60 }, + { 0x00802041, 0x2f4024a5, 0x008d0f40, 0x008c0da0 }, + { 0x0080200c, 0x2f402ca5, 0x008d0f40, 0x00040004 }, + { 0x00000040, 0x34000c20, 0x00210fa0, 0x00000020 }, + { 0x00000001, 0x2fc00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, + { 0x00802040, 0x24000ca5, 0x008d0400, 0x00000400 }, + { 0x00802040, 0x24400ca5, 0x008d0440, 0x00000400 }, + { 0x00802040, 0x24800ca5, 0x008d0480, 0x00000400 }, + { 0x00802040, 0x24c00ca5, 0x008d04c0, 0x00000400 }, + { 0x00802008, 0x24000ca5, 0x008d0400, 0x0000000b }, + { 0x00802008, 0x24400ca5, 0x008d0440, 0x0000000b }, + { 0x00802008, 0x24800ca5, 0x008d0480, 0x0000000b }, + { 0x00802008, 0x24c00ca5, 0x008d04c0, 0x0000000b }, + { 0x00800001, 0x2dc001ad, 0x00ae0400, 0x00000000 }, + { 0x00800001, 0x2de001ad, 0x00ae0440, 0x00000000 }, + { 0x00800001, 0x2e0001ad, 0x00ae0480, 0x00000000 }, + { 0x00800001, 0x2e2001ad, 0x00ae04c0, 0x00000000 }, + { 0x00000001, 0x2a000001, 0x00210200, 0x00000000 }, + { 0x00000001, 0x22000060, 0x00000000, 0x0db00da0 }, + { 0x00000001, 0x2fc00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000a }, + { 0x00802040, 0x24000ca5, 0x008d0400, 0x00080000 }, + { 0x00802040, 0x24400ca5, 0x008d0440, 0x00080000 }, + { 0x00802040, 0x24800ca5, 0x008d0480, 0x00080000 }, + { 0x00802040, 0x24c00ca5, 0x008d04c0, 0x00080000 }, + { 0x00802008, 0x24000ca5, 0x008d0400, 0x00000014 }, + { 0x00802008, 0x24400ca5, 0x008d0440, 0x00000014 }, + { 0x00802008, 0x24800ca5, 0x008d0480, 0x00000014 }, + { 0x00802008, 0x24c00ca5, 0x008d04c0, 0x00000014 }, + { 0x00000001, 0x22000020, 0x00210a00, 0x00000000 }, + { 0x00000040, 0x34000c20, 0x00210fa0, 0x00000020 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, + { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, + { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, + { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, + { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, + { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, + { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, + { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, + { 0x00200040, 0x240014a5, 0x00800500, 0x00800510 }, + { 0x00200040, 0x242014a5, 0x00800540, 0x00800550 }, + { 0x00200040, 0x244014a5, 0x00800580, 0x00800590 }, + { 0x00200040, 0x246014a5, 0x008005c0, 0x008005d0 }, + { 0x00200040, 0x248014a5, 0x00800600, 0x00800610 }, + { 0x00200040, 0x24a014a5, 0x00800640, 0x00800650 }, + { 0x00200040, 0x24c014a5, 0x00800680, 0x00800690 }, + { 0x00200040, 0x24e014a5, 0x008006c0, 0x008006d0 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, + { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, + { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, + { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, + { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, + { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, + { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, + { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, + { 0x00200040, 0x240814a5, 0x00800500, 0x00800510 }, + { 0x00200040, 0x242814a5, 0x00800540, 0x00800550 }, + { 0x00200040, 0x244814a5, 0x00800580, 0x00800590 }, + { 0x00200040, 0x246814a5, 0x008005c0, 0x008005d0 }, + { 0x00200040, 0x248814a5, 0x00800600, 0x00800610 }, + { 0x00200040, 0x24a814a5, 0x00800640, 0x00800650 }, + { 0x00200040, 0x24c814a5, 0x00800680, 0x00800690 }, + { 0x00200040, 0x24e814a5, 0x008006c0, 0x008006d0 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, + { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, + { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, + { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, + { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, + { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, + { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, + { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, + { 0x00200040, 0x241014a5, 0x00800500, 0x00800510 }, + { 0x00200040, 0x243014a5, 0x00800540, 0x00800550 }, + { 0x00200040, 0x245014a5, 0x00800580, 0x00800590 }, + { 0x00200040, 0x247014a5, 0x008005c0, 0x008005d0 }, + { 0x00200040, 0x249014a5, 0x00800600, 0x00800610 }, + { 0x00200040, 0x24b014a5, 0x00800640, 0x00800650 }, + { 0x00200040, 0x24d014a5, 0x00800680, 0x00800690 }, + { 0x00200040, 0x24f014a5, 0x008006c0, 0x008006d0 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, + { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, + { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, + { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, + { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, + { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, + { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, + { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, + { 0x00200040, 0x241814a5, 0x00800500, 0x00800510 }, + { 0x00200040, 0x243814a5, 0x00800540, 0x00800550 }, + { 0x00200040, 0x245814a5, 0x00800580, 0x00800590 }, + { 0x00200040, 0x247814a5, 0x008005c0, 0x008005d0 }, + { 0x00200040, 0x249814a5, 0x00800600, 0x00800610 }, + { 0x00200040, 0x24b814a5, 0x00800640, 0x00800650 }, + { 0x00200040, 0x24d814a5, 0x00800680, 0x00800690 }, + { 0x00200040, 0x24f814a5, 0x008006c0, 0x008006d0 }, + { 0x00000040, 0x34000c20, 0x00210fc0, 0x00000020 }, diff --git a/src/shaders/mpeg2/vld/lib.g4b.gen5 b/src/shaders/mpeg2/vld/lib.g4b.gen5 new file mode 100644 index 00000000..2371beb0 --- /dev/null +++ b/src/shaders/mpeg2/vld/lib.g4b.gen5 @@ -0,0 +1,307 @@ + { 0x00000005, 0x2da02d29, 0x00210a48, 0x001f001f }, + { 0x01000005, 0x20002d3c, 0x00210a48, 0x00200020 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x05000010, 0x20002d3c, 0x00210da0, 0x00090009 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, + { 0x05000010, 0x20002d3c, 0x00210da0, 0x00110011 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000000c }, + { 0x05000010, 0x20002d3c, 0x00210da0, 0x00190019 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000040, 0x2da03d29, 0x00210da0, 0xffe7ffe7 }, + { 0x00000009, 0x2da02d29, 0x00210da0, 0x00030003 }, + { 0x00000040, 0x2da02d29, 0x00210da0, 0x00400040 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000012 }, + { 0x00000040, 0x2da03d29, 0x00210da0, 0xfff7fff7 }, + { 0x00000009, 0x2da02d29, 0x00210da0, 0x00010001 }, + { 0x00000040, 0x2da02d29, 0x00210da0, 0x000a000a }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000a }, + { 0x00000040, 0x2da03d29, 0x00210da0, 0xffefffef }, + { 0x00000009, 0x2da02d29, 0x00210da0, 0x00020002 }, + { 0x00000040, 0x2da02d29, 0x00210da0, 0x001c001c }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000002 }, + { 0x00000009, 0x2da00d29, 0x00210da0, 0x00000001 }, + { 0x00000001, 0x2dc00129, 0x00210da0, 0x00000000 }, + { 0x00800001, 0x2e000229, 0x00b10060, 0x00000000 }, + { 0x00800001, 0x2e200229, 0x00b10070, 0x00000000 }, + { 0x00800001, 0x2e400229, 0x00b10080, 0x00000000 }, + { 0x00800001, 0x2e600229, 0x00b10090, 0x00000000 }, + { 0x00000001, 0x22000060, 0x00000000, 0x03f003e0 }, + { 0x01000005, 0x20002d3c, 0x00210a48, 0x08000800 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000000c }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000142 }, + { 0x00800001, 0x270001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x272001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x274001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x276001ad, 0x00ae0f40, 0x00000000 }, + { 0x01000005, 0x20002d3c, 0x00210a48, 0x04000400 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000000c }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000132 }, + { 0x00800001, 0x278001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x27a001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x27c001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x27e001ad, 0x00ae0f40, 0x00000000 }, + { 0x01000005, 0x20002d3c, 0x00210a48, 0x02000200 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000000c }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000122 }, + { 0x00800001, 0x280001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x282001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x284001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x286001ad, 0x00ae0f40, 0x00000000 }, + { 0x01000005, 0x20002d3c, 0x00210a48, 0x01000100 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000000c }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000112 }, + { 0x00800001, 0x288001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x28a001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x28c001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x28e001ad, 0x00ae0f40, 0x00000000 }, + { 0x01000005, 0x20002d3c, 0x00210a48, 0x00800080 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000000c }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000102 }, + { 0x00800001, 0x290001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x292001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x294001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x296001ad, 0x00ae0f40, 0x00000000 }, + { 0x01000005, 0x20002d3c, 0x00210a48, 0x00400040 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000000c }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000000f2 }, + { 0x00800001, 0x298001ad, 0x00ae0e80, 0x00000000 }, + { 0x00800001, 0x29a001ad, 0x00ae0ec0, 0x00000000 }, + { 0x00800001, 0x29c001ad, 0x00ae0f00, 0x00000000 }, + { 0x00800001, 0x29e001ad, 0x00ae0f40, 0x00000000 }, + { 0x00000001, 0x22000060, 0x00000000, 0x06f006e0 }, + { 0x02000005, 0x20002d3c, 0x00210a48, 0x08000800 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000014 }, + { 0x00600001, 0x2a600169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2a800169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2aa00169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2ac00169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2ae00169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b000169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b200169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b400169, 0x00000000, 0x00000000 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00800080 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000014 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000000ee }, + { 0x00600001, 0x2a6001ad, 0x00ae0400, 0x00000000 }, + { 0x00600001, 0x2a8001ad, 0x00ae0420, 0x00000000 }, + { 0x00600001, 0x2aa001ad, 0x00ae0440, 0x00000000 }, + { 0x00600001, 0x2ac001ad, 0x00ae0460, 0x00000000 }, + { 0x00600001, 0x2ae001ad, 0x00ae0480, 0x00000000 }, + { 0x00600001, 0x2b0001ad, 0x00ae04a0, 0x00000000 }, + { 0x00600001, 0x2b2001ad, 0x00ae04c0, 0x00000000 }, + { 0x00600001, 0x2b4001ad, 0x00ae04e0, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a48, 0x04000400 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000014 }, + { 0x00600001, 0x2a700169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2a900169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2ab00169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2ad00169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2af00169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b100169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b300169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b500169, 0x00000000, 0x00000000 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00800080 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000014 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000000c2 }, + { 0x00600001, 0x2a7001ad, 0x00ae0400, 0x00000000 }, + { 0x00600001, 0x2a9001ad, 0x00ae0420, 0x00000000 }, + { 0x00600001, 0x2ab001ad, 0x00ae0440, 0x00000000 }, + { 0x00600001, 0x2ad001ad, 0x00ae0460, 0x00000000 }, + { 0x00600001, 0x2af001ad, 0x00ae0480, 0x00000000 }, + { 0x00600001, 0x2b1001ad, 0x00ae04a0, 0x00000000 }, + { 0x00600001, 0x2b3001ad, 0x00ae04c0, 0x00000000 }, + { 0x00600001, 0x2b5001ad, 0x00ae04e0, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a48, 0x02000200 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000014 }, + { 0x00600001, 0x2b600169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b800169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2ba00169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2bc00169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2be00169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2c000169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2c200169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2c400169, 0x00000000, 0x00000000 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00800080 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000014 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000096 }, + { 0x00600001, 0x2b6001ad, 0x00ae0400, 0x00000000 }, + { 0x00600001, 0x2b8001ad, 0x00ae0420, 0x00000000 }, + { 0x00600001, 0x2ba001ad, 0x00ae0440, 0x00000000 }, + { 0x00600001, 0x2bc001ad, 0x00ae0460, 0x00000000 }, + { 0x00600001, 0x2be001ad, 0x00ae0480, 0x00000000 }, + { 0x00600001, 0x2c0001ad, 0x00ae04a0, 0x00000000 }, + { 0x00600001, 0x2c2001ad, 0x00ae04c0, 0x00000000 }, + { 0x00600001, 0x2c4001ad, 0x00ae04e0, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a48, 0x01000100 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000014 }, + { 0x00600001, 0x2b700169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b900169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2bb00169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2bd00169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2bf00169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2c100169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2c300169, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2c500169, 0x00000000, 0x00000000 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00800080 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000014 }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000006a }, + { 0x00600001, 0x2b7001ad, 0x00ae0400, 0x00000000 }, + { 0x00600001, 0x2b9001ad, 0x00ae0420, 0x00000000 }, + { 0x00600001, 0x2bb001ad, 0x00ae0440, 0x00000000 }, + { 0x00600001, 0x2bd001ad, 0x00ae0460, 0x00000000 }, + { 0x00600001, 0x2bf001ad, 0x00ae0480, 0x00000000 }, + { 0x00600001, 0x2c1001ad, 0x00ae04a0, 0x00000000 }, + { 0x00600001, 0x2c3001ad, 0x00ae04c0, 0x00000000 }, + { 0x00600001, 0x2c5001ad, 0x00ae04e0, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a48, 0x00800080 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000000c }, + { 0x00800001, 0x2c600169, 0x00000000, 0x00000000 }, + { 0x00800001, 0x2c800169, 0x00000000, 0x00000000 }, + { 0x00800001, 0x2ca00169, 0x00000000, 0x00000000 }, + { 0x00800001, 0x2cc00169, 0x00000000, 0x00000000 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00800080 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000046 }, + { 0x00800001, 0x2c6001ad, 0x00ae0400, 0x00000000 }, + { 0x00800001, 0x2c8001ad, 0x00ae0440, 0x00000000 }, + { 0x00800001, 0x2ca001ad, 0x00ae0480, 0x00000000 }, + { 0x00800001, 0x2cc001ad, 0x00ae04c0, 0x00000000 }, + { 0x02000005, 0x20002d3c, 0x00210a48, 0x00400040 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000000a }, + { 0x00800001, 0x2ce00169, 0x00000000, 0x00000000 }, + { 0x00800001, 0x2d000169, 0x00000000, 0x00000000 }, + { 0x00800001, 0x2d200169, 0x00000000, 0x00000000 }, + { 0x00800001, 0x2d400169, 0x00000000, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, + { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000002c }, + { 0x00800001, 0x2ce001ad, 0x00ae0400, 0x00000000 }, + { 0x00800001, 0x2d0001ad, 0x00ae0440, 0x00000000 }, + { 0x00800001, 0x2d2001ad, 0x00ae0480, 0x00000000 }, + { 0x00800001, 0x2d4001ad, 0x00ae04c0, 0x00000000 }, + { 0x00000040, 0x34000c20, 0x00210fc8, 0x00000020 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802041, 0x2e8025a5, 0x008d8000, 0x008d0e00 }, + { 0x00802041, 0x2e8024a5, 0x008d0e80, 0x008c0da0 }, + { 0x0080200c, 0x2e802ca5, 0x008d0e80, 0x00040004 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802041, 0x2ec025a5, 0x008d8000, 0x008d0e20 }, + { 0x00802041, 0x2ec024a5, 0x008d0ec0, 0x008c0da0 }, + { 0x0080200c, 0x2ec02ca5, 0x008d0ec0, 0x00040004 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802041, 0x2f0025a5, 0x008d8000, 0x008d0e40 }, + { 0x00802041, 0x2f0024a5, 0x008d0f00, 0x008c0da0 }, + { 0x0080200c, 0x2f002ca5, 0x008d0f00, 0x00040004 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802041, 0x2f4025a5, 0x008d8000, 0x008d0e60 }, + { 0x00802041, 0x2f4024a5, 0x008d0f40, 0x008c0da0 }, + { 0x0080200c, 0x2f402ca5, 0x008d0f40, 0x00040004 }, + { 0x00000040, 0x34000c20, 0x00210fa0, 0x00000020 }, + { 0x00000001, 0x2fc00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00802040, 0x24000ca5, 0x008d0400, 0x00000400 }, + { 0x00802040, 0x24400ca5, 0x008d0440, 0x00000400 }, + { 0x00802040, 0x24800ca5, 0x008d0480, 0x00000400 }, + { 0x00802040, 0x24c00ca5, 0x008d04c0, 0x00000400 }, + { 0x00802008, 0x24000ca5, 0x008d0400, 0x0000000b }, + { 0x00802008, 0x24400ca5, 0x008d0440, 0x0000000b }, + { 0x00802008, 0x24800ca5, 0x008d0480, 0x0000000b }, + { 0x00802008, 0x24c00ca5, 0x008d04c0, 0x0000000b }, + { 0x00800001, 0x2dc001ad, 0x00ae0400, 0x00000000 }, + { 0x00800001, 0x2de001ad, 0x00ae0440, 0x00000000 }, + { 0x00800001, 0x2e0001ad, 0x00ae0480, 0x00000000 }, + { 0x00800001, 0x2e2001ad, 0x00ae04c0, 0x00000000 }, + { 0x00000001, 0x2a000001, 0x00210200, 0x00000000 }, + { 0x00000001, 0x22000060, 0x00000000, 0x0db00da0 }, + { 0x00000001, 0x2fc00001, 0x00001400, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000014 }, + { 0x00802040, 0x24000ca5, 0x008d0400, 0x00080000 }, + { 0x00802040, 0x24400ca5, 0x008d0440, 0x00080000 }, + { 0x00802040, 0x24800ca5, 0x008d0480, 0x00080000 }, + { 0x00802040, 0x24c00ca5, 0x008d04c0, 0x00080000 }, + { 0x00802008, 0x24000ca5, 0x008d0400, 0x00000014 }, + { 0x00802008, 0x24400ca5, 0x008d0440, 0x00000014 }, + { 0x00802008, 0x24800ca5, 0x008d0480, 0x00000014 }, + { 0x00802008, 0x24c00ca5, 0x008d04c0, 0x00000014 }, + { 0x00000001, 0x22000020, 0x00210a00, 0x00000000 }, + { 0x00000040, 0x34000c20, 0x00210fa0, 0x00000020 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, + { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, + { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, + { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, + { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, + { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, + { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, + { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, + { 0x00200040, 0x240014a5, 0x00800500, 0x00800510 }, + { 0x00200040, 0x242014a5, 0x00800540, 0x00800550 }, + { 0x00200040, 0x244014a5, 0x00800580, 0x00800590 }, + { 0x00200040, 0x246014a5, 0x008005c0, 0x008005d0 }, + { 0x00200040, 0x248014a5, 0x00800600, 0x00800610 }, + { 0x00200040, 0x24a014a5, 0x00800640, 0x00800650 }, + { 0x00200040, 0x24c014a5, 0x00800680, 0x00800690 }, + { 0x00200040, 0x24e014a5, 0x008006c0, 0x008006d0 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, + { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, + { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, + { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, + { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, + { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, + { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, + { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, + { 0x00200040, 0x240814a5, 0x00800500, 0x00800510 }, + { 0x00200040, 0x242814a5, 0x00800540, 0x00800550 }, + { 0x00200040, 0x244814a5, 0x00800580, 0x00800590 }, + { 0x00200040, 0x246814a5, 0x008005c0, 0x008005d0 }, + { 0x00200040, 0x248814a5, 0x00800600, 0x00800610 }, + { 0x00200040, 0x24a814a5, 0x00800640, 0x00800650 }, + { 0x00200040, 0x24c814a5, 0x00800680, 0x00800690 }, + { 0x00200040, 0x24e814a5, 0x008006c0, 0x008006d0 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, + { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, + { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, + { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, + { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, + { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, + { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, + { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, + { 0x00200040, 0x241014a5, 0x00800500, 0x00800510 }, + { 0x00200040, 0x243014a5, 0x00800540, 0x00800550 }, + { 0x00200040, 0x245014a5, 0x00800580, 0x00800590 }, + { 0x00200040, 0x247014a5, 0x008005c0, 0x008005d0 }, + { 0x00200040, 0x249014a5, 0x00800600, 0x00800610 }, + { 0x00200040, 0x24b014a5, 0x00800640, 0x00800650 }, + { 0x00200040, 0x24d014a5, 0x00800680, 0x00800690 }, + { 0x00200040, 0x24f014a5, 0x008006c0, 0x008006d0 }, + { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, + { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, + { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, + { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, + { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, + { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, + { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, + { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, + { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, + { 0x00200040, 0x241814a5, 0x00800500, 0x00800510 }, + { 0x00200040, 0x243814a5, 0x00800540, 0x00800550 }, + { 0x00200040, 0x245814a5, 0x00800580, 0x00800590 }, + { 0x00200040, 0x247814a5, 0x008005c0, 0x008005d0 }, + { 0x00200040, 0x249814a5, 0x00800600, 0x00800610 }, + { 0x00200040, 0x24b814a5, 0x00800640, 0x00800650 }, + { 0x00200040, 0x24d814a5, 0x00800680, 0x00800690 }, + { 0x00200040, 0x24f814a5, 0x008006c0, 0x008006d0 }, + { 0x00000040, 0x34000c20, 0x00210fc0, 0x00000020 }, diff --git a/src/shaders/mpeg2/vld/motion_field_uv.g4i b/src/shaders/mpeg2/vld/motion_field_uv.g4i new file mode 100644 index 00000000..4598c85a --- /dev/null +++ b/src/shaders/mpeg2/vld/motion_field_uv.g4i @@ -0,0 +1,46 @@ +/* + * Copyright © 2008 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Zhang Hua jun <huajun.zhang@intel.com> + * Xing Dong sheng <dongsheng.xing@intel.com> + * + */ + and.z (1) null mv1<1,1,1>W 1W {align1}; + (f0) jmpi L1; + and.z (1) null mv2<1,1,1>W 1W {align1}; + (f0) jmpi L2; + include(`read_field_x1y1_uv.g4i') + jmpi L5; +L2: + include(`read_field_x1y0_uv.g4i') + jmpi L5; +L1: + and.z (1) null mv2<1,1,1>W 1W {align1}; + (f0) jmpi L4; + include(`read_field_x0y1_uv.g4i') + jmpi L5; +L4: + include(`read_field_x0y0_uv.g4i') +L5: + diff --git a/src/shaders/mpeg2/vld/motion_field_y.g4i b/src/shaders/mpeg2/vld/motion_field_y.g4i new file mode 100644 index 00000000..47d2ec40 --- /dev/null +++ b/src/shaders/mpeg2/vld/motion_field_y.g4i @@ -0,0 +1,45 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Zhang Hua jun <huajun.zhang@intel.com> + * Xing Dong sheng <dongsheng.xing@intel.com> + * + */ + and.z (1) null mv1<1,1,1>W 1UW {align1}; + (f0) jmpi L1; + and.z (1) null mv2<1,1,1>W 1UW {align1}; + (f0) jmpi L2; + include(`read_field_x1y1_y.g4i') + jmpi L5; +L2: + include(`read_field_x1y0_y.g4i') + jmpi L5; +L1: + and.z (1) null mv2<1,1,1>W 1UW {align1}; + (f0) jmpi L4; + include(`read_field_x0y1_y.g4i') + jmpi L5; +L4: + include(`read_field_x0y0_y.g4i') +L5: diff --git a/src/shaders/mpeg2/vld/motion_frame_uv.g4i b/src/shaders/mpeg2/vld/motion_frame_uv.g4i new file mode 100644 index 00000000..00a5f2bf --- /dev/null +++ b/src/shaders/mpeg2/vld/motion_frame_uv.g4i @@ -0,0 +1,45 @@ +/* + * Copyright © 2008 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Zhang Hua jun <huajun.zhang@intel.com> + * Xing Dong sheng <dongsheng.xing@intel.com> + */ + + and.z (1) null mv1<1,1,1>UW 2UD {align1}; + (f0) jmpi LL1; + and.z (1) null mv2<1,1,1>UW 2UD {align1}; + (f0) jmpi LL2; + include(`read_frame_x1y1_uv.g4i') + jmpi LL5; +LL2: + include(`read_frame_x1y0_uv.g4i') + jmpi LL5; +LL1: + and.z (1) null mv2<1,1,1>UW 2UD {align1}; + (f0) jmpi LL4; + include(`read_frame_x0y1_uv.g4i') + jmpi LL5; +LL4: + include(`read_frame_x0y0_uv.g4i') +LL5: diff --git a/src/shaders/mpeg2/vld/motion_frame_y.g4i b/src/shaders/mpeg2/vld/motion_frame_y.g4i new file mode 100644 index 00000000..88c80851 --- /dev/null +++ b/src/shaders/mpeg2/vld/motion_frame_y.g4i @@ -0,0 +1,57 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + */ + +/* if (motion_vect.x & 1) { + * if (motion_vect.y & 1) + * half_pixel in x and y; + * else + * half_pixel in x; + * } else { + * if (motion_vect.y & 1) + * half_pixel y; + * else + * full_pixel_read; + * } + */ + + and.z (1) null mv1<1,1,1>UW 1UD {align1}; + (f0) jmpi LL1; + and.z (1) null mv2<1,1,1>UW 1UD {align1}; + (f0) jmpi LL2; + include(`read_frame_x1y1_y.g4i') + jmpi LL5; +LL2: + include(`read_frame_x1y0_y.g4i') + jmpi LL5; +LL1: + and.z (1) null mv2<1,1,1>UW 1UD {align1}; + (f0) jmpi LL4; + include(`read_frame_x0y1_y.g4i') + jmpi LL5; +LL4: + include(`read_frame_x0y0_y.g4i') +LL5: + diff --git a/src/shaders/mpeg2/vld/null.g4a b/src/shaders/mpeg2/vld/null.g4a new file mode 100644 index 00000000..1e1dcea5 --- /dev/null +++ b/src/shaders/mpeg2/vld/null.g4a @@ -0,0 +1,51 @@ +/* + * Copyright © 2008 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * + */ +mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; +mov (2) g31.0<1>UD g82.12<2,2,1>UW {align1}; +define(`UV_red',`0xffffffffUD') +define(`UV_white',`0x7f7f7f7fUD') +define(`UV_green',`0x00000000UD') + +mov(2) g6.0<1>UD g82.12<2,2,1>UW {align1}; +mov(1) g6.8<1>UD 0x000f000fUD { align1 }; +mov(16) m1<1>UD 0xFFFFFFFFUD {align1 compr}; +mov(16) m3<1>UD 0xFFFFFFFFUD {align1 compr}; +mov(16) m5<1>UD 0xFFFFFFFFUD {align1 compr}; +mov(16) m7<1>UD 0xFFFFFFFFUD {align1 compr}; +send (16) 0 acc0<1>UW g6<8,8,1>UW write(0, 0, 2, 0) mlen 9 rlen 0 { align1 }; + +/*Fill U buffer & V buffer with 0x7F*/ +shr (2) g6.0<1>UD g82.12<2,2,1>UW 1UW {align1}; + +mov(1) g6.8<1>UD 0x00070007UD { align1 }; +mov (16) m1<1>UD UV_white {align1 compr}; +//mov (16) m1<1>UD g1.0<16,8,1>UD {align1 compr}; +send (16) 0 acc0<1>UW g6<8,8,1>UW write(2, 0, 2, 0) mlen 3 rlen 0 { align1 }; +send (16) 0 acc0<1>UW g6<8,8,1>UW write(1, 0, 2, 0) mlen 3 rlen 0 { align1 }; + +send (16) 0 acc0<1>UW g0<8,8,1>UW + thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; diff --git a/src/shaders/mpeg2/vld/read_field_x0y0_uv.g4i b/src/shaders/mpeg2/vld/read_field_x0y0_uv.g4i new file mode 100644 index 00000000..36e589a1 --- /dev/null +++ b/src/shaders/mpeg2/vld/read_field_x0y0_uv.g4i @@ -0,0 +1,50 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data + g115: message descriptor for reading reference data */ + +mov (1) g115.8<1>UD 0x7000FUD {align1}; // 8*16/32=4 +send (16) 0 g40.0<1>UW g115<16,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 4 {align1};//U +send (16) 0 g45.0<1>UW g115<16,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 4 {align1};//V + +mov (16) g32.0<1>UW g40.0<16,8,1>UB {align1}; +mov (16) g33.0<1>UW g41.0<16,8,1>UB {align1}; +mov (16) g34.0<1>UW g42.0<16,8,1>UB {align1}; +mov (16) g35.0<1>UW g43.0<16,8,1>UB {align1}; +mov (16) g36.0<1>UW g45.0<16,8,1>UB {align1}; +mov (16) g37.0<1>UW g46.0<16,8,1>UB {align1}; +mov (16) g38.0<1>UW g47.0<16,8,1>UB {align1}; +mov (16) g39.0<1>UW g48.0<16,8,1>UB {align1}; diff --git a/src/shaders/mpeg2/vld/read_field_x0y0_y.g4i b/src/shaders/mpeg2/vld/read_field_x0y0_y.g4i new file mode 100644 index 00000000..e5495981 --- /dev/null +++ b/src/shaders/mpeg2/vld/read_field_x0y0_y.g4i @@ -0,0 +1,57 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data + g115: message descriptor for reading reference data */ +mov (1) g115.8<1>UD 0x01FUD {align1}; +send (16) 0 g40.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; +add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; +send (16) 0 g42.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; +add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; +send (16) 0 g44.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; +add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; +send (16) 0 g46.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; +add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; +mov (1) g115.8<1>UD 0x07001FUD {align1}; +send (16) 0 g48.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1}; + +mov (16) g32.0<1>UW g40.0<16,16,1>UB {align1}; +mov (16) g33.0<1>UW g42.0<16,16,1>UB {align1}; +mov (16) g34.0<1>UW g44.0<16,16,1>UB {align1}; +mov (16) g35.0<1>UW g46.0<16,16,1>UB {align1}; +mov (16) g36.0<1>UW g48.0<16,16,1>UB {align1}; +mov (16) g37.0<1>UW g50.0<16,16,1>UB {align1}; +mov (16) g38.0<1>UW g52.0<16,16,1>UB {align1}; +mov (16) g39.0<1>UW g54.0<16,16,1>UB {align1}; diff --git a/src/shaders/mpeg2/vld/read_field_x0y1_uv.g4i b/src/shaders/mpeg2/vld/read_field_x0y1_uv.g4i new file mode 100644 index 00000000..ac8030b8 --- /dev/null +++ b/src/shaders/mpeg2/vld/read_field_x0y1_uv.g4i @@ -0,0 +1,28 @@ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data + g115: message descriptor for reading reference data */ + +mov (1) g115.8<1>UD 0x07000FUD {align1}; // 8*16/32=4 +send (16) 0 g40.0<1>UW g115<8,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 4 {align1};//U +send (16) 0 g45.0<1>UW g115<8,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 4 {align1};//V +mov (1) g115.8<1>UD 0xFUD {align1}; +add (1) g115.4<1>UD g115.4<1,1,1>UD 8UD {align1}; +send (16) 0 g44.0<1>UW g115<8,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 1 {align1};//U +send (16) 0 g49.0<1>UW g115<8,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 1 {align1};//V + +avg (16) g32.0<1>UW g40.0<16,8,1>UB g41.0<16,8,1>UB {align1}; +avg (16) g33.0<1>UW g41.0<16,8,1>UB g42.0<16,8,1>UB {align1}; +avg (16) g34.0<1>UW g42.0<16,8,1>UB g43.0<16,8,1>UB {align1}; +avg (16) g35.0<1>UW g43.0<16,8,1>UB g44.0<16,8,1>UB {align1}; + +avg (16) g36.0<1>UW g45.0<16,8,1>UB g46.0<16,8,1>UB {align1}; +avg (16) g37.0<1>UW g46.0<16,8,1>UB g47.0<16,8,1>UB {align1}; +avg (16) g38.0<1>UW g47.0<16,8,1>UB g48.0<16,8,1>UB {align1}; +avg (16) g39.0<1>UW g48.0<16,8,1>UB g49.0<16,8,1>UB {align1}; diff --git a/src/shaders/mpeg2/vld/read_field_x0y1_y.g4i b/src/shaders/mpeg2/vld/read_field_x0y1_y.g4i new file mode 100644 index 00000000..7a7909fe --- /dev/null +++ b/src/shaders/mpeg2/vld/read_field_x0y1_y.g4i @@ -0,0 +1,60 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data + g115: message descriptor for reading reference data */ +mov (1) g115.8<1>UD 0x01FUD {align1}; +send (16) 0 g40.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; +add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; +send (16) 0 g42.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; +add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; +send (16) 0 g44.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; +add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; +send (16) 0 g46.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; +add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; +mov (1) g115.8<1>UD 0x07001FUD {align1}; +send (16) 0 g48.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1}; +add (1) g115.4<1>UD g115.4<1,1,1>UD 8UD {align1}; +mov (1) g115.8<1>UD 0x1FUD {align1}; +send (16) 0 g56.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; + +avg.sat (16) g32.0<1>UW g40.0<16,16,1>UB g42.0<16,16,1>UB {align1}; +avg.sat (16) g33.0<1>UW g42.0<16,16,1>UB g44.0<16,16,1>UB {align1}; +avg.sat (16) g34.0<1>UW g44.0<16,16,1>UB g46.0<16,16,1>UB {align1}; +avg.sat (16) g35.0<1>UW g46.0<16,16,1>UB g48.0<16,16,1>UB {align1}; +avg.sat (16) g36.0<1>UW g48.0<16,16,1>UB g50.0<16,16,1>UB {align1}; +avg.sat (16) g37.0<1>UW g50.0<16,16,1>UB g52.0<16,16,1>UB {align1}; +avg.sat (16) g38.0<1>UW g52.0<16,16,1>UB g54.0<16,16,1>UB {align1}; +avg.sat (16) g39.0<1>UW g54.0<16,16,1>UB g56.0<16,16,1>UB {align1}; diff --git a/src/shaders/mpeg2/vld/read_field_x1y0_uv.g4i b/src/shaders/mpeg2/vld/read_field_x1y0_uv.g4i new file mode 100644 index 00000000..4c364382 --- /dev/null +++ b/src/shaders/mpeg2/vld/read_field_x1y0_uv.g4i @@ -0,0 +1,24 @@ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data + g115: message descriptor for reading reference data */ + +mov (1) g115.8<1>UD 0x07000FUD {align1}; // 8*16/32=4 +send (16) 0 g40.0<1>UW g115<8,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 4 {align1};//U +send (16) 0 g44.0<1>UW g115<8,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 4 {align1};//V + +avg (16) g32.0<1>UW g40.0<16,8,1>UB g40.1<16,8,1>UB {align1}; +avg (16) g33.0<1>UW g41.0<16,8,1>UB g41.1<16,8,1>UB {align1}; +avg (16) g34.0<1>UW g42.0<16,8,1>UB g42.1<16,8,1>UB {align1}; +avg (16) g35.0<1>UW g43.0<16,8,1>UB g43.1<16,8,1>UB {align1}; + +avg (16) g36.0<1>UW g44.0<16,8,1>UB g44.1<16,8,1>UB {align1}; +avg (16) g37.0<1>UW g45.0<16,8,1>UB g45.1<16,8,1>UB {align1}; +avg (16) g38.0<1>UW g46.0<16,8,1>UB g46.1<16,8,1>UB {align1}; +avg (16) g39.0<1>UW g47.0<16,8,1>UB g47.1<16,8,1>UB {align1}; diff --git a/src/shaders/mpeg2/vld/read_field_x1y0_y.g4i b/src/shaders/mpeg2/vld/read_field_x1y0_y.g4i new file mode 100644 index 00000000..c8ff505d --- /dev/null +++ b/src/shaders/mpeg2/vld/read_field_x1y0_y.g4i @@ -0,0 +1,57 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data + g115: message descriptor for reading reference data */ +mov (1) g115.8<1>UD 0x01FUD {align1}; +send (16) 0 g40.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; +add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; +send (16) 0 g42.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; +add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; +send (16) 0 g44.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; +add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; +send (16) 0 g46.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; +add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; +mov (1) g115.8<1>UD 0x07001FUD {align1}; +send (16) 0 g48.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1}; + +avg.sat (16) g32.0<1>UW g40.0<16,16,1>UB g40.1<16,16,1>UB {align1}; +avg.sat (16) g33.0<1>UW g42.0<16,16,1>UB g42.1<16,16,1>UB {align1}; +avg.sat (16) g34.0<1>UW g44.0<16,16,1>UB g44.1<16,16,1>UB {align1}; +avg.sat (16) g35.0<1>UW g46.0<16,16,1>UB g46.1<16,16,1>UB {align1}; +avg.sat (16) g36.0<1>UW g48.0<16,16,1>UB g48.1<16,16,1>UB {align1}; +avg.sat (16) g37.0<1>UW g50.0<16,16,1>UB g50.1<16,16,1>UB {align1}; +avg.sat (16) g38.0<1>UW g52.0<16,16,1>UB g52.1<16,16,1>UB {align1}; +avg.sat (16) g39.0<1>UW g54.0<16,16,1>UB g54.1<16,16,1>UB {align1}; diff --git a/src/shaders/mpeg2/vld/read_field_x1y1_uv.g4i b/src/shaders/mpeg2/vld/read_field_x1y1_uv.g4i new file mode 100644 index 00000000..816dd724 --- /dev/null +++ b/src/shaders/mpeg2/vld/read_field_x1y1_uv.g4i @@ -0,0 +1,53 @@ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data + g115: message descriptor for reading reference data */ +mov (1) g115.8<1>UD 0x07000FUD {align1}; +send (16) 0 g40.0<1>UW g115<8,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 4 {align1};//U +send (16) 0 g45.0<1>UW g115<8,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 4 {align1};//V +mov (1) g115.8<1>UD 0x01000FUD {align1}; +add (1) g115.4<1>UD g115.4<1,1,1>UD 8UD {align1}; +send (16) 0 g44.0<1>UW g115<8,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 1 {align1};//U +send (16) 0 g49.0<1>UW g115<8,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 1 {align1};//V +//U +add (16) g32.0<1>UW g40.0<16,8,1>UB g41.0<16,8,1>UB {align1}; +add (16) g33.0<1>UW g41.0<16,8,1>UB g42.0<16,8,1>UB {align1}; +add (16) g34.0<1>UW g42.0<16,8,1>UB g43.0<16,8,1>UB {align1}; +add (16) g35.0<1>UW g43.0<16,8,1>UB g44.0<16,8,1>UB {align1}; + +add (16) g32.0<1>UW g32.0<16,8,1>UW g40.1<16,8,1>UB {align1}; +add (16) g33.0<1>UW g33.0<16,8,1>UW g41.1<16,8,1>UB {align1}; +add (16) g34.0<1>UW g34.0<16,8,1>UW g42.1<16,8,1>UB {align1}; +add (16) g35.0<1>UW g35.0<16,8,1>UW g43.1<16,8,1>UB {align1}; + +add (16) g32.0<1>UW g32.0<16,8,1>UW g41.1<16,8,1>UB {align1}; +add (16) g33.0<1>UW g33.0<16,8,1>UW g42.1<16,8,1>UB {align1}; +add (16) g34.0<1>UW g34.0<16,8,1>UW g43.1<16,8,1>UB {align1}; +add (16) g35.0<1>UW g35.0<16,8,1>UW g44.1<16,8,1>UB {align1}; +//V +add (16) g36.0<1>UW g45.0<16,8,1>UB g46.0<16,8,1>UB {align1}; +add (16) g37.0<1>UW g46.0<16,8,1>UB g47.0<16,8,1>UB {align1}; +add (16) g38.0<1>UW g47.0<16,8,1>UB g48.0<16,8,1>UB {align1}; +add (16) g39.0<1>UW g48.0<16,8,1>UB g49.0<16,8,1>UB {align1}; + +add (16) g36.0<1>UW g36.0<16,8,1>UW g45.1<16,8,1>UB {align1}; +add (16) g37.0<1>UW g37.0<16,8,1>UW g46.1<16,8,1>UB {align1}; +add (16) g38.0<1>UW g38.0<16,8,1>UW g47.1<16,8,1>UB {align1}; +add (16) g39.0<1>UW g39.0<16,8,1>UW g48.1<16,8,1>UB {align1}; + +add (16) g36.0<1>UW g36.0<16,8,1>UW g46.1<16,8,1>UB {align1}; +add (16) g37.0<1>UW g37.0<16,8,1>UW g47.1<16,8,1>UB {align1}; +add (16) g38.0<1>UW g38.0<16,8,1>UW g48.1<16,8,1>UB {align1}; +add (16) g39.0<1>UW g39.0<16,8,1>UW g49.1<16,8,1>UB {align1}; + +shr (32) g32.0<1>UW g32.0<16,16,1>UW 2UW {align1 compr}; +shr (32) g34.0<1>UW g34.0<16,16,1>UW 2UW {align1 compr}; +shr (32) g36.0<1>UW g36.0<16,16,1>UW 2UW {align1 compr}; +shr (32) g38.0<1>UW g38.0<16,16,1>UW 2UW {align1 compr}; + diff --git a/src/shaders/mpeg2/vld/read_field_x1y1_y.g4i b/src/shaders/mpeg2/vld/read_field_x1y1_y.g4i new file mode 100644 index 00000000..dcc9ebf0 --- /dev/null +++ b/src/shaders/mpeg2/vld/read_field_x1y1_y.g4i @@ -0,0 +1,87 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data + g115: message descriptor for reading reference data */ +mov (1) g115.8<1>UD 0x01FUD {align1}; +send (16) 0 g40.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; +add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; +send (16) 0 g42.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; +add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; +send (16) 0 g44.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; +add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; +send (16) 0 g46.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; +add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; +mov (1) g115.8<1>UD 0x07001FUD {align1}; +send (16) 0 g48.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1}; +add (1) g115.4<1>UD g115.4<1,1,1>UD 8UD {align1}; +mov (1) g115.8<1>UD 0x1FUD {align1}; +send (16) 0 g56.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; + +add (16) g32.0<1>UW g40.0<16,16,1>UB g42.0<16,16,1>UB {align1}; +add (16) g33.0<1>UW g42.0<16,16,1>UB g44.0<16,16,1>UB {align1}; +add (16) g34.0<1>UW g44.0<16,16,1>UB g46.0<16,16,1>UB {align1}; +add (16) g35.0<1>UW g46.0<16,16,1>UB g48.0<16,16,1>UB {align1}; +add (16) g36.0<1>UW g48.0<16,16,1>UB g50.0<16,16,1>UB {align1}; +add (16) g37.0<1>UW g50.0<16,16,1>UB g52.0<16,16,1>UB {align1}; +add (16) g38.0<1>UW g52.0<16,16,1>UB g54.0<16,16,1>UB {align1}; +add (16) g39.0<1>UW g54.0<16,16,1>UB g56.0<16,16,1>UB {align1}; + +add (16) g32.0<1>UW g32.0<16,16,1>UW g40.1<16,16,1>UB {align1}; +add (16) g33.0<1>UW g33.0<16,16,1>UW g42.1<16,16,1>UB {align1}; +add (16) g34.0<1>UW g34.0<16,16,1>UW g44.1<16,16,1>UB {align1}; +add (16) g35.0<1>UW g35.0<16,16,1>UW g46.1<16,16,1>UB {align1}; +add (16) g36.0<1>UW g36.0<16,16,1>UW g48.1<16,16,1>UB {align1}; +add (16) g37.0<1>UW g37.0<16,16,1>UW g50.1<16,16,1>UB {align1}; +add (16) g38.0<1>UW g38.0<16,16,1>UW g52.1<16,16,1>UB {align1}; +add (16) g39.0<1>UW g39.0<16,16,1>UW g54.1<16,16,1>UB {align1}; + +add (16) g32.0<1>UW g32.0<16,16,1>UW g42.1<16,16,1>UB {align1}; +add (16) g33.0<1>UW g33.0<16,16,1>UW g44.1<16,16,1>UB {align1}; +add (16) g34.0<1>UW g34.0<16,16,1>UW g46.1<16,16,1>UB {align1}; +add (16) g35.0<1>UW g35.0<16,16,1>UW g48.1<16,16,1>UB {align1}; +add (16) g36.0<1>UW g36.0<16,16,1>UW g50.1<16,16,1>UB {align1}; +add (16) g37.0<1>UW g37.0<16,16,1>UW g52.1<16,16,1>UB {align1}; +add (16) g38.0<1>UW g38.0<16,16,1>UW g54.1<16,16,1>UB {align1}; +add (16) g39.0<1>UW g39.0<16,16,1>UW g56.1<16,16,1>UB {align1}; + +shr (16) g32.0<1>UW g32.0<16,16,1>UW 2UW {align1}; +shr (16) g33.0<1>UW g33.0<16,16,1>UW 2UW {align1}; +shr (16) g34.0<1>UW g34.0<16,16,1>UW 2UW {align1}; +shr (16) g35.0<1>UW g35.0<16,16,1>UW 2UW {align1}; +shr (16) g36.0<1>UW g36.0<16,16,1>UW 2UW {align1}; +shr (16) g37.0<1>UW g37.0<16,16,1>UW 2UW {align1}; +shr (16) g38.0<1>UW g38.0<16,16,1>UW 2UW {align1}; +shr (16) g39.0<1>UW g39.0<16,16,1>UW 2UW {align1}; diff --git a/src/shaders/mpeg2/vld/read_frame_x0y0_uv.g4i b/src/shaders/mpeg2/vld/read_frame_x0y0_uv.g4i new file mode 100644 index 00000000..63f898f1 --- /dev/null +++ b/src/shaders/mpeg2/vld/read_frame_x0y0_uv.g4i @@ -0,0 +1,49 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g32: message descriptor for reading reference data + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data */ +mov (1) g32.8<1>UD 0x007000fUD {align1}; +send (16) 0 g36.0<1>UW g32<8,8,1>UW read(input_surface1, 2, 0, 2) mlen 1 rlen 4 {align1}; +send (16) 0 g40.0<1>UW g32<8,8,1>UW read(input_surface2, 2, 0, 2) mlen 1 rlen 4 {align1}; + +mov (16) g74.0<1>UW g36.0<16,8,1>UB {align1}; +mov (16) g75.0<1>UW g37.0<16,8,1>UB {align1}; +mov (16) g76.0<1>UW g38.0<16,8,1>UB {align1}; +mov (16) g77.0<1>UW g39.0<16,8,1>UB {align1}; +mov (16) g78.0<1>UW g40.0<16,8,1>UB {align1}; +mov (16) g79.0<1>UW g41.0<16,8,1>UB {align1}; +mov (16) g80.0<1>UW g42.0<16,8,1>UB {align1}; +mov (16) g81.0<1>UW g43.0<16,8,1>UB {align1}; diff --git a/src/shaders/mpeg2/vld/read_frame_x0y0_y.g4i b/src/shaders/mpeg2/vld/read_frame_x0y0_y.g4i new file mode 100644 index 00000000..3ab5ccd5 --- /dev/null +++ b/src/shaders/mpeg2/vld/read_frame_x0y0_y.g4i @@ -0,0 +1,58 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g32: message descriptor for reading reference data + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data */ +mov (1) g32.8<1>UD 0x007001FUD {align1}; +send (16) 0 g38.0<1>UW g32<8,8,1>UW read(input_surface, 2, 0, 2) mlen 1 rlen 8 {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; +send (16) 0 g46.0<1>UW g32<8,8,1>UW read(input_surface, 2, 0, 2) mlen 1 rlen 8 {align1}; + +mov (16) g58.0<1>UW g38.0<16,16,1>UB {align1}; +mov (16) g59.0<1>UW g39.0<16,16,1>UB {align1}; +mov (16) g60.0<1>UW g40.0<16,16,1>UB {align1}; +mov (16) g61.0<1>UW g41.0<16,16,1>UB {align1}; +mov (16) g62.0<1>UW g42.0<16,16,1>UB {align1}; +mov (16) g63.0<1>UW g43.0<16,16,1>UB {align1}; +mov (16) g64.0<1>UW g44.0<16,16,1>UB {align1}; +mov (16) g65.0<1>UW g45.0<16,16,1>UB {align1}; +mov (16) g66.0<1>UW g46.0<16,16,1>UB {align1}; +mov (16) g67.0<1>UW g47.0<16,16,1>UB {align1}; +mov (16) g68.0<1>UW g48.0<16,16,1>UB {align1}; +mov (16) g69.0<1>UW g49.0<16,16,1>UB {align1}; +mov (16) g70.0<1>UW g50.0<16,16,1>UB {align1}; +mov (16) g71.0<1>UW g51.0<16,16,1>UB {align1}; +mov (16) g72.0<1>UW g52.0<16,16,1>UB {align1}; +mov (16) g73.0<1>UW g53.0<16,16,1>UB {align1}; diff --git a/src/shaders/mpeg2/vld/read_frame_x0y1_uv.g4i b/src/shaders/mpeg2/vld/read_frame_x0y1_uv.g4i new file mode 100644 index 00000000..6351ec50 --- /dev/null +++ b/src/shaders/mpeg2/vld/read_frame_x0y1_uv.g4i @@ -0,0 +1,56 @@ +/* + * Copyright © 2008 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDINg BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINgEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIgHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAgES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISINg FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINgS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Zhang Hua jun <huajun.zhang@intel.com> + * Xing Dong sheng <dongsheng.xing@intel.com> + * + */ +mov (1) g32.8<1>UD 0x007001FUD {align1}; +send (16) 0 g34.0<1>UW g32<8,8,1>UW read(input_surface1, 2, 0, 2) mlen 1 rlen 8 {align1}; //U +send (16) 0 g44.0<1>UW g32<8,8,1>UW read(input_surface2, 2, 0, 2) mlen 1 rlen 8 {align1}; //V +add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; +mov (1) g32.8<1>UD 0x1FUD {align1}; +send (16) 0 g42.0<1>UW g32<8,8,1>UW read(input_surface1, 2, 0, 2) mlen 1 rlen 1 {align1}; //U +send (16) 0 g52.0<1>UW g32<8,8,1>UW read(input_surface2, 2, 0, 2) mlen 1 rlen 1 {align1}; //V + +//U +avg (8) g74.0<1>UW g34.0<8,8,1>UB g35.0<8,8,1>UB {align1}; +avg (8) g74.16<1>UW g35.0<8,8,1>UB g36.0<8,8,1>UB {align1}; +avg (8) g75.0<1>UW g36.0<8,8,1>UB g37.0<8,8,1>UB {align1}; +avg (8) g75.16<1>UW g37.0<8,8,1>UB g38.0<8,8,1>UB {align1}; +avg (8) g76.0<1>UW g38.0<8,8,1>UB g39.0<8,8,1>UB {align1}; +avg (8) g76.16<1>UW g39.0<8,8,1>UB g40.0<8,8,1>UB {align1}; +avg (8) g77.0<1>UW g40.0<8,8,1>UB g41.0<8,8,1>UB {align1}; +avg (8) g77.16<1>UW g41.0<8,8,1>UB g42.0<8,8,1>UB {align1}; + +//V +avg (8) g78.0<1>UW g44.0<8,8,1>UB g45.0<8,8,1>UB {align1}; +avg (8) g78.16<1>UW g45.0<8,8,1>UB g46.0<8,8,1>UB {align1}; +avg (8) g79.0<1>UW g46.0<8,8,1>UB g47.0<8,8,1>UB {align1}; +avg (8) g79.16<1>UW g47.0<8,8,1>UB g48.0<8,8,1>UB {align1}; +avg (8) g80.0<1>UW g48.0<8,8,1>UB g49.0<8,8,1>UB {align1}; +avg (8) g80.16<1>UW g49.0<8,8,1>UB g50.0<8,8,1>UB {align1}; +avg (8) g81.0<1>UW g50.0<8,8,1>UB g51.0<8,8,1>UB {align1}; +avg (8) g81.16<1>UW g51.0<8,8,1>UB g52.0<8,8,1>UB {align1}; + diff --git a/src/shaders/mpeg2/vld/read_frame_x0y1_y.g4i b/src/shaders/mpeg2/vld/read_frame_x0y1_y.g4i new file mode 100644 index 00000000..db3dcc55 --- /dev/null +++ b/src/shaders/mpeg2/vld/read_frame_x0y1_y.g4i @@ -0,0 +1,61 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g32: message descriptor for reading reference data + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data */ +mov (1) g32.8<1>UD 0x007001FUD {align1}; +send (16) 0 g38.0<1>UW g32<8,8,1>UW read(input_surface, 2, 0, 2) mlen 1 rlen 8 {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; +send (16) 0 g46.0<1>UW g32<8,8,1>UW read(input_surface, 2, 0, 2) mlen 1 rlen 8 {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; +mov (1) g32.8<1>UD 0x1FUD {align1}; +send (16) 0 g54.0<1>UW g32<8,8,1>UW read(input_surface, 2, 0, 2) mlen 1 rlen 1 {align1}; + +avg.sat (16) g58.0<1>UW g38.0<16,16,1>UB g39.0<16,16,1>UB {align1}; +avg.sat (16) g59.0<1>UW g39.0<16,16,1>UB g40.0<16,16,1>UB {align1}; +avg.sat (16) g60.0<1>UW g40.0<16,16,1>UB g41.0<16,16,1>UB {align1}; +avg.sat (16) g61.0<1>UW g41.0<16,16,1>UB g42.0<16,16,1>UB {align1}; +avg.sat (16) g62.0<1>UW g42.0<16,16,1>UB g43.0<16,16,1>UB {align1}; +avg.sat (16) g63.0<1>UW g43.0<16,16,1>UB g44.0<16,16,1>UB {align1}; +avg.sat (16) g64.0<1>UW g44.0<16,16,1>UB g45.0<16,16,1>UB {align1}; +avg.sat (16) g65.0<1>UW g45.0<16,16,1>UB g46.0<16,16,1>UB {align1}; +avg.sat (16) g66.0<1>UW g46.0<16,16,1>UB g47.0<16,16,1>UB {align1}; +avg.sat (16) g67.0<1>UW g47.0<16,16,1>UB g48.0<16,16,1>UB {align1}; +avg.sat (16) g68.0<1>UW g48.0<16,16,1>UB g49.0<16,16,1>UB {align1}; +avg.sat (16) g69.0<1>UW g49.0<16,16,1>UB g50.0<16,16,1>UB {align1}; +avg.sat (16) g70.0<1>UW g50.0<16,16,1>UB g51.0<16,16,1>UB {align1}; +avg.sat (16) g71.0<1>UW g51.0<16,16,1>UB g52.0<16,16,1>UB {align1}; +avg.sat (16) g72.0<1>UW g52.0<16,16,1>UB g53.0<16,16,1>UB {align1}; +avg.sat (16) g73.0<1>UW g53.0<16,16,1>UB g54.0<16,16,1>UB {align1}; diff --git a/src/shaders/mpeg2/vld/read_frame_x1y0_uv.g4i b/src/shaders/mpeg2/vld/read_frame_x1y0_uv.g4i new file mode 100644 index 00000000..05736f0e --- /dev/null +++ b/src/shaders/mpeg2/vld/read_frame_x1y0_uv.g4i @@ -0,0 +1,42 @@ +/* + * Copyright © 2008 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Zhang Hua jun <huajun.zhang@intel.com> + * Xing Dong sheng <dongsheng.xing@intel.com> + * + */ + +mov (1) g32.8<1>UD 0x007000fUD {align1}; +send (16) 0 g34.0<1>UW g32<8,8,1>UW read(input_surface1, 2, 0, 2) mlen 1 rlen 4 {align1}; +send (16) 0 g44.0<1>UW g32<8,8,1>UW read(input_surface2, 2, 0, 2) mlen 1 rlen 4 {align1}; + +avg (16) g74.0<1>UW g34.0<16,8,1>UB g34.1<16,8,1>UB{align1}; +avg (16) g75.0<1>UW g35.0<16,8,1>UB g35.1<16,8,1>UB{align1}; +avg (16) g76.0<1>UW g36.0<16,8,1>UB g36.1<16,8,1>UB{align1}; +avg (16) g77.0<1>UW g37.0<16,8,1>UB g37.1<16,8,1>UB{align1}; + +avg (16) g78.0<1>UW g44.0<16,8,1>UB g44.1<16,8,1>UB{align1}; +avg (16) g79.0<1>UW g45.0<16,8,1>UB g45.1<16,8,1>UB{align1}; +avg (16) g80.0<1>UW g46.0<16,8,1>UB g46.1<16,8,1>UB{align1}; +avg (16) g81.0<1>UW g47.0<16,8,1>UB g47.1<16,8,1>UB{align1}; diff --git a/src/shaders/mpeg2/vld/read_frame_x1y0_y.g4i b/src/shaders/mpeg2/vld/read_frame_x1y0_y.g4i new file mode 100644 index 00000000..c236d117 --- /dev/null +++ b/src/shaders/mpeg2/vld/read_frame_x1y0_y.g4i @@ -0,0 +1,58 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g32: message descriptor for reading reference data + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data */ +mov (1) g32.8<1>UD 0x007001FUD {align1}; +send (16) 0 g38.0<1>UW g32<8,8,1>UW read(input_surface, 2, 0, 2) mlen 1 rlen 8 {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; +send (16) 0 g46.0<1>UW g32<8,8,1>UW read(input_surface, 2, 0, 2) mlen 1 rlen 8 {align1}; + +avg.sat (16) g58.0<1>UW g38.0<16,16,1>UB g38.1<16,16,1>UB {align1}; +avg.sat (16) g59.0<1>UW g39.0<16,16,1>UB g39.1<16,16,1>UB {align1}; +avg.sat (16) g60.0<1>UW g40.0<16,16,1>UB g40.1<16,16,1>UB {align1}; +avg.sat (16) g61.0<1>UW g41.0<16,16,1>UB g41.1<16,16,1>UB {align1}; +avg.sat (16) g62.0<1>UW g42.0<16,16,1>UB g42.1<16,16,1>UB {align1}; +avg.sat (16) g63.0<1>UW g43.0<16,16,1>UB g43.1<16,16,1>UB {align1}; +avg.sat (16) g64.0<1>UW g44.0<16,16,1>UB g44.1<16,16,1>UB {align1}; +avg.sat (16) g65.0<1>UW g45.0<16,16,1>UB g45.1<16,16,1>UB {align1}; +avg.sat (16) g66.0<1>UW g46.0<16,16,1>UB g46.1<16,16,1>UB {align1}; +avg.sat (16) g67.0<1>UW g47.0<16,16,1>UB g47.1<16,16,1>UB {align1}; +avg.sat (16) g68.0<1>UW g48.0<16,16,1>UB g48.1<16,16,1>UB {align1}; +avg.sat (16) g69.0<1>UW g49.0<16,16,1>UB g49.1<16,16,1>UB {align1}; +avg.sat (16) g70.0<1>UW g50.0<16,16,1>UB g50.1<16,16,1>UB {align1}; +avg.sat (16) g71.0<1>UW g51.0<16,16,1>UB g51.1<16,16,1>UB {align1}; +avg.sat (16) g72.0<1>UW g52.0<16,16,1>UB g52.1<16,16,1>UB {align1}; +avg.sat (16) g73.0<1>UW g53.0<16,16,1>UB g53.1<16,16,1>UB {align1}; diff --git a/src/shaders/mpeg2/vld/read_frame_x1y1_uv.g4i b/src/shaders/mpeg2/vld/read_frame_x1y1_uv.g4i new file mode 100644 index 00000000..2f741fa0 --- /dev/null +++ b/src/shaders/mpeg2/vld/read_frame_x1y1_uv.g4i @@ -0,0 +1,74 @@ +/* + */ +mov (1) g32.8<1>UD 0x007001FUD {align1}; +send (16) 0 g34.0<1>UW g32<8,8,1>UW read(input_surface1, 2, 0, 2) mlen 1 rlen 8 {align1}; //U +send (16) 0 g44.0<1>UW g32<8,8,1>UW read(input_surface2, 2, 0, 2) mlen 1 rlen 8 {align1}; //V +add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; +mov (1) g32.8<1>UD 0x1FUD {align1}; +send (16) 0 g42.0<1>UW g32<8,8,1>UW read(input_surface1, 2, 0, 2) mlen 1 rlen 1 {align1}; //U +send (16) 0 g52.0<1>UW g32<8,8,1>UW read(input_surface2, 2, 0, 2) mlen 1 rlen 1 {align1}; //V + +//U +add (8) g74.0<1>UW g34.0<8,8,1>UB g34.1<8,8,1>UB {align1}; +add (8) g74.16<1>UW g35.0<8,8,1>UB g35.1<8,8,1>UB {align1}; +add (8) g75.0<1>UW g36.0<8,8,1>UB g36.1<8,8,1>UB {align1}; +add (8) g75.16<1>UW g37.0<8,8,1>UB g37.1<8,8,1>UB {align1}; +add (8) g76.0<1>UW g38.0<8,8,1>UB g38.1<8,8,1>UB {align1}; +add (8) g76.16<1>UW g39.0<8,8,1>UB g39.1<8,8,1>UB {align1}; +add (8) g77.0<1>UW g40.0<8,8,1>UB g40.1<8,8,1>UB {align1}; +add (8) g77.16<1>UW g41.0<8,8,1>UB g41.1<8,8,1>UB {align1}; + +add (8) g74.0<1>UW g74.0<8,8,1>UW g35.0<8,8,1>UB {align1}; +add (8) g74.16<1>UW g74.16<8,8,1>UW g36.0<8,8,1>UB {align1}; +add (8) g75.0<1>UW g75.0<8,8,1>UW g37.0<8,8,1>UB {align1}; +add (8) g75.16<1>UW g75.16<8,8,1>UW g38.0<8,8,1>UB {align1}; +add (8) g76.0<1>UW g76.0<8,8,1>UW g39.0<8,8,1>UB {align1}; +add (8) g76.16<1>UW g76.16<8,8,1>UW g40.0<8,8,1>UB {align1}; +add (8) g77.0<1>UW g77.0<8,8,1>UW g41.0<8,8,1>UB {align1}; +add (8) g77.16<1>UW g77.16<8,8,1>UW g42.0<8,8,1>UB {align1}; + +add (8) g74.0<1>UW g74.0<8,8,1>UW g35.1<8,8,1>UB {align1}; +add (8) g74.16<1>UW g74.16<8,8,1>UW g36.1<8,8,1>UB {align1}; +add (8) g75.0<1>UW g75.0<8,8,1>UW g37.1<8,8,1>UB {align1}; +add (8) g75.16<1>UW g75.16<8,8,1>UW g38.1<8,8,1>UB {align1}; +add (8) g76.0<1>UW g76.0<8,8,1>UW g39.1<8,8,1>UB {align1}; +add (8) g76.16<1>UW g76.16<8,8,1>UW g40.1<8,8,1>UB {align1}; +add (8) g77.0<1>UW g77.0<8,8,1>UW g41.1<8,8,1>UB {align1}; +add (8) g77.16<1>UW g77.16<8,8,1>UW g42.1<8,8,1>UB {align1}; + +//V +add (8) g78.0<1>UW g44.0<8,8,1>UB g44.1<8,8,1>UB {align1}; +add (8) g78.16<1>UW g45.0<8,8,1>UB g45.1<8,8,1>UB {align1}; +add (8) g79.0<1>UW g46.0<8,8,1>UB g46.1<8,8,1>UB {align1}; +add (8) g79.16<1>UW g47.0<8,8,1>UB g47.1<8,8,1>UB {align1}; +add (8) g80.0<1>UW g48.0<8,8,1>UB g48.1<8,8,1>UB {align1}; +add (8) g80.16<1>UW g49.0<8,8,1>UB g49.1<8,8,1>UB {align1}; +add (8) g81.0<1>UW g50.0<8,8,1>UB g50.1<8,8,1>UB {align1}; +add (8) g81.16<1>UW g51.0<8,8,1>UB g51.1<8,8,1>UB {align1}; + +add (8) g78.0<1>UW g78.0<8,8,1>UW g45.0<8,8,1>UB {align1}; +add (8) g78.16<1>UW g78.16<8,8,1>UW g46.0<8,8,1>UB {align1}; +add (8) g79.0<1>UW g79.0<8,8,1>UW g47.0<8,8,1>UB {align1}; +add (8) g79.16<1>UW g79.16<8,8,1>UW g48.0<8,8,1>UB {align1}; +add (8) g80.0<1>UW g80.0<8,8,1>UW g49.0<8,8,1>UB {align1}; +add (8) g80.16<1>UW g80.16<8,8,1>UW g50.0<8,8,1>UB {align1}; +add (8) g81.0<1>UW g81.0<8,8,1>UW g51.0<8,8,1>UB {align1}; +add (8) g81.16<1>UW g81.16<8,8,1>UW g52.0<8,8,1>UB {align1}; + +add (8) g78.0<1>UW g78.0<8,8,1>UW g45.1<8,8,1>UB {align1}; +add (8) g78.16<1>UW g78.16<8,8,1>UW g46.1<8,8,1>UB {align1}; +add (8) g79.0<1>UW g79.0<8,8,1>UW g47.1<8,8,1>UB {align1}; +add (8) g79.16<1>UW g79.16<8,8,1>UW g48.1<8,8,1>UB {align1}; +add (8) g80.0<1>UW g80.0<8,8,1>UW g49.1<8,8,1>UB {align1}; +add (8) g80.16<1>UW g80.16<8,8,1>UW g50.1<8,8,1>UB {align1}; +add (8) g81.0<1>UW g81.0<8,8,1>UW g51.1<8,8,1>UB {align1}; +add (8) g81.16<1>UW g81.16<8,8,1>UW g52.1<8,8,1>UB {align1}; + +shr (16) g74.0<1>UW g74.0<16,16,1>UW 2UW {align1}; +shr (16) g75.0<1>UW g75.0<16,16,1>UW 2UW {align1}; +shr (16) g76.0<1>UW g76.0<16,16,1>UW 2UW {align1}; +shr (16) g77.0<1>UW g77.0<16,16,1>UW 2UW {align1}; +shr (16) g78.0<1>UW g78.0<16,16,1>UW 2UW {align1}; +shr (16) g79.0<1>UW g79.0<16,16,1>UW 2UW {align1}; +shr (16) g80.0<1>UW g80.0<16,16,1>UW 2UW {align1}; +shr (16) g81.0<1>UW g81.0<16,16,1>UW 2UW {align1}; diff --git a/src/shaders/mpeg2/vld/read_frame_x1y1_y.g4i b/src/shaders/mpeg2/vld/read_frame_x1y1_y.g4i new file mode 100644 index 00000000..990927dc --- /dev/null +++ b/src/shaders/mpeg2/vld/read_frame_x1y1_y.g4i @@ -0,0 +1,112 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Author: + * Zou Nan hai <nanhai.zou@intel.com> + * Yan Li <li.l.yan@intel.com> + * Liu Xi bin<xibin.liu@intel.com> + */ +/* GRF allocation: + g1~g30: constant buffer + g1~g2:intra IQ matrix + g3~g4:non intra IQ matrix + g5~g20:IDCT table + g31: thread payload + g32: message descriptor for reading reference data + g58~g81:reference data + g82: thread payload backup + g83~g106:IDCT data */ +mov (1) g32.8<1>UD 0x007001FUD {align1}; +send (16) 0 g38.0<1>UW g32<8,8,1>UW read(input_surface, 2, 0, 2) mlen 1 rlen 8 {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; +send (16) 0 g46.0<1>UW g32<8,8,1>UW read(input_surface, 2, 0, 2) mlen 1 rlen 8 {align1}; +add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; +mov (1) g32.8<1>UD 0x1FUD {align1}; +send (16) 0 g54.0<1>UW g32<8,8,1>UW read(input_surface, 2, 0, 2) mlen 1 rlen 1 {align1}; + +add (16) g58.0<1>UW g38.0<16,16,1>UB g38.1<16,16,1>UB {align1}; +add (16) g59.0<1>UW g39.0<16,16,1>UB g39.1<16,16,1>UB {align1}; +add (16) g60.0<1>UW g40.0<16,16,1>UB g40.1<16,16,1>UB {align1}; +add (16) g61.0<1>UW g41.0<16,16,1>UB g41.1<16,16,1>UB {align1}; +add (16) g62.0<1>UW g42.0<16,16,1>UB g42.1<16,16,1>UB {align1}; +add (16) g63.0<1>UW g43.0<16,16,1>UB g43.1<16,16,1>UB {align1}; +add (16) g64.0<1>UW g44.0<16,16,1>UB g44.1<16,16,1>UB {align1}; +add (16) g65.0<1>UW g45.0<16,16,1>UB g45.1<16,16,1>UB {align1}; +add (16) g66.0<1>UW g46.0<16,16,1>UB g46.1<16,16,1>UB {align1}; +add (16) g67.0<1>UW g47.0<16,16,1>UB g47.1<16,16,1>UB {align1}; +add (16) g68.0<1>UW g48.0<16,16,1>UB g48.1<16,16,1>UB {align1}; +add (16) g69.0<1>UW g49.0<16,16,1>UB g49.1<16,16,1>UB {align1}; +add (16) g70.0<1>UW g50.0<16,16,1>UB g50.1<16,16,1>UB {align1}; +add (16) g71.0<1>UW g51.0<16,16,1>UB g51.1<16,16,1>UB {align1}; +add (16) g72.0<1>UW g52.0<16,16,1>UB g52.1<16,16,1>UB {align1}; +add (16) g73.0<1>UW g53.0<16,16,1>UB g53.1<16,16,1>UB {align1}; + +add (16) g58.0<1>UW g58.0<16,16,1>UW g39.0<16,16,1>UB {align1}; +add (16) g59.0<1>UW g59.0<16,16,1>UW g40.0<16,16,1>UB {align1}; +add (16) g60.0<1>UW g60.0<16,16,1>UW g41.0<16,16,1>UB {align1}; +add (16) g61.0<1>UW g61.0<16,16,1>UW g42.0<16,16,1>UB {align1}; +add (16) g62.0<1>UW g62.0<16,16,1>UW g43.0<16,16,1>UB {align1}; +add (16) g63.0<1>UW g63.0<16,16,1>UW g44.0<16,16,1>UB {align1}; +add (16) g64.0<1>UW g64.0<16,16,1>UW g45.0<16,16,1>UB {align1}; +add (16) g65.0<1>UW g65.0<16,16,1>UW g46.0<16,16,1>UB {align1}; +add (16) g66.0<1>UW g66.0<16,16,1>UW g47.0<16,16,1>UB {align1}; +add (16) g67.0<1>UW g67.0<16,16,1>UW g48.0<16,16,1>UB {align1}; +add (16) g68.0<1>UW g68.0<16,16,1>UW g49.0<16,16,1>UB {align1}; +add (16) g69.0<1>UW g69.0<16,16,1>UW g50.0<16,16,1>UB {align1}; +add (16) g70.0<1>UW g70.0<16,16,1>UW g51.0<16,16,1>UB {align1}; +add (16) g71.0<1>UW g71.0<16,16,1>UW g52.0<16,16,1>UB {align1}; +add (16) g72.0<1>UW g72.0<16,16,1>UW g53.0<16,16,1>UB {align1}; +add (16) g73.0<1>UW g73.0<16,16,1>UW g54.0<16,16,1>UB {align1}; + +add (16) g58.0<1>UW g58.0<16,16,1>UW g39.1<16,16,1>UB {align1}; +add (16) g59.0<1>UW g59.0<16,16,1>UW g40.1<16,16,1>UB {align1}; +add (16) g60.0<1>UW g60.0<16,16,1>UW g41.1<16,16,1>UB {align1}; +add (16) g61.0<1>UW g61.0<16,16,1>UW g42.1<16,16,1>UB {align1}; +add (16) g62.0<1>UW g62.0<16,16,1>UW g43.1<16,16,1>UB {align1}; +add (16) g63.0<1>UW g63.0<16,16,1>UW g44.1<16,16,1>UB {align1}; +add (16) g64.0<1>UW g64.0<16,16,1>UW g45.1<16,16,1>UB {align1}; +add (16) g65.0<1>UW g65.0<16,16,1>UW g46.1<16,16,1>UB {align1}; +add (16) g66.0<1>UW g66.0<16,16,1>UW g47.1<16,16,1>UB {align1}; +add (16) g67.0<1>UW g67.0<16,16,1>UW g48.1<16,16,1>UB {align1}; +add (16) g68.0<1>UW g68.0<16,16,1>UW g49.1<16,16,1>UB {align1}; +add (16) g69.0<1>UW g69.0<16,16,1>UW g50.1<16,16,1>UB {align1}; +add (16) g70.0<1>UW g70.0<16,16,1>UW g51.1<16,16,1>UB {align1}; +add (16) g71.0<1>UW g71.0<16,16,1>UW g52.1<16,16,1>UB {align1}; +add (16) g72.0<1>UW g72.0<16,16,1>UW g53.1<16,16,1>UB {align1}; +add (16) g73.0<1>UW g73.0<16,16,1>UW g54.1<16,16,1>UB {align1}; + +shr.sat (16) g58.0<1>UW g58.0<16,16,1>UW 2UW {align1}; +shr.sat (16) g59.0<1>UW g59.0<16,16,1>UW 2UW {align1}; +shr.sat (16) g60.0<1>UW g60.0<16,16,1>UW 2UW {align1}; +shr.sat (16) g61.0<1>UW g61.0<16,16,1>UW 2UW {align1}; +shr.sat (16) g62.0<1>UW g62.0<16,16,1>UW 2UW {align1}; +shr.sat (16) g63.0<1>UW g63.0<16,16,1>UW 2UW {align1}; +shr.sat (16) g64.0<1>UW g64.0<16,16,1>UW 2UW {align1}; +shr.sat (16) g65.0<1>UW g65.0<16,16,1>UW 2UW {align1}; +shr.sat (16) g66.0<1>UW g66.0<16,16,1>UW 2UW {align1}; +shr.sat (16) g67.0<1>UW g67.0<16,16,1>UW 2UW {align1}; +shr.sat (16) g68.0<1>UW g68.0<16,16,1>UW 2UW {align1}; +shr.sat (16) g69.0<1>UW g69.0<16,16,1>UW 2UW {align1}; +shr.sat (16) g70.0<1>UW g70.0<16,16,1>UW 2UW {align1}; +shr.sat (16) g71.0<1>UW g71.0<16,16,1>UW 2UW {align1}; +shr.sat (16) g72.0<1>UW g72.0<16,16,1>UW 2UW {align1}; +shr.sat (16) g73.0<1>UW g73.0<16,16,1>UW 2UW {align1}; diff --git a/src/shaders/post_processing/Common/AYUV_Load_16x8.asm b/src/shaders/post_processing/Common/AYUV_Load_16x8.asm new file mode 100644 index 00000000..f6c3a336 --- /dev/null +++ b/src/shaders/post_processing/Common/AYUV_Load_16x8.asm @@ -0,0 +1,53 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: AYUV_Load_16x8.asm +//---------------------------------------------------------------- + + +#include "AYUV_Load_16x8.inc" + +// In order to load 64x8 AYUV data (16x8 pixels), we need to divide the data +// into two regions and load them separately. +// +// 32 byte 32 byte +//|----------------|----------------| +//| | | +//| A | B |8 +//| | | +//| | | +//|----------------|----------------| + +// Load the first 32x8 data block +// Packed data block should be loaded as 32x8 pixel block + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Block origin + shl (1) rMSGSRC.0<1>:d acc0:w 2:w { NoDDClr } // H. block origin need to be four times larger + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_YUV:ud { NoDDChk } // Block width and height (32x8) + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_YUV(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_YUV+nBI_CURRENT_SRC_YUV:ud + +//Load the second 32x8 data block +// Offset the origin X - move to next 32 colomns + add (1) rMSGSRC.0<1>:d rMSGSRC.0<0;1,0>:d 32:w // Increase X origin by 8 + +// Size stays the same - 32x8 + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud // Copy message description to message header + send (8) udSRC_YUV(8)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_YUV+nBI_CURRENT_SRC_YUV:ud + +// Give AYUV region addresses to address register + mov (1) SRC_YUV_OFFSET<1>:ud 0x00400038*32:ud //Address registers contain starting addresses of two halves + +//Directly move the data to destination + $for(0; <nY_NUM_OF_ROWS; 1) { + mov (16) uwDEST_Y(%1)<1> r[SRC_YUV_OFFSET,%1*32+2]<8,4>:ub + mov (16) uwDEST_U(%1)<1> r[SRC_YUV_OFFSET,%1*32+1]<8,4>:ub + mov (16) uwDEST_V(%1)<1> r[SRC_YUV_OFFSET,%1*32+0]<8,4>:ub + } +
\ No newline at end of file diff --git a/src/shaders/post_processing/Common/AYUV_Load_16x8.inc b/src/shaders/post_processing/Common/AYUV_Load_16x8.inc new file mode 100644 index 00000000..422dfb3d --- /dev/null +++ b/src/shaders/post_processing/Common/AYUV_Load_16x8.inc @@ -0,0 +1,43 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: AYUV_Load_16x8.inc +// +// AYUV data are first loaded to bottom I/O REGION_2, then unpacked to planar data +// and stored in top I/O REGION_1 + +#undef nY_NUM_OF_ROWS + +#define nY_NUM_OF_ROWS 8 // Number of Y rows per block + +#define nDPR_BLOCK_SIZE_YUV nBLOCK_WIDTH_32+nBLOCK_HEIGHT_8 // Y block size 32x8 +#define nDPR_MSG_SIZE_YUV nRESLEN_8 // # of MRF's to hold Y block data (8) + +//Temporary storage for unpacked AYUV data +#define rUNPACK_TEMP REG(r,nTEMP0) +.declare udUNPACK_TEMP Base=rUNPACK_TEMP ElementSize=4 SrcRegion=<8;8,1> Type=ud //1 GRF +.declare ubUNPACK_TEMP Base=rUNPACK_TEMP ElementSize=1 SrcRegion=<32;32,1> Type=ub //1 GRF + +.declare ubBOT_Y_IO Base=REG(r,nBOT_Y) ElementSize=1 SrcRegion=REGION(32,1) Type=ub + + +#define udSRC_YUV udBOT_Y_IO +#define ubSRC_YUV ubBOT_Y_IO +#define nSRC_YUV_REG nBOT_Y + +#define uwDEST_Y uwTOP_Y +#define uwDEST_U uwTOP_U +#define uwDEST_V uwTOP_V + +#define SRC_YUV_OFFSET a0.0 + +#define nSRC_REGION nREGION_1 // REGION_1 will be the source region for first kernel + +// End of AYUV_Load_16x8.inc diff --git a/src/shaders/post_processing/Common/Expansion.inc b/src/shaders/post_processing/Common/Expansion.inc new file mode 100644 index 00000000..7f3d5aae --- /dev/null +++ b/src/shaders/post_processing/Common/Expansion.inc @@ -0,0 +1,31 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: Expansion.inc +// Number of U/V rows per block definition +#undef nUV_NUM_OF_ROWS +#ifdef EXPAND_9x5 + #define nUV_NUM_OF_ROWS 6 +#else + #define nUV_NUM_OF_ROWS 8 +#endif + +// Source/destination region definitions +#undef uwDEST_U +#undef uwDEST_V +#if (nSRC_REGION==nREGION_1) + #define uwDEST_U uwTOP_U + #define uwDEST_V uwTOP_V +#elif (nSRC_REGION==nREGION_2) + #define uwDEST_U uwBOT_U + #define uwDEST_V uwBOT_V +#endif + +// End of Expansion.inc diff --git a/src/shaders/post_processing/Common/IMC3_Load_8x4.asm b/src/shaders/post_processing/Common/IMC3_Load_8x4.asm new file mode 100644 index 00000000..28171752 --- /dev/null +++ b/src/shaders/post_processing/Common/IMC3_Load_8x4.asm @@ -0,0 +1,47 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: IMC3_Load_8x4.asm +// +//---------------------------------------------------------------- + +#define IMC3_LOAD_8x4 +#include "PL3_Load.inc" + +// Load 16x8 planar Y ---------------------------------------------------------- + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin +#if !defined(LOAD_UV_ONLY) + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_Y:ud // Block width and height (16x8) + + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_Y(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_CURRENT_SRC_Y:ud +#endif + +// Load 8x4 planar U and V ----------------------------------------------------- + asr (2) rMSGSRC.0<1>:d rMSGSRC.0<2;2,1>:d 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (8x4) + + mov (8) mMSGHDRU<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_U(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_U:ud + mov (8) mMSGHDRV<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_V(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_V:ud + +// Convert to word-aligned format ---------------------------------------------- +#if !defined(LOAD_UV_ONLY) + $for (nY_NUM_OF_ROWS-1; >-1; -1) { + mov (16) uwDEST_Y(0,%1*16)<1> ubSRC_Y(0,%1*16) + } +#endif + $for (nUV_NUM_OF_ROWS/2-1; >-1; -1) { + mov (16) uwDEST_U(0, %1*16)<1> ubSRC_U(0, %1*16) + mov (16) uwDEST_V(0, %1*16)<1> ubSRC_V(0, %1*16) + } + +// End of IMC3_Load_8x4 diff --git a/src/shaders/post_processing/Common/IMC3_Load_8x5.asm b/src/shaders/post_processing/Common/IMC3_Load_8x5.asm new file mode 100644 index 00000000..3c96e727 --- /dev/null +++ b/src/shaders/post_processing/Common/IMC3_Load_8x5.asm @@ -0,0 +1,47 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: IMC3_Load_8x5.asm +// +//---------------------------------------------------------------- + +#define IMC3_LOAD_8x5 +#include "PL3_Load.inc" + +// Load 16x8 planar Y ---------------------------------------------------------- + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin +#if !defined(LOAD_UV_ONLY) + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_Y:ud // Block width and height (16x8) + + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_Y(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_CURRENT_SRC_Y:ud +#endif + +// Load 8x5 planar U and V ----------------------------------------------------- + asr (2) rMSGSRC.0<1>:d rMSGSRC.0<2;2,1>:d 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (8x5) + + mov (8) mMSGHDRU<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_U(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_U:ud + mov (8) mMSGHDRV<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_V(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_V:ud + +// Convert to word-aligned format ---------------------------------------------- +#if !defined(LOAD_UV_ONLY) + $for (nY_NUM_OF_ROWS-1; >-1; -1) { + mov (16) uwDEST_Y(0,%1*16)<1> ubSRC_Y(0,%1*16) + } +#endif + $for (nUV_NUM_OF_ROWS/2-1; >-1; -1) { + mov (16) uwDEST_U(0, %1*16)<1> ubSRC_U(0, %1*16) + mov (16) uwDEST_V(0, %1*16)<1> ubSRC_V(0, %1*16) + } + +// End of IMC3_Load_8x5 diff --git a/src/shaders/post_processing/Common/IMC3_Load_9x5.asm b/src/shaders/post_processing/Common/IMC3_Load_9x5.asm new file mode 100644 index 00000000..d286cbbb --- /dev/null +++ b/src/shaders/post_processing/Common/IMC3_Load_9x5.asm @@ -0,0 +1,50 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: IMC3_Load_9x5.asm +// +//---------------------------------------------------------------- +// This module loads 16x8 Y, 9x5 U and 9x5 V planar data blocks for CSC module +// and stores it in byte-aligned format. +//---------------------------------------------------------------- + +#define IMC3_LOAD_9x5 +#include "PL3_Load.inc" + +// Load 16x8 planar Y ---------------------------------------------------------- + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin +#if !defined(LOAD_UV_ONLY) + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_Y:ud // Block width and height (16x8) + + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_Y(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_CURRENT_SRC_Y:ud +#endif + +// Load 9x5 planar U and V ----------------------------------------------------- + asr (2) rMSGSRC.0<1>:d rMSGSRC.0<2;2,1>:d 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (12x5) + + mov (8) mMSGHDRU<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_U(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_U:ud + mov (8) mMSGHDRV<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_V(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_V:ud + +// Convert to word-aligned format ---------------------------------------------- +#if !defined(LOAD_UV_ONLY) + $for (nY_NUM_OF_ROWS-1; >-1; -1) { + mov (16) uwDEST_Y(0,%1*16)<1> ubSRC_Y(0,%1*16) + } +#endif + $for(nUV_NUM_OF_ROWS-2; >-1; -1) { + mov (16) uwDEST_U(0, %1*16)<1> ubSRC_U(0, %1*16) + mov (16) uwDEST_V(0, %1*16)<1> ubSRC_V(0, %1*16) + } + +// End of IMC3_Load_9x5 diff --git a/src/shaders/post_processing/Common/Init_All_Regs.asm b/src/shaders/post_processing/Common/Init_All_Regs.asm new file mode 100644 index 00000000..cb0fd414 --- /dev/null +++ b/src/shaders/post_processing/Common/Init_All_Regs.asm @@ -0,0 +1,18 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +#ifdef GT // to remove error messages of un-initialized GRF + .declare udGRF_space Base=r0.0 ElementSize=4 SrcRegion=REGION(8,1) Type=ud + + $for (7; <80; 1) { + mov (8) udGRF_space(%1)<1> 0:ud + } +#else +#endif
\ No newline at end of file diff --git a/src/shaders/post_processing/Common/Multiple_Loop.asm b/src/shaders/post_processing/Common/Multiple_Loop.asm new file mode 100644 index 00000000..324e1348 --- /dev/null +++ b/src/shaders/post_processing/Common/Multiple_Loop.asm @@ -0,0 +1,84 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +///////////////////////////////////////////////////////////////////////////////// +// Multiple_Loop.asm + + +// This lable is for satisfying component kernel build. +// DL will remove this label and reference the real one in Multiple_Loop_Head.asm. +#if defined(COMPONENT) +VIDEO_PROCESSING_LOOP: +#endif + + +//===== Possible build flags for component kernels +// 1) INC_SCALING +// 2) INC_BLENDING +// 3) INC_BLENDING and INC_SCALING +// 4) (no flags) + + +#define MxN_MULTIPLE_BLOCKS + +//------------------------------------------------------------------------------ +#if defined(MxN_MULTIPLE_BLOCKS) +// Do Multiple Block Processing ------------------------------------------------ + + // The 1st block has been processed before entering the loop + + // Processed all blocks? + add.z.f0.0 (1) wNUM_BLKS:w wNUM_BLKS:w -1:w + + // Reached multi-block width? + add (1) wORIX:w wORIX:w 16:w + cmp.l.f0.1 (1) null:w wORIX:w wFRAME_ENDX:w // acc0.0 has wORIX + + #if defined(INC_SCALING) + // Update SRC_VID_H_ORI for scaling + mul (1) REG(r,nTEMP0):f fVIDEO_STEP_X:f 16.0:f + add (1) fSRC_VID_H_ORI:f REG(r,nTEMP0):f fSRC_VID_H_ORI:f + #endif + + #if defined(INC_BLENDING) + // Update SRC_ALPHA_H_ORI for blending + mul (1) REG(r,nTEMP0):f fALPHA_STEP_X:f 16.0:f + add (1) fSRC_ALPHA_H_ORI:f REG(r,nTEMP0):f fSRC_ALPHA_H_ORI:f + #endif + + (f0.0)jmpi (1) END_VIDEO_PROCESSING // All blocks are done - Exit loop + + (f0.1)jmpi (1) VIDEO_PROCESSING_LOOP // If not the end of row, goto the beginning of the loop + + //If end of row, restart Horizontal offset and calculate Vertical offsets next row. + mov (1) wORIX:w wCOPY_ORIX:w + add (1) wORIY:w wORIY:w 8:w + + #if defined(INC_SCALING) + // Update SRC_VID_H_ORI and SRC_VID_V_ORI for scaling + mov (1) fSRC_VID_H_ORI:f fFRAME_VID_ORIX:f // Reset normalised X origin to 0 for video and alpha + mul (1) REG(r,nTEMP0):f fVIDEO_STEP_Y:f 8.0:f + add (1) fSRC_VID_V_ORI:f REG(r,nTEMP0):f fSRC_VID_V_ORI:f + #endif + + #if defined(INC_BLENDING) + // Update SRC_ALPHA_H_ORI and SRC_ALPHA_V_ORI for blending + mov (1) fSRC_ALPHA_H_ORI:f fFRAME_ALPHA_ORIX:f // Reset normalised X origin to 0 for video and alpha + mul (1) REG(r,nTEMP0):f fALPHA_STEP_Y:f 8.0:f + add (1) fSRC_ALPHA_V_ORI:f REG(r,nTEMP0):f fSRC_ALPHA_V_ORI:f + #endif + + jmpi (1) VIDEO_PROCESSING_LOOP // Continue Loop + +END_VIDEO_PROCESSING: + nop + +#endif +END_THREAD // End of Thread
\ No newline at end of file diff --git a/src/shaders/post_processing/Common/Multiple_Loop_Head.asm b/src/shaders/post_processing/Common/Multiple_Loop_Head.asm new file mode 100644 index 00000000..77d8b94f --- /dev/null +++ b/src/shaders/post_processing/Common/Multiple_Loop_Head.asm @@ -0,0 +1,23 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +////////////////////////////////////////////////////////////////////////////////// +// Multiple_Loop_Head.asm +// This code sets up the loop control for multiple blocks per thread + + mul (1) wFRAME_ENDX:w ubBLK_CNT_X:ub 16:uw { NoDDClr } // Build multi-block loop counters + mov (1) wNUM_BLKS:w ubNUM_BLKS:ub { NoDDClr, NoDDChk } // Copy num blocks to word variable + mov (1) wCOPY_ORIX:w wORIX:w { NoDDChk } // Copy multi-block origin in pixel + mov (2) fFRAME_VID_ORIX<1>:f fSRC_VID_H_ORI<4;2,2>:f // Copy src video origin for scaling, and alpha origin for blending + add (1) wFRAME_ENDX:w wFRAME_ENDX:w wORIX:w // Continue building multi-block loop counters + +VIDEO_PROCESSING_LOOP: // Loop back entry point as the biginning of the loop for multiple blocks + +// Beginning of the loop diff --git a/src/shaders/post_processing/Common/NV11_Load_4x8.asm b/src/shaders/post_processing/Common/NV11_Load_4x8.asm new file mode 100644 index 00000000..54af8d1e --- /dev/null +++ b/src/shaders/post_processing/Common/NV11_Load_4x8.asm @@ -0,0 +1,42 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: NV11_Load_4x8.asm +//---------------------------------------------------------------- + +#define NV11_LOAD_4x8 +#include "PL2_Load.inc" + +// Load 16x8 NV11 Y ------------------------------------------------------------ + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin +#if !defined(LOAD_UV_ONLY) + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_Y:ud // Y block width and height (16x8) + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_Y(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_CURRENT_SRC_Y:ud +#endif + +// Load 8x8 NV11 UV ---------------------------------------------------------- + asr (1) rMSGSRC.0<1>:d rMSGSRC.0<0;1,0>:d 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (8x8) + mov (8) mMSGHDRU<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_U(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_UV:ud + +// Convert to word-aligned format ---------------------------------------------- +#if !defined(LOAD_UV_ONLY) + $for (nY_NUM_OF_ROWS-1; >-1; -1) { + mov (16) uwDEST_Y(0,%1*16)<1> ubSRC_Y(0,%1*16) + } +#endif + $for (nUV_NUM_OF_ROWS/4-1; >-1; -1) { + mov (16) uwDEST_U(0,%1*16)<1> ubSRC_U(0,%1*32)<32;16,2> + mov (16) uwDEST_V(0,%1*16)<1> ubSRC_U(0,%1*32+1)<32;16,2> + } + +// End of NV11_Load_4x8 diff --git a/src/shaders/post_processing/Common/NV11_Load_5x8.asm b/src/shaders/post_processing/Common/NV11_Load_5x8.asm new file mode 100644 index 00000000..86a1d355 --- /dev/null +++ b/src/shaders/post_processing/Common/NV11_Load_5x8.asm @@ -0,0 +1,42 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: NV11_Load_5x8.asm +//---------------------------------------------------------------- + +#define NV11_LOAD_5x8 +#include "PL2_Load.inc" + +// Load 16x8 NV11 Y ------------------------------------------------------------ + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin +#if !defined(LOAD_UV_ONLY) + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_Y:ud // Y block width and height (16x8) + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_Y(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_CURRENT_SRC_Y:ud +#endif + +// Load 12x8 NV11 UV --------------------------------------------------------- + asr (1) rMSGSRC.0<1>:d rMSGSRC.0<0;1,0>:d 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (12x8) + mov (8) mMSGHDRU<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_U(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_UV:ud + +// Convert to word-aligned format ---------------------------------------------- +#if !defined(LOAD_UV_ONLY) + $for (nY_NUM_OF_ROWS-1; >-1; -1) { + mov (16) uwDEST_Y(0,%1*16)<1> ubSRC_Y(0,%1*16) + } +#endif + $for (nUV_NUM_OF_ROWS/2-1; >-1; -1) { + mov (16) uwDEST_U(0,%1*16)<1> ubSRC_U(0,%1*32)<16;8,2> + mov (16) uwDEST_V(0,%1*16)<1> ubSRC_U(0,%1*32+1)<16;8,2> + } + +// End of NV11_Load_5x8 diff --git a/src/shaders/post_processing/Common/NV12_Load_8x4.asm b/src/shaders/post_processing/Common/NV12_Load_8x4.asm new file mode 100644 index 00000000..dbc47d4c --- /dev/null +++ b/src/shaders/post_processing/Common/NV12_Load_8x4.asm @@ -0,0 +1,42 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: NV12_Load_8x4.asm +//---------------------------------------------------------------- + +#define NV12_LOAD_8x4 +#include "PL2_Load.inc" + +// Load 16x8 planar Y ---------------------------------------------------------- + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin +#if !defined(LOAD_UV_ONLY) + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_Y:ud // Y block width and height (16x8) + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_Y(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_CURRENT_SRC_Y:ud +#endif + +// Load 8x4 planar U and V ----------------------------------------------------- + asr (1) rMSGSRC.1<1>:d rMSGSRC.1<0;1,0>:d 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (16x4) + mov (8) mMSGHDRU<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_U(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_UV:ud + +// Convert to word-aligned format ---------------------------------------------- +#if !defined(LOAD_UV_ONLY) + $for (nY_NUM_OF_ROWS-1; >-1; -1) { + mov (16) uwDEST_Y(0,%1*16)<1> ubSRC_Y(0,%1*16) + } +#endif + $for (nUV_NUM_OF_ROWS/2-1; >-1; -1) { + mov (16) uwDEST_U(0,%1*16)<1> ubSRC_U(0,%1*32)<32;16,2> + mov (16) uwDEST_V(0,%1*16)<1> ubSRC_U(0,%1*32+1)<32;16,2> + } + +// End of NV12_Load_8x4 diff --git a/src/shaders/post_processing/Common/NV12_Load_8x5.asm b/src/shaders/post_processing/Common/NV12_Load_8x5.asm new file mode 100644 index 00000000..85f5ec7f --- /dev/null +++ b/src/shaders/post_processing/Common/NV12_Load_8x5.asm @@ -0,0 +1,42 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: NV12_Load_8x5.asm +//---------------------------------------------------------------- + +#define NV12_LOAD_8x5 +#include "PL2_Load.inc" + +// Load 16x8 planar Y ---------------------------------------------------------- + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin +#if !defined(LOAD_UV_ONLY) + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_Y:ud // Y block width and height (16x8) + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_Y(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_CURRENT_SRC_Y:ud +#endif + +// Load 8x5 planar U and V ----------------------------------------------------- + asr (1) rMSGSRC.1<1>:d rMSGSRC.1<0;1,0>:d 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (16x5) + mov (8) mMSGHDRU<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_U(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_UV:ud + +// Convert to word-aligned format ---------------------------------------------- +#if !defined(LOAD_UV_ONLY) + $for (nY_NUM_OF_ROWS-1; >-1; -1) { + mov (16) uwDEST_Y(0,%1*16)<1> ubSRC_Y(0,%1*16) + } +#endif + $for (nUV_NUM_OF_ROWS/2-1; >-1; -1) { + mov (16) uwDEST_U(0,%1*16)<1> ubSRC_U(0,%1*32)<16;8,2> + mov (16) uwDEST_V(0,%1*16)<1> ubSRC_U(0,%1*32+1)<16;8,2> + } + +// End of NV12_Load_8x5 diff --git a/src/shaders/post_processing/Common/NV12_Load_9x5.asm b/src/shaders/post_processing/Common/NV12_Load_9x5.asm new file mode 100644 index 00000000..b19f0b2a --- /dev/null +++ b/src/shaders/post_processing/Common/NV12_Load_9x5.asm @@ -0,0 +1,42 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: NV12_Load_9x5.asm +//---------------------------------------------------------------- + +#define NV12_LOAD_9x5 +#include "PL2_Load.inc" + +// Load 16x8 planar Y ---------------------------------------------------------- + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin +#if !defined(LOAD_UV_ONLY) + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_Y:ud // Y block width and height (16x8) + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_Y(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_CURRENT_SRC_Y:ud +#endif + +// Load 9x5 planar U and V ----------------------------------------------------- + asr (1) rMSGSRC.1<1>:d rMSGSRC.1<0;1,0>:d 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (20x5) + mov (8) mMSGHDRU<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_U(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_UV:ud + +// Convert to word-aligned format ---------------------------------------------- +#if !defined(LOAD_UV_ONLY) + $for (nY_NUM_OF_ROWS-1; >-1; -1) { + mov (16) uwDEST_Y(0,%1*16)<1> ubSRC_Y(0,%1*16) + } +#endif + $for(nUV_NUM_OF_ROWS-2; >-1; -1) { + mov (16) uwDEST_U(0,%1*16)<1> ubSRC_U(0,%1*32)<16;8,2> + mov (16) uwDEST_V(0,%1*16)<1> ubSRC_U(0,%1*32+1)<16;8,2> + } + +// End of NV12_Load_9x5 diff --git a/src/shaders/post_processing/Common/P208_Load_8x8.asm b/src/shaders/post_processing/Common/P208_Load_8x8.asm new file mode 100644 index 00000000..70d07ebc --- /dev/null +++ b/src/shaders/post_processing/Common/P208_Load_8x8.asm @@ -0,0 +1,41 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: P208_Load_8x8.asm +//---------------------------------------------------------------- + +#define P208_LOAD_8x8 +#include "PL2_Load.inc" + + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_Y:ud // Y Block width and height (16x8) (U/V block size is the same) + +// Load 16x8 P208 Y ------------------------------------------------------------ +#if !defined(LOAD_UV_ONLY) + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_Y(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_CURRENT_SRC_Y:ud +#endif + + // Load 16x8 planar UV ----------------------------------------------------- + mov (8) mMSGHDRU<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_U(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_UV:ud + +// Convert to word-aligned format ---------------------------------------------- +#if !defined(LOAD_UV_ONLY) + $for (0; <nY_NUM_OF_ROWS; 1) { + mov (16) uwDEST_Y(0,%1*16) ubSRC_Y(0,%1*16) + } +#endif + $for (0; <nUV_NUM_OF_ROWS/2; 1) { + mov (16) uwDEST_U(0,%1*16) ubSRC_U(0,%1*32)<32;16,2> + mov (16) uwDEST_V(0,%1*16) ubSRC_U(0,%1*32+1)<32;16,2> + } + +// End of P208_Load_8x8.asm diff --git a/src/shaders/post_processing/Common/P208_Load_9x8.asm b/src/shaders/post_processing/Common/P208_Load_9x8.asm new file mode 100644 index 00000000..c6ff086f --- /dev/null +++ b/src/shaders/post_processing/Common/P208_Load_9x8.asm @@ -0,0 +1,42 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: P208_Load_9x8.asm +//---------------------------------------------------------------- + +#define P208_LOAD_9x8 +#include "PL2_Load.inc" + + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin + +// Load 16x8 P208 Y ------------------------------------------------------------ +#if !defined(LOAD_UV_ONLY) + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_Y:ud // Y block width and height (16x8) + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_Y(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_CURRENT_SRC_Y:ud +#endif + + // Load 16x8 planar UV ----------------------------------------------------- + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (20x8) + mov (8) mMSGHDRU<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_U(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_UV:ud + +// Convert to word-aligned format ---------------------------------------------- +#if !defined(LOAD_UV_ONLY) + $for (0; <nY_NUM_OF_ROWS; 1) { + mov (16) uwDEST_Y(0,%1*16) ubSRC_Y(0,%1*16) + } +#endif + $for (0; <nUV_NUM_OF_ROWS; 1) { + mov (16) uwDEST_U(0,%1*16) ubSRC_U(0,%1*32)<32;16,2> + mov (16) uwDEST_V(0,%1*16) ubSRC_U(0,%1*32+1)<32;16,2> + } + +// End of P208_Load_9x8.asm diff --git a/src/shaders/post_processing/Common/PA_Load.inc b/src/shaders/post_processing/Common/PA_Load.inc new file mode 100644 index 00000000..dee657e3 --- /dev/null +++ b/src/shaders/post_processing/Common/PA_Load.inc @@ -0,0 +1,42 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: PA_Load.inc +// +// YUV422 data are first loaded to bottom I/O REGION_2, then unpacked to planar data +// and stored in top I/O REGION_1 + +#undef nY_NUM_OF_ROWS +#undef nUV_NUM_OF_ROWS + +#define nY_NUM_OF_ROWS 8 // Number of Y rows per block +#define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block + +#if defined(PA_LOAD_8x8) + #define nDPR_BLOCK_SIZE_YUV nBLOCK_WIDTH_32+nBLOCK_HEIGHT_8 // Y block size 32x8 + #define nDPR_MSG_SIZE_YUV nRESLEN_8 // # of MRF's to hold Y block data (8) +#endif +#if defined(PA_LOAD_9x8) + #define nDPR_BLOCK_SIZE_YUV_MAIN nBLOCK_WIDTH_32+nBLOCK_HEIGHT_8 // Main YUV block size 32x8 + #define nDPR_MSG_SIZE_YUV_MAIN nRESLEN_8 // # of MRF's to hold Y block data (8) + #define nDPR_BLOCK_SIZE_YUV_ADDITION nBLOCK_WIDTH_4+nBLOCK_HEIGHT_8 // Additional YUV block size 4x8 + #define nDPR_MSG_SIZE_YUV_ADDITION nRESLEN_1 // # of MRF's to hold Y block data (8) +#endif + +#define udSRC_YUV udBOT_Y_IO +#define nSRC_YUV_REG nBOT_Y + +#define uwDEST_Y uwTOP_Y +#define uwDEST_U uwTOP_U +#define uwDEST_V uwTOP_V + +#define nSRC_REGION nREGION_1 // REGION_1 will be the source region for first kernel + +// End of PA_Load.inc diff --git a/src/shaders/post_processing/Common/PA_Load_8x8.asm b/src/shaders/post_processing/Common/PA_Load_8x8.asm new file mode 100644 index 00000000..3569bd1c --- /dev/null +++ b/src/shaders/post_processing/Common/PA_Load_8x8.asm @@ -0,0 +1,33 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: PA_Load_8x8.asm +//---------------------------------------------------------------- + +#define PA_LOAD_8x8 +#include "PA_Load.inc" + +// Load 16x8 packed data block +// Packed data block should be loaded as 32x8 pixel block + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Block origin + shl (1) rMSGSRC.0<1>:d acc0:w 1:w // H. block origin need to be doubled + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_YUV:ud // Block width and height (32x8) + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_YUV(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_YUV+nBI_CURRENT_SRC_YUV:ud + +// Unpack to "planar" YUV422 format in word-aligned bytes + add (4) pCF_Y_OFFSET<1>:uw ubSRC_CF_OFFSET<4;4,1>:ub nSRC_YUV_REG*nGRFWIB:w // Initial Y,U,V offset in YUV422 block + $for(0; <nY_NUM_OF_ROWS; 1) { + mov (16) uwDEST_Y(0, %1*16)<1> r[pCF_Y_OFFSET, %1*nGRFWIB]REGION(16,2) + mov (8) uwDEST_U(0, %1*8)<1> r[pCF_U_OFFSET, %1*nGRFWIB]REGION(8,4) + mov (8) uwDEST_V(0, %1*8)<1> r[pCF_V_OFFSET, %1*nGRFWIB]REGION(8,4) + } + +// End of PA_Load_8x8 diff --git a/src/shaders/post_processing/Common/PA_Load_9x8.asm b/src/shaders/post_processing/Common/PA_Load_9x8.asm new file mode 100644 index 00000000..90e56e7c --- /dev/null +++ b/src/shaders/post_processing/Common/PA_Load_9x8.asm @@ -0,0 +1,47 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: PA_Load_9x8.asm +//---------------------------------------------------------------- +// This module loads 16x8 Y, 9x8 U and 9x8 V planar data blocks for CSC module +// and stores it in word-aligned format. +//---------------------------------------------------------------- + +#define PA_LOAD_9x8 +#include "PA_Load.inc" + +// Load 18x8 packed data block +// Packed data block should be loaded as 36x8 pixel block + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Block origin + shl (1) rMSGSRC.0<1>:d acc0:w 1:w // H. block origin need to be doubled + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_YUV_MAIN:ud // Block width and height (32x8) + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_YUV(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_YUV_MAIN+nBI_CURRENT_SRC_YUV:ud + + add (1) rMSGSRC.0<1>:d rMSGSRC.0:d 32:w //the last 4 pixels are read again for optimization + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_YUV_ADDITION:ud // Block width and height (4x8) + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_YUV(8)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_YUV_ADDITION+nBI_CURRENT_SRC_YUV:ud + +// Unpack to "planar" YUV422 format in word-aligned bytes + add (4) pCF_Y_OFFSET<1>:uw ubSRC_CF_OFFSET<4;4,1>:ub nSRC_YUV_REG*nGRFWIB:w // Initial Y,U,V offset in YUV422 block + $for(0; <nY_NUM_OF_ROWS; 1) { + mov (16) uwDEST_Y(0, %1*16)<1> r[pCF_Y_OFFSET, %1*nGRFWIB]REGION(16,2) + mov (8) uwDEST_U(0, %1*16)<1> r[pCF_U_OFFSET, %1*nGRFWIB]REGION(8,4) + mov (8) uwDEST_V(0, %1*16)<1> r[pCF_V_OFFSET, %1*nGRFWIB]REGION(8,4) + } + + $for(0; <nUV_NUM_OF_ROWS; 1) { + mov (1) uwDEST_U(0, %1*16+8)<1> r[pCF_U_OFFSET, %1*4+256]REGION(1,0) + mov (1) uwDEST_V(0, %1*16+8)<1> r[pCF_V_OFFSET, %1*4+256]REGION(1,0) + } + //UV expansion done in PL9x8_PL16x8.asm module + +// End of PA_Load_9x8 diff --git a/src/shaders/post_processing/Common/PL16x8_PL8x4.asm b/src/shaders/post_processing/Common/PL16x8_PL8x4.asm new file mode 100644 index 00000000..4461c896 --- /dev/null +++ b/src/shaders/post_processing/Common/PL16x8_PL8x4.asm @@ -0,0 +1,38 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: PL16x8_PL8x4.asm +//---------------------------------------------------------------- + +#include "common.inc" + +#ifndef DEST_U //DEST_U, DEST_V not defined + + #if (nSRC_REGION==nREGION_1) + #define DEST_Y uwTOP_Y + #define DEST_U uwTOP_U + #define DEST_V uwTOP_V + #elif (nSRC_REGION==nREGION_2) + #define DEST_Y uwBOT_Y + #define DEST_U uwBOT_U + #define DEST_V uwBOT_V + #endif + +#endif + +//Convert 444 from sampler to 422 +$for (0, 0; <8; 2, 1) { + mov (8) DEST_U(0,%2*8)<1> DEST_U(%1)<16;8,2> + mov (8) DEST_V(0,%2*8)<1> DEST_V(%1)<16;8,2> +} + +// Re-define new number of lines +#undef nUV_NUM_OF_ROWS +#define nUV_NUM_OF_ROWS 4 diff --git a/src/shaders/post_processing/Common/PL16x8_PL8x8.asm b/src/shaders/post_processing/Common/PL16x8_PL8x8.asm new file mode 100644 index 00000000..fd592dba --- /dev/null +++ b/src/shaders/post_processing/Common/PL16x8_PL8x8.asm @@ -0,0 +1,36 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: PL16x8_PL8x8.asm +//---------------------------------------------------------------- + +#include "common.inc" + +#ifndef DEST_U + + //DEST_U, DEST_V not defined + #if (nSRC_REGION==nREGION_1) + #define DEST_Y uwTOP_Y + #define DEST_U uwTOP_U + #define DEST_V uwTOP_V + #elif (nSRC_REGION==nREGION_2) + #define DEST_Y uwBOT_Y + #define DEST_U uwBOT_U + #define DEST_V uwBOT_V + #endif + +#endif + + +//Convert 444 from sampler to 422 +$for (0, 0; <8; 2, 1) { + mov DEST_U(%2)<1> DEST_U(%1)<16;8,2> + mov DEST_V(%2)<1> DEST_V(%1)<16;8,2> +} diff --git a/src/shaders/post_processing/Common/PL2_Load.inc b/src/shaders/post_processing/Common/PL2_Load.inc new file mode 100644 index 00000000..9feeba66 --- /dev/null +++ b/src/shaders/post_processing/Common/PL2_Load.inc @@ -0,0 +1,78 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: PL2_Load.inc + +#undef nY_NUM_OF_ROWS +#undef nUV_NUM_OF_ROWS + +#define nY_NUM_OF_ROWS 8 // Number of Y rows per block +#define nDPR_BLOCK_SIZE_Y nBLOCK_WIDTH_16+nBLOCK_HEIGHT_8 // Y block size 16x8 +#define nDPR_MSG_SIZE_Y nRESLEN_4 // # of MRF's to hold Y block data (4) + + +#if defined(NV11_LOAD_4x8) + #define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block + #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_8+nBLOCK_HEIGHT_8 // U/V block size 8x8 + #define nDPR_MSG_SIZE_UV nRESLEN_2 // # of MRF's to hold U/V block data (2) +#endif + +#if defined(NV11_LOAD_5x8) + #define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block + #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_12+nBLOCK_HEIGHT_8 // U/V block size 12x8 + #define nDPR_MSG_SIZE_UV nRESLEN_4 // # of MRF's to hold U/V block data (4) +#endif +#if defined(NV12_LOAD_8x4) + #define nUV_NUM_OF_ROWS 4 // Number of U/V rows per block + #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_16+nBLOCK_HEIGHT_4 // U/V block size 16x4 + #define nDPR_MSG_SIZE_UV nRESLEN_2 // # of MRF's to hold U/V block data (2) +#endif +#if defined(NV12_LOAD_8x5) + #define nUV_NUM_OF_ROWS 6 // Number of U/V rows per block (Rounded Up to Nearest Even Number) + #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_16+nBLOCK_HEIGHT_5 // U/V block size 16x5 + #define nDPR_MSG_SIZE_UV nRESLEN_3 // # of MRF's to hold U/V block data (3) +#endif +#if defined(NV12_LOAD_9x5) + #define nUV_NUM_OF_ROWS 6 // Number of U/V rows per block (Rounded Up to Nearest Even Number) + #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_20+nBLOCK_HEIGHT_5 // U/V block size 20x5 + #define nDPR_MSG_SIZE_UV nRESLEN_5 // # of MRF's to hold U/V block data (5) +#endif +#if defined(P208_LOAD_8x8) + #define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block + #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_16+nBLOCK_HEIGHT_8 // U/V block size 16x8 + #define nDPR_MSG_SIZE_UV nRESLEN_4 // # of MRF's to hold U/V block data (4) +#endif +#if defined(P208_LOAD_9x8) + #define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block + #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_20+nBLOCK_HEIGHT_8 // U/V block size 20x8 + #define nDPR_MSG_SIZE_UV nRESLEN_8 // # of MRF's to hold U/V block data (8) +#endif + +// Source/destination region definitions +#if !defined(udSRC_Y) + #define udSRC_Y udBOT_Y_IO // Default Y source region is top Y region +#endif + +#if !defined(udSRC_U) + #define udSRC_U udBOT_U_IO // Default U source region is top U region +#endif + +#define ubSRC_Y ubBOT_Y +#define nSRC_Y_REG nBOT_Y +#define ubSRC_U ubBOT_U +#define nSRC_U_REG nBOT_U + +#define uwDEST_Y uwTOP_Y // However they can be transferred to word-aligned byte if desired +#define uwDEST_U uwTOP_U +#define uwDEST_V uwTOP_V + +#define nSRC_REGION nREGION_1 // REGION_1 will be the source region for first kernel + +// End of PL2_Load.inc diff --git a/src/shaders/post_processing/Common/PL3_Load.inc b/src/shaders/post_processing/Common/PL3_Load.inc new file mode 100644 index 00000000..323df082 --- /dev/null +++ b/src/shaders/post_processing/Common/PL3_Load.inc @@ -0,0 +1,59 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: PL3_Load.inc + +#undef nY_NUM_OF_ROWS +#undef nUV_NUM_OF_ROWS + +#define nY_NUM_OF_ROWS 8 // Number of Y rows per block +#define nDPR_BLOCK_SIZE_Y nBLOCK_WIDTH_16+nBLOCK_HEIGHT_8 // Y block size 16x8 +#define nDPR_MSG_SIZE_Y nRESLEN_4 // # of MRF's to hold Y block data (4) + +#if defined(IMC3_LOAD_8x4) + #define nUV_NUM_OF_ROWS 4 // Number of U/V rows per block + #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_8+nBLOCK_HEIGHT_4 // U/V block size 8x4 + #define nDPR_MSG_SIZE_UV nRESLEN_1 // # of MRF's to hold U/V block data (1) +#endif +#if defined(IMC3_LOAD_8x5) + #define nUV_NUM_OF_ROWS 6 // Number of U/V rows per block (Rounded Up to Nearest Even Number) + #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_8+nBLOCK_HEIGHT_5 // U/V block size 8x5 + #define nDPR_MSG_SIZE_UV nRESLEN_2 // # of MRF's to hold U/V block data (2) +#endif +#if defined(IMC3_LOAD_9x5) + #define nUV_NUM_OF_ROWS 6 // Number of U/V rows per block (Rounded Up to Nearest Even Number) + #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_12+nBLOCK_HEIGHT_5 // U/V block size 12x5 + #define nDPR_MSG_SIZE_UV nRESLEN_3 // # of MRF's to hold U/V block data (3) +#endif + +// Source/destination region definitions +#if !defined(udSRC_Y) + #define udSRC_Y udBOT_Y_IO // Default Y source region is top Y region +#endif + +#if !defined(udSRC_U) + #define udSRC_U udBOT_U_IO // Default U source region is top U region +#endif + +#if !defined(udSRC_V) + #define udSRC_V udBOT_V_IO // Default V source region is top V region +#endif + +#define ubSRC_Y ubBOT_Y // Loading data are always in byte type +#define ubSRC_U ubBOT_U +#define ubSRC_V ubBOT_V + +#define uwDEST_Y uwTOP_Y // However they can be transferred to word-aligned byte if desired +#define uwDEST_U uwTOP_U +#define uwDEST_V uwTOP_V + +#define nSRC_REGION nREGION_1 // REGION_1 will be the source region for first kernel + +// End of PL3_Load.inc diff --git a/src/shaders/post_processing/Common/PL4x8_Save_NV11.asm b/src/shaders/post_processing/Common/PL4x8_Save_NV11.asm new file mode 100644 index 00000000..653e6345 --- /dev/null +++ b/src/shaders/post_processing/Common/PL4x8_Save_NV11.asm @@ -0,0 +1,86 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + + +#include "PL4x8_Save_NV11.inc" + + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + +#if !defined(SAVE_UV_ONLY) +// Save current planar frame Y block data (16x8) ------------------------------- + + mov (2) mMSGHDR.0<1>:d wORIX<2;2,1>:w // Block origin + mov (1) mMSGHDR.2<1>:ud nDPW_BLOCK_SIZE_Y:ud // Block width and height (16x8) + +///* Yoni - masking is not relevant for ILK?!? +// +// //Use the mask to determine which pixels shouldn't be over-written +// cmp.ge.f0.0 (1) NULLREG BLOCK_MASK_D:ud 0x00FFFFFF:ud //Check if all pixels in the block need to be modified +// (f0.0) jmpi WritePlanarToDataPort +// +// //If mask is not all 1's, then load the entire 16x8 block +// //so that only those bytes may be modified that need to be (using the mask) +// send (8) SRC_YD(0)<1> MSGHDR MSGSRC<8;8,1>:ud DWBRMSGDSC+0x00040000+BI_DEST_Y:ud //16x8 +// +// asr (2) MSGSRC.0<1>:ud ORIX<2;2,1>:w 1:w // U/V block origin should be half of Y's +// mov (1) MSGSRC.2<1>:ud 0x00030007:ud // Block width and height (8x4) +// send (8) SRC_UD(0)<1> MSGHDR MSGSRC<8;8,1>:ud DWBRMSGDSC+0x00010000+BI_DEST_U:ud +// send (8) SRC_VD(0)<1> MSGHDR MSGSRC<8;8,1>:ud DWBRMSGDSC+0x00010000+BI_DEST_V:ud +// +// //Restore the origin information +// mov (2) MSGSRC.0<1>:ud ORIX<2;2,1>:w // Block origin +// mov (1) MSGSRC.2<1>:ud 0x0007000F:ud // Block width and height (16x8) +// +// //expand U and V to be aligned on word boundary +// mov (16) SRC_UW(1)<1> SRC_U(0,16) +// mov (16) SRC_UW(0)<1> SRC_U(0, 0) +// mov (16) SRC_VW(1)<1> SRC_V(0,16) +// mov (16) SRC_VW(0)<1> SRC_V(0, 0) +// +// //Merge the data +// mov (1) f0.1:uw BLOCK_MASK_V:uw //Load the mask on flag reg +// (f0.1) mov (8) TEMP0<1>:uw BLOCK_MASK_H:uw +// (-f0.1) mov (8) TEMP0<1>:uw 0:uw +// +// // Destination is Word aligned +// $for(0; <Y_ROW_SIZE; 2) { +// mov (1) f0.1:uw TEMP(0,%1)<0;1,0> +// (-f0.1) mov (16) DEST_Y(0, %1*32)<2> SRC_Y(0, %1*16) +// (-f0.1) mov (16) DEST_U(0, %1*8)<1> SRC_U(0, %1*8) //only works for Word aligned Byte data +// (-f0.1) mov (16) DEST_V(0, %1*8)<1> SRC_V(0, %1*8) //only works for Word aligned Byte data +// +// mov (1) f0.1:uw TEMP(0,1+%1)<0;1,0> +// (-f0.1) mov (16) DEST_Y(0, 1+%1*32)<2> SRC_Y(0, 1+%1*16) +// +// } +// +//*/ Yoni - masking is not relevant for ILK?!? + +WritePlanarToDataPort: + $for(0,0; <nY_NUM_OF_ROWS; 2,1) { + mov (16) mubMSGPAYLOAD(%2,0)<1> ub2DEST_Y(%1)REGION(16,2) + mov (16) mubMSGPAYLOAD(%2,16)<1> ub2DEST_Y(%1+1)REGION(16,2) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_Y+nBI_DESTINATION_Y:ud +#endif + +// Save U/V data block in planar format (4x8) ---------------------------------- + mov (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w // Block origin + asr (1) rMSGSRC.0<1>:d rMSGSRC.0<0;1,0>:d 1:w // U/V block origin should be half of Y's + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + + $for(0,0; <nY_NUM_OF_ROWS;4,1) { + mov (16) mubMSGPAYLOAD(%2,0)<2> ub2DEST_U(%2)REGION(16,2) + mov (16) mubMSGPAYLOAD(%2,1)<2> ub2DEST_V(%2)REGION(16,2) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_UV+nBI_DESTINATION_UV:ud + +// End of PL4x8_Save_NV11 + diff --git a/src/shaders/post_processing/Common/PL4x8_Save_NV11.inc b/src/shaders/post_processing/Common/PL4x8_Save_NV11.inc new file mode 100644 index 00000000..ebd134e1 --- /dev/null +++ b/src/shaders/post_processing/Common/PL4x8_Save_NV11.inc @@ -0,0 +1,60 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +//Module name: PL8x4_Save_NV11.inc +// +// Setup for storing planar data +// + +#include "undefall.inc" //Undefine the SRC and DEST sysmbols + +#define nDPW_BLOCK_SIZE_Y nBLOCK_WIDTH_16+nBLOCK_HEIGHT_8 // Y block size 16x8 +#define nDPW_MSG_SIZE_Y nMSGLEN_4 // # of MRF's to hold Y block data (4) +#define nDPW_BLOCK_SIZE_UV nBLOCK_WIDTH_8+nBLOCK_HEIGHT_8 // U/V interleaved block width and height (8x8) +#define nDPW_MSG_SIZE_UV nMSGLEN_2 // # of MRF's to hold U/V block data (2) + +#if (nSRC_REGION==nREGION_1) + #define udSRC_Y udBOT_Y_IO + #define udSRC_U udBOT_U_IO + #define udSRC_V udBOT_V_IO + #define ubSRC_Y ubBOT_Y + #define ubSRC_U ubBOT_U + #define ubSRC_V ubBOT_V + + #define uwSRC_U uwBOT_U //For masking operation + #define uwSRC_V uwBOT_V + + #define ub2DEST_Y ub2TOP_Y + #define ub2DEST_U ub2TOP_U + #define ub2DEST_V ub2TOP_V + +#elif (nSRC_REGION==nREGION_2) + #define udSRC_Y udTOP_Y_IO + #define udSRC_U udTOP_U_IO + #define udSRC_V udTOP_V_IO + #define ubSRC_Y ubTOP_Y + #define ubSRC_U ubTOP_U + #define ubSRC_V ubTOP_V + + #define uwSRC_U uwTOP_U //For masking operation + #define uwSRC_V uwTOP_V + + #define ub2DEST_Y ub2BOT_Y + #define ub2DEST_U ub2BOT_U + #define ub2DEST_V ub2BOT_V + +#endif + +///* Yoni - masking is not relevant for ILK?!? +//#define TEMP0 REG(r,54) +//.declare TEMP Base=TEMP0 ElementSize=2 SrcRegion=<8;8,1> Type=uw +///* Yoni - masking is not relevant for ILK?!? + + diff --git a/src/shaders/post_processing/Common/PL5x8_PL16x8.asm b/src/shaders/post_processing/Common/PL5x8_PL16x8.asm new file mode 100644 index 00000000..909f8a7e --- /dev/null +++ b/src/shaders/post_processing/Common/PL5x8_PL16x8.asm @@ -0,0 +1,29 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: PL5x8_PL16x8.asm + +#include "Expansion.inc" + +//------------------------------ Horizontal Upconversion ----------------------------- + $for (nUV_NUM_OF_ROWS/2-1; >-1; -1) { + avg.sat (16) uwDEST_U(0, %1*32+16) uwDEST_U(0, %1*16+7)<1;2,0> uwDEST_U(0, %1*16+7)<1;2,1> + avg.sat (16) uwDEST_V(0, %1*32+16) uwDEST_V(0, %1*16+7)<1;2,0> uwDEST_V(0, %1*16+7)<1;2,1> + avg.sat (16) uwDEST_U(0, %1*32) uwDEST_U(0, %1*16)<1;2,0> uwDEST_U(0, %1*16)<1;2,1> + avg.sat (16) uwDEST_V(0, %1*32) uwDEST_V(0, %1*16)<1;2,0> uwDEST_V(0, %1*16)<1;2,1> + } + $for (nUV_NUM_OF_ROWS/2-1; >-1; -1) { + avg.sat (16) uwDEST_U(0, %1*32+16) uwDEST_U(0, %1*32+18)<1;2,0> uwDEST_U(0, %1*32+18)<1;2,1> + avg.sat (16) uwDEST_V(0, %1*32+16) uwDEST_V(0, %1*32+18)<1;2,0> uwDEST_V(0, %1*32+18)<1;2,1> + avg.sat (16) uwDEST_U(0, %1*32) uwDEST_U(0, %1*32)<1;2,0> uwDEST_U(0, %1*32)<1;2,1> + avg.sat (16) uwDEST_V(0, %1*32) uwDEST_V(0, %1*32)<1;2,0> uwDEST_V(0, %1*32)<1;2,1> + } + +// End of PL5x8_PL16x8 diff --git a/src/shaders/post_processing/Common/PL5x8_PL8x8.asm b/src/shaders/post_processing/Common/PL5x8_PL8x8.asm new file mode 100644 index 00000000..068b2ba9 --- /dev/null +++ b/src/shaders/post_processing/Common/PL5x8_PL8x8.asm @@ -0,0 +1,21 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: PL5x8_PL8x8.asm + +#include "Expansion.inc" + +//------------------------------ Horizontal Upconversion ----------------------------- + $for (0; <nUV_NUM_OF_ROWS; 1) { + avg.sat (8) uwDEST_U(0, %1*8) uwDEST_U(0, %1*8)<1;2,0> uwDEST_U(0, %1*8)<1;2,1> + avg.sat (8) uwDEST_V(0, %1*8) uwDEST_V(0, %1*8)<1;2,0> uwDEST_V(0, %1*8)<1;2,1> + } + +// End of PL5x8_PL8x8 diff --git a/src/shaders/post_processing/Common/PL8x4_Save_IMC3.asm b/src/shaders/post_processing/Common/PL8x4_Save_IMC3.asm new file mode 100644 index 00000000..c2869924 --- /dev/null +++ b/src/shaders/post_processing/Common/PL8x4_Save_IMC3.asm @@ -0,0 +1,88 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: PL8x4_Save_IMC3.asm +// +// Save planar YUV420 frame data block of size 16x8 + +#include "PL8x4_Save_IMC3.inc" + +//Use the mask to determine which pixels shouldn't be over-written + and (1) acc0.0<1>:ud udBLOCK_MASK<0;1,0>:ud 0x00FFFFFF:ud + cmp.ge.f0.0(1) dNULLREG acc0.0<0;1,0>:ud 0x00FFFFFF:ud //Check if all pixels in the block need to be modified + (f0.0) jmpi WritePlanarToDataPort + + //If mask is not all 1's, then load the entire 16x8 block + //so that only those bytes may be modified that need to be (using the mask) + + // Load 16x8 planar Y ---------------------------------------------------------- + mov (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w // Block origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_Y:ud // Block width and height (16x8) + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_Y(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_DESTINATION_Y:ud + // Load 8x4 planar U and V ----------------------------------------------------- + asr (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_UV:ud // Block width and height (8x4) + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_U(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_DESTINATION_U:ud + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_V(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_DESTINATION_V:ud + + //expand U and V to be aligned on word boundary - Y remains in bytes + $for (nUV_NUM_OF_ROWS/2-1; >-1; -1) { + mov (16) uwSRC_U(0, %1*16)<1> ubSRC_U(0, %1*16) + mov (16) uwSRC_V(0, %1*16)<1> ubSRC_V(0, %1*16) + } + + //Merge the data + mov (1) f0.0:uw ubBLOCK_MASK_V:ub //Load the mask on flag reg + (f0.0) mov (8) rMASK_TEMP<1>:uw uwBLOCK_MASK_H:uw + (-f0.0) mov (8) rMASK_TEMP<1>:uw 0:uw + + // Destination is Word aligned + $for(0; <nY_NUM_OF_ROWS; 2) { + mov (1) f0.1:uw uwMASK_TEMP(0,%1)<0;1,0> + (-f0.1) mov (16) ub2DEST_Y(0, %1*32)<2> ubSRC_Y(0, %1*16) + (-f0.1) mov (16) ub2DEST_U(0, %1*8)<1> ubSRC_U(0, %1*8) //only works for Word aligned Byte data + (-f0.1) mov (16) ub2DEST_V(0, %1*8)<1> ubSRC_V(0, %1*8) //only works for Word aligned Byte data + + mov (1) f0.1:uw uwMASK_TEMP(0,1+%1)<0;1,0> + (-f0.1) mov (16) ub2DEST_Y(0, 1+%1*32)<2> ubSRC_Y(0, 1+%1*16) + } + +WritePlanarToDataPort: +#if !defined(SAVE_UV_ONLY) +// Save current planar frame Y block data (16x8) ------------------------------- + mov (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w // Block origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_Y:ud // Block width and height (16x8) + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + $for(0,0; <nY_NUM_OF_ROWS; 2,1) { + mov(16) mubMSGPAYLOAD(%2,0)<1> ub2DEST_Y(%1)REGION(16,2) + mov(16) mubMSGPAYLOAD(%2,16)<1> ub2DEST_Y(%1+1)REGION(16,2) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_Y+nBI_DESTINATION_Y:ud +#endif +// Save U/V data block in planar format (8x4) ---------------------------------- + asr (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_UV:ud // Block width and height (8x4) + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + +// Save U picture data --------------------------------------------------------- + mov (16) mubMSGPAYLOAD(0,0)<1> ub2DEST_U(0)REGION(16,2) // U rows 0,1 + mov (16) mubMSGPAYLOAD(0,16)<1> ub2DEST_U(1)REGION(16,2) // U rows 2,3 + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_UV+nBI_DESTINATION_U:ud + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + +// Save V picture data --------------------------------------------------------- + mov (16) mubMSGPAYLOAD(0,0)<1> ub2DEST_V(0)REGION(16,2) // V rows 0,1 + mov (16) mubMSGPAYLOAD(0,16)<1> ub2DEST_V(1)REGION(16,2) // V rows 2,3 + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_UV+nBI_DESTINATION_V:ud + +// End of PL8x4_Save_IMC3 diff --git a/src/shaders/post_processing/Common/PL8x4_Save_IMC3.inc b/src/shaders/post_processing/Common/PL8x4_Save_IMC3.inc new file mode 100644 index 00000000..3b1df173 --- /dev/null +++ b/src/shaders/post_processing/Common/PL8x4_Save_IMC3.inc @@ -0,0 +1,62 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: PL8x4_Save_IMC3.inc +// +// Setup for storing planar data +// + +#include "undefall.inc" //Undefine the SRC and DEST sysmbols + +// For saving +#define nDPW_BLOCK_SIZE_Y nBLOCK_WIDTH_16+nBLOCK_HEIGHT_8 // Y block size 16x8 +#define nDPW_MSG_SIZE_Y nMSGLEN_4 // # of MRF's to hold Y block data (4) +#define nDPW_BLOCK_SIZE_UV nBLOCK_WIDTH_8+nBLOCK_HEIGHT_4 // U/V block size 8x4 +#define nDPW_MSG_SIZE_UV nMSGLEN_1 // # of MRF's to hold U/V block data (1) + +// For masking +#undef nDPR_MSG_SIZE_Y +#define nDPR_MSG_SIZE_Y nRESLEN_4 // # of MRF's to hold Y block data (4) +#undef nDPR_MSG_SIZE_UV +#define nDPR_MSG_SIZE_UV nRESLEN_1 // # of MRF's to hold U/V block data (1) +#define rMASK_TEMP REG(r,nTEMP0) +.declare uwMASK_TEMP Base=rMASK_TEMP ElementSize=2 SrcRegion=<8;8,1> Type=uw //1 GRF + +#if (nSRC_REGION==nREGION_1) + // For saving + #define ub2DEST_Y ub2TOP_Y + #define ub2DEST_U ub2TOP_U + #define ub2DEST_V ub2TOP_V + //For masking operation + #define udSRC_Y udBOT_Y_IO + #define udSRC_U udBOT_U_IO + #define udSRC_V udBOT_V_IO + #define ubSRC_Y ubBOT_Y + #define ubSRC_U ubBOT_U + #define ubSRC_V ubBOT_V + #define uwSRC_U uwBOT_U + #define uwSRC_V uwBOT_V + +#elif (nSRC_REGION==nREGION_2) + // For saving + #define ub2DEST_Y ub2BOT_Y + #define ub2DEST_U ub2BOT_U + #define ub2DEST_V ub2BOT_V + //For masking operation + #define udSRC_Y udTOP_Y_IO + #define udSRC_U udTOP_U_IO + #define udSRC_V udTOP_V_IO + #define ubSRC_Y ubTOP_Y + #define ubSRC_U ubTOP_U + #define ubSRC_V ubTOP_V + #define uwSRC_U uwTOP_U + #define uwSRC_V uwTOP_V + +#endif diff --git a/src/shaders/post_processing/Common/PL8x4_Save_NV12.asm b/src/shaders/post_processing/Common/PL8x4_Save_NV12.asm new file mode 100644 index 00000000..b54a3161 --- /dev/null +++ b/src/shaders/post_processing/Common/PL8x4_Save_NV12.asm @@ -0,0 +1,102 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + + +// Module name: PL8x4_Save_NV12.asm +// +// Save entire current planar frame data block of size 16x8 +//--------------------------------------------------------------- +// Symbols needed to be defined before including this module +// +// DWORD_ALIGNED_DEST: only if DEST_Y, DEST_U, DEST_V data are DWord aligned +// ORIX: +//--------------------------------------------------------------- + +#include "PL8x4_Save_NV12.inc" + + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + +#if !defined(SAVE_UV_ONLY) +// Save current planar frame Y block data (16x8) ------------------------------- + + mov (2) mMSGHDR.0<1>:d wORIX<2;2,1>:w // Block origin + mov (1) mMSGHDR.2<1>:ud nDPW_BLOCK_SIZE_Y:ud // Block width and height (16x8) +#endif + +//Use the mask to determine which pixels shouldn't be over-written + and (1) acc0<1>:ud udBLOCK_MASK<0;1,0>:ud 0x00FFFFFF:ud + cmp.ge.f0.0 (1) dNULLREG acc0<0;1,0>:ud 0x00FFFFFF:ud //Check if all pixels in the block need to be modified + (f0.0) jmpi WritePlanarToDataPort + +//If mask is not all 1's, then load the entire 16x8 block +//so that only those bytes may be modified that need to be (using the mask) + send (8) udSRC_Y(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_DESTINATION_Y:ud //16x8 + + asr (1) rMSGSRC.1<1>:ud wORIY<0;1,0>:w 1:w { NoDDClr } // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_UV:ud { NoDDChk } // Block width and height (16x4) + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud //move message desrcptor to the message header + send (8) udSRC_U(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_DESTINATION_UV:ud + +//Restore the origin information + mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w // Block origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_Y:ud // Block width and height (16x8) + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud //move message desrcptor to the message header + +//Merge the data + mov (1) f0.1:uw ubBLOCK_MASK_V:ub //Load the mask on flag reg + (f0.1) mov (8) rMASK_TEMP<1>:uw uwBLOCK_MASK_H:uw + (-f0.1) mov (8) rMASK_TEMP<1>:uw 0:uw + +//convert the mask from 16bits to 8bits by selecting every other bit + mov (1) udMASK_TEMP1(0,0)<1> 0x00040001:ud + mov (1) udMASK_TEMP1(0,1)<1> 0x00400010:ud + mov (1) udMASK_TEMP1(0,2)<1> 0x04000100:ud + mov (1) udMASK_TEMP1(0,3)<1> 0x40001000:ud + +//merge the loaded block with the current block + $for(0,0; <nY_NUM_OF_ROWS; 2,1) { + mov (1) f0.1:uw uwMASK_TEMP(0, %1)<0;1,0> + (-f0.1) mov (16) ubDEST_Y(0,%1*32)<2> ubSRC_Y(0,%1*16) + + and.nz.f0.1 (8) wNULLREG uwMASK_TEMP(0,%1)<0;1,0> uwMASK_TEMP1(0,0) //change the mask by selecting every other bit + (-f0.1) mov (8) ubDEST_U(0, %2*16)<2> ub2SRC_U(0, %1*8)<16;8,2> + (-f0.1) mov (8) ubDEST_V(0, %2*16)<2> ub2SRC_U(0, %1*8+1)<16;8,2> + + mov (1) f0.1:uw uwMASK_TEMP(0,1+%1)<0;1,0> + (-f0.1) mov (16) ubDEST_Y(0, (1+%1)*32)<2> ubSRC_Y(0, (1+%1)*16) + + } + +WritePlanarToDataPort: +#if !defined(SAVE_UV_ONLY) + $for(0,0; <nY_NUM_OF_ROWS; 2,1) { + mov (16) mubMSGPAYLOAD(%2,0)<1> ub2DEST_Y(%1)REGION(16,2) + mov (16) mubMSGPAYLOAD(%2,16)<1> ub2DEST_Y(%1+1)REGION(16,2) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_Y+nBI_DESTINATION_Y:ud +#endif + +//** Save 8x4 packed U and V ----------------------------------------------------- +// we could write directly wORIX to mMSGHDR and then execute asr on it, that way we could +// avoid using rMSGSRC as a buffer and have one command less in code, but it is unknown whether +//it is possible to do asr on mMSGHDR so we use rMSGSRC. + mov (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w // Block origin + asr (1) rMSGSRC.1<1>:d rMSGSRC.1<0;1,0>:d 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_UV:ud // U/V block width and height (16x4) + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + + $for(0,0; <nY_NUM_OF_ROWS;4,1) { + mov (16) mubMSGPAYLOAD(%2,0)<2> ub2DEST_U(%2)REGION(16,2) + mov (16) mubMSGPAYLOAD(%2,1)<2> ub2DEST_V(%2)REGION(16,2) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_UV+nBI_DESTINATION_UV:ud + +// End of PL8x4_Save_NV12 + diff --git a/src/shaders/post_processing/Common/PL8x4_Save_NV12.inc b/src/shaders/post_processing/Common/PL8x4_Save_NV12.inc new file mode 100644 index 00000000..879d7e3d --- /dev/null +++ b/src/shaders/post_processing/Common/PL8x4_Save_NV12.inc @@ -0,0 +1,85 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +//Module name: PL8x4_Save_NV12.inc +// +// Setup for storing planar data +// + +#include "undefall.inc" //Undefine the SRC and DEST sysmbols +#undef nDPW_BLOCK_SIZE_Y +#undef nDPW_MSG_SIZE_Y +#undef nDPW_BLOCK_SIZE_UV +#undef nDPW_MSG_SIZE_UV + +#define nDPW_BLOCK_SIZE_Y nBLOCK_WIDTH_16+nBLOCK_HEIGHT_8 // Y block size 16x8 +#define nDPW_MSG_SIZE_Y nMSGLEN_4 // # of MRF's to hold Y block data (4) +#define nDPW_BLOCK_SIZE_UV nBLOCK_WIDTH_16+nBLOCK_HEIGHT_4 // U/V interleaved block width and height (16x4) +#define nDPW_MSG_SIZE_UV nMSGLEN_2 // # of MRF's to hold U/V block data (2) + +// For masking +#undef nDPR_MSG_SIZE_Y +#define nDPR_MSG_SIZE_Y nRESLEN_4 // # of MRF's to hold Y block data (4) +#undef nDPR_MSG_SIZE_UV +#define nDPR_MSG_SIZE_UV nRESLEN_2 +#define rMASK_TEMP REG(r,nTEMP0) +.declare uwMASK_TEMP Base=rMASK_TEMP ElementSize=2 SrcRegion=<8;8,1> Type=uw //1 GRF +#define rMASK_TEMP1 REG(r,nTEMP1) +.declare udMASK_TEMP1 Base=rMASK_TEMP1 ElementSize=4 SrcRegion=<4;4,1> Type=ud //1 GRF +.declare uwMASK_TEMP1 Base=rMASK_TEMP1 ElementSize=2 SrcRegion=<8;8,1> Type=uw //1 GRF + + +#if (nSRC_REGION==nREGION_1) + #define udSRC_Y udBOT_Y_IO + #define udSRC_U udBOT_U_IO + #define udSRC_V udBOT_V_IO + #define ubSRC_Y ubBOT_Y + #define ubSRC_U ubBOT_U + #define ubSRC_V ubBOT_V + + #define uwSRC_U uwBOT_U //For masking operation + #define uwSRC_V uwBOT_V + + #define ub2DEST_Y ub2TOP_Y + #define ub2DEST_U ub2TOP_U + #define ub2DEST_V ub2TOP_V + + #define ubDEST_Y ubTOP_Y + #define ubDEST_U ubTOP_U + #define ubDEST_V ubTOP_V + + #define ub2SRC_U ub2BOT_U +#elif (nSRC_REGION==nREGION_2) + #define udSRC_Y udTOP_Y_IO + #define udSRC_U udTOP_U_IO + #define udSRC_V udTOP_V_IO + #define ubSRC_Y ubTOP_Y + #define ubSRC_U ubTOP_U + #define ubSRC_V ubTOP_V + + #define uwSRC_U uwTOP_U //For masking operation + #define uwSRC_V uwTOP_V + + #define ub2DEST_Y ub2BOT_Y + #define ub2DEST_U ub2BOT_U + #define ub2DEST_V ub2BOT_V + + #define ubDEST_Y ubBOT_Y + #define ubDEST_U ubBOT_U + #define ubDEST_V ubBOT_V + + #define ub2SRC_U ub2TOP_U +#endif + +///* Yoni - masking is not relevant for ILK?!? +//#define TEMP0 REG(r,54) +//.declare TEMP Base=TEMP0 ElementSize=2 SrcRegion=<8;8,1> Type=uw +///* Yoni - masking is not relevant for ILK?!? + diff --git a/src/shaders/post_processing/Common/PL8x5_PL8x8.asm b/src/shaders/post_processing/Common/PL8x5_PL8x8.asm new file mode 100644 index 00000000..5b98be00 --- /dev/null +++ b/src/shaders/post_processing/Common/PL8x5_PL8x8.asm @@ -0,0 +1,27 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: PL8x5_PL8x8.asm + +#include "Expansion.inc" + +//------------------------------- Vertical Upconversion ------------------------------ + avg.sat (8) uwDEST_U(0, 3*16+8)<1> uwDEST_U(0, 3*8) uwDEST_U(0, (1+3)*8) // Optimization + avg.sat (8) uwDEST_V(0, 3*16+8)<1> uwDEST_V(0, 3*8) uwDEST_V(0, (1+3)*8) // Optimization + + $for(nUV_NUM_OF_ROWS/2-2; >-1; -1) { + mov (8) uwDEST_U(0, (1+%1)*16)<1> uwDEST_U(0, (1+%1)*8) + avg.sat (8) uwDEST_U(0, %1*16+8)<1> uwDEST_U(0, %1*8) uwDEST_U(0, (1+%1)*8) + + mov (8) uwDEST_V(0, (1+%1)*16)<1> uwDEST_V(0, (1+%1)*8) + avg.sat (8) uwDEST_V(0, %1*16+8)<1> uwDEST_V(0, %1*8) uwDEST_V(0, (1+%1)*8) + } + +// End of PL8x5_PL8x8 diff --git a/src/shaders/post_processing/Common/PL8x8_PL8x4.asm b/src/shaders/post_processing/Common/PL8x8_PL8x4.asm new file mode 100644 index 00000000..f21d224a --- /dev/null +++ b/src/shaders/post_processing/Common/PL8x8_PL8x4.asm @@ -0,0 +1,30 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: PL8x8_PL8x4.asm +// +// Convert PL 8x8 to PL8x4 in GRF +//--------------------------------------------------------------- +// Symbols needed to be defined before including this module +// +// DWORD_ALIGNED_DEST: only if DEST_Y, DEST_U, DEST_V data are DWord aligned +// ORIX: +//--------------------------------------------------------------- + +#include "PL8x8_PL8x4.inc" + +// Convert PL8x8 to PL8x4 --------------------------------------------------------- + + mov (8) ubDEST_U(0,16)<2> ubDEST_U(1)<16;8,2> //selecting U every other row + mov (16) ubDEST_U(0,32)<2> ubDEST_U(2)<32;8,2> //selecting U every other row + mov (8) ubDEST_V(0,16)<2> ubDEST_V(1)<16;8,2> //selecting V every other row + mov (16) ubDEST_V(0,32)<2> ubDEST_V(2)<32;8,2> //selecting V every other row + +// End of PL8x8_PL8x4.asm -------------------------------------------------------
\ No newline at end of file diff --git a/src/shaders/post_processing/Common/PL8x8_PL8x4.inc b/src/shaders/post_processing/Common/PL8x8_PL8x4.inc new file mode 100644 index 00000000..bec884e4 --- /dev/null +++ b/src/shaders/post_processing/Common/PL8x8_PL8x4.inc @@ -0,0 +1,36 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: PL8x8_PL8x4.inc +// +// Setup module for convert PL8x8 to PL8x4 +// +// + +// Source/destination region definitions +// +#include "undefall.inc" //Undefine the SRC and DEST sysmbols + +#if (nSRC_REGION==nREGION_1) + + //REGION_1 selected + #define ubDEST_Y ubTOP_Y + #define ubDEST_U ubTOP_U + #define ubDEST_V ubTOP_V + +#elif (nSRC_REGION==nREGION_2) + + //REGION_2 selected + #define ubDEST_Y ubBOT_Y + #define ubDEST_U ubBOT_U + #define ubDEST_V ubBOT_V + + +#endif diff --git a/src/shaders/post_processing/Common/PL8x8_Save_P208.asm b/src/shaders/post_processing/Common/PL8x8_Save_P208.asm new file mode 100644 index 00000000..6b3258fe --- /dev/null +++ b/src/shaders/post_processing/Common/PL8x8_Save_P208.asm @@ -0,0 +1,56 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + + +// Module name: PL8x8_Save_P208.asm +// +// Save entire current planar frame data block of size 16x8 +//--------------------------------------------------------------- +// Symbols needed to be defined before including this module +// +// DWORD_ALIGNED_DEST: only if DEST_Y, DEST_U, DEST_V data are DWord aligned +// ORIX: +//--------------------------------------------------------------- + +#include "PL8x8_Save_P208.inc" + + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + +#if !defined(SAVE_UV_ONLY) +// Save current planar frame Y block data (16x8) ------------------------------- + + mov (2) mMSGHDR.0<1>:d wORIX<2;2,1>:w // Block origin + mov (1) mMSGHDR.2<1>:ud nDPW_BLOCK_SIZE_Y:ud // Block width and height (16x8) + +WritePlanarToDataPort: + $for(0,0; <nY_NUM_OF_ROWS; 2,1) { + mov (16) mubMSGPAYLOAD(%2,0)<1> ub2DEST_Y(%1)REGION(16,2) + mov (16) mubMSGPAYLOAD(%2,16)<1> ub2DEST_Y(%1+1)REGION(16,2) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_Y+nBI_DESTINATION_Y:ud +#endif + +//** Save 8x8 packed U and V ----------------------------------------------------- +// we could write directly wORIX to mMSGHDR and then execute asr on it, that way we could +// avoid using rMSGSRC as a buffer and have one command less in code, but it is unknown whether +//it is possible to do asr on mMSGHDR so we use rMSGSRC. + mov (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w // Block origin + + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_UV:ud // U/V block width and height (16x4) + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + + $for(0,0; <nY_NUM_OF_ROWS;2,1) { + mov (16) mubMSGPAYLOAD(%2,0)<2> ub2DEST_U(%2)REGION(16,2) + mov (16) mubMSGPAYLOAD(%2,1)<2> ub2DEST_V(%2)REGION(16,2) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_UV+nBI_DESTINATION_UV:ud + +//End of PL8x8_Save_P208.asm + diff --git a/src/shaders/post_processing/Common/PL8x8_Save_P208.inc b/src/shaders/post_processing/Common/PL8x8_Save_P208.inc new file mode 100644 index 00000000..e3b7d09e --- /dev/null +++ b/src/shaders/post_processing/Common/PL8x8_Save_P208.inc @@ -0,0 +1,61 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + + +//Module name: PL8x8_Save_P208.inc +// +// Setup for storing planar data +// + +#include "undefall.inc" //Undefine the SRC and DEST sysmbols + +#define nDPW_BLOCK_SIZE_Y nBLOCK_WIDTH_16+nBLOCK_HEIGHT_8 // Y block size 16x8 +#define nDPW_MSG_SIZE_Y nMSGLEN_4 // # of MRF's to hold Y block data (4) +#define nDPW_BLOCK_SIZE_UV nBLOCK_WIDTH_16+nBLOCK_HEIGHT_8 // U/V interleaved block width and height (16x8) +#define nDPW_MSG_SIZE_UV nMSGLEN_4 // # of MRF's to hold U/V block data (4) + +#if (nSRC_REGION==nREGION_1) + #define udSRC_Y udBOT_Y_IO + #define udSRC_U udBOT_U_IO + #define udSRC_V udBOT_V_IO + #define ubSRC_Y ubBOT_Y + #define ubSRC_U ubBOT_U + #define ubSRC_V ubBOT_V + + #define uwSRC_U uwBOT_U //For masking operation + #define uwSRC_V uwBOT_V + + #define ub2DEST_Y ub2TOP_Y + #define ub2DEST_U ub2TOP_U + #define ub2DEST_V ub2TOP_V + +#elif (nSRC_REGION==nREGION_2) + #define udSRC_Y udTOP_Y_IO + #define udSRC_U udTOP_U_IO + #define udSRC_V udTOP_V_IO + #define ubSRC_Y ubTOP_Y + #define ubSRC_U ubTOP_U + #define ubSRC_V ubTOP_V + + #define uwSRC_U uwTOP_U //For masking operation + #define uwSRC_V uwTOP_V + + #define ub2DEST_Y ub2BOT_Y + #define ub2DEST_U ub2BOT_U + #define ub2DEST_V ub2BOT_V + +#endif + +///* Yoni - masking is not relevant for ILK?!? +//#define TEMP0 REG(r,54) +//.declare TEMP Base=TEMP0 ElementSize=2 SrcRegion=<8;8,1> Type=uw +///* Yoni - masking is not relevant for ILK?!? + + diff --git a/src/shaders/post_processing/Common/PL8x8_Save_PA.asm b/src/shaders/post_processing/Common/PL8x8_Save_PA.asm new file mode 100644 index 00000000..d22c76d7 --- /dev/null +++ b/src/shaders/post_processing/Common/PL8x8_Save_PA.asm @@ -0,0 +1,71 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: PL8x8_Save_PA.asm +// +// Save planar YUV422 to packed YUV422 format data +// +// Note: SRC_* must reference to regions with data type "BYTE" +// in order to save to byte-aligned byte location + +#include "PL8x8_Save_PA.inc" + + add (4) pCF_Y_OFFSET<1>:uw ubDEST_CF_OFFSET<4;4,1>:ub nDEST_YUV_REG*nGRFWIB:w // Initial Y,U,V offset in YUV422 block + + // Pack Y + $for(0; <nY_NUM_OF_ROWS; 1) { + mov (16) r[pCF_Y_OFFSET, %1*nGRFWIB]<2> ubSRC_Y(0,%1*32) + } + + // Pack U/V + $for(0; <nUV_NUM_OF_ROWS; 1) { + mov (8) r[pCF_U_OFFSET, %1*nGRFWIB]<4> ubSRC_U(0, %1*16) + mov (8) r[pCF_V_OFFSET, %1*nGRFWIB]<4> ubSRC_V(0, %1*16) + } + + shl (1) rMSGSRC.0<1>:d wORIX<0;1,0>:w 1:w { NoDDClr } // H. block origin need to be doubled + mov (1) rMSGSRC.1<1>:d wORIY<0;1,0>:w { NoDDClr, NoDDChk } // Block origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_YUV:ud { NoDDChk } // Block width and height (32x8) + + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + +//Use the mask to determine which pixels shouldn't be over-written + and (1) acc0.0<1>:ud udBLOCK_MASK<0;1,0>:ud 0x00FFFFFF:ud + cmp.ge.f0.0(1) dNULLREG acc0.0<0;1,0>:ud 0x00FFFFFF:ud //Check if all pixels in the block need to be modified + (f0.0) jmpi WritePackedToDataPort + + //If mask is not all 1's, then load the entire 32x8 block + //so that only those bytes may be modified that need to be (using the mask) + + // Load 32x8 packed YUV 422 ---------------------------------------------------- + send (8) udSRC_YUV(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_YUV+nBI_DESTINATION_YUV:ud + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + + //Merge the data + mov (1) f0.0:uw ubBLOCK_MASK_V:ub //Load the mask on flag reg + (f0.0) mov (8) rMASK_TEMP<1>:uw uwBLOCK_MASK_H:uw + (-f0.0) mov (8) rMASK_TEMP<1>:uw 0:uw + + // Destination is Byte aligned + $for(0; <nY_NUM_OF_ROWS; 1) { + mov (1) f0.1:uw uwMASK_TEMP(0,%1)<0;1,0> + (-f0.1) mov (16) uwDEST_YUV(%1)<1> uwSRC_YUV(%1) //check the UV merge - vK + } + +WritePackedToDataPort: + // Packed YUV data are stored in one of the I/O regions before moving to MRF + // Note: This is necessary since indirect addressing is not supported for MRF. + // Packed data block should be saved as 32x8 pixel block + $for(0; <nY_NUM_OF_ROWS; 1) { + mov (8) mudMSGPAYLOAD(%1)<1> udDEST_YUV(%1)REGION(8,1) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_YUV+nBI_DESTINATION_YUV:ud + +// End of PL8x8_Save_PA diff --git a/src/shaders/post_processing/Common/PL8x8_Save_PA.inc b/src/shaders/post_processing/Common/PL8x8_Save_PA.inc new file mode 100644 index 00000000..a5cb4a3b --- /dev/null +++ b/src/shaders/post_processing/Common/PL8x8_Save_PA.inc @@ -0,0 +1,52 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: PL8x8_Save_PA.inc +// +// Setup for storing packed data +// + +#include "undefall.inc" //Undefine the SRC and DEST sysmbols + +// For saving +#define nDPW_BLOCK_SIZE_YUV nBLOCK_WIDTH_32+nBLOCK_HEIGHT_8 // YUV block size 32x8 +#define nDPW_MSG_SIZE_YUV nMSGLEN_8 // # of MRF's to hold YUV block data (8) + +// For masking +#undef nDPR_MSG_SIZE_YUV +#define nDPR_MSG_SIZE_YUV nRESLEN_8 // # of MRF's to hold YUV block data (8) +#define rMASK_TEMP REG(r,nTEMP0) +.declare uwMASK_TEMP Base=rMASK_TEMP ElementSize=2 SrcRegion=<8;8,1> Type=uw //1 GRF + +#if (nSRC_REGION==nREGION_1) + // For saving + #define udSRC_YUV udTOP_Y_IO + #define udDEST_YUV udBOT_Y_IO + #define nDEST_YUV_REG nBOT_Y + //For masking operation + #define ubSRC_Y ub2TOP_Y + #define ubSRC_U ub2TOP_U + #define ubSRC_V ub2TOP_V + #define uwSRC_YUV uwTOP_Y + #define uwDEST_YUV uwBOT_Y + +#elif (nSRC_REGION==nREGION_2) + // For saving + #define udSRC_YUV udBOT_Y_IO + #define udDEST_YUV udTOP_Y_IO + #define nDEST_YUV_REG nTOP_Y + //For masking operation + #define ubSRC_Y ub2BOT_Y + #define ubSRC_U ub2BOT_U + #define ubSRC_V ub2BOT_V + #define uwSRC_YUV uwBOT_Y + #define uwDEST_YUV uwTOP_Y + +#endif diff --git a/src/shaders/post_processing/Common/PL9x5_PL16x8.asm b/src/shaders/post_processing/Common/PL9x5_PL16x8.asm new file mode 100644 index 00000000..697454f9 --- /dev/null +++ b/src/shaders/post_processing/Common/PL9x5_PL16x8.asm @@ -0,0 +1,37 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: PL9x5_PL16x8.asm + +#define EXPAND_9x5 +#include "Expansion.inc" + +//------------------------------ Horizontal Upconversion ----------------------------- + $for (nUV_NUM_OF_ROWS-2; >-1; -1) { + avg.sat (16) uwDEST_U(0, %1*16)<1> uwDEST_U(0, %1*16)<1;2,0> uwDEST_U(0, %1*16)<1;2,1> + avg.sat (16) uwDEST_V(0, %1*16)<1> uwDEST_V(0, %1*16)<1;2,0> uwDEST_V(0, %1*16)<1;2,1> + } + +#undef nUV_NUM_OF_ROWS +#define nUV_NUM_OF_ROWS 8 //use packed version of all post-processing kernels + +//------------------------------- Vertical Upconversion ------------------------------ + avg.sat (16) uwDEST_U(0, 3*32+16)<1> uwDEST_U(0, 3*16) uwDEST_U(0, (1+3)*16) + avg.sat (16) uwDEST_V(0, 3*32+16)<1> uwDEST_V(0, 3*16) uwDEST_V(0, (1+3)*16) + + $for(nUV_NUM_OF_ROWS/2-2; >-1; -1) { + mov (16) uwDEST_U(0, (1+%1)*32)<1> uwDEST_U(0, (1+%1)*16) + avg.sat (16) uwDEST_U(0, %1*32+16)<1> uwDEST_U(0, %1*16) uwDEST_U(0, (1+%1)*16) + + mov (16) uwDEST_V(0, (1+%1)*32)<1> uwDEST_V(0, (1+%1)*16) + avg.sat (16) uwDEST_V(0, %1*32+16)<1> uwDEST_V(0, %1*16) uwDEST_V(0, (1+%1)*16) + } + +// End of PL9x5_PL16x8 diff --git a/src/shaders/post_processing/Common/PL9x8_PL16x8.asm b/src/shaders/post_processing/Common/PL9x8_PL16x8.asm new file mode 100644 index 00000000..b0fa5496 --- /dev/null +++ b/src/shaders/post_processing/Common/PL9x8_PL16x8.asm @@ -0,0 +1,21 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: PL9x5_PL16x8.asm + +#include "Expansion.inc" + +//------------------------------ Horizontal Upconversion ----------------------------- + $for (0; <nUV_NUM_OF_ROWS; 1) { + avg.sat (16) uwDEST_U(0, %1*16)<1> uwDEST_U(0, %1*16)<1;2,0> uwDEST_U(0, %1*16)<1;2,1> + avg.sat (16) uwDEST_V(0, %1*16)<1> uwDEST_V(0, %1*16)<1;2,0> uwDEST_V(0, %1*16)<1;2,1> + } + +// End of PL9x5_PL16x8
\ No newline at end of file diff --git a/src/shaders/post_processing/Common/RGB16x8_Save_RGB.asm b/src/shaders/post_processing/Common/RGB16x8_Save_RGB.asm new file mode 100644 index 00000000..7903d635 --- /dev/null +++ b/src/shaders/post_processing/Common/RGB16x8_Save_RGB.asm @@ -0,0 +1,88 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: RGB16x8_Save_RGB.asm +// +// Save packed ARGB 444 frame data block of size 16x8 +// +// To save 16x8 block (64x8 byte layout for ARGB8888) we need 2 send instructions +// --------- +// | 1 | 2 | +// --------- + +#include "RGB16x8_Save_RGB.inc" + + shl (1) rMSGSRC.0<1>:d wORIX<0;1,0>:w 2:w { NoDDClr } // H. block origin need to be quadrupled + mov (1) rMSGSRC.1<1>:d wORIY<0;1,0>:w { NoDDClr, NoDDChk } // Block origin (1st quadrant) + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_ARGB:ud { NoDDChk } // Block width and height (32x8) + + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + +//Use the mask to determine which pixels shouldn't be over-written + and (1) acc0.0<1>:ud udBLOCK_MASK<0;1,0>:ud 0x00FFFFFF:ud + cmp.ge.f0.0(1) dNULLREG acc0.0<0;1,0>:ud 0x00FFFFFF:ud //Check if all pixels in the block need to be modified + (f0.0) jmpi WriteARGBToDataPort + + //If mask is not all 1's, then load the entire 64x8 block + //so that only those bytes may be modified that need to be (using the mask) + + // Load first block 16x8 packed ARGB 444 --------------------------------------- + or (1) acc0.0<1>:ud udBLOCK_MASK<0;1,0>:ud 0xFF00FF00:ud //Check first block + cmp.e.f0.0 (1) dNULLREG acc0.0<0;1,0>:ud 0xFFFFFFFF:ud + (f0.0) jmpi SkipFirstBlockMerge //If full mask then skip this block + + send (8) udSRC_ARGB(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_ARGB+nBI_DESTINATION_RGB:ud + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + + //Merge the data + mov (1) f0.0:uw ubBLOCK_MASK_V:ub //Load the mask on flag reg + (f0.0) mov (8) rMASK_TEMP<1>:uw uwBLOCK_MASK_H:uw //use sel instruction - vK + (-f0.0) mov (8) rMASK_TEMP<1>:uw 0:uw + + $for(0, 0; <nY_NUM_OF_ROWS; 1, 2) { //take care of the lines in the block, they are different in the src and dest + mov (1) f0.1:uw uwMASK_TEMP(0,%1)<0;1,0> + (-f0.1) mov (8) udDEST_ARGB(%2)<1> udSRC_ARGB(%1) + } + +SkipFirstBlockMerge: + // Load second block 16x8 packed ARGB 444 --------------------------------------- + or (1) acc0.0<1>:ud udBLOCK_MASK<0;1,0>:ud 0xFF0000FF:ud //Check second block + cmp.e.f0.0 (1) dNULLREG acc0.0<0;1,0>:ud 0xFFFFFFFF:ud + (f0.0) jmpi WriteARGBToDataPort //If full mask then skip this block + + add (1) mMSGHDR.0<1>:d rMSGSRC.0<0;1,0>:d 32:d // Point to 2nd part + send (8) udSRC_ARGB(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_ARGB+nBI_DESTINATION_RGB:ud + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud // Point to 1st part again + + //Merge the data + mov (1) f0.0:uw ubBLOCK_MASK_V:ub //Load the mask on flag reg + (f0.0) shr (8) rMASK_TEMP<1>:uw uwBLOCK_MASK_H:uw 8:uw //load the mask for second block + (-f0.0) mov (8) rMASK_TEMP<1>:uw 0:uw + + $for(0, 1; <nY_NUM_OF_ROWS; 1, 2) { //take care of the lines in the block, they are different in the src and dest + mov (1) f0.1:uw uwMASK_TEMP(0,%1)<0;1,0> + (-f0.1) mov (8) udDEST_ARGB(%2)<1> udSRC_ARGB(%1) + } + +WriteARGBToDataPort: + // Move packed data to MRF and output + $for(0; <nY_NUM_OF_ROWS; 1) { + mov (8) mudMSGPAYLOAD(%1)<1> udDEST_ARGB(%1*2) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_ARGB+nBI_DESTINATION_RGB:ud + + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + add (1) mMSGHDR.0<1>:d rMSGSRC.0<0;1,0>:d 32:d // Point to 2nd part + $for(0; <nY_NUM_OF_ROWS; 1) { + mov (8) mudMSGPAYLOAD(%1)<1> udDEST_ARGB(%1*2+1) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_ARGB+nBI_DESTINATION_RGB:ud + +// End of RGB16x8_Save_RGB diff --git a/src/shaders/post_processing/Common/RGB16x8_Save_RGB.inc b/src/shaders/post_processing/Common/RGB16x8_Save_RGB.inc new file mode 100644 index 00000000..3dee6530 --- /dev/null +++ b/src/shaders/post_processing/Common/RGB16x8_Save_RGB.inc @@ -0,0 +1,38 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: RGB16x8_Save_RGB.inc +// + +#include "undefall.inc" //Undefine the SRC and DEST sysmbols + +// For saving +#define nDPW_BLOCK_SIZE_ARGB nBLOCK_WIDTH_32+nBLOCK_HEIGHT_8 // ARGB block size 32x8 +#define nDPW_MSG_SIZE_ARGB nMSGLEN_8 // # of MRF's to hold ARGB block data (8) + +// For masking +#undef nDPR_MSG_SIZE_ARGB +#define nDPR_MSG_SIZE_ARGB nRESLEN_8 // # of MRF's to hold ARGB block data (8) +#define rMASK_TEMP REG(r,nTEMP0) +.declare uwMASK_TEMP Base=rMASK_TEMP ElementSize=2 SrcRegion=<8;8,1> Type=uw //1 GRF + +#if (nSRC_REGION==nREGION_1) + // For saving + #define udDEST_ARGB udTOP_Y_IO //The output of previous stage is stored here; This is modified and is written to render cache + //For masking operation + #define udSRC_ARGB udBOT_Y_IO //To hold the destination data that shouldn't be modified + +#elif (nSRC_REGION==nREGION_2) + // For saving + #define udDEST_ARGB udBOT_Y_IO //The output of previous stage is stored here; This is modified and is written to render cache + //For masking operation + #define udSRC_ARGB udTOP_Y_IO //To hold the destination data that shouldn't be modified + +#endif diff --git a/src/shaders/post_processing/Common/RGB16x8_Save_RGB16.asm b/src/shaders/post_processing/Common/RGB16x8_Save_RGB16.asm new file mode 100644 index 00000000..3fbb9eba --- /dev/null +++ b/src/shaders/post_processing/Common/RGB16x8_Save_RGB16.asm @@ -0,0 +1,72 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: RGB16x8_Save_RGB16.asm +// +// Save packed RGB565 frame data block of size 16x8 +// +// To save 16x8 block (32x8 byte layout for RGB565) we need 1 send instruction +// ----- +// | 1 | +// ----- + +#include "RGB16x8_Save_RGB16.inc" + +//convert 32 bit RGB to 16 bit RGB + // Truncate A8R8G8B8 to A6R5G6B5 within byte. + // That is keeping 5 MSB of R and B, and 6 MSB of G. + + $for (0, 0; <nY_NUM_OF_ROWS; 1, 2) { + shr uwCSC_TEMP(%1,0)<1> ubDEST_ARGB(%2,0)<32;8,4> 3:w // B >> 3 + + shl (16) uwTEMP_RGB16(0)<1> uwDEST_ARGB(%2,1)<16;8,2> 8:w // R << 8 + and (16) uwTEMP_RGB16(0)<1> uwTEMP_RGB16(0) 0xF800:uw + or (16) uwCSC_TEMP(%1,0)<1> uwCSC_TEMP(%1,0)<16;16,1> uwTEMP_RGB16(0) + + shr (16) uwTEMP_RGB16(0)<1> uwDEST_ARGB(%2,0)<16;8,2> 5:w // G >> 5 + and (16) uwTEMP_RGB16(0)<1> uwTEMP_RGB16(0) 0x07E0:uw + or (16) uwCSC_TEMP(%1,0)<1> uwCSC_TEMP(%1,0)<16;16,1> uwTEMP_RGB16(0) + } + + mov (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w // Block origin (1st quadrant) + shl (1) rMSGSRC.0<1>:d wORIX<0;1,0>:w 1:w // H. block origin need to be doubled for byte offset + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_RGB16:ud // Block width and height (32x8) + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + +//Use the mask to determine which pixels shouldn't be over-written + and (1) acc0.0<1>:ud udBLOCK_MASK<0;1,0>:ud 0x00FFFFFF:ud + cmp.ge.f0.0(1) dNULLREG acc0.0<0;1,0>:ud 0x00FFFFFF:ud //Check if all pixels in the block need to be modified + (f0.0) jmpi WriteRGB16ToDataPort + + //If mask is not all 1's, then load the entire 32x8 block + //so that only those bytes may be modified that need to be (using the mask) + + // Load 32x8 packed RGB565 ----------------------------------------------------- + send (8) udSRC_RGB16(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_RGB16+nBI_DESTINATION_RGB:ud + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + + //Merge the data + mov (1) f0.0:uw ubBLOCK_MASK_V:ub //Load the mask on flag reg + (f0.0) mov (8) rMASK_TEMP<1>:uw uwBLOCK_MASK_H:uw //use sel instruction - vK + (-f0.0) mov (8) rMASK_TEMP<1>:uw 0:uw + + $for(0; <nY_NUM_OF_ROWS; 1) { + mov (1) f0.1:uw uwMASK_TEMP(0,%1)<0;1,0> + (-f0.1) mov (16) uwCSC_TEMP(%1)<1> uwSRC_RGB16(%1) + } + +WriteRGB16ToDataPort: + // Move packed data to MRF and output + $for(0; <nY_NUM_OF_ROWS; 1) { + mov (8) mudMSGPAYLOAD(%1)<1> udCSC_TEMP(%1) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_RGB16+nBI_DESTINATION_RGB:ud + +// End of RGB16x8_Save_RGB16 diff --git a/src/shaders/post_processing/Common/RGB16x8_Save_RGB16.inc b/src/shaders/post_processing/Common/RGB16x8_Save_RGB16.inc new file mode 100644 index 00000000..81614324 --- /dev/null +++ b/src/shaders/post_processing/Common/RGB16x8_Save_RGB16.inc @@ -0,0 +1,49 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: RGB16x8_Save_RGB16.inc +// + +#include "undefall.inc" //Undefine the SRC and DEST sysmbols + +// For saving +#define nDPW_BLOCK_SIZE_RGB16 nBLOCK_WIDTH_32+nBLOCK_HEIGHT_8 // RGB16 block size 32x8 +#define nDPW_MSG_SIZE_RGB16 nMSGLEN_8 // # of MRF's to hold RGB16 block data (8) + +// For conversion to 16bit +.declare uwTEMP_RGB16 Base=REG(r,nTEMP1) ElementSize=2 SrcRegion=<16;16,1> Type=uw //1 GRF + +// For masking +#undef nDPR_MSG_SIZE_RGB16 +#define nDPR_MSG_SIZE_RGB16 nRESLEN_8 // # of MRF's to hold ARGB block data (8) +#define rMASK_TEMP REG(r,nTEMP0) +.declare uwMASK_TEMP Base=rMASK_TEMP ElementSize=2 SrcRegion=<8;8,1> Type=uw //1 GRF + +#if (nSRC_REGION==nREGION_1) + // For saving + #define ubDEST_ARGB ubTOP_Y //Data from previous module + #define uwDEST_ARGB uwTOP_Y //Data from previous module + #define udCSC_TEMP udBOT_Y_IO //Data Converted to 16 bits + #define uwCSC_TEMP uwBOT_Y + //For masking operation + #define udSRC_RGB16 udTOP_Y_IO //To hold the destination data that shouldn't be modified + #define uwSRC_RGB16 uwTOP_Y + +#elif (nSRC_REGION==nREGION_2) + // For saving + #define ubDEST_ARGB ubBOT_Y //Data from previous module + #define uwDEST_ARGB uwBOT_Y //Data from previous module + #define udCSC_TEMP udTOP_Y_IO //Data Converted to 16 bits + #define uwCSC_TEMP uwTOP_Y + //For masking operation + #define udSRC_RGB16 udBOT_Y_IO //To hold the destination data that shouldn't be modified + #define uwSRC_RGB16 uwBOT_Y + +#endif diff --git a/src/shaders/post_processing/Common/RGB16x8_Save_Y416.asm b/src/shaders/post_processing/Common/RGB16x8_Save_Y416.asm new file mode 100644 index 00000000..915f797c --- /dev/null +++ b/src/shaders/post_processing/Common/RGB16x8_Save_Y416.asm @@ -0,0 +1,107 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: RGB16x8_Save_Y416.asm +// +// Save packed ARGB 444 frame data block of size 16x8 +// +// To save 16x8 block (128x8 byte layout for ARGB 16bit per component) we need 4 send instructions +// ----------------- +// | 1 | 2 | 3 | 4 | +// ----------------- + +#include "RGB16x8_Save_RGB.inc" + + shl (1) rMSGSRC.0<1>:d wORIX<0;1,0>:w 3:w { NoDDClr } // H. block origin need to become 8 times + mov (1) rMSGSRC.1<1>:d wORIY<0;1,0>:w { NoDDClr, NoDDChk } // Block origin (1st quadrant) + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_ARGB:ud { NoDDChk } // Block width and height (32x8) + + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud +/* Not needed for validation kernels for now -vK +//Use the mask to determine which pixels shouldn't be over-written + and (1) acc0.0<1>:ud udBLOCK_MASK<0;1,0>:ud 0x00FFFFFF:ud + cmp.ge.f0.0(1) dNULLREG acc0.0<0;1,0>:ud 0x00FFFFFF:ud //Check if all pixels in the block need to be modified + (f0.0) jmpi WriteARGBToDataPort + + //If mask is not all 1's, then load the entire 64x8 block + //so that only those bytes may be modified that need to be (using the mask) + + // Load first block 16x8 packed ARGB 444 --------------------------------------- + or (1) acc0.0<1>:ud udBLOCK_MASK<0;1,0>:ud 0xFF00FF00:ud //Check first block + cmp.e.f0.0 (1) dNULLREG acc0.0<0;1,0>:ud 0xFFFFFFFF:ud + (f0.0) jmpi SkipFirstBlockMerge //If full mask then skip this block + + send (8) udSRC_ARGB(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_ARGB+nBI_DESTINATION_RGB:ud + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + + //Merge the data + mov (1) f0.0:uw ubBLOCK_MASK_V:ub //Load the mask on flag reg + (f0.0) mov (8) rMASK_TEMP<1>:uw uwBLOCK_MASK_H:uw //use sel instruction - vK + (-f0.0) mov (8) rMASK_TEMP<1>:uw 0:uw + + $for(0, 0; <nY_NUM_OF_ROWS; 1, 2) { //take care of the lines in the block, they are different in the src and dest + mov (1) f0.1:uw uwMASK_TEMP(0,%1)<0;1,0> + (-f0.1) mov (8) udDEST_ARGB(%2)<1> udSRC_ARGB(%1) + } + +SkipFirstBlockMerge: + // Load second block 16x8 packed ARGB 444 --------------------------------------- + or (1) acc0.0<1>:ud udBLOCK_MASK<0;1,0>:ud 0xFF0000FF:ud //Check second block + cmp.e.f0.0 (1) dNULLREG acc0.0<0;1,0>:ud 0xFFFFFFFF:ud + (f0.0) jmpi WriteARGBToDataPort //If full mask then skip this block + + add (1) mMSGHDR.0<1>:d rMSGSRC.0<0;1,0>:d 32:d // Point to 2nd part + send (8) udSRC_ARGB(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_ARGB+nBI_DESTINATION_RGB:ud + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud // Point to 1st part again + + //Merge the data + mov (1) f0.0:uw ubBLOCK_MASK_V:ub //Load the mask on flag reg + (f0.0) shr (8) rMASK_TEMP<1>:uw uwBLOCK_MASK_H:uw 8:uw //load the mask for second block + (-f0.0) mov (8) rMASK_TEMP<1>:uw 0:uw + + $for(0, 1; <nY_NUM_OF_ROWS; 1, 2) { //take care of the lines in the block, they are different in the src and dest + mov (1) f0.1:uw uwMASK_TEMP(0,%1)<0;1,0> + (-f0.1) mov (8) udDEST_ARGB(%2)<1> udSRC_ARGB(%1) + } +*/ +WriteARGBToDataPort: + // Move packed data to MRF and output + + //Write 1st 4X8 pixels + $for(0; <nY_NUM_OF_ROWS; 1) { + mov (8) mudMSGPAYLOAD(%1)<1> udDEST_ARGB(%1*4) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_ARGB+nBI_DESTINATION_RGB:ud + + //Write 2nd 4X8 pixels + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + add (1) mMSGHDR.0<1>:d rMSGSRC.0<0;1,0>:d 32:d // Point to 2nd part + $for(0; <nY_NUM_OF_ROWS; 1) { + mov (8) mudMSGPAYLOAD(%1)<1> udDEST_ARGB(%1*4+1) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_ARGB+nBI_DESTINATION_RGB:ud + + //Write 3rd 4X8 pixels + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + add (1) mMSGHDR.0<1>:d rMSGSRC.0<0;1,0>:d 64:d // Point to 2nd part + $for(0; <nY_NUM_OF_ROWS; 1) { + mov (8) mudMSGPAYLOAD(%1)<1> udDEST_ARGB(%1*4+2) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_ARGB+nBI_DESTINATION_RGB:ud + + //Write 4th 4X8 pixels + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + add (1) mMSGHDR.0<1>:d rMSGSRC.0<0;1,0>:d 96:d // Point to 2nd part + $for(0; <nY_NUM_OF_ROWS; 1) { + mov (8) mudMSGPAYLOAD(%1)<1> udDEST_ARGB(%1*4+3) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_ARGB+nBI_DESTINATION_RGB:ud + +// End of RGB16x8_Save_Y416 diff --git a/src/shaders/post_processing/Common/RGB16x8_Save_Y416.inc b/src/shaders/post_processing/Common/RGB16x8_Save_Y416.inc new file mode 100644 index 00000000..b6b45c4b --- /dev/null +++ b/src/shaders/post_processing/Common/RGB16x8_Save_Y416.inc @@ -0,0 +1,38 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: RGB16x8_Save_Y416.inc +// + +#include "undefall.inc" //Undefine the SRC and DEST sysmbols + +// For saving +#define nDPW_BLOCK_SIZE_ARGB nBLOCK_WIDTH_32+nBLOCK_HEIGHT_8 // ARGB block size 32x8 +#define nDPW_MSG_SIZE_ARGB nMSGLEN_8 // # of MRF's to hold ARGB block data (8) + +// For masking +#undef nDPR_MSG_SIZE_ARGB +#define nDPR_MSG_SIZE_ARGB nRESLEN_8 // # of MRF's to hold ARGB block data (8) +#define rMASK_TEMP REG(r,nTEMP0) +.declare uwMASK_TEMP Base=rMASK_TEMP ElementSize=2 SrcRegion=<8;8,1> Type=uw //1 GRF + +#if (nSRC_REGION==nREGION_1) + // For saving + #define udDEST_ARGB udTOP_Y_IO //The output of previous stage is stored here; This is modified and is written to render cache + //For masking operation + #define udSRC_ARGB udBOT_Y_IO //To hold the destination data that shouldn't be modified + +#elif (nSRC_REGION==nREGION_2) + // For saving + #define udDEST_ARGB udBOT_Y_IO //The output of previous stage is stored here; This is modified and is written to render cache + //For masking operation + #define udSRC_ARGB udTOP_Y_IO //To hold the destination data that shouldn't be modified + +#endif diff --git a/src/shaders/post_processing/Common/RGB_Pack.asm b/src/shaders/post_processing/Common/RGB_Pack.asm new file mode 100644 index 00000000..063e2563 --- /dev/null +++ b/src/shaders/post_processing/Common/RGB_Pack.asm @@ -0,0 +1,40 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + + +.declare SRC_B Base=REG(r,10) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw +.declare SRC_G Base=REG(r,18) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw +.declare SRC_R Base=REG(r,26) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw +.declare SRC_A Base=REG(r,34) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw + +#define DEST_ARGB ubBOT_ARGB + +#undef nSRC_REGION +#define nSRC_REGION nREGION_2 + + +//Pack directly to mrf as optimization - vK + +$for(0, 0; <8; 1, 2) { +// mov (16) DEST_ARGB(%2,0)<4> SRC_B(%1) { Compr, NoDDClr } // 16 B +// mov (16) DEST_ARGB(%2,1)<4> SRC_G(%1) { Compr, NoDDClr, NoDDChk } // 16 G +// mov (16) DEST_ARGB(%2,2)<4> SRC_R(%1) { Compr, NoDDClr, NoDDChk } // 16 R //these 2 inst can be merged - vK +// mov (16) DEST_ARGB(%2,3)<4> SRC_A(%1) { Compr, NoDDChk } //DEST_RGB_FORMAT<0;1,0>:ub { Compr, NoDDChk } // 16 A + + mov (8) DEST_ARGB(%2, 0)<4> SRC_B(%1) { NoDDClr } // 8 B + mov (8) DEST_ARGB(%2, 1)<4> SRC_G(%1) { NoDDClr, NoDDChk } // 8 G + mov (8) DEST_ARGB(%2, 2)<4> SRC_R(%1) { NoDDClr, NoDDChk } // 8 R + mov (8) DEST_ARGB(%2, 3)<4> SRC_A(%1) { NoDDChk } // 8 A + + mov (8) DEST_ARGB(%2+1,0)<4> SRC_B(%1,8) { NoDDClr } // 8 B + mov (8) DEST_ARGB(%2+1,1)<4> SRC_G(%1,8) { NoDDClr, NoDDChk } // 8 G + mov (8) DEST_ARGB(%2+1,2)<4> SRC_R(%1,8) { NoDDClr, NoDDChk } // 8 R + mov (8) DEST_ARGB(%2+1,3)<4> SRC_A(%1,8) { NoDDChk } // 8 A +} diff --git a/src/shaders/post_processing/Common/SetupVPKernel.asm b/src/shaders/post_processing/Common/SetupVPKernel.asm new file mode 100644 index 00000000..6375b0cc --- /dev/null +++ b/src/shaders/post_processing/Common/SetupVPKernel.asm @@ -0,0 +1,34 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Modual name: SetupVPKernel.asm +// +// Initial setup for running video-processing kernels +// + +#include "common.inc" + +// +// Now, begin source code.... +// +.code + +#include "Init_All_Regs.asm" + +mov (8) rMSGSRC.0<1>:ud r0.0<8;8,1>:ud // Initialize message payload header with R0 +#if defined (INC_BLENDING) + mul (1) fALPHA_STEP_X:f fSCALING_STEP_RATIO:f fVIDEO_STEP_X:f //StepX_ratio = AlphaStepX / VideoStepX +#endif + +// End of SetupVPKernel + + + + diff --git a/src/shaders/post_processing/Common/common.inc b/src/shaders/post_processing/Common/common.inc new file mode 100644 index 00000000..a0a66a00 --- /dev/null +++ b/src/shaders/post_processing/Common/common.inc @@ -0,0 +1,610 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +#ifndef COMMON_INC +#define COMMON_INC + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 80 +.reg_count_payload 4 + + +//========== Common constants ========== + +// Bit position constants +#define BIT0 0x01 +#define BIT1 0x02 +#define BIT2 0x04 +#define BIT3 0x08 +#define BIT4 0x10 +#define BIT5 0x20 +#define BIT6 0x40 +#define BIT7 0x80 +#define BIT8 0x0100 +#define BIT9 0x0200 +#define BIT10 0x0400 +#define BIT11 0x0800 +#define BIT12 0x1000 +#define BIT13 0x2000 +#define BIT14 0x4000 +#define BIT15 0x8000 +#define BIT16 0x00010000 +#define BIT17 0x00020000 +#define BIT18 0x00040000 +#define BIT19 0x00080000 +#define BIT20 0x00100000 +#define BIT21 0x00200000 +#define BIT22 0x00400000 +#define BIT23 0x00800000 +#define BIT24 0x01000000 +#define BIT25 0x02000000 +#define BIT26 0x04000000 +#define BIT27 0x08000000 +#define BIT28 0x10000000 +#define BIT29 0x20000000 +#define BIT30 0x40000000 +#define BIT31 0x80000000 + +#define nGRFWIB 32 // GRF register width in byte +#define nGRFWIW 16 // GRF register width in word +#define nGRFWID 8 // GRF register width in dword + +#define nTOP_FIELD 0 +#define nBOTTOM_FIELD 1 + +#define nPREVIOUS_FRAME 0 // Previous frame +#define nCURRENT_FRAME 1 // Current frame +#define nNEXT_FRAME 2 // Next frame + +#ifdef GT +// GT DI Kernel +#else // ILK +// ILK DI Kernel +#endif + +//=================================== + +//========== Macros ========== +#define REGION(Width,HStride) <Width*HStride;Width,HStride> // Region definition when ExecSize = Width + +#define RegFile(a) a +#define REG(r,n) _REG(RegFile(r),n) +#define _REG(r,n) __REG(r,n) +#define __REG(r,n) r##n.0 +#define REG2(r,n,s) _REG2(RegFile(r),n,s) +#define _REG2(r,n,s) __REG2(r,n,s) +#define __REG2(r,n,s) r##n.##s + +#define dNULLREG null<1>:d +#define wNULLREG null<1>:w + +#define KERNEL_ID(kernel_ID) mov NULLREG kernel_ID:ud + + +#define NODDCLR +#define NODDCLR_NODDCHK +#define NODDCHK + +//#define NODDCLR { NoDDClr } +//#define NODDCLR_NODDCHK { NoDDClr, NoDDChk } +//#define NODDCHK { NoDDChk } + + +//========== Defines ==================== + + +//========== GRF partition ========== +// r0 header : r0 (1 GRF) +// Static parameters : r1 - r5 (5 GRFS) +// Inline parameters : r6 - r7 (2 GRFs) +// MSGSRC : r9 (1 GRF) +// Top IO region : r10 - r33 (24 GRFS 8 for each component Y,U,V 16X8:w) +// Free space : r34 - r55 (22 GRFS) +// Bottom IO region : r56 - r79 (24 GRFS 8 for each component Y,U,V 16X8:w) +//=================================== + + +//========== Static Parameters ========== +// r1 +#define fPROCAMP_C0 r1.0 // DWORD 0, Procamp constant C0 in :f +#define wPROCAMP_C0 r1.0 // DWORD 0, Procamp constant C0 in :w +#define NUMBER_0002 r1.1 // DWORD 0, 0x0002 used in procamp for GT +#define udCP_MessageFormat r1.0 // DWORD 0, bits 2:3 of DWORD. (CE) +#define udCP_StatePointer r1.0 // DWORD 0, bits 31:5 of DWORD.(CE) + +#define ubSRC_CF_OFFSET r1.4 // DWORD 1, byte 0-2. SRC packed color format YUV offset in :ub + +#define ubDEST_RGB_FORMAT r1.8 // DWORD 2, byte 0. Dest RGB color format (0:ARGB FF:XRGB) +#define ubDEST_CF_OFFSET r1.8 // DWORD 2, byte 0-2. Dest packed color format YUV offset in :ub + +#define fPROCAMP_C1 r1.3 // DWORD 3, Procamp constant C1 in :f +#define wPROCAMP_C1 r1.6 // DWORD 3, Procamp constant C1 in :w +#define NUMBER_0100 r1.7 // DWORD 3, 0x0100 used in procamp for GT + +#define fPROCAMP_C2 r1.4 // DWORD 4, Procamp constant C2 in :f +#define wPROCAMP_C2 r1.8 // DWORD 4, Procamp constant C2 in :w + +#define uwSPITCH_DIV2 r1.10 // DWORD 5, byte 0-1. statistics surface pitch divided by 2 + +#define fVIDEO_STEP_Y r1.6 // DWORD 6, :f, AVS normalized reciprocal of Y Scaling factor +#define ubSTMM_SHIFT r1.24 // DWORD 6, byte 0. Amount of right shift for the DI blending equation +#define ubSTMM_MIN r1.25 // DWORD 6, byte 1. Min STMM for DI blending equation +#define ubSTMM_MAX r1.26 // DWORD 6, byte 2. Max STMM for DI blending equation +#define ubTFLD_FIRST r1.27 // DWORD 6, byte 3. Field parity order + +#define fPROCAMP_C5 r1.7 // DWORD 7, Procamp constant C3 in :f +#define wPROCAMP_C5 r1.14 // DWORD 7, Procamp constant C3 in :w + +// r2 +#define fPROCAMP_C3 r2.0 // DWORD 0, Procamp constant C4 in :f +#define wPROCAMP_C3 r2.0 // DWORD 0, Procamp constant C4 in :w + +#define fCSC_C5 r2.2 // DWORD 2. WG+CSC constant C5 +#define wCSC_C5 r2.4 // DWORD 2. WG+CSC constant C5 + +#define fPROCAMP_C4 r2.3 // DWORD 3, Procamp constant C5 in :f +#define wPROCAMP_C4 r2.6 // DWORD 3, Procamp constant C5 in :w + +#define fCSC_C8 r2.4 // DWORD 4. WG+CSC constant C8 +#define wCSC_C8 r2.8 // DWORD 4. WG+CSC constant C8 +#define fCSC_C9 r2.7 // DWORD 7. WG+CSC constant C9 +#define wCSC_C9 r2.14 // DWORD 7. WG+CSC constant C9 + +// r3 +#define fCSC_C0 r3.0 // DWORD 0. WG+CSC constant C0 +#define wCSC_C0 r3.0 // DWORD 0. WG+CSC constant C0 + +#define fSCALING_STEP_RATIO r3.1 // DWORD 1, = Alpha_X_Scaling_Step / Video_X_scaling_Step :f (blending) +#define fALPHA_STEP_X r3.1 // DWORD 1, = 1/Scale X, 0.5 = 2x, in :f (blending) + +#define fALPHA_STEP_Y r3.2 // DWORD 2, = 1/Scale Y, in :f + +#define fCSC_C4 r3.3 // DWORD 3. WG+CSC constant C4 +#define wCSC_C4 r3.6 // DWORD 3. WG+CSC constant C4 +#define fCSC_C1 r3.4 // DWORD 4. WG+CSC constant C1 +#define wCSC_C1 r3.8 // DWORD 4. WG+CSC constant C1 + +#define wSRC_H_ORI_OFFSET r3.10 // DWORD 5, bytes 0,1 :w +#define wSRC_V_ORI_OFFSET r3.11 // DWORD 5, bytes 2,3 :w + +#define dCOLOR_PIXEL r3.6 // DWORD 6. Color pixel for Colorfill + +#define fCSC_C2 r3.6 // DWORD 6. WG+CSC constant C2 +#define wCSC_C2 r3.12 // DWORD 6. WG+CSC constant C2 +#define fCSC_C3 r3.7 // DWORD 7. WG+CSC constant C3 +#define wCSC_C3 r3.14 // DWORD 7. WG+CSC constant C3 + +// r4 +#define fCSC_C6 r4.0 // DWORD 0. WG+CSC constant C6 +#define wCSC_C6 r4.0 // DWORD 0. WG+CSC constant C6 + +#define wFRAME_ENDX r4.2 // DWORD 1, word 0. Horizontal end = Origin+Width (in pixels)(for multiple blocks) +#define wNUM_BLKS r4.3 // DWORD 1, word 1. Number of blocks to process (for multiple blocks) + +#define wCOPY_ORIX r4.5 // DWORD 2, word 1. A copy of X origin (for multiple blocks) +#define uwNLAS_ENABLE r4.4 // DWORD 2, bit 15, NLAS enble bit + +#define fCSC_C7 r4.3 // DWORD 3. WG+CSC constant C7 +#define wCSC_C7 r4.6 // DWORD 3. WG+CSC constant C7 +#define fCSC_C10 r4.4 // DWORD 4. WG+CSC constant C10 +#define wCSC_C10 r4.8 // DWORD 4. WG+CSC constant C10 + +#define fFRAME_VID_ORIX r4.5 // DWORD 5, Frame horizontal origin normalized for scale kernel + +#define fFRAME_ALPHA_ORIX r4.6 // DWORD 6. Normalized alpha horiz origin for the frame + +#define fCSC_C11 r4.7 // DWORD 7. WG+CSC constant C11 +#define wCSC_C11 r4.14 // DWORD 7. WG+CSC constant C11 + +//======================================== + +//========== Inline parameters =========== +// r5 +#define wORIX r5.0 // DWORD 0, byte 0-1. :w, Destination Block Horizontal Origin in pel +#define wORIY r5.1 // DWORD 0, byte 2-3. :w, Destination Block Vertical Origin in pel + +#define fSRC_VID_H_ORI r5.1 // DWORD 1, :f, SRC Y horizontal origin normalized for scale kernel + +#define fSRC_VID_V_ORI r5.2 // DWORD 2, :f, SRC Y vertical origin normalized for scale kernel + +#define fSRC_ALPHA_H_ORI r5.3 // DWORD 3, :f, Normalized alpha horizontal origin + +#define fSRC_ALPHA_V_ORI r5.4 // DWORD 4, :f, Normalized alpha vertical origin + +#define uwALPHA_MASK_X r5.10 // DWORD 5, byte 0-1 :w, H. alpha mask +#define ubALPHA_MASK_Y r5.22 // DWORD 5, byte 2. :ub,V. alpha mask +#define ubBLK_CNT_X r5.23 // DWORD 5, byte 3, :ub, Horizontal Block Count per thread + +#define udBLOCK_MASK r5.6 // DWORD 6 +#define uwBLOCK_MASK_H r5.12 // DWORD 6, byte 0-1 :uw, Block horizontal mask used in non-DWord aligned kernels +#define ubBLOCK_MASK_V r5.26 // DWORD 6, byte 2 :ub, Block vertical mask used in non-DWord aligned kernels +#define ubNUM_BLKS r5.27 // DWORD 6, byte 3, :ub, Total Block Count per thread + +#define fVIDEO_STEP_X r5.7 // DWORD 7. :f, AVS normalized reciprocal of X Scaling factor + +// r6 +#define fVIDEO_STEP_DELTA r6.0 // DWORD 0. :f, AVS normalized delta between 2 adjacent scaling steps (used for non-linear scaling) + + +//====================== Binding table ========================================= + +#if defined(DNDI) + // DNDI Surface Binding Table + //#define nBI_SRC_CURR 0 // Current input frame surface + //#define nBI_SRC_PRIV 1 // Denoised previous input frame surface + //#define nBI_SRC_STAT 2 // Statistics input surface (STMM / Noise motion history) + //#define nBI_DEST_1ST 3 // 1st deinterlaced output frame surface +// #define nBI_DEST_YUV 3 // Dest frame YUV (for DN only) + //#define nBI_DEST_Y 3 // Dest frame Y (for DN only) + //#define nBI_DEST_2ND 4 // 2nd deinterlaced output frame surface + //#define nBI_DEST_DN_CURR 6 // Denoised current output frame surface + //#define nBI_DEST_STAT 7 // Statistics output surface (STMM / Noise motion history) +// #define nBI_DEST_U 8 // Dest frame U (for DN only) +// #define nBI_DEST_V 9 // Dest frame V (for DN only) +// #define nBI_SRC_U 10 // Src frame U (for DN only) +// #define nBI_SRC_V 11 // Src frame V (for DN only) +// #define nBI_SRC_UV 10 // Current src frame for UV + +#endif + +#if defined(INPUT_PL3) + // PL3 Surface Binding Table +// #define nBI_SRC_ALPHA 0 // Alpha +// #define nBI_SRC_Y 1 // Current src frame +// #define nBI_SRC_U 2 // Current src frame +// #define nBI_SRC_V 3 // Current src frame +// #define nBI_DEST_Y 10 // Dest frame +// #define nBI_DEST_U 11 // Dest frame +// #define nBI_DEST_V 12 // Dest frame +// #define nBI_DEST_YUV 7 // Dest frame +// #define nBI_DEST_RGB 7 // same num as BI_DEST_YUV, never used at the same time +#endif + +#if defined(INPUT_PL2) + // PL2 Surface Binding Table +// #define nBI_SRC_ALPHA 0 // Alpha +// #define nBI_SRC_Y 1 // Current src frame for Y + offseted UV +// #define nBI_SRC_YUV 1 // Current src frame for YUV in case of NV12_AVS +// #define nBI_SRC_UV 2 // Current src frame for UV +// #define nBI_DEST_YUV 7 // Current dest frame for Y + offseted UV +// #define nBI_DEST_RGB 7 // same num as BI_DEST_YUV, never used at the same time +// #define nBI_DEST_Y 10 // Dest frame +// #define nBI_DEST_U 11 // Dest frame +// #define nBI_DEST_V 12 // Dest frame +#endif + +#if defined(INPUT_PA) || defined(COLORFILL) + // Packed Surface Binding Table +// #define nBI_SRC_ALPHA 0 // Alpha +// #define nBI_SRC_YUV 1 // Current src frame +// #define nBI_DEST_YUV 3 // Dest frame +// #define nBI_DEST_RGB 3 // same num as BI_DEST_YUV, never used at the same time +#endif + + +//supper binding table +#define nBI_ALPHA_SRC 0 +#define nBI_CURRENT_SRC_YUV 1 +#define nBI_FIELD_COPY_SRC_1_YUV 1 +#define nBI_CURRENT_SRC_Y 1 +#define nBI_FIELD_COPY_SRC_1_Y 1 +#define nBI_CURRENT_SRC_RGB 1 +#define nBI_CURRENT_SRC_UV 2 +#define nBI_FIELD_COPY_SRC_1_UV 2 +#define nBI_CURRENT_SRC_U 2 +#define nBI_FIELD_COPY_SRC_1_U 2 +#define nBI_CURRENT_SRC_V 3 +#define nBI_FIELD_COPY_SRC_1_V 3 +#define nBI_TEMPORAL_REFERENCE_YUV 4 +#define nBI_FIELD_COPY_SRC_2_YUV 4 +#define nBI_TEMPORAL_REFERENCE_Y 4 +#define nBI_FIELD_COPY_SRC_2_Y 4 +#define nBI_CURRENT_SRC_YUV_HW_DI 4 +#define nBI_TEMPORAL_REFERENCE_UV 5 +#define nBI_FIELD_COPY_SRC_2_UV 5 +#define nBI_TEMPORAL_REFERENCE_U 5 +#define nBI_FIELD_COPY_SRC_2_U 5 +#define nBI_DENOISED_PREV_HW_DI 5 +#define nBI_TEMPORAL_REFERENCE_V 6 +#define nBI_FIELD_COPY_SRC_2_V 6 +#define nBI_STMM_HISTORY 6 +#define nBI_DESTINATION_YUV 7 +#define nBI_DESTINATION_RGB 7 +#define nBI_DESTINATION_Y 7 +#define nBI_DESTINATION_UV 8 +#define nBI_DESTINATION_U 8 +#define nBI_DESTINATION_V 9 +#define nBI_DESTINATION_1_YUV 10 +#define nBI_DESTINATION_1_Y 10 +#define nBI_DESTINATION_1_UV 11 +#define nBI_DESTINATION_1_U 11 +#define nBI_DESTINATION_1_V 12 +#define nBI_DESTINATION_2_YUV 13 +#define nBI_DESTINATION_2_Y 13 +#define nBI_DESTINATION_2_UV 14 +#define nBI_DESTINATION_2_U 14 +#define nBI_DESTINATION_2_V 15 +#define nBI_STMM_HISTORY_OUTPUT 20 +#define nBI_TEMPORAL_REFERENCE_YUV_PDI 21 +#define nBI_TEMPORAL_REFERENCE_Y_PDI 21 +#define nBI_TEMPORAL_REFERENCE_UV_PDI 22 +#define nBI_TEMPORAL_REFERENCE_U_PDI 22 +#define nBI_TEMPORAL_REFERENCE_V_PDI 23 +#define nBI_SUBVIDEO_YUV 26 +#define nBI_SUBVIDEO_Y 26 +#define nBI_SUBVIDEO_UV 27 +#define nBI_SUBVIDEO_U 27 +#define nBI_SUBVIDEO_V 28 +#define nBI_SUBPICTURE_YUV 29 +#define nBI_SUBPICTURE_P8 29 +#define nBI_SUBPICTURE_A8 30 +#define nBI_GRAPHIC_YUV 31 +#define nBI_GRAPHIC_P8 31 +#define nBI_GRAPHIC_A8 32 + + + +//========== Planar Sampler State Table Index ========== +#define nSI_SRC_ALPHA 0x000 // Sampler State for Alpha + +//Sampler Index for AVS/IEF messages +#define nSI_SRC_Y 0x400 // Sampler State for Y +#define nSI_SRC_U 0x800 // Sampler State for U +#define nSI_SRC_V 0xC00 // Sampler State for V +#define nSI_SRC_UV 0x800 // For NV12 surfaces +#define nSI_SRC_YUV 0x400 // For Packed surfaces +#define nSI_SRC_RGB 0x400 // For ARGB surfaces + +//Sampler Index for SIMD16 sampler messages +#define nSI_SRC_SIMD16_Y 0x100 // Sampler State for Y +#define nSI_SRC_SIMD16_U 0x200 // Sampler State for U +#define nSI_SRC_SIMD16_V 0x300 // Sampler State for V +#define nSI_SRC_SIMD16_UV 0x200 // For NV12 surfaces +#define nSI_SRC_SIMD16_YUV 0x100 // For Packed surfaces +#define nSI_SRC_SIMD16_RGB 0x100 // For ARGB surfaces + + + +// Common Registers +#define pCF_Y_OFFSET a0.4 // Address register holding Y offset +#define pCF_U_OFFSET a0.5 // Address register holding U offset +#define pCF_V_OFFSET a0.6 // Address register holding V offset + +// #define YUV_ORI ORIX // Used by writing packed data to dport + + +//================= Message Payload Header fields ============================== +#define IDP r0.2:ud // Interface Descriptor Pointer + +//================= Common Message Descriptor TBD add common load and save ===== +// Message descriptor for dataport media write +#ifdef GT + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 0 1010 (media block write) 00000 + // 00000000 (binding table index - set later) + // = 0x02094000 + #define nDPMW_MSGDSC 0x02094000 + #define nDPMR_MSGDSC 0x02098000 // Data Port Media Block Read Message Descriptor + // TBD +#else // ILK + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 000 0 010 (media block write) 0000 + // 00000000 (binding table index - set later) + // = 0x02082000 + #define nDPMW_MSGDSC 0x02082000 // Data Port Media Block Write Message Descriptor + #define nDPMR_MSGDSC 0x0208A000 // Data Port Media Block Read Message Descriptor +#endif + +// Message Length defines +#define nMSGLEN_1 0x02000000 // Message Length of 1 GRF for Send +#define nMSGLEN_2 0x04000000 // Message Length of 2 GRF for Send +#define nMSGLEN_4 0x08000000 // Message Length of 4 GRF for Send +#define nMSGLEN_8 0x10000000 // Message Length of 8 GRF for Send + +// Response Length defines +#define nRESLEN_1 0x00100000 // Message Response Length of 1 GRF from Send +#define nRESLEN_2 0x00200000 // Message Response Length of 2 GRF from Send +#define nRESLEN_3 0x00300000 // Message Response Length of 3 GRF from Send +#define nRESLEN_4 0x00400000 // Message Response Length of 4 GRF from Send +#define nRESLEN_5 0x00500000 // Message Response Length of 5 GRF from Send +#define nRESLEN_8 0x00800000 // Message Response Length of 8 GRF from Send +#define nRESLEN_9 0x00900000 // Message Response Length of 9 GRF from Send +#define nRESLEN_11 0x00B00000 // Message Response Length of 11 GRF from Send +#define nRESLEN_12 0x00C00000 // Message Response Length of 12 GRF from Send +#define nRESLEN_16 0x01000000 // Message Response Length of 16 GRF from Send + +// Block Width and Height Size defines +#define nBLOCK_WIDTH_4 0x00000003 // Block Width 4 +#define nBLOCK_WIDTH_5 0x00000004 // Block Width 5 +#define nBLOCK_WIDTH_8 0x00000007 // Block Width 8 +#define nBLOCK_WIDTH_9 0x00000008 // Block Width 9 +#define nBLOCK_WIDTH_12 0x0000000B // Block Width 12 +#define nBLOCK_WIDTH_16 0x0000000F // Block Width 16 +#define nBLOCK_WIDTH_20 0x00000013 // Block Width 20 +#define nBLOCK_WIDTH_32 0x0000001F // Block Width 32 +#define nBLOCK_HEIGHT_1 0x00000000 // Block Height 1 +#define nBLOCK_HEIGHT_2 0x00010000 // Block Height 2 +#define nBLOCK_HEIGHT_4 0x00030000 // Block Height 4 +#define nBLOCK_HEIGHT_5 0x00040000 // Block Height 5 +#define nBLOCK_HEIGHT_8 0x00070000 // Block Height 8 + +// Extended Message Descriptors +#define nEXTENDED_MATH 0x1 +#define nSMPL_ENGINE 0x2 +#define nMESSAGE_GATEWAY 0x3 +#define nDATAPORT_READ 0x4 +#define nDATAPORT_WRITE 0x5 +#define nURB 0x6 +#define nTS_EOT 0x27 // with End-Of-Thread bit ON + +// Common message descriptors: +#ifdef GT + #define nEOT_MSGDSC 0x02000010 // End of Thread Message Descriptor + #define IF_NULL null:uw null:uw null:uw //for different if instructions on ILK and Gen6 +#else //ILK + #define nEOT_MSGDSC 0x02000000 // End of Thread Message Descriptor + #define IF_NULL +#endif + + +//===================== Math Function Control =================================== +#define mfcINV 0x1 // reciprocal +#define mfcLOG 0x2 // log +#define mfcEXP 0x3 // exponent +#define mfcSQRT 0x4 // square root +#define mfcRSQ 0x5 // reciprocal square root +#define mfcSIN 0x6 // sine (in radians) +#define mfcCOS 0x7 // cosine (in radians) +#define mfcSINCOS 0x8 // dst0 = sin of src0, dst1 = cosine of src0 (in radians) - GT+ ONLY +#define mfcPOW 0xA // abs(src0) raised to the src1 power +#define mfcINT_DIV_QR 0xB // return quotient and remainder +#define mfcINT_DIV_Q 0xC // return quotient +#define mfcINT_DIV_R 0xD // return remainder + + +//=================== Message related registers ================================= + +#ifdef GT + #define udDUMMY_NULL +#else // _ILK + #define udDUMMY_NULL null:ud // Used in send inst as src0 +#endif + + +//----------- Message Registers ------------ +#define mMSGHDR m1 // Message Payload Header +#define mMSGHDRY m1 // Message Payload Header register for Y data +#define mMSGHDRU m2 // Message Payload Header register for U data +#define mMSGHDRV m3 // Message Payload Header register for V data +#define mMSGHDRYA m4 // Second Message Payload Header register for Y data +#define mMSGHDRH m5 // Message Payload Header register for motion history +#define mMSGHDRY1 m1 // Message Payload Header register for first Y data +#define mMSGHDRY2 m2 // Message Payload Header register for second Y data +#define mMSGHDRY3 m3 // Message Payload Header register for third Y data +#define mMSGHDRY4 m4 // Message Payload Header register for fourth Y data +#define mMSGHDRY5 m5 // Message Payload Header register for fifth Y data +#define mMSGHDRY6 m6 // Message Payload Header register for sixth Y data +#define mMSGHDR_EOT m15 // Dummy Message Register for EOT + +#define rMSGSRC r8 // Message source register +#define pMSGDSC a0.0:ud // Message Descriptor register (type DWORD) + +#define udMH_ORI rMSGSRC.0 // Data Port Media Block R/W message header block offset +#define udMH_ORIX rMSGSRC.0 // Data Port Media Block R/W message header X offset +#define udMH_ORIY rMSGSRC.1 // Data Port Media Block R/W message header Y offset +#define udMH_SIZE rMSGSRC.2 // Data Port Media Block R/W message header block width & height + +// M2 - M9 for message data payload +.declare mubMSGPAYLOAD Base=m2 ElementSize=1 SrcRegion=REGION(16,1) Type=ub +.declare muwMSGPAYLOAD Base=m2 ElementSize=2 SrcRegion=REGION(16,1) Type=uw +.declare mudMSGPAYLOAD Base=m2 ElementSize=4 SrcRegion=REGION(8,1) Type=ud +.declare mfMSGPAYLOAD Base=m2 ElementSize=4 SrcRegion=REGION(8,1) Type=f + +//=================== End of thread instruction =========================== +#ifdef GT + #define END_THREAD mov (8) mMSGHDR_EOT<1>:ud r0.0<8;8,1>:ud \n\ + send (1) null<1>:d mMSGHDR_EOT nTS_EOT nEOT_MSGDSC +#else // ILK This should be changed to 1 instruction; I have tested it and it works - vK + #define END_THREAD mov (8) mMSGHDR_EOT<1>:ud r0.0<8;8,1>:ud \n\ + send (1) dNULLREG mMSGHDR_EOT udDUMMY_NULL nTS_EOT nEOT_MSGDSC:ud +#endif + + +//======================================================================= +// Region declarations for SRC and DEST as TOP and BOT + +// Common I/O regions +#define nREGION_1 1 +#define nREGION_2 2 + +//*** These region base GRFs are fixed regardless planar/packed, and data alignment. +//*** Each kernel is responsible to select the correct region declaration below. +//*** YUV regions are not necessarily next to each other. +#define nTOP_Y 10 // r10 - r17 (8 GRFs) +#define nTOP_U 18 // r18 - r25 (8 GRFs) +#define nTOP_V 26 // r26 - r33 (8 GRFs) + +#define nBOT_Y 56 // r56 - r63 (8 GRFs) +#define nBOT_U 64 // r64 - r71 (8 GRFs) +#define nBOT_V 72 // r72 - r79 (8 GRFs) + +// Define temp space for any usages +#define nTEMP0 34 +#define nTEMP1 35 +#define nTEMP2 36 +#define nTEMP3 37 +#define nTEMP4 38 +#define nTEMP5 39 +#define nTEMP6 40 +#define nTEMP7 41 +#define nTEMP8 42 +#define nTEMP10 44 +#define nTEMP12 46 +#define nTEMP14 48 +#define nTEMP16 50 +#define nTEMP17 51 +#define nTEMP18 52 + +#define nTEMP24 58 + +// Common region 1 +.declare ubTOP_Y Base=REG(r,nTOP_Y) ElementSize=1 SrcRegion=REGION(16,1) DstRegion=<1> Type=ub +.declare ubTOP_U Base=REG(r,nTOP_U) ElementSize=1 SrcRegion=REGION(8,1) DstRegion=<1> Type=ub +.declare ubTOP_V Base=REG(r,nTOP_V) ElementSize=1 SrcRegion=REGION(8,1) DstRegion=<1> Type=ub + +.declare uwTOP_Y Base=REG(r,nTOP_Y) ElementSize=2 SrcRegion=REGION(16,1) DstRegion=<1> Type=uw +.declare uwTOP_U Base=REG(r,nTOP_U) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw +.declare uwTOP_V Base=REG(r,nTOP_V) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw +.declare ub2TOP_Y Base=REG(r,nTOP_Y) ElementSize=1 SrcRegion=REGION(16,2) DstRegion=<1> Type=ub +.declare ub2TOP_U Base=REG(r,nTOP_U) ElementSize=1 SrcRegion=REGION(8,2) DstRegion=<1> Type=ub +.declare ub2TOP_V Base=REG(r,nTOP_V) ElementSize=1 SrcRegion=REGION(8,2) DstRegion=<1> Type=ub + +.declare ub4TOP_Y Base=REG(r,nTOP_Y) ElementSize=1 SrcRegion=REGION(8,4) Type=ub +.declare ub4TOP_U Base=REG(r,nTOP_U) ElementSize=1 SrcRegion=REGION(8,4) Type=ub +.declare ub4TOP_V Base=REG(r,nTOP_V) ElementSize=1 SrcRegion=REGION(8,4) Type=ub + +.declare ubTOP_ARGB Base=REG(r,nTOP_Y) ElementSize=1 SrcRegion=REGION(8,4) Type=ub + +// Used by "send" instruction +.declare udTOP_Y_IO Base=REG(r,nTOP_Y) ElementSize=4 SrcRegion=REGION(8,1) Type=ud +.declare udTOP_U_IO Base=REG(r,nTOP_U) ElementSize=4 SrcRegion=REGION(8,1) Type=ud +.declare udTOP_V_IO Base=REG(r,nTOP_V) ElementSize=4 SrcRegion=REGION(8,1) Type=ud + +// Common region 2 +.declare ubBOT_Y Base=REG(r,nBOT_Y) ElementSize=1 SrcRegion=REGION(16,1) DstRegion=<1> Type=ub +.declare ubBOT_U Base=REG(r,nBOT_U) ElementSize=1 SrcRegion=REGION(8,1) DstRegion=<1> Type=ub +.declare ubBOT_V Base=REG(r,nBOT_V) ElementSize=1 SrcRegion=REGION(8,1) DstRegion=<1> Type=ub + +.declare uwBOT_Y Base=REG(r,nBOT_Y) ElementSize=2 SrcRegion=REGION(16,1) DstRegion=<1> Type=uw +.declare uwBOT_U Base=REG(r,nBOT_U) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw +.declare uwBOT_V Base=REG(r,nBOT_V) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw +.declare ub2BOT_Y Base=REG(r,nBOT_Y) ElementSize=1 SrcRegion=REGION(16,2) DstRegion=<1> Type=ub +.declare ub2BOT_U Base=REG(r,nBOT_U) ElementSize=1 SrcRegion=REGION(8,2) DstRegion=<1> Type=ub +.declare ub2BOT_V Base=REG(r,nBOT_V) ElementSize=1 SrcRegion=REGION(8,2) DstRegion=<1> Type=ub + +.declare ubBOT_ARGB Base=REG(r,nBOT_Y) ElementSize=1 SrcRegion=REGION(8,4) Type=ub + +// Used by "send" instruction +.declare udBOT_Y_IO Base=REG(r,nBOT_Y) ElementSize=4 SrcRegion=REGION(8,1) Type=ud +.declare udBOT_U_IO Base=REG(r,nBOT_U) ElementSize=4 SrcRegion=REGION(8,1) Type=ud +.declare udBOT_V_IO Base=REG(r,nBOT_V) ElementSize=4 SrcRegion=REGION(8,1) Type=ud + +// End of common.inc + +#endif // COMMON_INC diff --git a/src/shaders/post_processing/Common/readSampler16x1.asm b/src/shaders/post_processing/Common/readSampler16x1.asm new file mode 100644 index 00000000..36c4be68 --- /dev/null +++ b/src/shaders/post_processing/Common/readSampler16x1.asm @@ -0,0 +1,55 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: readSampler16x1.asm +// +// Read one row of pix through sampler +// + + + +//#define SAMPLER_MSG_DSC 0x166A0000 // ILK Sampler Message Descriptor + + + +// Send Message [DevILK] Message Descriptor +// MBZ MsgL=5 MsgR=8 H MBZ SIMD MsgType SmplrIndx BindTab +// 000 0 101 0 1000 1 0 10 0000 0000 00000000 +// 0 A 8 A 0 0 0 0 + +// MsgL=1+2*2(u,v)=5 MsgR=8 + +#define SAMPLER_MSG_DSC 0x0A8A0000 // ILK Sampler Message Descriptor + + + + + + + + // Assume MSGSRC is set already in the caller + //mov (8) rMSGSRC.0<1>:ud 0:ud // Unused fileds + + + + // Read 16 sampled pixels and stored them in float32 in 8 GRFs + // 422 data is expanded to 444, return 8 GRF in the order of RGB- (UYV-). + // 420 data has three surfaces, return 8 GRF. Valid is always in the 1st GRF when in R8. Make sure no overwrite the following 3 GRFs. + // alpha data is expanded to 4444, return 8 GRF in the order of RGBA (UYVA). + + mov(16) mMSGHDR<1>:uw rMSGSRC<16;16,1>:uw + send (16) DATABUF(0)<1> mMSGHDR udDUMMY_NULL 0x2 SAMPLER_MSG_DSC+SAMPLER_IDX+BINDING_IDX:ud + + + + + + + diff --git a/src/shaders/post_processing/Common/undefall.inc b/src/shaders/post_processing/Common/undefall.inc new file mode 100644 index 00000000..241bd70c --- /dev/null +++ b/src/shaders/post_processing/Common/undefall.inc @@ -0,0 +1,65 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Modual name: undefall.inc +// +// undefine all global symbol for new process +// + +//Source definitions +#undef ubSRC_Y +#undef ubSRC_U +#undef ubSRC_V + +#undef ub2SRC_Y +#undef ub2SRC_U +#undef ub2SRC_V + +#undef ub4SRC_Y +#undef ub4SRC_U +#undef ub4SRC_V + +#undef uwSRC_Y +#undef uwSRC_U +#undef uwSRC_V + +#undef udSRC_Y +#undef udSRC_U +#undef udSRC_V + +#undef udSRC_YUV +#undef nSRC_YUV_REG + +//Destination definitions +#undef ubDEST_Y +#undef ubDEST_U +#undef ubDEST_V + +#undef ub2DEST_Y +#undef ub2DEST_U +#undef ub2DEST_V + +#undef ub4DEST_Y +#undef ub4DEST_U +#undef ub4DEST_V + +#undef uwDEST_Y +#undef uwDEST_U +#undef uwDEST_V + +#undef udDEST_Y +#undef udDEST_U +#undef udDEST_V + +#undef udDEST_YUV +#undef nDEST_YUV_REG +#undef ubDEST_ARGB + +// End of undefall.inc diff --git a/src/shaders/post_processing/Core_Kernels/AVS_IEF.inc b/src/shaders/post_processing/Core_Kernels/AVS_IEF.inc new file mode 100644 index 00000000..cbed61a3 --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/AVS_IEF.inc @@ -0,0 +1,108 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: AVS_IEF.inc + +#ifndef _AVS_INF_INC_ +#define _AVS_INF_INC_ + +#include "undefall.inc" //Undefine the SRC and DEST sysmbols + + // Message Header + // m0.7 31:0 Debug + // m0.6 31:0 Debug + // m0.5 31:0 Ignored + // m0.4 31:0 Ignored + // m0.3 31:0 Ignored + // m0.2 31:16 Ignored + // 15 Alpha Write Channel Mask enable=0, disable=1 + // 14 Blue Write Channel Mask (V) + // 13 Green Write Channel Mask (Y) + // 12 Red Write Channel Mask (U) + // 11:0 Ignored + // m0.1 Ignored + // m0.0 Ignored + +#define mAVS_8x8_HDR m0 // Message Header +#define mAVS_PAYLOAD m1 // Message Payload Header + +#define mAVS_8x8_HDR_2 m2 // Message Header +#define mAVS_PAYLOAD_2 m3 // Message Payload Header + +#define mAVS_8x8_HDR_UV m2 // Message Header +#define mAVS_PAYLOAD_UV m3 // Message Payload Header + +#define rAVS_8x8_HDR rMSGSRC // Mirror of Message Header +#define rAVS_PAYLOAD r9 // Mirror of Message Payload Header + + // AVS payload + // m1.7 Ignored + // m1.6 Pixel 0 V Address ---> ORIY (Y0) + // m1.5 Delta V ---> Step Y + // m1.4 Ignored + // m1.3 Ignored + // m1.2 Pixel 0 U Address ---> ORIX (X0) + // m1.1 U 2nd Derivative ---> NLAS dx + // m1.0 Delta U ---> Step X + + // Sampler Message Descriptor + // 31:29 Reserved 000 + // 28:25 Message length 0010 + // 24:20 Response length xxxxx ---> 4GRFs for each enabled channel + // 19 Header Present 1 + // 18 MBZ 0 + // 17:16 SIMD Mode 11 ---> SIMD64 + // 15:12 Message Type 0011 ---> sample_8x8 + // 11:8 Sampler Index xxxx + // 7:0 Binding Table Index xxxxxxxx +#define nAVS_MSG_DSC_1CH 0x044BB000 +#define nAVS_MSG_DSC_2CH 0x048BB000 +#define nAVS_MSG_DSC_3CH 0x04CBB000 +#define nAVS_MSG_DSC_4CH 0x050BB000 + +#define nAVS_RED_CHANNEL_ONLY 0x0000E000 // Enable Red channel only +#define nAVS_GREEN_CHANNEL_ONLY 0x0000D000 // Enable Green channel only +#define nAVS_RED_BLUE_CHANNELS 0x0000A000 // Enable Red and Blue channels +#define nAVS_RGB_CHANNELS 0x00008000 // Enable RGB(YUV) channels +#define nAVS_ALL_CHANNELS 0x00000000 // Enable all channels (ARGB\AYUV) + + + +.declare ubAVS_RESPONSE Base=REG(r,nTEMP8) ElementSize=1 SrcRegion=REGION(16,1) Type=ub +.declare uwAVS_RESPONSE Base=REG(r,nTEMP8) ElementSize=2 SrcRegion=REGION(16,1) Type=uw + +.declare ubAVS_RESPONSE_2 Base=REG(r,nTEMP24) ElementSize=1 SrcRegion=REGION(16,1) Type=ub +.declare uwAVS_RESPONSE_2 Base=REG(r,nTEMP24) ElementSize=2 SrcRegion=REGION(16,1) Type=uw + + +#if (nSRC_REGION==nREGION_2) + #define uwDEST_Y uwBOT_Y + #define uwDEST_U uwBOT_U + #define uwDEST_V uwBOT_V + + #define ubDEST_Y ubBOT_Y + + #undef nSRC_REGION + #define nSRC_REGION nREGION_2 + +#else //(nSRC_REGION==nREGION_1) + #define uwDEST_Y uwTOP_Y + #define uwDEST_U uwTOP_U + #define uwDEST_V uwTOP_V + + #define ubDEST_Y ubTOP_Y + + #undef nSRC_REGION + #define nSRC_REGION nREGION_1 + +#endif + + +#endif //_AVS_INF_INC_ diff --git a/src/shaders/post_processing/Core_Kernels/AVS_SetupFirstBlock.asm b/src/shaders/post_processing/Core_Kernels/AVS_SetupFirstBlock.asm new file mode 100644 index 00000000..d45ce44d --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/AVS_SetupFirstBlock.asm @@ -0,0 +1,35 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +//------------------------------------------------------------------------------ +// AVS_SetupFirstBlock.asm +//------------------------------------------------------------------------------ + + // Setup Message Header +// mov (8) mAVS_8x8_HDR<1>:ud rMSGSRC<8;8,1>:ud + + // Check NLAS Enable bit + and.z.f0.0 (1) wNULLREG uwNLAS_ENABLE:uw BIT15:uw + (f0.0)mov (1) fVIDEO_STEP_DELTA:f 0.0:f + + // Setup Message Payload Header for 1st block of Media Sampler 8x8 + mov (1) rAVS_PAYLOAD.0:f fVIDEO_STEP_DELTA:f //NLAS dx + mov (1) rAVS_PAYLOAD.1:f fVIDEO_STEP_X:f //Step X + mov (1) rAVS_PAYLOAD.5:f fVIDEO_STEP_Y:f //Step Y + mov (2) rAVS_PAYLOAD.2<4>:f fSRC_VID_H_ORI<2;2,1>:f //Orig X and Y + + + + + + + + + diff --git a/src/shaders/post_processing/Core_Kernels/AVS_SetupSecondBlock.asm b/src/shaders/post_processing/Core_Kernels/AVS_SetupSecondBlock.asm new file mode 100644 index 00000000..8f125dc7 --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/AVS_SetupSecondBlock.asm @@ -0,0 +1,27 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +//------------------------------------------------------------------------------ +// AVS_SetupSecondBlock.asm +//------------------------------------------------------------------------------ + + //NLAS calculations for 2nd block of Media Sampler 8x8: + // X(i) = X0 + dx*i + ddx*i*(i-1)/2 ==> X(8) = X0 + dx*8 +ddx*28 + // dx(i)= dx(0) + ddx*i ==> dx(8)= dx + ddx*8 + + // Calculating X(8) + mov (1) acc0.2<1>:f fSRC_VID_H_ORI:f + mac (1) acc0.2<1>:f fVIDEO_STEP_X:f 8.0:f + mac (1) rAVS_PAYLOAD.2:f fVIDEO_STEP_DELTA:f 28.0:f + + // Calculating dx(8) + mov (1) acc0.1<1>:f fVIDEO_STEP_X:f + mac (1) rAVS_PAYLOAD.1:f fVIDEO_STEP_DELTA:f 8.0:f + diff --git a/src/shaders/post_processing/Core_Kernels/DI.inc b/src/shaders/post_processing/Core_Kernels/DI.inc new file mode 100644 index 00000000..62f84c0b --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/DI.inc @@ -0,0 +1,194 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: DI.inc + +#ifdef GT +// GT DI Kernel +#else // ILK +// ILK DI Kernel +#endif + + +//--------------------------------------------------------------------------- +// Binding table indices +//--------------------------------------------------------------------------- +#define nBIDX_DI_PRV 10 // Previous DI-ed frame +#define nBIDX_DI_CUR 13 // Current DI-ed frame +#define nBIDX_DN 7 // Denoised frame +#define nBIDX_STAT 20 // Statistics +#define nBIDX_DI_Source 4 // Source Surface + + +//--------------------------------------------------------------------------- +// Message descriptors +//--------------------------------------------------------------------------- +// Extended message descriptor +#define nSMPL_ENGINE 0x2 +#define nDATAPORT_WRITE 0x5 +#define nTS_EOT 0x27 // with End-Of-Thread bit ON + + // Message descriptor for end-of-thread + // = 000 0001 (message len) 00000 (resp len) + // 0 (header present 0) 00000000000000 0 (URB dereferenced) 0000 +#define nEOT_MSGDSC 0x02000000 + + // Message descriptor for sampler read + // = 000 0010 (message len 2) 00000 (resp len - set later, 12 or 5 or 11) + // 1 (header present 1) 0 11 (SIMD32/64 mode) + // 1000 (message type) 0000 (DI state index) + // 00000000 (binding table index - set later) + // = 0x040b8000 + +// comment begin +// The following is commented out because of walker feature +// It corresponds to the #ifdef GT #else and #endif +//#define nSMPL_MSGDSC 0x040b8000 +//#define nSMPL_RESP_LEN_DI 0x00c00000 // 12 +//#define nSMPL_RESP_LEN_NODI_PL 0x00500000 // 5 +//#define nSMPL_RESP_LEN_NODI_PA 0x00900000 // 9 +//#define nSMPL_RESP_LEN_NODN 0x00900000 // 9 +//#define nSMPL_RESP_LEN_PDI 0x00b00000 // 11 +// comment end + +#ifdef GT + +#define nSMPL_MSGDSC 0x040b8000 +#define nSMPL_RESP_LEN_DI 0x00c00000 // 12 +#define nSMPL_RESP_LEN_NODI_PL 0x00500000 // 5 //DI disable, the XY stored in 5th GRF, no impact to return length +#define nSMPL_RESP_LEN_NODI_PA 0x00900000 // 9 //DI disable, the XY stored in 5th GRF, no impact to return length +#define nSMPL_RESP_LEN_NODN 0x00a00000 // 10 //NO DN, originally use 9, now we need use 10 to store the XY with walker +#define nSMPL_RESP_LEN_PDI 0x00b00000 // 11 + +#else + +#define nSMPL_MSGDSC 0x040b8000 +#define nSMPL_RESP_LEN_DI 0x00c00000 // 12 +#define nSMPL_RESP_LEN_NODI_PL 0x00500000 // 5 +#define nSMPL_RESP_LEN_NODI_PA 0x00900000 // 9 +#define nSMPL_RESP_LEN_NODN 0x00900000 // 9 +#define nSMPL_RESP_LEN_PDI 0x00b00000 // 11 + +#endif + + // Message descriptor for dataport media write +#ifdef GT + // = 000 0000 (message len - set later) 00000 (resp len 0) + // 1 (header present 1) 0 0 1010 (media block write) 00000 + // 00000000 (binding table index - set later) + // = 0x00094000 +#define nDPMW_MSGDSC 0x00094000 +#else // ILK + // = 000 0000 (message len - set later) 00000 (resp len 0) + // 1 (header present 1) 000 0 010 (media block write) 0000 + // 00000000 (binding table index - set later) + // = 0x00082000 +#define nDPMW_MSGDSC 0x00082000 +#endif +#define nDPMW_MSG_LEN_STMM 0x04000000 // 2 - STMM +#define nDPMW_MSG_LEN_DH 0x04000000 // 2 - Denoise history +#define nDPMW_MSG_LEN_PA_DN 0x0a000000 // 5 - Denoised output +#define nDPMW_MSG_LEN_PA_NODI 0x12000000 // 9 - Denoised output - denoise only - DI disabled +#define nDPMW_MSG_LEN_PL_DN 0x06000000 // 3 - Denoised output +#define nDPMW_MSG_LEN_PL_NODI 0x0a000000 // 5 - Denoised output - denoise only - DI disabled +#define nDPMW_MSG_LEN_DI 0x0a000000 // 5 - DI output + + +//--------------------------------------------------------------------------- +// Static and inline parameters +//--------------------------------------------------------------------------- +// Static parameters +.declare ubTFLD_FIRST Base=r1.27 ElementSize=1 Type=ub // top field first +.declare ubSRCYUVOFFSET Base=r1.4 ElementSize=1 Type=ub // source packed format +.declare ubDSTYUVOFFSET Base=r1.8 ElementSize=1 Type=ub // destination packed format +.declare uwSPITCH_DIV2 Base=r1.10 ElementSize=2 Type=uw // statistics surface pitch divided by 2 + +// Inline parameters +.declare uwXORIGIN Base=r5.0 ElementSize=2 Type=uw // X and Y origin +.declare uwYORIGIN Base=r5.1 ElementSize=2 Type=uw + + +//--------------------------------------------------------------------------- +// Kernel GRF variables +//--------------------------------------------------------------------------- +// Message response (Denoised & DI-ed pixels & statistics) +.declare dRESP Base=r8 ElementSize=4 Type=d // Response message (12 or 5 or 11) +.declare ubRESP Base=r8 ElementSize=1 Type=ub + +.declare dSTMM Base=r16 ElementSize=4 Type=d // STMM +.declare ubDN_HIST_NODI Base=r12 ElementSize=1 Type=ub // Denoise history data (DI disabled) +.declare ubDN_HIST_DI Base=r17 ElementSize=1 Type=ub // Denoise history data (DI enabled) +.declare uwRETURNED_POSITION_DI Base=r17 ElementSize=2 Type=uw // XY_Return_Data (DI enabled) +.declare uwRETURNED_POSITION_DN Base=r12 ElementSize=2 Type=uw // XY_Return_Data (DI disabled) + +.declare ub1ST_FLD_DN Base=r12 ElementSize=1 Type=ub // 1st field Denoised data (DI enabled) +.declare d1ST_FLD_DN Base=r12 ElementSize=4 Type=d +.declare ub2ND_FLD_DN Base=r18 ElementSize=1 Type=ub // 2nd field Denoised data (DI enabled) +.declare d2ND_FLD_DN Base=r18 ElementSize=4 Type=d +.declare ubPRV_DI Base=r8 ElementSize=1 Type=ub // Previous frame DI (DI enabled) +.declare ubCUR_DI Base=r12 ElementSize=1 Type=ub // Previous frame DI (DI enabled) + +// Packed denoised output +.declare ubDN_YUV Base=r22 ElementSize=1 Type=ub // Denoised YUV422 +.declare dDN_YUV Base=r22 ElementSize=4 Type=d +#define npDN_YUV 704 // = 22*32 = 0x280 + +// Packed DI output +.declare dDI_YUV_PRV Base=r32 ElementSize=4 Type=d // Previous frame DI output +.declare dDI_YUV_CUR Base=r36 ElementSize=4 Type=d // Current frame DI output +#define npDI_YUV 1024 // = 32*32 = 0x + +// For packed output +#define p422_YOFFSET a0.2 +#define p422_UOFFSET a0.3 +#define p422_VOFFSET a0.4 +#define pDN_TFLDSRC a0.6 +#define pDN_BFLDSRC a0.7 +#define npRESP 192 // = 6*32 + +// Message source +.declare udMSGSRC Base=r70 ElementSize=4 Type=ud +.declare uwMSGSRC Base=r70 ElementSize=2 Type=uw +.declare dMSGSRC Base=r70 ElementSize=4 Type=d + + +//--------------------------------------------------------------------------- +// Kernel MRF variables +//--------------------------------------------------------------------------- +#define mMSGHDR_SMPL m1 // Sampler response: m1~m2 +.declare mudMSGHDR_SMPL Base=m1 ElementSize=4 Type=ud +.declare muwMSGHDR_SMPL Base=m1 ElementSize=2 Type=uw +#define mMSGHDR_DN m3 // Denoise output: m3~m7 for PA, m3~m5 for PL +.declare mdMSGHDR_DN Base=m3 ElementSize=4 Type=d +#define mMSGHDR_STAT m8 // Statistics output: m8~m9 +.declare mdMSGHDR_STAT Base=m8 ElementSize=4 Type=d +.declare mubMSGHDR_STAT Base=m8 ElementSize=1 Type=ub +#define mMSGHDR_DI m10 // DI output: m10~m14 +.declare mdMSGHDR_DI Base=m10 ElementSize=4 Type=d +#define mMSGHDR_EOT m15 // EOT + +#ifdef GT +#define MSGSRC +#else +#define MSGSRC null:ud +#endif + + +//--------------------------------------------------------------------------- +// End of thread instruction +//--------------------------------------------------------------------------- +#ifdef GT +#define END_THREAD send (8) null<1>:d mMSGHDR_EOT nTS_EOT nEOT_MSGDSC +#else // ILK +#define END_THREAD send (8) null<1>:d mMSGHDR_EOT null:ud nTS_EOT nEOT_MSGDSC +#endif + + +// end of DI.inc diff --git a/src/shaders/post_processing/Core_Kernels/DI_Hist_Save.asm b/src/shaders/post_processing/Core_Kernels/DI_Hist_Save.asm new file mode 100644 index 00000000..ae8ff859 --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/DI_Hist_Save.asm @@ -0,0 +1,24 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + + +// Write denoise history to memory +shr (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w 2:w NODDCLR // X,Y origin / 4 +add (1) rMSGSRC.0<1>:ud rMSGSRC.0<0;1,0>:ud uwSPITCH_DIV2<0;1,0>:uw NODDCLR_NODDCHK // Add pitch to X origin +mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_HIST:ud NODDCHK // block width and height (4x2) + +mov (8) mMSGHDR_HIST<1>:ud rMSGSRC.0<8;8,1>:ud // message header +mov (1) mudMSGHDR_HIST(1)<1> udRESP(nDI_HIST_OFFSET,0)<0;1,0> // Move denoise history to MRF + +send (8) dNULLREG mMSGHDR_HIST udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_HIST+nBI_STMM_HISTORY_OUTPUT:ud + + + + diff --git a/src/shaders/post_processing/Core_Kernels/DI_SAVE_PA.asm b/src/shaders/post_processing/Core_Kernels/DI_SAVE_PA.asm new file mode 100644 index 00000000..f4e2fe7b --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/DI_SAVE_PA.asm @@ -0,0 +1,56 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + + shl (1) rMSGSRC.0<1>:ud wORIX<0;1,0>:w 1:w NODDCLR // H. block origin need to be doubled + mov (1) rMSGSRC.1<1>:ud wORIY<0;1,0>:w NODDCLR_NODDCHK // Block origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DI:ud NODDCHK // Block width and height (32x8) + + + add (4) pCF_Y_OFFSET<1>:uw ubDEST_CF_OFFSET<4;4,1>:ub nDEST_YUV_REG*nGRFWIB:w // Initial Y,U,V offset in YUV422 block + + // Pack 2nd field Y + $for(0; <nY_NUM_OF_ROWS; 1) { + mov (16) r[pCF_Y_OFFSET, %1*nGRFWIB]<2> ubRESP(nDI_PREV_FRAME_LUMA_OFFSET,%1*16) + } + // Pack 1st field Y + $for(0; <nY_NUM_OF_ROWS; 1) { + mov (16) r[pCF_Y_OFFSET, %1+4*nGRFWIB]<2> ubRESP(nDI_CURR_FRAME_LUMA_OFFSET,%1*16) + } + // Pack 2nd field U + $for(0; <nUV_NUM_OF_ROWS; 1) { + mov (8) r[pCF_U_OFFSET, %1*nGRFWIB]<4> ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels + } + // Pack 1st field U + $for(0; <nUV_NUM_OF_ROWS; 1) { + mov (8) r[pCF_U_OFFSET, %1+4*nGRFWIB]<4> ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels + } + // Pack 2nd field V + $for(0; <nUV_NUM_OF_ROWS; 1) { + mov (8) r[pCF_V_OFFSET, %1*nGRFWIB]<4> ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //Vpixels + } + // Packs1st field V + $for(0; <nUV_NUM_OF_ROWS; 1) { + mov (8) r[pCF_V_OFFSET, %1+4*nGRFWIB]<4> ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //Vpixels + } + + //save the previous frame + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + $for(0; <4; 1) { + mov (8) mudMSGPAYLOAD(%1)<1> udDEST_YUV(%1)REGION(8,1) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_DI+nBI_DESTINATION_1_YUV:ud + + //save the current frame + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + $for(0; <4; 1) { + mov (8) mudMSGPAYLOAD(%1)<1> udDEST_YUV(%1+4)REGION(8,1) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_DI+nBI_DESTINATION_2_YUV:ud + diff --git a/src/shaders/post_processing/Core_Kernels/DNDI.inc b/src/shaders/post_processing/Core_Kernels/DNDI.inc new file mode 100644 index 00000000..32587564 --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/DNDI.inc @@ -0,0 +1,162 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Module name: DI.inc + +#ifdef GT +// GT DI Kernel +#else // ILK +// ILK DI Kernel +#endif + +#include "undefall.inc" + +//--------------------------------------------------------------------------- +// Message descriptors +//--------------------------------------------------------------------------- +// Extended message descriptor + // Message descriptor for sampler read +// // = 000 0010 (message len 2) 00000 (resp len - set later, 12 or 5 or 11) +// // 1 (header present 1) 0 11 (SIMD32/64 mode) +// // 1000 (message type) 0000 (DI state index) +// // 00000000 (binding table index - set later) +// // = 0x040b8000 +#define nSMPL_DI_MSGDSC 0x040b8000 + +#define nSMPL_RESP_LEN_DNDI nRESLEN_12 // 12 - for DN + DI Alg +#define nSMPL_RESP_LEN_DN_PL nRESLEN_5 // 5 - for DN Planar Alg +#define nSMPL_RESP_LEN_DN_PA nRESLEN_9 // 9 - for DN Packed Alg +#define nSMPL_RESP_LEN_DI nRESLEN_9 // 9 - for DI Only Alg +#define nSMPL_RESP_LEN_PDI nRESLEN_11 // 11 - for Partial DI Alg + +// Attention: The Message Length is The Number of GRFs with Data Only, without the Header +#define nDPMW_MSG_LEN_STMM nMSGLEN_1 // 1 - For STMM Save +#define nDPMW_MSG_LEN_HIST nMSGLEN_1 // 1 - For Denoise History Save +#define nDPMW_MSG_LEN_PA_DN_DI nMSGLEN_4 // 4 - For DN Curr Save +#define nDPMW_MSG_LEN_PA_DN_NODI nMSGLEN_8 // 8 - For DN Curr Save (denoise only - DI disabled) +#define nDPMW_MSG_LEN_PL_DN_DI nMSGLEN_2 // 2 - For DN Curr Save +#define nDPMW_MSG_LEN_PL_DN_NODI nMSGLEN_4 // 4 - For DN Curr Save (denoise only - DI disabled) + +#define nDPW_BLOCK_SIZE_STMM nBLOCK_WIDTH_8+nBLOCK_HEIGHT_4 // Y block size 8x4 + +#undef nDPW_BLOCK_SIZE_DI +#undef nDPW_MSG_SIZE_DI +#define nDPW_BLOCK_SIZE_DI nBLOCK_WIDTH_32+nBLOCK_HEIGHT_4 +#define nDPW_MSG_SIZE_DI nMSGLEN_4 + + +//--------------------------------------------------------------------------- +// Kernel GRF variables +//--------------------------------------------------------------------------- +// Defines for DI enabled +#define nDI_PREV_FRAME_LUMA_OFFSET 0 +#define nDI_PREV_FRAME_CHROMA_OFFSET 2 +#define nDI_CURR_FRAME_LUMA_OFFSET 4 +#define nDI_CURR_FRAME_CHROMA_OFFSET 6 +#define nDI_STMM_OFFSET 8 +#define nDI_HIST_OFFSET 9 +#define nDI_CURR_2ND_FIELD_LUMA_OFFSET 10 +#define nDI_CURR_2ND_FIELD_CHROMA_OFFSET 11 + +// Defines for DI disabled +#define nNODI_LUMA_OFFSET 0 +#define nNODI_HIST_OFFSET 4 +#define nNODI_CHROMA_OFFSET 5 + +#ifdef DI_ENABLE + #define nHIST_OFFSET nDI_HIST_OFFSET + #undef nY_NUM_OF_ROWS + #define nY_NUM_OF_ROWS 8 // Number of Y rows per block (4 rows for each frame) + #undef nUV_NUM_OF_ROWS + #define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block + +#endif + +#ifdef DI_DISABLE + #define nHIST_OFFSET nNODI_HIST_OFFSET +#endif + +#if (nSRC_REGION==nREGION_2) + #define ub2SRC_Y ub2BOT_Y + #define ub2SRC_U ub2BOT_U + #define ub2SRC_V ub2BOT_V + #define uwDEST_Y uwBOT_Y + #define uwDEST_U uwBOT_U + #define uwDEST_V uwBOT_V + #define nDEST_YUV_REG nTOP_Y + #define udDEST_YUV udTOP_Y_IO + + #define nRESP nTEMP0 // DI return message requires 12 GRFs + #define nDN_YUV nTOP_Y // Space for Packing DN for next run requires 8 GRFs + + #undef nSRC_REGION + #define nSRC_REGION nREGION_2 + +#else + #define ub2SRC_Y ub2TOP_Y + #define ub2SRC_U ub2TOP_U + #define ub2SRC_V ub2TOP_V + #define uwDEST_Y uwTOP_Y + #define uwDEST_U uwTOP_U + #define uwDEST_V uwTOP_V + #define nDEST_YUV_REG nBOT_Y + #define udDEST_YUV udBOT_Y_IO + #define nRESP nTEMP0 // DI return message requires 12 GRFs + #define nDN_YUV nBOT_Y // Space for Packing DN for next run requires 8 GRFs + + #undef nSRC_REGION + #define nSRC_REGION nREGION_1 // REGION_1 will be the source region for first kernel + +#endif + + + + + + + + + +// Message response (Denoised & DI-ed pixels & statistics) +.declare udRESP Base=REG(r,nRESP) ElementSize=4 SrcRegion=REGION(8,1) DstRegion=<1> Type=ud +.declare ubRESP Base=REG(r,nRESP) ElementSize=1 SrcRegion=REGION(16,1) DstRegion=<1> Type=ub + +// For Denoised Curr Output (Used as Priv in Next Run) +.declare ubDN_YUV Base=REG(r,nDN_YUV) ElementSize=1 Type=ub +.declare udDN_YUV Base=REG(r,nDN_YUV) ElementSize=4 Type=ud +#define npDN_YUV nDN_YUV*nGRFWIB + +// For DI Process Output (1st and 2nd Frames Output) +//.declare udDI_YUV_PRIV Base=REG(r,nTEMP0) ElementSize=4 Type=ud // Previous frame DI output +//.declare udDI_YUV_CURR Base=REG(r,nTEMP0) ElementSize=4 Type=ud // Current frame DI output +//#define npDI_YUV nTEMP0*nGRFWIB + +//--------------------------------------------------------------------------- +// Kernel MRF variables +//--------------------------------------------------------------------------- +#define mMSG_SMPL m1 // Sampler Command is in: m1~m2 +.declare mudMSG_SMPL Base=mMSG_SMPL ElementSize=4 Type=ud +.declare muwMSG_SMPL Base=mMSG_SMPL ElementSize=2 Type=uw + +#define mMSGHDR_DN m1 // Denoise Output: m1~m9 for PA, m3~m5 for PL +.declare mudMSGHDR_DN Base=mMSGHDR_DN ElementSize=4 Type=ud +.declare mubMSGHDR_DN Base=mMSGHDR_DN ElementSize=1 Type=ub + +#define mMSGHDR_STMM m11 // STMM Output: m11~m12 +.declare mudMSGHDR_STMM Base=mMSGHDR_STMM ElementSize=4 Type=ud +#define mMSGHDR_HIST m13 // HIST Output: m13~m14 +.declare mudMSGHDR_HIST Base=mMSGHDR_HIST ElementSize=1 Type=ud + +#define mMSGHDR_DI_1ST m1 // DI output: m1~m5 +.declare mudMSGHDR_DI_1ST Base=mMSGHDR_DI_1ST ElementSize=4 Type=ud +#define mMSGHDR_DI_2ND m6 // DI output: m6~m10 +.declare mudMSGHDR_DI_2ND Base=mMSGHDR_DI_2ND ElementSize=4 Type=ud + +// end of DNDI.inc diff --git a/src/shaders/post_processing/Core_Kernels/DNDI_COMMAND.asm b/src/shaders/post_processing/Core_Kernels/DNDI_COMMAND.asm new file mode 100644 index 00000000..2c041fcb --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/DNDI_COMMAND.asm @@ -0,0 +1,17 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// Activate the DNDI send command +mov (8) mudMSG_SMPL(0)<1> rMSGSRC.0<8;8,1>:ud NODDCLR // message header +mov (1) muwMSG_SMPL(1,4)<1> wORIX<0;1,0>:w NODDCLR_NODDCHK// horizontal origin +mov (1) muwMSG_SMPL(1,12)<1> wORIY<0;1,0>:w NODDCLR_NODDCHK // vertical origin +//mov (2) muwMSG_SMPL(1,4)<2> wORIX<2;2,1>:w NODDCHK// problem during compile !! when using this line + +send (8) udRESP(0)<1> mMSG_SMPL udDUMMY_NULL nSMPL_ENGINE nSMPL_DI_MSGDSC+nSMPL_RESP_LEN+nBI_CURRENT_SRC_YUV_HW_DI:ud diff --git a/src/shaders/post_processing/Core_Kernels/DNDI_Hist_Save.asm b/src/shaders/post_processing/Core_Kernels/DNDI_Hist_Save.asm new file mode 100644 index 00000000..91c5bc26 --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/DNDI_Hist_Save.asm @@ -0,0 +1,20 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + + +// Write denoise history to memory +shr (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w 2:w NODDCLR // X,Y origin / 4 +add (1) rMSGSRC.0<1>:ud rMSGSRC.0<0;1,0>:ud uwSPITCH_DIV2<0;1,0>:uw NODDCLR_NODDCHK// Add pitch to X origin +mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_HIST:ud NODDCHK // block width and height (4x2) + +mov (8) mMSGHDR_HIST<1>:ud rMSGSRC.0<8;8,1>:ud // message header +mov (2) mudMSGHDR_HIST(1)<1> udRESP(nNODI_HIST_OFFSET,0)<2;2,1> // Move denoise history to MRF + +send (8) dNULLREG mMSGHDR_HIST udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_HIST+nBI_STMM_HISTORY_OUTPUT:ud diff --git a/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_16x8.asm b/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_16x8.asm new file mode 100644 index 00000000..55f71b5e --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_16x8.asm @@ -0,0 +1,26 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +//---------- PA_AVS_IEF_16x8.asm ---------- + +#include "AVS_IEF.inc" + +//------------------------------------------------------------------------------ +// 2 sampler reads for 8x8 YUV packed +//------------------------------------------------------------------------------ +#include "PA_AVS_IEF_Sample.asm" + +//------------------------------------------------------------------------------ +// Unpacking sampler reads to 4:4:4 internal planar +//------------------------------------------------------------------------------ +#include "PA_AVS_IEF_Unpack_16x8.asm" + +//------------------------------------------------------------------------------ + diff --git a/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_8x4.asm b/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_8x4.asm new file mode 100644 index 00000000..55c201ba --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_8x4.asm @@ -0,0 +1,25 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +//---------- PA_AVS_IEF_8x4.asm ---------- + +#include "AVS_IEF.inc" + +//------------------------------------------------------------------------------ +// 2 sampler reads for 8x8 YUV packed +//------------------------------------------------------------------------------ +#include "PA_AVS_IEF_Sample.asm" + +//------------------------------------------------------------------------------ +// Unpacking sampler data to 4:2:0 internal planar +//------------------------------------------------------------------------------ +#include "PA_AVS_IEF_Unpack_8x4.asm" + +//------------------------------------------------------------------------------ diff --git a/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_8x8.asm b/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_8x8.asm new file mode 100644 index 00000000..6bde8c4a --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_8x8.asm @@ -0,0 +1,25 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +//---------- PA_AVS_IEF_8x8.asm ---------- + +#include "AVS_IEF.inc" + +//------------------------------------------------------------------------------ +// 2 sampler reads for 8x8 YUV packed +//------------------------------------------------------------------------------ +#include "PA_AVS_IEF_Sample.asm" + +//------------------------------------------------------------------------------ +// Unpacking sampler data to 4:2:2 internal planar +//------------------------------------------------------------------------------ +#include "PA_AVS_IEF_Unpack_8x8.asm" + +//------------------------------------------------------------------------------ diff --git a/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_Sample.asm b/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_Sample.asm new file mode 100644 index 00000000..0b533efc --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_Sample.asm @@ -0,0 +1,34 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +//---------- PA_AVS_IEF_Sample.asm ---------- + +//------------------------------------------------------------------------------ +// 2 sampler reads for 8x8 YUV packed +//------------------------------------------------------------------------------ + + // 1st 8x8 setup + #include "AVS_SetupFirstBlock.asm" + + // Enable RGB(YUV) channels + mov (1) rAVS_8x8_HDR.2:ud nAVS_RGB_CHANNELS:ud + + mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_3CH+nSI_SRC_YUV+nBI_CURRENT_SRC_YUV + // Return YUV in 12 GRFs + + // 2nd 8x8 setup + #include "AVS_SetupSecondBlock.asm" + + mov (16) mAVS_8x8_HDR_2.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE_2(0)<1> mAVS_8x8_HDR_2 udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_3CH+nSI_SRC_YUV+nBI_CURRENT_SRC_YUV + // Return YUV in 12 GRFs + + diff --git a/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_Unpack_16x8.asm b/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_Unpack_16x8.asm new file mode 100644 index 00000000..5dcc988d --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_Unpack_16x8.asm @@ -0,0 +1,288 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +//---------- PA_AVS_IEF_Unpack_16x8.asm ---------- + +#ifdef AVS_OUTPUT_16_BIT //Output is packed in AVYU format +// Move first 8x8 words of Y to dest GRF (as packed) + mov (4) uwDEST_Y(0,1)<4> uwAVS_RESPONSE(2,0)<4;4,1> + mov (4) uwDEST_Y(1,1)<4> uwAVS_RESPONSE(2,8)<4;4,1> + mov (4) uwDEST_Y(4,1)<4> uwAVS_RESPONSE(2,4)<4;4,1> + mov (4) uwDEST_Y(5,1)<4> uwAVS_RESPONSE(2,12)<4;4,1> + mov (4) uwDEST_Y(8,1)<4> uwAVS_RESPONSE(3,0)<4;4,1> + mov (4) uwDEST_Y(9,1)<4> uwAVS_RESPONSE(3,8)<4;4,1> + mov (4) uwDEST_Y(12,1)<4> uwAVS_RESPONSE(3,4)<4;4,1> + mov (4) uwDEST_Y(13,1)<4> uwAVS_RESPONSE(3,12)<4;4,1> + mov (4) uwDEST_Y(16,1)<4> uwAVS_RESPONSE(8,0)<4;4,1> + mov (4) uwDEST_Y(17,1)<4> uwAVS_RESPONSE(8,8)<4;4,1> + mov (4) uwDEST_Y(20,1)<4> uwAVS_RESPONSE(8,4)<4;4,1> + mov (4) uwDEST_Y(21,1)<4> uwAVS_RESPONSE(8,12)<4;4,1> + mov (4) uwDEST_Y(24,1)<4> uwAVS_RESPONSE(9,0)<4;4,1> + mov (4) uwDEST_Y(25,1)<4> uwAVS_RESPONSE(9,8)<4;4,1> + mov (4) uwDEST_Y(28,1)<4> uwAVS_RESPONSE(9,4)<4;4,1> + mov (4) uwDEST_Y(29,1)<4> uwAVS_RESPONSE(9,12)<4;4,1> + +// Move first 8x8 words of U to dest GRF (as packed) + mov (4) uwDEST_Y(0,0)<4> uwAVS_RESPONSE(4,0)<4;4,1> + mov (4) uwDEST_Y(1,0)<4> uwAVS_RESPONSE(4,8)<4;4,1> + mov (4) uwDEST_Y(4,0)<4> uwAVS_RESPONSE(4,4)<4;4,1> + mov (4) uwDEST_Y(5,0)<4> uwAVS_RESPONSE(4,12)<4;4,1> + mov (4) uwDEST_Y(8,0)<4> uwAVS_RESPONSE(5,0)<4;4,1> + mov (4) uwDEST_Y(9,0)<4> uwAVS_RESPONSE(5,8)<4;4,1> + mov (4) uwDEST_Y(12,0)<4> uwAVS_RESPONSE(5,4)<4;4,1> + mov (4) uwDEST_Y(13,0)<4> uwAVS_RESPONSE(5,12)<4;4,1> + mov (4) uwDEST_Y(16,0)<4> uwAVS_RESPONSE(10,0)<4;4,1> + mov (4) uwDEST_Y(17,0)<4> uwAVS_RESPONSE(10,8)<4;4,1> + mov (4) uwDEST_Y(20,0)<4> uwAVS_RESPONSE(10,4)<4;4,1> + mov (4) uwDEST_Y(21,0)<4> uwAVS_RESPONSE(10,12)<4;4,1> + mov (4) uwDEST_Y(24,0)<4> uwAVS_RESPONSE(11,0)<4;4,1> + mov (4) uwDEST_Y(25,0)<4> uwAVS_RESPONSE(11,8)<4;4,1> + mov (4) uwDEST_Y(28,0)<4> uwAVS_RESPONSE(11,4)<4;4,1> + mov (4) uwDEST_Y(29,0)<4> uwAVS_RESPONSE(11,12)<4;4,1> + +// Move first 8x8 words of V to dest GRF (as packed) + mov (4) uwDEST_Y(0,2)<4> uwAVS_RESPONSE(0,0)<4;4,1> + mov (4) uwDEST_Y(1,2)<4> uwAVS_RESPONSE(0,8)<4;4,1> + mov (4) uwDEST_Y(4,2)<4> uwAVS_RESPONSE(0,4)<4;4,1> + mov (4) uwDEST_Y(5,2)<4> uwAVS_RESPONSE(0,12)<4;4,1> + mov (4) uwDEST_Y(8,2)<4> uwAVS_RESPONSE(1,0)<4;4,1> + mov (4) uwDEST_Y(9,2)<4> uwAVS_RESPONSE(1,8)<4;4,1> + mov (4) uwDEST_Y(12,2)<4> uwAVS_RESPONSE(1,4)<4;4,1> + mov (4) uwDEST_Y(13,2)<4> uwAVS_RESPONSE(1,12)<4;4,1> + mov (4) uwDEST_Y(16,2)<4> uwAVS_RESPONSE(6,0)<4;4,1> + mov (4) uwDEST_Y(17,2)<4> uwAVS_RESPONSE(6,8)<4;4,1> + mov (4) uwDEST_Y(20,2)<4> uwAVS_RESPONSE(6,4)<4;4,1> + mov (4) uwDEST_Y(21,2)<4> uwAVS_RESPONSE(6,12)<4;4,1> + mov (4) uwDEST_Y(24,2)<4> uwAVS_RESPONSE(7,0)<4;4,1> + mov (4) uwDEST_Y(25,2)<4> uwAVS_RESPONSE(7,8)<4;4,1> + mov (4) uwDEST_Y(28,2)<4> uwAVS_RESPONSE(7,4)<4;4,1> + mov (4) uwDEST_Y(29,2)<4> uwAVS_RESPONSE(7,12)<4;4,1> + +// Move first 8x8 words of A to dest GRF (as packed) + mov (4) uwDEST_Y(0,3)<4> 0:uw + mov (4) uwDEST_Y(1,3)<4> 0:uw + mov (4) uwDEST_Y(4,3)<4> 0:uw + mov (4) uwDEST_Y(5,3)<4> 0:uw + mov (4) uwDEST_Y(8,3)<4> 0:uw + mov (4) uwDEST_Y(9,3)<4> 0:uw + mov (4) uwDEST_Y(12,3)<4> 0:uw + mov (4) uwDEST_Y(13,3)<4> 0:uw + mov (4) uwDEST_Y(16,3)<4> 0:uw + mov (4) uwDEST_Y(17,3)<4> 0:uw + mov (4) uwDEST_Y(20,3)<4> 0:uw + mov (4) uwDEST_Y(21,3)<4> 0:uw + mov (4) uwDEST_Y(24,3)<4> 0:uw + mov (4) uwDEST_Y(25,3)<4> 0:uw + mov (4) uwDEST_Y(28,3)<4> 0:uw + mov (4) uwDEST_Y(29,3)<4> 0:uw + +// Move second 8x8 words of Y to dest GRF + mov (4) uwDEST_Y(2,1)<4> uwAVS_RESPONSE_2(2,0)<4;4,1> + mov (4) uwDEST_Y(3,1)<4> uwAVS_RESPONSE_2(2,8)<4;4,1> + mov (4) uwDEST_Y(6,1)<4> uwAVS_RESPONSE_2(2,4)<4;4,1> + mov (4) uwDEST_Y(7,1)<4> uwAVS_RESPONSE_2(2,12)<4;4,1> + mov (4) uwDEST_Y(10,1)<4> uwAVS_RESPONSE_2(3,0)<4;4,1> + mov (4) uwDEST_Y(11,1)<4> uwAVS_RESPONSE_2(3,8)<4;4,1> + mov (4) uwDEST_Y(14,1)<4> uwAVS_RESPONSE_2(3,4)<4;4,1> + mov (4) uwDEST_Y(15,1)<4> uwAVS_RESPONSE_2(3,12)<4;4,1> + mov (4) uwDEST_Y(18,1)<4> uwAVS_RESPONSE_2(8,0)<4;4,1> + mov (4) uwDEST_Y(19,1)<4> uwAVS_RESPONSE_2(8,8)<4;4,1> + mov (4) uwDEST_Y(22,1)<4> uwAVS_RESPONSE_2(8,4)<4;4,1> + mov (4) uwDEST_Y(23,1)<4> uwAVS_RESPONSE_2(8,12)<4;4,1> + mov (4) uwDEST_Y(26,1)<4> uwAVS_RESPONSE_2(9,0)<4;4,1> + mov (4) uwDEST_Y(27,1)<4> uwAVS_RESPONSE_2(9,8)<4;4,1> + mov (4) uwDEST_Y(30,1)<4> uwAVS_RESPONSE_2(9,4)<4;4,1> + mov (4) uwDEST_Y(31,1)<4> uwAVS_RESPONSE_2(9,12)<4;4,1> + +// Move second 8x8 words of U to dest GRF + mov (4) uwDEST_Y(2,0)<4> uwAVS_RESPONSE_2(4,0)<4;4,1> + mov (4) uwDEST_Y(3,0)<4> uwAVS_RESPONSE_2(4,8)<4;4,1> + mov (4) uwDEST_Y(6,0)<4> uwAVS_RESPONSE_2(4,4)<4;4,1> + mov (4) uwDEST_Y(7,0)<4> uwAVS_RESPONSE_2(4,12)<4;4,1> + mov (4) uwDEST_Y(10,0)<4> uwAVS_RESPONSE_2(5,0)<4;4,1> + mov (4) uwDEST_Y(11,0)<4> uwAVS_RESPONSE_2(5,8)<4;4,1> + mov (4) uwDEST_Y(14,0)<4> uwAVS_RESPONSE_2(5,4)<4;4,1> + mov (4) uwDEST_Y(15,0)<4> uwAVS_RESPONSE_2(5,12)<4;4,1> + mov (4) uwDEST_Y(18,0)<4> uwAVS_RESPONSE_2(10,0)<4;4,1> + mov (4) uwDEST_Y(19,0)<4> uwAVS_RESPONSE_2(10,8)<4;4,1> + mov (4) uwDEST_Y(22,0)<4> uwAVS_RESPONSE_2(10,4)<4;4,1> + mov (4) uwDEST_Y(23,0)<4> uwAVS_RESPONSE_2(10,12)<4;4,1> + mov (4) uwDEST_Y(26,0)<4> uwAVS_RESPONSE_2(11,0)<4;4,1> + mov (4) uwDEST_Y(27,0)<4> uwAVS_RESPONSE_2(11,8)<4;4,1> + mov (4) uwDEST_Y(30,0)<4> uwAVS_RESPONSE_2(11,4)<4;4,1> + mov (4) uwDEST_Y(31,0)<4> uwAVS_RESPONSE_2(11,12)<4;4,1> + +// Move second 8x8 words of V to dest GRF + mov (4) uwDEST_Y(2,2)<4> uwAVS_RESPONSE_2(0,0)<4;4,1> + mov (4) uwDEST_Y(3,2)<4> uwAVS_RESPONSE_2(0,8)<4;4,1> + mov (4) uwDEST_Y(6,2)<4> uwAVS_RESPONSE_2(0,4)<4;4,1> + mov (4) uwDEST_Y(7,2)<4> uwAVS_RESPONSE_2(0,12)<4;4,1> + mov (4) uwDEST_Y(10,2)<4> uwAVS_RESPONSE_2(1,0)<4;4,1> + mov (4) uwDEST_Y(11,2)<4> uwAVS_RESPONSE_2(1,8)<4;4,1> + mov (4) uwDEST_Y(14,2)<4> uwAVS_RESPONSE_2(1,4)<4;4,1> + mov (4) uwDEST_Y(15,2)<4> uwAVS_RESPONSE_2(1,12)<4;4,1> + mov (4) uwDEST_Y(18,2)<4> uwAVS_RESPONSE_2(6,0)<4;4,1> + mov (4) uwDEST_Y(19,2)<4> uwAVS_RESPONSE_2(6,8)<4;4,1> + mov (4) uwDEST_Y(22,2)<4> uwAVS_RESPONSE_2(6,4)<4;4,1> + mov (4) uwDEST_Y(23,2)<4> uwAVS_RESPONSE_2(6,12)<4;4,1> + mov (4) uwDEST_Y(26,2)<4> uwAVS_RESPONSE_2(7,0)<4;4,1> + mov (4) uwDEST_Y(27,2)<4> uwAVS_RESPONSE_2(7,8)<4;4,1> + mov (4) uwDEST_Y(30,2)<4> uwAVS_RESPONSE_2(7,4)<4;4,1> + mov (4) uwDEST_Y(31,2)<4> uwAVS_RESPONSE_2(7,12)<4;4,1> + +// Move second 8x8 words of A to dest GRF + mov (4) uwDEST_Y(2,3)<4> 0:uw + mov (4) uwDEST_Y(3,3)<4> 0:uw + mov (4) uwDEST_Y(6,3)<4> 0:uw + mov (4) uwDEST_Y(7,3)<4> 0:uw + mov (4) uwDEST_Y(10,3)<4> 0:uw + mov (4) uwDEST_Y(11,3)<4> 0:uw + mov (4) uwDEST_Y(14,3)<4> 0:uw + mov (4) uwDEST_Y(15,3)<4> 0:uw + mov (4) uwDEST_Y(18,3)<4> 0:uw + mov (4) uwDEST_Y(19,3)<4> 0:uw + mov (4) uwDEST_Y(22,3)<4> 0:uw + mov (4) uwDEST_Y(23,3)<4> 0:uw + mov (4) uwDEST_Y(26,3)<4> 0:uw + mov (4) uwDEST_Y(27,3)<4> 0:uw + mov (4) uwDEST_Y(30,3)<4> 0:uw + mov (4) uwDEST_Y(31,3)<4> 0:uw + +/* This section will be used if 16-bit output is needed in planar format -vK + // Move first 8x8 words of Y to dest GRF + mov (8) uwDEST_Y(0)<1> uwAVS_RESPONSE(2,0)<8;4,1> + mov (8) uwDEST_Y(1)<1> uwAVS_RESPONSE(2,8)<8;4,1> + mov (8) uwDEST_Y(2)<1> uwAVS_RESPONSE(3,0)<8;4,1> + mov (8) uwDEST_Y(3)<1> uwAVS_RESPONSE(3,8)<8;4,1> + mov (8) uwDEST_Y(4)<1> uwAVS_RESPONSE(8,0)<8;4,1> + mov (8) uwDEST_Y(5)<1> uwAVS_RESPONSE(8,8)<8;4,1> + mov (8) uwDEST_Y(6)<1> uwAVS_RESPONSE(9,0)<8;4,1> + mov (8) uwDEST_Y(7)<1> uwAVS_RESPONSE(9,8)<8;4,1> + + // Move first 8x8 words of V to dest GRF + mov (8) uwDEST_V(0)<1> ubAVS_RESPONSE(0,0)<8;4,1> + mov (8) uwDEST_V(1)<1> ubAVS_RESPONSE(0,8)<8;4,1> + mov (8) uwDEST_V(2)<1> ubAVS_RESPONSE(1,0)<8;4,1> + mov (8) uwDEST_V(3)<1> ubAVS_RESPONSE(1,8)<8;4,1> + mov (8) uwDEST_V(4)<1> ubAVS_RESPONSE(6,0)<8;4,1> + mov (8) uwDEST_V(5)<1> ubAVS_RESPONSE(6,8)<8;4,1> + mov (8) uwDEST_V(6)<1> ubAVS_RESPONSE(7,0)<8;4,1> + mov (8) uwDEST_V(7)<1> ubAVS_RESPONSE(7,8)<8;4,1> + + // Move first 8x8 words of U to dest GRF + mov (8) uwDEST_U(0)<1> ubAVS_RESPONSE(4,0)<8;4,1> + mov (8) uwDEST_U(1)<1> ubAVS_RESPONSE(4,8)<8;4,1> + mov (8) uwDEST_U(2)<1> ubAVS_RESPONSE(5,0)<8;4,1> + mov (8) uwDEST_U(3)<1> ubAVS_RESPONSE(5,8)<8;4,1> + mov (8) uwDEST_U(4)<1> ubAVS_RESPONSE(10,0)<8;4,1> + mov (8) uwDEST_U(5)<1> ubAVS_RESPONSE(10,8)<8;4,1> + mov (8) uwDEST_U(6)<1> ubAVS_RESPONSE(11,0)<8;4,1> + mov (8) uwDEST_U(7)<1> ubAVS_RESPONSE(11,8)<8;4,1> + + // Move second 8x8 words of Y to dest GRF + mov (8) uwDEST_Y(0,8)<1> uwAVS_RESPONSE_2(2,0)<8;4,1> + mov (8) uwDEST_Y(1,8)<1> uwAVS_RESPONSE_2(2,8)<8;4,1> + mov (8) uwDEST_Y(2,8)<1> uwAVS_RESPONSE_2(3,0)<8;4,1> + mov (8) uwDEST_Y(3,8)<1> uwAVS_RESPONSE_2(3,8)<8;4,1> + mov (8) uwDEST_Y(4,8)<1> uwAVS_RESPONSE_2(8,0)<8;4,1> + mov (8) uwDEST_Y(5,8)<1> uwAVS_RESPONSE_2(8,8)<8;4,1> + mov (8) uwDEST_Y(6,8)<1> uwAVS_RESPONSE_2(9,0)<8;4,1> + mov (8) uwDEST_Y(7,8)<1> uwAVS_RESPONSE_2(9,8)<8;4,1> + + // Move second 8x8 words of V to dest GRF + mov (8) uwDEST_V(0,8)<1> ubAVS_RESPONSE_2(0,0)<8;4,1> + mov (8) uwDEST_V(1,8)<1> ubAVS_RESPONSE_2(0,8)<8;4,1> + mov (8) uwDEST_V(2,8)<1> ubAVS_RESPONSE_2(1,0)<8;4,1> + mov (8) uwDEST_V(3,8)<1> ubAVS_RESPONSE_2(1,8)<8;4,1> + mov (8) uwDEST_V(4,8)<1> ubAVS_RESPONSE_2(6,0)<8;4,1> + mov (8) uwDEST_V(5,8)<1> ubAVS_RESPONSE_2(6,8)<8;4,1> + mov (8) uwDEST_V(6,8)<1> ubAVS_RESPONSE_2(7,0)<8;4,1> + mov (8) uwDEST_V(7,8)<1> ubAVS_RESPONSE_2(7,8)<8;4,1> + + // Move second 8x8 words of U to dest GRF + mov (8) uwDEST_U(0,8)<1> ubAVS_RESPONSE_2(4,0)<8;4,1> + mov (8) uwDEST_U(1,8)<1> ubAVS_RESPONSE_2(4,8)<8;4,1> + mov (8) uwDEST_U(2,8)<1> ubAVS_RESPONSE_2(5,0)<8;4,1> + mov (8) uwDEST_U(3,8)<1> ubAVS_RESPONSE_2(5,8)<8;4,1> + mov (8) uwDEST_U(4,8)<1> ubAVS_RESPONSE_2(10,0)<8;4,1> + mov (8) uwDEST_U(5,8)<1> ubAVS_RESPONSE_2(10,8)<8;4,1> + mov (8) uwDEST_U(6,8)<1> ubAVS_RESPONSE_2(11,0)<8;4,1> + mov (8) uwDEST_U(7,8)<1> ubAVS_RESPONSE_2(11,8)<8;4,1> +*/ +#else /* OUTPUT_8_BIT */ + // Move first 8x8 words of Y to dest GRF + mov (8) uwDEST_Y(0)<1> ubAVS_RESPONSE(2,1)<16;4,2> + mov (8) uwDEST_Y(1)<1> ubAVS_RESPONSE(2,8+1)<16;4,2> + mov (8) uwDEST_Y(2)<1> ubAVS_RESPONSE(3,1)<16;4,2> + mov (8) uwDEST_Y(3)<1> ubAVS_RESPONSE(3,8+1)<16;4,2> + mov (8) uwDEST_Y(4)<1> ubAVS_RESPONSE(8,1)<16;4,2> + mov (8) uwDEST_Y(5)<1> ubAVS_RESPONSE(8,8+1)<16;4,2> + mov (8) uwDEST_Y(6)<1> ubAVS_RESPONSE(9,1)<16;4,2> + mov (8) uwDEST_Y(7)<1> ubAVS_RESPONSE(9,8+1)<16;4,2> + + // Move first 8x8 words of V to dest GRF + mov (8) uwDEST_V(0)<1> ubAVS_RESPONSE(0,1)<16;4,2> + mov (8) uwDEST_V(1)<1> ubAVS_RESPONSE(0,8+1)<16;4,2> + mov (8) uwDEST_V(2)<1> ubAVS_RESPONSE(1,1)<16;4,2> + mov (8) uwDEST_V(3)<1> ubAVS_RESPONSE(1,8+1)<16;4,2> + mov (8) uwDEST_V(4)<1> ubAVS_RESPONSE(6,1)<16;4,2> + mov (8) uwDEST_V(5)<1> ubAVS_RESPONSE(6,8+1)<16;4,2> + mov (8) uwDEST_V(6)<1> ubAVS_RESPONSE(7,1)<16;4,2> + mov (8) uwDEST_V(7)<1> ubAVS_RESPONSE(7,8+1)<16;4,2> + + // Move first 8x8 words of U to dest GRF + mov (8) uwDEST_U(0)<1> ubAVS_RESPONSE(4,1)<16;4,2> + mov (8) uwDEST_U(1)<1> ubAVS_RESPONSE(4,8+1)<16;4,2> + mov (8) uwDEST_U(2)<1> ubAVS_RESPONSE(5,1)<16;4,2> + mov (8) uwDEST_U(3)<1> ubAVS_RESPONSE(5,8+1)<16;4,2> + mov (8) uwDEST_U(4)<1> ubAVS_RESPONSE(10,1)<16;4,2> + mov (8) uwDEST_U(5)<1> ubAVS_RESPONSE(10,8+1)<16;4,2> + mov (8) uwDEST_U(6)<1> ubAVS_RESPONSE(11,1)<16;4,2> + mov (8) uwDEST_U(7)<1> ubAVS_RESPONSE(11,8+1)<16;4,2> + + // Move second 8x8 words of Y to dest GRF + mov (8) uwDEST_Y(0,8)<1> ubAVS_RESPONSE_2(2,1)<16;4,2> + mov (8) uwDEST_Y(1,8)<1> ubAVS_RESPONSE_2(2,8+1)<16;4,2> + mov (8) uwDEST_Y(2,8)<1> ubAVS_RESPONSE_2(3,1)<16;4,2> + mov (8) uwDEST_Y(3,8)<1> ubAVS_RESPONSE_2(3,8+1)<16;4,2> + mov (8) uwDEST_Y(4,8)<1> ubAVS_RESPONSE_2(8,1)<16;4,2> + mov (8) uwDEST_Y(5,8)<1> ubAVS_RESPONSE_2(8,8+1)<16;4,2> + mov (8) uwDEST_Y(6,8)<1> ubAVS_RESPONSE_2(9,1)<16;4,2> + mov (8) uwDEST_Y(7,8)<1> ubAVS_RESPONSE_2(9,8+1)<16;4,2> + + // Move second 8x8 words of V to dest GRF + mov (8) uwDEST_V(0,8)<1> ubAVS_RESPONSE_2(0,1)<16;4,2> + mov (8) uwDEST_V(1,8)<1> ubAVS_RESPONSE_2(0,8+1)<16;4,2> + mov (8) uwDEST_V(2,8)<1> ubAVS_RESPONSE_2(1,1)<16;4,2> + mov (8) uwDEST_V(3,8)<1> ubAVS_RESPONSE_2(1,8+1)<16;4,2> + mov (8) uwDEST_V(4,8)<1> ubAVS_RESPONSE_2(6,1)<16;4,2> + mov (8) uwDEST_V(5,8)<1> ubAVS_RESPONSE_2(6,8+1)<16;4,2> + mov (8) uwDEST_V(6,8)<1> ubAVS_RESPONSE_2(7,1)<16;4,2> + mov (8) uwDEST_V(7,8)<1> ubAVS_RESPONSE_2(7,8+1)<16;4,2> + + // Move second 8x8 words of U to dest GRF + mov (8) uwDEST_U(0,8)<1> ubAVS_RESPONSE_2(4,1)<16;4,2> + mov (8) uwDEST_U(1,8)<1> ubAVS_RESPONSE_2(4,8+1)<16;4,2> + mov (8) uwDEST_U(2,8)<1> ubAVS_RESPONSE_2(5,1)<16;4,2> + mov (8) uwDEST_U(3,8)<1> ubAVS_RESPONSE_2(5,8+1)<16;4,2> + mov (8) uwDEST_U(4,8)<1> ubAVS_RESPONSE_2(10,1)<16;4,2> + mov (8) uwDEST_U(5,8)<1> ubAVS_RESPONSE_2(10,8+1)<16;4,2> + mov (8) uwDEST_U(6,8)<1> ubAVS_RESPONSE_2(11,1)<16;4,2> + mov (8) uwDEST_U(7,8)<1> ubAVS_RESPONSE_2(11,8+1)<16;4,2> +#endif +//------------------------------------------------------------------------------ + + // Re-define new number of lines + #undef nUV_NUM_OF_ROWS + #undef nY_NUM_OF_ROWS + + #define nY_NUM_OF_ROWS 8 + #define nUV_NUM_OF_ROWS 8 + diff --git a/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_Unpack_8x4.asm b/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_Unpack_8x4.asm new file mode 100644 index 00000000..01d451d9 --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_Unpack_8x4.asm @@ -0,0 +1,77 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +//---------- PA_AVS_IEF_Unpack_8x8.asm ---------- + +// Yoni: In order to optimize unpacking, 3 methods are being checked: +// 1. AVS_ORIGINAL +// 2. AVS_ROUND_TO_8_BITS +// 3. AVS_INDIRECT_ACCESS +// +// Only 1 method should stay in the code + + +//#define AVS_ROUND_TO_8_BITS +//#define AVS_INDIRECT_ACCESS + + + // Move first 8x8 words of Y to dest GRF + mov (8) uwDEST_Y(0)<1> ubAVS_RESPONSE(2,1)<16;4,2> + mov (8) uwDEST_Y(1)<1> ubAVS_RESPONSE(2,8+1)<16;4,2> + mov (8) uwDEST_Y(2)<1> ubAVS_RESPONSE(3,1)<16;4,2> + mov (8) uwDEST_Y(3)<1> ubAVS_RESPONSE(3,8+1)<16;4,2> + mov (8) uwDEST_Y(4)<1> ubAVS_RESPONSE(8,1)<16;4,2> + mov (8) uwDEST_Y(5)<1> ubAVS_RESPONSE(8,8+1)<16;4,2> + mov (8) uwDEST_Y(6)<1> ubAVS_RESPONSE(9,1)<16;4,2> + mov (8) uwDEST_Y(7)<1> ubAVS_RESPONSE(9,8+1)<16;4,2> + + // Move first 4x8 words of V to dest GRF + mov (4) uwDEST_V(0)<1> ubAVS_RESPONSE(0,1)<16;2,4> + mov (4) uwDEST_V(0,8)<1> ubAVS_RESPONSE(1,1)<16;2,4> + mov (4) uwDEST_V(1)<1> ubAVS_RESPONSE(6,1)<16;2,4> + mov (4) uwDEST_V(1,8)<1> ubAVS_RESPONSE(7,1)<16;2,4> + + // Move first 4x8 words of U to dest GRF + mov (4) uwDEST_U(0)<1> ubAVS_RESPONSE(4,1)<16;2,4> + mov (4) uwDEST_U(0,8)<1> ubAVS_RESPONSE(5,1)<16;2,4> + mov (4) uwDEST_U(1)<1> ubAVS_RESPONSE(10,1)<16;2,4> + mov (4) uwDEST_U(1,8)<1> ubAVS_RESPONSE(11,1)<16;2,4> + + // Move second 8x8 words of Y to dest GRF + mov (8) uwDEST_Y(0,8)<1> ubAVS_RESPONSE_2(2,1)<16;4,2> + mov (8) uwDEST_Y(1,8)<1> ubAVS_RESPONSE_2(2,8+1)<16;4,2> + mov (8) uwDEST_Y(2,8)<1> ubAVS_RESPONSE_2(3,1)<16;4,2> + mov (8) uwDEST_Y(3,8)<1> ubAVS_RESPONSE_2(3,8+1)<16;4,2> + mov (8) uwDEST_Y(4,8)<1> ubAVS_RESPONSE_2(8,1)<16;4,2> + mov (8) uwDEST_Y(5,8)<1> ubAVS_RESPONSE_2(8,8+1)<16;4,2> + mov (8) uwDEST_Y(6,8)<1> ubAVS_RESPONSE_2(9,1)<16;4,2> + mov (8) uwDEST_Y(7,8)<1> ubAVS_RESPONSE_2(9,8+1)<16;4,2> + + // Move second 4x8 words of V to dest GRF + mov (4) uwDEST_V(0,4)<1> ubAVS_RESPONSE_2(0,1)<16;2,4> + mov (4) uwDEST_V(0,12)<1> ubAVS_RESPONSE_2(1,1)<16;2,4> + mov (4) uwDEST_V(1,4)<1> ubAVS_RESPONSE_2(6,1)<16;2,4> + mov (4) uwDEST_V(1,12)<1> ubAVS_RESPONSE_2(7,1)<16;2,4> + + // Move second 4x8 words of U to dest GRF + mov (4) uwDEST_U(0,4)<1> ubAVS_RESPONSE_2(4,1)<16;2,4> + mov (4) uwDEST_U(0,12)<1> ubAVS_RESPONSE_2(5,1)<16;2,4> + mov (4) uwDEST_U(1,4)<1> ubAVS_RESPONSE_2(10,1)<16;2,4> + mov (4) uwDEST_U(1,12)<1> ubAVS_RESPONSE_2(11,1)<16;2,4> + +//------------------------------------------------------------------------------ + + // Re-define new number of lines + #undef nUV_NUM_OF_ROWS + #undef nY_NUM_OF_ROWS + + #define nY_NUM_OF_ROWS 8 + #define nUV_NUM_OF_ROWS 8 + diff --git a/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_Unpack_8x8.asm b/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_Unpack_8x8.asm new file mode 100644 index 00000000..91b23982 --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_Unpack_8x8.asm @@ -0,0 +1,93 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +//---------- PA_AVS_IEF_Unpack_8x8.asm ---------- + +// Yoni: In order to optimize unpacking, 3 methods are being checked: +// 1. AVS_ORIGINAL +// 2. AVS_ROUND_TO_8_BITS +// 3. AVS_INDIRECT_ACCESS +// +// Only 1 method should stay in the code + + +//#define AVS_ROUND_TO_8_BITS +//#define AVS_INDIRECT_ACCESS + + + // Move first 8x8 words of Y to dest GRF + mov (8) uwDEST_Y(0)<1> ubAVS_RESPONSE(2,1)<16;4,2> + mov (8) uwDEST_Y(1)<1> ubAVS_RESPONSE(2,8+1)<16;4,2> + mov (8) uwDEST_Y(2)<1> ubAVS_RESPONSE(3,1)<16;4,2> + mov (8) uwDEST_Y(3)<1> ubAVS_RESPONSE(3,8+1)<16;4,2> + mov (8) uwDEST_Y(4)<1> ubAVS_RESPONSE(8,1)<16;4,2> + mov (8) uwDEST_Y(5)<1> ubAVS_RESPONSE(8,8+1)<16;4,2> + mov (8) uwDEST_Y(6)<1> ubAVS_RESPONSE(9,1)<16;4,2> + mov (8) uwDEST_Y(7)<1> ubAVS_RESPONSE(9,8+1)<16;4,2> + + // Move first 4x8 words of V to dest GRF + mov (4) uwDEST_V(0)<1> ubAVS_RESPONSE(0,1)<16;2,4> + mov (4) uwDEST_V(0,8)<1> ubAVS_RESPONSE(0,8+1)<16;2,4> + mov (4) uwDEST_V(1)<1> ubAVS_RESPONSE(1,1)<16;2,4> + mov (4) uwDEST_V(1,8)<1> ubAVS_RESPONSE(1,8+1)<16;2,4> + mov (4) uwDEST_V(2)<1> ubAVS_RESPONSE(6,1)<16;2,4> + mov (4) uwDEST_V(2,8)<1> ubAVS_RESPONSE(6,8+1)<16;2,4> + mov (4) uwDEST_V(3)<1> ubAVS_RESPONSE(7,1)<16;2,4> + mov (4) uwDEST_V(3,8)<1> ubAVS_RESPONSE(7,8+1)<16;2,4> + + // Move first 4x8 words of U to dest GRF + mov (4) uwDEST_U(0)<1> ubAVS_RESPONSE(4,1)<16;2,4> + mov (4) uwDEST_U(0,8)<1> ubAVS_RESPONSE(4,8+1)<16;2,4> + mov (4) uwDEST_U(1)<1> ubAVS_RESPONSE(5,1)<16;2,4> + mov (4) uwDEST_U(1,8)<1> ubAVS_RESPONSE(5,8+1)<16;2,4> + mov (4) uwDEST_U(2)<1> ubAVS_RESPONSE(10,1)<16;2,4> + mov (4) uwDEST_U(2,8)<1> ubAVS_RESPONSE(10,8+1)<16;2,4> + mov (4) uwDEST_U(3)<1> ubAVS_RESPONSE(11,1)<16;2,4> + mov (4) uwDEST_U(3,8)<1> ubAVS_RESPONSE(11,8+1)<16;2,4> + + // Move second 8x8 words of Y to dest GRF + mov (8) uwDEST_Y(0,8)<1> ubAVS_RESPONSE_2(2,1)<16;4,2> + mov (8) uwDEST_Y(1,8)<1> ubAVS_RESPONSE_2(2,8+1)<16;4,2> + mov (8) uwDEST_Y(2,8)<1> ubAVS_RESPONSE_2(3,1)<16;4,2> + mov (8) uwDEST_Y(3,8)<1> ubAVS_RESPONSE_2(3,8+1)<16;4,2> + mov (8) uwDEST_Y(4,8)<1> ubAVS_RESPONSE_2(8,1)<16;4,2> + mov (8) uwDEST_Y(5,8)<1> ubAVS_RESPONSE_2(8,8+1)<16;4,2> + mov (8) uwDEST_Y(6,8)<1> ubAVS_RESPONSE_2(9,1)<16;4,2> + mov (8) uwDEST_Y(7,8)<1> ubAVS_RESPONSE_2(9,8+1)<16;4,2> + + // Move second 4x8 words of V to dest GRF + mov (4) uwDEST_V(0,4)<1> ubAVS_RESPONSE_2(0,1)<16;2,4> + mov (4) uwDEST_V(0,12)<1> ubAVS_RESPONSE_2(0,8+1)<16;2,4> + mov (4) uwDEST_V(1,4)<1> ubAVS_RESPONSE_2(1,1)<16;2,4> + mov (4) uwDEST_V(1,12)<1> ubAVS_RESPONSE_2(1,8+1)<16;2,4> + mov (4) uwDEST_V(2,4)<1> ubAVS_RESPONSE_2(6,1)<16;2,4> + mov (4) uwDEST_V(2,12)<1> ubAVS_RESPONSE_2(6,8+1)<16;2,4> + mov (4) uwDEST_V(3,4)<1> ubAVS_RESPONSE_2(7,1)<16;2,4> + mov (4) uwDEST_V(3,12)<1> ubAVS_RESPONSE_2(7,8+1)<16;2,4> + + // Move second 4x8 words of U to dest GRF + mov (4) uwDEST_U(0,4)<1> ubAVS_RESPONSE_2(4,1)<16;2,4> + mov (4) uwDEST_U(0,12)<1> ubAVS_RESPONSE_2(4,8+1)<16;2,4> + mov (4) uwDEST_U(1,4)<1> ubAVS_RESPONSE_2(5,1)<16;2,4> + mov (4) uwDEST_U(1,12)<1> ubAVS_RESPONSE_2(5,8+1)<16;2,4> + mov (4) uwDEST_U(2,4)<1> ubAVS_RESPONSE_2(10,1)<16;2,4> + mov (4) uwDEST_U(2,12)<1> ubAVS_RESPONSE_2(10,8+1)<16;2,4> + mov (4) uwDEST_U(3,4)<1> ubAVS_RESPONSE_2(11,1)<16;2,4> + mov (4) uwDEST_U(3,12)<1> ubAVS_RESPONSE_2(11,8+1)<16;2,4> + +//------------------------------------------------------------------------------ + + // Re-define new number of lines + #undef nUV_NUM_OF_ROWS + #undef nY_NUM_OF_ROWS + + #define nY_NUM_OF_ROWS 8 + #define nUV_NUM_OF_ROWS 8 + diff --git a/src/shaders/post_processing/Core_Kernels/PA_DNDI_ALG.asm b/src/shaders/post_processing/Core_Kernels/PA_DNDI_ALG.asm new file mode 100644 index 00000000..6aa91c8b --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/PA_DNDI_ALG.asm @@ -0,0 +1,139 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +#define DI_ENABLE + + #include "DNDI.inc" + + #ifdef DI_ONLY + #undef nSMPL_RESP_LEN + #define nSMPL_RESP_LEN nSMPL_RESP_LEN_DI // set the number of GRF + #else + #undef nSMPL_RESP_LEN + #define nSMPL_RESP_LEN nSMPL_RESP_LEN_DNDI // set the number of GRF + #endif + + #undef nDPW_BLOCK_SIZE_HIST + #define nDPW_BLOCK_SIZE_HIST nBLOCK_WIDTH_4+nBLOCK_HEIGHT_1 // HIST Block Size for Write is 4x2 + #undef nDPW_BLOCK_SIZE_DN + #define nDPW_BLOCK_SIZE_DN nBLOCK_WIDTH_32+nBLOCK_HEIGHT_4 // DN Block Size for Write is 32x4 + +////////////////////////////////////// Run the DN Algorithm /////////////////////////////////////// + #include "DNDI_Command.asm" + +////////////////////////////////////// Rearrange for Internal Planar ////////////////////////////// + //// move the previous frame Y component to internal planar format + //$for (0; <nY_NUM_OF_ROWS/2; 1) { + // mov (16) uwDEST_Y(%1,0)<1> ubRESP(nDI_PREV_FRAME_LUMA_OFFSET,%1*16) + //} + //// move the previous frame U,V components to internal planar format + //$for (0; <nUV_NUM_OF_ROWS/2; 1) { + // mov (8) uwDEST_U(0,%1*8)<1> ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels + // mov (8) uwDEST_V(0,%1*8)<1> ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //V pixels + //} + //// move the current frame Y component to internal planar format + //$for (0; <nY_NUM_OF_ROWS/2; 1) { + // mov (16) uwDEST_Y(%1+4,0)<1> ubRESP(nDI_CURR_FRAME_LUMA_OFFSET,%1*16) + //} + //// move the current frame U,V components to internal planar format + //$for (0; <nUV_NUM_OF_ROWS/2; 1) { + // mov (8) uwDEST_U(2,%1*8)<1> ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels + // mov (8) uwDEST_V(2,%1*8)<1> ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //V pixels + //} + +////////////////////////////////////// Save the STMM Data for Next Run ///////////////////////// + // Write STMM to memory + shr (1) rMSGSRC.0<1>:ud wORIX<0;1,0>:w 1:w NODDCLR // X origin / 2 + mov (1) rMSGSRC.1<1>:ud wORIY<0;1,0>:w NODDCLR_NODDCHK // Y origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_STMM:ud NODDCHK // block width and height (8x4) + mov (8) mudMSGHDR_STMM(0)<1> rMSGSRC.0<8;8,1>:ud // message header + mov (8) mudMSGHDR_STMM(1)<1> udRESP(nDI_STMM_OFFSET,0) // Move STMM to MRF + send (8) dNULLREG mMSGHDR_STMM udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_STMM+nBI_STMM_HISTORY_OUTPUT:ud + +////////////////////////////////////// Save the History Data for Next Run ///////////////////////// +#ifdef DI_ONLY +#else + + #include "DI_Hist_Save.asm" + +////////////////////////////////////// Pack and Save the DN Curr Frame for Next Run /////////////// + // check top/bottom field first + cmp.e.f0.0 (1) null<1>:w ubTFLD_FIRST<0;1,0>:ub 1:w + + add (4) pCF_Y_OFFSET<1>:uw ubSRC_CF_OFFSET<4;4,1>:ub npDN_YUV:uw + //set the save DN position + shl (1) rMSGSRC.0<1>:ud wORIX<0;1,0>:w 1:w NODDCLR // X origin * 2 + mov (1) rMSGSRC.1<1>:ud wORIY<0;1,0>:w NODDCLR_NODDCHK // Y origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DN:ud NODDCHK // block width and height (8x4) + mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud + + + (f0.0) jmpi (1) TOP_FIELD_FIRST + +BOTTOM_FIELD_FIRST: + //$for (0,0; <nY_NUM_OF_ROWS/2; 2,1) { + // mov (16) r[pCF_Y_OFFSET, %1*32]<2>:ub ubRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*16) // 2nd field luma from current frame (line 0,2) + // mov (16) r[pCF_Y_OFFSET, %1+1*32]<2>:ub ubRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,16) // 1st field luma from current frame (line 1,3) + // mov (8) r[pCF_U_OFFSET, %1*32]<4>:ub ubRESP(nDI_CURR_2ND_FIELD_CHROMA_OFFSET,%2*16+1)<16;8,2> // 2nd field U from current frame (line 0,2) + // mov (8) r[pCF_V_OFFSET, %1*32]<4>:ub ubRESP(nDI_CURR_2ND_FIELD_CHROMA_OFFSET,%2*16)<16;8,2> // 2nd field V from current frame (line 0,2) + // mov (8) r[pCF_U_OFFSET, %1+1*32]<4>:ub ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET+%2,16+1)<16;8,2> // 1st field U from current frame (line 1,3) + // mov (8) r[pCF_V_OFFSET, %1+1*32]<4>:ub ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET+%2,16)<16;8,2> // 1st field U from current frame (line 1,3) + //} + $for (0,0; <nY_NUM_OF_ROWS/2; 2,1) { + mov (16) r[pCF_Y_OFFSET, %1*32]<2>:ub ubRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*16) // 2nd field luma from current frame (line 0,2) + mov (16) r[pCF_Y_OFFSET, %1+1*32]<2>:ub ubRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,16) // 1st field luma from current frame (line 1,3) + } + + $for (0,0; <nY_NUM_OF_ROWS/2; 2,1) { + mov (8) r[pCF_U_OFFSET, %1*32]<4>:ub ubRESP(nDI_CURR_2ND_FIELD_CHROMA_OFFSET,%2*16+1)<16;8,2> // 2nd field U from current frame (line 0,2) + mov (8) r[pCF_U_OFFSET, %1+1*32]<4>:ub ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET+%2,16+1)<16;8,2> // 1st field U from current frame (line 1,3) + } + + $for (0,0; <nY_NUM_OF_ROWS/2; 2,1) { + mov (8) r[pCF_V_OFFSET, %1*32]<4>:ub ubRESP(nDI_CURR_2ND_FIELD_CHROMA_OFFSET,%2*16)<16;8,2> // 2nd field V from current frame (line 0,2) + mov (8) r[pCF_V_OFFSET, %1+1*32]<4>:ub ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET+%2,16)<16;8,2> // 1st field U from current frame (line 1,3) + } + + jmpi (1) SAVE_DN_CURR + +TOP_FIELD_FIRST: + //$for (0,0; <nY_NUM_OF_ROWS/2; 2,1) { + // mov (16) r[pCF_Y_OFFSET, %1*32]<2>:ub ubRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,0) // 1st field luma from current frame (line 0,2) + // mov (16) r[pCF_Y_OFFSET, %1+1*32]<2>:ub ubRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*16) // 2nd field luma from current frame (line 1,3) + // mov (8) r[pCF_U_OFFSET, %1*32]<4>:ub ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET+%2,1)<16;8,2> // 1st field U from current frame (line 0,2) + // mov (8) r[pCF_V_OFFSET, %1*32]<4>:ub ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET+%2,0)<16;8,2> // 1st field V from current frame (line 0,2) + // mov (8) r[pCF_U_OFFSET, %1+1*32]<4>:ub ubRESP(nDI_CURR_2ND_FIELD_CHROMA_OFFSET,%2*16+1)<16;8,2> // 2nd field U from current frame (line 1,3) + // mov (8) r[pCF_V_OFFSET, %1+1*32]<4>:ub ubRESP(nDI_CURR_2ND_FIELD_CHROMA_OFFSET,%2*16)<16;8,2> // 2nd field V from current frame (line 1,3) + //} + $for (0,0; <nY_NUM_OF_ROWS/2; 2,1) { + mov (16) r[pCF_Y_OFFSET, %1*32]<2>:ub ubRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,0) // 1st field luma from current frame (line 0,2) + mov (16) r[pCF_Y_OFFSET, %1+1*32]<2>:ub ubRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*16) // 2nd field luma from current frame (line 1,3) + } + $for (0,0; <nY_NUM_OF_ROWS/2; 2,1) { + mov (8) r[pCF_U_OFFSET, %1*32]<4>:ub ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET+%2,1)<16;8,2> // 1st field U from current frame (line 0,2) + mov (8) r[pCF_U_OFFSET, %1+1*32]<4>:ub ubRESP(nDI_CURR_2ND_FIELD_CHROMA_OFFSET,%2*16+1)<16;8,2> // 2nd field U from current frame (line 1,3) + } + $for (0,0; <nY_NUM_OF_ROWS/2; 2,1) { + mov (8) r[pCF_V_OFFSET, %1*32]<4>:ub ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET+%2,0)<16;8,2> // 1st field V from current frame (line 0,2) + mov (8) r[pCF_V_OFFSET, %1+1*32]<4>:ub ubRESP(nDI_CURR_2ND_FIELD_CHROMA_OFFSET,%2*16)<16;8,2> // 2nd field V from current frame (line 1,3) + } + +SAVE_DN_CURR: + $for(0; <nY_NUM_OF_ROWS/2; 1) { + mov (8) mudMSGHDR_DN(%1+1)<1> udDN_YUV(%1)REGION(8,1) + } + send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_PA_DN_DI+nBI_DESTINATION_YUV:ud +#endif + +// Save Processed frames +#include "DI_Save_PA.asm" + + + diff --git a/src/shaders/post_processing/Core_Kernels/PA_DN_ALG.asm b/src/shaders/post_processing/Core_Kernels/PA_DN_ALG.asm new file mode 100644 index 00000000..ef88a3c6 --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/PA_DN_ALG.asm @@ -0,0 +1,54 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +#define DI_DISABLE + +#include "DNDI.inc" + +#undef nY_NUM_OF_ROWS +#define nY_NUM_OF_ROWS 8 // Number of Y rows per block +#undef nUV_NUM_OF_ROWS +#define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block + +#undef nSMPL_RESP_LEN +#define nSMPL_RESP_LEN nSMPL_RESP_LEN_DN_PA // Set the Number of GRFs in DNDI response +#undef nDPW_BLOCK_SIZE_DN +#define nDPW_BLOCK_SIZE_DN nBLOCK_WIDTH_32+nBLOCK_HEIGHT_8 // DN Curr Block Size for Write is 32x8 +#undef nDPW_BLOCK_SIZE_HIST +#define nDPW_BLOCK_SIZE_HIST nBLOCK_WIDTH_4+nBLOCK_HEIGHT_2 // HIST Block Size for Write is 4x2 + +////////////////////////////////////// Run the DN Algorithm /////////////////////////////////////// +#include "DNDI_COMMAND.asm" + +////////////////////////////////////// Save the History Data for Next Run ///////////////////////// +#include "DNDI_Hist_Save.asm" + +////////////////////////////////////// Pack and Save the DN Curr Frame for Next Run /////////////// +add (4) pCF_Y_OFFSET<1>:uw ubDEST_CF_OFFSET<4;4,1>:ub npDN_YUV:w +$for (0; <nY_NUM_OF_ROWS; 1) { + mov (16) r[pCF_Y_OFFSET, %1*32]<2>:ub ubRESP(nNODI_LUMA_OFFSET,%1*16)<16;16,1> // copy line of Y +} +$for (0; <nUV_NUM_OF_ROWS; 1) { + mov (8) r[pCF_U_OFFSET, %1*32]<4>:ub ubRESP(nNODI_CHROMA_OFFSET,%1*16+1)<16;8,2> // copy line of U + mov (8) r[pCF_V_OFFSET, %1*32]<4>:ub ubRESP(nNODI_CHROMA_OFFSET,%1*16)<16;8,2> // copy line of V +} + +shl (1) rMSGSRC.0<1>:ud wORIX<0;1,0>:w 1:w // X origin * 2 (422 output) +mov (1) rMSGSRC.1<1>:ud wORIY<0;1,0>:w // Y origin +mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DN:ud // block width and height (32x8) +mov (8) mMSGHDR_DN<1>:ud rMSGSRC<8;8,1>:ud // message header + +$for(0; <nY_NUM_OF_ROWS; 2) { + mov (16) mudMSGHDR_DN(1+%1)<1> udDN_YUV(%1)REGION(8,1) // Move DN Curr to MRF +} +send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_PA_DN_NODI+nBI_DESTINATION_YUV:ud + + + diff --git a/src/shaders/post_processing/Core_Kernels/PA_Scaling.asm b/src/shaders/post_processing/Core_Kernels/PA_Scaling.asm new file mode 100644 index 00000000..c2a1b1e0 --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/PA_Scaling.asm @@ -0,0 +1,70 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +//---------- PA_Scaling.asm ---------- +#include "Scaling.inc" + + // Build 16 elements ramp in float32 and normalized it +// mov (8) SAMPLER_RAMP(0)<1> 0x76543210:v +// add (8) SAMPLER_RAMP(1)<1> SAMPLER_RAMP(0) 8.0:f +mov (4) SAMPLER_RAMP(0)<1> 0x48403000:vf //3, 2, 1, 0 in float vector +mov (4) SAMPLER_RAMP(0,4)<1> 0x5C585450:vf //7, 6, 5, 4 in float vector +add (8) SAMPLER_RAMP(1)<1> SAMPLER_RAMP(0) 8.0:f + +//Module: PrepareScaleCoord.asm + + // Setup for sampler msg hdr + mov (2) rMSGSRC.0<1>:ud 0:ud { NoDDClr } // Unused fields + mov (1) rMSGSRC.2<1>:ud 0:ud { NoDDChk } // Write and offset + + // Calculate 16 v based on the step Y and vertical origin + mov (16) mfMSGPAYLOAD(2)<1> fSRC_VID_V_ORI<0;1,0>:f + mov (16) SCALE_COORD_Y<1>:f fSRC_VID_V_ORI<0;1,0>:f + + // Calculate 16 u based on the step X and hori origin +// line (16) mfMSGPAYLOAD(0)<1> SCALE_STEP_X<0;1,0>:f SAMPLER_RAMP(0) // Assign to mrf directly + mov (16) acc0:f fSRC_VID_H_ORI<0;1,0>:f { Compr } + mac (16) mfMSGPAYLOAD(0)<1> fVIDEO_STEP_X<0;1,0>:f SAMPLER_RAMP(0) { Compr } + + //Setup the constants for line instruction + mov (1) SCALE_LINE_P255<1>:f 255.0:f { NoDDClr } //{ NoDDClr, NoDDChk } + mov (1) SCALE_LINE_P0_5<1>:f 0.5:f { NoDDChk } + +//------------------------------------------------------------------------------ + +$for (0; <nY_NUM_OF_ROWS; 1) { + + // Read 16 sampled pixels and store them in float32 in 8 GRFs in the order of BGRA (VYUA). + mov (8) MSGHDR_SCALE.0:ud rMSGSRC.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (16) SCALE_RESPONSE_YW(0)<1> MSGHDR_SCALE udDUMMY_NULL nSMPL_ENGINE SMPLR_MSG_DSC+nSI_SRC_SIMD16_YUV+nBI_CURRENT_SRC_YUV + + // Calculate 16 v for next line + add (16) mfMSGPAYLOAD(2)<1> SCALE_COORD_Y<8;8,1>:f fVIDEO_STEP_Y<0;1,0>:f // Assign to mrf directly + add (16) SCALE_COORD_Y<1>:f SCALE_COORD_Y<8;8,1>:f fVIDEO_STEP_Y<0;1,0>:f // Assign to mrf directly + + // Scale back to [0, 255], convert f to ud + line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_YF(0) { Compr } // Process B, V + mov (16) SCALE_RESPONSE_YD(0)<1> acc0:f { Compr } + + line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_YF(2) { Compr } // Process B, V + mov (16) SCALE_RESPONSE_YD(2)<1> acc0:f { Compr } + + line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_YF(4) { Compr } // Process B, V + mov (16) SCALE_RESPONSE_YD(4)<1> acc0:f { Compr } + + mov (16) DEST_V(%1)<1> SCALE_RESPONSE_YB(0) //possible error due to truncation - vK + mov (16) DEST_Y(%1)<1> SCALE_RESPONSE_YB(2) //possible error due to truncation - vK + mov (16) DEST_U(%1)<1> SCALE_RESPONSE_YB(4) //possible error due to truncation - vK + +} + + #define nSRC_REGION nREGION_1 + +//------------------------------------------------------------------------------ diff --git a/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_16x8.asm b/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_16x8.asm new file mode 100644 index 00000000..2f7b7354 --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_16x8.asm @@ -0,0 +1,60 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +//---------- PL2_AVS_IEF_16x8.asm ---------- + +#include "AVS_IEF.inc" + +//------------------------------------------------------------------------------ +// 2 sampler reads for 8x8 Y each +// 2 sampler read for 8x8 U and 8x8 V (NV11\P208 input surface) +//------------------------------------------------------------------------------ + + // 1st 8x8 setup + #include "AVS_SetupFirstBlock.asm" + + // Enable green channel only + mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud + + mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y + // Return Y in 4 GRFs + + // 8x8 U and V sampling + // Enable red and blue channels + mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_BLUE_CHANNELS:ud + + mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(4)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_2CH+nSI_SRC_UV+nBI_CURRENT_SRC_UV + // Return U and V in 8 GRFs + + // 2nd 8x8 setup + #include "AVS_SetupSecondBlock.asm" + + // 2nd 8x8 Y sampling + // Enable green channel only + mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud + + mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE_2(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y + + // 2nd 8x8 U and V sampling + // Enable red and blue channels + mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_BLUE_CHANNELS:ud + + mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE_2(4)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_2CH+nSI_SRC_UV+nBI_CURRENT_SRC_UV + // Return U and V in 8 GRFs + +//------------------------------------------------------------------------------ +// Unpacking sampler reads to 4:4:4 internal planar +//------------------------------------------------------------------------------ + #include "PL2_AVS_IEF_Unpack_16x8.asm" + diff --git a/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_8x4.asm b/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_8x4.asm new file mode 100644 index 00000000..9b221e76 --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_8x4.asm @@ -0,0 +1,58 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +//---------- PL2_AVS_IEF_8x4.asm ---------- + +#include "AVS_IEF.inc" + +//------------------------------------------------------------------------------ +// 2 sampler reads for 8x8 Y each +// 1 sampler read for 8x8 U and 8x8 V (NV11\NV12 input surface) +//------------------------------------------------------------------------------ + + // 1st 8x8 setup + #include "AVS_SetupFirstBlock.asm" + + // Enable green channel only + mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud + + mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y + // Return Y in 4 GRFs + + // 8x8 U and V sampling + // Enable red and blue channels + //Only 8x4 wil be used + mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_BLUE_CHANNELS:ud + + // Calculate Chroma Step Size: + // for H direction: 16 Luma samples are covered by 8 Chroma samples. Thus Chroma_Step_X = 2 * Luma_Step_X + // for V direction: 8 Luma samples are covered by 8 Chroma samples. Thus Chroma_Step_Y = Luma_Step_Y + mul (1) rAVS_PAYLOAD.1:f fVIDEO_STEP_X:f 2.0:f // Step X for chroma + + mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(4)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_2CH+nSI_SRC_UV+nBI_CURRENT_SRC_UV + // Return U and V in 8 GRFs + + // 2nd 8x8 setup + #include "AVS_SetupSecondBlock.asm" + + // 2nd 8x8 Y sampling + // Enable green channel only + mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud + + mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE_2(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y + +//------------------------------------------------------------------------------ +// Unpacking sampler reads to 4:2:0 internal planar +//------------------------------------------------------------------------------ + #include "PL2_AVS_IEF_Unpack_8x4.asm" + diff --git a/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_8x8.asm b/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_8x8.asm new file mode 100644 index 00000000..404fbd0b --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_8x8.asm @@ -0,0 +1,57 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +//---------- PL2_AVS_IEF_8x8.asm ---------- + +#include "AVS_IEF.inc" + +//------------------------------------------------------------------------------ +// 2 sampler reads for 8x8 Y each +// 1 sampler read for 8x8 U and 8x8 V (NV11\NV12 input surface) +//------------------------------------------------------------------------------ + + // 1st 8x8 setup + #include "AVS_SetupFirstBlock.asm" + + // Enable green channel only + mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud + + mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y + // Return Y in 4 GRFs + + // 8x8 U and V sampling + // Enable red and blue channels + mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_BLUE_CHANNELS:ud + + // Calculate Chroma Step Size: + // for H direction: 16 Luma samples are covered by 8 Chroma samples. Thus Chroma_Step_X = 2 * Luma_Step_X + // for V direction: 8 Luma samples are covered by 8 Chroma samples. Thus Chroma_Step_Y = Luma_Step_Y + mul (1) rAVS_PAYLOAD.1:f fVIDEO_STEP_X:f 2.0:f // Step X for chroma + + mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(4)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_2CH+nSI_SRC_UV+nBI_CURRENT_SRC_UV + // Return U and V in 8 GRFs + + // 2nd 8x8 setup + #include "AVS_SetupSecondBlock.asm" + + // 2nd 8x8 Y sampling + // Enable green channel only + mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud + + mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE_2(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y + +//------------------------------------------------------------------------------ +// Unpacking sampler reads to 4:2:2 internal planar +//------------------------------------------------------------------------------ + #include "PL2_AVS_IEF_Unpack_8x8.asm" + diff --git a/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_Unpack_16x8.asm b/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_Unpack_16x8.asm new file mode 100644 index 00000000..6e675571 --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_Unpack_16x8.asm @@ -0,0 +1,271 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +//---------- PL2_AVS_IEF_Unpack_16x8.asm ---------- + +#ifdef AVS_OUTPUT_16_BIT //Output is packed in AVYU format +// Move first 8x8 words of Y to dest GRF (as packed) + mov (4) uwDEST_Y(0,1)<4> uwAVS_RESPONSE(0,0)<4;4,1> + mov (4) uwDEST_Y(1,1)<4> uwAVS_RESPONSE(0,8)<4;4,1> + mov (4) uwDEST_Y(4,1)<4> uwAVS_RESPONSE(0,4)<4;4,1> + mov (4) uwDEST_Y(5,1)<4> uwAVS_RESPONSE(0,12)<4;4,1> + mov (4) uwDEST_Y(8,1)<4> uwAVS_RESPONSE(1,0)<4;4,1> + mov (4) uwDEST_Y(9,1)<4> uwAVS_RESPONSE(1,8)<4;4,1> + mov (4) uwDEST_Y(12,1)<4> uwAVS_RESPONSE(1,4)<4;4,1> + mov (4) uwDEST_Y(13,1)<4> uwAVS_RESPONSE(1,12)<4;4,1> + mov (4) uwDEST_Y(16,1)<4> uwAVS_RESPONSE(2,0)<4;4,1> + mov (4) uwDEST_Y(17,1)<4> uwAVS_RESPONSE(2,8)<4;4,1> + mov (4) uwDEST_Y(20,1)<4> uwAVS_RESPONSE(2,4)<4;4,1> + mov (4) uwDEST_Y(21,1)<4> uwAVS_RESPONSE(2,12)<4;4,1> + mov (4) uwDEST_Y(24,1)<4> uwAVS_RESPONSE(3,0)<4;4,1> + mov (4) uwDEST_Y(25,1)<4> uwAVS_RESPONSE(3,8)<4;4,1> + mov (4) uwDEST_Y(28,1)<4> uwAVS_RESPONSE(3,4)<4;4,1> + mov (4) uwDEST_Y(29,1)<4> uwAVS_RESPONSE(3,12)<4;4,1> + +// Move first 8x8 words of U to dest GRF (as packed) + mov (4) uwDEST_Y(0,0)<4> uwAVS_RESPONSE(4,0)<4;4,1> + mov (4) uwDEST_Y(1,0)<4> uwAVS_RESPONSE(4,8)<4;4,1> + mov (4) uwDEST_Y(4,0)<4> uwAVS_RESPONSE(4,4)<4;4,1> + mov (4) uwDEST_Y(5,0)<4> uwAVS_RESPONSE(4,12)<4;4,1> + mov (4) uwDEST_Y(8,0)<4> uwAVS_RESPONSE(5,0)<4;4,1> + mov (4) uwDEST_Y(9,0)<4> uwAVS_RESPONSE(5,8)<4;4,1> + mov (4) uwDEST_Y(12,0)<4> uwAVS_RESPONSE(5,4)<4;4,1> + mov (4) uwDEST_Y(13,0)<4> uwAVS_RESPONSE(5,12)<4;4,1> + mov (4) uwDEST_Y(16,0)<4> uwAVS_RESPONSE(8,0)<4;4,1> + mov (4) uwDEST_Y(17,0)<4> uwAVS_RESPONSE(8,8)<4;4,1> + mov (4) uwDEST_Y(20,0)<4> uwAVS_RESPONSE(8,4)<4;4,1> + mov (4) uwDEST_Y(21,0)<4> uwAVS_RESPONSE(8,12)<4;4,1> + mov (4) uwDEST_Y(24,0)<4> uwAVS_RESPONSE(9,0)<4;4,1> + mov (4) uwDEST_Y(25,0)<4> uwAVS_RESPONSE(9,8)<4;4,1> + mov (4) uwDEST_Y(28,0)<4> uwAVS_RESPONSE(9,4)<4;4,1> + mov (4) uwDEST_Y(29,0)<4> uwAVS_RESPONSE(9,12)<4;4,1> + +// Move first 8x8 words of V to dest GRF (as packed) + mov (4) uwDEST_Y(0,2)<4> uwAVS_RESPONSE(6,0)<4;4,1> + mov (4) uwDEST_Y(1,2)<4> uwAVS_RESPONSE(6,8)<4;4,1> + mov (4) uwDEST_Y(4,2)<4> uwAVS_RESPONSE(6,4)<4;4,1> + mov (4) uwDEST_Y(5,2)<4> uwAVS_RESPONSE(6,12)<4;4,1> + mov (4) uwDEST_Y(8,2)<4> uwAVS_RESPONSE(7,0)<4;4,1> + mov (4) uwDEST_Y(9,2)<4> uwAVS_RESPONSE(7,8)<4;4,1> + mov (4) uwDEST_Y(12,2)<4> uwAVS_RESPONSE(7,4)<4;4,1> + mov (4) uwDEST_Y(13,2)<4> uwAVS_RESPONSE(7,12)<4;4,1> + mov (4) uwDEST_Y(16,2)<4> uwAVS_RESPONSE(10,0)<4;4,1> + mov (4) uwDEST_Y(17,2)<4> uwAVS_RESPONSE(10,8)<4;4,1> + mov (4) uwDEST_Y(20,2)<4> uwAVS_RESPONSE(10,4)<4;4,1> + mov (4) uwDEST_Y(21,2)<4> uwAVS_RESPONSE(10,12)<4;4,1> + mov (4) uwDEST_Y(24,2)<4> uwAVS_RESPONSE(11,0)<4;4,1> + mov (4) uwDEST_Y(25,2)<4> uwAVS_RESPONSE(11,8)<4;4,1> + mov (4) uwDEST_Y(28,2)<4> uwAVS_RESPONSE(11,4)<4;4,1> + mov (4) uwDEST_Y(29,2)<4> uwAVS_RESPONSE(11,12)<4;4,1> + +// Move first 8x8 words of A to dest GRF (as packed) + mov (4) uwDEST_Y(0,3)<4> 0:uw + mov (4) uwDEST_Y(1,3)<4> 0:uw + mov (4) uwDEST_Y(4,3)<4> 0:uw + mov (4) uwDEST_Y(5,3)<4> 0:uw + mov (4) uwDEST_Y(8,3)<4> 0:uw + mov (4) uwDEST_Y(9,3)<4> 0:uw + mov (4) uwDEST_Y(12,3)<4> 0:uw + mov (4) uwDEST_Y(13,3)<4> 0:uw + mov (4) uwDEST_Y(16,3)<4> 0:uw + mov (4) uwDEST_Y(17,3)<4> 0:uw + mov (4) uwDEST_Y(20,3)<4> 0:uw + mov (4) uwDEST_Y(21,3)<4> 0:uw + mov (4) uwDEST_Y(24,3)<4> 0:uw + mov (4) uwDEST_Y(25,3)<4> 0:uw + mov (4) uwDEST_Y(28,3)<4> 0:uw + mov (4) uwDEST_Y(29,3)<4> 0:uw + +// Move second 8x8 words of Y to dest GRF + mov (4) uwDEST_Y(2,1)<4> uwAVS_RESPONSE_2(0,0)<4;4,1> + mov (4) uwDEST_Y(3,1)<4> uwAVS_RESPONSE_2(0,8)<4;4,1> + mov (4) uwDEST_Y(6,1)<4> uwAVS_RESPONSE_2(0,4)<4;4,1> + mov (4) uwDEST_Y(7,1)<4> uwAVS_RESPONSE_2(0,12)<4;4,1> + mov (4) uwDEST_Y(10,1)<4> uwAVS_RESPONSE_2(1,0)<4;4,1> + mov (4) uwDEST_Y(11,1)<4> uwAVS_RESPONSE_2(1,8)<4;4,1> + mov (4) uwDEST_Y(14,1)<4> uwAVS_RESPONSE_2(1,4)<4;4,1> + mov (4) uwDEST_Y(15,1)<4> uwAVS_RESPONSE_2(1,12)<4;4,1> + mov (4) uwDEST_Y(18,1)<4> uwAVS_RESPONSE_2(2,0)<4;4,1> + mov (4) uwDEST_Y(19,1)<4> uwAVS_RESPONSE_2(2,8)<4;4,1> + mov (4) uwDEST_Y(22,1)<4> uwAVS_RESPONSE_2(2,4)<4;4,1> + mov (4) uwDEST_Y(23,1)<4> uwAVS_RESPONSE_2(2,12)<4;4,1> + mov (4) uwDEST_Y(26,1)<4> uwAVS_RESPONSE_2(3,0)<4;4,1> + mov (4) uwDEST_Y(27,1)<4> uwAVS_RESPONSE_2(3,8)<4;4,1> + mov (4) uwDEST_Y(30,1)<4> uwAVS_RESPONSE_2(3,4)<4;4,1> + mov (4) uwDEST_Y(31,1)<4> uwAVS_RESPONSE_2(3,12)<4;4,1> + +// Move second 8x8 words of U to dest GRF + mov (4) uwDEST_Y(2,0)<4> uwAVS_RESPONSE_2(4,0)<4;4,1> + mov (4) uwDEST_Y(3,0)<4> uwAVS_RESPONSE_2(4,8)<4;4,1> + mov (4) uwDEST_Y(6,0)<4> uwAVS_RESPONSE_2(4,4)<4;4,1> + mov (4) uwDEST_Y(7,0)<4> uwAVS_RESPONSE_2(4,12)<4;4,1> + mov (4) uwDEST_Y(10,0)<4> uwAVS_RESPONSE_2(5,0)<4;4,1> + mov (4) uwDEST_Y(11,0)<4> uwAVS_RESPONSE_2(5,8)<4;4,1> + mov (4) uwDEST_Y(14,0)<4> uwAVS_RESPONSE_2(5,4)<4;4,1> + mov (4) uwDEST_Y(15,0)<4> uwAVS_RESPONSE_2(5,12)<4;4,1> + mov (4) uwDEST_Y(18,0)<4> uwAVS_RESPONSE_2(8,0)<4;4,1> + mov (4) uwDEST_Y(19,0)<4> uwAVS_RESPONSE_2(8,8)<4;4,1> + mov (4) uwDEST_Y(22,0)<4> uwAVS_RESPONSE_2(8,4)<4;4,1> + mov (4) uwDEST_Y(23,0)<4> uwAVS_RESPONSE_2(8,12)<4;4,1> + mov (4) uwDEST_Y(26,0)<4> uwAVS_RESPONSE_2(9,0)<4;4,1> + mov (4) uwDEST_Y(27,0)<4> uwAVS_RESPONSE_2(9,8)<4;4,1> + mov (4) uwDEST_Y(30,0)<4> uwAVS_RESPONSE_2(9,4)<4;4,1> + mov (4) uwDEST_Y(31,0)<4> uwAVS_RESPONSE_2(9,12)<4;4,1> + +// Move second 8x8 words of V to dest GRF + mov (4) uwDEST_Y(2,2)<4> uwAVS_RESPONSE_2(6,0)<4;4,1> + mov (4) uwDEST_Y(3,2)<4> uwAVS_RESPONSE_2(6,8)<4;4,1> + mov (4) uwDEST_Y(6,2)<4> uwAVS_RESPONSE_2(6,4)<4;4,1> + mov (4) uwDEST_Y(7,2)<4> uwAVS_RESPONSE_2(6,12)<4;4,1> + mov (4) uwDEST_Y(10,2)<4> uwAVS_RESPONSE_2(7,0)<4;4,1> + mov (4) uwDEST_Y(11,2)<4> uwAVS_RESPONSE_2(7,8)<4;4,1> + mov (4) uwDEST_Y(14,2)<4> uwAVS_RESPONSE_2(7,4)<4;4,1> + mov (4) uwDEST_Y(15,2)<4> uwAVS_RESPONSE_2(7,12)<4;4,1> + mov (4) uwDEST_Y(18,2)<4> uwAVS_RESPONSE_2(10,0)<4;4,1> + mov (4) uwDEST_Y(19,2)<4> uwAVS_RESPONSE_2(10,8)<4;4,1> + mov (4) uwDEST_Y(22,2)<4> uwAVS_RESPONSE_2(10,4)<4;4,1> + mov (4) uwDEST_Y(23,2)<4> uwAVS_RESPONSE_2(10,12)<4;4,1> + mov (4) uwDEST_Y(26,2)<4> uwAVS_RESPONSE_2(11,0)<4;4,1> + mov (4) uwDEST_Y(27,2)<4> uwAVS_RESPONSE_2(11,8)<4;4,1> + mov (4) uwDEST_Y(30,2)<4> uwAVS_RESPONSE_2(11,4)<4;4,1> + mov (4) uwDEST_Y(31,2)<4> uwAVS_RESPONSE_2(11,12)<4;4,1> + +// Move second 8x8 words of A to dest GRF + mov (4) uwDEST_Y(2,3)<4> 0:uw + mov (4) uwDEST_Y(3,3)<4> 0:uw + mov (4) uwDEST_Y(6,3)<4> 0:uw + mov (4) uwDEST_Y(7,3)<4> 0:uw + mov (4) uwDEST_Y(10,3)<4> 0:uw + mov (4) uwDEST_Y(11,3)<4> 0:uw + mov (4) uwDEST_Y(14,3)<4> 0:uw + mov (4) uwDEST_Y(15,3)<4> 0:uw + mov (4) uwDEST_Y(18,3)<4> 0:uw + mov (4) uwDEST_Y(19,3)<4> 0:uw + mov (4) uwDEST_Y(22,3)<4> 0:uw + mov (4) uwDEST_Y(23,3)<4> 0:uw + mov (4) uwDEST_Y(26,3)<4> 0:uw + mov (4) uwDEST_Y(27,3)<4> 0:uw + mov (4) uwDEST_Y(30,3)<4> 0:uw + mov (4) uwDEST_Y(31,3)<4> 0:uw + +/* This section will be used if 16-bit output is needed in planar format -vK + // Move 1st 8x8 words of Y to dest GRF at lower 8 words of each RGF. + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2)<1> uwAVS_RESPONSE(%1,0)<8;4,1> + mov (8) uwDEST_Y(%1*2+1)<1> uwAVS_RESPONSE(%1,8)<8;4,1> + } + + // Move 1st 8x8 words of U to dest GRF (Copy high byte in a word) + mov (8) uwDEST_U(0)<1> uwAVS_RESPONSE(4,0)<8;4,1> + mov (8) uwDEST_U(1)<1> uwAVS_RESPONSE(4,8)<8;4,1> + mov (8) uwDEST_U(2)<1> uwAVS_RESPONSE(5,0)<8;4,1> + mov (8) uwDEST_U(3)<1> uwAVS_RESPONSE(5,8)<8;4,1> + mov (8) uwDEST_U(4)<1> uwAVS_RESPONSE(8,0)<8;4,1> + mov (8) uwDEST_U(5)<1> uwAVS_RESPONSE(8,8)<8;4,1> + mov (8) uwDEST_U(6)<1> uwAVS_RESPONSE(9,0)<8;4,1> + mov (8) uwDEST_U(7)<1> uwAVS_RESPONSE(9,8)<8;4,1> + + // Move 1st 8x8 words of V to dest GRF + mov (8) uwDEST_V(0)<1> uwAVS_RESPONSE(6,0)<8;4,1> + mov (8) uwDEST_V(1)<1> uwAVS_RESPONSE(6,8)<8;4,1> + mov (8) uwDEST_V(2)<1> uwAVS_RESPONSE(7,0)<8;4,1> + mov (8) uwDEST_V(3)<1> uwAVS_RESPONSE(7,8)<8;4,1> + mov (8) uwDEST_V(4)<1> uwAVS_RESPONSE(10,0)<8;4,1> + mov (8) uwDEST_V(5)<1> uwAVS_RESPONSE(10,8)<8;4,1> + mov (8) uwDEST_V(6)<1> uwAVS_RESPONSE(11,0)<8;4,1> + mov (8) uwDEST_V(7)<1> uwAVS_RESPONSE(11,8)<8;4,1> + + // Move 2nd 8x8 words of Y to dest GRF at higher 8 words of each GRF. + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2,8)<1> uwAVS_RESPONSE_2(%1,0)<8;4,1> + mov (8) uwDEST_Y(%1*2+1,8)<1> uwAVS_RESPONSE_2(%1,8)<8;4,1> + } + + // Move 2st 8x8 words of U to dest GRF (Copy high byte in a word) + mov (8) uwDEST_U(0,8)<1> uwAVS_RESPONSE_2(4,0)<8;4,1> + mov (8) uwDEST_U(1,8)<1> uwAVS_RESPONSE_2(4,8)<8;4,1> + mov (8) uwDEST_U(2,8)<1> uwAVS_RESPONSE_2(5,0)<8;4,1> + mov (8) uwDEST_U(3,8)<1> uwAVS_RESPONSE_2(5,8)<8;4,1> + mov (8) uwDEST_U(4,8)<1> uwAVS_RESPONSE_2(8,0)<8;4,1> + mov (8) uwDEST_U(5,8)<1> uwAVS_RESPONSE_2(8,8)<8;4,1> + mov (8) uwDEST_U(6,8)<1> uwAVS_RESPONSE_2(9,0)<8;4,1> + mov (8) uwDEST_U(7,8)<1> uwAVS_RESPONSE_2(9,8)<8;4,1> + + // Move 2st 8x8 words of V to dest GRF + mov (8) uwDEST_V(0,8)<1> uwAVS_RESPONSE_2(6,0)<8;4,1> + mov (8) uwDEST_V(1,8)<1> uwAVS_RESPONSE_2(6,8)<8;4,1> + mov (8) uwDEST_V(2,8)<1> uwAVS_RESPONSE_2(7,0)<8;4,1> + mov (8) uwDEST_V(3,8)<1> uwAVS_RESPONSE_2(7,8)<8;4,1> + mov (8) uwDEST_V(4,8)<1> uwAVS_RESPONSE_2(10,0)<8;4,1> + mov (8) uwDEST_V(5,8)<1> uwAVS_RESPONSE_2(10,8)<8;4,1> + mov (8) uwDEST_V(6,8)<1> uwAVS_RESPONSE_2(11,0)<8;4,1> + mov (8) uwDEST_V(7,8)<1> uwAVS_RESPONSE_2(11,8)<8;4,1> +*/ +#else + // Move 1st 8x8 words of Y to dest GRF at lower 8 words of each RGF. + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2)<1> ubAVS_RESPONSE(%1,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_Y(%1*2+1)<1> ubAVS_RESPONSE(%1,8+1)<16;4,2> // Copy high byte in a word + } + + // Move 1st 8x8 words of U to dest GRF (Copy high byte in a word) + mov (8) uwDEST_V(0)<1> ubAVS_RESPONSE(4,1)<16;4,2> + mov (8) uwDEST_V(1)<1> ubAVS_RESPONSE(4,8+1)<16;4,2> + mov (8) uwDEST_V(2)<1> ubAVS_RESPONSE(5,1)<16;4,2> + mov (8) uwDEST_V(3)<1> ubAVS_RESPONSE(5,8+1)<16;4,2> + mov (8) uwDEST_V(4)<1> ubAVS_RESPONSE(8,1)<16;4,2> + mov (8) uwDEST_V(5)<1> ubAVS_RESPONSE(8,8+1)<16;4,2> + mov (8) uwDEST_V(6)<1> ubAVS_RESPONSE(9,1)<16;4,2> + mov (8) uwDEST_V(7)<1> ubAVS_RESPONSE(9,8+1)<16;4,2> + + // Move 1st 8x8 words of V to dest GRF + mov (8) uwDEST_U(0)<1> ubAVS_RESPONSE(6,1)<16;4,2> + mov (8) uwDEST_U(1)<1> ubAVS_RESPONSE(6,8+1)<16;4,2> + mov (8) uwDEST_U(2)<1> ubAVS_RESPONSE(7,1)<16;4,2> + mov (8) uwDEST_U(3)<1> ubAVS_RESPONSE(7,8+1)<16;4,2> + mov (8) uwDEST_U(4)<1> ubAVS_RESPONSE(10,1)<16;4,2> + mov (8) uwDEST_U(5)<1> ubAVS_RESPONSE(10,8+1)<16;4,2> + mov (8) uwDEST_U(6)<1> ubAVS_RESPONSE(11,1)<16;4,2> + mov (8) uwDEST_U(7)<1> ubAVS_RESPONSE(11,8+1)<16;4,2> + + // Move 2nd 8x8 words of Y to dest GRF at higher 8 words of each GRF. + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2,8)<1> ubAVS_RESPONSE_2(%1,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_Y(%1*2+1,8)<1> ubAVS_RESPONSE_2(%1,8+1)<16;4,2> // Copy high byte in a word + } + + // Move 2st 8x8 words of U to dest GRF (Copy high byte in a word) + mov (8) uwDEST_V(0,8)<1> ubAVS_RESPONSE_2(4,1)<16;4,2> + mov (8) uwDEST_V(1,8)<1> ubAVS_RESPONSE_2(4,8+1)<16;4,2> + mov (8) uwDEST_V(2,8)<1> ubAVS_RESPONSE_2(5,1)<16;4,2> + mov (8) uwDEST_V(3,8)<1> ubAVS_RESPONSE_2(5,8+1)<16;4,2> + mov (8) uwDEST_V(4,8)<1> ubAVS_RESPONSE_2(8,1)<16;4,2> + mov (8) uwDEST_V(5,8)<1> ubAVS_RESPONSE_2(8,8+1)<16;4,2> + mov (8) uwDEST_V(6,8)<1> ubAVS_RESPONSE_2(9,1)<16;4,2> + mov (8) uwDEST_V(7,8)<1> ubAVS_RESPONSE_2(9,8+1)<16;4,2> + + // Move 2st 8x8 words of V to dest GRF + mov (8) uwDEST_U(0,8)<1> ubAVS_RESPONSE_2(6,1)<16;4,2> + mov (8) uwDEST_U(1,8)<1> ubAVS_RESPONSE_2(6,8+1)<16;4,2> + mov (8) uwDEST_U(2,8)<1> ubAVS_RESPONSE_2(7,1)<16;4,2> + mov (8) uwDEST_U(3,8)<1> ubAVS_RESPONSE_2(7,8+1)<16;4,2> + mov (8) uwDEST_U(4,8)<1> ubAVS_RESPONSE_2(10,1)<16;4,2> + mov (8) uwDEST_U(5,8)<1> ubAVS_RESPONSE_2(10,8+1)<16;4,2> + mov (8) uwDEST_U(6,8)<1> ubAVS_RESPONSE_2(11,1)<16;4,2> + mov (8) uwDEST_U(7,8)<1> ubAVS_RESPONSE_2(11,8+1)<16;4,2> +#endif + + // Re-define new # of lines + #undef nUV_NUM_OF_ROWS + #undef nY_NUM_OF_ROWS + + #define nY_NUM_OF_ROWS 8 + #define nUV_NUM_OF_ROWS 8 + diff --git a/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_Unpack_8x4.asm b/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_Unpack_8x4.asm new file mode 100644 index 00000000..37202f45 --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_Unpack_8x4.asm @@ -0,0 +1,45 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +//---------- PL2_AVS_IEF_8x4.asm ---------- + + // Move first 8x8 words of Y to dest GRF at lower 8 words of each RGF. + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2)<1> ubAVS_RESPONSE(%1,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_Y(%1*2+1)<1> ubAVS_RESPONSE(%1,8+1)<16;4,2> // Copy high byte in a word + } + + // Move 8x4 words of U to dest GRF (Copy high byte in a word) + mov (8) uwDEST_U(0)<1> ubAVS_RESPONSE(4,1)<16;4,2> + mov (8) uwDEST_U(0,8)<1> ubAVS_RESPONSE(5,1)<16;4,2> + mov (8) uwDEST_U(1)<1> ubAVS_RESPONSE(8,1)<16;4,2> + mov (8) uwDEST_U(1,8)<1> ubAVS_RESPONSE(9,1)<16;4,2> + + // Move 8x4 words of V to dest GRF + mov (8) uwDEST_V(0)<1> ubAVS_RESPONSE(6,1)<16;4,2> + mov (8) uwDEST_V(0,8)<1> ubAVS_RESPONSE(7,1)<16;4,2> + mov (8) uwDEST_V(1)<1> ubAVS_RESPONSE(10,1)<16;4,2> + mov (8) uwDEST_V(1,8)<1> ubAVS_RESPONSE(11,1)<16;4,2> + + // Move 2nd 8x8 words of Y to dest GRF at higher 8 words of each GRF. + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2,8)<1> ubAVS_RESPONSE_2(%1,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_Y(%1*2+1,8)<1> ubAVS_RESPONSE_2(%1,8+1)<16;4,2> // Copy high byte in a word + } + +//------------------------------------------------------------------------------ + + // Re-define new # of lines + #undef nUV_NUM_OF_ROWS + #undef nY_NUM_OF_ROWS + + #define nY_NUM_OF_ROWS 8 + #define nUV_NUM_OF_ROWS 4 + diff --git a/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_Unpack_8x8.asm b/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_Unpack_8x8.asm new file mode 100644 index 00000000..ec9f7541 --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_Unpack_8x8.asm @@ -0,0 +1,53 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +//---------- PL2_AVS_IEF_8x8.asm ---------- + + // Move first 8x8 words of Y to dest GRF at lower 8 words of each RGF. + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2)<1> ubAVS_RESPONSE(%1,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_Y(%1*2+1)<1> ubAVS_RESPONSE(%1,8+1)<16;4,2> // Copy high byte in a word + } + + // Move 8x8 words of U to dest GRF (Copy high byte in a word) + mov (8) uwDEST_U(0)<1> ubAVS_RESPONSE(4,1)<16;4,2> + mov (8) uwDEST_U(0,8)<1> ubAVS_RESPONSE(4,8+1)<16;4,2> + mov (8) uwDEST_U(1)<1> ubAVS_RESPONSE(5,1)<16;4,2> + mov (8) uwDEST_U(1,8)<1> ubAVS_RESPONSE(5,8+1)<16;4,2> + mov (8) uwDEST_U(2)<1> ubAVS_RESPONSE(8,1)<16;4,2> + mov (8) uwDEST_U(2,8)<1> ubAVS_RESPONSE(8,8+1)<16;4,2> + mov (8) uwDEST_U(3)<1> ubAVS_RESPONSE(9,1)<16;4,2> + mov (8) uwDEST_U(3,8)<1> ubAVS_RESPONSE(9,8+1)<16;4,2> + + // Move 8x8 words of V to dest GRF + mov (8) uwDEST_V(0)<1> ubAVS_RESPONSE(6,1)<16;4,2> + mov (8) uwDEST_V(0,8)<1> ubAVS_RESPONSE(6,8+1)<16;4,2> + mov (8) uwDEST_V(1)<1> ubAVS_RESPONSE(7,1)<16;4,2> + mov (8) uwDEST_V(1,8)<1> ubAVS_RESPONSE(7,8+1)<16;4,2> + mov (8) uwDEST_V(2)<1> ubAVS_RESPONSE(10,1)<16;4,2> + mov (8) uwDEST_V(2,8)<1> ubAVS_RESPONSE(10,8+1)<16;4,2> + mov (8) uwDEST_V(3)<1> ubAVS_RESPONSE(11,1)<16;4,2> + mov (8) uwDEST_V(3,8)<1> ubAVS_RESPONSE(11,8+1)<16;4,2> + + // Move 2nd 8x8 words of Y to dest GRF at higher 8 words of each GRF. + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2,8)<1> ubAVS_RESPONSE_2(%1,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_Y(%1*2+1,8)<1> ubAVS_RESPONSE_2(%1,8+1)<16;4,2> // Copy high byte in a word + } + +//------------------------------------------------------------------------------ + + // Re-define new # of lines + #undef nUV_NUM_OF_ROWS + #undef nY_NUM_OF_ROWS + + #define nY_NUM_OF_ROWS 8 + #define nUV_NUM_OF_ROWS 8 + diff --git a/src/shaders/post_processing/Core_Kernels/PL2_Scaling.asm b/src/shaders/post_processing/Core_Kernels/PL2_Scaling.asm new file mode 100644 index 00000000..7849afd2 --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/PL2_Scaling.asm @@ -0,0 +1,71 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +//---------- PL2_Scaling.asm ---------- +#include "Scaling.inc" + + // Build 16 elements ramp in float32 and normalized it +// mov (8) SAMPLER_RAMP(0)<1> 0x76543210:v +// add (8) SAMPLER_RAMP(1)<1> SAMPLER_RAMP(0) 8.0:f +mov (4) SAMPLER_RAMP(0)<1> 0x48403000:vf //3, 2, 1, 0 in float vector +mov (4) SAMPLER_RAMP(0,4)<1> 0x5C585450:vf //7, 6, 5, 4 in float vector +add (8) SAMPLER_RAMP(1)<1> SAMPLER_RAMP(0) 8.0:f + +//Module: PrepareScaleCoord.asm + + // Setup for sampler msg hdr + mov (2) rMSGSRC.0<1>:ud 0:ud { NoDDClr } // Unused fields + mov (1) rMSGSRC.2<1>:ud 0:ud { NoDDChk } // Write and offset + + // Calculate 16 v based on the step Y and vertical origin + mov (16) mfMSGPAYLOAD(2)<1> fSRC_VID_V_ORI<0;1,0>:f + mov (16) SCALE_COORD_Y<1>:f fSRC_VID_V_ORI<0;1,0>:f + + // Calculate 16 u based on the step X and hori origin +// line (16) mfMSGPAYLOAD(0)<1> SCALE_STEP_X<0;1,0>:f SAMPLER_RAMP(0) // Assign to mrf directly + mov (16) acc0:f fSRC_VID_H_ORI<0;1,0>:f { Compr } + mac (16) mfMSGPAYLOAD(0)<1> fVIDEO_STEP_X<0;1,0>:f SAMPLER_RAMP(0) { Compr } + + //Setup the constants for line instruction + mov (1) SCALE_LINE_P255<1>:f 255.0:f { NoDDClr } //{ NoDDClr, NoDDChk } + mov (1) SCALE_LINE_P0_5<1>:f 0.5:f { NoDDChk } + +//------------------------------------------------------------------------------ + +$for (0; <nY_NUM_OF_ROWS; 1) { + + // Read 16 sampled pixels and store them in float32 in 8 GRFs in the order of BGRA (VYUA). + mov (8) MSGHDR_SCALE.0:ud rMSGSRC.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (16) SCALE_RESPONSE_YW(0)<1> MSGHDR_SCALE udDUMMY_NULL nSMPL_ENGINE SMPLR_MSG_DSC+nSI_SRC_SIMD16_Y+nBI_CURRENT_SRC_Y + send (16) SCALE_RESPONSE_UW(0)<1> MSGHDR_SCALE udDUMMY_NULL nSMPL_ENGINE SMPLR_MSG_DSC+nSI_SRC_SIMD16_UV+nBI_CURRENT_SRC_UV + + // Calculate 16 v for next line + add (16) mfMSGPAYLOAD(2)<1> SCALE_COORD_Y<8;8,1>:f fVIDEO_STEP_Y<0;1,0>:f // Assign to mrf directly + add (16) SCALE_COORD_Y<1>:f SCALE_COORD_Y<8;8,1>:f fVIDEO_STEP_Y<0;1,0>:f // Assign to mrf directly + + // Scale back to [0, 255], convert f to ud + line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_YF(0) { Compr } // Process B, V + mov (16) SCALE_RESPONSE_YD(0)<1> acc0:f { Compr } + + line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_UF(0) { Compr } // Process B, V + mov (16) SCALE_RESPONSE_UD(0)<1> acc0:f { Compr } + + line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_UF(2) { Compr } // Process B, V + mov (16) SCALE_RESPONSE_UD(2)<1> acc0:f { Compr } + + mov (16) DEST_Y(%1)<1> SCALE_RESPONSE_YB(0) //possible error due to truncation - vK + mov (16) DEST_U(%1)<1> SCALE_RESPONSE_UB(0) //possible error due to truncation - vK + mov (16) DEST_V(%1)<1> SCALE_RESPONSE_UB(2) //possible error due to truncation - vK + +} + + #define nSRC_REGION nREGION_1 + +//------------------------------------------------------------------------------ diff --git a/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_16x8.asm b/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_16x8.asm new file mode 100644 index 00000000..50a050cb --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_16x8.asm @@ -0,0 +1,69 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +//---------- PL3_AVS_IEF_16x8.asm ---------- + +#include "AVS_IEF.inc" + +//------------------------------------------------------------------------------ +// 2 sampler reads for 8x8 Y surface +// 2 sampler read for 8x8 U surface +// 2 sampler read for 8x8 V surface +//------------------------------------------------------------------------------ + + // 1st 8x8 setup + #include "AVS_SetupFirstBlock.asm" + + // 1st 8x8 Y sampling + mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud // Enable green channel + mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y + // Return Y in 4 GRFs + + // 1st 8x8 U sampling + mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_CHANNEL_ONLY:ud // Enable red channel + mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(4)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_U+nBI_CURRENT_SRC_U + // Return U in 4 GRFs + + // 1st 8x8 V sampling + mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_CHANNEL_ONLY:ud // Dummy instruction to avoid back-2-back send instructions + mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(8)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_V+nBI_CURRENT_SRC_V + // Return V in 4 GRFs + + // 2nd 8x8 setup + #include "AVS_SetupSecondBlock.asm" + + // 2nd 8x8 Y sampling + mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud // Enable green channel + mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE_2(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y + // Return Y in 4 GRFs + + // 2nd 8x8 U sampling + mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_CHANNEL_ONLY:ud // Enable red channel + mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE_2(4)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_U+nBI_CURRENT_SRC_U + // Return U in 4 GRFs + + mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_CHANNEL_ONLY:ud // Dummy instruction just in order to avoid back-2-back send instructions! + + // 2nd 8x8 V sampling + mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE_2(8)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_V+nBI_CURRENT_SRC_V + // Return V in 4 GRFs + +//------------------------------------------------------------------------------ +// Unpacking sampler reads to 4:4:4 internal planar +//------------------------------------------------------------------------------ + #include "PL3_AVS_IEF_Unpack_16x8.asm" + + diff --git a/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_8x4.asm b/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_8x4.asm new file mode 100644 index 00000000..35a5dd38 --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_8x4.asm @@ -0,0 +1,60 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +//---------- PL3_AVS_IEF_8x4.asm ---------- + +#include "AVS_IEF.inc" + +//------------------------------------------------------------------------------ +// 2 sampler reads for 8x8 Y surface +// 1 sampler read for 8x8 U surface +// 1 sampler read for 8x8 V surface +//------------------------------------------------------------------------------ + + // 1st 8x8 setup + #include "AVS_SetupFirstBlock.asm" + + // 1st 8x8 Y sampling + mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud // Enable green channel + mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y + // Return Y in 4 GRFs + + // 8x8 U sampling ; Only 8x4 will be used + mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_CHANNEL_ONLY:ud // Enable red channel + mul (1) rAVS_PAYLOAD.1:f fVIDEO_STEP_X:f 2.0:f // Calculate Step X for chroma + mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(4)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_U+nBI_CURRENT_SRC_U + // Return U in 4 GRFs + + // 8x8 V sampling ; Only 8x4 will be used + mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_CHANNEL_ONLY:ud // Dummy instruction just in order to avoid back-2-back send instructions! + mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(8)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_V+nBI_CURRENT_SRC_V + // Return V in 4 GRFs + + // 2nd 8x8 setup + #include "AVS_SetupSecondBlock.asm" + + // 2nd 8x8 Y sampling + mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud // Enable green channel + mov (1) rAVS_PAYLOAD.1:f fVIDEO_STEP_X:f // Restore Step X for luma + mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(12)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y + // Return Y in 4 GRFs + +//------------------------------------------------------------------------------ +// Unpacking sampler reads to 4:2:0 internal planar +//------------------------------------------------------------------------------ + #include "PL3_AVS_IEF_Unpack_8x4.asm" + + + + diff --git a/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_8x8.asm b/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_8x8.asm new file mode 100644 index 00000000..d67ad04d --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_8x8.asm @@ -0,0 +1,60 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +//---------- PL3_AVS_IEF_8x8.asm ---------- + +#include "AVS_IEF.inc" + +//------------------------------------------------------------------------------ +// 2 sampler reads for 8x8 Y surface +// 1 sampler read for 8x8 U surface +// 1 sampler read for 8x8 V surface +//------------------------------------------------------------------------------ + + // 1st 8x8 setup + #include "AVS_SetupFirstBlock.asm" + + // 1st 8x8 Y sampling + mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud // Enable green channel + mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y + // Return Y in 4 GRFs + + // 8x8 U sampling + mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_CHANNEL_ONLY:ud // Enable red channel + mul (1) rAVS_PAYLOAD.1:f fVIDEO_STEP_X:f 2.0:f // Calculate Step X for chroma + mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(4)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_U+nBI_CURRENT_SRC_U + // Return U in 4 GRFs + + // 8x8 V sampling + mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_CHANNEL_ONLY:ud // Dummy instruction just in order to avoid back-2-back send instructions! + mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(8)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_V+nBI_CURRENT_SRC_V + // Return V in 4 GRFs + + // 2nd 8x8 setup + #include "AVS_SetupSecondBlock.asm" + + // 2nd 8x8 Y sampling + mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud // Enable green channel + mov (1) rAVS_PAYLOAD.1:f fVIDEO_STEP_X:f // Restore Step X for luma + mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(12)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y + // Return Y in 4 GRFs + +//------------------------------------------------------------------------------ +// Unpacking sampler reads to 4:2:2 internal planar +//------------------------------------------------------------------------------ + #include "PL3_AVS_IEF_Unpack_8x8.asm" + + + + diff --git a/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_Unpack_16x8.asm b/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_Unpack_16x8.asm new file mode 100644 index 00000000..f88ab899 --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_Unpack_16x8.asm @@ -0,0 +1,240 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +//---------- PL3_AVS_IEF_Unpack_16x8.asm ---------- + +#ifdef AVS_OUTPUT_16_BIT //Output is packed in AVYU format +// Move first 8x8 words of Y to dest GRF (as packed) + mov (4) uwDEST_Y(0,1)<4> uwAVS_RESPONSE(0,0)<4;4,1> + mov (4) uwDEST_Y(1,1)<4> uwAVS_RESPONSE(0,8)<4;4,1> + mov (4) uwDEST_Y(4,1)<4> uwAVS_RESPONSE(0,4)<4;4,1> + mov (4) uwDEST_Y(5,1)<4> uwAVS_RESPONSE(0,12)<4;4,1> + mov (4) uwDEST_Y(8,1)<4> uwAVS_RESPONSE(1,0)<4;4,1> + mov (4) uwDEST_Y(9,1)<4> uwAVS_RESPONSE(1,8)<4;4,1> + mov (4) uwDEST_Y(12,1)<4> uwAVS_RESPONSE(1,4)<4;4,1> + mov (4) uwDEST_Y(13,1)<4> uwAVS_RESPONSE(1,12)<4;4,1> + mov (4) uwDEST_Y(16,1)<4> uwAVS_RESPONSE(2,0)<4;4,1> + mov (4) uwDEST_Y(17,1)<4> uwAVS_RESPONSE(2,8)<4;4,1> + mov (4) uwDEST_Y(20,1)<4> uwAVS_RESPONSE(2,4)<4;4,1> + mov (4) uwDEST_Y(21,1)<4> uwAVS_RESPONSE(2,12)<4;4,1> + mov (4) uwDEST_Y(24,1)<4> uwAVS_RESPONSE(3,0)<4;4,1> + mov (4) uwDEST_Y(25,1)<4> uwAVS_RESPONSE(3,8)<4;4,1> + mov (4) uwDEST_Y(28,1)<4> uwAVS_RESPONSE(3,4)<4;4,1> + mov (4) uwDEST_Y(29,1)<4> uwAVS_RESPONSE(3,12)<4;4,1> + +// Move first 8x8 words of U to dest GRF (as packed) + mov (4) uwDEST_Y(0,0)<4> uwAVS_RESPONSE(4,0)<4;4,1> + mov (4) uwDEST_Y(1,0)<4> uwAVS_RESPONSE(4,8)<4;4,1> + mov (4) uwDEST_Y(4,0)<4> uwAVS_RESPONSE(4,4)<4;4,1> + mov (4) uwDEST_Y(5,0)<4> uwAVS_RESPONSE(4,12)<4;4,1> + mov (4) uwDEST_Y(8,0)<4> uwAVS_RESPONSE(5,0)<4;4,1> + mov (4) uwDEST_Y(9,0)<4> uwAVS_RESPONSE(5,8)<4;4,1> + mov (4) uwDEST_Y(12,0)<4> uwAVS_RESPONSE(5,4)<4;4,1> + mov (4) uwDEST_Y(13,0)<4> uwAVS_RESPONSE(5,12)<4;4,1> + mov (4) uwDEST_Y(16,0)<4> uwAVS_RESPONSE(6,0)<4;4,1> + mov (4) uwDEST_Y(17,0)<4> uwAVS_RESPONSE(6,8)<4;4,1> + mov (4) uwDEST_Y(20,0)<4> uwAVS_RESPONSE(6,4)<4;4,1> + mov (4) uwDEST_Y(21,0)<4> uwAVS_RESPONSE(6,12)<4;4,1> + mov (4) uwDEST_Y(24,0)<4> uwAVS_RESPONSE(7,0)<4;4,1> + mov (4) uwDEST_Y(25,0)<4> uwAVS_RESPONSE(7,8)<4;4,1> + mov (4) uwDEST_Y(28,0)<4> uwAVS_RESPONSE(7,4)<4;4,1> + mov (4) uwDEST_Y(29,0)<4> uwAVS_RESPONSE(7,12)<4;4,1> + +// Move first 8x8 words of V to dest GRF (as packed) + mov (4) uwDEST_Y(0,2)<4> uwAVS_RESPONSE(8,0)<4;4,1> + mov (4) uwDEST_Y(1,2)<4> uwAVS_RESPONSE(8,8)<4;4,1> + mov (4) uwDEST_Y(4,2)<4> uwAVS_RESPONSE(8,4)<4;4,1> + mov (4) uwDEST_Y(5,2)<4> uwAVS_RESPONSE(8,12)<4;4,1> + mov (4) uwDEST_Y(8,2)<4> uwAVS_RESPONSE(9,0)<4;4,1> + mov (4) uwDEST_Y(9,2)<4> uwAVS_RESPONSE(9,8)<4;4,1> + mov (4) uwDEST_Y(12,2)<4> uwAVS_RESPONSE(9,4)<4;4,1> + mov (4) uwDEST_Y(13,2)<4> uwAVS_RESPONSE(9,12)<4;4,1> + mov (4) uwDEST_Y(16,2)<4> uwAVS_RESPONSE(10,0)<4;4,1> + mov (4) uwDEST_Y(17,2)<4> uwAVS_RESPONSE(10,8)<4;4,1> + mov (4) uwDEST_Y(20,2)<4> uwAVS_RESPONSE(10,4)<4;4,1> + mov (4) uwDEST_Y(21,2)<4> uwAVS_RESPONSE(10,12)<4;4,1> + mov (4) uwDEST_Y(24,2)<4> uwAVS_RESPONSE(11,0)<4;4,1> + mov (4) uwDEST_Y(25,2)<4> uwAVS_RESPONSE(11,8)<4;4,1> + mov (4) uwDEST_Y(28,2)<4> uwAVS_RESPONSE(11,4)<4;4,1> + mov (4) uwDEST_Y(29,2)<4> uwAVS_RESPONSE(11,12)<4;4,1> + +// Move first 8x8 words of A to dest GRF (as packed) + mov (4) uwDEST_Y(0,3)<4> 0:uw + mov (4) uwDEST_Y(1,3)<4> 0:uw + mov (4) uwDEST_Y(4,3)<4> 0:uw + mov (4) uwDEST_Y(5,3)<4> 0:uw + mov (4) uwDEST_Y(8,3)<4> 0:uw + mov (4) uwDEST_Y(9,3)<4> 0:uw + mov (4) uwDEST_Y(12,3)<4> 0:uw + mov (4) uwDEST_Y(13,3)<4> 0:uw + mov (4) uwDEST_Y(16,3)<4> 0:uw + mov (4) uwDEST_Y(17,3)<4> 0:uw + mov (4) uwDEST_Y(20,3)<4> 0:uw + mov (4) uwDEST_Y(21,3)<4> 0:uw + mov (4) uwDEST_Y(24,3)<4> 0:uw + mov (4) uwDEST_Y(25,3)<4> 0:uw + mov (4) uwDEST_Y(28,3)<4> 0:uw + mov (4) uwDEST_Y(29,3)<4> 0:uw + +// Move second 8x8 words of Y to dest GRF + mov (4) uwDEST_Y(2,1)<4> uwAVS_RESPONSE_2(0,0)<4;4,1> + mov (4) uwDEST_Y(3,1)<4> uwAVS_RESPONSE_2(0,8)<4;4,1> + mov (4) uwDEST_Y(6,1)<4> uwAVS_RESPONSE_2(0,4)<4;4,1> + mov (4) uwDEST_Y(7,1)<4> uwAVS_RESPONSE_2(0,12)<4;4,1> + mov (4) uwDEST_Y(10,1)<4> uwAVS_RESPONSE_2(1,0)<4;4,1> + mov (4) uwDEST_Y(11,1)<4> uwAVS_RESPONSE_2(1,8)<4;4,1> + mov (4) uwDEST_Y(14,1)<4> uwAVS_RESPONSE_2(1,4)<4;4,1> + mov (4) uwDEST_Y(15,1)<4> uwAVS_RESPONSE_2(1,12)<4;4,1> + mov (4) uwDEST_Y(18,1)<4> uwAVS_RESPONSE_2(2,0)<4;4,1> + mov (4) uwDEST_Y(19,1)<4> uwAVS_RESPONSE_2(2,8)<4;4,1> + mov (4) uwDEST_Y(22,1)<4> uwAVS_RESPONSE_2(2,4)<4;4,1> + mov (4) uwDEST_Y(23,1)<4> uwAVS_RESPONSE_2(2,12)<4;4,1> + mov (4) uwDEST_Y(26,1)<4> uwAVS_RESPONSE_2(3,0)<4;4,1> + mov (4) uwDEST_Y(27,1)<4> uwAVS_RESPONSE_2(3,8)<4;4,1> + mov (4) uwDEST_Y(30,1)<4> uwAVS_RESPONSE_2(3,4)<4;4,1> + mov (4) uwDEST_Y(31,1)<4> uwAVS_RESPONSE_2(3,12)<4;4,1> + +// Move second 8x8 words of U to dest GRF + mov (4) uwDEST_Y(2,0)<4> uwAVS_RESPONSE_2(4,0)<4;4,1> + mov (4) uwDEST_Y(3,0)<4> uwAVS_RESPONSE_2(4,8)<4;4,1> + mov (4) uwDEST_Y(6,0)<4> uwAVS_RESPONSE_2(4,4)<4;4,1> + mov (4) uwDEST_Y(7,0)<4> uwAVS_RESPONSE_2(4,12)<4;4,1> + mov (4) uwDEST_Y(10,0)<4> uwAVS_RESPONSE_2(5,0)<4;4,1> + mov (4) uwDEST_Y(11,0)<4> uwAVS_RESPONSE_2(5,8)<4;4,1> + mov (4) uwDEST_Y(14,0)<4> uwAVS_RESPONSE_2(5,4)<4;4,1> + mov (4) uwDEST_Y(15,0)<4> uwAVS_RESPONSE_2(5,12)<4;4,1> + mov (4) uwDEST_Y(18,0)<4> uwAVS_RESPONSE_2(6,0)<4;4,1> + mov (4) uwDEST_Y(19,0)<4> uwAVS_RESPONSE_2(6,8)<4;4,1> + mov (4) uwDEST_Y(22,0)<4> uwAVS_RESPONSE_2(6,4)<4;4,1> + mov (4) uwDEST_Y(23,0)<4> uwAVS_RESPONSE_2(6,12)<4;4,1> + mov (4) uwDEST_Y(26,0)<4> uwAVS_RESPONSE_2(7,0)<4;4,1> + mov (4) uwDEST_Y(27,0)<4> uwAVS_RESPONSE_2(7,8)<4;4,1> + mov (4) uwDEST_Y(30,0)<4> uwAVS_RESPONSE_2(7,4)<4;4,1> + mov (4) uwDEST_Y(31,0)<4> uwAVS_RESPONSE_2(7,12)<4;4,1> + +// Move second 8x8 words of V to dest GRF + mov (4) uwDEST_Y(2,2)<4> uwAVS_RESPONSE_2(8,0)<4;4,1> + mov (4) uwDEST_Y(3,2)<4> uwAVS_RESPONSE_2(8,8)<4;4,1> + mov (4) uwDEST_Y(6,2)<4> uwAVS_RESPONSE_2(8,4)<4;4,1> + mov (4) uwDEST_Y(7,2)<4> uwAVS_RESPONSE_2(8,12)<4;4,1> + mov (4) uwDEST_Y(10,2)<4> uwAVS_RESPONSE_2(9,0)<4;4,1> + mov (4) uwDEST_Y(11,2)<4> uwAVS_RESPONSE_2(9,8)<4;4,1> + mov (4) uwDEST_Y(14,2)<4> uwAVS_RESPONSE_2(9,4)<4;4,1> + mov (4) uwDEST_Y(15,2)<4> uwAVS_RESPONSE_2(9,12)<4;4,1> + mov (4) uwDEST_Y(18,2)<4> uwAVS_RESPONSE_2(10,0)<4;4,1> + mov (4) uwDEST_Y(19,2)<4> uwAVS_RESPONSE_2(10,8)<4;4,1> + mov (4) uwDEST_Y(22,2)<4> uwAVS_RESPONSE_2(10,4)<4;4,1> + mov (4) uwDEST_Y(23,2)<4> uwAVS_RESPONSE_2(10,12)<4;4,1> + mov (4) uwDEST_Y(26,2)<4> uwAVS_RESPONSE_2(11,0)<4;4,1> + mov (4) uwDEST_Y(27,2)<4> uwAVS_RESPONSE_2(11,8)<4;4,1> + mov (4) uwDEST_Y(30,2)<4> uwAVS_RESPONSE_2(11,4)<4;4,1> + mov (4) uwDEST_Y(31,2)<4> uwAVS_RESPONSE_2(11,12)<4;4,1> + +// Move second 8x8 words of A to dest GRF + mov (4) uwDEST_Y(2,3)<4> 0:uw + mov (4) uwDEST_Y(3,3)<4> 0:uw + mov (4) uwDEST_Y(6,3)<4> 0:uw + mov (4) uwDEST_Y(7,3)<4> 0:uw + mov (4) uwDEST_Y(10,3)<4> 0:uw + mov (4) uwDEST_Y(11,3)<4> 0:uw + mov (4) uwDEST_Y(14,3)<4> 0:uw + mov (4) uwDEST_Y(15,3)<4> 0:uw + mov (4) uwDEST_Y(18,3)<4> 0:uw + mov (4) uwDEST_Y(19,3)<4> 0:uw + mov (4) uwDEST_Y(22,3)<4> 0:uw + mov (4) uwDEST_Y(23,3)<4> 0:uw + mov (4) uwDEST_Y(26,3)<4> 0:uw + mov (4) uwDEST_Y(27,3)<4> 0:uw + mov (4) uwDEST_Y(30,3)<4> 0:uw + mov (4) uwDEST_Y(31,3)<4> 0:uw + +/* This section will be used if 16-bit output is needed in planar format -vK + // Move 1st 8x8 words of Y to dest GRF at lower 8 words of each RGF. + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2)<1> uwAVS_RESPONSE(%1)<8;4,1> + mov (8) uwDEST_Y(%1*2+1)<1> uwAVS_RESPONSE(%1,8)<8;4,1> + } + + // Move 8x8 words of U to dest GRF + $for(0; <8/2; 1) { + mov (8) uwDEST_U(%1*2)<1> uwAVS_RESPONSE(%1+4)<8;4,1> + mov (8) uwDEST_U(%1*2+1)<1> uwAVS_RESPONSE(%1+4,8)<8;4,1> + } + + // Move 8x8 words of V to dest GRF + $for(0; <8/2; 1) { + mov (8) uwDEST_V(%1*2)<1> uwAVS_RESPONSE(%1+8)<8;4,1> + mov (8) uwDEST_V(%1*2+1)<1> uwAVS_RESPONSE(%1+8,8)<8;4,1> + } + + // Move 2nd 8x8 words of Y to dest GRF + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2,8)<1> uwAVS_RESPONSE_2(%1)<8;4,1> + mov (8) uwDEST_Y(%1*2+1,8)<1> uwAVS_RESPONSE_2(%1,8)<8;4,1> + } + + // Move 2nd 8x8 words of U to dest GRF + $for(0; <8/2; 1) { + mov (8) uwDEST_U(%1*2,8)<1> uwAVS_RESPONSE_2(%1+4)<8;4,1> + mov (8) uwDEST_U(%1*2+1,8)<1> uwAVS_RESPONSE_2(%1+4,8)<8;4,1> + } + + // Move 2nd 8x8 words of V to dest GRF + $for(0; <8/2; 1) { + mov (8) uwDEST_V(%1*2,8)<1> uwAVS_RESPONSE_2(%1+8)<8;4,1> + mov (8) uwDEST_V(%1*2+1,8)<1> uwAVS_RESPONSE_2(%1+8,8)<8;4,1> + } +*/ +#else /* OUTPUT_8_BIT */ + // Move 1st 8x8 words of Y to dest GRF at lower 8 words of each RGF. + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2)<1> ubAVS_RESPONSE(%1,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_Y(%1*2+1)<1> ubAVS_RESPONSE(%1,8+1)<16;4,2> // Copy high byte in a word + } + + // Move 8x8 words of U to dest GRF + $for(0; <8/2; 1) { + mov (8) uwDEST_U(%1*2)<1> ubAVS_RESPONSE(%1+4,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_U(%1*2+1)<1> ubAVS_RESPONSE(%1+4,8+1)<16;4,2> // Copy high byte in a word + } + + // Move 8x8 words of V to dest GRF + $for(0; <8/2; 1) { + mov (8) uwDEST_V(%1*2)<1> ubAVS_RESPONSE(%1+8,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_V(%1*2+1)<1> ubAVS_RESPONSE(%1+8,8+1)<16;4,2> // Copy high byte in a word + } + + // Move 2nd 8x8 words of Y to dest GRF at higher 8 words of each RGF. + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2,8)<1> ubAVS_RESPONSE_2(%1,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_Y(%1*2+1,8)<1> ubAVS_RESPONSE_2(%1,8+1)<16;4,2> // Copy high byte in a word + } + + // Move 2nd 8x8 words of U to dest GRF + $for(0; <8/2; 1) { + mov (8) uwDEST_U(%1*2,8)<1> ubAVS_RESPONSE_2(%1+4,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_U(%1*2+1,8)<1> ubAVS_RESPONSE_2(%1+4,8+1)<16;4,2> // Copy high byte in a word + } + + // Move 2nd 8x8 words of V to dest GRF + $for(0; <8/2; 1) { + mov (8) uwDEST_V(%1*2,8)<1> ubAVS_RESPONSE_2(%1+8,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_V(%1*2+1,8)<1> ubAVS_RESPONSE_2(%1+8,8+1)<16;4,2> // Copy high byte in a word + } +#endif +//------------------------------------------------------------------------------ + // Re-define new # of lines + #undef nUV_NUM_OF_ROWS + #undef nY_NUM_OF_ROWS + + #define nY_NUM_OF_ROWS 8 + #define nUV_NUM_OF_ROWS 8 + + diff --git a/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_Unpack_8x4.asm b/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_Unpack_8x4.asm new file mode 100644 index 00000000..53586e64 --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_Unpack_8x4.asm @@ -0,0 +1,45 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +//---------- PL3_AVS_IEF_Unpack_8x4.asm ---------- + + // Move 1st 8x8 words of Y to dest GRF at lower 8 words of each RGF. + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2)<1> ubAVS_RESPONSE(%1,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_Y(%1*2+1)<1> ubAVS_RESPONSE(%1,8+1)<16;4,2> // Copy high byte in a word + } + + // Move 8x4 words of U to dest GRF (Copy high byte in a word) + mov (8) uwDEST_U(0)<1> ubAVS_RESPONSE(4,1)<16;4,2> + mov (8) uwDEST_U(0,8)<1> ubAVS_RESPONSE(4,9)<16;4,2> + mov (8) uwDEST_U(1)<1> ubAVS_RESPONSE(5,1)<16;4,2> + mov (8) uwDEST_U(1,8)<1> ubAVS_RESPONSE(5,9)<16;4,2> + + // Move 8x4 words of V to dest GRF + mov (8) uwDEST_V(0)<1> ubAVS_RESPONSE(8,1)<16;4,2> + mov (8) uwDEST_V(0,8)<1> ubAVS_RESPONSE(8,9)<16;4,2> + mov (8) uwDEST_V(1)<1> ubAVS_RESPONSE(9,1)<16;4,2> + mov (8) uwDEST_V(1,8)<1> ubAVS_RESPONSE(9,9)<16;4,2> + + // Move 2nd 8x8 words of Y to dest GRF at higher 8 words of each RGF. + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2,8)<1> ubAVS_RESPONSE(%1+12,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_Y(%1*2+1,8)<1> ubAVS_RESPONSE(%1+12,8+1)<16;4,2> // Copy high byte in a word + } + +//------------------------------------------------------------------------------ + // Re-define new # of lines + #undef nUV_NUM_OF_ROWS + #undef nY_NUM_OF_ROWS + + #define nY_NUM_OF_ROWS 8 + #define nUV_NUM_OF_ROWS 4 + + diff --git a/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_Unpack_8x8.asm b/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_Unpack_8x8.asm new file mode 100644 index 00000000..f16d04a6 --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_Unpack_8x8.asm @@ -0,0 +1,44 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +//---------- PL3_AVS_IEF_Unpack_8x8.asm ---------- + + // Move 1st 8x8 words of Y to dest GRF at lower 8 words of each RGF. + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2)<1> ubAVS_RESPONSE(%1,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_Y(%1*2+1)<1> ubAVS_RESPONSE(%1,8+1)<16;4,2> // Copy high byte in a word + } + // Move 8x8 words of U to dest GRF + $for(0; <8/2; 1) { + mov (8) uwDEST_U(%1)<1> ubAVS_RESPONSE(%1+4,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_U(%1,8)<1> ubAVS_RESPONSE(%1+4,8+1)<16;4,2> // Copy high byte in a word + } + + // Move 8x8 words of V to dest GRF + $for(0; <8/2; 1) { + mov (8) uwDEST_V(%1)<1> ubAVS_RESPONSE(%1+8,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_V(%1,8)<1> ubAVS_RESPONSE(%1+8,8+1)<16;4,2> // Copy high byte in a word + } + + // Move 2nd 8x8 words of Y to dest GRF at higher 8 words of each RGF. + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2,8)<1> ubAVS_RESPONSE(%1+12,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_Y(%1*2+1,8)<1> ubAVS_RESPONSE(%1+12,8+1)<16;4,2> // Copy high byte in a word + } + +//------------------------------------------------------------------------------ + // Re-define new # of lines + #undef nUV_NUM_OF_ROWS + #undef nY_NUM_OF_ROWS + + #define nY_NUM_OF_ROWS 8 + #define nUV_NUM_OF_ROWS 8 + + diff --git a/src/shaders/post_processing/Core_Kernels/PL3_Scaling.asm b/src/shaders/post_processing/Core_Kernels/PL3_Scaling.asm new file mode 100644 index 00000000..3d5c6890 --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/PL3_Scaling.asm @@ -0,0 +1,72 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +//---------- PL3_Scaling.asm ---------- +#include "Scaling.inc" + + // Build 16 elements ramp in float32 and normalized it +// mov (8) SAMPLER_RAMP(0)<1> 0x76543210:v +// add (8) SAMPLER_RAMP(1)<1> SAMPLER_RAMP(0) 8.0:f +mov (4) SAMPLER_RAMP(0)<1> 0x48403000:vf { NoDDClr }//3, 2, 1, 0 in float vector +mov (4) SAMPLER_RAMP(0,4)<1> 0x5C585450:vf { NoDDChk }//7, 6, 5, 4 in float vector +add (8) SAMPLER_RAMP(1)<1> SAMPLER_RAMP(0) 8.0:f + + +//Module: PrepareScaleCoord.asm + + // Setup for sampler msg hdr + mov (2) rMSGSRC.0<1>:ud 0:ud { NoDDClr } // Unused fields + mov (1) rMSGSRC.2<1>:ud 0:ud { NoDDChk } // Write and offset + + // Calculate 16 v based on the step Y and vertical origin + mov (16) mfMSGPAYLOAD(2)<1> fSRC_VID_V_ORI<0;1,0>:f + mov (16) SCALE_COORD_Y<1>:f fSRC_VID_V_ORI<0;1,0>:f + + // Calculate 16 u based on the step X and hori origin +// line (16) mfMSGPAYLOAD(0)<1> SCALE_STEP_X<0;1,0>:f SAMPLER_RAMP(0) // Assign to mrf directly + mov (16) acc0:f fSRC_VID_H_ORI<0;1,0>:f { Compr } + mac (16) mfMSGPAYLOAD(0)<1> fVIDEO_STEP_X<0;1,0>:f SAMPLER_RAMP(0) { Compr } + + //Setup the constants for line instruction + mov (1) SCALE_LINE_P255<1>:f 255.0:f { NoDDClr } //{ NoDDClr, NoDDChk } + mov (1) SCALE_LINE_P0_5<1>:f 0.5:f { NoDDChk } + +//------------------------------------------------------------------------------ + +$for (0; <nY_NUM_OF_ROWS; 1) { + // Read 16 sampled pixels and store them in float32 in 8 GRFs in the order of BGRA (VYUA). + mov (8) MSGHDR_SCALE<1>:ud rMSGSRC<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (16) SCALE_RESPONSE_VW(0)<1> MSGHDR_SCALE udDUMMY_NULL nSMPL_ENGINE SMPLR_MSG_DSC+nSI_SRC_SIMD16_V+nBI_CURRENT_SRC_V + send (16) SCALE_RESPONSE_YW(0)<1> MSGHDR_SCALE udDUMMY_NULL nSMPL_ENGINE SMPLR_MSG_DSC+nSI_SRC_SIMD16_Y+nBI_CURRENT_SRC_Y + send (16) SCALE_RESPONSE_UW(0)<1> MSGHDR_SCALE udDUMMY_NULL nSMPL_ENGINE SMPLR_MSG_DSC+nSI_SRC_SIMD16_U+nBI_CURRENT_SRC_U + + // Calculate 16 v for next line + add (16) mfMSGPAYLOAD(2)<1> SCALE_COORD_Y<8;8,1>:f fVIDEO_STEP_Y<0;1,0>:f // Assign to mrf directly + add (16) SCALE_COORD_Y<1>:f SCALE_COORD_Y<8;8,1>:f fVIDEO_STEP_Y<0;1,0>:f // Assign to mrf directly + + // Scale back to [0, 255], convert f to ud + line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_VF(0) { Compr } // Process B, V + mov (16) SCALE_RESPONSE_VD(0)<1> acc0:f { Compr } + + line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_YF(0) { Compr } // Process B, V + mov (16) SCALE_RESPONSE_YD(0)<1> acc0:f { Compr } + + line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_UF(0) { Compr } // Process B, V + mov (16) SCALE_RESPONSE_UD(0)<1> acc0:f { Compr } + + mov (16) DEST_V(%1)<1> SCALE_RESPONSE_VB(0) //possible error due to truncation - vK + mov (16) DEST_Y(%1)<1> SCALE_RESPONSE_YB(0) //possible error due to truncation - vK + mov (16) DEST_U(%1)<1> SCALE_RESPONSE_UB(0) //possible error due to truncation - vK + +} + + #define nSRC_REGION nREGION_1 + +//------------------------------------------------------------------------------ diff --git a/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG.asm b/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG.asm new file mode 100644 index 00000000..e6d8fb2d --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG.asm @@ -0,0 +1,85 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +#define DI_ENABLE + + #include "DNDI.inc" + + #ifdef DI_ONLY + #undef nSMPL_RESP_LEN + #define nSMPL_RESP_LEN nSMPL_RESP_LEN_DI // set the number of GRF + #else + #undef nSMPL_RESP_LEN + #define nSMPL_RESP_LEN nSMPL_RESP_LEN_DNDI // set the number of GRF + #endif + + #undef nDPW_BLOCK_SIZE_HIST + #define nDPW_BLOCK_SIZE_HIST nBLOCK_WIDTH_4+nBLOCK_HEIGHT_1 // HIST Block Size for Write is 4x2 + #undef nDPW_BLOCK_SIZE_DN + #define nDPW_BLOCK_SIZE_DN nBLOCK_WIDTH_16+nBLOCK_HEIGHT_4 // DN Block Size for Write is 16x4 + +////////////////////////////////////// Run the DN Algorithm /////////////////////////////////////// + #include "DNDI_Command.asm" + +////////////////////////////////////// Rearrange for Internal Planar ////////////////////////////// + +////////////////////////////////////// Save the STMM Data for Next Run ///////////////////////// + // Write STMM to memory + shr (1) rMSGSRC.0<1>:ud wORIX<0;1,0>:w 1:w NODDCLR_NODDCHK // X origin / 2 + mov (1) rMSGSRC.1<1>:ud wORIY<0;1,0>:w NODDCLR_NODDCHK // Y origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_STMM:ud NODDCHK // block width and height (8x4) + mov (8) mudMSGHDR_STMM(0)<1> rMSGSRC.0<8;8,1>:ud // message header + mov (8) mudMSGHDR_STMM(1)<1> udRESP(nDI_STMM_OFFSET,0) // Move STMM to MRF + send (8) dNULLREG mMSGHDR_STMM udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_STMM+nBI_STMM_HISTORY_OUTPUT:ud + +#ifdef DI_ONLY +#else + +////////////////////////////////////// Save the History Data for Next Run ///////////////////////// + #include "DI_Hist_Save.asm" + +////////////////////////////////////// Save the DN Curr Frame for Next Run //////////////////////// + + //set the save DN parameters + mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w NODDCLR // X origin and Y origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DN:ud NODDCLR_NODDCHK // block width and height (16x4) + mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud + + // check top/bottom field first + cmp.e.f0.0 (1) null<1>:w ubTFLD_FIRST<0;1,0>:ub 1:w + (f0.0) jmpi (1) TOP_FIELD_FIRST + +BOTTOM_FIELD_FIRST: + $for (0,0; <nY_NUM_OF_ROWS/2; 2,1) { + mov (4) mudMSGHDR_DN(1,%1*4)<1> udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 2nd field luma from current frame (line 0,2) + } + $for (0,0; <nY_NUM_OF_ROWS/2; 2,1) { + mov (4) mudMSGHDR_DN(1,%1*4+4)<1> udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,4)<4;4,1> // 1st field luma from current frame (line 1,3) + } + + jmpi (1) SAVE_DN_CURR + +TOP_FIELD_FIRST: + $for (0,0; <nY_NUM_OF_ROWS/2; 2,1) { + mov (4) mudMSGHDR_DN(1,%1*4)<1> udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,0)<4;4,1> // 2nd field luma from current frame (line 0,2) + } + $for (0,0; <nY_NUM_OF_ROWS/2; 2,1) { + mov (4) mudMSGHDR_DN(1,%1*4+4)<1> udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 1st field luma from current frame (line 1,3) + } + +SAVE_DN_CURR: + send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_PL_DN_DI+nBI_DESTINATION_Y:ud +#endif + +// Save Processed frames +#include "DI_Save_PA.asm" + + + diff --git a/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG_UVCopy_NV11.asm b/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG_UVCopy_NV11.asm new file mode 100644 index 00000000..96aed789 --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG_UVCopy_NV11.asm @@ -0,0 +1,103 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +#define DI_ENABLE + + #include "DNDI.inc" + + #undef nY_NUM_OF_ROWS + #define nY_NUM_OF_ROWS 8 // Number of Y rows per block (4 rows for each frame) + #undef nUV_NUM_OF_ROWS + #define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block + + #undef nSMPL_RESP_LEN + #define nSMPL_RESP_LEN nSMPL_RESP_LEN_DNDI // set the number of GRF + #undef nDPW_BLOCK_SIZE_HIST + #define nDPW_BLOCK_SIZE_HIST nBLOCK_WIDTH_4+nBLOCK_HEIGHT_1 // HIST Block Size for Write is 4x2 + #undef nDPW_BLOCK_SIZE_DN + #define nDPW_BLOCK_SIZE_DN nBLOCK_WIDTH_16+nBLOCK_HEIGHT_4 // DN Block Size for Write is 16x4 + #undef nDPR_BLOCK_SIZE_UV + #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_8+nBLOCK_HEIGHT_4 // DN Block Size for UV Write/Read is 8x4 + +////////////////////////////////////// Run the DN Algorithm /////////////////////////////////////// + #include "DNDI_Command.asm" + +////////////////////////////////////// Rearrange for Internal Planar ////////////////////////////// + // move the previous frame Y component to internal planar format + $for (0; <nY_NUM_OF_ROWS/2; 1) { + mov (16) uwDEST_Y(%1,0)<1> ubRESP(nDI_PREV_FRAME_LUMA_OFFSET,%1*16) + } + // move the previous frame U,V components to internal planar format + $for (0; <nUV_NUM_OF_ROWS/2; 1) { + mov (8) uwDEST_U(0,%1*8)<1> ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels + mov (8) uwDEST_V(0,%1*8)<1> ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //V pixels + } + // move the current frame Y component to internal planar format + $for (0; <nY_NUM_OF_ROWS/2; 1) { + mov (16) uwDEST_Y(%1+4,0)<1> ubRESP(nDI_CURR_FRAME_LUMA_OFFSET,%1*16) + } + // move the current frame U,V components to internal planar format + $for (0; <nUV_NUM_OF_ROWS/2; 1) { + mov (8) uwDEST_U(2,%1*8)<1> ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels + mov (8) uwDEST_V(2,%1*8)<1> ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //V pixels + } + +////////////////////////////////////// Save the STMM Data for Next Run ///////////////////////// + // Write STMM to memory + shr (1) rMSGSRC.0<1>:ud wORIX<0;1,0>:w 1:w // X origin / 2 + mov (1) rMSGSRC.1<1>:ud wORIY<0;1,0>:w // Y origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_STMM:ud // block width and height (8x4) + mov (8) mudMSGHDR_STMM(0)<1> rMSGSRC.0<8;8,1>:ud // message header + mov (8) mudMSGHDR_STMM(1)<1> udRESP(nDI_STMM_OFFSET,0) // Move STMM to MRF + send (8) dNULLREG mMSGHDR_STMM udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_STMM+nBI_STMM_HISTORY_OUTPUT:ud + +////////////////////////////////////// Save the History Data for Next Run ///////////////////////// + #include "DI_Hist_Save.asm" + +////////////////////////////////////// Save the DN Curr Frame for Next Run //////////////////////// + add (4) pCF_Y_OFFSET<1>:uw ubSRC_CF_OFFSET<4;4,1>:ub npDN_YUV:w + // check top/bottom field first + cmp.e.f0.0 (1) null<1>:w ubTFLD_FIRST<0;1,0>:ub 1:w + (f0.0) jmpi (1) TOP_FIELD_FIRST + +BOTTOM_FIELD_FIRST: + $for (0,0; <nY_NUM_OF_ROWS/2; 2,1) { + mov (4) mudMSGHDR_DN(1,%1*4)<1> udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 2nd field luma from current frame (line 0,2) + mov (4) mudMSGHDR_DN(1,%1*4+4)<1> udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,4)<4;4,1> // 1st field luma from current frame (line 1,3) + } + jmpi (1) SAVE_DN_CURR + +TOP_FIELD_FIRST: + $for (0,0; <nY_NUM_OF_ROWS/2; 2,1) { + mov (4) mudMSGHDR_DN(1,%1*4)<1> udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,0)<4;4,1> // 2nd field luma from current frame (line 0,2) + mov (4) mudMSGHDR_DN(1,%1*4+4)<1> udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 1st field luma from current frame (line 1,3) + } +SAVE_DN_CURR: + mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w // X origin and Y origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DN:ud // block width and height (16x4) + mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud + send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_PL_DN_DI+nBI_DESTINATION_Y:ud + + +/////////////////////////////P208 UV Copy 422///////////////////////////////////////////////////// + //Read UV through DATAPORT + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin + asr (1) rMSGSRC.0<1>:d rMSGSRC.0<0;1,0>:d 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (16x2) + mov (8) mudMSGHDR_DN<1> rMSGSRC<8;8,1>:ud + send (8) udBOT_U_IO(0)<1> mMSGHDR_DN udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nRESLEN_1+nBI_CURRENT_SRC_UV:ud + + //Write UV through DATAPORT + mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w // X origin and Y origin + asr (1) rMSGSRC.0<1>:d rMSGSRC.0<0;1,0>:d 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // block width and height (16x2) + mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud + mov (8) mudMSGHDR_DN(1)<1> udBOT_U_IO(0)<8;8,1> + send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nMSGLEN_1+nBI_DESTINATION_UV:ud
\ No newline at end of file diff --git a/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG_UVCopy_NV12.asm b/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG_UVCopy_NV12.asm new file mode 100644 index 00000000..69330baf --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG_UVCopy_NV12.asm @@ -0,0 +1,103 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +#define DI_ENABLE + + #include "DNDI.inc" + + #undef nY_NUM_OF_ROWS + #define nY_NUM_OF_ROWS 8 // Number of Y rows per block (4 rows for each frame) + #undef nUV_NUM_OF_ROWS + #define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block + + #undef nSMPL_RESP_LEN + #define nSMPL_RESP_LEN nSMPL_RESP_LEN_DNDI // set the number of GRF + #undef nDPW_BLOCK_SIZE_HIST + #define nDPW_BLOCK_SIZE_HIST nBLOCK_WIDTH_4+nBLOCK_HEIGHT_1 // HIST Block Size for Write is 4x2 + #undef nDPW_BLOCK_SIZE_DN + #define nDPW_BLOCK_SIZE_DN nBLOCK_WIDTH_16+nBLOCK_HEIGHT_4 // DN Block Size for Write is 16x4 + #undef nDPR_BLOCK_SIZE_UV + #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_16+nBLOCK_HEIGHT_2 // DN Block Size for UV Write/Read is 16x2 + +////////////////////////////////////// Run the DN Algorithm /////////////////////////////////////// + #include "DNDI_COMMAND.asm" + +////////////////////////////////////// Rearrange for Internal Planar ////////////////////////////// + // move the previous frame Y component to internal planar format + $for (0; <nY_NUM_OF_ROWS/2; 1) { + mov (16) uwDEST_Y(%1,0)<1> ubRESP(nDI_PREV_FRAME_LUMA_OFFSET,%1*16) + } + // move the previous frame U,V components to internal planar format + $for (0; <nUV_NUM_OF_ROWS/2; 1) { + mov (8) uwDEST_U(0,%1*8)<1> ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels + mov (8) uwDEST_V(0,%1*8)<1> ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //V pixels + } + // move the current frame Y component to internal planar format + $for (0; <nY_NUM_OF_ROWS/2; 1) { + mov (16) uwDEST_Y(%1+4,0)<1> ubRESP(nDI_CURR_FRAME_LUMA_OFFSET,%1*16) + } + // move the current frame U,V components to internal planar format + $for (0; <nUV_NUM_OF_ROWS/2; 1) { + mov (8) uwDEST_U(2,%1*8)<1> ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels + mov (8) uwDEST_V(2,%1*8)<1> ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //V pixels + } + +////////////////////////////////////// Save the STMM Data for Next Run ///////////////////////// + // Write STMM to memory + shr (1) rMSGSRC.0<1>:ud wORIX<0;1,0>:w 1:w // X origin / 2 + mov (1) rMSGSRC.1<1>:ud wORIY<0;1,0>:w // Y origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_STMM:ud // block width and height (8x4) + mov (8) mudMSGHDR_STMM(0)<1> rMSGSRC.0<8;8,1>:ud // message header + mov (8) mudMSGHDR_STMM(1)<1> udRESP(nDI_STMM_OFFSET,0) // Move STMM to MRF + send (8) dNULLREG mMSGHDR_STMM udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_STMM+nBI_STMM_HISTORY_OUTPUT:ud + +////////////////////////////////////// Save the History Data for Next Run ///////////////////////// + #include "DI_Hist_Save.asm" + +////////////////////////////////////// Save the DN Curr Frame for Next Run //////////////////////// + add (4) pCF_Y_OFFSET<1>:uw ubSRC_CF_OFFSET<4;4,1>:ub npDN_YUV:w + // check top/bottom field first + cmp.e.f0.0 (1) null<1>:w ubTFLD_FIRST<0;1,0>:ub 1:w + (f0.0) jmpi (1) TOP_FIELD_FIRST + +BOTTOM_FIELD_FIRST: + $for (0,0; <nY_NUM_OF_ROWS/2; 2,1) { + mov (4) mudMSGHDR_DN(1,%1*4)<1> udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 2nd field luma from current frame (line 0,2) + mov (4) mudMSGHDR_DN(1,%1*4+4)<1> udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,4)<4;4,1> // 1st field luma from current frame (line 1,3) + } + jmpi (1) SAVE_DN_CURR + +TOP_FIELD_FIRST: + $for (0,0; <nY_NUM_OF_ROWS/2; 2,1) { + mov (4) mudMSGHDR_DN(1,%1*4)<1> udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,0)<4;4,1> // 2nd field luma from current frame (line 0,2) + mov (4) mudMSGHDR_DN(1,%1*4+4)<1> udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 1st field luma from current frame (line 1,3) + } +SAVE_DN_CURR: + mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w // X origin and Y origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DN:ud // block width and height (16x4) + mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud + send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_PL_DN_DI+nBI_DESTINATION_Y:ud + + +/////////////////////////////NV12 UV Copy 422///////////////////////////////////////////////////// + //Read UV through DATAPORT + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin + asr (1) rMSGSRC.1<1>:d rMSGSRC.1<0;1,0>:d 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (16x2) + mov (8) mudMSGHDR_DN<1> rMSGSRC<8;8,1>:ud + send (8) udBOT_U_IO(0)<1> mMSGHDR_DN udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nRESLEN_1+nBI_CURRENT_SRC_UV:ud + + //Write UV through DATAPORT + mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w // X origin and Y origin + asr (1) rMSGSRC.1<1>:d rMSGSRC.1<0;1,0>:d 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // block width and height (16x2) + mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud + mov (8) mudMSGHDR_DN(1)<1> udBOT_U_IO(0)<8;8,1> + send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nMSGLEN_1+nBI_DESTINATION_UV:ud
\ No newline at end of file diff --git a/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG_UVCopy_P208.asm b/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG_UVCopy_P208.asm new file mode 100644 index 00000000..7fba14cd --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG_UVCopy_P208.asm @@ -0,0 +1,101 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +#define DI_ENABLE + + #include "DNDI.inc" + + #undef nY_NUM_OF_ROWS + #define nY_NUM_OF_ROWS 8 // Number of Y rows per block (4 rows for each frame) + #undef nUV_NUM_OF_ROWS + #define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block + + #undef nSMPL_RESP_LEN + #define nSMPL_RESP_LEN nSMPL_RESP_LEN_DNDI // set the number of GRF + #undef nDPW_BLOCK_SIZE_HIST + #define nDPW_BLOCK_SIZE_HIST nBLOCK_WIDTH_4+nBLOCK_HEIGHT_1 // HIST Block Size for Write is 4x2 + #undef nDPW_BLOCK_SIZE_DN + #define nDPW_BLOCK_SIZE_DN nBLOCK_WIDTH_16+nBLOCK_HEIGHT_4 // DN Block Size for Write is 16x4 + +////////////////////////////////////// Run the DN Algorithm /////////////////////////////////////// + #include "DNDI_Command.asm" + +////////////////////////////////////// Rearrange for Internal Planar ////////////////////////////// + // move the previous frame Y component to internal planar format + $for (0; <nY_NUM_OF_ROWS/2; 1) { + mov (16) uwDEST_Y(%1,0)<1> ubRESP(nDI_PREV_FRAME_LUMA_OFFSET,%1*16) + } + // move the previous frame U,V components to internal planar format + $for (0; <nUV_NUM_OF_ROWS/2; 1) { + mov (8) uwDEST_U(0,%1*8)<1> ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels + mov (8) uwDEST_V(0,%1*8)<1> ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //V pixels + } + // move the current frame Y component to internal planar format + $for (0; <nY_NUM_OF_ROWS/2; 1) { + mov (16) uwDEST_Y(%1+4,0)<1> ubRESP(nDI_CURR_FRAME_LUMA_OFFSET,%1*16) + } + // move the current frame U,V components to internal planar format + $for (0; <nUV_NUM_OF_ROWS/2; 1) { + mov (8) uwDEST_U(2,%1*8)<1> ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels + mov (8) uwDEST_V(2,%1*8)<1> ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //V pixels + } + +////////////////////////////////////// Save the STMM Data for Next Run ///////////////////////// + // Write STMM to memory + shr (1) rMSGSRC.0<1>:ud wORIX<0;1,0>:w 1:w // X origin / 2 + mov (1) rMSGSRC.1<1>:ud wORIY<0;1,0>:w // Y origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_STMM:ud // block width and height (8x4) + mov (8) mudMSGHDR_STMM(0)<1> rMSGSRC.0<8;8,1>:ud // message header + mov (8) mudMSGHDR_STMM(1)<1> udRESP(nDI_STMM_OFFSET,0) // Move STMM to MRF + send (8) dNULLREG mMSGHDR_STMM udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_STMM+nBI_STMM_HISTORY_OUTPUT:ud + +////////////////////////////////////// Save the History Data for Next Run ///////////////////////// + #include "DI_Hist_Save.asm" + +////////////////////////////////////// Save the DN Curr Frame for Next Run //////////////////////// + add (4) pCF_Y_OFFSET<1>:uw ubSRC_CF_OFFSET<4;4,1>:ub npDN_YUV:w + // check top/bottom field first + cmp.e.f0.0 (1) null<1>:w ubTFLD_FIRST<0;1,0>:ub 1:w + (f0.0) jmpi (1) TOP_FIELD_FIRST + +BOTTOM_FIELD_FIRST: + $for (0,0; <nY_NUM_OF_ROWS/2; 2,1) { + mov (4) mudMSGHDR_DN(1,%1*4)<1> udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 2nd field luma from current frame (line 0,2) + mov (4) mudMSGHDR_DN(1,%1*4+4)<1> udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,4)<4;4,1> // 1st field luma from current frame (line 1,3) + } + jmpi (1) SAVE_DN_CURR + +TOP_FIELD_FIRST: + $for (0,0; <nY_NUM_OF_ROWS/2; 2,1) { + mov (4) mudMSGHDR_DN(1,%1*4)<1> udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,0)<4;4,1> // 2nd field luma from current frame (line 0,2) + mov (4) mudMSGHDR_DN(1,%1*4+4)<1> udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 1st field luma from current frame (line 1,3) + } +SAVE_DN_CURR: + mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w // X origin and Y origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DN:ud // block width and height (16x4) + mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud + send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_PL_DN_DI+nBI_DESTINATION_Y:ud + + +/////////////////////////////P208 UV Copy 422///////////////////////////////////////////////////// + //Read UV through DATAPORT + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DN:ud // Y Block width and height (16x4) (U/V block size is the same) + mov (8) mudMSGHDR_DN<1> rMSGSRC<8;8,1>:ud + send (8) udBOT_U_IO(0)<1> mMSGHDR_DN udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nRESLEN_2+nBI_CURRENT_SRC_UV:ud + + //Write UV through DATAPORT + mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w // X origin and Y origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DN:ud // block width and height (16x4) + mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud + mov (8) mudMSGHDR_DN(1)<1> udBOT_U_IO(0)<8;8,1> + mov (8) mudMSGHDR_DN(2)<1> udBOT_U_IO(1)<8;8,1> + send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_PL_DN_DI+nBI_DESTINATION_UV:ud +
\ No newline at end of file diff --git a/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG_UVCopy_PL3.asm b/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG_UVCopy_PL3.asm new file mode 100644 index 00000000..f7b891d7 --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG_UVCopy_PL3.asm @@ -0,0 +1,106 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +#define DI_ENABLE + + #include "DNDI.inc" + + #undef nY_NUM_OF_ROWS + #define nY_NUM_OF_ROWS 8 // Number of Y rows per block (4 rows for each frame) + #undef nUV_NUM_OF_ROWS + #define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block + + #undef nSMPL_RESP_LEN + #define nSMPL_RESP_LEN nSMPL_RESP_LEN_DNDI // set the number of GRF + #undef nDPW_BLOCK_SIZE_HIST + #define nDPW_BLOCK_SIZE_HIST nBLOCK_WIDTH_4+nBLOCK_HEIGHT_1 // HIST Block Size for Write is 4x2 + #undef nDPW_BLOCK_SIZE_DN + #define nDPW_BLOCK_SIZE_DN nBLOCK_WIDTH_16+nBLOCK_HEIGHT_4 // DN Block Size for Write is 16x4 + #undef nDPR_BLOCK_SIZE_UV + #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_8+nBLOCK_HEIGHT_2 // DN Block Size for UV Write/Read is 8x2 + +////////////////////////////////////// Run the DN Algorithm /////////////////////////////////////// + #include "DNDI_Command.asm" + +////////////////////////////////////// Rearrange for Internal Planar ////////////////////////////// + // move the previous frame Y component to internal planar format + $for (0; <nY_NUM_OF_ROWS/2; 1) { + mov (16) uwDEST_Y(%1,0)<1> ubRESP(nDI_PREV_FRAME_LUMA_OFFSET,%1*16) + } + // move the previous frame U,V components to internal planar format + $for (0; <nUV_NUM_OF_ROWS/2; 1) { + mov (8) uwDEST_U(0,%1*8)<1> ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels + mov (8) uwDEST_V(0,%1*8)<1> ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //V pixels + } + // move the current frame Y component to internal planar format + $for (0; <nY_NUM_OF_ROWS/2; 1) { + mov (16) uwDEST_Y(%1+4,0)<1> ubRESP(nDI_CURR_FRAME_LUMA_OFFSET,%1*16) + } + // move the current frame U,V components to internal planar format + $for (0; <nUV_NUM_OF_ROWS/2; 1) { + mov (8) uwDEST_U(2,%1*8)<1> ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels + mov (8) uwDEST_V(2,%1*8)<1> ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //V pixels + } + +////////////////////////////////////// Save the STMM Data for Next Run ///////////////////////// + // Write STMM to memory + shr (1) rMSGSRC.0<1>:ud wORIX<0;1,0>:w 1:w // X origin / 2 + mov (1) rMSGSRC.1<1>:ud wORIY<0;1,0>:w // Y origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_STMM:ud // block width and height (8x4) + mov (8) mudMSGHDR_STMM(0)<1> rMSGSRC.0<8;8,1>:ud // message header + mov (8) mudMSGHDR_STMM(1)<1> udRESP(nDI_STMM_OFFSET,0) // Move STMM to MRF + send (8) dNULLREG mMSGHDR_STMM udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_STMM+nBI_STMM_HISTORY_OUTPUT:ud + +////////////////////////////////////// Save the History Data for Next Run ///////////////////////// + #include "DI_Hist_Save.asm" + +////////////////////////////////////// Save the DN Curr Frame for Next Run //////////////////////// + add (4) pCF_Y_OFFSET<1>:uw ubSRC_CF_OFFSET<4;4,1>:ub npDN_YUV:w + // check top/bottom field first + cmp.e.f0.0 (1) null<1>:w ubTFLD_FIRST<0;1,0>:ub 1:w + (f0.0) jmpi (1) TOP_FIELD_FIRST + +BOTTOM_FIELD_FIRST: + $for (0,0; <nY_NUM_OF_ROWS/2; 2,1) { + mov (4) mudMSGHDR_DN(1,%1*4)<1> udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 2nd field luma from current frame (line 0,2) + mov (4) mudMSGHDR_DN(1,%1*4+4)<1> udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,4)<4;4,1> // 1st field luma from current frame (line 1,3) + } + jmpi (1) SAVE_DN_CURR + +TOP_FIELD_FIRST: + $for (0,0; <nY_NUM_OF_ROWS/2; 2,1) { + mov (4) mudMSGHDR_DN(1,%1*4)<1> udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,0)<4;4,1> // 2nd field luma from current frame (line 0,2) + mov (4) mudMSGHDR_DN(1,%1*4+4)<1> udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 1st field luma from current frame (line 1,3) + } +SAVE_DN_CURR: + mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w // X origin and Y origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DN:ud // block width and height (16x4) + mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud + send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_PL_DN_DI+nBI_DESTINATION_Y:ud + + +/////////////////////////////IMC3 UV Copy 422///////////////////////////////////////////////////// + //Read UV through DATAPORT + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin + asr (2) rMSGSRC.0<1>:d rMSGSRC.0<2;2,1>:d 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (8x2) + mov (8) mudMSGHDR_DN<1> rMSGSRC<8;8,1>:ud + send (4) udBOT_U_IO(0)<1> mMSGHDR_DN udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nRESLEN_1+nBI_CURRENT_SRC_U:ud + send (4) udBOT_V_IO(0)<1> mMSGHDR_DN udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nRESLEN_1+nBI_CURRENT_SRC_V:ud + + //Write UV through DATAPORT + mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w // X origin and Y origin + asr (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // block width and height (8x2) + mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud + mov (4) mudMSGHDR_DN(1)<1> udBOT_U_IO(0)<4;4,1> + send (4) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nMSGLEN_1+nBI_DESTINATION_U:ud + mov (4) mudMSGHDR_DN(1)<1> udBOT_V_IO(0)<4;4,1> + send (4) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nMSGLEN_1+nBI_DESTINATION_V:ud
\ No newline at end of file diff --git a/src/shaders/post_processing/Core_Kernels/PL_DN_ALG.asm b/src/shaders/post_processing/Core_Kernels/PL_DN_ALG.asm new file mode 100644 index 00000000..0b9aa4c2 --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/PL_DN_ALG.asm @@ -0,0 +1,35 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +#define DI_DISABLE + +#include "DNDI.inc" + +#undef nY_NUM_OF_ROWS +#define nY_NUM_OF_ROWS 8 // Number of Y rows per block + +#undef nSMPL_RESP_LEN +#define nSMPL_RESP_LEN nSMPL_RESP_LEN_DN_PL // Set the Number of GRFs in DNDI response +#undef nDPW_BLOCK_SIZE_DN +#define nDPW_BLOCK_SIZE_DN nBLOCK_WIDTH_16+nBLOCK_HEIGHT_8 // DN Curr Block Size for Write is 16x8 +#undef nDPW_BLOCK_SIZE_HIST +#define nDPW_BLOCK_SIZE_HIST nBLOCK_WIDTH_4+nBLOCK_HEIGHT_2 // HIST Block Size for Write is 4x2 + +////////////////////////////////////// Run the DN Algorithm /////////////////////////////////////// +#include "DNDI_COMMAND.asm" + +////////////////////////////////////// Rearrange for Internal Planar ////////////////////////////// +$for (0; <nY_NUM_OF_ROWS; 1) { + mov (16) uwDEST_Y(0,%1*16)<1> ubRESP(nNODI_LUMA_OFFSET,%1*16)<16;16,1> // copy line of Y +} + +////////////////////////////////////// Save the History Data for Next Run ///////////////////////// +#include "DNDI_Hist_Save.asm" + diff --git a/src/shaders/post_processing/Core_Kernels/RGB_AVS_IEF_16x8.asm b/src/shaders/post_processing/Core_Kernels/RGB_AVS_IEF_16x8.asm new file mode 100644 index 00000000..efc7cd6d --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/RGB_AVS_IEF_16x8.asm @@ -0,0 +1,33 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +//---------- RGB_AVS_IEF_16x8.asm ---------- + +#include "AVS_IEF.inc" + +//------------------------------------------------------------------------------ +// 2 sampler reads for 8x8 ARGB packed +//------------------------------------------------------------------------------ + + // 1st 8x8 setup + #include "AVS_SetupFirstBlock.asm" + + mov (1) rAVS_8x8_HDR.2:ud nAVS_ALL_CHANNELS:ud // Enable ARGB channels + mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_4CH+nSI_SRC_RGB+nBI_CURRENT_SRC_YUV + // Return ARGB in 16 GRFs + + // 2nd 8x8 setup + #include "AVS_SetupSecondBlock.asm" + mov (16) mAVS_8x8_HDR_2.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE_2(0)<1> mAVS_8x8_HDR_2 udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_4CH+nSI_SRC_RGB+nBI_CURRENT_SRC_YUV + // Return ARGB in 16 GRFs + + diff --git a/src/shaders/post_processing/Core_Kernels/RGB_AVS_IEF_Unpack_16x8.asm b/src/shaders/post_processing/Core_Kernels/RGB_AVS_IEF_Unpack_16x8.asm new file mode 100644 index 00000000..6e2de97c --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/RGB_AVS_IEF_Unpack_16x8.asm @@ -0,0 +1,251 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +//---------- RGB_AVS_IEF_Unpack_16x8.asm ---------- +#include "AVS_IEF.inc" + +#ifdef AVS_OUTPUT_16_BIT +// Move first 8x8 words of B to dest GRF (as packed) + mov (4) uwDEST_Y(0,2)<4> uwAVS_RESPONSE(4,0)<4;4,1> + mov (4) uwDEST_Y(1,2)<4> uwAVS_RESPONSE(4,8)<4;4,1> + mov (4) uwDEST_Y(4,2)<4> uwAVS_RESPONSE(4,4)<4;4,1> + mov (4) uwDEST_Y(5,2)<4> uwAVS_RESPONSE(4,12)<4;4,1> + mov (4) uwDEST_Y(8,2)<4> uwAVS_RESPONSE(5,0)<4;4,1> + mov (4) uwDEST_Y(9,2)<4> uwAVS_RESPONSE(5,8)<4;4,1> + mov (4) uwDEST_Y(12,2)<4> uwAVS_RESPONSE(5,4)<4;4,1> + mov (4) uwDEST_Y(13,2)<4> uwAVS_RESPONSE(5,12)<4;4,1> + mov (4) uwDEST_Y(16,2)<4> uwAVS_RESPONSE(12,0)<4;4,1> + mov (4) uwDEST_Y(17,2)<4> uwAVS_RESPONSE(12,8)<4;4,1> + mov (4) uwDEST_Y(20,2)<4> uwAVS_RESPONSE(12,4)<4;4,1> + mov (4) uwDEST_Y(21,2)<4> uwAVS_RESPONSE(12,12)<4;4,1> + mov (4) uwDEST_Y(24,2)<4> uwAVS_RESPONSE(13,0)<4;4,1> + mov (4) uwDEST_Y(25,2)<4> uwAVS_RESPONSE(13,8)<4;4,1> + mov (4) uwDEST_Y(28,2)<4> uwAVS_RESPONSE(13,4)<4;4,1> + mov (4) uwDEST_Y(29,2)<4> uwAVS_RESPONSE(13,12)<4;4,1> + +// Move first 8x8 words of G to dest GRF (as packed) + mov (4) uwDEST_Y(0,1)<4> uwAVS_RESPONSE(2,0)<4;4,1> + mov (4) uwDEST_Y(1,1)<4> uwAVS_RESPONSE(2,8)<4;4,1> + mov (4) uwDEST_Y(4,1)<4> uwAVS_RESPONSE(2,4)<4;4,1> + mov (4) uwDEST_Y(5,1)<4> uwAVS_RESPONSE(2,12)<4;4,1> + mov (4) uwDEST_Y(8,1)<4> uwAVS_RESPONSE(3,0)<4;4,1> + mov (4) uwDEST_Y(9,1)<4> uwAVS_RESPONSE(3,8)<4;4,1> + mov (4) uwDEST_Y(12,1)<4> uwAVS_RESPONSE(3,4)<4;4,1> + mov (4) uwDEST_Y(13,1)<4> uwAVS_RESPONSE(3,12)<4;4,1> + mov (4) uwDEST_Y(16,1)<4> uwAVS_RESPONSE(10,0)<4;4,1> + mov (4) uwDEST_Y(17,1)<4> uwAVS_RESPONSE(10,8)<4;4,1> + mov (4) uwDEST_Y(20,1)<4> uwAVS_RESPONSE(10,4)<4;4,1> + mov (4) uwDEST_Y(21,1)<4> uwAVS_RESPONSE(10,12)<4;4,1> + mov (4) uwDEST_Y(24,1)<4> uwAVS_RESPONSE(11,0)<4;4,1> + mov (4) uwDEST_Y(25,1)<4> uwAVS_RESPONSE(11,8)<4;4,1> + mov (4) uwDEST_Y(28,1)<4> uwAVS_RESPONSE(11,4)<4;4,1> + mov (4) uwDEST_Y(29,1)<4> uwAVS_RESPONSE(11,12)<4;4,1> + +// Move first 8x8 words of R to dest GRF (as packed) + mov (4) uwDEST_Y(0,0)<4> uwAVS_RESPONSE(0,0)<4;4,1> + mov (4) uwDEST_Y(1,0)<4> uwAVS_RESPONSE(0,8)<4;4,1> + mov (4) uwDEST_Y(4,0)<4> uwAVS_RESPONSE(0,4)<4;4,1> + mov (4) uwDEST_Y(5,0)<4> uwAVS_RESPONSE(0,12)<4;4,1> + mov (4) uwDEST_Y(8,0)<4> uwAVS_RESPONSE(1,0)<4;4,1> + mov (4) uwDEST_Y(9,0)<4> uwAVS_RESPONSE(1,8)<4;4,1> + mov (4) uwDEST_Y(12,0)<4> uwAVS_RESPONSE(1,4)<4;4,1> + mov (4) uwDEST_Y(13,0)<4> uwAVS_RESPONSE(1,12)<4;4,1> + mov (4) uwDEST_Y(16,0)<4> uwAVS_RESPONSE(8,0)<4;4,1> + mov (4) uwDEST_Y(17,0)<4> uwAVS_RESPONSE(8,8)<4;4,1> + mov (4) uwDEST_Y(20,0)<4> uwAVS_RESPONSE(8,4)<4;4,1> + mov (4) uwDEST_Y(21,0)<4> uwAVS_RESPONSE(8,12)<4;4,1> + mov (4) uwDEST_Y(24,0)<4> uwAVS_RESPONSE(9,0)<4;4,1> + mov (4) uwDEST_Y(25,0)<4> uwAVS_RESPONSE(9,8)<4;4,1> + mov (4) uwDEST_Y(28,0)<4> uwAVS_RESPONSE(9,4)<4;4,1> + mov (4) uwDEST_Y(29,0)<4> uwAVS_RESPONSE(9,12)<4;4,1> + +// Move first 8x8 words of A to dest GRF (as packed) + mov (4) uwDEST_Y(0,3)<4> uwAVS_RESPONSE(6,0)<4;4,1> + mov (4) uwDEST_Y(1,3)<4> uwAVS_RESPONSE(6,8)<4;4,1> + mov (4) uwDEST_Y(4,3)<4> uwAVS_RESPONSE(6,4)<4;4,1> + mov (4) uwDEST_Y(5,3)<4> uwAVS_RESPONSE(6,12)<4;4,1> + mov (4) uwDEST_Y(8,3)<4> uwAVS_RESPONSE(7,0)<4;4,1> + mov (4) uwDEST_Y(9,3)<4> uwAVS_RESPONSE(7,8)<4;4,1> + mov (4) uwDEST_Y(12,3)<4> uwAVS_RESPONSE(7,4)<4;4,1> + mov (4) uwDEST_Y(13,3)<4> uwAVS_RESPONSE(7,12)<4;4,1> + mov (4) uwDEST_Y(16,3)<4> uwAVS_RESPONSE(14,0)<4;4,1> + mov (4) uwDEST_Y(17,3)<4> uwAVS_RESPONSE(14,8)<4;4,1> + mov (4) uwDEST_Y(20,3)<4> uwAVS_RESPONSE(14,4)<4;4,1> + mov (4) uwDEST_Y(21,3)<4> uwAVS_RESPONSE(14,12)<4;4,1> + mov (4) uwDEST_Y(24,3)<4> uwAVS_RESPONSE(15,0)<4;4,1> + mov (4) uwDEST_Y(25,3)<4> uwAVS_RESPONSE(15,8)<4;4,1> + mov (4) uwDEST_Y(28,3)<4> uwAVS_RESPONSE(15,4)<4;4,1> + mov (4) uwDEST_Y(29,3)<4> uwAVS_RESPONSE(15,12)<4;4,1> + +// Move second 8x8 words of B to dest GRF + mov (4) uwDEST_Y(2,2)<4> uwAVS_RESPONSE_2(4,0)<4;4,1> + mov (4) uwDEST_Y(3,2)<4> uwAVS_RESPONSE_2(4,8)<4;4,1> + mov (4) uwDEST_Y(6,2)<4> uwAVS_RESPONSE_2(4,4)<4;4,1> + mov (4) uwDEST_Y(7,2)<4> uwAVS_RESPONSE_2(4,12)<4;4,1> + mov (4) uwDEST_Y(10,2)<4> uwAVS_RESPONSE_2(5,0)<4;4,1> + mov (4) uwDEST_Y(11,2)<4> uwAVS_RESPONSE_2(5,8)<4;4,1> + mov (4) uwDEST_Y(14,2)<4> uwAVS_RESPONSE_2(5,4)<4;4,1> + mov (4) uwDEST_Y(15,2)<4> uwAVS_RESPONSE_2(5,12)<4;4,1> + mov (4) uwDEST_Y(18,2)<4> uwAVS_RESPONSE_2(12,0)<4;4,1> + mov (4) uwDEST_Y(19,2)<4> uwAVS_RESPONSE_2(12,8)<4;4,1> + mov (4) uwDEST_Y(22,2)<4> uwAVS_RESPONSE_2(12,4)<4;4,1> + mov (4) uwDEST_Y(23,2)<4> uwAVS_RESPONSE_2(12,12)<4;4,1> + mov (4) uwDEST_Y(26,2)<4> uwAVS_RESPONSE_2(13,0)<4;4,1> + mov (4) uwDEST_Y(27,2)<4> uwAVS_RESPONSE_2(13,8)<4;4,1> + mov (4) uwDEST_Y(30,2)<4> uwAVS_RESPONSE_2(13,4)<4;4,1> + mov (4) uwDEST_Y(31,2)<4> uwAVS_RESPONSE_2(13,12)<4;4,1> + +// Move second 8x8 words of G to dest GRF + mov (4) uwDEST_Y(2,1)<4> uwAVS_RESPONSE_2(2,0)<4;4,1> + mov (4) uwDEST_Y(3,1)<4> uwAVS_RESPONSE_2(2,8)<4;4,1> + mov (4) uwDEST_Y(6,1)<4> uwAVS_RESPONSE_2(2,4)<4;4,1> + mov (4) uwDEST_Y(7,1)<4> uwAVS_RESPONSE_2(2,12)<4;4,1> + mov (4) uwDEST_Y(10,1)<4> uwAVS_RESPONSE_2(3,0)<4;4,1> + mov (4) uwDEST_Y(11,1)<4> uwAVS_RESPONSE_2(3,8)<4;4,1> + mov (4) uwDEST_Y(14,1)<4> uwAVS_RESPONSE_2(3,4)<4;4,1> + mov (4) uwDEST_Y(15,1)<4> uwAVS_RESPONSE_2(3,12)<4;4,1> + mov (4) uwDEST_Y(18,1)<4> uwAVS_RESPONSE_2(10,0)<4;4,1> + mov (4) uwDEST_Y(19,1)<4> uwAVS_RESPONSE_2(10,8)<4;4,1> + mov (4) uwDEST_Y(22,1)<4> uwAVS_RESPONSE_2(10,4)<4;4,1> + mov (4) uwDEST_Y(23,1)<4> uwAVS_RESPONSE_2(10,12)<4;4,1> + mov (4) uwDEST_Y(26,1)<4> uwAVS_RESPONSE_2(11,0)<4;4,1> + mov (4) uwDEST_Y(27,1)<4> uwAVS_RESPONSE_2(11,8)<4;4,1> + mov (4) uwDEST_Y(30,1)<4> uwAVS_RESPONSE_2(11,4)<4;4,1> + mov (4) uwDEST_Y(31,1)<4> uwAVS_RESPONSE_2(11,12)<4;4,1> + +// Move second 8x8 words of R to dest GRF + mov (4) uwDEST_Y(2,0)<4> uwAVS_RESPONSE_2(0,0)<4;4,1> + mov (4) uwDEST_Y(3,0)<4> uwAVS_RESPONSE_2(0,8)<4;4,1> + mov (4) uwDEST_Y(6,0)<4> uwAVS_RESPONSE_2(0,4)<4;4,1> + mov (4) uwDEST_Y(7,0)<4> uwAVS_RESPONSE_2(0,12)<4;4,1> + mov (4) uwDEST_Y(10,0)<4> uwAVS_RESPONSE_2(1,0)<4;4,1> + mov (4) uwDEST_Y(11,0)<4> uwAVS_RESPONSE_2(1,8)<4;4,1> + mov (4) uwDEST_Y(14,0)<4> uwAVS_RESPONSE_2(1,4)<4;4,1> + mov (4) uwDEST_Y(15,0)<4> uwAVS_RESPONSE_2(1,12)<4;4,1> + mov (4) uwDEST_Y(18,0)<4> uwAVS_RESPONSE_2(8,0)<4;4,1> + mov (4) uwDEST_Y(19,0)<4> uwAVS_RESPONSE_2(8,8)<4;4,1> + mov (4) uwDEST_Y(22,0)<4> uwAVS_RESPONSE_2(8,4)<4;4,1> + mov (4) uwDEST_Y(23,0)<4> uwAVS_RESPONSE_2(8,12)<4;4,1> + mov (4) uwDEST_Y(26,0)<4> uwAVS_RESPONSE_2(9,0)<4;4,1> + mov (4) uwDEST_Y(27,0)<4> uwAVS_RESPONSE_2(9,8)<4;4,1> + mov (4) uwDEST_Y(30,0)<4> uwAVS_RESPONSE_2(9,4)<4;4,1> + mov (4) uwDEST_Y(31,0)<4> uwAVS_RESPONSE_2(9,12)<4;4,1> + +// Move second 8x8 words of A to dest GRF + mov (4) uwDEST_Y(2,3)<4> uwAVS_RESPONSE_2(6,0)<4;4,1> + mov (4) uwDEST_Y(3,3)<4> uwAVS_RESPONSE_2(6,8)<4;4,1> + mov (4) uwDEST_Y(6,3)<4> uwAVS_RESPONSE_2(6,4)<4;4,1> + mov (4) uwDEST_Y(7,3)<4> uwAVS_RESPONSE_2(6,12)<4;4,1> + mov (4) uwDEST_Y(10,3)<4> uwAVS_RESPONSE_2(7,0)<4;4,1> + mov (4) uwDEST_Y(11,3)<4> uwAVS_RESPONSE_2(7,8)<4;4,1> + mov (4) uwDEST_Y(14,3)<4> uwAVS_RESPONSE_2(7,4)<4;4,1> + mov (4) uwDEST_Y(15,3)<4> uwAVS_RESPONSE_2(7,12)<4;4,1> + mov (4) uwDEST_Y(18,3)<4> uwAVS_RESPONSE_2(14,0)<4;4,1> + mov (4) uwDEST_Y(19,3)<4> uwAVS_RESPONSE_2(14,8)<4;4,1> + mov (4) uwDEST_Y(22,3)<4> uwAVS_RESPONSE_2(14,4)<4;4,1> + mov (4) uwDEST_Y(23,3)<4> uwAVS_RESPONSE_2(14,12)<4;4,1> + mov (4) uwDEST_Y(26,3)<4> uwAVS_RESPONSE_2(15,0)<4;4,1> + mov (4) uwDEST_Y(27,3)<4> uwAVS_RESPONSE_2(15,8)<4;4,1> + mov (4) uwDEST_Y(30,3)<4> uwAVS_RESPONSE_2(15,4)<4;4,1> + mov (4) uwDEST_Y(31,3)<4> uwAVS_RESPONSE_2(15,12)<4;4,1> + +#else /* OUTPUT_8_BIT */ +// Move first 8x8 words of B to dest GRF + mov (8) ubDEST_Y(0,2)<4> ubAVS_RESPONSE(4,1)<16;4,2> + mov (8) ubDEST_Y(2,2)<4> ubAVS_RESPONSE(4,8+1)<16;4,2> + mov (8) ubDEST_Y(4,2)<4> ubAVS_RESPONSE(5,1)<16;4,2> + mov (8) ubDEST_Y(6,2)<4> ubAVS_RESPONSE(5,8+1)<16;4,2> + mov (8) ubDEST_Y(8,2)<4> ubAVS_RESPONSE(12,1)<16;4,2> + mov (8) ubDEST_Y(10,2)<4> ubAVS_RESPONSE(12,8+1)<16;4,2> + mov (8) ubDEST_Y(12,2)<4> ubAVS_RESPONSE(13,1)<16;4,2> + mov (8) ubDEST_Y(14,2)<4> ubAVS_RESPONSE(13,8+1)<16;4,2> + +// Move first 8x8 words of G to dest GRF + mov (8) ubDEST_Y(0,1)<4> ubAVS_RESPONSE(2,1)<16;4,2> + mov (8) ubDEST_Y(2,1)<4> ubAVS_RESPONSE(2,8+1)<16;4,2> + mov (8) ubDEST_Y(4,1)<4> ubAVS_RESPONSE(3,1)<16;4,2> + mov (8) ubDEST_Y(6,1)<4> ubAVS_RESPONSE(3,8+1)<16;4,2> + mov (8) ubDEST_Y(8,1)<4> ubAVS_RESPONSE(10,1)<16;4,2> + mov (8) ubDEST_Y(10,1)<4> ubAVS_RESPONSE(10,8+1)<16;4,2> + mov (8) ubDEST_Y(12,1)<4> ubAVS_RESPONSE(11,1)<16;4,2> + mov (8) ubDEST_Y(14,1)<4> ubAVS_RESPONSE(11,8+1)<16;4,2> + +// Move first 8x8 words of R to dest GRF + mov (8) ubDEST_Y(0,0)<4> ubAVS_RESPONSE(0,1)<16;4,2> + mov (8) ubDEST_Y(2,0)<4> ubAVS_RESPONSE(0,8+1)<16;4,2> + mov (8) ubDEST_Y(4,0)<4> ubAVS_RESPONSE(1,1)<16;4,2> + mov (8) ubDEST_Y(6,0)<4> ubAVS_RESPONSE(1,8+1)<16;4,2> + mov (8) ubDEST_Y(8,0)<4> ubAVS_RESPONSE(8,1)<16;4,2> + mov (8) ubDEST_Y(10,0)<4> ubAVS_RESPONSE(8,8+1)<16;4,2> + mov (8) ubDEST_Y(12,0)<4> ubAVS_RESPONSE(9,1)<16;4,2> + mov (8) ubDEST_Y(14,0)<4> ubAVS_RESPONSE(9,8+1)<16;4,2> + +// Move first 8x8 words of A to dest GRF + mov (8) ubDEST_Y(0,3)<4> ubAVS_RESPONSE(6,1)<16;4,2> + mov (8) ubDEST_Y(2,3)<4> ubAVS_RESPONSE(6,8+1)<16;4,2> + mov (8) ubDEST_Y(4,3)<4> ubAVS_RESPONSE(7,1)<16;4,2> + mov (8) ubDEST_Y(6,3)<4> ubAVS_RESPONSE(7,8+1)<16;4,2> + mov (8) ubDEST_Y(8,3)<4> ubAVS_RESPONSE(14,1)<16;4,2> + mov (8) ubDEST_Y(10,3)<4> ubAVS_RESPONSE(14,8+1)<16;4,2> + mov (8) ubDEST_Y(12,3)<4> ubAVS_RESPONSE(15,1)<16;4,2> + mov (8) ubDEST_Y(14,3)<4> ubAVS_RESPONSE(15,8+1)<16;4,2> + +// Move second 8x8 words of B to dest GRF + mov (8) ubDEST_Y(1,2)<4> ubAVS_RESPONSE_2(4,1)<16;4,2> + mov (8) ubDEST_Y(3,2)<4> ubAVS_RESPONSE_2(4,8+1)<16;4,2> + mov (8) ubDEST_Y(5,2)<4> ubAVS_RESPONSE_2(5,1)<16;4,2> + mov (8) ubDEST_Y(7,2)<4> ubAVS_RESPONSE_2(5,8+1)<16;4,2> + mov (8) ubDEST_Y(9,2)<4> ubAVS_RESPONSE_2(12,1)<16;4,2> + mov (8) ubDEST_Y(11,2)<4> ubAVS_RESPONSE_2(12,8+1)<16;4,2> + mov (8) ubDEST_Y(13,2)<4> ubAVS_RESPONSE_2(13,1)<16;4,2> + mov (8) ubDEST_Y(15,2)<4> ubAVS_RESPONSE_2(13,8+1)<16;4,2> + +// Move second 8x8 words of G to dest GRF + mov (8) ubDEST_Y(1,1)<4> ubAVS_RESPONSE_2(2,1)<16;4,2> + mov (8) ubDEST_Y(3,1)<4> ubAVS_RESPONSE_2(2,8+1)<16;4,2> + mov (8) ubDEST_Y(5,1)<4> ubAVS_RESPONSE_2(3,1)<16;4,2> + mov (8) ubDEST_Y(7,1)<4> ubAVS_RESPONSE_2(3,8+1)<16;4,2> + mov (8) ubDEST_Y(9,1)<4> ubAVS_RESPONSE_2(10,1)<16;4,2> + mov (8) ubDEST_Y(11,1)<4> ubAVS_RESPONSE_2(10,8+1)<16;4,2> + mov (8) ubDEST_Y(13,1)<4> ubAVS_RESPONSE_2(11,1)<16;4,2> + mov (8) ubDEST_Y(15,1)<4> ubAVS_RESPONSE_2(11,8+1)<16;4,2> + +// Move second 8x8 words of R to dest GRF + mov (8) ubDEST_Y(1,0)<4> ubAVS_RESPONSE_2(0,1)<16;4,2> + mov (8) ubDEST_Y(3,0)<4> ubAVS_RESPONSE_2(0,8+1)<16;4,2> + mov (8) ubDEST_Y(5,0)<4> ubAVS_RESPONSE_2(1,1)<16;4,2> + mov (8) ubDEST_Y(7,0)<4> ubAVS_RESPONSE_2(1,8+1)<16;4,2> + mov (8) ubDEST_Y(9,0)<4> ubAVS_RESPONSE_2(8,1)<16;4,2> + mov (8) ubDEST_Y(11,0)<4> ubAVS_RESPONSE_2(8,8+1)<16;4,2> + mov (8) ubDEST_Y(13,0)<4> ubAVS_RESPONSE_2(9,1)<16;4,2> + mov (8) ubDEST_Y(15,0)<4> ubAVS_RESPONSE_2(9,8+1)<16;4,2> + +// Move second 8x8 words of A to dest GRF + mov (8) ubDEST_Y(1,3)<4> ubAVS_RESPONSE_2(6,1)<16;4,2> + mov (8) ubDEST_Y(3,3)<4> ubAVS_RESPONSE_2(6,8+1)<16;4,2> + mov (8) ubDEST_Y(5,3)<4> ubAVS_RESPONSE_2(7,1)<16;4,2> + mov (8) ubDEST_Y(7,3)<4> ubAVS_RESPONSE_2(7,8+1)<16;4,2> + mov (8) ubDEST_Y(9,3)<4> ubAVS_RESPONSE_2(14,1)<16;4,2> + mov (8) ubDEST_Y(11,3)<4> ubAVS_RESPONSE_2(14,8+1)<16;4,2> + mov (8) ubDEST_Y(13,3)<4> ubAVS_RESPONSE_2(15,1)<16;4,2> + mov (8) ubDEST_Y(15,3)<4> ubAVS_RESPONSE_2(15,8+1)<16;4,2> +#endif +//------------------------------------------------------------------------------ + + // Set to write bottom region to memory + #define SRC_REGION REGION_2 + + // Re-define new # of lines + #undef nUV_NUM_OF_ROWS + #undef nY_NUM_OF_ROWS + + #define nY_NUM_OF_ROWS 8 + #define nUV_NUM_OF_ROWS 8 + diff --git a/src/shaders/post_processing/Core_Kernels/RGB_AVS_IEF_Unscramble_16x8.asm b/src/shaders/post_processing/Core_Kernels/RGB_AVS_IEF_Unscramble_16x8.asm new file mode 100644 index 00000000..b81923f6 --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/RGB_AVS_IEF_Unscramble_16x8.asm @@ -0,0 +1,260 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +//---------- RGB_AVS_IEF_Unpack_16x8.asm ---------- +#include "AVS_IEF.inc" + +.declare DEST_B Base=REG(r,10) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw +.declare DEST_G Base=REG(r,18) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw +.declare DEST_R Base=REG(r,26) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw +.declare DEST_A Base=REG(r,34) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw + + +#ifdef AVS_OUTPUT_16_BIT +//This portion will need to be changed if unpacking is required for Y416 kernels (in case of blending etc) - vK + +//// Move first 8x8 words of B to dest GRF (as packed) +// mov (4) uwDEST_Y(0,2)<4> uwAVS_RESPONSE(4,0)<4;4,1> +// mov (4) uwDEST_Y(1,2)<4> uwAVS_RESPONSE(4,8)<4;4,1> +// mov (4) uwDEST_Y(4,2)<4> uwAVS_RESPONSE(4,4)<4;4,1> +// mov (4) uwDEST_Y(5,2)<4> uwAVS_RESPONSE(4,12)<4;4,1> +// mov (4) uwDEST_Y(8,2)<4> uwAVS_RESPONSE(5,0)<4;4,1> +// mov (4) uwDEST_Y(9,2)<4> uwAVS_RESPONSE(5,8)<4;4,1> +// mov (4) uwDEST_Y(12,2)<4> uwAVS_RESPONSE(5,4)<4;4,1> +// mov (4) uwDEST_Y(13,2)<4> uwAVS_RESPONSE(5,12)<4;4,1> +// mov (4) uwDEST_Y(16,2)<4> uwAVS_RESPONSE(12,0)<4;4,1> +// mov (4) uwDEST_Y(17,2)<4> uwAVS_RESPONSE(12,8)<4;4,1> +// mov (4) uwDEST_Y(20,2)<4> uwAVS_RESPONSE(12,4)<4;4,1> +// mov (4) uwDEST_Y(21,2)<4> uwAVS_RESPONSE(12,12)<4;4,1> +// mov (4) uwDEST_Y(24,2)<4> uwAVS_RESPONSE(13,0)<4;4,1> +// mov (4) uwDEST_Y(25,2)<4> uwAVS_RESPONSE(13,8)<4;4,1> +// mov (4) uwDEST_Y(28,2)<4> uwAVS_RESPONSE(13,4)<4;4,1> +// mov (4) uwDEST_Y(29,2)<4> uwAVS_RESPONSE(13,12)<4;4,1> +// +//// Move first 8x8 words of G to dest GRF (as packed) +// mov (4) uwDEST_Y(0,1)<4> uwAVS_RESPONSE(2,0)<4;4,1> +// mov (4) uwDEST_Y(1,1)<4> uwAVS_RESPONSE(2,8)<4;4,1> +// mov (4) uwDEST_Y(4,1)<4> uwAVS_RESPONSE(2,4)<4;4,1> +// mov (4) uwDEST_Y(5,1)<4> uwAVS_RESPONSE(2,12)<4;4,1> +// mov (4) uwDEST_Y(8,1)<4> uwAVS_RESPONSE(3,0)<4;4,1> +// mov (4) uwDEST_Y(9,1)<4> uwAVS_RESPONSE(3,8)<4;4,1> +// mov (4) uwDEST_Y(12,1)<4> uwAVS_RESPONSE(3,4)<4;4,1> +// mov (4) uwDEST_Y(13,1)<4> uwAVS_RESPONSE(3,12)<4;4,1> +// mov (4) uwDEST_Y(16,1)<4> uwAVS_RESPONSE(10,0)<4;4,1> +// mov (4) uwDEST_Y(17,1)<4> uwAVS_RESPONSE(10,8)<4;4,1> +// mov (4) uwDEST_Y(20,1)<4> uwAVS_RESPONSE(10,4)<4;4,1> +// mov (4) uwDEST_Y(21,1)<4> uwAVS_RESPONSE(10,12)<4;4,1> +// mov (4) uwDEST_Y(24,1)<4> uwAVS_RESPONSE(11,0)<4;4,1> +// mov (4) uwDEST_Y(25,1)<4> uwAVS_RESPONSE(11,8)<4;4,1> +// mov (4) uwDEST_Y(28,1)<4> uwAVS_RESPONSE(11,4)<4;4,1> +// mov (4) uwDEST_Y(29,1)<4> uwAVS_RESPONSE(11,12)<4;4,1> +// +//// Move first 8x8 words of R to dest GRF (as packed) +// mov (4) uwDEST_Y(0,0)<4> uwAVS_RESPONSE(0,0)<4;4,1> +// mov (4) uwDEST_Y(1,0)<4> uwAVS_RESPONSE(0,8)<4;4,1> +// mov (4) uwDEST_Y(4,0)<4> uwAVS_RESPONSE(0,4)<4;4,1> +// mov (4) uwDEST_Y(5,0)<4> uwAVS_RESPONSE(0,12)<4;4,1> +// mov (4) uwDEST_Y(8,0)<4> uwAVS_RESPONSE(1,0)<4;4,1> +// mov (4) uwDEST_Y(9,0)<4> uwAVS_RESPONSE(1,8)<4;4,1> +// mov (4) uwDEST_Y(12,0)<4> uwAVS_RESPONSE(1,4)<4;4,1> +// mov (4) uwDEST_Y(13,0)<4> uwAVS_RESPONSE(1,12)<4;4,1> +// mov (4) uwDEST_Y(16,0)<4> uwAVS_RESPONSE(8,0)<4;4,1> +// mov (4) uwDEST_Y(17,0)<4> uwAVS_RESPONSE(8,8)<4;4,1> +// mov (4) uwDEST_Y(20,0)<4> uwAVS_RESPONSE(8,4)<4;4,1> +// mov (4) uwDEST_Y(21,0)<4> uwAVS_RESPONSE(8,12)<4;4,1> +// mov (4) uwDEST_Y(24,0)<4> uwAVS_RESPONSE(9,0)<4;4,1> +// mov (4) uwDEST_Y(25,0)<4> uwAVS_RESPONSE(9,8)<4;4,1> +// mov (4) uwDEST_Y(28,0)<4> uwAVS_RESPONSE(9,4)<4;4,1> +// mov (4) uwDEST_Y(29,0)<4> uwAVS_RESPONSE(9,12)<4;4,1> +// +//// Move first 8x8 words of A to dest GRF (as packed) +// mov (4) uwDEST_Y(0,3)<4> uwAVS_RESPONSE(6,0)<4;4,1> +// mov (4) uwDEST_Y(1,3)<4> uwAVS_RESPONSE(6,8)<4;4,1> +// mov (4) uwDEST_Y(4,3)<4> uwAVS_RESPONSE(6,4)<4;4,1> +// mov (4) uwDEST_Y(5,3)<4> uwAVS_RESPONSE(6,12)<4;4,1> +// mov (4) uwDEST_Y(8,3)<4> uwAVS_RESPONSE(7,0)<4;4,1> +// mov (4) uwDEST_Y(9,3)<4> uwAVS_RESPONSE(7,8)<4;4,1> +// mov (4) uwDEST_Y(12,3)<4> uwAVS_RESPONSE(7,4)<4;4,1> +// mov (4) uwDEST_Y(13,3)<4> uwAVS_RESPONSE(7,12)<4;4,1> +// mov (4) uwDEST_Y(16,3)<4> uwAVS_RESPONSE(14,0)<4;4,1> +// mov (4) uwDEST_Y(17,3)<4> uwAVS_RESPONSE(14,8)<4;4,1> +// mov (4) uwDEST_Y(20,3)<4> uwAVS_RESPONSE(14,4)<4;4,1> +// mov (4) uwDEST_Y(21,3)<4> uwAVS_RESPONSE(14,12)<4;4,1> +// mov (4) uwDEST_Y(24,3)<4> uwAVS_RESPONSE(15,0)<4;4,1> +// mov (4) uwDEST_Y(25,3)<4> uwAVS_RESPONSE(15,8)<4;4,1> +// mov (4) uwDEST_Y(28,3)<4> uwAVS_RESPONSE(15,4)<4;4,1> +// mov (4) uwDEST_Y(29,3)<4> uwAVS_RESPONSE(15,12)<4;4,1> +// +//// Move second 8x8 words of B to dest GRF +// mov (4) uwDEST_Y(2,2)<4> uwAVS_RESPONSE_2(4,0)<4;4,1> +// mov (4) uwDEST_Y(3,2)<4> uwAVS_RESPONSE_2(4,8)<4;4,1> +// mov (4) uwDEST_Y(6,2)<4> uwAVS_RESPONSE_2(4,4)<4;4,1> +// mov (4) uwDEST_Y(7,2)<4> uwAVS_RESPONSE_2(4,12)<4;4,1> +// mov (4) uwDEST_Y(10,2)<4> uwAVS_RESPONSE_2(5,0)<4;4,1> +// mov (4) uwDEST_Y(11,2)<4> uwAVS_RESPONSE_2(5,8)<4;4,1> +// mov (4) uwDEST_Y(14,2)<4> uwAVS_RESPONSE_2(5,4)<4;4,1> +// mov (4) uwDEST_Y(15,2)<4> uwAVS_RESPONSE_2(5,12)<4;4,1> +// mov (4) uwDEST_Y(18,2)<4> uwAVS_RESPONSE_2(12,0)<4;4,1> +// mov (4) uwDEST_Y(19,2)<4> uwAVS_RESPONSE_2(12,8)<4;4,1> +// mov (4) uwDEST_Y(22,2)<4> uwAVS_RESPONSE_2(12,4)<4;4,1> +// mov (4) uwDEST_Y(23,2)<4> uwAVS_RESPONSE_2(12,12)<4;4,1> +// mov (4) uwDEST_Y(26,2)<4> uwAVS_RESPONSE_2(13,0)<4;4,1> +// mov (4) uwDEST_Y(27,2)<4> uwAVS_RESPONSE_2(13,8)<4;4,1> +// mov (4) uwDEST_Y(30,2)<4> uwAVS_RESPONSE_2(13,4)<4;4,1> +// mov (4) uwDEST_Y(31,2)<4> uwAVS_RESPONSE_2(13,12)<4;4,1> +// +//// Move second 8x8 words of G to dest GRF +// mov (4) uwDEST_Y(2,1)<4> uwAVS_RESPONSE_2(2,0)<4;4,1> +// mov (4) uwDEST_Y(3,1)<4> uwAVS_RESPONSE_2(2,8)<4;4,1> +// mov (4) uwDEST_Y(6,1)<4> uwAVS_RESPONSE_2(2,4)<4;4,1> +// mov (4) uwDEST_Y(7,1)<4> uwAVS_RESPONSE_2(2,12)<4;4,1> +// mov (4) uwDEST_Y(10,1)<4> uwAVS_RESPONSE_2(3,0)<4;4,1> +// mov (4) uwDEST_Y(11,1)<4> uwAVS_RESPONSE_2(3,8)<4;4,1> +// mov (4) uwDEST_Y(14,1)<4> uwAVS_RESPONSE_2(3,4)<4;4,1> +// mov (4) uwDEST_Y(15,1)<4> uwAVS_RESPONSE_2(3,12)<4;4,1> +// mov (4) uwDEST_Y(18,1)<4> uwAVS_RESPONSE_2(10,0)<4;4,1> +// mov (4) uwDEST_Y(19,1)<4> uwAVS_RESPONSE_2(10,8)<4;4,1> +// mov (4) uwDEST_Y(22,1)<4> uwAVS_RESPONSE_2(10,4)<4;4,1> +// mov (4) uwDEST_Y(23,1)<4> uwAVS_RESPONSE_2(10,12)<4;4,1> +// mov (4) uwDEST_Y(26,1)<4> uwAVS_RESPONSE_2(11,0)<4;4,1> +// mov (4) uwDEST_Y(27,1)<4> uwAVS_RESPONSE_2(11,8)<4;4,1> +// mov (4) uwDEST_Y(30,1)<4> uwAVS_RESPONSE_2(11,4)<4;4,1> +// mov (4) uwDEST_Y(31,1)<4> uwAVS_RESPONSE_2(11,12)<4;4,1> +// +//// Move second 8x8 words of R to dest GRF +// mov (4) uwDEST_Y(2,0)<4> uwAVS_RESPONSE_2(0,0)<4;4,1> +// mov (4) uwDEST_Y(3,0)<4> uwAVS_RESPONSE_2(0,8)<4;4,1> +// mov (4) uwDEST_Y(6,0)<4> uwAVS_RESPONSE_2(0,4)<4;4,1> +// mov (4) uwDEST_Y(7,0)<4> uwAVS_RESPONSE_2(0,12)<4;4,1> +// mov (4) uwDEST_Y(10,0)<4> uwAVS_RESPONSE_2(1,0)<4;4,1> +// mov (4) uwDEST_Y(11,0)<4> uwAVS_RESPONSE_2(1,8)<4;4,1> +// mov (4) uwDEST_Y(14,0)<4> uwAVS_RESPONSE_2(1,4)<4;4,1> +// mov (4) uwDEST_Y(15,0)<4> uwAVS_RESPONSE_2(1,12)<4;4,1> +// mov (4) uwDEST_Y(18,0)<4> uwAVS_RESPONSE_2(8,0)<4;4,1> +// mov (4) uwDEST_Y(19,0)<4> uwAVS_RESPONSE_2(8,8)<4;4,1> +// mov (4) uwDEST_Y(22,0)<4> uwAVS_RESPONSE_2(8,4)<4;4,1> +// mov (4) uwDEST_Y(23,0)<4> uwAVS_RESPONSE_2(8,12)<4;4,1> +// mov (4) uwDEST_Y(26,0)<4> uwAVS_RESPONSE_2(9,0)<4;4,1> +// mov (4) uwDEST_Y(27,0)<4> uwAVS_RESPONSE_2(9,8)<4;4,1> +// mov (4) uwDEST_Y(30,0)<4> uwAVS_RESPONSE_2(9,4)<4;4,1> +// mov (4) uwDEST_Y(31,0)<4> uwAVS_RESPONSE_2(9,12)<4;4,1> +// +//// Move second 8x8 words of A to dest GRF +// mov (4) uwDEST_Y(2,3)<4> uwAVS_RESPONSE_2(6,0)<4;4,1> +// mov (4) uwDEST_Y(3,3)<4> uwAVS_RESPONSE_2(6,8)<4;4,1> +// mov (4) uwDEST_Y(6,3)<4> uwAVS_RESPONSE_2(6,4)<4;4,1> +// mov (4) uwDEST_Y(7,3)<4> uwAVS_RESPONSE_2(6,12)<4;4,1> +// mov (4) uwDEST_Y(10,3)<4> uwAVS_RESPONSE_2(7,0)<4;4,1> +// mov (4) uwDEST_Y(11,3)<4> uwAVS_RESPONSE_2(7,8)<4;4,1> +// mov (4) uwDEST_Y(14,3)<4> uwAVS_RESPONSE_2(7,4)<4;4,1> +// mov (4) uwDEST_Y(15,3)<4> uwAVS_RESPONSE_2(7,12)<4;4,1> +// mov (4) uwDEST_Y(18,3)<4> uwAVS_RESPONSE_2(14,0)<4;4,1> +// mov (4) uwDEST_Y(19,3)<4> uwAVS_RESPONSE_2(14,8)<4;4,1> +// mov (4) uwDEST_Y(22,3)<4> uwAVS_RESPONSE_2(14,4)<4;4,1> +// mov (4) uwDEST_Y(23,3)<4> uwAVS_RESPONSE_2(14,12)<4;4,1> +// mov (4) uwDEST_Y(26,3)<4> uwAVS_RESPONSE_2(15,0)<4;4,1> +// mov (4) uwDEST_Y(27,3)<4> uwAVS_RESPONSE_2(15,8)<4;4,1> +// mov (4) uwDEST_Y(30,3)<4> uwAVS_RESPONSE_2(15,4)<4;4,1> +// mov (4) uwDEST_Y(31,3)<4> uwAVS_RESPONSE_2(15,12)<4;4,1> + +#else /* OUTPUT_8_BIT */ + +// Move first 8x8 words of B to dest GRF + mov (8) DEST_B(0)<1> ubAVS_RESPONSE(4,1)<16;4,2> + mov (8) DEST_B(1)<1> ubAVS_RESPONSE(4,8+1)<16;4,2> + mov (8) DEST_B(2)<1> ubAVS_RESPONSE(5,1)<16;4,2> + mov (8) DEST_B(3)<1> ubAVS_RESPONSE(5,8+1)<16;4,2> + mov (8) DEST_B(4)<1> ubAVS_RESPONSE(12,1)<16;4,2> + mov (8) DEST_B(5)<1> ubAVS_RESPONSE(12,8+1)<16;4,2> + mov (8) DEST_B(6)<1> ubAVS_RESPONSE(13,1)<16;4,2> + mov (8) DEST_B(7)<1> ubAVS_RESPONSE(13,8+1)<16;4,2> + +// Move first 8x8 words of G to dest GRF + mov (8) DEST_G(0)<1> ubAVS_RESPONSE(2,1)<16;4,2> + mov (8) DEST_G(1)<1> ubAVS_RESPONSE(2,8+1)<16;4,2> + mov (8) DEST_G(2)<1> ubAVS_RESPONSE(3,1)<16;4,2> + mov (8) DEST_G(3)<1> ubAVS_RESPONSE(3,8+1)<16;4,2> + mov (8) DEST_G(4)<1> ubAVS_RESPONSE(10,1)<16;4,2> + mov (8) DEST_G(5)<1> ubAVS_RESPONSE(10,8+1)<16;4,2> + mov (8) DEST_G(6)<1> ubAVS_RESPONSE(11,1)<16;4,2> + mov (8) DEST_G(7)<1> ubAVS_RESPONSE(11,8+1)<16;4,2> + +// Move first 8x8 words of R to dest GRF + mov (8) DEST_R(0)<1> ubAVS_RESPONSE(0,1)<16;4,2> + mov (8) DEST_R(1)<1> ubAVS_RESPONSE(0,8+1)<16;4,2> + mov (8) DEST_R(2)<1> ubAVS_RESPONSE(1,1)<16;4,2> + mov (8) DEST_R(3)<1> ubAVS_RESPONSE(1,8+1)<16;4,2> + mov (8) DEST_R(4)<1> ubAVS_RESPONSE(8,1)<16;4,2> + mov (8) DEST_R(5)<1> ubAVS_RESPONSE(8,8+1)<16;4,2> + mov (8) DEST_R(6)<1> ubAVS_RESPONSE(9,1)<16;4,2> + mov (8) DEST_R(7)<1> ubAVS_RESPONSE(9,8+1)<16;4,2> + +// Move first 8x8 words of A to dest GRF + mov (8) DEST_A(0)<1> ubAVS_RESPONSE(6,1)<16;4,2> + mov (8) DEST_A(1)<1> ubAVS_RESPONSE(6,8+1)<16;4,2> + mov (8) DEST_A(2)<1> ubAVS_RESPONSE(7,1)<16;4,2> + mov (8) DEST_A(3)<1> ubAVS_RESPONSE(7,8+1)<16;4,2> + mov (8) DEST_A(4)<1> ubAVS_RESPONSE(14,1)<16;4,2> + mov (8) DEST_A(5)<1> ubAVS_RESPONSE(14,8+1)<16;4,2> + mov (8) DEST_A(6)<1> ubAVS_RESPONSE(15,1)<16;4,2> + mov (8) DEST_A(7)<1> ubAVS_RESPONSE(15,8+1)<16;4,2> + +// Move second 8x8 words of B to dest GRF + mov (8) DEST_B(0,8)<1> ubAVS_RESPONSE_2(4,1)<16;4,2> + mov (8) DEST_B(1,8)<1> ubAVS_RESPONSE_2(4,8+1)<16;4,2> + mov (8) DEST_B(2,8)<1> ubAVS_RESPONSE_2(5,1)<16;4,2> + mov (8) DEST_B(3,8)<1> ubAVS_RESPONSE_2(5,8+1)<16;4,2> + mov (8) DEST_B(4,8)<1> ubAVS_RESPONSE_2(12,1)<16;4,2> + mov (8) DEST_B(5,8)<1> ubAVS_RESPONSE_2(12,8+1)<16;4,2> + mov (8) DEST_B(6,8)<1> ubAVS_RESPONSE_2(13,1)<16;4,2> + mov (8) DEST_B(7,8)<1> ubAVS_RESPONSE_2(13,8+1)<16;4,2> + +// Move second 8x8 words of G to dest GRF + mov (8) DEST_G(0,8)<1> ubAVS_RESPONSE_2(2,1)<16;4,2> + mov (8) DEST_G(1,8)<1> ubAVS_RESPONSE_2(2,8+1)<16;4,2> + mov (8) DEST_G(2,8)<1> ubAVS_RESPONSE_2(3,1)<16;4,2> + mov (8) DEST_G(3,8)<1> ubAVS_RESPONSE_2(3,8+1)<16;4,2> + mov (8) DEST_G(4,8)<1> ubAVS_RESPONSE_2(10,1)<16;4,2> + mov (8) DEST_G(5,8)<1> ubAVS_RESPONSE_2(10,8+1)<16;4,2> + mov (8) DEST_G(6,8)<1> ubAVS_RESPONSE_2(11,1)<16;4,2> + mov (8) DEST_G(7,8)<1> ubAVS_RESPONSE_2(11,8+1)<16;4,2> + +// Move second 8x8 words of R to dest GRF + mov (8) DEST_R(0,8)<1> ubAVS_RESPONSE_2(0,1)<16;4,2> + mov (8) DEST_R(1,8)<1> ubAVS_RESPONSE_2(0,8+1)<16;4,2> + mov (8) DEST_R(2,8)<1> ubAVS_RESPONSE_2(1,1)<16;4,2> + mov (8) DEST_R(3,8)<1> ubAVS_RESPONSE_2(1,8+1)<16;4,2> + mov (8) DEST_R(4,8)<1> ubAVS_RESPONSE_2(8,1)<16;4,2> + mov (8) DEST_R(5,8)<1> ubAVS_RESPONSE_2(8,8+1)<16;4,2> + mov (8) DEST_R(6,8)<1> ubAVS_RESPONSE_2(9,1)<16;4,2> + mov (8) DEST_R(7,8)<1> ubAVS_RESPONSE_2(9,8+1)<16;4,2> + +// Move second 8x8 words of A to dest GRF + mov (8) DEST_A(0,8)<1> ubAVS_RESPONSE_2(6,1)<16;4,2> + mov (8) DEST_A(1,8)<1> ubAVS_RESPONSE_2(6,8+1)<16;4,2> + mov (8) DEST_A(2,8)<1> ubAVS_RESPONSE_2(7,1)<16;4,2> + mov (8) DEST_A(3,8)<1> ubAVS_RESPONSE_2(7,8+1)<16;4,2> + mov (8) DEST_A(4,8)<1> ubAVS_RESPONSE_2(14,1)<16;4,2> + mov (8) DEST_A(5,8)<1> ubAVS_RESPONSE_2(14,8+1)<16;4,2> + mov (8) DEST_A(6,8)<1> ubAVS_RESPONSE_2(15,1)<16;4,2> + mov (8) DEST_A(7,8)<1> ubAVS_RESPONSE_2(15,8+1)<16;4,2> +#endif +//------------------------------------------------------------------------------ + + // Set to write bottom region to memory + #define SRC_REGION REGION_1 + + // Re-define new # of lines + #undef nUV_NUM_OF_ROWS + #undef nY_NUM_OF_ROWS + + #define nY_NUM_OF_ROWS 8 + #define nUV_NUM_OF_ROWS 8 + diff --git a/src/shaders/post_processing/Core_Kernels/RGB_Scaling.asm b/src/shaders/post_processing/Core_Kernels/RGB_Scaling.asm new file mode 100644 index 00000000..7429790c --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/RGB_Scaling.asm @@ -0,0 +1,72 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +//---------- RGB_Scaling.asm ---------- +#include "Scaling.inc" + + // Build 16 elements ramp in float32 and normalized it +// mov (8) SAMPLER_RAMP(0)<1> 0x76543210:v +// add (8) SAMPLER_RAMP(1)<1> SAMPLER_RAMP(0) 8.0:f +mov (4) SAMPLER_RAMP(0)<1> 0x48403000:vf //3, 2, 1, 0 in float vector +mov (4) SAMPLER_RAMP(0,4)<1> 0x5C585450:vf //7, 6, 5, 4 in float vector +add (8) SAMPLER_RAMP(1)<1> SAMPLER_RAMP(0) 8.0:f + +//Module: PrepareScaleCoord.asm + + // Setup for sampler msg hdr + mov (2) rMSGSRC.0<1>:ud 0:ud { NoDDClr } // Unused fields + mov (1) rMSGSRC.2<1>:ud 0:ud { NoDDChk } // Write and offset + + // Calculate 16 v based on the step Y and vertical origin + mov (16) mfMSGPAYLOAD(2)<1> fSRC_VID_V_ORI<0;1,0>:f + mov (16) SCALE_COORD_Y<1>:f fSRC_VID_V_ORI<0;1,0>:f + + // Calculate 16 u based on the step X and hori origin +// line (16) mfMSGPAYLOAD(0)<1> SCALE_STEP_X<0;1,0>:f SAMPLER_RAMP(0) // Assign to mrf directly + mov (16) acc0:f fSRC_VID_H_ORI<0;1,0>:f { Compr } + mac (16) mfMSGPAYLOAD(0)<1> fVIDEO_STEP_X<0;1,0>:f SAMPLER_RAMP(0) { Compr } + + //Setup the constants for line instruction + mov (1) SCALE_LINE_P255<1>:f 255.0:f { NoDDClr } //{ NoDDClr, NoDDChk } + mov (1) SCALE_LINE_P0_5<1>:f 0.5:f { NoDDChk } + + +//------------------------------------------------------------------------------ + +$for (0; <nY_NUM_OF_ROWS; 1) { + + // Read 16 sampled pixels and store them in float32 in 8 GRFs in the order of BGRA (VYUA). + mov (8) MSGHDR_SCALE.0:ud rMSGSRC.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (16) SCALE_RESPONSE_YW(0)<1> MSGHDR_SCALE udDUMMY_NULL nSMPL_ENGINE SMPLR_MSG_DSC+nSI_SRC_SIMD16_RGB+nBI_CURRENT_SRC_RGB + + // Calculate 16 v for next line + add (16) mfMSGPAYLOAD(2)<1> SCALE_COORD_Y<8;8,1>:f fVIDEO_STEP_Y<0;1,0>:f // Assign to mrf directly + add (16) SCALE_COORD_Y<1>:f SCALE_COORD_Y<8;8,1>:f fVIDEO_STEP_Y<0;1,0>:f // Assign to mrf directly + + // Scale back to [0, 255], convert f to ud + line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_YF(0) { Compr } // Process B, V + mov (16) SCALE_RESPONSE_YD(0)<1> acc0:f { Compr } + + line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_YF(2) { Compr } // Process B, V + mov (16) SCALE_RESPONSE_YD(2)<1> acc0:f { Compr } + + line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_YF(4) { Compr } // Process B, V + mov (16) SCALE_RESPONSE_YD(4)<1> acc0:f { Compr } + +//#if defined(SAVE_ARGB) //Only needed if Alpha value is written to the destination + line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_YF(6) { Compr } // Process B, V + mov (16) SCALE_RESPONSE_YD(6)<1> acc0:f { Compr } +//#endif + + mov (16) DEST_R(%1)<1> SCALE_RESPONSE_YB(0) //possible error due to truncation - vK + mov (16) DEST_G(%1)<1> SCALE_RESPONSE_YB(2) //possible error due to truncation - vK + mov (16) DEST_B(%1)<1> SCALE_RESPONSE_YB(4) //possible error due to truncation - vK + mov (16) DEST_A(%1)<1> SCALE_RESPONSE_YB(6) //possible error due to truncation - vK +} diff --git a/src/shaders/post_processing/Core_Kernels/Scaling.inc b/src/shaders/post_processing/Core_Kernels/Scaling.inc new file mode 100644 index 00000000..bf66d4cd --- /dev/null +++ b/src/shaders/post_processing/Core_Kernels/Scaling.inc @@ -0,0 +1,75 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ + +// File name: Scaling.inc + +#ifndef _SCALING_INC_ +#define _SCALING_INC_ + +// Local variables---------------------------------------------------------------------------------- +#define MSGHDR_SCALE m1 // Message Payload Header (Uses m2, m3, m4, m5 implicitly) + +//-------------------------------------------------------------------------------------------------- +//r10.0 thru r33.0; Primary surface read from sampler (16x8) +#define DEST_Y uwTOP_Y +#define DEST_U uwTOP_U +#define DEST_V uwTOP_V + +//r10.0 thru r41.0 +.declare DEST_B Base=REG(r,10) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw +.declare DEST_G Base=REG(r,18) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw +.declare DEST_R Base=REG(r,26) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw +.declare DEST_A Base=REG(r,34) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw + +//r56.0 thru r79.0 +.declare SCALE_RESPONSE_YF Base=REG(r,nBOT_Y) ElementSize=4 SrcRegion=REGION(8,1) Type=f +.declare SCALE_RESPONSE_UF Base=REG(r,nBOT_U) ElementSize=4 SrcRegion=REGION(8,1) Type=f +.declare SCALE_RESPONSE_VF Base=REG(r,nBOT_V) ElementSize=4 SrcRegion=REGION(8,1) Type=f + +.declare SCALE_RESPONSE_YW Base=REG(r,nBOT_Y) ElementSize=2 SrcRegion=REGION(16,1) Type=uw +.declare SCALE_RESPONSE_UW Base=REG(r,nBOT_U) ElementSize=2 SrcRegion=REGION(16,1) Type=uw +.declare SCALE_RESPONSE_VW Base=REG(r,nBOT_V) ElementSize=2 SrcRegion=REGION(16,1) Type=uw + +.declare SCALE_RESPONSE_YD Base=REG(r,nBOT_Y) ElementSize=4 SrcRegion=REGION(8,1) Type=ud +.declare SCALE_RESPONSE_UD Base=REG(r,nBOT_U) ElementSize=4 SrcRegion=REGION(8,1) Type=ud +.declare SCALE_RESPONSE_VD Base=REG(r,nBOT_V) ElementSize=4 SrcRegion=REGION(8,1) Type=ud + +.declare SCALE_RESPONSE_YB Base=REG(r,nBOT_Y) ElementSize=1 SrcRegion=REGION(8,4) Type=ub +.declare SCALE_RESPONSE_UB Base=REG(r,nBOT_U) ElementSize=1 SrcRegion=REGION(8,4) Type=ub +.declare SCALE_RESPONSE_VB Base=REG(r,nBOT_V) ElementSize=1 SrcRegion=REGION(8,4) Type=ub + +.declare SAMPLER_RAMP Base=REG(r,42) ElementSize=4 SrcRegion=<8;8,1> Type=f // 2 GRFs, 16 elements + +//#define SCALE_STEP_X REG2(r,43,0) +//#define SCALE_COORD_X REG2(r,43,3) + +#define SCALE_LINE_P255 REG2(r,43,4) // = 255.0 Used in 'line' inst to multiply 255, add 0.5, and round to int. +#define SCALE_LINE_P0_5 REG2(r,43,7) // = 0.5 + +//r44.0 thru r45.0 +#define SCALE_COORD_Y REG(r,44) //2GRF + + +// Send Message [DevILK] Message Descriptor +// MBZ MsgL=5 MsgR=8 H MBZ SIMD MsgType SmplrIndx BindTab +// 000 0 101 0 1000 1 0 10 0000 0000 00000000 +// 0 A 8 A 0 0 0 0 +// MsgL=1+2*2(u,v)=5 MsgR=8 +#define SMPLR_MSG_DSC 0x0A8A0000 // ILK Sampler Message Descriptor + +// Re-define new number of lines +#undef nY_NUM_OF_ROWS +#undef nUV_NUM_OF_ROWS + +#define nY_NUM_OF_ROWS 8 +#define nUV_NUM_OF_ROWS 8 + + +#endif //_SCALING_INC_ diff --git a/src/shaders/post_processing/Makefile.am b/src/shaders/post_processing/Makefile.am new file mode 100644 index 00000000..e5af86b4 --- /dev/null +++ b/src/shaders/post_processing/Makefile.am @@ -0,0 +1,142 @@ + +INTEL_G4I = + +INTEL_G4A = null.g4a + +INTEL_G4B = null.g4b + +INTEL_G4B_GEN5 = null.g4b.gen5 + +INTEL_G6A = null.g6a + +INTEL_G6B = null.g6b + +INTEL_PP_G4B_GEN5 = \ + nv12_avs_nv12.g4b.gen5 \ + nv12_dndi_nv12.g4b.gen5 \ + nv12_load_save_nv12.g4b.gen5 \ + nv12_scaling_nv12.g4b.gen5 + +INTEL_PP_G6B = \ + nv12_avs_nv12.g6b \ + nv12_dndi_nv12.g6b \ + nv12_load_save_nv12.g6b \ + nv12_scaling_nv12.g6b + +INTEL_PP_ASM = \ + Common/AYUV_Load_16x8.asm \ + Common/IMC3_Load_8x4.asm \ + Common/IMC3_Load_8x5.asm \ + Common/IMC3_Load_9x5.asm \ + Common/Init_All_Regs.asm \ + Common/Multiple_Loop.asm \ + Common/Multiple_Loop_Head.asm \ + Common/NV11_Load_4x8.asm \ + Common/NV11_Load_5x8.asm \ + Common/NV12_Load_8x4.asm \ + Common/NV12_Load_8x5.asm \ + Common/NV12_Load_9x5.asm \ + Common/P208_Load_8x8.asm \ + Common/P208_Load_9x8.asm \ + Common/PA_Load_8x8.asm \ + Common/PA_Load_9x8.asm \ + Common/PL16x8_PL8x4.asm \ + Common/PL16x8_PL8x8.asm \ + Common/PL4x8_Save_NV11.asm \ + Common/PL5x8_PL16x8.asm \ + Common/PL5x8_PL8x8.asm \ + Common/PL8x4_Save_IMC3.asm \ + Common/PL8x4_Save_NV12.asm \ + Common/PL8x5_PL8x8.asm \ + Common/PL8x8_PL8x4.asm \ + Common/PL8x8_Save_P208.asm \ + Common/PL8x8_Save_PA.asm \ + Common/PL9x5_PL16x8.asm \ + Common/PL9x8_PL16x8.asm \ + Common/readSampler16x1.asm \ + Common/RGB16x8_Save_RGB16.asm \ + Common/RGB16x8_Save_RGB.asm \ + Common/RGB16x8_Save_Y416.asm \ + Common/RGB_Pack.asm \ + Common/SetupVPKernel.asm \ + Core_Kernels/AVS_SetupFirstBlock.asm \ + Core_Kernels/AVS_SetupSecondBlock.asm \ + Core_Kernels/DI_Hist_Save.asm \ + Core_Kernels/DI_SAVE_PA.asm \ + Core_Kernels/DNDI_COMMAND.asm \ + Core_Kernels/DNDI_Hist_Save.asm \ + Core_Kernels/PA_AVS_IEF_16x8.asm \ + Core_Kernels/PA_AVS_IEF_8x4.asm \ + Core_Kernels/PA_AVS_IEF_8x8.asm \ + Core_Kernels/PA_AVS_IEF_Sample.asm \ + Core_Kernels/PA_AVS_IEF_Unpack_16x8.asm \ + Core_Kernels/PA_AVS_IEF_Unpack_8x4.asm \ + Core_Kernels/PA_AVS_IEF_Unpack_8x8.asm \ + Core_Kernels/PA_DN_ALG.asm \ + Core_Kernels/PA_DNDI_ALG.asm \ + Core_Kernels/PA_Scaling.asm \ + Core_Kernels/PL2_AVS_IEF_16x8.asm \ + Core_Kernels/PL2_AVS_IEF_8x4.asm \ + Core_Kernels/PL2_AVS_IEF_8x8.asm \ + Core_Kernels/PL2_AVS_IEF_Unpack_16x8.asm \ + Core_Kernels/PL2_AVS_IEF_Unpack_8x4.asm \ + Core_Kernels/PL2_AVS_IEF_Unpack_8x8.asm \ + Core_Kernels/PL2_Scaling.asm \ + Core_Kernels/PL3_AVS_IEF_16x8.asm \ + Core_Kernels/PL3_AVS_IEF_8x4.asm \ + Core_Kernels/PL3_AVS_IEF_8x8.asm \ + Core_Kernels/PL3_AVS_IEF_Unpack_16x8.asm \ + Core_Kernels/PL3_AVS_IEF_Unpack_8x4.asm \ + Core_Kernels/PL3_AVS_IEF_Unpack_8x8.asm \ + Core_Kernels/PL3_Scaling.asm \ + Core_Kernels/PL_DN_ALG.asm \ + Core_Kernels/PL_DNDI_ALG.asm \ + Core_Kernels/PL_DNDI_ALG_UVCopy_NV11.asm \ + Core_Kernels/PL_DNDI_ALG_UVCopy_NV12.asm \ + Core_Kernels/PL_DNDI_ALG_UVCopy_P208.asm \ + Core_Kernels/PL_DNDI_ALG_UVCopy_PL3.asm \ + Core_Kernels/RGB_AVS_IEF_16x8.asm \ + Core_Kernels/RGB_AVS_IEF_Unpack_16x8.asm \ + Core_Kernels/RGB_AVS_IEF_Unscramble_16x8.asm \ + Core_Kernels/RGB_Scaling.asm + +EXTRA_DIST = $(INTEL_G4I) \ + $(INTEL_G4A) \ + $(INTEL_G4B) \ + $(INTEL_G4B_GEN5) + +if HAVE_GEN4ASM + +SUFFIXES = .g4a .g4b .g6a .g6b +.g4a.g4b: + m4 $*.g4a > $*.g4m && intel-gen4asm -o $@ $*.g4m && intel-gen4asm -g 5 -o $@.gen5 $*.g4m && rm $*.g4m + +.g6a.g6b: + m4 $< > $*.g6m && intel-gen4asm -g 6 -o $@ $*.g6m && rm $*.g6m + +$(INTEL_G4B): $(INTEL_G4I) + +$(INTEL_PP_G4B_GEN5): $(INTEL_PP_ASM) + @_PP_TARGET=$@; \ + cpp -D DEV_ILK -I Common/ -I Core_Kernels $${_PP_TARGET/.g4b.gen5/.asm} > _pp0.asm; \ + ../gpp.py _pp0.asm _pp1.asm; \ + intel-gen4asm -a -o $@ -g 5 _pp1.asm; \ + rm _pp0.asm _pp1.asm + +$(INTEL_PP_G6B): $(INTEL_PP_ASM) + @_PP_TARGET=$@; \ + cpp -D GT -I Common/ -I Core_Kernels $${_PP_TARGET/.g6b/.asm} > _pp0.asm; \ + ../gpp.py _pp0.asm _pp1.asm; \ + intel-gen4asm -a -o $@ -g 6 _pp1.asm; \ + rm _pp0.asm _pp1.asm + +BUILT_SOURCES= $(INTEL_G4B) $(INTEL_G6B) $(INTEL_PP_G4B_GEN5) $(INTEL_PP_G6B) + +clean-local: + -rm -f $(INTEL_G4B) + -rm -f $(INTEL_G4B_GEN5) + -rm -f $(INTEL_PP_G4B_GEN5) + -rm -f $(INTEL_G6B) + -rm -f $(INTEL_PP_G6B) + +endif diff --git a/src/shaders/post_processing/null.g4a b/src/shaders/post_processing/null.g4a new file mode 100644 index 00000000..cde124a3 --- /dev/null +++ b/src/shaders/post_processing/null.g4a @@ -0,0 +1,3 @@ +/* Just for test */ + +send(16) 0 acc0<1>UW g0<8,8,1>UW thread_spawner(0, 0, 0) mlen 1 rlen 0 {align1 EOT}; diff --git a/src/shaders/post_processing/null.g4b b/src/shaders/post_processing/null.g4b new file mode 100644 index 00000000..d8f28e7d --- /dev/null +++ b/src/shaders/post_processing/null.g4b @@ -0,0 +1 @@ + { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, diff --git a/src/shaders/post_processing/null.g4b.gen5 b/src/shaders/post_processing/null.g4b.gen5 new file mode 100644 index 00000000..2bd0ba6c --- /dev/null +++ b/src/shaders/post_processing/null.g4b.gen5 @@ -0,0 +1 @@ + { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, diff --git a/src/shaders/post_processing/null.g6a b/src/shaders/post_processing/null.g6a new file mode 100644 index 00000000..cde124a3 --- /dev/null +++ b/src/shaders/post_processing/null.g6a @@ -0,0 +1,3 @@ +/* Just for test */ + +send(16) 0 acc0<1>UW g0<8,8,1>UW thread_spawner(0, 0, 0) mlen 1 rlen 0 {align1 EOT}; diff --git a/src/shaders/post_processing/null.g6b b/src/shaders/post_processing/null.g6b new file mode 100644 index 00000000..e52415c4 --- /dev/null +++ b/src/shaders/post_processing/null.g6b @@ -0,0 +1 @@ + { 0x07800031, 0x24001cc8, 0x00000000, 0x82000000 }, diff --git a/src/shaders/post_processing/nv12_avs_nv12.asm b/src/shaders/post_processing/nv12_avs_nv12.asm new file mode 100644 index 00000000..80665e0d --- /dev/null +++ b/src/shaders/post_processing/nv12_avs_nv12.asm @@ -0,0 +1,19 @@ +// Module name: NV12_AVS_NV12 +.kernel NV12_AVS_NV12 +.code + +#define INC_SCALING + +#include "SetupVPKernel.asm" +#include "Multiple_Loop_Head.asm" +#include "PL2_AVS_IEF_16x8.asm" +#include "PL8x4_Save_NV12.asm" +#include "Multiple_Loop.asm" + +END_THREAD // End of Thread + +.end_code + +.end_kernel + +// end of nv12_avs_nv12.asm diff --git a/src/shaders/post_processing/nv12_avs_nv12.g4b.gen5 b/src/shaders/post_processing/nv12_avs_nv12.g4b.gen5 new file mode 100644 index 00000000..1fa42616 --- /dev/null +++ b/src/shaders/post_processing/nv12_avs_nv12.g4b.gen5 @@ -0,0 +1,162 @@ + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x01000005, 0x20002d2c, 0x00000088, 0x80008000 }, + { 0x00010001, 0x20c003fd, 0x00000000, 0x00000000 }, + { 0x00000001, 0x212003bd, 0x000000c0, 0x00000000 }, + { 0x00000001, 0x212403bd, 0x000000bc, 0x00000000 }, + { 0x00000001, 0x213403bd, 0x00000038, 0x00000000 }, + { 0x00200001, 0x612803bd, 0x004500a4, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0000d000 }, + { 0x00802001, 0x20000022, 0x008d0100, 0x00000000 }, + { 0x00000031, 0x25401c09, 0x208d0000, 0x044bb401 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0000a000 }, + { 0x00802001, 0x20400022, 0x008d0100, 0x00000000 }, + { 0x02000031, 0x25c01c09, 0x208d0000, 0x048bb802 }, + { 0x00000001, 0x240803bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x24087fbc, 0x000000bc, 0x41000000 }, + { 0x00000048, 0x21287fbd, 0x000000c0, 0x41e00000 }, + { 0x00000001, 0x240403bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x21247fbd, 0x000000c0, 0x41000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0000d000 }, + { 0x00802001, 0x20000022, 0x008d0100, 0x00000000 }, + { 0x00000031, 0x27401c09, 0x208d0000, 0x044bb401 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0000a000 }, + { 0x00802001, 0x20400022, 0x008d0100, 0x00000000 }, + { 0x02000031, 0x27c01c09, 0x208d0000, 0x048bb802 }, + { 0x00600001, 0x21400229, 0x00aa0541, 0x00000000 }, + { 0x00600001, 0x21600229, 0x00aa0549, 0x00000000 }, + { 0x00600001, 0x21800229, 0x00aa0561, 0x00000000 }, + { 0x00600001, 0x21a00229, 0x00aa0569, 0x00000000 }, + { 0x00600001, 0x21c00229, 0x00aa0581, 0x00000000 }, + { 0x00600001, 0x21e00229, 0x00aa0589, 0x00000000 }, + { 0x00600001, 0x22000229, 0x00aa05a1, 0x00000000 }, + { 0x00600001, 0x22200229, 0x00aa05a9, 0x00000000 }, + { 0x00600001, 0x23400229, 0x00aa05c1, 0x00000000 }, + { 0x00600001, 0x23600229, 0x00aa05c9, 0x00000000 }, + { 0x00600001, 0x23800229, 0x00aa05e1, 0x00000000 }, + { 0x00600001, 0x23a00229, 0x00aa05e9, 0x00000000 }, + { 0x00600001, 0x23c00229, 0x00aa0641, 0x00000000 }, + { 0x00600001, 0x23e00229, 0x00aa0649, 0x00000000 }, + { 0x00600001, 0x24000229, 0x00aa0661, 0x00000000 }, + { 0x00600001, 0x24200229, 0x00aa0669, 0x00000000 }, + { 0x00600001, 0x22400229, 0x00aa0601, 0x00000000 }, + { 0x00600001, 0x22600229, 0x00aa0609, 0x00000000 }, + { 0x00600001, 0x22800229, 0x00aa0621, 0x00000000 }, + { 0x00600001, 0x22a00229, 0x00aa0629, 0x00000000 }, + { 0x00600001, 0x22c00229, 0x00aa0681, 0x00000000 }, + { 0x00600001, 0x22e00229, 0x00aa0689, 0x00000000 }, + { 0x00600001, 0x23000229, 0x00aa06a1, 0x00000000 }, + { 0x00600001, 0x23200229, 0x00aa06a9, 0x00000000 }, + { 0x00600001, 0x21500229, 0x00aa0741, 0x00000000 }, + { 0x00600001, 0x21700229, 0x00aa0749, 0x00000000 }, + { 0x00600001, 0x21900229, 0x00aa0761, 0x00000000 }, + { 0x00600001, 0x21b00229, 0x00aa0769, 0x00000000 }, + { 0x00600001, 0x21d00229, 0x00aa0781, 0x00000000 }, + { 0x00600001, 0x21f00229, 0x00aa0789, 0x00000000 }, + { 0x00600001, 0x22100229, 0x00aa07a1, 0x00000000 }, + { 0x00600001, 0x22300229, 0x00aa07a9, 0x00000000 }, + { 0x00600001, 0x23500229, 0x00aa07c1, 0x00000000 }, + { 0x00600001, 0x23700229, 0x00aa07c9, 0x00000000 }, + { 0x00600001, 0x23900229, 0x00aa07e1, 0x00000000 }, + { 0x00600001, 0x23b00229, 0x00aa07e9, 0x00000000 }, + { 0x00600001, 0x23d00229, 0x00aa0841, 0x00000000 }, + { 0x00600001, 0x23f00229, 0x00aa0849, 0x00000000 }, + { 0x00600001, 0x24100229, 0x00aa0861, 0x00000000 }, + { 0x00600001, 0x24300229, 0x00aa0869, 0x00000000 }, + { 0x00600001, 0x22500229, 0x00aa0801, 0x00000000 }, + { 0x00600001, 0x22700229, 0x00aa0809, 0x00000000 }, + { 0x00600001, 0x22900229, 0x00aa0821, 0x00000000 }, + { 0x00600001, 0x22b00229, 0x00aa0829, 0x00000000 }, + { 0x00600001, 0x22d00229, 0x00aa0881, 0x00000000 }, + { 0x00600001, 0x22f00229, 0x00aa0889, 0x00000000 }, + { 0x00600001, 0x23100229, 0x00aa08a1, 0x00000000 }, + { 0x00600001, 0x23300229, 0x00aa08a9, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00200001, 0x202001a6, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x20280062, 0x00000000, 0x0007000f }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000056 }, + { 0x01600031, 0x27000c01, 0x408d0000, 0x0248a007 }, + { 0x0000040c, 0x21043da1, 0x000000a2, 0x00010001 }, + { 0x00000801, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x28000c01, 0x408d0000, 0x0228a008 }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x26020228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x020000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x02000000, 0x00000000 }, + { 0x00000001, 0x24600061, 0x00000000, 0x00040001 }, + { 0x00000001, 0x24640061, 0x00000000, 0x00400010 }, + { 0x00000001, 0x24680061, 0x00000000, 0x04000100 }, + { 0x00000001, 0x246c0061, 0x00000000, 0x40001000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000440, 0x008d0460 }, + { 0x00710001, 0x42400231, 0x02ae0800, 0x00000000 }, + { 0x00710001, 0x43400231, 0x02ae0801, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000444, 0x008d0460 }, + { 0x00710001, 0x42500231, 0x02ae0810, 0x00000000 }, + { 0x00710001, 0x43500231, 0x02ae0811, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000448, 0x008d0460 }, + { 0x00710001, 0x42600231, 0x02ae0820, 0x00000000 }, + { 0x00710001, 0x43600231, 0x02ae0821, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x0200044c, 0x008d0460 }, + { 0x00710001, 0x42700231, 0x02ae0830, 0x00000000 }, + { 0x00710001, 0x43700231, 0x02ae0831, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x0a082007 }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x40400232, 0x00d20240, 0x00000000 }, + { 0x00800001, 0x40410232, 0x00d20340, 0x00000000 }, + { 0x00800001, 0x40600232, 0x00d20260, 0x00000000 }, + { 0x00800001, 0x40610232, 0x00d20360, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x06082008 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00000041, 0x24407fbd, 0x000000bc, 0x41800000 }, + { 0x00000040, 0x20a477bd, 0x00000440, 0x000000a4 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00010220, 0x34001c00, 0x02001400, 0xfffffede }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000001, 0x20a403bd, 0x00000094, 0x00000000 }, + { 0x00000041, 0x24407fbd, 0x00000038, 0x41000000 }, + { 0x00000040, 0x20a877bd, 0x00000440, 0x000000a8 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffed2 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, diff --git a/src/shaders/post_processing/nv12_avs_nv12.g6b b/src/shaders/post_processing/nv12_avs_nv12.g6b new file mode 100644 index 00000000..7e1dfc3c --- /dev/null +++ b/src/shaders/post_processing/nv12_avs_nv12.g6b @@ -0,0 +1,235 @@ + { 0x00600001, 0x20e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x01000005, 0x20002d2c, 0x00000088, 0x80008000 }, + { 0x00010001, 0x20c003fd, 0x00000000, 0x00000000 }, + { 0x00000001, 0x212003bd, 0x000000c0, 0x00000000 }, + { 0x00000001, 0x212403bd, 0x000000bc, 0x00000000 }, + { 0x00000001, 0x213403bd, 0x00000038, 0x00000000 }, + { 0x00200001, 0x612803bd, 0x004500a4, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0000d000 }, + { 0x00800001, 0x20000022, 0x008d0100, 0x00000000 }, + { 0x02000031, 0x25401cc9, 0x00000000, 0x044bb401 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0000a000 }, + { 0x00800001, 0x20400022, 0x008d0100, 0x00000000 }, + { 0x02000031, 0x25c01cc9, 0x00000040, 0x048bb802 }, + { 0x00000001, 0x240803bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x24087fbc, 0x000000bc, 0x41000000 }, + { 0x00000048, 0x21287fbd, 0x000000c0, 0x41e00000 }, + { 0x00000001, 0x240403bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x21247fbd, 0x000000c0, 0x41000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0000d000 }, + { 0x00800001, 0x20000022, 0x008d0100, 0x00000000 }, + { 0x02000031, 0x27401cc9, 0x00000000, 0x044bb401 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0000a000 }, + { 0x00800001, 0x20400022, 0x008d0100, 0x00000000 }, + { 0x02000031, 0x27c01cc9, 0x00000040, 0x048bb802 }, + { 0x00600001, 0x21400229, 0x00aa0541, 0x00000000 }, + { 0x00600001, 0x21600229, 0x00aa0549, 0x00000000 }, + { 0x00600001, 0x21800229, 0x00aa0561, 0x00000000 }, + { 0x00600001, 0x21a00229, 0x00aa0569, 0x00000000 }, + { 0x00600001, 0x21c00229, 0x00aa0581, 0x00000000 }, + { 0x00600001, 0x21e00229, 0x00aa0589, 0x00000000 }, + { 0x00600001, 0x22000229, 0x00aa05a1, 0x00000000 }, + { 0x00600001, 0x22200229, 0x00aa05a9, 0x00000000 }, + { 0x00600001, 0x23400229, 0x00aa05c1, 0x00000000 }, + { 0x00600001, 0x23600229, 0x00aa05c9, 0x00000000 }, + { 0x00600001, 0x23800229, 0x00aa05e1, 0x00000000 }, + { 0x00600001, 0x23a00229, 0x00aa05e9, 0x00000000 }, + { 0x00600001, 0x23c00229, 0x00aa0641, 0x00000000 }, + { 0x00600001, 0x23e00229, 0x00aa0649, 0x00000000 }, + { 0x00600001, 0x24000229, 0x00aa0661, 0x00000000 }, + { 0x00600001, 0x24200229, 0x00aa0669, 0x00000000 }, + { 0x00600001, 0x22400229, 0x00aa0601, 0x00000000 }, + { 0x00600001, 0x22600229, 0x00aa0609, 0x00000000 }, + { 0x00600001, 0x22800229, 0x00aa0621, 0x00000000 }, + { 0x00600001, 0x22a00229, 0x00aa0629, 0x00000000 }, + { 0x00600001, 0x22c00229, 0x00aa0681, 0x00000000 }, + { 0x00600001, 0x22e00229, 0x00aa0689, 0x00000000 }, + { 0x00600001, 0x23000229, 0x00aa06a1, 0x00000000 }, + { 0x00600001, 0x23200229, 0x00aa06a9, 0x00000000 }, + { 0x00600001, 0x21500229, 0x00aa0741, 0x00000000 }, + { 0x00600001, 0x21700229, 0x00aa0749, 0x00000000 }, + { 0x00600001, 0x21900229, 0x00aa0761, 0x00000000 }, + { 0x00600001, 0x21b00229, 0x00aa0769, 0x00000000 }, + { 0x00600001, 0x21d00229, 0x00aa0781, 0x00000000 }, + { 0x00600001, 0x21f00229, 0x00aa0789, 0x00000000 }, + { 0x00600001, 0x22100229, 0x00aa07a1, 0x00000000 }, + { 0x00600001, 0x22300229, 0x00aa07a9, 0x00000000 }, + { 0x00600001, 0x23500229, 0x00aa07c1, 0x00000000 }, + { 0x00600001, 0x23700229, 0x00aa07c9, 0x00000000 }, + { 0x00600001, 0x23900229, 0x00aa07e1, 0x00000000 }, + { 0x00600001, 0x23b00229, 0x00aa07e9, 0x00000000 }, + { 0x00600001, 0x23d00229, 0x00aa0841, 0x00000000 }, + { 0x00600001, 0x23f00229, 0x00aa0849, 0x00000000 }, + { 0x00600001, 0x24100229, 0x00aa0861, 0x00000000 }, + { 0x00600001, 0x24300229, 0x00aa0869, 0x00000000 }, + { 0x00600001, 0x22500229, 0x00aa0801, 0x00000000 }, + { 0x00600001, 0x22700229, 0x00aa0809, 0x00000000 }, + { 0x00600001, 0x22900229, 0x00aa0821, 0x00000000 }, + { 0x00600001, 0x22b00229, 0x00aa0829, 0x00000000 }, + { 0x00600001, 0x22d00229, 0x00aa0881, 0x00000000 }, + { 0x00600001, 0x22f00229, 0x00aa0889, 0x00000000 }, + { 0x00600001, 0x23100229, 0x00aa08a1, 0x00000000 }, + { 0x00600001, 0x23300229, 0x00aa08a9, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00200001, 0x202001a6, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x20280062, 0x00000000, 0x0007000f }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000056 }, + { 0x04600031, 0x27000cc1, 0x00000020, 0x02498007 }, + { 0x0000040c, 0x21043da1, 0x000000a2, 0x00010001 }, + { 0x00000801, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x28000cc1, 0x00000020, 0x02298008 }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x26020228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x020000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x02000000, 0x00000000 }, + { 0x00000001, 0x24600061, 0x00000000, 0x00040001 }, + { 0x00000001, 0x24640061, 0x00000000, 0x00400010 }, + { 0x00000001, 0x24680061, 0x00000000, 0x04000100 }, + { 0x00000001, 0x246c0061, 0x00000000, 0x40001000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000440, 0x008d0460 }, + { 0x00710001, 0x42400231, 0x02ae0800, 0x00000000 }, + { 0x00710001, 0x43400231, 0x02ae0801, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000444, 0x008d0460 }, + { 0x00710001, 0x42500231, 0x02ae0810, 0x00000000 }, + { 0x00710001, 0x43500231, 0x02ae0811, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000448, 0x008d0460 }, + { 0x00710001, 0x42600231, 0x02ae0820, 0x00000000 }, + { 0x00710001, 0x43600231, 0x02ae0821, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x0200044c, 0x008d0460 }, + { 0x00710001, 0x42700231, 0x02ae0830, 0x00000000 }, + { 0x00710001, 0x43700231, 0x02ae0831, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x0a094007 }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x40400232, 0x00d20240, 0x00000000 }, + { 0x00800001, 0x40410232, 0x00d20340, 0x00000000 }, + { 0x00800001, 0x40600232, 0x00d20260, 0x00000000 }, + { 0x00800001, 0x40610232, 0x00d20360, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x06094008 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00000041, 0x24407fbd, 0x000000bc, 0x41800000 }, + { 0x00000040, 0x20a477bd, 0x00000440, 0x000000a4 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00010220, 0x34001c00, 0x02001400, 0xfffffede }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000001, 0x20a403bd, 0x00000094, 0x00000000 }, + { 0x00000041, 0x24407fbd, 0x00000038, 0x41000000 }, + { 0x00000040, 0x20a877bd, 0x00000440, 0x000000a8 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffed2 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, diff --git a/src/shaders/post_processing/nv12_dndi_nv12.asm b/src/shaders/post_processing/nv12_dndi_nv12.asm new file mode 100644 index 00000000..3ea9cea7 --- /dev/null +++ b/src/shaders/post_processing/nv12_dndi_nv12.asm @@ -0,0 +1,18 @@ +// Module name: NV12_DNDI_NV12 +.kernel NV12_DNDI_NV12 +.code + +#define INC_DNDI + +#include "SetupVPKernel.asm" +#include "Multiple_Loop_Head.asm" +#include "PL_DNDI_ALG_UVCopy_NV12.asm" +#include "Multiple_Loop.asm" + +END_THREAD // End of Thread + +.end_code + +.end_kernel + +// end of nv12_dndi_nv12.asm diff --git a/src/shaders/post_processing/nv12_dndi_nv12.g4b.gen5 b/src/shaders/post_processing/nv12_dndi_nv12.g4b.gen5 new file mode 100644 index 00000000..6c0474dc --- /dev/null +++ b/src/shaders/post_processing/nv12_dndi_nv12.g4b.gen5 @@ -0,0 +1,86 @@ + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x204801aa, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x205801aa, 0x000000a2, 0x00000000 }, + { 0x01600031, 0x24400c01, 0x208d0000, 0x04cb8004 }, + { 0x00800001, 0x21400229, 0x00b10440, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00b10450, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00b10460, 0x00000000 }, + { 0x00800001, 0x21a00229, 0x00b10470, 0x00000000 }, + { 0x00600001, 0x22400229, 0x00ae0481, 0x00000000 }, + { 0x00600001, 0x23400229, 0x00ae0480, 0x00000000 }, + { 0x00600001, 0x22500229, 0x00ae0491, 0x00000000 }, + { 0x00600001, 0x23500229, 0x00ae0490, 0x00000000 }, + { 0x00600001, 0x22600229, 0x00ae04a1, 0x00000000 }, + { 0x00600001, 0x23600229, 0x00ae04a0, 0x00000000 }, + { 0x00600001, 0x22700229, 0x00ae04b1, 0x00000000 }, + { 0x00600001, 0x23700229, 0x00ae04b0, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00b104d0, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00b104e0, 0x00000000 }, + { 0x00800001, 0x22200229, 0x00b104f0, 0x00000000 }, + { 0x00600001, 0x22800229, 0x00ae0501, 0x00000000 }, + { 0x00600001, 0x23800229, 0x00ae0500, 0x00000000 }, + { 0x00600001, 0x22900229, 0x00ae0511, 0x00000000 }, + { 0x00600001, 0x23900229, 0x00ae0510, 0x00000000 }, + { 0x00600001, 0x22a00229, 0x00ae0521, 0x00000000 }, + { 0x00600001, 0x23a00229, 0x00ae0520, 0x00000000 }, + { 0x00600001, 0x22b00229, 0x00ae0531, 0x00000000 }, + { 0x00600001, 0x23b00229, 0x00ae0530, 0x00000000 }, + { 0x00000008, 0x21003da1, 0x000000a0, 0x00010001 }, + { 0x00000001, 0x210401a1, 0x000000a2, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x00030007 }, + { 0x00600001, 0x21600022, 0x008d0100, 0x00000000 }, + { 0x00600001, 0x21800022, 0x008d0540, 0x00000000 }, + { 0x0b600031, 0x20000c04, 0x508d0000, 0x04082014 }, + { 0x00200008, 0x21003da1, 0x004500a0, 0x00020002 }, + { 0x00000040, 0x21002421, 0x00000100, 0x00000034 }, + { 0x00000001, 0x21080061, 0x00000000, 0x00000003 }, + { 0x00600001, 0x21a00022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x21c00022, 0x00000560, 0x00000000 }, + { 0x0d600031, 0x20000c04, 0x508d0000, 0x04082014 }, + { 0x00400040, 0x22083e28, 0x00690024, 0x07000700 }, + { 0x01000010, 0x20003e2c, 0x0000003b, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000a }, + { 0x00400001, 0x20400022, 0x00690580, 0x00000000 }, + { 0x00400001, 0x20500022, 0x006904d0, 0x00000000 }, + { 0x00400001, 0x20600022, 0x00690590, 0x00000000 }, + { 0x00400001, 0x20700022, 0x006904f0, 0x00000000 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000008 }, + { 0x00400001, 0x20400022, 0x006904c0, 0x00000000 }, + { 0x00400001, 0x20500022, 0x00690580, 0x00000000 }, + { 0x00400001, 0x20600022, 0x006904e0, 0x00000000 }, + { 0x00400001, 0x20700022, 0x00690590, 0x00000000 }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x06082007 }, + { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0001000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x28000c01, 0x408d0000, 0x0218a002 }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0001000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00600001, 0x20400022, 0x008d0800, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x04082008 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000008 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xffffff70 }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffff6a }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, diff --git a/src/shaders/post_processing/nv12_dndi_nv12.g6b b/src/shaders/post_processing/nv12_dndi_nv12.g6b new file mode 100644 index 00000000..cb99effa --- /dev/null +++ b/src/shaders/post_processing/nv12_dndi_nv12.g6b @@ -0,0 +1,159 @@ + { 0x00600001, 0x20e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x204801aa, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x205801aa, 0x000000a2, 0x00000000 }, + { 0x02600031, 0x24400cc1, 0x00000020, 0x04cb8004 }, + { 0x00800001, 0x21400229, 0x00b10440, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00b10450, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00b10460, 0x00000000 }, + { 0x00800001, 0x21a00229, 0x00b10470, 0x00000000 }, + { 0x00600001, 0x22400229, 0x00ae0481, 0x00000000 }, + { 0x00600001, 0x23400229, 0x00ae0480, 0x00000000 }, + { 0x00600001, 0x22500229, 0x00ae0491, 0x00000000 }, + { 0x00600001, 0x23500229, 0x00ae0490, 0x00000000 }, + { 0x00600001, 0x22600229, 0x00ae04a1, 0x00000000 }, + { 0x00600001, 0x23600229, 0x00ae04a0, 0x00000000 }, + { 0x00600001, 0x22700229, 0x00ae04b1, 0x00000000 }, + { 0x00600001, 0x23700229, 0x00ae04b0, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00b104d0, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00b104e0, 0x00000000 }, + { 0x00800001, 0x22200229, 0x00b104f0, 0x00000000 }, + { 0x00600001, 0x22800229, 0x00ae0501, 0x00000000 }, + { 0x00600001, 0x23800229, 0x00ae0500, 0x00000000 }, + { 0x00600001, 0x22900229, 0x00ae0511, 0x00000000 }, + { 0x00600001, 0x23900229, 0x00ae0510, 0x00000000 }, + { 0x00600001, 0x22a00229, 0x00ae0521, 0x00000000 }, + { 0x00600001, 0x23a00229, 0x00ae0520, 0x00000000 }, + { 0x00600001, 0x22b00229, 0x00ae0531, 0x00000000 }, + { 0x00600001, 0x23b00229, 0x00ae0530, 0x00000000 }, + { 0x00000008, 0x21003da1, 0x000000a0, 0x00010001 }, + { 0x00000001, 0x210401a1, 0x000000a2, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x00030007 }, + { 0x00600001, 0x21600022, 0x008d0100, 0x00000000 }, + { 0x00600001, 0x21800022, 0x008d0540, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000160, 0x04094014 }, + { 0x00200008, 0x21003da1, 0x004500a0, 0x00020002 }, + { 0x00000040, 0x21002421, 0x00000100, 0x00000034 }, + { 0x00000001, 0x21080061, 0x00000000, 0x00000003 }, + { 0x00600001, 0x21a00022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x21c00022, 0x00000560, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x000001a0, 0x04094014 }, + { 0x00400040, 0x22083e28, 0x00690024, 0x07000700 }, + { 0x01000010, 0x20003e2c, 0x0000003b, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000a }, + { 0x00400001, 0x20400022, 0x00690580, 0x00000000 }, + { 0x00400001, 0x20500022, 0x006904d0, 0x00000000 }, + { 0x00400001, 0x20600022, 0x00690590, 0x00000000 }, + { 0x00400001, 0x20700022, 0x006904f0, 0x00000000 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000008 }, + { 0x00400001, 0x20400022, 0x006904c0, 0x00000000 }, + { 0x00400001, 0x20500022, 0x00690580, 0x00000000 }, + { 0x00400001, 0x20600022, 0x006904e0, 0x00000000 }, + { 0x00400001, 0x20700022, 0x00690590, 0x00000000 }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x06094007 }, + { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0001000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x28000cc1, 0x00000020, 0x02198002 }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0001000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00600001, 0x20400022, 0x008d0800, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x04094008 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000008 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xffffff70 }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffff6a }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, diff --git a/src/shaders/post_processing/nv12_load_save_nv12.asm b/src/shaders/post_processing/nv12_load_save_nv12.asm new file mode 100644 index 00000000..f234f83b --- /dev/null +++ b/src/shaders/post_processing/nv12_load_save_nv12.asm @@ -0,0 +1,17 @@ +// Module name: NV12_LOAD_SAVE_NV12 +.kernel NV12_LOAD_SAVE_NV12 +.code + +#include "SetupVPKernel.asm" +#include "Multiple_Loop_Head.asm" +#include "NV12_Load_8x4.asm" +#include "PL8x4_Save_NV12.asm" +#include "Multiple_Loop.asm" + +END_THREAD // End of Thread + +.end_code + +.end_kernel + +// end of nv12_load_save_nv12.asm diff --git a/src/shaders/post_processing/nv12_load_save_nv12.g4b.gen5 b/src/shaders/post_processing/nv12_load_save_nv12.g4b.gen5 new file mode 100644 index 00000000..d511d4f8 --- /dev/null +++ b/src/shaders/post_processing/nv12_load_save_nv12.g4b.gen5 @@ -0,0 +1,106 @@ + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x27000c01, 0x408d0000, 0x0248a001 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20400022, 0x008d0100, 0x00000000 }, + { 0x02600031, 0x28000c01, 0x408d0000, 0x0228a002 }, + { 0x00800001, 0x22200229, 0x00b10770, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00b10760, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00b10750, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00b10740, 0x00000000 }, + { 0x00800001, 0x21a00229, 0x00b10730, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00b10720, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00b10710, 0x00000000 }, + { 0x00800001, 0x21400229, 0x00b10700, 0x00000000 }, + { 0x00800001, 0x22600229, 0x00d20820, 0x00000000 }, + { 0x00800001, 0x23600229, 0x00d20821, 0x00000000 }, + { 0x00800001, 0x22400229, 0x00d20800, 0x00000000 }, + { 0x00800001, 0x23400229, 0x00d20801, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00200001, 0x202001a6, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x20280062, 0x00000000, 0x0007000f }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000056 }, + { 0x01600031, 0x27000c01, 0x408d0000, 0x0248a007 }, + { 0x0000040c, 0x21043da1, 0x000000a2, 0x00010001 }, + { 0x00000801, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x28000c01, 0x408d0000, 0x0228a008 }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x26020228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x020000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x02000000, 0x00000000 }, + { 0x00000001, 0x24600061, 0x00000000, 0x00040001 }, + { 0x00000001, 0x24640061, 0x00000000, 0x00400010 }, + { 0x00000001, 0x24680061, 0x00000000, 0x04000100 }, + { 0x00000001, 0x246c0061, 0x00000000, 0x40001000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000440, 0x008d0460 }, + { 0x00710001, 0x42400231, 0x02ae0800, 0x00000000 }, + { 0x00710001, 0x43400231, 0x02ae0801, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000444, 0x008d0460 }, + { 0x00710001, 0x42500231, 0x02ae0810, 0x00000000 }, + { 0x00710001, 0x43500231, 0x02ae0811, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000448, 0x008d0460 }, + { 0x00710001, 0x42600231, 0x02ae0820, 0x00000000 }, + { 0x00710001, 0x43600231, 0x02ae0821, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x0200044c, 0x008d0460 }, + { 0x00710001, 0x42700231, 0x02ae0830, 0x00000000 }, + { 0x00710001, 0x43700231, 0x02ae0831, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x0a082007 }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x40400232, 0x00d20240, 0x00000000 }, + { 0x00800001, 0x40410232, 0x00d20340, 0x00000000 }, + { 0x00800001, 0x40600232, 0x00d20260, 0x00000000 }, + { 0x00800001, 0x40610232, 0x00d20360, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x06082008 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000008 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xffffff48 }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffff42 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, diff --git a/src/shaders/post_processing/nv12_load_save_nv12.g6b b/src/shaders/post_processing/nv12_load_save_nv12.g6b new file mode 100644 index 00000000..6e76bd9c --- /dev/null +++ b/src/shaders/post_processing/nv12_load_save_nv12.g6b @@ -0,0 +1,179 @@ + { 0x00600001, 0x20e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x27000cc1, 0x00000020, 0x02498001 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20400022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x28000cc1, 0x00000040, 0x02298002 }, + { 0x00800001, 0x22200229, 0x00b10770, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00b10760, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00b10750, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00b10740, 0x00000000 }, + { 0x00800001, 0x21a00229, 0x00b10730, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00b10720, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00b10710, 0x00000000 }, + { 0x00800001, 0x21400229, 0x00b10700, 0x00000000 }, + { 0x00800001, 0x22600229, 0x00d20820, 0x00000000 }, + { 0x00800001, 0x23600229, 0x00d20821, 0x00000000 }, + { 0x00800001, 0x22400229, 0x00d20800, 0x00000000 }, + { 0x00800001, 0x23400229, 0x00d20801, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00200001, 0x202001a6, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x20280062, 0x00000000, 0x0007000f }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000056 }, + { 0x04600031, 0x27000cc1, 0x00000020, 0x02498007 }, + { 0x0000040c, 0x21043da1, 0x000000a2, 0x00010001 }, + { 0x00000801, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x28000cc1, 0x00000020, 0x02298008 }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x26020228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x020000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x02000000, 0x00000000 }, + { 0x00000001, 0x24600061, 0x00000000, 0x00040001 }, + { 0x00000001, 0x24640061, 0x00000000, 0x00400010 }, + { 0x00000001, 0x24680061, 0x00000000, 0x04000100 }, + { 0x00000001, 0x246c0061, 0x00000000, 0x40001000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000440, 0x008d0460 }, + { 0x00710001, 0x42400231, 0x02ae0800, 0x00000000 }, + { 0x00710001, 0x43400231, 0x02ae0801, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000444, 0x008d0460 }, + { 0x00710001, 0x42500231, 0x02ae0810, 0x00000000 }, + { 0x00710001, 0x43500231, 0x02ae0811, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000448, 0x008d0460 }, + { 0x00710001, 0x42600231, 0x02ae0820, 0x00000000 }, + { 0x00710001, 0x43600231, 0x02ae0821, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x0200044c, 0x008d0460 }, + { 0x00710001, 0x42700231, 0x02ae0830, 0x00000000 }, + { 0x00710001, 0x43700231, 0x02ae0831, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x0a094007 }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x40400232, 0x00d20240, 0x00000000 }, + { 0x00800001, 0x40410232, 0x00d20340, 0x00000000 }, + { 0x00800001, 0x40600232, 0x00d20260, 0x00000000 }, + { 0x00800001, 0x40610232, 0x00d20360, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x06094008 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000008 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xffffff48 }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffff42 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, diff --git a/src/shaders/post_processing/nv12_scaling_nv12.asm b/src/shaders/post_processing/nv12_scaling_nv12.asm new file mode 100644 index 00000000..d93d8795 --- /dev/null +++ b/src/shaders/post_processing/nv12_scaling_nv12.asm @@ -0,0 +1,20 @@ +// Module name: NV12_SCALING_NV12 +.kernel NV12_SCALING_NV12 +.code + +#define INC_SCALING + +#include "SetupVPKernel.asm" +#include "Multiple_Loop_Head.asm" +#include "PL2_Scaling.asm" +#include "PL16x8_PL8x4.asm" +#include "PL8x4_Save_NV12.asm" +#include "Multiple_Loop.asm" + +END_THREAD // End of Thread + +.end_code + +.end_kernel + +// end of nv12_scaling_nv12.asm diff --git a/src/shaders/post_processing/nv12_scaling_nv12.g4b.gen5 b/src/shaders/post_processing/nv12_scaling_nv12.g4b.gen5 new file mode 100644 index 00000000..476b4413 --- /dev/null +++ b/src/shaders/post_processing/nv12_scaling_nv12.g4b.gen5 @@ -0,0 +1,222 @@ + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00400001, 0x254002fd, 0x00000000, 0x48403000 }, + { 0x00400001, 0x255002fd, 0x00000000, 0x5c585450 }, + { 0x00600040, 0x25607fbd, 0x008d0540, 0x41000000 }, + { 0x00200401, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00000801, 0x21080061, 0x00000000, 0x00000000 }, + { 0x00802001, 0x208003be, 0x000000a8, 0x00000000 }, + { 0x00802001, 0x258003bd, 0x000000a8, 0x00000000 }, + { 0x00802001, 0x240003bc, 0x000000a4, 0x00000000 }, + { 0x00802048, 0x204077be, 0x000000bc, 0x008d0540 }, + { 0x00000401, 0x257003fd, 0x00000000, 0x437f0000 }, + { 0x00000801, 0x257c03fd, 0x00000000, 0x3f000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01800031, 0x27001c09, 0x208d0000, 0x0a8a0101 }, + { 0x01800031, 0x28001c09, 0x208d0000, 0x0a8a0202 }, + { 0x00802040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00802040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00802001, 0x27000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00802001, 0x28000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00802001, 0x28400381, 0x00b10400, 0x00000000 }, + { 0x00800001, 0x21400229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x22400229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x23400229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01800031, 0x27001c09, 0x208d0000, 0x0a8a0101 }, + { 0x01800031, 0x28001c09, 0x208d0000, 0x0a8a0202 }, + { 0x00802040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00802040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00802001, 0x27000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00802001, 0x28000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00802001, 0x28400381, 0x00b10400, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x22600229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x23600229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01800031, 0x27001c09, 0x208d0000, 0x0a8a0101 }, + { 0x01800031, 0x28001c09, 0x208d0000, 0x0a8a0202 }, + { 0x00802040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00802040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00802001, 0x27000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00802001, 0x28000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00802001, 0x28400381, 0x00b10400, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x22800229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x23800229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01800031, 0x27001c09, 0x208d0000, 0x0a8a0101 }, + { 0x01800031, 0x28001c09, 0x208d0000, 0x0a8a0202 }, + { 0x00802040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00802040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00802001, 0x27000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00802001, 0x28000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00802001, 0x28400381, 0x00b10400, 0x00000000 }, + { 0x00800001, 0x21a00229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x22a00229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x23a00229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01800031, 0x27001c09, 0x208d0000, 0x0a8a0101 }, + { 0x01800031, 0x28001c09, 0x208d0000, 0x0a8a0202 }, + { 0x00802040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00802040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00802001, 0x27000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00802001, 0x28000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00802001, 0x28400381, 0x00b10400, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x22c00229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x23c00229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01800031, 0x27001c09, 0x208d0000, 0x0a8a0101 }, + { 0x01800031, 0x28001c09, 0x208d0000, 0x0a8a0202 }, + { 0x00802040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00802040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00802001, 0x27000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00802001, 0x28000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00802001, 0x28400381, 0x00b10400, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x22e00229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x23e00229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01800031, 0x27001c09, 0x208d0000, 0x0a8a0101 }, + { 0x01800031, 0x28001c09, 0x208d0000, 0x0a8a0202 }, + { 0x00802040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00802040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00802001, 0x27000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00802001, 0x28000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00802001, 0x28400381, 0x00b10400, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x23000229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x24000229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01800031, 0x27001c09, 0x208d0000, 0x0a8a0101 }, + { 0x01800031, 0x28001c09, 0x208d0000, 0x0a8a0202 }, + { 0x00802040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00802040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00802001, 0x27000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00802001, 0x28000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00802001, 0x28400381, 0x00b10400, 0x00000000 }, + { 0x00800001, 0x22200229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x23200229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x22400129, 0x00ae0240, 0x00000000 }, + { 0x00600001, 0x23400129, 0x00ae0340, 0x00000000 }, + { 0x00600001, 0x22500129, 0x00ae0280, 0x00000000 }, + { 0x00600001, 0x23500129, 0x00ae0380, 0x00000000 }, + { 0x00600001, 0x22600129, 0x00ae02c0, 0x00000000 }, + { 0x00600001, 0x23600129, 0x00ae03c0, 0x00000000 }, + { 0x00600001, 0x22700129, 0x00ae0300, 0x00000000 }, + { 0x00600001, 0x23700129, 0x00ae0400, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00200001, 0x202001a6, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x20280062, 0x00000000, 0x0007000f }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000056 }, + { 0x01600031, 0x27000c01, 0x408d0000, 0x0248a007 }, + { 0x0000040c, 0x21043da1, 0x000000a2, 0x00010001 }, + { 0x00000801, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x28000c01, 0x408d0000, 0x0228a008 }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x26020228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x020000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x02000000, 0x00000000 }, + { 0x00000001, 0x24600061, 0x00000000, 0x00040001 }, + { 0x00000001, 0x24640061, 0x00000000, 0x00400010 }, + { 0x00000001, 0x24680061, 0x00000000, 0x04000100 }, + { 0x00000001, 0x246c0061, 0x00000000, 0x40001000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000440, 0x008d0460 }, + { 0x00710001, 0x42400231, 0x02ae0800, 0x00000000 }, + { 0x00710001, 0x43400231, 0x02ae0801, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000444, 0x008d0460 }, + { 0x00710001, 0x42500231, 0x02ae0810, 0x00000000 }, + { 0x00710001, 0x43500231, 0x02ae0811, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000448, 0x008d0460 }, + { 0x00710001, 0x42600231, 0x02ae0820, 0x00000000 }, + { 0x00710001, 0x43600231, 0x02ae0821, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x0200044c, 0x008d0460 }, + { 0x00710001, 0x42700231, 0x02ae0830, 0x00000000 }, + { 0x00710001, 0x43700231, 0x02ae0831, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x0a082007 }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x40400232, 0x00d20240, 0x00000000 }, + { 0x00800001, 0x40410232, 0x00d20340, 0x00000000 }, + { 0x00800001, 0x40600232, 0x00d20260, 0x00000000 }, + { 0x00800001, 0x40610232, 0x00d20360, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x06082008 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00000041, 0x24407fbd, 0x000000bc, 0x41800000 }, + { 0x00000040, 0x20a477bd, 0x00000440, 0x000000a4 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00010220, 0x34001c00, 0x02001400, 0xfffffe66 }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000001, 0x20a403bd, 0x00000094, 0x00000000 }, + { 0x00000041, 0x24407fbd, 0x00000038, 0x41000000 }, + { 0x00000040, 0x20a877bd, 0x00000440, 0x000000a8 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffe5a }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, diff --git a/src/shaders/post_processing/nv12_scaling_nv12.g6b b/src/shaders/post_processing/nv12_scaling_nv12.g6b new file mode 100644 index 00000000..4537832b --- /dev/null +++ b/src/shaders/post_processing/nv12_scaling_nv12.g6b @@ -0,0 +1,295 @@ + { 0x00600001, 0x20e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00400001, 0x254002fd, 0x00000000, 0x48403000 }, + { 0x00400001, 0x255002fd, 0x00000000, 0x5c585450 }, + { 0x00600040, 0x25607fbd, 0x008d0540, 0x41000000 }, + { 0x00200401, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00000801, 0x21080061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x208003be, 0x000000a8, 0x00000000 }, + { 0x00800001, 0x258003bd, 0x000000a8, 0x00000000 }, + { 0x00800001, 0x240003bc, 0x000000a4, 0x00000000 }, + { 0x00800048, 0x204077be, 0x000000bc, 0x008d0540 }, + { 0x00000401, 0x257003fd, 0x00000000, 0x437f0000 }, + { 0x00000801, 0x257c03fd, 0x00000000, 0x3f000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x02800031, 0x27001cc9, 0x00000020, 0x0a8a0101 }, + { 0x02800031, 0x28001cc9, 0x00000020, 0x0a8a0202 }, + { 0x00800040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00800040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00800001, 0x27000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00800001, 0x28000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00800001, 0x28400381, 0x008d0400, 0x00000000 }, + { 0x00800001, 0x21400229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x22400229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x23400229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x02800031, 0x27001cc9, 0x00000020, 0x0a8a0101 }, + { 0x02800031, 0x28001cc9, 0x00000020, 0x0a8a0202 }, + { 0x00800040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00800040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00800001, 0x27000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00800001, 0x28000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00800001, 0x28400381, 0x008d0400, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x22600229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x23600229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x02800031, 0x27001cc9, 0x00000020, 0x0a8a0101 }, + { 0x02800031, 0x28001cc9, 0x00000020, 0x0a8a0202 }, + { 0x00800040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00800040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00800001, 0x27000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00800001, 0x28000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00800001, 0x28400381, 0x008d0400, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x22800229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x23800229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x02800031, 0x27001cc9, 0x00000020, 0x0a8a0101 }, + { 0x02800031, 0x28001cc9, 0x00000020, 0x0a8a0202 }, + { 0x00800040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00800040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00800001, 0x27000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00800001, 0x28000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00800001, 0x28400381, 0x008d0400, 0x00000000 }, + { 0x00800001, 0x21a00229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x22a00229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x23a00229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x02800031, 0x27001cc9, 0x00000020, 0x0a8a0101 }, + { 0x02800031, 0x28001cc9, 0x00000020, 0x0a8a0202 }, + { 0x00800040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00800040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00800001, 0x27000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00800001, 0x28000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00800001, 0x28400381, 0x008d0400, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x22c00229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x23c00229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x02800031, 0x27001cc9, 0x00000020, 0x0a8a0101 }, + { 0x02800031, 0x28001cc9, 0x00000020, 0x0a8a0202 }, + { 0x00800040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00800040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00800001, 0x27000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00800001, 0x28000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00800001, 0x28400381, 0x008d0400, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x22e00229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x23e00229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x02800031, 0x27001cc9, 0x00000020, 0x0a8a0101 }, + { 0x02800031, 0x28001cc9, 0x00000020, 0x0a8a0202 }, + { 0x00800040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00800040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00800001, 0x27000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00800001, 0x28000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00800001, 0x28400381, 0x008d0400, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x23000229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x24000229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x02800031, 0x27001cc9, 0x00000020, 0x0a8a0101 }, + { 0x02800031, 0x28001cc9, 0x00000020, 0x0a8a0202 }, + { 0x00800040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00800040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00800001, 0x27000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00800001, 0x28000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00800001, 0x28400381, 0x008d0400, 0x00000000 }, + { 0x00800001, 0x22200229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x23200229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x22400129, 0x00ae0240, 0x00000000 }, + { 0x00600001, 0x23400129, 0x00ae0340, 0x00000000 }, + { 0x00600001, 0x22500129, 0x00ae0280, 0x00000000 }, + { 0x00600001, 0x23500129, 0x00ae0380, 0x00000000 }, + { 0x00600001, 0x22600129, 0x00ae02c0, 0x00000000 }, + { 0x00600001, 0x23600129, 0x00ae03c0, 0x00000000 }, + { 0x00600001, 0x22700129, 0x00ae0300, 0x00000000 }, + { 0x00600001, 0x23700129, 0x00ae0400, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00200001, 0x202001a6, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x20280062, 0x00000000, 0x0007000f }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000056 }, + { 0x04600031, 0x27000cc1, 0x00000020, 0x02498007 }, + { 0x0000040c, 0x21043da1, 0x000000a2, 0x00010001 }, + { 0x00000801, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x28000cc1, 0x00000020, 0x02298008 }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x26020228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x020000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x02000000, 0x00000000 }, + { 0x00000001, 0x24600061, 0x00000000, 0x00040001 }, + { 0x00000001, 0x24640061, 0x00000000, 0x00400010 }, + { 0x00000001, 0x24680061, 0x00000000, 0x04000100 }, + { 0x00000001, 0x246c0061, 0x00000000, 0x40001000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000440, 0x008d0460 }, + { 0x00710001, 0x42400231, 0x02ae0800, 0x00000000 }, + { 0x00710001, 0x43400231, 0x02ae0801, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000444, 0x008d0460 }, + { 0x00710001, 0x42500231, 0x02ae0810, 0x00000000 }, + { 0x00710001, 0x43500231, 0x02ae0811, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000448, 0x008d0460 }, + { 0x00710001, 0x42600231, 0x02ae0820, 0x00000000 }, + { 0x00710001, 0x43600231, 0x02ae0821, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x0200044c, 0x008d0460 }, + { 0x00710001, 0x42700231, 0x02ae0830, 0x00000000 }, + { 0x00710001, 0x43700231, 0x02ae0831, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x0a094007 }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x40400232, 0x00d20240, 0x00000000 }, + { 0x00800001, 0x40410232, 0x00d20340, 0x00000000 }, + { 0x00800001, 0x40600232, 0x00d20260, 0x00000000 }, + { 0x00800001, 0x40610232, 0x00d20360, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x06094008 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00000041, 0x24407fbd, 0x000000bc, 0x41800000 }, + { 0x00000040, 0x20a477bd, 0x00000440, 0x000000a4 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00010220, 0x34001c00, 0x02001400, 0xfffffe66 }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000001, 0x20a403bd, 0x00000094, 0x00000000 }, + { 0x00000041, 0x24407fbd, 0x00000038, 0x41000000 }, + { 0x00000040, 0x20a877bd, 0x00000440, 0x000000a8 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffe5a }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, diff --git a/src/shaders/render/Makefile.am b/src/shaders/render/Makefile.am new file mode 100644 index 00000000..a571ea25 --- /dev/null +++ b/src/shaders/render/Makefile.am @@ -0,0 +1,89 @@ + +INTEL_G4I = \ + exa_wm.g4i \ + exa_wm_affine.g4i + +INTEL_G4A = \ + exa_sf.g4a \ + exa_wm_xy.g4a \ + exa_wm_src_affine.g4a \ + exa_wm_src_sample_argb.g4a \ + exa_wm_src_sample_planar.g4a \ + exa_wm_yuv_rgb.g4a \ + exa_wm_write.g4a + +INTEL_G4B = \ + exa_sf.g4b \ + exa_wm_xy.g4b \ + exa_wm_src_affine.g4b \ + exa_wm_src_sample_argb.g4b \ + exa_wm_src_sample_planar.g4b \ + exa_wm_yuv_rgb.g4b \ + exa_wm_write.g4b + +INTEL_G4B_GEN5 = \ + exa_sf.g4b.gen5 \ + exa_wm_xy.g4b.gen5 \ + exa_wm_src_affine.g4b.gen5 \ + exa_wm_src_sample_argb.g4b.gen5 \ + exa_wm_src_sample_planar.g4b.gen5 \ + exa_wm_yuv_rgb.g4b.gen5 \ + exa_wm_write.g4b.gen5 + +EXTRA_DIST = $(INTEL_G4I) \ + $(INTEL_G4A) \ + $(INTEL_G4B) \ + $(INTEL_G4B_GEN5) + +INTEL_G6A = \ + exa_wm_src_affine.g6a \ + exa_wm_src_sample_argb.g6a \ + exa_wm_src_sample_planar.g6a \ + exa_wm_write.g6a \ + exa_wm_yuv_rgb.g6a + +INTEL_G6B = \ + exa_wm_src_affine.g6b \ + exa_wm_src_sample_argb.g6b \ + exa_wm_src_sample_planar.g6b \ + exa_wm_write.g6b \ + exa_wm_yuv_rgb.g6b + +INTEL_G7A = \ + exa_wm_src_affine.g7a \ + exa_wm_src_sample_argb.g7a \ + exa_wm_src_sample_planar.g7a \ + exa_wm_write.g7a \ + exa_wm_yuv_rgb.g7a + +INTEL_G7B = \ + exa_wm_src_affine.g7b \ + exa_wm_src_sample_argb.g7b \ + exa_wm_src_sample_planar.g7b \ + exa_wm_write.g7b \ + exa_wm_yuv_rgb.g7b + +if HAVE_GEN4ASM + +SUFFIXES = .g4a .g4b .g6a .g6b .g7a .g7b +.g4a.g4b: + m4 $*.g4a > $*.g4m && intel-gen4asm -o $@ $*.g4m && intel-gen4asm -g 5 -o $@.gen5 $*.g4m && rm $*.g4m + +.g6a.g6b: + m4 -I$(srcdir) -s $< > $*.g6m && intel-gen4asm -g 6 -o $@ $*.g6m && rm $*.g6m + +.g7a.g7b: + m4 -I$(srcdir) -s $< > $*.g7m && intel-gen4asm -g 7 -o $@ $*.g7m && rm $*.g7m + +$(INTEL_G4B): $(INTEL_G4I) +$(INTEL_G6B): $(INTEL_G4I) +$(INTEL_G7B): $(INTEL_G4I) + +BUILT_SOURCES= $(INTEL_G4B) $(INTEL_G6B) $(INTEL_G7B) + +clean-local: + -rm -f $(INTEL_G4B) + -rm -f $(INTEL_G4B_GEN5) + -rm -f $(INTEL_G6B) + -rm -f $(INTEL_G7B) +endif diff --git a/src/shaders/render/exa_sf.g4a b/src/shaders/render/exa_sf.g4a new file mode 100644 index 00000000..3e660ac2 --- /dev/null +++ b/src/shaders/render/exa_sf.g4a @@ -0,0 +1,107 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Keith Packard <keithp@keithp.com> + * Eric Anholt <eric@anholt.net> + * + */ + +/* + * Inputs (note all sub-register addresses are bytes, not float indices) + * + * Note that the vertices will have been reordered: + * + * V0 is topmost (leftmost among topmost) (upper left) + * V1 is next clockwise (lower right) + * V2 is remaining (lower left) + * + * V0 ...................... XX + * | . + * | . + * | . + * V2------------------------V1 + * + * G0 thread state -- just pass along + * + * G1 and G2 are fixed by SF spec + * + * G1.0 reserved + * G1.4 Provoking vertex + * G1.8 Determinant + * G1.12 X1 - X0 + * G1.16 X2 - X0 + * G1.20 Y1 - Y0 + * G1.24 Y2 - Y0 + * G1.30 reserved + * + * G2.0 Z0 + * G2.4 1/W0 + * G2.8 Z1 + * G2.12 1/W1 + * G2.16 Z2 + * G2.20 1/W2 + * G2.24 reserved + * G2.30 reserved + * + * G3 is V0 Vertex Attribute Data from URB (upper left) + * + * G3.0 u0 + * G3.4 v0 + * + * G4 is V1 Vertex Attribute Data from URB (lower right) + * + * G4.0 u1 + * G4.4 v1 + * + * G5 is V2 Vertex Attribute Data from URB (lower left) + * + */ + +/* Compute inverses of the input deltas */ +send (4) 0 g6<1>F g1.12<4,4,1>F math inv mlen 1 rlen 1 { align1 }; + +/* texture location at V0 */ +mov (4) m3<1>F g3<4,4,1>F { align1 }; + +/* compute V1 - V2 (motion in X) for texture coordinates */ +add (4) g7<1>F g4<4,4,1>F -g5<4,4,1>F { align1 }; + +/* multiply by 1/dx */ +mul (4) m1<1>F g7<4,4,1>F g6.0<0,1,0>F { align1 }; + +/* Compute V2 - V0 (motion in Y) for texture coordinates */ +add (4) g7<1>F g5<4,4,1>F -g3<4,4,1>F { align1 }; + +/* multiply by 1/dy */ +mul (4) m2<1>F g7<4,4,1>F g6.8<0,1,0>F {align1 }; + +/* and we're done */ +send (8) 0 null g0<8,8,1>F urb 0 transpose used complete mlen 4 rlen 0 { align1 EOT }; +nop; +nop; +nop; +nop; +nop; +nop; +nop; +nop; diff --git a/src/shaders/render/exa_sf.g4b b/src/shaders/render/exa_sf.g4b new file mode 100644 index 00000000..223c9c9a --- /dev/null +++ b/src/shaders/render/exa_sf.g4b @@ -0,0 +1,15 @@ + { 0x00400031, 0x20c01fbd, 0x0069002c, 0x01110001 }, + { 0x00400001, 0x206003be, 0x00690060, 0x00000000 }, + { 0x00400040, 0x20e077bd, 0x00690080, 0x006940a0 }, + { 0x00400041, 0x202077be, 0x006900e0, 0x000000c0 }, + { 0x00400040, 0x20e077bd, 0x006900a0, 0x00694060 }, + { 0x00400041, 0x204077be, 0x006900e0, 0x000000c8 }, + { 0x00600031, 0x20001fbc, 0x008d0000, 0x8640c800 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, diff --git a/src/shaders/render/exa_sf.g4b.gen5 b/src/shaders/render/exa_sf.g4b.gen5 new file mode 100644 index 00000000..a838f47c --- /dev/null +++ b/src/shaders/render/exa_sf.g4b.gen5 @@ -0,0 +1,15 @@ + { 0x00400031, 0x20c01fbd, 0x1069002c, 0x02100001 }, + { 0x00400001, 0x206003be, 0x00690060, 0x00000000 }, + { 0x00400040, 0x20e077bd, 0x00690080, 0x006940a0 }, + { 0x00400041, 0x202077be, 0x006900e0, 0x000000c0 }, + { 0x00400040, 0x20e077bd, 0x006900a0, 0x00694060 }, + { 0x00400041, 0x204077be, 0x006900e0, 0x000000c8 }, + { 0x00600031, 0x20001fbc, 0x648d0000, 0x8808c800 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, diff --git a/src/shaders/render/exa_wm.g4i b/src/shaders/render/exa_wm.g4i new file mode 100644 index 00000000..8163de59 --- /dev/null +++ b/src/shaders/render/exa_wm.g4i @@ -0,0 +1,159 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Wang Zhenyu <zhenyu.z.wang@intel.com> + * Keith Packard <keithp@keithp.com> + */ + +/* + * Input parameters + */ + +/* Destination X/Y */ +define(`dst_x_uw', `g1.8<2,4,0>UW') +define(`dst_y_uw', `g1.10<2,4,0>UW') +define(`screen_x0', `g1.0<0,1,0>F') +define(`screen_y0', `g1.4<0,1,0>F') + +/* UV flag */ +define(`interleaved_uv', `g2.0<0,1,0>UW') + +/* Source transformation parameters */ +define(`src_du_dx', `g3.0<0,1,0>F') +define(`src_du_dy', `g3.4<0,1,0>F') +define(`src_uo', `g3.12<0,1,0>F') +define(`src_dv_dx', `g3.16<0,1,0>F') +define(`src_dv_dy', `g3.20<0,1,0>F') +define(`src_vo', `g3.28<0,1,0>F') +define(`src_dw_dx', `g4.0<0,1,0>F') +define(`src_dw_dy', `g4.4<0,1,0>F') +define(`src_wo', `g4.12<0,1,0>F') + +define(`mask_du_dx', `g5.0<0,1,0>F') +define(`mask_du_dy', `g5.4<0,1,0>F') +define(`mask_uo', `g5.12<0,1,0>F') +define(`mask_dv_dx', `g5.16<0,1,0>F') +define(`mask_dv_dy', `g5.20<0,1,0>F') +define(`mask_vo', `g5.28<0,1,0>F') +define(`mask_dw_dx', `g6.0<0,1,0>F') +define(`mask_dw_dy', `g6.4<0,1,0>F') +define(`mask_wo', `g6.12<0,1,0>F') + +/* + * Local variables. Pairs must be aligned on even reg boundry + */ + +/* this holds the X dest coordinates */ +define(`dst_x', `g8') +define(`dst_x_0', `dst_x') +define(`dst_x_1', `g9') + +/* this holds the Y dest coordinates */ +define(`dst_y', `g10') +define(`dst_y_0', `dst_y') +define(`dst_y_1', `g11') + +/* When computing x * dn/dx, use this */ +define(`temp_x', `g30') +define(`temp_x_0', `temp_x') +define(`temp_x_1', `g31') + +/* When computing y * dn/dy, use this */ +define(`temp_y', `g28') +define(`temp_y_0', temp_y) +define(`temp_y_1', `g29') + +/* when loading x/y, use these to hold them in UW format */ +define(`temp_x_uw', temp_x) +define(`temp_y_uw', temp_y) + +/* compute source and mask u/v to this pair to send to sampler */ +define(`src_msg', `m1') +define(`src_msg_ind',`1') +define(`src_u', `m2') +define(`src_v', `m4') +define(`src_w', `g12') +define(`src_w_0', `src_w') +define(`src_w_1', `g13') + +define(`mask_msg', `m7') +define(`mask_msg_ind',`7') +define(`mask_u', `m8') +define(`mask_v', `m10') +define(`mask_w', `src_w') +define(`mask_w_0', `src_w_0') +define(`mask_w_1', `src_w_1') + +/* sample src to these registers */ +define(`src_sample_base', `g14') + +define(`src_sample_r', `g14') +define(`src_sample_r_01', `g14') +define(`src_sample_r_23', `g15') + +define(`src_sample_g', `g16') +define(`src_sample_g_01', `g16') +define(`src_sample_g_23', `g17') + +define(`src_sample_b', `g18') +define(`src_sample_b_01', `g18') +define(`src_sample_b_23', `g19') + +define(`src_sample_a', `g20') +define(`src_sample_a_01', `g20') +define(`src_sample_a_23', `g21') + +/* sample mask to these registers */ +define(`mask_sample_base', `g22') + +define(`mask_sample_r', `g22') +define(`mask_sample_r_01', `g22') +define(`mask_sample_r_23', `g23') + +define(`mask_sample_g', `g24') +define(`mask_sample_g_01', `g24') +define(`mask_sample_g_23', `g25') + +define(`mask_sample_b', `g26') +define(`mask_sample_b_01', `g26') +define(`mask_sample_b_23', `g27') + +define(`mask_sample_a', `g28') +define(`mask_sample_a_01', `g28') +define(`mask_sample_a_23', `g29') + +/* data port SIMD16 send registers */ + +define(`data_port_msg_0', `m0') +define(`data_port_msg_0_ind', `0') +define(`data_port_msg_1', `m1') +define(`data_port_r_01', `m2') +define(`data_port_g_01', `m3') +define(`data_port_b_01', `m4') +define(`data_port_a_01', `m5') + +define(`data_port_r_23', `m6') +define(`data_port_g_23', `m7') +define(`data_port_b_23', `m8') +define(`data_port_a_23', `m9') + diff --git a/src/shaders/render/exa_wm_affine.g4i b/src/shaders/render/exa_wm_affine.g4i new file mode 100644 index 00000000..e72656b6 --- /dev/null +++ b/src/shaders/render/exa_wm_affine.g4i @@ -0,0 +1,44 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Wang Zhenyu <zhenyu.z.wang@intel.com> + * Keith Packard <keithp@keithp.com> + */ + +/* + * Fragment to compute src u/v values under an affine transform + */ + +/********** Compute u *************/ + +mul (16) temp_x<1>F dst_x<8,8,1>F du_dx { compr align1 }; +mul (16) temp_y<1>F dst_y<8,8,1>F du_dy { compr align1 }; +add (16) temp_x<1>F temp_x<8,8,1>F temp_y<8,8,1>F { compr align1 }; +add (16) u<1>F temp_x<8,8,1>F uo { compr align1 }; + +/********** Compute v *************/ + +mul (16) temp_x<1>F dst_x<8,8,1>F dv_dx { compr align1 }; +mul (16) temp_y<1>F dst_y<8,8,1>F dv_dy { compr align1 }; +add (16) temp_x<1>F temp_x<8,8,1>F temp_y<8,8,1>F { compr align1 }; +add (16) v<1>F temp_x<8,8,1>F vo { compr align1 }; diff --git a/src/shaders/render/exa_wm_src_affine.g4a b/src/shaders/render/exa_wm_src_affine.g4a new file mode 100644 index 00000000..3194b5a6 --- /dev/null +++ b/src/shaders/render/exa_wm_src_affine.g4a @@ -0,0 +1,45 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Wang Zhenyu <zhenyu.z.wang@intel.com> + * Keith Packard <keithp@keithp.com> + */ + +/* + * Fragment to compute src u/v values under an affine transform + */ + +include(`exa_wm.g4i') + +define(`du_dx', `src_du_dx') +define(`du_dy', `src_du_dy') +define(`uo', `src_uo') + +define(`dv_dx', `src_dv_dx') +define(`dv_dy', `src_dv_dy') +define(`vo', `src_vo') + +define(`u', `src_u') +define(`v', `src_v') + +include(`exa_wm_affine.g4i') diff --git a/src/shaders/render/exa_wm_src_affine.g4b b/src/shaders/render/exa_wm_src_affine.g4b new file mode 100644 index 00000000..d30da873 --- /dev/null +++ b/src/shaders/render/exa_wm_src_affine.g4b @@ -0,0 +1,8 @@ + { 0x00802041, 0x23c077bd, 0x008d0100, 0x00000060 }, + { 0x00802041, 0x238077bd, 0x008d0140, 0x00000064 }, + { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, + { 0x00802040, 0x204077be, 0x008d03c0, 0x0000006c }, + { 0x00802041, 0x23c077bd, 0x008d0100, 0x00000070 }, + { 0x00802041, 0x238077bd, 0x008d0140, 0x00000074 }, + { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, + { 0x00802040, 0x208077be, 0x008d03c0, 0x0000007c }, diff --git a/src/shaders/render/exa_wm_src_affine.g4b.gen5 b/src/shaders/render/exa_wm_src_affine.g4b.gen5 new file mode 100644 index 00000000..d30da873 --- /dev/null +++ b/src/shaders/render/exa_wm_src_affine.g4b.gen5 @@ -0,0 +1,8 @@ + { 0x00802041, 0x23c077bd, 0x008d0100, 0x00000060 }, + { 0x00802041, 0x238077bd, 0x008d0140, 0x00000064 }, + { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, + { 0x00802040, 0x204077be, 0x008d03c0, 0x0000006c }, + { 0x00802041, 0x23c077bd, 0x008d0100, 0x00000070 }, + { 0x00802041, 0x238077bd, 0x008d0140, 0x00000074 }, + { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, + { 0x00802040, 0x208077be, 0x008d03c0, 0x0000007c }, diff --git a/src/shaders/render/exa_wm_src_affine.g6a b/src/shaders/render/exa_wm_src_affine.g6a new file mode 100644 index 00000000..568aef3e --- /dev/null +++ b/src/shaders/render/exa_wm_src_affine.g6a @@ -0,0 +1,47 @@ +/* + * Copyright © 2010 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + +/* + * Fragment to compute src u/v values + */ +include(`exa_wm.g4i') + +define(`ul', `src_u') +define(`uh', `m3') +define(`vl', `src_v') +define(`vh', `m5') + +define(`bl', `g2.0<8,8,1>F') +define(`bh', `g4.0<8,8,1>F') + +define(`a0_a_x',`g7.0<0,1,0>F') +define(`a0_a_y',`g7.16<0,1,0>F') + +/* U */ +pln (8) ul<1>F a0_a_x bl { align1 }; /* pixel 0-7 */ +pln (8) uh<1>F a0_a_x bh { align1 }; /* pixel 8-15 */ + +/* V */ +pln (8) vl<1>F a0_a_y bl { align1 }; /* pixel 0-7 */ +pln (8) vh<1>F a0_a_y bh { align1 }; /* pixel 8-15 */ diff --git a/src/shaders/render/exa_wm_src_affine.g6b b/src/shaders/render/exa_wm_src_affine.g6b new file mode 100644 index 00000000..5d0ffccb --- /dev/null +++ b/src/shaders/render/exa_wm_src_affine.g6b @@ -0,0 +1,4 @@ + { 0x0060005a, 0x204077be, 0x000000e0, 0x008d0040 }, + { 0x0060005a, 0x206077be, 0x000000e0, 0x008d0080 }, + { 0x0060005a, 0x208077be, 0x000000f0, 0x008d0040 }, + { 0x0060005a, 0x20a077be, 0x000000f0, 0x008d0080 }, diff --git a/src/shaders/render/exa_wm_src_affine.g7a b/src/shaders/render/exa_wm_src_affine.g7a new file mode 100644 index 00000000..a786bc07 --- /dev/null +++ b/src/shaders/render/exa_wm_src_affine.g7a @@ -0,0 +1,47 @@ +/* + * Copyright © 2010 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + +/* + * Fragment to compute src u/v values + */ +include(`exa_wm.g4i') + +define(`ul', `g66') +define(`uh', `g67') +define(`vl', `g68') +define(`vh', `g69') + +define(`bl', `g2.0<8,8,1>F') +define(`bh', `g4.0<8,8,1>F') + +define(`a0_a_x',`g7.0<0,1,0>F') +define(`a0_a_y',`g7.16<0,1,0>F') + +/* U */ +pln (8) ul<1>F a0_a_x bl { align1 }; /* pixel 0-7 */ +pln (8) uh<1>F a0_a_x bh { align1 }; /* pixel 8-15 */ + +/* V */ +pln (8) vl<1>F a0_a_y bl { align1 }; /* pixel 0-7 */ +pln (8) vh<1>F a0_a_y bh { align1 }; /* pixel 8-15 */ diff --git a/src/shaders/render/exa_wm_src_affine.g7b b/src/shaders/render/exa_wm_src_affine.g7b new file mode 100644 index 00000000..5dbbf1b8 --- /dev/null +++ b/src/shaders/render/exa_wm_src_affine.g7b @@ -0,0 +1,4 @@ + { 0x0060005a, 0x284077bd, 0x000000e0, 0x008d0040 }, + { 0x0060005a, 0x286077bd, 0x000000e0, 0x008d0080 }, + { 0x0060005a, 0x288077bd, 0x000000f0, 0x008d0040 }, + { 0x0060005a, 0x28a077bd, 0x000000f0, 0x008d0080 }, diff --git a/src/shaders/render/exa_wm_src_sample_argb.g4a b/src/shaders/render/exa_wm_src_sample_argb.g4a new file mode 100644 index 00000000..c20f53f2 --- /dev/null +++ b/src/shaders/render/exa_wm_src_sample_argb.g4a @@ -0,0 +1,47 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Wang Zhenyu <zhenyu.z.wang@intel.com> + * Keith Packard <keithp@keithp.com> + */ + +/* Sample the src surface */ + +include(`exa_wm.g4i') + +/* prepare sampler read back gX register, which would be written back to output */ + +/* use simd16 sampler, param 0 is u, param 1 is v. */ +/* 'payload' loading, assuming tex coord start from g4 */ + +/* load argb */ +mov (1) g0.8<1>UD 0x00000000UD { align1 mask_disable }; + +/* src_msg will be copied with g0, as it contains send desc */ +/* emit sampler 'send' cmd */ +send (16) src_msg_ind /* msg reg index */ + src_sample_base<1>UW /* readback */ + g0<8,8,1>UW /* copy to msg start reg*/ + sampler (1,0,F) /* sampler message description, (binding_table,sampler_index,datatype) + /* here(src->dst) we should use src_sampler and src_surface */ + mlen 5 rlen 8 { align1 }; /* required message len 5, readback len 8 */ diff --git a/src/shaders/render/exa_wm_src_sample_argb.g4b b/src/shaders/render/exa_wm_src_sample_argb.g4b new file mode 100644 index 00000000..c5b92740 --- /dev/null +++ b/src/shaders/render/exa_wm_src_sample_argb.g4b @@ -0,0 +1,2 @@ + { 0x00000201, 0x20080061, 0x00000000, 0x00000000 }, + { 0x01800031, 0x21c01d29, 0x008d0000, 0x02580001 }, diff --git a/src/shaders/render/exa_wm_src_sample_argb.g4b.gen5 b/src/shaders/render/exa_wm_src_sample_argb.g4b.gen5 new file mode 100644 index 00000000..f8cb41ef --- /dev/null +++ b/src/shaders/render/exa_wm_src_sample_argb.g4b.gen5 @@ -0,0 +1,2 @@ + { 0x00000201, 0x20080061, 0x00000000, 0x00000000 }, + { 0x01800031, 0x21c01d29, 0x208d0000, 0x0a8a0001 }, diff --git a/src/shaders/render/exa_wm_src_sample_argb.g6a b/src/shaders/render/exa_wm_src_sample_argb.g6a new file mode 100644 index 00000000..67bb8880 --- /dev/null +++ b/src/shaders/render/exa_wm_src_sample_argb.g6a @@ -0,0 +1,48 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Wang Zhenyu <zhenyu.z.wang@intel.com> + * Keith Packard <keithp@keithp.com> + */ + +/* Sample the src surface */ + +include(`exa_wm.g4i') + +/* prepare sampler read back gX register, which would be written back to output */ + +/* use simd16 sampler, param 0 is u, param 1 is v. */ +/* 'payload' loading, assuming tex coord start from g4 */ + +/* load argb */ +mov (1) g0.8<1>UD 0x00000000UD { align1 mask_disable }; +mov (8) src_msg<1>UD g0<8,8,1>UD { align1 mask_disable }; + +/* src_msg will be copied with g0, as it contains send desc */ +/* emit sampler 'send' cmd */ +send (16) src_msg_ind /* msg reg index */ + src_sample_base<1>UW /* readback */ + null + sampler (1,0,F) /* sampler message description, (binding_table,sampler_index,datatype) + /* here(src->dst) we should use src_sampler and src_surface */ + mlen 5 rlen 8 { align1 }; /* required message len 5, readback len 8 */ diff --git a/src/shaders/render/exa_wm_src_sample_argb.g6b b/src/shaders/render/exa_wm_src_sample_argb.g6b new file mode 100644 index 00000000..28464919 --- /dev/null +++ b/src/shaders/render/exa_wm_src_sample_argb.g6b @@ -0,0 +1,3 @@ + { 0x00000201, 0x20080061, 0x00000000, 0x00000000 }, + { 0x00600201, 0x20200022, 0x008d0000, 0x00000000 }, + { 0x02800031, 0x21c01cc9, 0x00000020, 0x0a8a0001 }, diff --git a/src/shaders/render/exa_wm_src_sample_argb.g7a b/src/shaders/render/exa_wm_src_sample_argb.g7a new file mode 100644 index 00000000..978b76f8 --- /dev/null +++ b/src/shaders/render/exa_wm_src_sample_argb.g7a @@ -0,0 +1,52 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Wang Zhenyu <zhenyu.z.wang@intel.com> + * Keith Packard <keithp@keithp.com> + */ + +/* Sample the src surface */ + +include(`exa_wm.g4i') + +/* Ivybridge uses GRFs in SEND instruction */ +define(`src_msg_gen7', `g65') +define(`src_msg_ind_gen7',`65') + +/* prepare sampler read back gX register, which would be written back to output */ + +/* use simd16 sampler, param 0 is u, param 1 is v. */ +/* 'payload' loading, assuming tex coord start from g4 */ + +/* load argb */ +mov (1) g0.8<1>UD 0x00000000UD { align1 mask_disable }; +mov (8) src_msg_gen7<1>UD g0<8,8,1>UD { align1 mask_disable }; + +/* src_msg will be copied with g0, as it contains send desc */ +/* emit sampler 'send' cmd */ +send (16) src_msg_ind_gen7 /* msg reg index */ + src_sample_base<1>UW /* readback */ + null + sampler (1,0,F) /* sampler message description, (binding_table,sampler_index,datatype) + /* here(src->dst) we should use src_sampler and src_surface */ + mlen 5 rlen 8 { align1 }; /* required message len 5, readback len 8 */ diff --git a/src/shaders/render/exa_wm_src_sample_argb.g7b b/src/shaders/render/exa_wm_src_sample_argb.g7b new file mode 100644 index 00000000..e9b12e68 --- /dev/null +++ b/src/shaders/render/exa_wm_src_sample_argb.g7b @@ -0,0 +1,3 @@ + { 0x00000201, 0x20080061, 0x00000000, 0x00000000 }, + { 0x00600201, 0x28200021, 0x008d0000, 0x00000000 }, + { 0x02800031, 0x21c01ca9, 0x00000820, 0x0a8c0001 }, diff --git a/src/shaders/render/exa_wm_src_sample_planar.g4a b/src/shaders/render/exa_wm_src_sample_planar.g4a new file mode 100644 index 00000000..8cbb2896 --- /dev/null +++ b/src/shaders/render/exa_wm_src_sample_planar.g4a @@ -0,0 +1,87 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Wang Zhenyu <zhenyu.z.wang@intel.com> + * Keith Packard <keithp@keithp.com> + */ + +/* Sample the src surface in planar format */ + +include(`exa_wm.g4i') + +/* prepare sampler read back gX register, which would be written back to output */ + +/* use simd16 sampler, param 0 is u, param 1 is v. */ +/* 'payload' loading, assuming tex coord start from g4 */ + +and.nz (1) null interleaved_uv 0x01UW {align1}; +(f0) jmpi INTERLEAVED_UV; + +/* load r */ +mov (1) g0.8<1>UD 0x0000e000UD { align1 mask_disable }; + +/* src_msg will be copied with g0, as it contains send desc */ +/* emit sampler 'send' cmd */ + +/* sample U (Cr) */ +send (16) src_msg_ind /* msg reg index */ + src_sample_g<1>UW /* readback */ + g0<8,8,1>UW /* copy to msg start reg*/ + sampler (3,2,F) /* sampler message description, (binding_table,sampler_index,datatype) + /* here(src->dst) we should use src_sampler and src_surface */ + mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */ + +/* sample V (Cb) */ +send (16) src_msg_ind /* msg reg index */ + src_sample_b<1>UW /* readback */ + g0<8,8,1>UW /* copy to msg start reg*/ + sampler (5,4,F) /* sampler message description, (binding_table,sampler_index,datatype) + /* here(src->dst) we should use src_sampler and src_surface */ + mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */ + +jmpi SAMPLE_Y; + +INTERLEAVED_UV: +/* load r */ +mov (1) g0.8<1>UD 0x0000c000UD { align1 mask_disable }; + +/* sample UV (CrCb) */ +send (16) src_msg_ind /* msg reg index */ + src_sample_g<1>UW /* readback */ + g0<8,8,1>UW /* copy to msg start reg*/ + sampler (3,2,F) /* sampler message description, (binding_table,sampler_index,datatype) + /* here(src->dst) we should use src_sampler and src_surface */ + mlen 5 rlen 4 { align1 }; /* required message len 5, readback len 8 */ + +/* load r */ +mov (1) g0.8<1>UD 0x0000e000UD { align1 mask_disable }; + +SAMPLE_Y: +/* sample Y */ +send (16) src_msg_ind /* msg reg index */ + src_sample_r<1>UW /* readback */ + g0<8,8,1>UW /* copy to msg start reg*/ + sampler (1,0,F) /* sampler message description, (binding_table,sampler_index,datatype) + /* here(src->dst) we should use src_sampler and src_surface */ + mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */ + diff --git a/src/shaders/render/exa_wm_src_sample_planar.g4b b/src/shaders/render/exa_wm_src_sample_planar.g4b new file mode 100644 index 00000000..94f2f3b6 --- /dev/null +++ b/src/shaders/render/exa_wm_src_sample_planar.g4b @@ -0,0 +1,10 @@ + { 0x02000005, 0x20002d3c, 0x00000040, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, + { 0x00000201, 0x20080061, 0x00000000, 0x0000e000 }, + { 0x01800031, 0x22001d29, 0x008d0000, 0x02520203 }, + { 0x01800031, 0x22401d29, 0x008d0000, 0x02520405 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000003 }, + { 0x00000201, 0x20080061, 0x00000000, 0x0000c000 }, + { 0x01800031, 0x22001d29, 0x008d0000, 0x02540203 }, + { 0x00000201, 0x20080061, 0x00000000, 0x0000e000 }, + { 0x01800031, 0x21c01d29, 0x008d0000, 0x02520001 }, diff --git a/src/shaders/render/exa_wm_src_sample_planar.g4b.gen5 b/src/shaders/render/exa_wm_src_sample_planar.g4b.gen5 new file mode 100644 index 00000000..c6457232 --- /dev/null +++ b/src/shaders/render/exa_wm_src_sample_planar.g4b.gen5 @@ -0,0 +1,10 @@ + { 0x02000005, 0x20002d3c, 0x00000040, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, + { 0x00000201, 0x20080061, 0x00000000, 0x0000e000 }, + { 0x01800031, 0x22001d29, 0x208d0000, 0x0a2a0203 }, + { 0x01800031, 0x22401d29, 0x208d0000, 0x0a2a0405 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000201, 0x20080061, 0x00000000, 0x0000c000 }, + { 0x01800031, 0x22001d29, 0x208d0000, 0x0a4a0203 }, + { 0x00000201, 0x20080061, 0x00000000, 0x0000e000 }, + { 0x01800031, 0x21c01d29, 0x208d0000, 0x0a2a0001 }, diff --git a/src/shaders/render/exa_wm_src_sample_planar.g6a b/src/shaders/render/exa_wm_src_sample_planar.g6a new file mode 100644 index 00000000..9f907fcd --- /dev/null +++ b/src/shaders/render/exa_wm_src_sample_planar.g6a @@ -0,0 +1,92 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Wang Zhenyu <zhenyu.z.wang@intel.com> + * Keith Packard <keithp@keithp.com> + */ + +/* Sample the src surface in planar format */ + +include(`exa_wm.g4i') +/* UV flag */ +define(`nv12', `g6.0<0,1,0>UW') + +/* prepare sampler read back gX register, which would be written back to output */ + +/* use simd16 sampler, param 0 is u, param 1 is v. */ +/* 'payload' loading, assuming tex coord start from g4 */ +cmp.g.f0.0 (1) null nv12 0x0UW {align1}; +(f0.0) jmpi INTERLEAVED_UV; + +/* load r */ +mov (1) g0.8<1>UD 0x0000e000UD { align1 mask_disable }; +mov (8) src_msg<1>UD g0<8,8,1>UD { align1 mask_disable }; + +/* src_msg will be copied with g0, as it contains send desc */ +/* emit sampler 'send' cmd */ + +/* sample U (Cr) */ +send (16) src_msg_ind /* msg reg index */ + src_sample_g<1>UW /* readback */ + null + sampler (3,2,F) /* sampler message description, (binding_table,sampler_index,datatype) + /* here(src->dst) we should use src_sampler and src_surface */ + mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */ + +/* sample V (Cb) */ +mov (1) g0.8<1>UD 0x0000e000UD { align1 mask_disable }; +mov (8) src_msg<1>UD g0<8,8,1>UD { align1 mask_disable }; + +send (16) src_msg_ind /* msg reg index */ + src_sample_b<1>UW /* readback */ + null + sampler (5,4,F) /* sampler message description, (binding_table,sampler_index,datatype) + /* here(src->dst) we should use src_sampler and src_surface */ + mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */ + +jmpi SAMPLE_Y; + +INTERLEAVED_UV: +mov (1) g0.8<1>UD 0x0000c000UD { align1 mask_disable }; +mov (8) src_msg<1>UD g0<8,8,1>UD { align1 mask_disable }; + +/* sample UV (CrCb) */ +send (16) src_msg_ind /* msg reg index */ + src_sample_g<1>UW /* readback */ + null + sampler (3,2,F) /* sampler message description, (binding_table,sampler_index,datatype) + /* here(src->dst) we should use src_sampler and src_surface */ + mlen 5 rlen 4 { align1 }; /* required message len 5, readback len 8 */ + +SAMPLE_Y: +mov (1) g0.8<1>UD 0x0000e000UD { align1 mask_disable }; +mov (8) src_msg<1>UD g0<8,8,1>UD { align1 mask_disable }; + +/* sample Y */ +send (16) src_msg_ind /* msg reg index */ + src_sample_r<1>UW /* readback */ + null + sampler (1,0,F) /* sampler message description, (binding_table,sampler_index,datatype) + /* here(src->dst) we should use src_sampler and src_surface */ + mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */ + diff --git a/src/shaders/render/exa_wm_src_sample_planar.g6b b/src/shaders/render/exa_wm_src_sample_planar.g6b new file mode 100644 index 00000000..e9368b6f --- /dev/null +++ b/src/shaders/render/exa_wm_src_sample_planar.g6b @@ -0,0 +1,15 @@ + { 0x03000010, 0x20002d3c, 0x000000c0, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00000201, 0x20080061, 0x00000000, 0x0000e000 }, + { 0x00600201, 0x20200022, 0x008d0000, 0x00000000 }, + { 0x02800031, 0x22001cc9, 0x00000020, 0x0a2a0203 }, + { 0x00000201, 0x20080061, 0x00000000, 0x0000e000 }, + { 0x00600201, 0x20200022, 0x008d0000, 0x00000000 }, + { 0x02800031, 0x22401cc9, 0x00000020, 0x0a2a0405 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000201, 0x20080061, 0x00000000, 0x0000c000 }, + { 0x00600201, 0x20200022, 0x008d0000, 0x00000000 }, + { 0x02800031, 0x22001cc9, 0x00000020, 0x0a4a0203 }, + { 0x00000201, 0x20080061, 0x00000000, 0x0000e000 }, + { 0x00600201, 0x20200022, 0x008d0000, 0x00000000 }, + { 0x02800031, 0x21c01cc9, 0x00000020, 0x0a2a0001 }, diff --git a/src/shaders/render/exa_wm_src_sample_planar.g7a b/src/shaders/render/exa_wm_src_sample_planar.g7a new file mode 100644 index 00000000..23d880f1 --- /dev/null +++ b/src/shaders/render/exa_wm_src_sample_planar.g7a @@ -0,0 +1,95 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Wang Zhenyu <zhenyu.z.wang@intel.com> + * Keith Packard <keithp@keithp.com> + */ + +/* Sample the src surface in planar format */ + +include(`exa_wm.g4i') + +/* Ivybridge uses GRFs in SEND instruction */ +define(`src_msg_gen7', `g65') +define(`src_msg_ind_gen7',`65') +/* UV flag */ +define(`nv12', `g6.0<0,1,0>UW') + +/* prepare sampler read back gX register, which would be written back to output */ + +/* use simd16 sampler, param 0 is u, param 1 is v. */ +/* 'payload' loading, assuming tex coord start from g4 */ +cmp.g.f0.0 (1) null nv12 0x0UW {align1}; +(f0.0) jmpi INTERLEAVED_UV; + +/* load r */ +mov (1) g0.8<1>UD 0x0000e000UD { align1 mask_disable }; +mov (8) src_msg_gen7<1>UD g0<8,8,1>UD { align1 mask_disable }; + +/* emit sampler 'send' cmd */ + +/* sample U (Cr) */ +send (16) src_msg_ind_gen7 /* msg reg index */ + src_sample_g<1>UW /* readback */ + null + sampler (3,2,F) /* sampler message description, (binding_table,sampler_index,datatype) + /* here(src->dst) we should use src_sampler and src_surface */ + mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */ + +/* sample V (Cb) */ +mov (1) g0.8<1>UD 0x0000e000UD { align1 mask_disable }; +mov (8) src_msg_gen7<1>UD g0<8,8,1>UD { align1 mask_disable }; + +send (16) src_msg_ind_gen7 /* msg reg index */ + src_sample_b<1>UW /* readback */ + null + sampler (5,4,F) /* sampler message description, (binding_table,sampler_index,datatype) + /* here(src->dst) we should use src_sampler and src_surface */ + mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */ + +jmpi SAMPLE_Y; + +INTERLEAVED_UV: +mov (1) g0.8<1>UD 0x0000c000UD { align1 mask_disable }; +mov (8) src_msg_gen7<1>UD g0<8,8,1>UD { align1 mask_disable }; + +/* sample UV (CrCb) */ +send (16) src_msg_ind_gen7 /* msg reg index */ + src_sample_g<1>UW /* readback */ + null + sampler (3,2,F) /* sampler message description, (binding_table,sampler_index,datatype) + /* here(src->dst) we should use src_sampler and src_surface */ + mlen 5 rlen 4 { align1 }; /* required message len 5, readback len 8 */ + +SAMPLE_Y: +mov (1) g0.8<1>UD 0x0000e000UD { align1 mask_disable }; +mov (8) src_msg_gen7<1>UD g0<8,8,1>UD { align1 mask_disable }; + +/* sample Y */ +send (16) src_msg_ind_gen7 /* msg reg index */ + src_sample_r<1>UW /* readback */ + null + sampler (1,0,F) /* sampler message description, (binding_table,sampler_index,datatype) + /* here(src->dst) we should use src_sampler and src_surface */ + mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */ + diff --git a/src/shaders/render/exa_wm_src_sample_planar.g7b b/src/shaders/render/exa_wm_src_sample_planar.g7b new file mode 100644 index 00000000..617ecf28 --- /dev/null +++ b/src/shaders/render/exa_wm_src_sample_planar.g7b @@ -0,0 +1,15 @@ + { 0x03000010, 0x20002d3c, 0x000000c0, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00000201, 0x20080061, 0x00000000, 0x0000e000 }, + { 0x00600201, 0x28200021, 0x008d0000, 0x00000000 }, + { 0x02800031, 0x22001ca9, 0x00000820, 0x0a2c0203 }, + { 0x00000201, 0x20080061, 0x00000000, 0x0000e000 }, + { 0x00600201, 0x28200021, 0x008d0000, 0x00000000 }, + { 0x02800031, 0x22401ca9, 0x00000820, 0x0a2c0405 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000201, 0x20080061, 0x00000000, 0x0000c000 }, + { 0x00600201, 0x28200021, 0x008d0000, 0x00000000 }, + { 0x02800031, 0x22001ca9, 0x00000820, 0x0a4c0203 }, + { 0x00000201, 0x20080061, 0x00000000, 0x0000e000 }, + { 0x00600201, 0x28200021, 0x008d0000, 0x00000000 }, + { 0x02800031, 0x21c01ca9, 0x00000820, 0x0a2c0001 }, diff --git a/src/shaders/render/exa_wm_write.g4a b/src/shaders/render/exa_wm_write.g4a new file mode 100644 index 00000000..2cb3d89c --- /dev/null +++ b/src/shaders/render/exa_wm_write.g4a @@ -0,0 +1,85 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Wang Zhenyu <zhenyu.z.wang@intel.com> + * Keith Packard <keithp@keithp.com> + */ + +include(`exa_wm.g4i') + +/* + * Prepare data in m2-m5 for subspan(1,0), m6-m9 for subspan(3,2), + * + * Note that the SIMD16 write message takes data for the first + * two sub-spans followed by the data for the second two sub-spans + * instead of having the two sub-spans interleaved by channel. Weird. + */ + +mov (8) data_port_r_01<1>F g14<8,8,1>F { align1 }; +mov (8) data_port_g_01<1>F g16<8,8,1>F { align1 }; +mov (8) data_port_b_01<1>F g18<8,8,1>F { align1 }; +mov (8) data_port_a_01<1>F src_sample_a_01<8,8,1>F { align1 }; + +mov (8) data_port_r_23<1>F src_sample_r_23<8,8,1>F { sechalf align1 }; +mov (8) data_port_g_23<1>F src_sample_g_23<8,8,1>F { sechalf align1 }; +mov (8) data_port_b_23<1>F src_sample_b_23<8,8,1>F { sechalf align1 }; +mov (8) data_port_a_23<1>F src_sample_a_23<8,8,1>F { sechalf align1 }; + + +mov (8) data_port_r_01<1>F src_sample_r_01<8,8,1>F { align1 }; +mov (8) data_port_g_01<1>F src_sample_g_01<8,8,1>F { align1 }; +mov (8) data_port_b_01<1>F src_sample_b_01<8,8,1>F { align1 }; +mov (8) data_port_a_01<1>F src_sample_a_01<8,8,1>F { align1 }; + +mov (8) data_port_r_23<1>F src_sample_r_23<8,8,1>F { sechalf align1 }; +mov (8) data_port_g_23<1>F src_sample_g_23<8,8,1>F { sechalf align1 }; +mov (8) data_port_b_23<1>F src_sample_b_23<8,8,1>F { sechalf align1 }; +mov (8) data_port_a_23<1>F src_sample_a_23<8,8,1>F { sechalf align1 }; + +/* m0, m1 are all direct passed by PS thread payload */ +mov (8) data_port_msg_1<1>UD g1<8,8,1>UD { mask_disable align1 }; + +/* write */ +send (16) + data_port_msg_0_ind + acc0<1>UW + g0<8,8,1>UW + write ( + 0, /* binding_table */ + 8, /* pixel scordboard clear, msg type simd16 single source */ + 4, /* render target write */ + 0 /* no write commit message */ + ) + mlen 10 + rlen 0 + { align1 EOT }; + +nop; +nop; +nop; +nop; +nop; +nop; +nop; +nop; + diff --git a/src/shaders/render/exa_wm_write.g4b b/src/shaders/render/exa_wm_write.g4b new file mode 100644 index 00000000..b7dcd161 --- /dev/null +++ b/src/shaders/render/exa_wm_write.g4b @@ -0,0 +1,26 @@ + { 0x00600001, 0x204003be, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x206003be, 0x008d0200, 0x00000000 }, + { 0x00600001, 0x208003be, 0x008d0240, 0x00000000 }, + { 0x00600001, 0x20a003be, 0x008d0280, 0x00000000 }, + { 0x00601001, 0x20c003be, 0x008d01e0, 0x00000000 }, + { 0x00601001, 0x20e003be, 0x008d0220, 0x00000000 }, + { 0x00601001, 0x210003be, 0x008d0260, 0x00000000 }, + { 0x00601001, 0x212003be, 0x008d02a0, 0x00000000 }, + { 0x00600001, 0x204003be, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x206003be, 0x008d0200, 0x00000000 }, + { 0x00600001, 0x208003be, 0x008d0240, 0x00000000 }, + { 0x00600001, 0x20a003be, 0x008d0280, 0x00000000 }, + { 0x00601001, 0x20c003be, 0x008d01e0, 0x00000000 }, + { 0x00601001, 0x20e003be, 0x008d0220, 0x00000000 }, + { 0x00601001, 0x210003be, 0x008d0260, 0x00000000 }, + { 0x00601001, 0x212003be, 0x008d02a0, 0x00000000 }, + { 0x00600201, 0x20200022, 0x008d0020, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d0000, 0x85a04800 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, diff --git a/src/shaders/render/exa_wm_write.g4b.gen5 b/src/shaders/render/exa_wm_write.g4b.gen5 new file mode 100644 index 00000000..14c1dae0 --- /dev/null +++ b/src/shaders/render/exa_wm_write.g4b.gen5 @@ -0,0 +1,26 @@ + { 0x00600001, 0x204003be, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x206003be, 0x008d0200, 0x00000000 }, + { 0x00600001, 0x208003be, 0x008d0240, 0x00000000 }, + { 0x00600001, 0x20a003be, 0x008d0280, 0x00000000 }, + { 0x00601001, 0x20c003be, 0x008d01e0, 0x00000000 }, + { 0x00601001, 0x20e003be, 0x008d0220, 0x00000000 }, + { 0x00601001, 0x210003be, 0x008d0260, 0x00000000 }, + { 0x00601001, 0x212003be, 0x008d02a0, 0x00000000 }, + { 0x00600001, 0x204003be, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x206003be, 0x008d0200, 0x00000000 }, + { 0x00600001, 0x208003be, 0x008d0240, 0x00000000 }, + { 0x00600001, 0x20a003be, 0x008d0280, 0x00000000 }, + { 0x00601001, 0x20c003be, 0x008d01e0, 0x00000000 }, + { 0x00601001, 0x20e003be, 0x008d0220, 0x00000000 }, + { 0x00601001, 0x210003be, 0x008d0260, 0x00000000 }, + { 0x00601001, 0x212003be, 0x008d02a0, 0x00000000 }, + { 0x00600201, 0x20200022, 0x008d0020, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x548d0000, 0x94084800 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, diff --git a/src/shaders/render/exa_wm_write.g6a b/src/shaders/render/exa_wm_write.g6a new file mode 100644 index 00000000..c0f3cc13 --- /dev/null +++ b/src/shaders/render/exa_wm_write.g6a @@ -0,0 +1,77 @@ +/* + * Copyright © 2010 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + +include(`exa_wm.g4i') + +/* + * Prepare data in m2-m3 for Red channel, m4-m5 for Green channel, + * m6-m7 for Blue and m8-m9 for Alpha channel + */ +define(`slot_r_00', `m2') +define(`slot_r_01', `m3') +define(`slot_g_00', `m4') +define(`slot_g_01', `m5') +define(`slot_b_00', `m6') +define(`slot_b_01', `m7') +define(`slot_a_00', `m8') +define(`slot_a_01', `m9') +define(`data_port_msg_2_ind', `2') + +mov (8) slot_r_00<1>F src_sample_r_01<8,8,1>F { align1 }; +mov (8) slot_r_01<1>F src_sample_r_23<8,8,1>F { align1 }; + +mov (8) slot_g_00<1>F src_sample_g_01<8,8,1>F { align1 }; +mov (8) slot_g_01<1>F src_sample_g_23<8,8,1>F { align1 }; + +mov (8) slot_b_00<1>F src_sample_b_01<8,8,1>F { align1 }; +mov (8) slot_b_01<1>F src_sample_b_23<8,8,1>F { align1 }; + +mov (8) slot_a_00<1>F src_sample_a_01<8,8,1>F { align1 }; +mov (8) slot_a_01<1>F src_sample_a_23<8,8,1>F { align1 }; + +/* write */ +send (16) + data_port_msg_2_ind + acc0<1>UW + null + write ( + 0, /* binding_table */ + 16, /* pixel scordboard clear, msg type simd16 single source */ + 12, /* render target write */ + 0, /* no write commit message */ + 0 /* headerless render target write */ + ) + mlen 8 + rlen 0 + { align1 EOT }; + +nop; +nop; +nop; +nop; +nop; +nop; +nop; +nop; + diff --git a/src/shaders/render/exa_wm_write.g6b b/src/shaders/render/exa_wm_write.g6b new file mode 100644 index 00000000..3cb6bff3 --- /dev/null +++ b/src/shaders/render/exa_wm_write.g6b @@ -0,0 +1,17 @@ + { 0x00600001, 0x204003be, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x206003be, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x208003be, 0x008d0200, 0x00000000 }, + { 0x00600001, 0x20a003be, 0x008d0220, 0x00000000 }, + { 0x00600001, 0x20c003be, 0x008d0240, 0x00000000 }, + { 0x00600001, 0x20e003be, 0x008d0260, 0x00000000 }, + { 0x00600001, 0x210003be, 0x008d0280, 0x00000000 }, + { 0x00600001, 0x212003be, 0x008d02a0, 0x00000000 }, + { 0x05800031, 0x24001cc8, 0x00000040, 0x90019000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, diff --git a/src/shaders/render/exa_wm_write.g7a b/src/shaders/render/exa_wm_write.g7a new file mode 100644 index 00000000..a2fb4478 --- /dev/null +++ b/src/shaders/render/exa_wm_write.g7a @@ -0,0 +1,83 @@ +/* + * Copyright © 2010 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + +include(`exa_wm.g4i') + +/* header */ +define(`data_port_msg_2_0', `g64') +define(`data_port_msg_2_1', `g65') +define(`data_port_msg_2_ind', `64') + +mov (8) data_port_msg_2_0<1>UD g0<8,8,1>UD {align1 mask_disable}; +mov (8) data_port_msg_2_1<1>UD g1<8,8,1>UD {align1 mask_disable}; + +/* + * Prepare data in g66-g67 for Red channel, g68-g69 for Green channel, + * g70-g71 for Blue and g72-g73 for Alpha channel + */ +define(`slot_r_00', `g66') +define(`slot_r_01', `g67') +define(`slot_g_00', `g68') +define(`slot_g_01', `g69') +define(`slot_b_00', `g70') +define(`slot_b_01', `g71') +define(`slot_a_00', `g72') +define(`slot_a_01', `g73') + +mov (8) slot_r_00<1>F src_sample_r_01<1>F { align1 mask_disable }; +mov (8) slot_r_01<1>F src_sample_r_23<1>F { align1 mask_disable }; + +mov (8) slot_g_00<1>F src_sample_g_01<1>F { align1 mask_disable }; +mov (8) slot_g_01<1>F src_sample_g_23<1>F { align1 mask_disable }; + +mov (8) slot_b_00<1>F src_sample_b_01<1>F { align1 mask_disable }; +mov (8) slot_b_01<1>F src_sample_b_23<1>F { align1 mask_disable }; + +mov (8) slot_a_00<1>F src_sample_a_01<1>F { align1 mask_disable }; +mov (8) slot_a_01<1>F src_sample_a_23<1>F { align1 mask_disable }; + +send (16) + data_port_msg_2_ind + null<1>UW + null + write ( + 0, /* binding table index */ + 16, /* last render target(1) + slots 15:0(0) + msg type simd16 single source(000) */ + 12, /* render target write */ + 0, /* ignore for Ivybridge */ + 1 /* header present */ + ) + mlen 10 + rlen 0 + { align1 EOT }; + +nop; +nop; +nop; +nop; +nop; +nop; +nop; +nop; + diff --git a/src/shaders/render/exa_wm_write.g7b b/src/shaders/render/exa_wm_write.g7b new file mode 100644 index 00000000..05e18014 --- /dev/null +++ b/src/shaders/render/exa_wm_write.g7b @@ -0,0 +1,19 @@ + { 0x00600201, 0x28000021, 0x008d0000, 0x00000000 }, + { 0x00600201, 0x28200021, 0x008d0020, 0x00000000 }, + { 0x00600201, 0x284003bd, 0x002001c0, 0x00000000 }, + { 0x00600201, 0x286003bd, 0x002001e0, 0x00000000 }, + { 0x00600201, 0x288003bd, 0x00200200, 0x00000000 }, + { 0x00600201, 0x28a003bd, 0x00200220, 0x00000000 }, + { 0x00600201, 0x28c003bd, 0x00200240, 0x00000000 }, + { 0x00600201, 0x28e003bd, 0x00200260, 0x00000000 }, + { 0x00600201, 0x290003bd, 0x00200280, 0x00000000 }, + { 0x00600201, 0x292003bd, 0x002002a0, 0x00000000 }, + { 0x05800031, 0x20001ca8, 0x00000800, 0x940b1000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, diff --git a/src/shaders/render/exa_wm_xy.g4a b/src/shaders/render/exa_wm_xy.g4a new file mode 100644 index 00000000..e99f5ac1 --- /dev/null +++ b/src/shaders/render/exa_wm_xy.g4a @@ -0,0 +1,52 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Wang Zhenyu <zhenyu.z.wang@intel.com> + * Keith Packard <keithp@keithp.com> + */ + +/* + * Register assignments: + * + * x g6/g7 + * y g8/g9 + * + * temp x g10/g11 + * temp y g12/g13 + * + * src w g14/g15 + * src u m1/m2 + * src v m3/m4 + */ + +/* Fragment to compute per-pixel XY values */ + +include(`exa_wm.g4i') + + /* Load X and Y coordinates and compute per-pixel coordinates */ +add (16) temp_x_uw<1>UW dst_x_uw 0x10101010V { align1 }; +add (16) temp_y_uw<1>UW dst_y_uw 0x11001100V { align1 }; + + /* subtract screen-space origin of vertex 0 */ +add (16) dst_x<1>F temp_x_uw<8,8,1>UW -screen_x0 { compr align1 }; +add (16) dst_y<1>F temp_y_uw<8,8,1>UW -screen_y0 { compr align1 }; diff --git a/src/shaders/render/exa_wm_xy.g4b b/src/shaders/render/exa_wm_xy.g4b new file mode 100644 index 00000000..327fc29c --- /dev/null +++ b/src/shaders/render/exa_wm_xy.g4b @@ -0,0 +1,4 @@ + { 0x00800040, 0x23c06d29, 0x00480028, 0x10101010 }, + { 0x00800040, 0x23806d29, 0x0048002a, 0x11001100 }, + { 0x00802040, 0x2100753d, 0x008d03c0, 0x00004020 }, + { 0x00802040, 0x2140753d, 0x008d0380, 0x00004024 }, diff --git a/src/shaders/render/exa_wm_xy.g4b.gen5 b/src/shaders/render/exa_wm_xy.g4b.gen5 new file mode 100644 index 00000000..327fc29c --- /dev/null +++ b/src/shaders/render/exa_wm_xy.g4b.gen5 @@ -0,0 +1,4 @@ + { 0x00800040, 0x23c06d29, 0x00480028, 0x10101010 }, + { 0x00800040, 0x23806d29, 0x0048002a, 0x11001100 }, + { 0x00802040, 0x2100753d, 0x008d03c0, 0x00004020 }, + { 0x00802040, 0x2140753d, 0x008d0380, 0x00004024 }, diff --git a/src/shaders/render/exa_wm_yuv_rgb.g4a b/src/shaders/render/exa_wm_yuv_rgb.g4a new file mode 100644 index 00000000..5b9e625f --- /dev/null +++ b/src/shaders/render/exa_wm_yuv_rgb.g4a @@ -0,0 +1,98 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Keith Packard <keithp@keithp.com> + * Eric Anholt <eric@anholt.net> + * + */ + +include(`exa_wm.g4i') + +define(`YCbCr_base', `src_sample_base') + +define(`Cr', `src_sample_b') +define(`Cr_01', `src_sample_b_01') +define(`Cr_23', `src_sample_b_23') + +define(`Y', `src_sample_r') +define(`Y_01', `src_sample_r_01') +define(`Y_23', `src_sample_r_23') + +define(`Cb', `src_sample_g') +define(`Cb_01', `src_sample_g_01') +define(`Cb_23', `src_sample_g_23') + +define(`Crn', `mask_sample_g') +define(`Crn_01', `mask_sample_g_01') +define(`Crn_23', `mask_sample_g_23') + +define(`Yn', `mask_sample_r') +define(`Yn_01', `mask_sample_r_01') +define(`Yn_23', `mask_sample_r_23') + +define(`Cbn', `mask_sample_b') +define(`Cbn_01', `mask_sample_b_01') +define(`Cbn_23', `mask_sample_b_23') + + /* color space conversion function: + * R = Clamp ( 1.164(Y-16/255) + 1.596(Cr-128/255), 0, 1) + * G = Clamp ( 1.164(Y-16/255) - 0.813(Cr-128/255) - 0.392(Cb-128/255), 0, 1) + * B = Clamp ( 1.164(Y-16/255) + 2.017(Cb-128/255), 0, 1) + */ + + /* Normalize Y, Cb and Cr: + * + * Yn = (Y - 16/255) * 1.164 + * Crn = Cr - 128 / 255 + * Cbn = Cb - 128 / 255 + */ +add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 }; +mul (16) Yn<1>F Yn<8,8,1>F 1.164F { compr align1 }; + +add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 }; + +add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 }; + + /* + * R = Y + Cr * 1.596 + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac.sat(16) src_sample_r<1>F Crn<8,8,1>F 1.596F { compr align1 }; + + /* + * G = Crn * -0.813 + Cbn * -0.392 + Y + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac (16) acc0<1>F Crn<8,8,1>F -0.813F { compr align1 }; +mac.sat(16) src_sample_g<1>F Cbn<8,8,1>F -0.392F { compr align1 }; + + /* + * B = Cbn * 2.017 + Y + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac.sat(16) src_sample_b<1>F Cbn<8,8,1>F 2.017F { compr align1 }; + + /* + * A = 1.0 + */ +//mov (16) src_sample_a<1>F 1.0F { compr align1 }; diff --git a/src/shaders/render/exa_wm_yuv_rgb.g4b b/src/shaders/render/exa_wm_yuv_rgb.g4b new file mode 100644 index 00000000..6a76da46 --- /dev/null +++ b/src/shaders/render/exa_wm_yuv_rgb.g4b @@ -0,0 +1,11 @@ + { 0x00802040, 0x22c07fbd, 0x008d01c0, 0xbd808081 }, + { 0x00802041, 0x22c07fbd, 0x008d02c0, 0x3f94fdf4 }, + { 0x00802040, 0x23007fbd, 0x008d0240, 0xbf008084 }, + { 0x00802040, 0x23407fbd, 0x008d0200, 0xbf008084 }, + { 0x00802001, 0x240003bc, 0x008d02c0, 0x00000000 }, + { 0x80802048, 0x21c07fbd, 0x008d0300, 0x3fcc49ba }, + { 0x00802001, 0x240003bc, 0x008d02c0, 0x00000000 }, + { 0x00802048, 0x24007fbc, 0x008d0300, 0xbf5020c5 }, + { 0x80802048, 0x22007fbd, 0x008d0340, 0xbec8b439 }, + { 0x00802001, 0x240003bc, 0x008d02c0, 0x00000000 }, + { 0x80802048, 0x22407fbd, 0x008d0340, 0x40011687 }, diff --git a/src/shaders/render/exa_wm_yuv_rgb.g4b.gen5 b/src/shaders/render/exa_wm_yuv_rgb.g4b.gen5 new file mode 100644 index 00000000..6a76da46 --- /dev/null +++ b/src/shaders/render/exa_wm_yuv_rgb.g4b.gen5 @@ -0,0 +1,11 @@ + { 0x00802040, 0x22c07fbd, 0x008d01c0, 0xbd808081 }, + { 0x00802041, 0x22c07fbd, 0x008d02c0, 0x3f94fdf4 }, + { 0x00802040, 0x23007fbd, 0x008d0240, 0xbf008084 }, + { 0x00802040, 0x23407fbd, 0x008d0200, 0xbf008084 }, + { 0x00802001, 0x240003bc, 0x008d02c0, 0x00000000 }, + { 0x80802048, 0x21c07fbd, 0x008d0300, 0x3fcc49ba }, + { 0x00802001, 0x240003bc, 0x008d02c0, 0x00000000 }, + { 0x00802048, 0x24007fbc, 0x008d0300, 0xbf5020c5 }, + { 0x80802048, 0x22007fbd, 0x008d0340, 0xbec8b439 }, + { 0x00802001, 0x240003bc, 0x008d02c0, 0x00000000 }, + { 0x80802048, 0x22407fbd, 0x008d0340, 0x40011687 }, diff --git a/src/shaders/render/exa_wm_yuv_rgb.g6a b/src/shaders/render/exa_wm_yuv_rgb.g6a new file mode 100644 index 00000000..5b9e625f --- /dev/null +++ b/src/shaders/render/exa_wm_yuv_rgb.g6a @@ -0,0 +1,98 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Keith Packard <keithp@keithp.com> + * Eric Anholt <eric@anholt.net> + * + */ + +include(`exa_wm.g4i') + +define(`YCbCr_base', `src_sample_base') + +define(`Cr', `src_sample_b') +define(`Cr_01', `src_sample_b_01') +define(`Cr_23', `src_sample_b_23') + +define(`Y', `src_sample_r') +define(`Y_01', `src_sample_r_01') +define(`Y_23', `src_sample_r_23') + +define(`Cb', `src_sample_g') +define(`Cb_01', `src_sample_g_01') +define(`Cb_23', `src_sample_g_23') + +define(`Crn', `mask_sample_g') +define(`Crn_01', `mask_sample_g_01') +define(`Crn_23', `mask_sample_g_23') + +define(`Yn', `mask_sample_r') +define(`Yn_01', `mask_sample_r_01') +define(`Yn_23', `mask_sample_r_23') + +define(`Cbn', `mask_sample_b') +define(`Cbn_01', `mask_sample_b_01') +define(`Cbn_23', `mask_sample_b_23') + + /* color space conversion function: + * R = Clamp ( 1.164(Y-16/255) + 1.596(Cr-128/255), 0, 1) + * G = Clamp ( 1.164(Y-16/255) - 0.813(Cr-128/255) - 0.392(Cb-128/255), 0, 1) + * B = Clamp ( 1.164(Y-16/255) + 2.017(Cb-128/255), 0, 1) + */ + + /* Normalize Y, Cb and Cr: + * + * Yn = (Y - 16/255) * 1.164 + * Crn = Cr - 128 / 255 + * Cbn = Cb - 128 / 255 + */ +add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 }; +mul (16) Yn<1>F Yn<8,8,1>F 1.164F { compr align1 }; + +add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 }; + +add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 }; + + /* + * R = Y + Cr * 1.596 + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac.sat(16) src_sample_r<1>F Crn<8,8,1>F 1.596F { compr align1 }; + + /* + * G = Crn * -0.813 + Cbn * -0.392 + Y + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac (16) acc0<1>F Crn<8,8,1>F -0.813F { compr align1 }; +mac.sat(16) src_sample_g<1>F Cbn<8,8,1>F -0.392F { compr align1 }; + + /* + * B = Cbn * 2.017 + Y + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac.sat(16) src_sample_b<1>F Cbn<8,8,1>F 2.017F { compr align1 }; + + /* + * A = 1.0 + */ +//mov (16) src_sample_a<1>F 1.0F { compr align1 }; diff --git a/src/shaders/render/exa_wm_yuv_rgb.g6b b/src/shaders/render/exa_wm_yuv_rgb.g6b new file mode 100644 index 00000000..21fa6fb8 --- /dev/null +++ b/src/shaders/render/exa_wm_yuv_rgb.g6b @@ -0,0 +1,11 @@ + { 0x00800040, 0x22c07fbd, 0x008d01c0, 0xbd808081 }, + { 0x00800041, 0x22c07fbd, 0x008d02c0, 0x3f94fdf4 }, + { 0x00800040, 0x23007fbd, 0x008d0240, 0xbf008084 }, + { 0x00800040, 0x23407fbd, 0x008d0200, 0xbf008084 }, + { 0x00800001, 0x240003bc, 0x008d02c0, 0x00000000 }, + { 0x80800048, 0x21c07fbd, 0x008d0300, 0x3fcc49ba }, + { 0x00800001, 0x240003bc, 0x008d02c0, 0x00000000 }, + { 0x00800048, 0x24007fbc, 0x008d0300, 0xbf5020c5 }, + { 0x80800048, 0x22007fbd, 0x008d0340, 0xbec8b439 }, + { 0x00800001, 0x240003bc, 0x008d02c0, 0x00000000 }, + { 0x80800048, 0x22407fbd, 0x008d0340, 0x40011687 }, diff --git a/src/shaders/render/exa_wm_yuv_rgb.g7a b/src/shaders/render/exa_wm_yuv_rgb.g7a new file mode 100644 index 00000000..5b9e625f --- /dev/null +++ b/src/shaders/render/exa_wm_yuv_rgb.g7a @@ -0,0 +1,98 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Keith Packard <keithp@keithp.com> + * Eric Anholt <eric@anholt.net> + * + */ + +include(`exa_wm.g4i') + +define(`YCbCr_base', `src_sample_base') + +define(`Cr', `src_sample_b') +define(`Cr_01', `src_sample_b_01') +define(`Cr_23', `src_sample_b_23') + +define(`Y', `src_sample_r') +define(`Y_01', `src_sample_r_01') +define(`Y_23', `src_sample_r_23') + +define(`Cb', `src_sample_g') +define(`Cb_01', `src_sample_g_01') +define(`Cb_23', `src_sample_g_23') + +define(`Crn', `mask_sample_g') +define(`Crn_01', `mask_sample_g_01') +define(`Crn_23', `mask_sample_g_23') + +define(`Yn', `mask_sample_r') +define(`Yn_01', `mask_sample_r_01') +define(`Yn_23', `mask_sample_r_23') + +define(`Cbn', `mask_sample_b') +define(`Cbn_01', `mask_sample_b_01') +define(`Cbn_23', `mask_sample_b_23') + + /* color space conversion function: + * R = Clamp ( 1.164(Y-16/255) + 1.596(Cr-128/255), 0, 1) + * G = Clamp ( 1.164(Y-16/255) - 0.813(Cr-128/255) - 0.392(Cb-128/255), 0, 1) + * B = Clamp ( 1.164(Y-16/255) + 2.017(Cb-128/255), 0, 1) + */ + + /* Normalize Y, Cb and Cr: + * + * Yn = (Y - 16/255) * 1.164 + * Crn = Cr - 128 / 255 + * Cbn = Cb - 128 / 255 + */ +add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 }; +mul (16) Yn<1>F Yn<8,8,1>F 1.164F { compr align1 }; + +add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 }; + +add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 }; + + /* + * R = Y + Cr * 1.596 + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac.sat(16) src_sample_r<1>F Crn<8,8,1>F 1.596F { compr align1 }; + + /* + * G = Crn * -0.813 + Cbn * -0.392 + Y + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac (16) acc0<1>F Crn<8,8,1>F -0.813F { compr align1 }; +mac.sat(16) src_sample_g<1>F Cbn<8,8,1>F -0.392F { compr align1 }; + + /* + * B = Cbn * 2.017 + Y + */ +mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; +mac.sat(16) src_sample_b<1>F Cbn<8,8,1>F 2.017F { compr align1 }; + + /* + * A = 1.0 + */ +//mov (16) src_sample_a<1>F 1.0F { compr align1 }; diff --git a/src/shaders/render/exa_wm_yuv_rgb.g7b b/src/shaders/render/exa_wm_yuv_rgb.g7b new file mode 100644 index 00000000..21fa6fb8 --- /dev/null +++ b/src/shaders/render/exa_wm_yuv_rgb.g7b @@ -0,0 +1,11 @@ + { 0x00800040, 0x22c07fbd, 0x008d01c0, 0xbd808081 }, + { 0x00800041, 0x22c07fbd, 0x008d02c0, 0x3f94fdf4 }, + { 0x00800040, 0x23007fbd, 0x008d0240, 0xbf008084 }, + { 0x00800040, 0x23407fbd, 0x008d0200, 0xbf008084 }, + { 0x00800001, 0x240003bc, 0x008d02c0, 0x00000000 }, + { 0x80800048, 0x21c07fbd, 0x008d0300, 0x3fcc49ba }, + { 0x00800001, 0x240003bc, 0x008d02c0, 0x00000000 }, + { 0x00800048, 0x24007fbc, 0x008d0300, 0xbf5020c5 }, + { 0x80800048, 0x22007fbd, 0x008d0340, 0xbec8b439 }, + { 0x00800001, 0x240003bc, 0x008d02c0, 0x00000000 }, + { 0x80800048, 0x22407fbd, 0x008d0340, 0x40011687 }, diff --git a/src/shaders/vld/Makefile b/src/shaders/vld/Makefile new file mode 100644 index 00000000..c0bda3ad --- /dev/null +++ b/src/shaders/vld/Makefile @@ -0,0 +1,384 @@ +# Makefile.in generated by automake 1.10.1 from Makefile.am. +# i965_drv_video/shaders/vld/Makefile. Generated from Makefile.in by configure. + +# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, +# 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc. +# This Makefile.in is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY, to the extent permitted by law; without +# even the implied warranty of MERCHANTABILITY or FITNESS FOR A +# PARTICULAR PURPOSE. + + + +pkgdatadir = $(datadir)/libva +pkglibdir = $(libdir)/libva +pkgincludedir = $(includedir)/libva +am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd +install_sh_DATA = $(install_sh) -c -m 644 +install_sh_PROGRAM = $(install_sh) -c +install_sh_SCRIPT = $(install_sh) -c +INSTALL_HEADER = $(INSTALL_DATA) +transform = $(program_transform_name) +NORMAL_INSTALL = : +PRE_INSTALL = : +POST_INSTALL = : +NORMAL_UNINSTALL = : +PRE_UNINSTALL = : +POST_UNINSTALL = : +build_triplet = x86_64-unknown-linux-gnu +host_triplet = x86_64-unknown-linux-gnu +subdir = i965_drv_video/shaders/vld +DIST_COMMON = $(srcdir)/Makefile.am $(srcdir)/Makefile.in +ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 +am__aclocal_m4_deps = $(top_srcdir)/configure.ac +am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \ + $(ACLOCAL_M4) +mkinstalldirs = $(install_sh) -d +CONFIG_HEADER = $(top_builddir)/config.h +CONFIG_CLEAN_FILES = +SOURCES = +DIST_SOURCES = +DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST) +ACLOCAL = aclocal -I /opt/X11R7/share/aclocal +AMTAR = ${SHELL} /root/libva/missing --run tar +AR = ar +AUTOCONF = ${SHELL} /root/libva/missing --run autoconf +AUTOHEADER = ${SHELL} /root/libva/missing --run autoheader +AUTOMAKE = ${SHELL} /root/libva/missing --run automake-1.10 +AWK = gawk +CC = gcc +CCDEPMODE = depmode=gcc3 +CFLAGS = -g -O2 +CPP = gcc -E +CPPFLAGS = +CXX = g++ +CXXCPP = g++ -E +CXXDEPMODE = depmode=gcc3 +CXXFLAGS = -g -O2 +CYGPATH_W = echo +DEFS = -DHAVE_CONFIG_H +DEPDIR = .deps +DRM_CFLAGS = -I/opt/X11R7/include -I/opt/X11R7/include/drm +DRM_LIBS = -L/opt/X11R7/lib -ldrm +ECHO = echo +ECHO_C = +ECHO_N = -n +ECHO_T = +EGREP = /bin/grep -E +EXEEXT = +F77 = gfortran +FFLAGS = -g -O2 +GREP = /bin/grep +INSTALL = /usr/bin/install -c +INSTALL_DATA = ${INSTALL} -m 644 +INSTALL_PROGRAM = ${INSTALL} +INSTALL_SCRIPT = ${INSTALL} +INSTALL_STRIP_PROGRAM = $(install_sh) -c -s +LDFLAGS = +LIBOBJS = +LIBS = +LIBTOOL = $(SHELL) $(top_builddir)/libtool +LN_S = ln -s +LTLIBOBJS = +MAKEINFO = ${SHELL} /root/libva/missing --run makeinfo +MKDIR_P = /bin/mkdir -p +OBJEXT = o +PACKAGE = libva +PACKAGE_BUGREPORT = waldo.bastian@intel.com +PACKAGE_NAME = libva +PACKAGE_STRING = libva 0.29 +PACKAGE_TARNAME = libva +PACKAGE_VERSION = 0.29 +PATH_SEPARATOR = : +PKG_CONFIG = /usr/bin/pkg-config +RANLIB = ranlib +SED = /bin/sed +SET_MAKE = +SHELL = /bin/sh +STRIP = strip +VERSION = 0.29 +abs_builddir = /root/libva/i965_drv_video/shaders/vld +abs_srcdir = /root/libva/i965_drv_video/shaders/vld +abs_top_builddir = /root/libva +abs_top_srcdir = /root/libva +ac_ct_CC = gcc +ac_ct_CXX = g++ +ac_ct_F77 = gfortran +am__include = include +am__leading_dot = . +am__quote = +am__tar = ${AMTAR} chof - "$$tardir" +am__untar = ${AMTAR} xf - +bindir = ${exec_prefix}/bin +build = x86_64-unknown-linux-gnu +build_alias = +build_cpu = x86_64 +build_os = linux-gnu +build_vendor = unknown +builddir = . +datadir = ${datarootdir} +datarootdir = ${prefix}/share +docdir = ${datarootdir}/doc/${PACKAGE_TARNAME} +dvidir = ${docdir} +exec_prefix = ${prefix} +gen4asm = no +host = x86_64-unknown-linux-gnu +host_alias = +host_cpu = x86_64 +host_os = linux-gnu +host_vendor = unknown +htmldir = ${docdir} +includedir = ${prefix}/include +infodir = ${datarootdir}/info +install_sh = $(SHELL) /root/libva/install-sh +libdir = ${exec_prefix}/lib +libexecdir = ${exec_prefix}/libexec +localedir = ${datarootdir}/locale +localstatedir = ${prefix}/var +mandir = ${datarootdir}/man +mkdir_p = /bin/mkdir -p +oldincludedir = /usr/include +pdfdir = ${docdir} +pkgconfigdir = ${exec_prefix}/lib/pkgconfig +prefix = /opt/X11R7 +program_transform_name = s,x,x, +psdir = ${docdir} +sbindir = ${exec_prefix}/sbin +sharedstatedir = ${prefix}/com +srcdir = . +sysconfdir = ${prefix}/etc +target_alias = +top_builddir = ../../.. +top_srcdir = ../../.. +INTEL_G4I = addidct.g4i \ + do_iq_intra.g4i \ + do_iq_non_intra.g4i \ + idct.g4i \ + iq_intra.g4i \ + iq_non_intra.g4i \ + motion_field_uv.g4i \ + motion_field_y.g4i \ + motion_frame_uv.g4i \ + motion_frame_y.g4i \ + read_field_x0y0_uv.g4i \ + read_field_x0y0_y.g4i \ + read_field_x0y1_y.g4i \ + read_field_x1y0_y.g4i \ + read_field_x1y1_y.g4i \ + read_frame_x0y0_uv.g4i \ + read_frame_x0y0_y.g4i \ + read_frame_x0y1_y.g4i \ + read_frame_x1y0_y.g4i \ + read_frame_x1y1_y.g4i + +INTEL_G4A = ipicture.g4a \ + lib.g4a \ + frame_forward.g4a \ + frame_backward.g4a \ + frame_f_b.g4a \ + field_forward.g4a \ + field_backward.g4a \ + field_f_b.g4a + +INTEL_G4B = ipicture.g4b \ + lib.g4b \ + frame_forward.g4b \ + frame_backward.g4b \ + frame_f_b.g4b \ + field_forward.g4b \ + field_backward.g4b \ + field_f_b.g4b + +EXTRA_DIST = $(INTEL_G4I) \ + $(INTEL_G4A) \ + $(INTEL_G4B) + +#SUFFIXES = .g4a .g4b +#BUILT_SOURCES = $(INTEL_G4B) +all: $(BUILT_SOURCES) + $(MAKE) $(AM_MAKEFLAGS) all-am + +.SUFFIXES: +.SUFFIXES: .g4a .g4b +$(srcdir)/Makefile.in: $(srcdir)/Makefile.am $(am__configure_deps) + @for dep in $?; do \ + case '$(am__configure_deps)' in \ + *$$dep*) \ + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh \ + && exit 0; \ + exit 1;; \ + esac; \ + done; \ + echo ' cd $(top_srcdir) && $(AUTOMAKE) --gnu i965_drv_video/shaders/vld/Makefile'; \ + cd $(top_srcdir) && \ + $(AUTOMAKE) --gnu i965_drv_video/shaders/vld/Makefile +.PRECIOUS: Makefile +Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status + @case '$?' in \ + *config.status*) \ + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \ + *) \ + echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \ + cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \ + esac; + +$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh + +$(top_srcdir)/configure: $(am__configure_deps) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh +$(ACLOCAL_M4): $(am__aclocal_m4_deps) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh + +mostlyclean-libtool: + -rm -f *.lo + +clean-libtool: + -rm -rf .libs _libs +tags: TAGS +TAGS: + +ctags: CTAGS +CTAGS: + + +distdir: $(DISTFILES) + @srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \ + topsrcdirstrip=`echo "$(top_srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \ + list='$(DISTFILES)'; \ + dist_files=`for file in $$list; do echo $$file; done | \ + sed -e "s|^$$srcdirstrip/||;t" \ + -e "s|^$$topsrcdirstrip/|$(top_builddir)/|;t"`; \ + case $$dist_files in \ + */*) $(MKDIR_P) `echo "$$dist_files" | \ + sed '/\//!d;s|^|$(distdir)/|;s,/[^/]*$$,,' | \ + sort -u` ;; \ + esac; \ + for file in $$dist_files; do \ + if test -f $$file || test -d $$file; then d=.; else d=$(srcdir); fi; \ + if test -d $$d/$$file; then \ + dir=`echo "/$$file" | sed -e 's,/[^/]*$$,,'`; \ + if test -d $(srcdir)/$$file && test $$d != $(srcdir); then \ + cp -pR $(srcdir)/$$file $(distdir)$$dir || exit 1; \ + fi; \ + cp -pR $$d/$$file $(distdir)$$dir || exit 1; \ + else \ + test -f $(distdir)/$$file \ + || cp -p $$d/$$file $(distdir)/$$file \ + || exit 1; \ + fi; \ + done +check-am: all-am +check: $(BUILT_SOURCES) + $(MAKE) $(AM_MAKEFLAGS) check-am +all-am: Makefile +installdirs: +install: $(BUILT_SOURCES) + $(MAKE) $(AM_MAKEFLAGS) install-am +install-exec: install-exec-am +install-data: install-data-am +uninstall: uninstall-am + +install-am: all-am + @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am + +installcheck: installcheck-am +install-strip: + $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \ + install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \ + `test -z '$(STRIP)' || \ + echo "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'"` install +mostlyclean-generic: + +clean-generic: + +distclean-generic: + -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES) + +maintainer-clean-generic: + @echo "This command is intended for maintainers to use" + @echo "it deletes files that may require special tools to rebuild." + -test -z "$(BUILT_SOURCES)" || rm -f $(BUILT_SOURCES) +clean-local: +clean: clean-am + +clean-am: clean-generic clean-libtool clean-local mostlyclean-am + +distclean: distclean-am + -rm -f Makefile +distclean-am: clean-am distclean-generic + +dvi: dvi-am + +dvi-am: + +html: html-am + +info: info-am + +info-am: + +install-data-am: + +install-dvi: install-dvi-am + +install-exec-am: + +install-html: install-html-am + +install-info: install-info-am + +install-man: + +install-pdf: install-pdf-am + +install-ps: install-ps-am + +installcheck-am: + +maintainer-clean: maintainer-clean-am + -rm -f Makefile +maintainer-clean-am: distclean-am maintainer-clean-generic + +mostlyclean: mostlyclean-am + +mostlyclean-am: mostlyclean-generic mostlyclean-libtool + +pdf: pdf-am + +pdf-am: + +ps: ps-am + +ps-am: + +uninstall-am: + +.MAKE: install-am install-strip + +.PHONY: all all-am check check-am clean clean-generic clean-libtool \ + clean-local distclean distclean-generic distclean-libtool \ + distdir dvi dvi-am html html-am info info-am install \ + install-am install-data install-data-am install-dvi \ + install-dvi-am install-exec install-exec-am install-html \ + install-html-am install-info install-info-am install-man \ + install-pdf install-pdf-am install-ps install-ps-am \ + install-strip installcheck installcheck-am installdirs \ + maintainer-clean maintainer-clean-generic mostlyclean \ + mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \ + uninstall uninstall-am + +#.g4a.g4b: +# m4 $*.g4a > $*.g4m && intel-gen4asm -o $@ $*.g4m && rm $*.g4m + +#$(INTEL_G4B): $(INTEL_G4I) + +#clean-local: +# -rm -f $(INTEL_G4B) +# Tell versions [3.59,3.63) of GNU make to not export all variables. +# Otherwise a system limit (for SysV at least) may be exceeded. +.NOEXPORT: diff --git a/src/shaders/vme/Makefile.am b/src/shaders/vme/Makefile.am new file mode 100644 index 00000000..e1097a78 --- /dev/null +++ b/src/shaders/vme/Makefile.am @@ -0,0 +1,37 @@ +VME_CORE = intra_frame.asm inter_frame.asm + +INTEL_G6B = intra_frame.g6b inter_frame.g6b +INTEL_G6A = intra_frame.g6a inter_frame.g6a +INTEL_INC = gen6_vme_header.inc + +INTEL_G7B = intra_frame.g7b inter_frame.g7b +INTEL_G7A = intra_frame.g7a inter_frame.g7a +INTEL_INC_GEN7 = gen7_vme_header.inc + +EXTRA_DIST = $(INTEL_G6B) \ + $(INTEL_G6A) \ + $(INTEL_INC) \ + $(INTEL_G7B) \ + $(INTEL_G7A) \ + $(INTEL_INC_GEN7) + +if HAVE_GEN4ASM + +SUFFIXES = .g6a .g6b .g7a .g7b +.g6a.g6b: + m4 $*.g6a > $*.g6m && intel-gen4asm -g 6 -o $@ $*.g6m && rm $*.g6m + +.g7a.g7b: + m4 $*.g7a > $*.g7m && intel-gen4asm -g 7 -o $@ $*.g7m && rm $*.g7m + +$(INTEL_G6B): $(INTEL_INC) $(VME_CORE) + +$(INTEL_G7B): $(INTEL_INC_GEN7) $(VME_CORE) + +BUILT_SOURCES= $(INTEL_G6B) $(INTEL_G7B) + +clean-local: + -rm -f $(INTEL_G6B) + -rm -f $(INTEL_G7B) + +endif diff --git a/src/shaders/vme/gen6_vme_header.inc b/src/shaders/vme/gen6_vme_header.inc new file mode 100644 index 00000000..b73e11c9 --- /dev/null +++ b/src/shaders/vme/gen6_vme_header.inc @@ -0,0 +1,160 @@ +/* + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ +// Modual name: ME_header.inc +// +// Global symbols define +// + +/* + * Constant + */ +define(`VME_MESSAGE_TYPE_INTER', `1') +define(`VME_MESSAGE_TYPE_INTRA', `2') +define(`VME_MESSAGE_TYPE_MIXED', `3') + +define(`BLOCK_32X1', `0x0000001F') +define(`BLOCK_4X16', `0x000F0003') + +define(`LUMA_INTRA_16x16_DISABLE', `0x1') +define(`LUMA_INTRA_8x8_DISABLE', `0x2') +define(`LUMA_INTRA_4x4_DISABLE', `0x4') + +define(`INTRA_PRED_AVAIL_FLAG_AE', `0x60') +define(`INTRA_PRED_AVAIL_FLAG_B', `0x10') +define(`INTRA_PRED_AVAIL_FLAG_C', `0x8') +define(`INTRA_PRED_AVAIL_FLAG_D', `0x4') + +define(`BIND_IDX_VME', `0') +define(`BIND_IDX_VME_REF0', `1') +define(`BIND_IDX_VME_REF1', `2') +define(`BIND_IDX_OUTPUT', `3') +define(`BIND_IDX_INEP', `4') + +define(`SUB_PEL_MODE_INTEGER', `0x00000000') +define(`SUB_PEL_MODE_HALF', `0x00001000') +define(`SUB_PEL_MODE_QUARTER', `0x00003000') + +define(`INTER_SAD_NONE', `0x00000000') +define(`INTER_SAD_HAAR', `0x00200000') + +define(`INTRA_SAD_NONE', `0x00000000') +define(`INTRA_SAD_HAAR', `0x00800000') + +define(`INTER_PART_MASK', `0x7E000000') + +define(`REF_REGION_SIZE', `0x2020:UW') + +define(`BI_SUB_MB_PART_MASK', `0x0c000000') +define(`MAX_NUM_MV', `0x00000020') +define(`SEARCH_PATH_LEN', `0x00003F3F') + +define(`INTRA_PREDICTORE_MODE', `0x11111111:UD') + +define(`OBW_CACHE_TYPE', `5') + +define(`OBW_MESSAGE_TYPE', `8') + +define(`OBW_BIND_IDX', `BIND_IDX_OUTPUT') + +define(`OBW_CONTROL_0', `0') /* 1 OWord, low 128 bits */ +define(`OBW_CONTROL_1', `1') /* 1 OWord, high 128 bits */ +define(`OBW_CONTROL_2', `2') /* 2 OWords */ +define(`OBW_CONTROL_3', `3') /* 4 OWords */ + +define(`OBW_WRITE_COMMIT_CATEGORY', `1') /* write commit on Sandybrige */ + +define(`OBW_HEADER_PRESENT', `1') + +/* GRF registers + * r0 header + * r1~r4 constant buffer (reserved) + * r5 inline data + * r6~r11 reserved + * r12 write back of VME message + * r13 write back of Oword Block Write + */ +/* + * GRF 0 -- header + */ +define(`thread_id_ub', `r0.20<0,1,0>:UB') /* thread id in payload */ + +/* + * GRF 1~4 -- Constant Buffer (reserved) + */ + +/* + * GRF 5 -- inline data + */ +define(`inline_reg0', `r5') +define(`w_in_mb_uw', `inline_reg0.2') +define(`orig_xy_ub', `inline_reg0.0') +define(`orig_x_ub', `inline_reg0.0') /* in macroblock */ +define(`orig_y_ub', `inline_reg0.1') + +/* + * GRF 6~11 -- reserved + */ + +/* + * GRF 12~15 -- write back for VME message + */ +define(`vme_wb', `r12') +define(`vme_wb0', `r12') +define(`vme_wb1', `r13') +define(`vme_wb2', `r14') +define(`vme_wb3', `r15') + +/* + * GRF 16 -- write back for Oword Block Write message with write commit bit + */ +define(`obw_wb', `r16') +define(`obw_wb_length', `1') + +/* + * GRF 18~21 -- Intra Neighbor Edge Pixels + */ +define(`INEP_ROW', `r18') +define(`INEP_COL0', `r20') +define(`INEP_COL1', `r21') + +/* + * temporary registers + */ +define(`tmp_reg0', `r32') +define(`tmp_reg1', `r33') +define(`intra_part_mask_ub', `tmp_reg1.28') +define(`mb_intra_struct_ub', `tmp_reg1.29') +define(`tmp_reg2', `r34') +define(`tmp_x_w', `tmp_reg2.0') +define(`tmp_reg3', `r35') + +/* + * MRF registers + */ +define(`msg_ind', `0') +define(`msg_reg0', `m0') /* m0 */ +define(`msg_reg1', `m1') /* m1 */ +define(`msg_reg2', `m2') /* m2 */ +define(`msg_reg3', `m3') /* m3 */ +define(`msg_reg4', `m4') /* m4 */ + +/* + * VME message payload + */ +define(`vme_msg_length', `4') +define(`vme_intra_wb_length', `1') +define(`vme_inter_wb_length', `4') +define(`vme_msg_ind', `msg_ind') +define(`vme_msg_0', `msg_reg0') +define(`vme_msg_1', `msg_reg1') +define(`vme_msg_2', `msg_reg2') +define(`vme_msg_3', `vme_msg_2') +define(`vme_msg_4', `msg_reg3') + + diff --git a/src/shaders/vme/gen7_vme_header.inc b/src/shaders/vme/gen7_vme_header.inc new file mode 100644 index 00000000..9cec7388 --- /dev/null +++ b/src/shaders/vme/gen7_vme_header.inc @@ -0,0 +1,164 @@ +/* + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ +// Modual name: ME_header.inc +// +// Global symbols define +// + +/* + * Constant + */ +define(`VME_MESSAGE_TYPE_INTER', `1') +define(`VME_MESSAGE_TYPE_INTRA', `2') +define(`VME_MESSAGE_TYPE_MIXED', `3') + +define(`BLOCK_32X1', `0x0000001F') +define(`BLOCK_4X16', `0x000F0003') + +define(`LUMA_INTRA_16x16_DISABLE', `0x1') +define(`LUMA_INTRA_8x8_DISABLE', `0x2') +define(`LUMA_INTRA_4x4_DISABLE', `0x4') + +define(`INTRA_PRED_AVAIL_FLAG_AE', `0x60') +define(`INTRA_PRED_AVAIL_FLAG_B', `0x10') +define(`INTRA_PRED_AVAIL_FLAG_C', `0x8') +define(`INTRA_PRED_AVAIL_FLAG_D', `0x4') + +define(`BIND_IDX_VME', `1') +define(`BIND_IDX_VME_REF0', `2') +define(`BIND_IDX_VME_REF1', `3') +define(`BIND_IDX_OUTPUT', `0') +define(`BIND_IDX_INEP', `4') + +define(`SUB_PEL_MODE_INTEGER', `0x00000000') +define(`SUB_PEL_MODE_HALF', `0x00001000') +define(`SUB_PEL_MODE_QUARTER', `0x00003000') + +define(`INTER_SAD_NONE', `0x00000000') +define(`INTER_SAD_HAAR', `0x00200000') + +define(`INTRA_SAD_NONE', `0x00000000') +define(`INTRA_SAD_HAAR', `0x00800000') + +define(`INTER_PART_MASK', `0x7E000000') + +define(`REF_REGION_SIZE', `0x2020:UW') + +define(`BI_SUB_MB_PART_MASK', `0x0c000000') +define(`MAX_NUM_MV', `0x00000020') +define(`SEARCH_PATH_LEN', `0x00003F3F') + +define(`INTRA_PREDICTORE_MODE', `0x11111111:UD') + +define(`OBW_CACHE_TYPE', `10') + +define(`OBW_MESSAGE_TYPE', `8') + +define(`OBW_BIND_IDX', `BIND_IDX_OUTPUT') + +define(`OBW_CONTROL_0', `0') /* 1 OWord, low 128 bits */ +define(`OBW_CONTROL_1', `1') /* 1 OWord, high 128 bits */ +define(`OBW_CONTROL_2', `2') /* 2 OWords */ +define(`OBW_CONTROL_3', `3') /* 4 OWords */ + +define(`OBW_WRITE_COMMIT_CATEGORY', `0') /* category on Ivybridge */ + +define(`OBW_HEADER_PRESENT', `1') + +/* GRF registers + * r0 header + * r1~r4 constant buffer (reserved) + * r5 inline data + * r6~r11 reserved + * r12 write back of VME message + * r13 write back of Oword Block Write + */ +/* + * GRF 0 -- header + */ +define(`thread_id_ub', `r0.20<0,1,0>:UB') /* thread id in payload */ + +/* + * GRF 1~4 -- Constant Buffer (reserved) + */ + +/* + * GRF 5 -- inline data + */ +define(`inline_reg0', `r5') +define(`w_in_mb_uw', `inline_reg0.2') +define(`orig_xy_ub', `inline_reg0.0') +define(`orig_x_ub', `inline_reg0.0') /* in macroblock */ +define(`orig_y_ub', `inline_reg0.1') + +/* + * GRF 6~11 -- reserved + */ + +/* + * GRF 12~15 -- write back for VME message + */ +define(`vme_wb', `r12') +define(`vme_wb0', `r12') +define(`vme_wb1', `r13') +define(`vme_wb2', `r14') +define(`vme_wb3', `r15') + +/* + * GRF 16 -- reserved + */ +/* + * write commit is removed on Ivybridge + */ +define(`obw_wb', `null<1>:W') +define(`obw_wb_length', `0') +/* + * GRF 18~21 -- Intra Neighbor Edge Pixels + */ +define(`INEP_ROW', `r18') +define(`INEP_COL0', `r20') +define(`INEP_COL1', `r21') + +/* + * temporary registers + */ +define(`tmp_reg0', `r32') +define(`tmp_reg1', `r33') +define(`intra_part_mask_ub', `tmp_reg1.28') +define(`mb_intra_struct_ub', `tmp_reg1.29') +define(`tmp_reg2', `r34') +define(`tmp_x_w', `tmp_reg2.0') +define(`tmp_reg3', `r35') + +/* + * Message Payload registers + */ +define(`msg_ind', `64') +define(`msg_reg0', `g64') +define(`msg_reg1', `g65') +define(`msg_reg2', `g66') +define(`msg_reg3', `g67') +define(`msg_reg4', `g68') + +/* + * VME message payload + */ +define(`vme_msg_length', `5') +define(`vme_intra_wb_length', `1') +define(`vme_inter_wb_length', `6') +define(`vme_msg_ind', `msg_ind') +define(`vme_msg_0', `msg_reg0') +define(`vme_msg_1', `msg_reg1') +define(`vme_msg_2', `msg_reg2') +define(`vme_msg_3', `msg_reg3') +define(`vme_msg_4', `msg_reg4') + + + + diff --git a/src/shaders/vme/inter_frame.asm b/src/shaders/vme/inter_frame.asm new file mode 100644 index 00000000..b42ecd97 --- /dev/null +++ b/src/shaders/vme/inter_frame.asm @@ -0,0 +1,104 @@ +/* + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ +// Modual name: IntraFrame.asm +// +// Make intra predition estimation for Intra frame +// + +// +// Now, begin source code.... +// + +/* + * __START + */ +__INTER_START: +mov (16) tmp_reg0.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg2.0<1>:UD 0x0:UD {align1}; + +/* + * VME message + */ +/* m0 */ +mul (2) tmp_reg0.8<1>:UW orig_xy_ub<2,2,1>:UB 16:UW {align1}; /* Source = (x, y) * 16 */ +mul (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB 16:UW {align1}; +add (2) tmp_reg0.0<1>:W tmp_reg0.0<2,2,1>:W -8:W {align1}; /* Reference = (x-8,y-8)-(x+24,y+24) */ +mov (1) tmp_reg0.12<1>:UD INTER_PART_MASK + INTER_SAD_HAAR + SUB_PEL_MODE_QUARTER:UD {align1}; /* 16x16 Source, 1/4 pixel, harr */ + +mov (1) tmp_reg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ +mov (1) tmp_reg0.22<1>:UW REF_REGION_SIZE {align1}; /* Reference Width&Height, 32x32 */ +mov (8) vme_msg_0.0<1>:UD tmp_reg0.0<8,8,1>:UD {align1}; + +/* m1 */ +mov (1) tmp_reg1.4<1>:UD MAX_NUM_MV:UD {align1}; /* Default value MAX 32 MVs */ +mov (1) tmp_reg1.8<1>:UD SEARCH_PATH_LEN:UD {align1}; + +mov (8) vme_msg_1<1>:UD tmp_reg1.0<8,8,1>:UD {align1}; + +/* m2 */ +mov (8) vme_msg_2<1>:UD 0x0:UD {align1}; + +/* m3 */ +mov (8) vme_msg_3<1>:UD 0x0:UD {align1}; + +/* m4 */ +mov (8) vme_msg_4<1>:UD 0x0:UD {align1}; + +send (8) + vme_msg_ind + vme_wb + null + vme( + BIND_IDX_VME, + 0, + 0, + VME_MESSAGE_TYPE_INTER + ) + mlen vme_msg_length + rlen vme_inter_wb_length + {align1}; + +/* + * Oword Block Write message + */ +mul (1) tmp_reg3.8<1>:UD w_in_mb_uw<0,1,0>:UW orig_y_ub<0,1,0>:UB {align1}; +add (1) tmp_reg3.8<1>:UD tmp_reg3.8<0,1,0>:UD orig_x_ub<0,1,0>:UB {align1}; +mul (1) tmp_reg3.8<1>:UD tmp_reg3.8<0,1,0>:UD 0x4:UD {align1}; +mov (1) tmp_reg3.20<1>:UB thread_id_ub {align1}; /* dispatch id */ +mov (8) msg_reg0.0<1>:UD tmp_reg3.0<8,8,1>:UD {align1}; + +mov (2) tmp_reg3.0<1>:UW vme_wb1.0<2,2,1>:UB {align1}; +add (2) tmp_reg3.0<1>:W tmp_reg3.0<2,2,1>:W -32:W {align1}; + +mov (8) msg_reg1.0<1>:UD tmp_reg3.0<8,8,0>:UD {align1}; + +mov (8) msg_reg2.0<1>:UD tmp_reg3.0<8,8,0>:UD {align1}; + +/* bind index 3, write 4 oword, msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_3, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 3 + rlen obw_wb_length + {align1}; + +/* + * kill thread + */ +mov (8) msg_reg0<1>:UD r0<8,8,1>:UD {align1}; +send (16) msg_ind acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT}; diff --git a/src/shaders/vme/inter_frame.g6a b/src/shaders/vme/inter_frame.g6a new file mode 100644 index 00000000..d89588f2 --- /dev/null +++ b/src/shaders/vme/inter_frame.g6a @@ -0,0 +1,2 @@ +include(`gen6_vme_header.inc') +include(`inter_frame.asm') diff --git a/src/shaders/vme/inter_frame.g6b b/src/shaders/vme/inter_frame.g6b new file mode 100644 index 00000000..02dd806e --- /dev/null +++ b/src/shaders/vme/inter_frame.g6b @@ -0,0 +1,28 @@ + { 0x00800001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00200041, 0x24082e29, 0x004500a0, 0x00100010 }, + { 0x00200041, 0x24002e29, 0x004500a0, 0x00100010 }, + { 0x00200040, 0x24003dad, 0x00450400, 0xfff8fff8 }, + { 0x00000001, 0x240c0061, 0x00000000, 0x7e203000 }, + { 0x00000001, 0x24140231, 0x00000014, 0x00000000 }, + { 0x00000001, 0x24160169, 0x00000000, 0x20202020 }, + { 0x00600001, 0x20000022, 0x008d0400, 0x00000000 }, + { 0x00000001, 0x24240061, 0x00000000, 0x00000020 }, + { 0x00000001, 0x24280061, 0x00000000, 0x00003f3f }, + { 0x00600001, 0x20200022, 0x008d0420, 0x00000000 }, + { 0x00600001, 0x20400062, 0x00000000, 0x00000000 }, + { 0x00600001, 0x20400062, 0x00000000, 0x00000000 }, + { 0x00600001, 0x20600062, 0x00000000, 0x00000000 }, + { 0x08600031, 0x21801cdd, 0x00000000, 0x08482000 }, + { 0x00000041, 0x24684521, 0x000000a2, 0x000000a1 }, + { 0x00000040, 0x24684421, 0x00000468, 0x000000a0 }, + { 0x00000041, 0x24680c21, 0x00000468, 0x00000004 }, + { 0x00000001, 0x24740231, 0x00000014, 0x00000000 }, + { 0x00600001, 0x20000022, 0x008d0460, 0x00000000 }, + { 0x00200001, 0x24600229, 0x004501a0, 0x00000000 }, + { 0x00200040, 0x24603dad, 0x00450460, 0xffe0ffe0 }, + { 0x00600001, 0x20200022, 0x008c0460, 0x00000000 }, + { 0x00600001, 0x20400022, 0x008c0460, 0x00000000 }, + { 0x05800031, 0x22001cdd, 0x00000000, 0x061b0303 }, + { 0x00600001, 0x20000022, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24001cc8, 0x00000000, 0x82000010 }, diff --git a/src/shaders/vme/inter_frame.g7a b/src/shaders/vme/inter_frame.g7a new file mode 100644 index 00000000..cb51f52a --- /dev/null +++ b/src/shaders/vme/inter_frame.g7a @@ -0,0 +1,2 @@ +include(`gen7_vme_header.inc') +include(`inter_frame.asm') diff --git a/src/shaders/vme/inter_frame.g7b b/src/shaders/vme/inter_frame.g7b new file mode 100644 index 00000000..3d4fbb4d --- /dev/null +++ b/src/shaders/vme/inter_frame.g7b @@ -0,0 +1,28 @@ + { 0x00800001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00200041, 0x24082e29, 0x004500a0, 0x00100010 }, + { 0x00200041, 0x24002e29, 0x004500a0, 0x00100010 }, + { 0x00200040, 0x24003dad, 0x00450400, 0xfff8fff8 }, + { 0x00000001, 0x240c0061, 0x00000000, 0x7e203000 }, + { 0x00000001, 0x24140231, 0x00000014, 0x00000000 }, + { 0x00000001, 0x24160169, 0x00000000, 0x20202020 }, + { 0x00600001, 0x28000021, 0x008d0400, 0x00000000 }, + { 0x00000001, 0x24240061, 0x00000000, 0x00000020 }, + { 0x00000001, 0x24280061, 0x00000000, 0x00003f3f }, + { 0x00600001, 0x28200021, 0x008d0420, 0x00000000 }, + { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800061, 0x00000000, 0x00000000 }, + { 0x08600031, 0x21801cbd, 0x00000800, 0x0a682001 }, + { 0x00000041, 0x24684521, 0x000000a2, 0x000000a1 }, + { 0x00000040, 0x24684421, 0x00000468, 0x000000a0 }, + { 0x00000041, 0x24680c21, 0x00000468, 0x00000004 }, + { 0x00000001, 0x24740231, 0x00000014, 0x00000000 }, + { 0x00600001, 0x28000021, 0x008d0460, 0x00000000 }, + { 0x00200001, 0x24600229, 0x004501a0, 0x00000000 }, + { 0x00200040, 0x24603dad, 0x00450460, 0xffe0ffe0 }, + { 0x00600001, 0x28200021, 0x008c0460, 0x00000000 }, + { 0x00600001, 0x28400021, 0x008c0460, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x060a0300 }, + { 0x00600001, 0x28000021, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24001ca8, 0x00000800, 0x82000010 }, diff --git a/src/shaders/vme/intra_frame.asm b/src/shaders/vme/intra_frame.asm new file mode 100644 index 00000000..809b5f38 --- /dev/null +++ b/src/shaders/vme/intra_frame.asm @@ -0,0 +1,130 @@ +/* + * Copyright © <2010>, Intel Corporation. + * + * This program is licensed under the terms and conditions of the + * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at + * http://www.opensource.org/licenses/eclipse-1.0.php. + * + */ +// Modual name: IntraFrame.asm +// +// Make intra predition estimation for Intra frame +// + +// +// Now, begin source code.... +// + +/* + * __START + */ +__INTRA_START: +mov (16) tmp_reg0.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg2.0<1>:UD 0x0:UD {align1}; + +/* + * Media Read Message -- fetch neighbor edge pixels + */ +/* ROW */ +mul (2) tmp_reg0.0<1>:D orig_xy_ub<2,2,1>:UB 16:UW {align1}; /* (x, y) * 16 */ +add (1) tmp_reg0.0<1>:D tmp_reg0.0<0,1,0>:D -8:W {align1}; /* X offset */ +add (1) tmp_reg0.4<1>:D tmp_reg0.4<0,1,0>:D -1:W {align1}; /* Y offset */ +mov (1) tmp_reg0.8<1>:UD BLOCK_32X1 {align1}; +mov (1) tmp_reg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ +mov (8) msg_reg0.0<1>:UD tmp_reg0.0<8,8,1>:UD {align1}; +send (8) msg_ind INEP_ROW<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 1 {align1}; + +/* COL */ +mul (2) tmp_reg0.0<1>:D orig_xy_ub<2,2,1>:UB 16:UW {align1}; /* (x, y) * 16 */ +add (1) tmp_reg0.0<1>:D tmp_reg0.0<0,1,0>:D -4:W {align1}; /* X offset */ +mov (1) tmp_reg0.8<1>:UD BLOCK_4X16 {align1}; +mov (1) tmp_reg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ +mov (8) msg_reg0.0<1>:UD tmp_reg0.0<8,8,1>:UD {align1}; +send (8) msg_ind INEP_COL0<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 2 {align1}; + +/* + * VME message + */ +/* m0 */ +mul (2) tmp_reg0.8<1>:UW orig_xy_ub<2,2,1>:UB 16:UW {align1}; /* (x, y) * 16 */ +mov (1) tmp_reg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ +mov (8) vme_msg_0.0<1>:UD tmp_reg0.0<8,8,1>:UD {align1}; + +/* m1 */ +mov (1) intra_part_mask_ub<1>:UB LUMA_INTRA_8x8_DISABLE + LUMA_INTRA_4x4_DISABLE {align1}; + +cmp.nz.f0.0 (1) null<1>:UW orig_x_ub<0,1,0>:UB 0:UW {align1}; /* X != 0 */ +(f0.0) add (1) mb_intra_struct_ub<1>:UB mb_intra_struct_ub<0,1,0>:UB INTRA_PRED_AVAIL_FLAG_AE {align1}; /* A */ + +cmp.nz.f0.0 (1) null<1>:UW orig_y_ub<0,1,0>:UB 0:UW {align1}; /* Y != 0 */ +(f0.0) add (1) mb_intra_struct_ub<1>:UB mb_intra_struct_ub<0,1,0>:UB INTRA_PRED_AVAIL_FLAG_B {align1}; /* B */ + +mul.nz.f0.0 (1) null<1>:UW orig_x_ub<0,1,0>:UB orig_y_ub<0,1,0>:UB {align1}; /* X * Y != 0 */ +(f0.0) add (1) mb_intra_struct_ub<1>:UB mb_intra_struct_ub<0,1,0>:UB INTRA_PRED_AVAIL_FLAG_D {align1}; /* D */ + +add (1) tmp_x_w<1>:W orig_x_ub<0,1,0>:UB 1:UW {align1}; /* X + 1 */ +add (1) tmp_x_w<1>:W w_in_mb_uw<0,1,0>:UW -tmp_x_w<0,1,0>:W {align1}; /* width - (X + 1) */ +mul.nz.f0.0 (1) null<1>:UD tmp_x_w<0,1,0>:W orig_y_ub<0,1,0>:UB {align1}; /* (width - (X + 1)) * Y != 0 */ +(f0.0) add (1) mb_intra_struct_ub<1>:UB mb_intra_struct_ub<0,1,0>:UB INTRA_PRED_AVAIL_FLAG_C {align1}; /* C */ + +mov (8) vme_msg_1<1>:UD tmp_reg1.0<8,8,1>:UD {align1}; + +/* m2 */ +mov (8) vme_msg_2<1>:UD 0x0:UD {align1}; + +/* m3 */ +mov (8) vme_msg_3<1>:UD INEP_ROW.0<8,8,1>:UD {align1}; + +/* m4 */ +mov (8) vme_msg_4<1>:UD 0x0 {align1}; +mov (16) vme_msg_4.0<1>:UB INEP_COL0.3<32,8,4>:UB {align1}; +mov (1) vme_msg_4.16<1>:UD INTRA_PREDICTORE_MODE {align1}; + +send (8) + vme_msg_ind + vme_wb + null + vme( + BIND_IDX_VME, + 0, + 0, + VME_MESSAGE_TYPE_INTRA + ) + mlen vme_msg_length + rlen vme_intra_wb_length + {align1}; + +/* + * Oword Block Write message + */ +mul (1) tmp_reg3.8<1>:UD w_in_mb_uw<0,1,0>:UW orig_y_ub<0,1,0>:UB {align1}; +add (1) tmp_reg3.8<1>:UD tmp_reg3.8<0,1,0>:UD orig_x_ub<0,1,0>:UB {align1}; +mov (1) tmp_reg3.20<1>:UB thread_id_ub {align1}; /* dispatch id */ +mov (8) msg_reg0.0<1>:UD tmp_reg3<8,8,1>:UD {align1}; + +mov (1) msg_reg1.0<1>:UD vme_wb.0<0,1,0>:UD {align1}; +mov (1) msg_reg1.4<1>:UD vme_wb.16<0,1,0>:UD {align1}; +mov (1) msg_reg1.8<1>:UD vme_wb.20<0,1,0>:UD {align1}; +mov (1) msg_reg1.12<1>:UD vme_wb.24<0,1,0>:UD {align1}; +/* bind index 3, write 1 oword, msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_0, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + +/* + * kill thread + */ +mov (8) msg_reg0<1>:UD r0<8,8,1>:UD {align1}; +send (16) msg_ind acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT}; diff --git a/src/shaders/vme/intra_frame.g6a b/src/shaders/vme/intra_frame.g6a new file mode 100644 index 00000000..d39118c8 --- /dev/null +++ b/src/shaders/vme/intra_frame.g6a @@ -0,0 +1,3 @@ +include(`gen6_vme_header.inc') +include(`intra_frame.asm') + diff --git a/src/shaders/vme/intra_frame.g6b b/src/shaders/vme/intra_frame.g6b new file mode 100644 index 00000000..90ee252a --- /dev/null +++ b/src/shaders/vme/intra_frame.g6b @@ -0,0 +1,47 @@ + { 0x00800001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00200041, 0x24002e25, 0x004500a0, 0x00100010 }, + { 0x00000040, 0x24003ca5, 0x00000400, 0xfff8fff8 }, + { 0x00000040, 0x24043ca5, 0x00000404, 0xffffffff }, + { 0x00000001, 0x240800e1, 0x00000000, 0x0000001f }, + { 0x00000001, 0x24140231, 0x00000014, 0x00000000 }, + { 0x00600001, 0x20000022, 0x008d0400, 0x00000000 }, + { 0x04600031, 0x22401cd1, 0x00000000, 0x02188004 }, + { 0x00200041, 0x24002e25, 0x004500a0, 0x00100010 }, + { 0x00000040, 0x24003ca5, 0x00000400, 0xfffcfffc }, + { 0x00000001, 0x240800e1, 0x00000000, 0x000f0003 }, + { 0x00000001, 0x24140231, 0x00000014, 0x00000000 }, + { 0x00600001, 0x20000022, 0x008d0400, 0x00000000 }, + { 0x04600031, 0x22801cd1, 0x00000000, 0x02288004 }, + { 0x00200041, 0x24082e29, 0x004500a0, 0x00100010 }, + { 0x00000001, 0x24140231, 0x00000014, 0x00000000 }, + { 0x00600001, 0x20000022, 0x008d0400, 0x00000000 }, + { 0x00000001, 0x243c00f1, 0x00000000, 0x00000006 }, + { 0x02000010, 0x20002e28, 0x000000a0, 0x00000000 }, + { 0x00010040, 0x243d1e31, 0x0000043d, 0x00000060 }, + { 0x02000010, 0x20002e28, 0x000000a1, 0x00000000 }, + { 0x00010040, 0x243d1e31, 0x0000043d, 0x00000010 }, + { 0x02000041, 0x20004628, 0x000000a0, 0x000000a1 }, + { 0x00010040, 0x243d1e31, 0x0000043d, 0x00000004 }, + { 0x00000040, 0x24402e2d, 0x000000a0, 0x00010001 }, + { 0x00000040, 0x2440352d, 0x000000a2, 0x00004440 }, + { 0x02000041, 0x200045a0, 0x00000440, 0x000000a1 }, + { 0x00010040, 0x243d1e31, 0x0000043d, 0x00000008 }, + { 0x00600001, 0x20200022, 0x008d0420, 0x00000000 }, + { 0x00600001, 0x20400062, 0x00000000, 0x00000000 }, + { 0x00600001, 0x20400022, 0x008d0240, 0x00000000 }, + { 0x00600001, 0x206000e2, 0x00000000, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00cf0283, 0x00000000 }, + { 0x00000001, 0x20700062, 0x00000000, 0x11111111 }, + { 0x08600031, 0x21801cdd, 0x00000000, 0x08184000 }, + { 0x00000041, 0x24684521, 0x000000a2, 0x000000a1 }, + { 0x00000040, 0x24684421, 0x00000468, 0x000000a0 }, + { 0x00000001, 0x24740231, 0x00000014, 0x00000000 }, + { 0x00600001, 0x20000022, 0x008d0460, 0x00000000 }, + { 0x00000001, 0x20200022, 0x00000180, 0x00000000 }, + { 0x00000001, 0x20240022, 0x00000190, 0x00000000 }, + { 0x00000001, 0x20280022, 0x00000194, 0x00000000 }, + { 0x00000001, 0x202c0022, 0x00000198, 0x00000000 }, + { 0x05800031, 0x22001cdd, 0x00000000, 0x041b0003 }, + { 0x00600001, 0x20000022, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24001cc8, 0x00000000, 0x82000010 }, diff --git a/src/shaders/vme/intra_frame.g7a b/src/shaders/vme/intra_frame.g7a new file mode 100644 index 00000000..c43e7394 --- /dev/null +++ b/src/shaders/vme/intra_frame.g7a @@ -0,0 +1,2 @@ +include(`gen7_vme_header.inc') +include(`intra_frame.asm') diff --git a/src/shaders/vme/intra_frame.g7b b/src/shaders/vme/intra_frame.g7b new file mode 100644 index 00000000..cc063d84 --- /dev/null +++ b/src/shaders/vme/intra_frame.g7b @@ -0,0 +1,47 @@ + { 0x00800001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00200041, 0x24002e25, 0x004500a0, 0x00100010 }, + { 0x00000040, 0x24003ca5, 0x00000400, 0xfff8fff8 }, + { 0x00000040, 0x24043ca5, 0x00000404, 0xffffffff }, + { 0x00000001, 0x240800e1, 0x00000000, 0x0000001f }, + { 0x00000001, 0x24140231, 0x00000014, 0x00000000 }, + { 0x00600001, 0x28000021, 0x008d0400, 0x00000000 }, + { 0x04600031, 0x22401cb1, 0x00000800, 0x02190004 }, + { 0x00200041, 0x24002e25, 0x004500a0, 0x00100010 }, + { 0x00000040, 0x24003ca5, 0x00000400, 0xfffcfffc }, + { 0x00000001, 0x240800e1, 0x00000000, 0x000f0003 }, + { 0x00000001, 0x24140231, 0x00000014, 0x00000000 }, + { 0x00600001, 0x28000021, 0x008d0400, 0x00000000 }, + { 0x04600031, 0x22801cb1, 0x00000800, 0x02290004 }, + { 0x00200041, 0x24082e29, 0x004500a0, 0x00100010 }, + { 0x00000001, 0x24140231, 0x00000014, 0x00000000 }, + { 0x00600001, 0x28000021, 0x008d0400, 0x00000000 }, + { 0x00000001, 0x243c00f1, 0x00000000, 0x00000006 }, + { 0x02000010, 0x20002e28, 0x000000a0, 0x00000000 }, + { 0x00010040, 0x243d1e31, 0x0000043d, 0x00000060 }, + { 0x02000010, 0x20002e28, 0x000000a1, 0x00000000 }, + { 0x00010040, 0x243d1e31, 0x0000043d, 0x00000010 }, + { 0x02000041, 0x20004628, 0x000000a0, 0x000000a1 }, + { 0x00010040, 0x243d1e31, 0x0000043d, 0x00000004 }, + { 0x00000040, 0x24402e2d, 0x000000a0, 0x00010001 }, + { 0x00000040, 0x2440352d, 0x000000a2, 0x00004440 }, + { 0x02000041, 0x200045a0, 0x00000440, 0x000000a1 }, + { 0x00010040, 0x243d1e31, 0x0000043d, 0x00000008 }, + { 0x00600001, 0x28200021, 0x008d0420, 0x00000000 }, + { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28600021, 0x008d0240, 0x00000000 }, + { 0x00600001, 0x288000e1, 0x00000000, 0x00000000 }, + { 0x00800001, 0x28800231, 0x00cf0283, 0x00000000 }, + { 0x00000001, 0x28900061, 0x00000000, 0x11111111 }, + { 0x08600031, 0x21801cbd, 0x00000800, 0x0a184001 }, + { 0x00000041, 0x24684521, 0x000000a2, 0x000000a1 }, + { 0x00000040, 0x24684421, 0x00000468, 0x000000a0 }, + { 0x00000001, 0x24740231, 0x00000014, 0x00000000 }, + { 0x00600001, 0x28000021, 0x008d0460, 0x00000000 }, + { 0x00000001, 0x28200021, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240021, 0x00000190, 0x00000000 }, + { 0x00000001, 0x28280021, 0x00000194, 0x00000000 }, + { 0x00000001, 0x282c0021, 0x00000198, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0000 }, + { 0x00600001, 0x28000021, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24001ca8, 0x00000800, 0x82000010 }, |