summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorZhao Yakui <yakui.zhao@intel.com>2013-05-09 13:52:31 +0800
committerYakui Zhao <yakui.zhao@intel.com>2013-05-09 13:52:31 +0800
commit3e913422baae63a92c1e2b303adae1c7dec593a6 (patch)
treece7111d6627453c39055275c6a975e0b3d3132d4 /src
parent2008184e0c1d50f420af8a0f53cdfc59602149cd (diff)
downloadlibva-intel-driver-3e913422baae63a92c1e2b303adae1c7dec593a6.tar.gz
Unify the AVC ref frame index setting on Snb/Ivy/HSW
This is to remove the duplicated code. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Diffstat (limited to 'src')
-rw-r--r--src/gen6_mfc.c27
-rw-r--r--src/gen6_mfc.h4
-rw-r--r--src/gen6_mfc_common.c25
-rw-r--r--src/gen75_mfc.c27
4 files changed, 31 insertions, 52 deletions
diff --git a/src/gen6_mfc.c b/src/gen6_mfc.c
index 81136ad0..8515253f 100644
--- a/src/gen6_mfc.c
+++ b/src/gen6_mfc.c
@@ -482,31 +482,6 @@ static void gen6_mfc_avc_fqm_state(VADriverContextP ctx, struct intel_encoder_co
}
static void
-gen6_mfc_avc_ref_idx_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
-{
- struct intel_batchbuffer *batch = encoder_context->base.batch;
- int i;
-
- BEGIN_BCS_BATCH(batch, 10);
- OUT_BCS_BATCH(batch, MFX_AVC_REF_IDX_STATE | 8);
- OUT_BCS_BATCH(batch, 0); //Select L0
- OUT_BCS_BATCH(batch, 0x80808020); //Only 1 reference
- for(i = 0; i < 7; i++) {
- OUT_BCS_BATCH(batch, 0x80808080);
- }
- ADVANCE_BCS_BATCH(batch);
-
- BEGIN_BCS_BATCH(batch, 10);
- OUT_BCS_BATCH(batch, MFX_AVC_REF_IDX_STATE | 8);
- OUT_BCS_BATCH(batch, 1); //Select L1
- OUT_BCS_BATCH(batch, 0x80808022); //Only 1 reference
- for(i = 0; i < 7; i++) {
- OUT_BCS_BATCH(batch, 0x80808080);
- }
- ADVANCE_BCS_BATCH(batch);
-}
-
-static void
gen6_mfc_avc_insert_object(VADriverContextP ctx, struct intel_encoder_context *encoder_context,
unsigned int *insert_data, int lenght_in_dws, int data_bits_in_last_dw,
int skip_emul_byte_count, int is_last_header, int is_end_of_slice, int emulation_flag,
@@ -636,7 +611,7 @@ static void gen6_mfc_avc_pipeline_picture_programing( VADriverContextP ctx,
mfc_context->avc_qm_state(ctx, encoder_context);
mfc_context->avc_fqm_state(ctx, encoder_context);
gen6_mfc_avc_directmode_state(ctx, encoder_context);
- gen6_mfc_avc_ref_idx_state(ctx, encoder_context);
+ intel_mfc_avc_ref_idx_state(ctx, encoder_context);
}
diff --git a/src/gen6_mfc.h b/src/gen6_mfc.h
index ba366d38..5e8a6537 100644
--- a/src/gen6_mfc.h
+++ b/src/gen6_mfc.h
@@ -262,4 +262,8 @@ extern VAStatus intel_mfc_avc_prepare(VADriverContextP ctx,
extern int intel_avc_enc_slice_type_fixup(int type);
+
+extern void
+intel_mfc_avc_ref_idx_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context);
+
#endif /* _GEN6_MFC_BCS_H_ */
diff --git a/src/gen6_mfc_common.c b/src/gen6_mfc_common.c
index 1796e95e..74bc4d48 100644
--- a/src/gen6_mfc_common.c
+++ b/src/gen6_mfc_common.c
@@ -998,3 +998,28 @@ gen7_vme_walker_fill_vme_batchbuffer(VADriverContextP ctx,
dri_bo_unmap(vme_context->vme_batchbuffer.bo);
}
+
+void
+intel_mfc_avc_ref_idx_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
+{
+ struct intel_batchbuffer *batch = encoder_context->base.batch;
+ int i;
+
+ BEGIN_BCS_BATCH(batch, 10);
+ OUT_BCS_BATCH(batch, MFX_AVC_REF_IDX_STATE | 8);
+ OUT_BCS_BATCH(batch, 0); //Select L0
+ OUT_BCS_BATCH(batch, 0x80808020); //Only 1 reference
+ for(i = 0; i < 7; i++) {
+ OUT_BCS_BATCH(batch, 0x80808080);
+ }
+ ADVANCE_BCS_BATCH(batch);
+
+ BEGIN_BCS_BATCH(batch, 10);
+ OUT_BCS_BATCH(batch, MFX_AVC_REF_IDX_STATE | 8);
+ OUT_BCS_BATCH(batch, 1); //Select L1
+ OUT_BCS_BATCH(batch, 0x80808022); //Only 1 reference
+ for(i = 0; i < 7; i++) {
+ OUT_BCS_BATCH(batch, 0x80808080);
+ }
+ ADVANCE_BCS_BATCH(batch);
+}
diff --git a/src/gen75_mfc.c b/src/gen75_mfc.c
index c3c0e1e7..fb83c13d 100644
--- a/src/gen75_mfc.c
+++ b/src/gen75_mfc.c
@@ -746,31 +746,6 @@ gen75_mfc_avc_directmode_state(VADriverContextP ctx, struct intel_encoder_contex
ADVANCE_BCS_BATCH(batch);
}
-static void
-gen75_mfc_avc_ref_idx_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
-{
- struct intel_batchbuffer *batch = encoder_context->base.batch;
- int i;
-
- BEGIN_BCS_BATCH(batch, 10);
- OUT_BCS_BATCH(batch, MFX_AVC_REF_IDX_STATE | 8);
- OUT_BCS_BATCH(batch, 0); //Select L0
- OUT_BCS_BATCH(batch, 0x80808020); //Only 1 reference
- for(i = 0; i < 7; i++) {
- OUT_BCS_BATCH(batch, 0x80808080);
- }
- ADVANCE_BCS_BATCH(batch);
-
- BEGIN_BCS_BATCH(batch, 10);
- OUT_BCS_BATCH(batch, MFX_AVC_REF_IDX_STATE | 8);
- OUT_BCS_BATCH(batch, 1); //Select L1
- OUT_BCS_BATCH(batch, 0x80808022); //Only 1 reference
- for(i = 0; i < 7; i++) {
- OUT_BCS_BATCH(batch, 0x80808080);
- }
- ADVANCE_BCS_BATCH(batch);
-}
-
static void
gen75_mfc_bsp_buf_base_addr_state_bplus(VADriverContextP ctx,
@@ -841,7 +816,7 @@ static void gen75_mfc_avc_pipeline_picture_programing( VADriverContextP ctx,
mfc_context->avc_qm_state(ctx, encoder_context);
mfc_context->avc_fqm_state(ctx, encoder_context);
gen75_mfc_avc_directmode_state(ctx, encoder_context);
- gen75_mfc_avc_ref_idx_state(ctx, encoder_context);
+ intel_mfc_avc_ref_idx_state(ctx, encoder_context);
}