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authorXiang, Haihao <haihao.xiang@intel.com>2014-06-20 20:11:15 +0800
committerXiang, Haihao <haihao.xiang@intel.com>2014-12-14 00:42:17 +0800
commit5dc1fc729679e405ab4b35d7b1d445c220f9fa9b (patch)
treefcdae756201ae82921f536128a07b47f8ed974a6 /src/gen9_mfd.c
parente3019df98cc40d46579eec3599ce94aabec72292 (diff)
downloadlibva-intel-driver-5dc1fc729679e405ab4b35d7b1d445c220f9fa9b.tar.gz
HEVC: gen9_hcpd_ind_obj_base_addr_state()
Set the base address for the input bitsteam data buffer in HCP_IND_OBJ_BASE_ADDR_STATE. Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> (cherry picked from commit b8cab43f24168958416aa483fda1678e895caf20)
Diffstat (limited to 'src/gen9_mfd.c')
-rw-r--r--src/gen9_mfd.c28
1 files changed, 28 insertions, 0 deletions
diff --git a/src/gen9_mfd.c b/src/gen9_mfd.c
index 60ee8bd0..43a38a22 100644
--- a/src/gen9_mfd.c
+++ b/src/gen9_mfd.c
@@ -311,6 +311,25 @@ gen9_hcpd_pipe_buf_addr_state(VADriverContextP ctx,
ADVANCE_BCS_BATCH(batch);
}
+static void
+gen9_hcpd_ind_obj_base_addr_state(VADriverContextP ctx,
+ dri_bo *slice_data_bo,
+ struct gen9_hcpd_context *gen9_hcpd_context)
+{
+ struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch;
+
+ BEGIN_BCS_BATCH(batch, 14);
+
+ OUT_BCS_BATCH(batch, HCP_IND_OBJ_BASE_ADDR_STATE | (14 - 2));
+ OUT_BUFFER_MA_REFERENCE(slice_data_bo); /* DW 1..3 */
+ OUT_BUFFER_NMA_REFERENCE(NULL); /* DW 4..5, Upper Bound */
+ OUT_BUFFER_MA_REFERENCE(NULL); /* DW 6..8, CU, ignored */
+ OUT_BUFFER_MA_TARGET(NULL); /* DW 9..11, PAK-BSE, ignored */
+ OUT_BUFFER_NMA_TARGET(NULL); /* DW 12..13, Upper Bound */
+
+ ADVANCE_BCS_BATCH(batch);
+}
+
static VAStatus
gen9_hcpd_hevc_decode_picture(VADriverContextP ctx,
struct decode_state *decode_state,
@@ -318,6 +337,8 @@ gen9_hcpd_hevc_decode_picture(VADriverContextP ctx,
{
VAStatus vaStatus;
struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch;
+ dri_bo *slice_data_bo;
+ int j;
vaStatus = gen9_hcpd_hevc_decode_init(ctx, decode_state, gen9_hcpd_context);
@@ -331,6 +352,13 @@ gen9_hcpd_hevc_decode_picture(VADriverContextP ctx,
gen9_hcpd_surface_state(ctx, decode_state, gen9_hcpd_context);
gen9_hcpd_pipe_buf_addr_state(ctx, decode_state, gen9_hcpd_context);
+ /* Need to double it works or not if the two slice groups have differenct slice data buffers */
+ for (j = 0; j < decode_state->num_slice_params; j++) {
+ slice_data_bo = decode_state->slice_datas[j]->bo;
+
+ gen9_hcpd_ind_obj_base_addr_state(ctx, slice_data_bo, gen9_hcpd_context);
+ }
+
intel_batchbuffer_end_atomic(batch);
intel_batchbuffer_flush(batch);