summaryrefslogtreecommitdiff
path: root/src/gen6_mfc.c
diff options
context:
space:
mode:
authorZhao Yakui <yakui.zhao@intel.com>2012-01-01 02:18:58 +0000
committerXiang, Haihao <haihao.xiang@intel.com>2016-08-15 14:36:02 +0800
commit89463c30a9ce2740603f36f1000da54b8b5c731b (patch)
tree3478688799c4e7220ce36199b75fcb7a199607fd /src/gen6_mfc.c
parentae08e61f0746c5ed34d740ad2ed3731e43b5b456 (diff)
downloadlibva-intel-driver-89463c30a9ce2740603f36f1000da54b8b5c731b.tar.gz
Encoding: Dynamically select one mechanism to construct encoding command buffer for each frame on Haswell and Gen7/Gen6
v2:remove the warning when compiling v1: combine the Haswell and Gen7/6 patch together Currently it uses the fixed policy to construct encoding command buffer. (Use CPU or GPU). And it is statically compiled. But sometimes it needs to choose the different mechanism on the fly instead of statically compiled mode. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: pjl <cecilia.peng@intel.com> Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Diffstat (limited to 'src/gen6_mfc.c')
-rw-r--r--src/gen6_mfc.c12
1 files changed, 4 insertions, 8 deletions
diff --git a/src/gen6_mfc.c b/src/gen6_mfc.c
index acefc975..0208ddb5 100644
--- a/src/gen6_mfc.c
+++ b/src/gen6_mfc.c
@@ -676,7 +676,6 @@ gen6_mfc_stop(VADriverContextP ctx,
return VA_STATUS_SUCCESS;
}
-#if __SOFTWARE__
static int
gen6_mfc_avc_pak_object_intra(VADriverContextP ctx, int x, int y, int end_mb, int qp,unsigned int *msg,
@@ -899,7 +898,6 @@ gen6_mfc_avc_software_batchbuffer(VADriverContextP ctx,
return batch_bo;
}
-#else
static void
gen6_mfc_batchbuffer_surfaces_input(VADriverContextP ctx,
@@ -1299,7 +1297,6 @@ gen6_mfc_avc_hardware_batchbuffer(VADriverContextP ctx,
return mfc_context->mfc_batchbuffer_surface.bo;
}
-#endif
static void
@@ -1316,11 +1313,10 @@ gen6_mfc_avc_pipeline_programing(VADriverContextP ctx,
return;
}
-#if __SOFTWARE__
- slice_batch_bo = gen6_mfc_avc_software_batchbuffer(ctx, encode_state, encoder_context);
-#else
- slice_batch_bo = gen6_mfc_avc_hardware_batchbuffer(ctx, encode_state, encoder_context);
-#endif
+ if (encoder_context->soft_batch_force)
+ slice_batch_bo = gen6_mfc_avc_software_batchbuffer(ctx, encode_state, encoder_context);
+ else
+ slice_batch_bo = gen6_mfc_avc_hardware_batchbuffer(ctx, encode_state, encoder_context);
// begin programing
intel_batchbuffer_start_atomic_bcs(batch, 0x4000);