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authorFrank Schaefer <kelledin@gmail.com>2018-10-23 22:11:02 -0500
committerIvan Maidanski <ivmai@mail.ru>2018-10-24 11:07:12 +0300
commitfdb89ed333a361208399fae790e7c2e291000a08 (patch)
tree6463051c7180e6fd9c42fffbbe42502a935881bc /src
parent71d1c4df4b297b7707b30f84e2a2a026a6e4b345 (diff)
downloadlibatomic_ops-fdb89ed333a361208399fae790e7c2e291000a08.tar.gz
Support ILP32 in AArch64 assembly routines (GCC)
Issue #38 (libatomic_ops). * src/atomic_ops/sysdeps/gcc/aarch64.h [(!__clang__ || AO_AARCH64_ASM_LOAD_STORE_CAS) && !AO_PREFER_GENERALIZED && __ILP32__] (AO_double_load, AO_double_load_acquire, AO_double_store, AO_double_store_release): Specify the size ("w") of arguments of the aarch64 instructions. * src/atomic_ops/sysdeps/gcc/aarch64.h [(!__clang__ || AO_AARCH64_ASM_LOAD_STORE_CAS) && __ILP32__] (AO_double_compare_and_swap, AO_double_compare_and_swap_acquire, AO_double_compare_and_swap_release, AO_double_compare_and_swap_full): Likewise.
Diffstat (limited to 'src')
-rw-r--r--src/atomic_ops/sysdeps/gcc/aarch64.h84
1 files changed, 68 insertions, 16 deletions
diff --git a/src/atomic_ops/sysdeps/gcc/aarch64.h b/src/atomic_ops/sysdeps/gcc/aarch64.h
index 62b61aa..680e21f 100644
--- a/src/atomic_ops/sysdeps/gcc/aarch64.h
+++ b/src/atomic_ops/sysdeps/gcc/aarch64.h
@@ -52,8 +52,13 @@
/* single-copy atomic (unlike LDREXD for 32-bit ARM). */
do {
__asm__ __volatile__("//AO_double_load\n"
- " ldxp %0, %1, %3\n"
- " stxp %w2, %0, %1, %3"
+# ifdef __ILP32__
+ " ldxp %w0, %w1, %3\n"
+ " stxp %w2, %w0, %w1, %3"
+# else
+ " ldxp %0, %1, %3\n"
+ " stxp %w2, %0, %1, %3"
+# endif
: "=&r" (result.AO_val1), "=&r" (result.AO_val2), "=&r" (status)
: "Q" (*addr));
} while (AO_EXPECT_FALSE(status));
@@ -69,8 +74,13 @@
do {
__asm__ __volatile__("//AO_double_load_acquire\n"
- " ldaxp %0, %1, %3\n"
- " stxp %w2, %0, %1, %3"
+# ifdef __ILP32__
+ " ldaxp %w0, %w1, %3\n"
+ " stxp %w2, %w0, %w1, %3"
+# else
+ " ldaxp %0, %1, %3\n"
+ " stxp %w2, %0, %1, %3"
+# endif
: "=&r" (result.AO_val1), "=&r" (result.AO_val2), "=&r" (status)
: "Q" (*addr));
} while (AO_EXPECT_FALSE(status));
@@ -86,8 +96,13 @@
do {
__asm__ __volatile__("//AO_double_store\n"
- " ldxp %0, %1, %3\n"
- " stxp %w2, %4, %5, %3"
+# ifdef __ILP32__
+ " ldxp %w0, %w1, %3\n"
+ " stxp %w2, %w4, %w5, %3"
+# else
+ " ldxp %0, %1, %3\n"
+ " stxp %w2, %4, %5, %3"
+# endif
: "=&r" (old_val.AO_val1), "=&r" (old_val.AO_val2), "=&r" (status),
"=Q" (*addr)
: "r" (value.AO_val1), "r" (value.AO_val2));
@@ -106,8 +121,13 @@
do {
__asm__ __volatile__("//AO_double_store_release\n"
- " ldxp %0, %1, %3\n"
- " stlxp %w2, %4, %5, %3"
+# ifdef __ILP32__
+ " ldxp %w0, %w1, %3\n"
+ " stlxp %w2, %w4, %w5, %3"
+# else
+ " ldxp %0, %1, %3\n"
+ " stlxp %w2, %4, %5, %3"
+# endif
: "=&r" (old_val.AO_val1), "=&r" (old_val.AO_val2), "=&r" (status),
"=Q" (*addr)
: "r" (value.AO_val1), "r" (value.AO_val2));
@@ -125,13 +145,21 @@
do {
__asm__ __volatile__("//AO_double_compare_and_swap\n"
- " ldxp %0, %1, %2\n"
+# ifdef __ILP32__
+ " ldxp %w0, %w1, %2\n"
+# else
+ " ldxp %0, %1, %2\n"
+# endif
: "=&r" (tmp.AO_val1), "=&r" (tmp.AO_val2)
: "Q" (*addr));
if (tmp.AO_val1 != old_val.AO_val1 || tmp.AO_val2 != old_val.AO_val2)
break;
__asm__ __volatile__(
- " stxp %w0, %2, %3, %1\n"
+# ifdef __ILP32__
+ " stxp %w0, %w2, %w3, %1\n"
+# else
+ " stxp %w0, %2, %3, %1\n"
+# endif
: "=&r" (result), "=Q" (*addr)
: "r" (new_val.AO_val1), "r" (new_val.AO_val2));
} while (AO_EXPECT_FALSE(result));
@@ -148,13 +176,21 @@
do {
__asm__ __volatile__("//AO_double_compare_and_swap_acquire\n"
- " ldaxp %0, %1, %2\n"
+# ifdef __ILP32__
+ " ldaxp %w0, %w1, %2\n"
+# else
+ " ldaxp %0, %1, %2\n"
+# endif
: "=&r" (tmp.AO_val1), "=&r" (tmp.AO_val2)
: "Q" (*addr));
if (tmp.AO_val1 != old_val.AO_val1 || tmp.AO_val2 != old_val.AO_val2)
break;
__asm__ __volatile__(
- " stxp %w0, %2, %3, %1\n"
+# ifdef __ILP32__
+ " stxp %w0, %w2, %w3, %1\n"
+# else
+ " stxp %w0, %2, %3, %1\n"
+# endif
: "=&r" (result), "=Q" (*addr)
: "r" (new_val.AO_val1), "r" (new_val.AO_val2));
} while (AO_EXPECT_FALSE(result));
@@ -171,13 +207,21 @@
do {
__asm__ __volatile__("//AO_double_compare_and_swap_release\n"
- " ldxp %0, %1, %2\n"
+# ifdef __ILP32__
+ " ldxp %w0, %w1, %2\n"
+# else
+ " ldxp %0, %1, %2\n"
+# endif
: "=&r" (tmp.AO_val1), "=&r" (tmp.AO_val2)
: "Q" (*addr));
if (tmp.AO_val1 != old_val.AO_val1 || tmp.AO_val2 != old_val.AO_val2)
break;
__asm__ __volatile__(
- " stlxp %w0, %2, %3, %1\n"
+# ifdef __ILP32__
+ " stlxp %w0, %w2, %w3, %1\n"
+# else
+ " stlxp %w0, %2, %3, %1\n"
+# endif
: "=&r" (result), "=Q" (*addr)
: "r" (new_val.AO_val1), "r" (new_val.AO_val2));
} while (AO_EXPECT_FALSE(result));
@@ -194,13 +238,21 @@
do {
__asm__ __volatile__("//AO_double_compare_and_swap_full\n"
- " ldaxp %0, %1, %2\n"
+# ifdef __ILP32__
+ " ldaxp %w0, %w1, %2\n"
+# else
+ " ldaxp %0, %1, %2\n"
+# endif
: "=&r" (tmp.AO_val1), "=&r" (tmp.AO_val2)
: "Q" (*addr));
if (tmp.AO_val1 != old_val.AO_val1 || tmp.AO_val2 != old_val.AO_val2)
break;
__asm__ __volatile__(
- " stlxp %w0, %2, %3, %1\n"
+# ifdef __ILP32__
+ " stlxp %w0, %w2, %w3, %1\n"
+# else
+ " stlxp %w0, %2, %3, %1\n"
+# endif
: "=&r" (result), "=Q" (*addr)
: "r" (new_val.AO_val1), "r" (new_val.AO_val2));
} while (AO_EXPECT_FALSE(result));