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| author | Ivan Maidanski <ivmai@mail.ru> | 2021-10-20 10:17:26 +0300 |
|---|---|---|
| committer | Ivan Maidanski <ivmai@mail.ru> | 2021-10-20 16:46:15 +0300 |
| commit | fd9dff3162a193d0c912f232034e581770ab1eab (patch) | |
| tree | f25ed0e336ba75a768d2cab654fa6da4f9c7d42a /src | |
| parent | f5d006471b7ec552f50a99bd690d6d5706073a0c (diff) | |
| download | libatomic_ops-fd9dff3162a193d0c912f232034e581770ab1eab.tar.gz | |
Do not assume 'ordered except earlier write' for UWP/arm64
(fix of commit e078c7bb7)
* src/atomic_ops/sysdeps/msftc/x86_64.h: Do not include
ordered_except_wr.h if _M_ARM64.
Diffstat (limited to 'src')
| -rw-r--r-- | src/atomic_ops/sysdeps/msftc/x86_64.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/atomic_ops/sysdeps/msftc/x86_64.h b/src/atomic_ops/sysdeps/msftc/x86_64.h index aaf1d0c..ef13824 100644 --- a/src/atomic_ops/sysdeps/msftc/x86_64.h +++ b/src/atomic_ops/sysdeps/msftc/x86_64.h @@ -23,14 +23,15 @@ #include "../all_aligned_atomic_load_store.h" +#if !defined(_M_ARM64) /* Real X86 implementations appear */ /* to enforce ordering between memory operations, EXCEPT that a later */ /* read can pass earlier writes, presumably due to the visible */ /* presence of store buffers. */ /* We ignore the fact that the official specs */ /* seem to be much weaker (and arguably too weak to be usable). */ - #include "../ordered_except_wr.h" +#endif #ifdef AO_ASM_X64_AVAILABLE # include "../test_and_set_t_is_char.h" |