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| author | Ivan Maidanski <ivmai@mail.ru> | 2018-02-21 10:58:33 +0300 |
|---|---|---|
| committer | Ivan Maidanski <ivmai@mail.ru> | 2018-02-21 10:58:33 +0300 |
| commit | 393d7a7ff54565230f44e59a9c73addc9e627f56 (patch) | |
| tree | 73c4abdd99124de4254c60fc902938df3be72334 /src | |
| parent | 4f68118ead90f5a2940cea6baa28d24ab2fb9f74 (diff) | |
| download | libatomic_ops-393d7a7ff54565230f44e59a9c73addc9e627f56.tar.gz | |
Enable CAS for byte and short on RISC-V
Issue #31 (libatomic_ops).
At least for gcc-7.2.0 does not define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
and __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2 macros but, nonetheless, all the
provided CAS operations are lock-free (except for double-word).
* src/Makefile.am (nobase_private_HEADERS): Add gcc/riscv.h entry.
* src/atomic_ops.h [__GNUC__ && !AO_USE_PTHREAD_DEFS
&& !__INTEL_COMPILER && __riscv]: Include gcc/riscv.h file.
* src/atomic_ops/sysdeps/gcc/riscv.h: New file (include generic.h).
* src/atomic_ops/sysdeps/gcc/riscv.h (AO_GCC_FORCE_HAVE_CAS): Define
before include generic.h (and undefined at the end of file); add
comment about double-word operations.
Diffstat (limited to 'src')
| -rw-r--r-- | src/Makefile.am | 1 | ||||
| -rw-r--r-- | src/atomic_ops.h | 4 | ||||
| -rw-r--r-- | src/atomic_ops/sysdeps/gcc/riscv.h | 22 |
3 files changed, 26 insertions, 1 deletions
diff --git a/src/Makefile.am b/src/Makefile.am index df70081..ae5f24f 100644 --- a/src/Makefile.am +++ b/src/Makefile.am @@ -91,6 +91,7 @@ nobase_private_HEADERS = atomic_ops/ao_version.h \ atomic_ops/sysdeps/gcc/m68k.h \ atomic_ops/sysdeps/gcc/mips.h \ atomic_ops/sysdeps/gcc/powerpc.h \ + atomic_ops/sysdeps/gcc/riscv.h \ atomic_ops/sysdeps/gcc/s390.h \ atomic_ops/sysdeps/gcc/sh.h \ atomic_ops/sysdeps/gcc/sparc.h \ diff --git a/src/atomic_ops.h b/src/atomic_ops.h index cc7cb49..e7597d0 100644 --- a/src/atomic_ops.h +++ b/src/atomic_ops.h @@ -329,9 +329,11 @@ # include "atomic_ops/sysdeps/gcc/avr32.h" # elif defined(__hexagon__) # include "atomic_ops/sysdeps/gcc/hexagon.h" +# elif defined(__riscv) +# include "atomic_ops/sysdeps/gcc/riscv.h" # elif defined(__tile__) # include "atomic_ops/sysdeps/gcc/tile.h" -# else /* __nios2__, __riscv, etc. */ +# else /* __nios2__, etc. */ # include "atomic_ops/sysdeps/gcc/generic.h" # endif #endif /* __GNUC__ && !AO_USE_PTHREAD_DEFS */ diff --git a/src/atomic_ops/sysdeps/gcc/riscv.h b/src/atomic_ops/sysdeps/gcc/riscv.h new file mode 100644 index 0000000..ce72816 --- /dev/null +++ b/src/atomic_ops/sysdeps/gcc/riscv.h @@ -0,0 +1,22 @@ +/* + * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED + * OR IMPLIED. ANY USE IS AT YOUR OWN RISK. + * + * Permission is hereby granted to use or copy this program + * for any purpose, provided the above notices are retained on all copies. + * Permission to modify the code and to distribute modified code is granted, + * provided the above notices are retained, and a notice that the code was + * modified is included with the above copyright notice. + */ + +/* As of gcc-7.2.0, some __GCC_HAVE_SYNC_COMPARE_AND_SWAP_n are missing. */ +/* The operations are lock-free (even for the types smaller than word). */ +#define AO_GCC_FORCE_HAVE_CAS + +/* While double-word atomic operations are provided by the compiler */ +/* (which requires -latomic currently), they are not lock-free as */ +/* riscv itself does not have the double-word atomic operations. */ + +#include "generic.h" + +#undef AO_GCC_FORCE_HAVE_CAS |