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authorivmai <ivmai>2010-05-30 15:00:01 +0000
committerIvan Maidanski <ivmai@mail.ru>2011-07-25 16:03:26 +0400
commit935ef30844288c4213bfd49bd08f239b720f0fd6 (patch)
treecf62af2cd801099a58598d2b3ac7e86d0fde4db8
parentb3e098007465ddc8932804633793ebbf5f285bde (diff)
downloadlibatomic_ops-7_2alpha5-20100601.tar.gz
2010-05-30 Ivan Maidanski <ivmai@mail.ru> (really Bradley Smith)libatomic_ops-7_2alpha5-20100601
* src/atomic_ops/sysdeps/gcc/avr32.h (AO_test_and_set): Use "register long" (instead of "int") for "ret" variable. * src/atomic_ops/sysdeps/gcc/avr32.h (AO_test_and_set): Replace with AO_test_and_set_full (same for AO_HAVE_test_and_set). * src/atomic_ops/sysdeps/gcc/avr32.h (AO_compare_and_swap_full): New function implemented.
-rw-r--r--ChangeLog9
-rw-r--r--src/atomic_ops/sysdeps/gcc/avr32.h35
2 files changed, 37 insertions, 7 deletions
diff --git a/ChangeLog b/ChangeLog
index eb6f94d..36a0645 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,12 @@
+2010-05-30 Ivan Maidanski <ivmai@mail.ru> (really Bradley Smith)
+
+ * src/atomic_ops/sysdeps/gcc/avr32.h (AO_test_and_set): Use
+ "register long" (instead of "int") for "ret" variable.
+ * src/atomic_ops/sysdeps/gcc/avr32.h (AO_test_and_set): Replace
+ with AO_test_and_set_full (same for AO_HAVE_test_and_set).
+ * src/atomic_ops/sysdeps/gcc/avr32.h (AO_compare_and_swap_full):
+ New function implemented.
+
2010-05-22 Ivan Maidanski <ivmai@mail.ru>
* src/atomic_ops/sysdeps/Makefile.am (nobase_sysdep_HEADERS):
diff --git a/src/atomic_ops/sysdeps/gcc/avr32.h b/src/atomic_ops/sysdeps/gcc/avr32.h
index cd43c19..7a2fbed 100644
--- a/src/atomic_ops/sysdeps/gcc/avr32.h
+++ b/src/atomic_ops/sysdeps/gcc/avr32.h
@@ -29,16 +29,37 @@
#include "../test_and_set_t_is_ao_t.h"
AO_INLINE AO_TS_VAL_t
-AO_test_and_set(volatile AO_TS_t *addr)
+AO_test_and_set_full(volatile AO_TS_t *addr)
{
- int ret;
+ register long ret;
__asm__ __volatile__(
- "xchg %[old], %[mem], %[newv]"
- : [old] "=&r"(ret)
- : [mem] "r"(addr), [newv] "r"(1)
+ "xchg %[oldval], %[mem], %[newval]"
+ : [oldval] "=&r"(ret)
+ : [mem] "r"(addr), [newval] "r"(1)
: "memory");
- return ret;
+ return (AO_TS_VAL_t)ret;
}
-#define AO_HAVE_test_and_set
+#define AO_HAVE_test_and_set_full
+
+AO_INLINE int
+AO_compare_and_swap_full(volatile AO_t *addr, AO_t old, AO_t new_val)
+{
+ register long ret;
+
+ __asm__ __volatile__(
+ "1: ssrf 5\n"
+ " ld.w %[res], %[mem]\n"
+ " eor %[res], %[oldval]\n"
+ " brne 2f\n"
+ " stcond %[mem], %[newval]\n"
+ " brne 1b\n"
+ "2:\n"
+ : [res] "=&r"(ret), [mem] "=m"(*addr)
+ : "m"(*addr), [newval] "r"(new_val), [oldval] "r"(old)
+ : "cc", "memory");
+
+ return (int)ret;
+}
+#define AO_HAVE_compare_and_swap_full