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| author | Ivan Maidanski <ivmai@mail.ru> | 2013-03-09 20:28:00 +0400 |
|---|---|---|
| committer | Ivan Maidanski <ivmai@mail.ru> | 2013-03-09 20:28:00 +0400 |
| commit | 93926bcd4ed9c89d4e7fb87c02ca25aa6afc4214 (patch) | |
| tree | f7efd96ea3329f5b8ee61f01e7823675875e9851 | |
| parent | 5d6e9433c5edd91e21919536ea4a1ea6bb940122 (diff) | |
| download | libatomic_ops-add-aarch64-support.tar.gz | |
Always use 'mfence' for nop_full if target CPU supports SSE2 (gcc/x86)add-aarch64-support
* src/atomic_ops/sysdeps/gcc/x86.h (AO_USE_PENTIUM4_INSTRS): Define
if __SSE2__ is defined; update comment (and remove TODO item).
| -rw-r--r-- | src/atomic_ops/sysdeps/gcc/x86.h | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/atomic_ops/sysdeps/gcc/x86.h b/src/atomic_ops/sysdeps/gcc/x86.h index 3a3e33e..bed51d1 100644 --- a/src/atomic_ops/sysdeps/gcc/x86.h +++ b/src/atomic_ops/sysdeps/gcc/x86.h @@ -25,9 +25,8 @@ #include "../test_and_set_t_is_char.h" -/* TODO: Test __SSE2__ macro instead of AO_USE_PENTIUM4_INSTRS. */ -#if defined(__x86_64__) && !defined(AO_USE_PENTIUM4_INSTRS) - /* "mfence" (SSE2) is supported on all x86_64/amd64 chips. */ +#if defined(__SSE2__) && !defined(AO_USE_PENTIUM4_INSTRS) + /* "mfence" is a part of SSE2 set (introduced on Intel Pentium 4). */ # define AO_USE_PENTIUM4_INSTRS #endif |